MSI MS-v160 Schematic 10

8
+12V_BUS
C1
CAP CER 10UF 20% 16V X5R
10UFC110UF
(1206)1.8MM H MAX
+12V_BUS
+12V_BUS
C3
D D
C C
B B
C2
150nF_16VC3150nF_16V
150nF_16VC2150nF_16V
+3.3V_BUS
CAP CER 10UF 10% 6.3V X6S (0805)1.4MM MAX THICK
C5 10uF_X6SC510uF_X6S
+3.3V_BUS
C7 1uF_6.3VC71uF_6.3V
C8 10nFC810nF
C6 100nF_6.3VC6100nF_6.3V
Place these caps as close to the PCIE connector as possible
7
+3.3V
R5
R6
4.7KR54.7K
GPIO_4_SMBCLK<6>
GPIO_3_SMBDATA<6>
C9
4.7KR64.7K 100nF_6.3VC9100nF_6.3V
R1
DNIR1DNI
PETp10_GFXRp10<2> PETn10_GFXRn10<2>
PETp11_GFXRp11<2> PETn11_GFXRn11<2>
PETp12_GFXRp12<2> PETn12_GFXRn12<2>
PETp13_GFXRp13<2> PETn13_GFXRn13<2>
PETp14_GFXRp14<2> PETn14_GFXRn14<2>
PETp15_GFXRp15<2> PETn15_GFXRn15<2>
PETn0_GFXRn0<2>
PETp1_GFXRp1<2> PETn1_GFXRn1<2>
PETp2_GFXRp2<2> PETn2_GFXRn2<2>
PETp3_GFXRp3<2> PETn3_GFXRn3<2>
PETp4_GFXRp4<2> PETn4_GFXRn4<2>
PETp5_GFXRp5<2> PETn5_GFXRn5<2>
PETp6_GFXRp6<2> PETn6_GFXRn6<2>
PETp7_GFXRp7<2> PETn7_GFXRn7<2>
PETp8_GFXRp8<2> PETn8_GFXRn8<2>
PETp9_GFXRp9<2> PETn9_GFXRn9<2>
+3.3V_BUS
6
U12
U12
VCC8OE1 1B2OE2
6
1A
2B
4
GND
2A
NC7WB66K8X
NC7WB66K8X
R7DNI R7DNI R8DNI R8DNI
DNI , To Bypass U12
+3.3V_BUS
PRESENCE
5
PCI-EXPRESS EDGE CONNECTOR
7 3 1 5
SMCLK SMDAT
C10
C10 100nF_6.3V
100nF_6.3V
+12V_BUS
+3.3V
R40RR4
0R
DNI
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82
+12V#B1 +12V#B2 +12V#B3 GND#B4 SMCLK SMDAT GND#B7 +3.3V#B8 JTAG1
3.3Vaux WAKE#
RSVD#B12 GND#B13 PETp0 PETn0 GND#B16 PRSNT2#B17 GND#B18 PETp1 PETn1 GND#B21 GND#B22 PETp2 PETn2 GND#B25 GND#B26 PETp3 PETn3 GND#B29 RSVD#B30 PRSNT2#B31 GND#B32 PETp4 PETn4 GND#B35 GND#B36 PETp5 PETn5 GND#B39 GND#B40 PETp6 PETn6 GND#B43 GND#B44 PETp7 PETn7 GND#B47 PRSNT2#B48 GND#B49 PETp8 PETn8 GND#B52 GND#B53 PETp9 PETn9 GND#B56 GND#B57 PETp10 PETn10 GND#B60 GND#B61 PETp11 PETn11 GND#B64 GND#B65 PETp12 PETn12 GND#B68 GND#B69 PETp13 PETn13 GND#B72 GND#B73 PETp14 PETn14 GND#B76 GND#B77 PETp15 PETn15 GND#B80 PRSNT2#B81 RSVD#B82
DNI
Mechanical Key
Mechanical Key
MPCIE1
MPCIE1
PRSNT1#A1
+3.3V#A10
RSVD#A19
RSVD#A32 RSVD#A33
RSVD#A50
+12V#A2 +12V#A3 GND#A4
JTAG2 JTAG3 JTAG4 JTAG5
+3.3V#A9
PERST#
GND#A12 REFCLK+ REFCLK­GND#A15
PERp0 PERn0
GND#A18 GND#A20
PERp1
PERn1 GND#A23 GND#A24
PERp2
PERn2 GND#A27 GND#A28
PERp3
PERn3 GND#A31
GND#A34
PERp4
PERn4 GND#A37 GND#A38
PERp5
PERn5 GND#A41 GND#A42
PERp6
PERn6 GND#A45 GND#A46
PERp7
PERn7 GND#A49
GND#A51
PERp8
PERn8 GND#A54 GND#A55
PERp9
PERn9 GND#A58 GND#A59
PERp10
PERn10 GND#A62 GND#A63
PERp11
PERn11 GND#A66 GND#A67
PERp12
PERn12 GND#A70 GND#A71
PERp13
PERn13 GND#A74 GND#A75
PERp14
PERn14 GND#A78 GND#A79
PERp15
PERn15 GND#A82
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82
PRESENCE
JTDI
4
+12V_BUS
+3.3V_BUS
PERp0 PERn0
PERp1 PERn1
PERp2 PERn2
PERp3 PERn3
PERp4 PERn4
PERp5 PERn5
PERp6 PERn6
PERp7 PERn7
PERp8 PERn8
PERp9 PERn9
PERp10 PERn10
PERp11 PERn11
PERp12 PERn12
PERp13 PERn13
PERp14 PERn14
PERp15 PERn15
PERST#
No JTAG
R2 DNIR2 DNI
3
PCIE_REFCLKP <2> PCIE_REFCLKN <2>PETp0_GFXRp0<2>
PERp0 <2> PERn0 <2>
PERp1 <2> PERn1 <2>
PERp2 <2> PERn2 <2>
PERp3 <2> PERn3 <2>
PERp4 <2> PERn4 <2>
PERp5 <2> PERn5 <2>
PERp6 <2> PERn6 <2>
PERp7 <2> PERn7 <2>
PERp8 <2> PERn8 <2>
PERp9 <2> PERn9 <2>
PERp10 <2> PERn10 <2>
PERp11 <2> PERn11 <2>
PERp12 <2> PERn12 <2>
PERp13 <2> PERn13 <2>
PERp14 <2> PERn14 <2>
PERp15 <2> PERn15 <2>
2
R21 1KR21 1K
U1A
U1A
AD28
TESTEN
AM23
JTAG_TRSTB
AK23
JTAG_TCK
AN23
R9DNI R9DNI
JTAG_TDI
AM24
JTAG_TDO
AL24
JTAG_TMS
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1
+3.3V
1 2
R3 DNIR3 DNI
PART 1 OF 15
PART 1 OF 15
J
J T
T A
A G
G
53
R_RST
1
C4 100nF_6.3VC4100nF_6.3V
NC7SZ08P5X_NL
NC7SZ08P5X_NL
4
U11
U11
DNI
PERST#_buf <2,16>
Place R3 in U5
Table 1: Connection for JTAG
Production (No JTAG)
Internal Use Only
TSW1, R1 & R2 are located on the bottom side of the board close to PCIE connector.
Install R1, R2 & Don't Install TSW1
Install TSW1 & Don't Install R1 & R2
TSW1 Switch #1, 2, 3, 4, 5 and 6 closed (ON)
JTAG
#8 and 7 open
TSW1 Switch #1, 2, 3, 4, 5 and 6 open
NO JTAG
#8 & 7 closed (ON)
SYMBOL LEGEND
DO NOT
DNI
INSTALL
#
ACTIVE LOW
DIGITAL GROUND
ANALOG
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. ?2007 Advanced Micro Devices
?2007 Advanced Micro Devices
?2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
8
7
6
5
www.vinafix.vn
4
3
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
2
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc. 1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East Markham, Ontario
Markham, Ontario
Markham, Ontario
Monday, October 06, 2008
Monday, October 06, 2008
Monday, October 06, 2008
Sheet
Sheet
Sheet
of
119
of
119
of
119
GROUND
BUO BRING UP
ONLY
Doc No.
Doc No.
Doc No.
105-B665xx-00A
105-B665xx-00A
105-B665xx-00A
1
RevDate:
RevDate:
RevDate:
0
0
0
5
4
3
2
1
(2) RV730 PCIE Interface
NOTE: some of the PCIE testpoints will be available trought via on traces.
PETp0_GFXRp0<1> PETn0_GFXRn0<1>
PETp1_GFXRp1<1> PETn1_GFXRn1<1>
D D
C C
+1.8V
+1.8V
+1.1V
B B
PETp2_GFXRp2<1> PETn2_GFXRn2<1>
PETp3_GFXRp3<1> PETn3_GFXRn3<1>
PETp4_GFXRp4<1> PETn4_GFXRn4<1>
PETp5_GFXRp5<1> PETn5_GFXRn5<1>
PETp6_GFXRp6<1> PETn6_GFXRn6<1>
PETp7_GFXRp7<1> PETn7_GFXRn7<1>
PETp8_GFXRp8<1> PETn8_GFXRn8<1>
PETp9_GFXRp9<1> PETn9_GFXRn9<1>
PETp10_GFXRp10<1> PETn10_GFXRn10<1>
PETp11_GFXRp11<1> PETn11_GFXRn11<1>
PETp12_GFXRp12<1> PETn12_GFXRn12<1>
PETp13_GFXRp13<1> PETn13_GFXRn13<1>
PETp14_GFXRp14<1> PETn14_GFXRn14<1>
PETp15_GFXRp15<1> PETn15_GFXRn15<1>
B22 BLM15BD121SN1B22 BLM15BD121SN1
B23 26R_600mAB23 26R_600mA
B21 220R_2AB21 220R_2A
+PCIE_PVDD
+PCIE_VDDR
+PCIE_VDDC
1uF_6.3V
1uF_6.3V
4.7uF_6.3V
4.7uF_6.3V
C101
C101
C94
C94
10uF_X6S
10uF_X6S
C98
C98
1uF_6.3V
1uF_6.3V
C95
C95
1uF_6.3V
1uF_6.3V
C90
C90
1uF_6.3V
1uF_6.3V
C51
C51
10uF_X6S
10uF_X6S
C86
C86
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
TP6TP6
TP13TP13
TP14TP14
TP7TP7
TP15TP15
TP8TP8
TP9TP9
TP16TP16
TP17TP17
TP10TP10
TP11TP11
TP19TP19
TP18TP18
TP12TP12
TP20TP20
TP22TP22
TP21TP21
TP23TP23
TP24TP24
TP26TP26
TP25TP25
TP27TP27
PCIE_REFCLKP<1> PCIE_REFCLKN<1>
PERST#_buf<1,16>
C85
C85
C87
C87
100nF_6.3V
100nF_6.3V
C99
C99
100nF_6.3V
100nF_6.3V
C96
C96
C91
C91
1uF_6.3V
1uF_6.3V
C88
C88
1uF_6.3V
1uF_6.3V
C100
C100
C92
C92
C89
C89
10nF
10nF
C97
C97
100nF_6.3V
100nF_6.3V
C93
C93
1uF_6.3V
1uF_6.3V
C84
C84
U1B
U1B
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AA30
PERSTB
AB37
PCIE_PVDD
AA31
PCIE_VDDR#1
AA32
PCIE_VDDR#2
AA33
PCIE_VDDR#3
AA34
PCIE_VDDR#4
V28
PCIE_VDDR#5
W29
PCIE_VDDR#6
W30
PCIE_VDDR#7
Y31
PCIE_VDDR#8
G30
PCIE_VDDC#1
G31
PCIE_VDDC#2
H29
PCIE_VDDC#3
H30
PCIE_VDDC#4
J29
PCIE_VDDC#5
J30
PCIE_VDDC#6
L28
PCIE_VDDC#7
M28
PCIE_VDDC#8
N28
PCIE_VDDC#9
R28
PCIE_VDDC#10
T28
PCIE_VDDC#11
U28
PCIE_VDDC#12
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1
PART 2 OF 15
PART 2 OF 15
P
P C
C I
I E
E X
X P
P R
R E
E S
S S
S
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
PCIE_CALRP PCIE_CALRN
PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8
PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 PCIE_VSS#32 PCIE_VSS#33 PCIE_VSS#34 PCIE_VSS#35
Y33 Y32
W33 W32
U33 U32
U30 U29
T33 T32
T30 T29
P33 P32
P30 P29
N33 N32
N30 N29
L33 L32
L30 L29
K33 K32
J33 J32
K30 K29
H33 H32
Y30 Y29
AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
PCIE_CALRP PCIE_CALRN
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
100nF_6.3V
C11
C11
100nF_6.3V
100nF_6.3V
C13
C13
R221.27K R221.27K
R242.0K R242.0K
C12
C12
C14
C14 100nF_6.3V
100nF_6.3V
C15
C15
C16
C16 100nF_6.3V
100nF_6.3V
C17
C17
C18
C18 100nF_6.3V
100nF_6.3V
C19
C19
C20
C20 100nF_6.3V
100nF_6.3V
C21
C21
C22
C22 100nF_6.3V
100nF_6.3V
C23
C23
C24
C24 100nF_6.3V
100nF_6.3V
C25
C25
C26
C26 100nF_6.3V
100nF_6.3V
C27
C27
C28
C28 100nF_6.3V
100nF_6.3V
C29
C29
C30
C30 100nF_6.3V
100nF_6.3V
C31
C31
C32
C32 100nF_6.3V
100nF_6.3V
C33
C33
C34
C34 100nF_6.3V
100nF_6.3V
C35
C35
C36
C36 100nF_6.3V
100nF_6.3V
C37
C37
C38
C38 100nF_6.3V
100nF_6.3V
C39
C39
C40
C40 100nF_6.3V
100nF_6.3V
C41
C41
C42
C42 100nF_6.3V
100nF_6.3V
+PCIE_VDDC
PERp0 <1> PERn0 <1>
PERp1 <1> PERn1 <1>
PERp2 <1> PERn2 <1>
PERp3 <1> PERn3 <1>
PERp4 <1> PERn4 <1>
PERp5 <1> PERn5 <1>
PERp6 <1> PERn6 <1>
PERp7 <1> PERn7 <1>
PERp8 <1> PERn8 <1>
PERp9 <1> PERn9 <1>
PERp10 <1> PERn10 <1>
PERp11 <1> PERn11 <1>
PERp12 <1> PERn12 <1>
PERp13 <1> PERn13 <1>
PERp14 <1> PERn14 <1>
PERp15 <1> PERn15 <1>
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. ?2007 Advanced Micro Devices
?2007 Advanced Micro Devices
?2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
5
4
www.vinafix.vn
3
2
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc. 1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East Markham, Ontario
Markham, Ontario
Markham, Ontario
Monday, October 06, 2008
Monday, October 06, 2008
Monday, October 06, 2008
Sheet
Sheet
Sheet
of
219
of
219
of
219
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B665xx-00A
105-B665xx-00A
105-B665xx-00A
5
(3) RV730 MEM Interface Ch A&B
DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10
D D
DQMA_0<4> DQMA_1<4> DQMA_2<4> DQMA_3<4>
QSA_0<4> QSA_1<4> QSA_2<4> QSA_3<4>
C C
B B
ODTA0<4> ODTB0<5>ODTA1 <4> ODTB1 <5>
MAA_[14..0]<4>
MAA_BA_[2..0]<4>
DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31
CKEA0<4> CLKA0<4>
CLKA0b<4>
CSA0b_0<4>
CASA0b<4> RASA0b<4> WEA0b<4>
MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8 MAA_9 MAA_10 MAA_11 MAA_12 MAA_13 MAA_14
MAA_BA_0 MAA_BA_1 MAA_BA_2
U1C
U1C
C37
DQA_0
C35
DQA_1
A35
DQA_2
E34
DQA_3
G32
DQA_4
D33
DQA_5
F32
DQA_6
E32
DQA_7
D31
DQA_8
F30
DQA_9
C30
DQA_10
A30
DQA_11
F28
DQA_12
C28
DQA_13
A28
DQA_14
E28
DQA_15
D27
DQA_16
F26
DQA_17
C26
DQA_18
A26
DQA_19
F24
DQA_20
C24
DQA_21
A24
DQA_22
E24
DQA_23
C22
DQA_24
A22
DQA_25
F22
DQA_26
D21
DQA_27
A20
DQA_28
F20
DQA_29
D19
DQA_30
E18
DQA_31
A32
DQMA_0
C32
DQMA_1
D23
DQMA_2
E22
DQMA_3
DDR2
DDR2
QSA_0 QSA_1 QSA_2 QSA_3
QSA_0B QSA_1B QSA_2B QSA_3B
Single or
Single or
ODTA0
CKEA0 CLKA0
CLKA0B
CSA0B_0 CSA0B_1
CASA0B RASA0B WEA0B
MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8 MAA_9 MAA_10 MAA_11 MAA_12 NC_MAA_13 NC_MAA_14
MAA_BA0 MAA_BA1 MAA_BA2
DRAM_RST
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1
AH11
C34 D29 D25 E20
A34 E30 E26 C20
J21
K21 H27
G27
K24 K27
K20 K23 K26
G24
J23
H24
J24
H26
J26 H21 G21 H19 H20 L13 G16
J16 H23
J19
J17 H17 H16
PART 3 OF 15
PART 3 OF 15
Diff Strobes
Diff Strobes
DDR3
DDR3
M
M E
E M
M O
O R
R Y
Y
I
I N
N T
T E
E R
R F
F A
A C
C E
E
Differential Strobes
Differential Strobes
B
B A
A N
N K
K
A
A
DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63
DQMA_4 DQMA_5 DQMA_6 DQMA_7
GDDR3
GDDR3
Read
Strobes
Read
Strobes
QSA_4B QSA_5B QSA_6B QSA_7B
Write
Strobes
Write
Strobes
CLKA1B
CSA1B_0 CSA1B_1
CASA1B RASA1B
NC_MEM_CALRP0 NC_MEM_CALRN0
MEM_CALRP1 NC_MEM_CALRN1 NC_MEM_CALRP2 NC_MEM_CALRN2
MVREFDA
MVREFSA
C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5
C14 A14 E10 D9
E16
QSA_4
E12
QSA_5
J10
QSA_6
D7
QSA_7
C16 C12 J11 F8
G19
ODTA1
J20
CKEA1
J14
CLKA1
H14
M13 K16
K17 K19 L15
WEA1B
M27 L27 M12 N12 AH12 AG12
L18
MVREFD/S =0.7* VDDR1 (GDDR3/4/5)
L20
DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8
DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31
MEM_CALRP0
MEM_CALRN0
MEM_CALRP1
MEM_CALRN1
MEM_CALRP2
MEM_CALRN2
MVREFD_A
MVREFS_A
4
3
U1D
DQA1_[31..0] <4>DQA0_[31..0]<4> DQB0_[31..0]<5> DQB1_[31..0] <5>
CKEA1 <4>
CLKA1b <4>
WEA1b <4>
R120 DNIR120 DNI R121 DNIR121 DNI R118 243RR118 243R R119 DNIR119 DNI R131 DNIR131 DNI R132 DNIR132 DNI
DNI
DNI
DNI
1uF_6.3V
1uF_6.3V
DNI
DNI
DNI
1uF_6.3V
1uF_6.3V
DQMA_4 <4> DQMA_5 <4> DQMA_6 <4> DQMA_7 <4>
QSA_4 <4> QSA_5 <4> QSA_6 <4> QSA_7 <4>
CLKA1 <4>
CSA1b_0 <4>
CASA1b <4> RASA1b <4>
R122
R122
C293
C293
100R
100R
1%
R125
R125
C300
C300
100R
100R
1%
C303
C303
R126
R126
100R
100R
R128
R128
C305
C305
100R
100R
1%
+MVDD
+MVDD
+MVDD
DQMB_0<5> DQMB_1<5> DQMB_2<5> DQMB_3<5>
QSB_0<5> QSB_1<5> QSB_2<5> QSB_3<5>
MAB_[14..0]<5>
MAB_BA_[2..0]<5>
DQB0_0 DQB0_1 DQB0_2 DQB0_3 DQB0_4 DQB0_5 DQB0_6 DQB0_7 DQB0_8 DQB0_9 DQB0_10 DQB0_11 DQB0_12 DQB0_13 DQB0_14 DQB0_15 DQB0_16 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 DQB0_25 DQB0_26 DQB0_27 DQB0_28 DQB0_29 DQB0_30 DQB0_31
CKEB0<5> CLKB0<5>
CLKB0b<5>
CSB0b_0<5>
CASB0b<5> RASB0b<5> WEB0b<5>
MAB_0 MAB_1 MAB_2 MAB_3 MAB_4 MAB_5 MAB_6 MAB_7 MAB_8 MAB_9 MAB_10 MAB_11 MAB_12 MAB_13 MAB_14
MAB_BA_0 MAB_BA_1 MAB_BA_2
U1D
C5
DQB_0
C3
DQB_1
E3
DQB_2
E1
DQB_3
F1
DQB_4
F3
DQB_5
F5
DQB_6
G4
DQB_7
H5
DQB_8
H6
DQB_9
J4
DQB_10
K6
DQB_11
K5
DQB_12
L4
DQB_13
M6
DQB_14
M1
DQB_15
M3
DQB_16
M5
DQB_17
N4
DQB_18
P6
DQB_19
P5
DQB_20
R4
DQB_21
T6
DQB_22
T1
DQB_23
U4
DQB_24
V6
DQB_25
V1
DQB_26
V3
DQB_27
Y6
DQB_28
Y1
DQB_29
Y3
DQB_30
Y5
DQB_31
H3
DQMB_0
H1
DQMB_1
T3
DQMB_2
T5
DQMB_3
F6
QSB_0
K3
QSB_1
P3
QSB_2
V5
QSB_3
G7
QSB_0B
K1
QSB_1B
P1
QSB_2B
W4
QSB_3B
T7
ODTB0
U10
CKEB0
L9
CLKB0
L8
CLKB0B
P10
CSB0B_0
L10
CSB0B_1
W10
CASB0B
T10
RASB0B
N10
WEB0B
P8
MAB_0
T9
MAB_1
P9
MAB_2
N7
MAB_3
N8
MAB_4
N9
MAB_5
U9
MAB_6
U8
MAB_7
Y9
MAB_8
W9
MAB_9
AC8
MAB_10
AC9
MAB_11
AA7
MAB_12
T8
NC_MAB_13
W8
NC_MAB_14
Y8
MAB_BA0
AA9
MAB_BA1
AA8
MAB_BA2
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1
DDR2
DDR2
Single or
Diff Strobes
Single or
Diff Strobes
PART 4 OF 15
PART 4 OF 15
M
M E
E M
M O
O R
R Y
Y
I
I N
N T
T E
E R
R F
F A
A C
C E
E
DDR3 GDDR3
DDR3 GDDR3
Differential Strobes
Differential Strobes
B
B A
A N
N K
K
B
B
2
DQB1_0
AA4
DQB_32 DQB_33 DQB_34 DQB_35 DQB_36 DQB_37 DQB_38 DQB_39 DQB_40 DQB_41 DQB_42 DQB_43 DQB_44 DQB_45 DQB_46 DQB_47 DQB_48 DQB_49 DQB_50 DQB_51 DQB_52 DQB_53 DQB_54 DQB_55 DQB_56 DQB_57 DQB_58 DQB_59 DQB_60 DQB_61 DQB_62 DQB_63
DQMB_4 DQMB_5 DQMB_6 DQMB_7
QSB_4 QSB_5 QSB_6 QSB_7
Read
Strobes
Read
Strobes
QSB_4B QSB_5B QSB_6B QSB_7B
Write
Strobes
Write
Strobes
ODTB1
CKEB1 CLKB1
CLKB1B
CSB1B_0 CSB1B_1
CASB1B RASB1B
WEB1B
MVREFDB
MVREFSB
DQB1_1
AB6
DQB1_2
AB1
DQB1_3
AB3
DQB1_4
AD6
DQB1_5
AD1
DQB1_6
AD3
DQB1_7
AD5
DQB1_8
AF1
DQB1_9
AF3
DQB1_10
AF6
DQB1_11
AG4
DQB1_12
AH5
DQB1_13
AH6
DQB1_14
AJ4
DQB1_15
AK3
DQB1_16
AF8
DQB1_17
AF9
DQB1_18
AG8
DQB1_19
AG7
DQB1_20
AK9
DQB1_21
AL7
DQB1_22
AM8
DQB1_23
AM7
DQB1_24
AK1
DQB1_25
AL4
DQB1_26
AM6
DQB1_27
AM1
DQB1_28
AN4
DQB1_29
AP3
DQB1_30
AP1
DQB1_31
AP5
AE4 AF5 AK6 AK5
AB5 AH1 AJ9 AM5
AC4 AH3 AJ8 AM3
W7
AA11 AD8
AD7
AD10 AC10
AA10 Y10 AB11
MVREFD_B
Y12
MVREFD/S =0.7* VDDR1 (GDDR3/4/5)
MVREFS_B
AA12
CKEB1 <5> CLKB1 <5>
CLKB1b <5>
CSB1b_0 <5>
CASB1b <5> RASB1b <5> WEB1b <5>
C295
C295
DNI
DNI
DNI
C298
C298
1uF_6.3V
1uF_6.3V
C301
C301
DNI
DNI
DNI
C307
C307
1uF_6.3V
1uF_6.3V
DQMB_4 <5> DQMB_5 <5> DQMB_6 <5> DQMB_7 <5>
QSB_4 <5> QSB_5 <5> QSB_6 <5> QSB_7 <5>
R123
R123
100R
100R
1%
R124
R124 100R
100R
1%
R127
R127
100R
100R
1%1%
R129
R129 100R
100R
1%
1
+MVDD
+MVDD
A A
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. ?2007 Advanced Micro Devices
?2007 Advanced Micro Devices
?2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
5
4
www.vinafix.vn
3
2
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc. 1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East Markham, Ontario
Markham, Ontario
Markham, Ontario
Monday, October 06, 2008
Monday, October 06, 2008
Monday, October 06, 2008
Sheet
Sheet
Sheet
of
319
of
319
of
319
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B665xx-00A
105-B665xx-00A
105-B665xx-00A
5
(4) DDR2 Ch A
DQA0_[31..0]<3> DQA1_[31..0]<3>
D D
C C
MAA_BA_[2..0]<3>
MAA_[14..0]<3>
+MVDD +MVDD +MVDD
R201
R201
4.99K
4.99K
R202
R202
C2202
C2202
4.99K
4.99K
100nF_6.3V
100nF_6.3V
MAA_BA_0 MAA_BA_1 MAA_BA_2 MAA_BA_2
MAA_12 MAA_11 MAA_10 MAA_9 MAA_8 MAA_7 MAA_6 MAA_5 MAA_4 MAA_3 MAA_2 MAA_1 MAA_0
CLKA0b<3> CLKA0<3>
CKEA0<3>
CSA0b_0<3>
WEA0b<3> RASA0b<3> CASA0b<3>
DQMA_1 DQMA_0
ODTA0<3>
QSA_1
VREF_A0
QSA_0
MAA_14 MAA_13
U201
U201
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
DQA0_2
B9
DQA0_5
B1
DQA0_0
D9
DQA0_7
D1
DQA0_6
D3
DQA0_1
D7
DQA0_3
C2
DQ9
DQA0_4
C8
DQ8
DQA0_9
F9
DQ7
DQA0_12
F1
DQ6
DQA0_8
H9
DQ5
DQA0_15
H1
DQ4
DQA0_13
H3
DQ3
DQA0_11
H7
DQ2
DQA0_14
G2
DQ1
DQA0_10
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9
B2201
B2201
M9
220R_200mA
220R_200mA
R1 J1
J7
C2200
C2200
C2201
C2201
100nF_6.3V
100nF_6.3V
1uF_6.3V
R203
R203
4.99K
4.99K
R204
R204
4.99K
4.99K
1uF_6.3V
VREF_U202
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
+MVDD
+MVDD
C2205
C2205 100nF_6.3V
100nF_6.3V
4
CHANNEL A: 128MB/256MB DDR2
U202
MAA_BA_0 MAA_BA_1
MAA_12 MAA_11 MAA_10 MAA_9 MAA_8 MAA_7 MAA_6 MAA_5 MAA_4 MAA_3 MAA_2 MAA_1 MAA_0
CLKA0b<3> CLKA0<3>
CKEA0<3>
CSA0b_0<3>
WEA0b<3> RASA0b<3> CASA0b<3>
DQMA_3
DQMA_2
ODTA0<3> ODTA1<3>
QSA_3
QSA_2
VREF_A0VREF_A0
MAA_14 MAA_13
U202
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15
DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
DQA0_19
B9
DQA0_22
B1
DQA0_20
D9
DQA0_23
D1
DQA0_17
D3
DQA0_18
D7
DQA0_21
C2
DQ9
DQA0_16
C8
DQ8
DQA0_28
F9
DQ7
DQA0_27
F1
DQ6
DQA0_30
H9
DQ5
DQA0_24
H1
DQ4
DQA0_25
H3
DQ3
DQA0_31
H7
DQ2
DQA0_26
G2
DQ1
DQA0_29
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9
B2202
B2202
M9
220R_200mA
220R_200mA
R1 J1
J7
C2203
C2203 100nF_6.3V
100nF_6.3V
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
R205
R205
4.99K
4.99K
R206
R206
4.99K
4.99K
3
U203
MAA_BA_0 MAA_BA_1 MAA_BA_2
MAA_12 MAA_11 MAA_10 MAA_9 MAA_8 MAA_7 MAA_6 MAA_5 MAA_4 MAA_3 MAA_2 MAA_1
CSA1b_0<3>
DQMA_7 DQMA_6
QSA_7
VREF_A1VREF_A0
QSA_6
VREF_A1
MAA_0
CLKA1b<3> CLKA1<3>
CKEA1<3>
WEA1b<3> RASA1b<3> CASA1b<3>
MAA_14 MAA_13
+MVDD
+MVDD
C2204
C2204 1uF_6.3V
1uF_6.3V
VREF_U203VREF_U201 VREF_U204
C2208
C2208 100nF_6.3V
100nF_6.3V
U203
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDDQ10
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
B9 B1 D9 D1 D3 D7 C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
DQA1_20 DQA1_19 DQA1_22 DQA1_18 DQA1_17 DQA1_23 DQA1_16 DQA1_21 DQA1_28 DQA1_26 DQA1_31 DQA1_27 DQA1_25 DQA1_29 DQA1_24 DQA1_30
C2206
C2206 100nF_6.3V
100nF_6.3V
+MVDD
2
B2203
B2203 220R_200mA
220R_200mA
R207
R207
4.99K
4.99K
R208
R208
4.99K
4.99K
C2207
C2207 1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
C2211
C2211 100nF_6.3V
100nF_6.3V
CSA1b_0<3>
DQMA_5 DQMA_4
QSA_5
VREF_A1
QSA_4
VREF_A1
MAA_BA_0 MAA_BA_1 MAA_BA_2
MAA_12 MAA_11 MAA_10 MAA_9 MAA_8 MAA_7 MAA_6 MAA_5 MAA_4 MAA_3 MAA_2 MAA_1 MAA_0
CLKA1b<3> CLKA1<3>
CKEA1<3>
WEA1b<3> RASA1b<3> CASA1b<3>
ODTA1<3>
MAA_14 MAA_13
U204
U204
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
1
DQA1_2
B9
DQA1_4
B1
DQA1_0
D9
DQA1_6
D1
DQA1_7
D3
DQA1_1
D7
DQA1_5
C2
DQ9
DQA1_3
C8
DQ8
DQA1_11
F9
DQ7
DQA1_12
F1
DQ6
DQA1_10
H9
DQ5
DQA1_15
H1
DQ4
DQA1_14
H3
DQ3
DQA1_9
H7
DQ2
DQA1_13
G2
DQ1
DQA1_8
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
C2209
C2209 100nF_6.3V
100nF_6.3V
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
B2204
B2204 220R_200mA
220R_200mA
C2210
C2210 1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
+MVDD+MVDD
DQMA_0
B B
A A
DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6 DQMA_7
QSA_[7..0]<3>DQMA_[7..0]<3>
+MVDD +MVDD +MVDD
C1540 1uF_6.3VC1540 1uF_6.3V
C1541 1uF_6.3VC1541 1uF_6.3V
C1542 1uF_6.3VC1542 1uF_6.3V
MC1368 4.7uF_6.3VMC1368 4.7uF_6.3V
C1368 10uFC1368 10uF
Overlap cap pair foorprints (0805 with 0603)
5
QSA_0 QSA_1 QSA_2 QSA_3 QSA_4 QSA_5 QSA_6 QSA_7
C1356 1uF_6.3VC1356 1uF_6.3V
C1367 1uF_6.3VC1367 1uF_6.3V
C1363 1uF_6.3VC1363 1uF_6.3V
C1355 1uF_6.3VC1355 1uF_6.3V
+MVDD +MVDD +MVDD
C1325 10uFC1325 10uF
MC1325 4.7uF_6.3VMC1325 4.7uF_6.3V
C1301 1uF_6.3VC1301 1uF_6.3V
C1360 1uF_6.3VC1360 1uF_6.3V
C1302 1uF_6.3VC1302 1uF_6.3V
C1344 1uF_6.3VC1344 1uF_6.3V
C1303 1uF_6.3VC1303 1uF_6.3V
C1345 1uF_6.3VC1345 1uF_6.3V
C1304 1uF_6.3VC1304 1uF_6.3V
C1331 1uF_6.3VC1331 1uF_6.3V
C1305 1uF_6.3VC1305 1uF_6.3V
C1332 1uF_6.3VC1332 1uF_6.3V
C1306 1uF_6.3VC1306 1uF_6.3V
C1333 1uF_6.3VC1333 1uF_6.3V
C1307 1uF_6.3VC1307 1uF_6.3V
DNI DNI DNI
R219
R219
4.99K
4.99K
R220
R220
4.99K
4.99K
C1544 1uF_6.3VC1544 1uF_6.3V
C1543 1uF_6.3VC1543 1uF_6.3V
MC1327 4.7uF_6.3VMC1327 4.7uF_6.3V
C1327 10uFC1327 10uF
Overlap cap pair foorprints (0805 with 0603)
4
VREF_A0VREF_A1
C1545 1uF_6.3VC1545 1uF_6.3V
C1361 10uFC1361 10uF
C1337 1uF_6.3VC1337 1uF_6.3V
C1338 1uF_6.3VC1338 1uF_6.3V
MC1361 4.7uF_6.3VMC1361 4.7uF_6.3V
R209
R209
4.99K
4.99K
R210
R210
4.99K
4.99K
C1346 1uF_6.3VC1346 1uF_6.3V
C1326 1uF_6.3VC1326 1uF_6.3V
C1321 1uF_6.3VC1321 1uF_6.3V
CLKA0<3>
CLKA0b<3>
CLKA1<3>
CLKA1b<3>
C1364 1uF_6.3VC1364 1uF_6.3V
C1365 1uF_6.3VC1365 1uF_6.3V
C1334 1uF_6.3VC1334 1uF_6.3V
C1323 1uF_6.3VC1323 1uF_6.3V
C1357 1uF_6.3VC1357 1uF_6.3V
C1336 1uF_6.3VC1336 1uF_6.3V
C1335 1uF_6.3VC1335 1uF_6.3V
C1348 1uF_6.3VC1348 1uF_6.3V
C1339 1uF_6.3VC1339 1uF_6.3V
C1347 1uF_6.3VC1347 1uF_6.3V
C1322 1uF_6.3VC1322 1uF_6.3V
www.vinafix.vn
C1349 1uF_6.3VC1349 1uF_6.3V
R221
R221 56R
56R
C244 10nFC244 10nF
R222
R222 56R
56R
R223
R223 56R
56R
C245 10nFC245 10nF
R224
R224 56R
56R
C1546 1uF_6.3VC1546 1uF_6.3V
C1547 1uF_6.3VC1547 1uF_6.3V
+MVDD+MVDD +MVDD
C1330 10uFC1330 10uF
MC1330 4.7uF_6.3VMC1330 4.7uF_6.3V
Overlap cap pair foorprints (0805 with 0603)
3
C1548 1uF_6.3VC1548 1uF_6.3V
C1352 10uFC1352 10uF
C1341 1uF_6.3VC1341 1uF_6.3V
C1342 1uF_6.3VC1342 1uF_6.3V
MC1352 4.7uF_6.3VMC1352 4.7uF_6.3V
C1328 1uF_6.3VC1328 1uF_6.3V
C1329 1uF_6.3VC1329 1uF_6.3V
C1340 1uF_6.3VC1340 1uF_6.3V
C1343 1uF_6.3VC1343 1uF_6.3V
C1350 1uF_6.3VC1350 1uF_6.3V
C1324 1uF_6.3VC1324 1uF_6.3V
C1353 1uF_6.3VC1353 1uF_6.3V
C1366 1uF_6.3VC1366 1uF_6.3V
C1354 1uF_6.3VC1354 1uF_6.3V
C1362 1uF_6.3VC1362 1uF_6.3V
C1359 1uF_6.3VC1359 1uF_6.3V
C1369 1uF_6.3VC1369 1uF_6.3V
C1351 1uF_6.3VC1351 1uF_6.3V
C1358 1uF_6.3VC1358 1uF_6.3V
C1370 1uF_6.3VC1370 1uF_6.3V
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. ?2007 Advanced Micro Devices
?2007 Advanced Micro Devices
?2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
2
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
+MVDD
C1538 1uF_6.3VC1538 1uF_6.3V
C1537 1uF_6.3VC1537 1uF_6.3V
C1539 1uF_6.3VC1539 1uF_6.3V
+MVDD
C1319 10uFC1319 10uF
MC1319 4.7uF_6.3VMC1319 4.7uF_6.3V
Overlap cap pair foorprints (0805 with 0603)
C1309 1uF_6.3VC1309 1uF_6.3V
C1311 1uF_6.3VC1311 1uF_6.3V
C1310 1uF_6.3VC1310 1uF_6.3V
+MVDD
C1320 10uFC1320 10uF
MC1320 4.7uF_6.3VMC1320 4.7uF_6.3V
DNI
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc. 1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East Markham, Ontario
Markham, Ontario
Markham, Ontario
Monday, October 06, 2008
Monday, October 06, 2008
Monday, October 06, 2008
Sheet
Sheet
Sheet
419
419
419
C1312 1uF_6.3VC1312 1uF_6.3V
C1371 1uF_6.3VC1371 1uF_6.3V
of
of
of
C1313 1uF_6.3VC1313 1uF_6.3V
C1372 1uF_6.3VC1372 1uF_6.3V
1
C1314 1uF_6.3VC1314 1uF_6.3V
C1373 1uF_6.3VC1373 1uF_6.3V
C1315 1uF_6.3VC1315 1uF_6.3V
C1374 1uF_6.3VC1374 1uF_6.3V
C1316 1uF_6.3VC1316 1uF_6.3V
C1375 1uF_6.3VC1375 1uF_6.3V
Doc No.
Doc No.
Doc No.
C1376 1uF_6.3VC1376 1uF_6.3V
C1317 1uF_6.3VC1317 1uF_6.3V
C1318 1uF_6.3VC1318 1uF_6.3V
C1377 1uF_6.3VC1377 1uF_6.3V
RevDate:
RevDate:
RevDate:
105-B665xx-00A
105-B665xx-00A
105-B665xx-00A
0
0
0
5
(5) DDR2 Ch B
DQB0_[31..0]<3> DQB1_[31..0]<3>
MAB_BA_[2..0]<3>
D D
C C
B B
+MVDD
MAB_[14..0]<3>
R301
R301
4.99K
4.99K
VREF_U301
R302
R302
4.99K
4.99K
DQMB_[7..0]<3>
C2302
C2302 100nF_6.3V
100nF_6.3V
MAB_BA_0 MAB_BA_1 MAB_BA_2 MAB_BA_2 MAB_BA_2
MAB_12 MAB_11 MAB_10 MAB_9 MAB_8 MAB_7 MAB_6 MAB_5 MAB_4 MAB_3 MAB_2 MAB_1 MAB_0
CLKB0b<3> CLKB0<3>
CKEB0<3>
CSB0b_0<3>
WEB0b<3> RASB0b<3> CASB0b<3>
DQMB_2 DQMB_0
ODTB0<3>
QSB_2
VREF_B0
QSB_0
VREF_B0
MAB_14 MAB_13
DQMB_0 DQMB_1 DQMB_2 DQMB_3 DQMB_4 DQMB_5 DQMB_6 DQMB_7
U301
U301
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
QSB_[7..0]<3>
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
DQB0_2
B9
DQB0_5
B1
DQB0_0
D9
DQB0_7
D1
DQB0_6
D3
DQB0_1
D7
DQB0_4
C2
DQ9
DQB0_3
C8
DQ8
DQB0_18
F9
DQ7
DQB0_21
F1
DQ6
DQB0_17
H9
DQ5
DQB0_20
H1
DQ4
DQB0_23
H3
DQ3
DQB0_16
H7
DQ2
DQB0_22
G2
DQ1
DQB0_19
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9
B301
B301
M9
220R_200mA
220R_200mA
R1 J1
J7
C2300
C2300
C2301
C2301
100nF_6.3V
100nF_6.3V
1uF_6.3V
+MVDD
R303
R303
4.99K
4.99K
R304
R304
4.99K
4.99K
1uF_6.3V
VREF_U302
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
QSB_0 QSB_1 QSB_2 QSB_3 QSB_4 QSB_5 QSB_6 QSB_7
4
+MVDD
+MVDD
C2305
C2305 100nF_6.3V
100nF_6.3V
VREF_B0 VREF_B1
3
2
CHANNEL B: 128MB/256MB DDR2
U302
R309
R309
4.99K
4.99K
R310
R310
4.99K
4.99K
U302
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
R319
R319
4.99K
4.99K
R320
R320
4.99K
4.99K
DQB0_12
B9
DQB0_11
B1
DQB0_15
D9
DQB0_10
D1
DQB0_9
D3
DQB0_14
D7
DQB0_8
C2
DQ9
DQB0_13
C8
DQ8
DQB0_29
F9
DQ7
DQB0_27
F1
DQ6
DQB0_31
H9
DQ5
DQB0_24
H1
DQ4
DQB0_25
H3
DQ3
DQB0_28
H7
DQ2
DQB0_26
G2
DQ1
DQB0_30
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7
+MVDD
B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
CLKB0<3>
CLKB0b<3>
CLKB1<3>
CLKB1b<3>
B302
B302 220R_200mA
220R_200mA
C2303
C2303 100nF_6.3V
100nF_6.3V
R305
R305
4.99K
4.99K
R306
R306
4.99K
4.99K
+MVDD
+MVDD
C2304
C2304 1uF_6.3V
1uF_6.3V
VREF_U303
C2308
C2308 100nF_6.3V
100nF_6.3V
R321
R321 56R
56R
R322
R322 56R
56R
R323
R323 56R
56R
R324
R324 56R
56R
MAB_BA_0 MAB_BA_1
MAB_12 MAB_11 MAB_10 MAB_9 MAB_8 MAB_7 MAB_6 MAB_5 MAB_4 MAB_3 MAB_2 MAB_1 MAB_0
CLKB1b<3> CLKB1<3>
CKEB1<3>
CSB1b_0<3>
WEB1b<3> RASB1b<3> CASB1b<3>
DQMB_5 DQMB_4
VREF_B1
QSB_4
VREF_B1
MAB_14 MAB_13
C344 10nFC344 10nF
C345 10nFC345 10nF
MAB_BA_0 MAB_BA_1
MAB_12 MAB_11 MAB_10 MAB_9 MAB_8 MAB_7 MAB_6 MAB_5 MAB_4 MAB_3 MAB_2 MAB_1 MAB_0
CLKB0b<3> CLKB0<3>
CKEB0<3>
CSB0b_0<3>
WEB0b<3> RASB0b<3> CASB0b<3>
DQMB_3 DQMB_1
ODTB0<3> ODTB1<3> ODTB1<3>
QSB_3 QSB_5
VREF_B0
QSB_1
VREF_B0
MAB_14 MAB_13
+MVDD +MVDD
U303
U303
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDDQ10
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
DQB1_3
B9
DQB1_5
B1
DQB1_0
D9
DQB1_4
D1
DQB1_7
D3
DQB1_2
D7
DQB1_6
C2
DQ9
DQB1_1
C8
DQ8
DQB1_11
F9
DQ7
DQB1_12
F1
DQ6
DQB1_10
H9
DQ5
DQB1_15
H1
DQ4
DQB1_14
H3
DQ3
DQB1_8
H7
DQ2
DQB1_13
G2
DQ1
DQB1_9
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
C2306
C2306 100nF_6.3V
100nF_6.3V
A7
+MVDD
B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
B303
B303 220R_200mA
220R_200mA
R307
R307
4.99K
4.99K
R308
R308
4.99K
4.99K
C2307
C2307 1uF_6.3V
1uF_6.3V
VREF_U304
C2587
C2587 100nF_6.3V
100nF_6.3V
+MVDD
+MVDD
CSB1b_0<3>
DQMB_7 DQMB_6
QSB_7
VREF_B1
QSB_6
VREF_B1
MAB_BA_0 MAB_BA_1 MAB_BA_2
MAB_12 MAB_11 MAB_10 MAB_9 MAB_8 MAB_7 MAB_6 MAB_5 MAB_4 MAB_3 MAB_2 MAB_1 MAB_0
CLKB1b<3> CLKB1<3>
CKEB1<3>
WEB1b<3> RASB1b<3> CASB1b<3>
MAB_14 MAB_13
U304
U304
L2
BA0
L3
BA1
L1
BA2
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
R3
NC#R3
R7
NC#R7
R8
NC#R8
23BC2347SC25
23BC2347SC25
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
VDD1 VDD2 VDD3 VDD4 VDD5
VDDL
VSSDL
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSS1 VSS2 VSS3 VSS4 VSS5
1
DQB1_21
B9
DQB1_18
B1
DQB1_23
D9
DQB1_16
D1
DQB1_17
D3
DQB1_22
D7
DQB1_19
C2
DQ9
DQB1_20
C8
DQ8
DQB1_28
F9
DQ7
DQB1_26
F1
DQ6
DQB1_31
H9
DQ5
DQB1_24
H1
DQ4
DQB1_25
H3
DQ3
DQB1_30
H7
DQ2
DQB1_27
G2
DQ1
DQB1_29
G8
DQ0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A1 E1 J9 M9 R1
J1 J7
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
A3 E3 J3 N1 P9
B304
B304 220R_200mA
220R_200mA
C2309
C2309 100nF_6.3V
100nF_6.3V
+MVDD
+MVDD
C2310
C2310 1uF_6.3V
1uF_6.3V
+MVDD
C1550 1uF_6.3VC1550 1uF_6.3V
C1551 1uF_6.3VC1551 1uF_6.3V
C1476 1uF_6.3VC1476 1uF_6.3V
C1478 1uF_6.3VC1478 1uF_6.3V
MC1486 4.7uF_6.3VMC1486 4.7uF_6.3V
C1487 10uFC1487 10uF
C1477 1uF_6.3VC1477 1uF_6.3V
MC1487 4.7uF_6.3VMC1487 4.7uF_6.3V
+MVDD
DNI
+MVDD+MVDD
C1518 1uF_6.3VC1518 1uF_6.3V
C1559 1uF_6.3VC1559 1uF_6.3V
C1519 1uF_6.3VC1519 1uF_6.3V
C1556 1uF_6.3VC1556 1uF_6.3V
C1555 1uF_6.3VC1555 1uF_6.3V
+MVDD +MVDD
C1506 10uFC1506 10uF
MC1497 4.7uF_6.3VMC1497 4.7uF_6.3V
MC1506 4.7uF_6.3VMC1506 4.7uF_6.3V
C1497 10uFC1497 10uF
A A
Overlap cap pair foorprints (0805 with 0603)
5
C1536 1uF_6.3VC1536 1uF_6.3V
C1491 1uF_6.3VC1491 1uF_6.3V
C1502 1uF_6.3VC1502 1uF_6.3V
C1411 1uF_6.3VC1411 1uF_6.3V
C1531 1uF_6.3VC1531 1uF_6.3V
C1412 1uF_6.3VC1412 1uF_6.3V
C1413 1uF_6.3VC1413 1uF_6.3V
C1534 1uF_6.3VC1534 1uF_6.3V
C1414 1uF_6.3VC1414 1uF_6.3V
C1505 1uF_6.3VC1505 1uF_6.3V
C1520 1uF_6.3VC1520 1uF_6.3V
C1501 1uF_6.3VC1501 1uF_6.3V
+MVDD +MVDD +MVDD
C1409 1uF_6.3VC1409 1uF_6.3V
C1410 1uF_6.3VC1410 1uF_6.3V
C1401 1uF_6.3VC1401 1uF_6.3V
DNI DNI DNI
4
C1558 1uF_6.3VC1558 1uF_6.3V
C1560 1uF_6.3VC1560 1uF_6.3V
C1557 1uF_6.3VC1557 1uF_6.3V
C1503 10uFC1503 10uF
C1532 10uFC1532 10uF
MC1532 4.7uF_6.3VMC1532 4.7uF_6.3V
Overlap cap pair foorprints (0805 with 0603)
C1507 1uF_6.3VC1507 1uF_6.3V
MC1503 4.7uF_6.3VMC1503 4.7uF_6.3V
C1508 1uF_6.3VC1508 1uF_6.3V
C1522 1uF_6.3VC1522 1uF_6.3V
C1523 1uF_6.3VC1523 1uF_6.3V
C1492 1uF_6.3VC1492 1uF_6.3V
C1493 1uF_6.3VC1493 1uF_6.3V
C1416 1uF_6.3VC1416 1uF_6.3V
C1417 1uF_6.3VC1417 1uF_6.3V
C1415 1uF_6.3VC1415 1uF_6.3V
www.vinafix.vn
C1509 1uF_6.3VC1509 1uF_6.3V
C1418 1uF_6.3VC1418 1uF_6.3V
C1419 1uF_6.3VC1419 1uF_6.3V
C1510 1uF_6.3VC1510 1uF_6.3V
C1420 1uF_6.3VC1420 1uF_6.3V
C1511 1uF_6.3VC1511 1uF_6.3V
C1421 1uF_6.3VC1421 1uF_6.3V
C1499 1uF_6.3VC1499 1uF_6.3V
3
+MVDD
C1554 1uF_6.3VC1554 1uF_6.3V
C1553 1uF_6.3VC1553 1uF_6.3V
C1552 1uF_6.3VC1552 1uF_6.3V
+MVDD
C1504 10uFC1504 10uF
MC1504 4.7uF_6.3VMC1504 4.7uF_6.3V
Overlap cap pair foorprints (0805 with 0603)
C1528 10uFC1528 10uF
C1513 1uF_6.3VC1513 1uF_6.3V
MC1528 4.7uF_6.3VMC1528 4.7uF_6.3V
C1514 1uF_6.3VC1514 1uF_6.3V
C1526 1uF_6.3VC1526 1uF_6.3V
C1500 1uF_6.3VC1500 1uF_6.3V
C1422 1uF_6.3VC1422 1uF_6.3V
C1494 1uF_6.3VC1494 1uF_6.3V
C1423 1uF_6.3VC1423 1uF_6.3V
C1495 1uF_6.3VC1495 1uF_6.3V
C1424 1uF_6.3VC1424 1uF_6.3V
C1496 1uF_6.3VC1496 1uF_6.3V
C1425 1uF_6.3VC1425 1uF_6.3V
C1515 1uF_6.3VC1515 1uF_6.3V
C1426 1uF_6.3VC1426 1uF_6.3V
C1527 1uF_6.3VC1527 1uF_6.3V
C1428 1uF_6.3VC1428 1uF_6.3V
C1427 1uF_6.3VC1427 1uF_6.3V
C1516 1uF_6.3VC1516 1uF_6.3V
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. ?2007 Advanced Micro Devices
?2007 Advanced Micro Devices
?2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
2
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
C1549 1uF_6.3VC1549 1uF_6.3V
+MVDD
C1486 10uFC1486 10uF
Overlap cap pair foorprints (0805 with 0603)
C1482 1uF_6.3VC1482 1uF_6.3V
C1480 1uF_6.3VC1480 1uF_6.3V
C1479 1uF_6.3VC1479 1uF_6.3V
C1481 1uF_6.3VC1481 1uF_6.3V
C1403 1uF_6.3VC1403 1uF_6.3V
C1404 1uF_6.3VC1404 1uF_6.3V
C1406 1uF_6.3VC1406 1uF_6.3V
C1405 1uF_6.3VC1405 1uF_6.3V
C1402 1uF_6.3VC1402 1uF_6.3V
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc. 1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East Markham, Ontario
Markham, Ontario
Markham, Ontario
Monday, October 06, 2008
Monday, October 06, 2008
Monday, October 06, 2008
Sheet
Sheet
Sheet
of
519
of
519
of
519
1
C1483 1uF_6.3VC1483 1uF_6.3V
C1484 1uF_6.3VC1484 1uF_6.3V
C1407 1uF_6.3VC1407 1uF_6.3V
C1485 1uF_6.3VC1485 1uF_6.3V
C1408 1uF_6.3VC1408 1uF_6.3V
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B665xx-00A
105-B665xx-00A
105-B665xx-00A
5
(06) RV730 GPIOs Strap CF XTAL
U1E
+3.3V
C333
C333
C334
100nF_6.3V
100nF_6.3V
SCL<17> SDA<17>
R899
R899
5.1K
5.1K
C334 100nF_6.3V
100nF_6.3V
SCL SDA
DDC6CLK DDC6DATA
R898
R898
5.1K
5.1K
PWR_GOOD
GPIO_22_ROMCSb_R GPIO_8_R
C332
C332 100nF_6.3V
100nF_6.3V
D D
DDC6CLK<17>
DDC6DATA<17>
+3.3V_BUS +1.8V
PWR_GOOD<14,15,16>
C C
U1E
AF23
VDDR3#1
AF24
VDDR3#2
AG23
VDDR3#3
AG24
VDDR3#4
AK26
SCL
AJ26
SDA
AJ30
DDC6CLK
AJ31
DDC6DATA
AF28
RSVD#1
AF35
RSVD#2
AG28
RSVD#3
AG36
RSVD#4
AJ27
RSVD#5
AK27
RSVD#6
AL31
RSVD#7
AN36
RSVD#8
AP37
RSVD#9
AJ21
NC#1
AK21
NC#2
AH16
NC_PWRGOOD
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1
R180
R180 10K
10K
4
PART 5 OF 15
PART 5 OF 15
G
G P
P I
I O
O
GPIO_17_THERMAL_INT
U2
U2
1
CE#
VCC
2
SO
HOLD#
3
WP#
SCK
GND4SI
PM25LV512A-100SCE
PM25LV512A-100SCE
GPIO_0 GPIO_1 GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6_TACH GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11 GPIO_12 GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GENERICA
GENERICB GENERICC GENERICD
GENERICE_HPD4
GENERICF GENERICG
HPD1
+3.3V
8 7
GPIO_10_R
6
GPIO_9_R
5
3
GPIO_0
AH20
GPIO_1
AH18
GPIO_2
AN16
GPIO_3_SMBDATA
AH23
GPIO_4_SMBCLK
AJ23
GPIO_5
AH17
GPIO_6_TACH
AJ17
GPIO_7
AK17
GPIO_8
AJ13
GPIO_9
AH15
GPIO_10
AJ16
GPIO_11
AK16
GPIO_12
AL16
GPIO_13
AM16
HPD2
AM14
PWRCNTL_0
AM13
GPIO_16
AK14
GPIO_17_ThermINT
AG30
HPD3 GPIO_19_CTF PWRCNTL_1
HPD1
BIOS1
BIOS1
BIOS
BIOS
113-B339XX-XXX
113-B339XX-XXX
VIDEO BIOS FIRMWARE
R900 5.1KR900 5.1K
R901 33RR901 33R
AN14 AM17 AL13 AJ14
GPIO_22_ROMCSb GPIO_22_ROMCSb_R
AK13 AN13
AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24
AK24
C342
C342 100nF_6.3V
100nF_6.3V
GPIO_8_R
RP1C33R RP1C33R
63
GPIO_9_R
RP1B33R RP1B33R
72
GPIO_10_R
RP1A33R RP1A33R
81
DNI
GPIO_0 GPIO_1 GPIO_2
GPIO_3_SMBDATA <1>
GPIO_4_SMBCLK <1>
GPIO_6_TACH <16,17> GPIO_7 GPIO_8_R
GPIO_9_R GPIO_10_R
HPD2 <9> PWRCNTL_0 <15>
GPIO_17_ThermINT <17> GPIO_19_CTF <16>
PWRCNTL_1 <15>
HPD1 <8>
DNI
MR146 10KMR146 10K
DNI
MR148 10KMR148 10K
DNI
MR149 10KMR149 10K
DNI
MR152 10KMR152 10K
DNI
MR153 10KMR153 10K
DNI
MR157 10KMR157 10K
DNI
MR158 10KMR158 10K
DNI
MR159 10KMR159 10K
DNI
MR160 10KMR160 10K
DNI
MR161 10KMR161 10K
DNI
MR163 10KMR163 10K
DNI
MR165 10KMR165 10K
DNI
MR164 10KMR164 10K
DNI
MR173 10KMR173 10K
DNI
MR176 10KMR176 10K
2
R146 10KR146 10K
R148 10KR148 10K
R149 10KR149 10K
R152 10KR152 10K
R153 10KR153 10K
R157 10KR157 10K R158 10KR158 10K R159 10KR159 10K
R160 10KR160 10K
R161 10KR161 10K
R163 10KR163 10K
R165 10KR165 10K
R164 10KR164 10K
R173 10KR173 10K
R176 10KR176 10K
PIN BASED STRAPS
V2SYNC <7>
V2SYNC
GPIO_9_R
GPIO_0
GPIO_1
GPIO_2
GPIO_11 GPIO_13 GPIO_12
GPIO_12
V1SYNC <7>
V1SYNC
H1SYNC <7>
H1SYNC
GPIO_8_R
GPIO_5
GPIO_16
H2SYNC <7>
H2SYNC
GPIO_7
+3.3V
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
1
VIP_DEVICE_STRAP_EN 0: No slave VIP host port devices reporting presence during reset (use for configurations without video-in) 1:VIP host port devices present (use if Theater is populated)
VGA DISABLE : 1 for disable (set to 0 for normal operation)
GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable) 0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)
GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable) 0: Tx de-emphasis disabled for mobile mode 1: Tx de-emphasis enabled (Default setting for Desktop)
GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable) 0 : Default. (Driver Controlled Gen2) 1 : Strap Controlled Gen2
GPIO(11, 13,12) - CONFIG[2..0]
100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST)
CONFIG[2]
101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST)
CONFIG[1]
101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV512 (Chingis)
CONFIG[0]
101 - 1Mbit Pm25LV010 (Chingis)
AUD[0] : AUD strap bit 0
AUD[1] : AUD strap bit 1
BIF_CLK_PM_EN 0 - Disable CLKREQ# power management capability 1 - Enable CLKREQ# power management capability
MEMORY CONFIG [GPIO_5: GPIO_16] Quimonda [0:0] Hynix [0:1] Samsung [1:0]
RESERVED :Internal use only. Other logic must not affect this signal during RESET.
ATI Board Feature I
1 - NTSC TVO0 - PAL TVO TV OUT STANDARD
PN 2280007900G for 1Mbit (PM25LV010A-100SCE)
U1F
+1.8V
C331
C331
C335
C335
C326
1uF_6.3V
1uF_6.3V
C148
C148
1uF_6.3V
1uF_6.3V
C145
C145
1uF_6.3V
1uF_6.3V
C153
C153
1uF_6.3V
1uF_6.3V
C150
C150
1uF_6.3V
1uF_6.3V
C339
C339 1uF_6.3V
1uF_6.3V
C326 100nF_6.3V
100nF_6.3V
VREFG
C149
C149
100nF_6.3V
100nF_6.3V
C146
C146
100nF_6.3V
100nF_6.3V
C154
C154
100nF_6.3V
100nF_6.3V
C151
C151
100nF_6.3V
100nF_6.3V
C338
C338 100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
B B
+1.8V
R147 221RR147 221R R151 110RR151 110R C328 100nF_6.3VC328 100nF_6.3V
1 2
+DPLL_PVDD
+DPLL_VDDC
+SPV18
+SPV10
5
C147
C147
10uF_X6S
10uF_X6S
GND_DPLL_PVSS
C152
C152
10uF_X6S
10uF_X6S
GND_SPVSS
C337
C337 1uF_6.3V
1uF_6.3V
+1.8V
B110 BLM15BD121SN1B110 BLM15BD121SN1
NS6 NS_VIANS6 NS_VIA
1 2
+1.1V
B109 BLM15BD121SN1B109 BLM15BD121SN1
+1.8V
A A
B111 BLM15BD121SN1B111 BLM15BD121SN1
NS7 NS_VIANS7 NS_VIA
+1.1V
B108 BLM15BD121SN1B108 BLM15BD121SN1
+VDDC
B107 BLM15BD121SN1B107 BLM15BD121SN1
+1.8V +MPV18
B114 BLM15BD121SN1B114 BLM15BD121SN1
U1F
AD12
VDDR4#1
AF11
VDDR4#2
AF12
VDDR4#3
AG11
VDDR4#4
AF13
VDDR5#1
AF15
VDDR5#2
AG13
VDDR5#3
AG15
VDDR5#4
AR1
DVPCLK
AP8
DVPCNTL_0
AW8
DVPCNTL_1
AR3
DVPCNTL_2
AR8
DVPCNTL_MVP_0
AU8
DVPCNTL_MVP_1
AH13
VREFG
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1 U1G
U1G
AM32
DPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AM10
NC_SPV18
AN10
SPVSS
AN9
SPV10
H7
NC_MPV18#1
H8
NC_MPV18#2
C336
C336 10uF_X6S
10uF_X6S
RV730 GLXT A11 HF MVE SLT BIN1
RV730 GLXT A11 HF MVE SLT BIN1
PART 6 OF 15
PART 6 OF 15
PART 7 OF 15
PART 7 OF 15
P
P L
L L
L S
S
X
X T
T A
A L
L
4
D
D V
V P
P
DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8
DVPDATA_9 DVPDATA_10 DVPDATA_11
DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23
XTALOUT
XTALIN
CLKTESTA CLKTESTB
AU34
AV33
AK10 AL10
AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7
AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12
XTALOUT
R86 0RR86 0R
R_RTCLK
XTALIN
R81 182RR81 182R
Place R_RTCLK close to XTAL so the main clock line has shortest stub
R82
R82
221R
221R
CLKTESTA CLKTESTB
www.vinafix.vn
XTALOUT_S
27.000MHz_10PPM
R841MR84
1M
R250R R250R R230R R230R
27.000MHz_10PPM
XTALIN_S
3
Y82
Y82
3 2
12pF_50V
12pF_50V
21
12pF_50V
12pF_50V
OUT
TRISTATE
GND
100MHZ_1.8V
100MHZ_1.8V
C83
C83
C82
C82
Y1
Y1
4
VCC
1
PWR_GOOD
C80
C80 100nF_6.3V
100nF_6.3V
MB80 BLM15BD121SN1MB80 BLM15BD121SN1
B80 BLM15BD121SN1B80 BLM15BD121SN1
C81
C81
1uF_6.3V
1uF_6.3V
+1.8V
+3.3V_BUS
PWR_GOOD <14,15,16>
2
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC. ?2007 Advanced Micro Devices
?2007 Advanced Micro Devices
?2007 Advanced Micro Devices This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD,
This AMD Board schematic and design is the exclusive property of AMD, and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement
and is provided only to entities under a non-disclosure agreement with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure
with AMD for evaluation purposes. Further distribution or disclosure is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose
is strictly prohibited. Use of this schematic and design for any purpose other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement
other than evaluation requires a Board Technology License Agreement with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind
with AMD. AMD makes no representations or warranties of any kind regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to,
regarding this schematic and design, including, not limited to, any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular
any implied warranty of merchantibility or fitness for a particular purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting
purpose, and disclaims responsibility forany consequences resulting from use of the information included herein.
from use of the information included herein.
from use of the information included herein.
Title
Title
Title
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
RH RV730 512MB DDR2 DL-DVI DP HDMI FH 6'
Advanced Micro Devices Inc.
Advanced Micro Devices Inc.
Advanced Micro Devices Inc. 1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East Markham, Ontario
Markham, Ontario
Markham, Ontario
Sheet
Sheet
Sheet
Monday, October 06, 2008
Monday, October 06, 2008
Monday, October 06, 2008
of
619
of
619
of
619
1
Doc No.
Doc No.
Doc No.
RevDate:
RevDate:
RevDate:
0
0
0
105-B665xx-00A
105-B665xx-00A
105-B665xx-00A
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