MSI MS-V151 Schematic 10

8

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

+12V_BUS

+12V_BUS

C3

C3

D D

C C

B B

C2

150nF_16V

150nF_16V

150nF_16VC2150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

LF CAP CER 150NF 10% 16V X7R (0603)

+3.3V_BUS

CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK

C5
10uF_X6SC510uF_X6S

+3.3V_BUS

C7

C6

1uF_6.3VC71uF_6.3V

100nF_6.3VC6100nF_6.3V

Place these caps as close to the PCIE
connector as possible

C8
10nFC810nF

7

+3.3V

GPIO_4(7)

GPIO_3(7)

DNIDNI

TEST_EN_J

PETp10_GFXRp10(2)
PETn10_GFXRn10(2)

PETp11_GFXRp11(2)
PETn11_GFXRn11(2)

PETp12_GFXRp12(2)
PETn12_GFXRn12(2)

PETp13_GFXRp13(2)
PETn13_GFXRn13(2)

PETp14_GFXRp14(2)
PETn14_GFXRn14(2)

PETp15_GFXRp15(2)
PETn15_GFXRn15(2)

PETn0_GFXRn0(2)

PETp1_GFXRp1(2)
PETn1_GFXRn1(2)

PETp2_GFXRp2(2)
PETn2_GFXRn2(2)

PETp3_GFXRp3(2)
PETn3_GFXRn3(2)

PETp4_GFXRp4(2)
PETn4_GFXRn4(2)

PETp5_GFXRp5(2)
PETn5_GFXRn5(2)

PETp6_GFXRp6(2)
PETn6_GFXRn6(2)

PETp7_GFXRp7(2)
PETn7_GFXRn7(2)

PETp8_GFXRp8(2)
PETn8_GFXRn8(2)

PETp9_GFXRp9(2)
PETn9_GFXRn9(2)

+3.3V_BUS

R10RR1
0R

6

DNI , To Bypass U12

+3.3V_BUS

JTRST

PRESENCE

5

PCI-EXPRESS EDGE CONNECTOR

+12V_BUS

SMCLK
SMDAT

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+3.3V

+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

x16 PCIe

x16 PCIe

Mechanical Key

Mechanical Key

MPCIE1

MPCIE1

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

4

PRESENCE

+12V_BUS

JTCK
JTDI
JTDO
JTMS

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

+3.3V_BUS

TP1

TP1
35mil

35mil

TP2

TP2
35mil

35mil

TP5

TP5
35mil

35mil

TP3

TP3
35mil

35mil

3

No JTAG

R2 0RR2 0R

TEST_EN_J
JTRST

PCIE_REFCLKP (2)
PCIE_REFCLKN (2)PETp0_GFXRp0(2)

PERp0 (2)
PERn0 (2)

PERp1 (2)
PERn1 (2)

PERp2 (2)
PERn2 (2)

PERp3 (2)
PERn3 (2)

PERp4 (2)
PERn4 (2)

PERp5 (2)
PERn5 (2)

PERp6 (2)
PERn6 (2)

PERp7 (2)
PERn7 (2)

PERp8 (2)
PERn8 (2)

PERp9 (2)
PERn9 (2)

PERp10 (2)
PERn10 (2)

PERp11 (2)
PERn11 (2)

PERp12 (2)
PERn12 (2)

PERp13 (2)
PERn13 (2)

PERp14 (2)
PERn14 (2)

PERp15 (2)
PERn15 (2)

JTAG_TRSTB (7)

JTAG_TCK (7)

JTAG_TDI (7)
JTAG_TDO (7)
JTAG_TMS (7)

PERST#

TP4

TP4
35mil

35mil

2

JTAG_MODE

JTAG_MODE (7)

+3.3V_BUS

1
2

53

1

C4
100nF_6.3VC4100nF_6.3V

NC7SZ08P5X_NL

NC7SZ08P5X_NL

4

U11

U11

DNI

PERST#_buf (2,13)

Place R3 in U11

Table 1: Connection for JTAG

Production
(No JTAG)

Internal Use Only

TSW1, R1 & R2 are located on the bottom side of the board close to PCIE connector.

Install R1, R2 & Don't Install TSW1

Install TSW1 & Don't Install R1 & R2

TSW1 Switch #1, 2, 3, 4, 5 and 6 closed (ON)

JTAG

#8 and 7 open

TSW1 Switch #1, 2, 3, 4, 5 and 6 open

NO JTAG

#8 & 7 closed (ON)

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

8

7

6

5

4

3

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

121

of

121

of

121

GROUND

BUO BRING UP

ONLY

Doc No.

Doc No.

Doc No.

102-B50102-00

102-B50102-00

102-B50102-00

1

RevDate:

RevDate:

RevDate:

25

25

25

www.vinafix.vn

5

NOTE: some of the PCIE testpoints will
be available trought via on traces.

TP15TP15

TP8TP8

TP9TP9

TP16TP16

TP18TP18

TP12TP12

TP20TP20

TP21TP21

TP25TP25

TP27TP27

TP6TP6

TP13TP13

TP14TP14

TP7TP7

TP17TP17

TP10TP10

TP11TP11

TP19TP19

TP22TP22

TP23TP23

TP24TP24

TP26TP26

D D

PETp0_GFXRp0(1)
PETn0_GFXRn0(1)

PETp1_GFXRp1(1)
PETn1_GFXRn1(1)

PETp2_GFXRp2(1)
PETn2_GFXRn2(1)

PETp3_GFXRp3(1)
PETn3_GFXRn3(1)

PETp4_GFXRp4(1)
PETn4_GFXRn4(1)

PETp5_GFXRp5(1)
PETn5_GFXRn5(1)

PETp6_GFXRp6(1)
PETn6_GFXRn6(1)

PETp7_GFXRp7(1)
PETn7_GFXRn7(1)

PETp8_GFXRp8(1)

PETp9_GFXRp9(1)
PETn9_GFXRn9(1)

PETp10_GFXRp10(1)
PETn10_GFXRn10(1)

PETp11_GFXRp11(1)
PETn11_GFXRn11(1)

PETp12_GFXRp12(1)

C C

PCIE_REFCLKP(1)
PCIE_REFCLKN(1)

PETn12_GFXRn12(1)
PETp13_GFXRp13(1)

PETn13_GFXRn13(1)
PETp14_GFXRp14(1)

PETn14_GFXRn14(1)
PETp15_GFXRp15(1)

PETn15_GFXRn15(1)

+PCIE_VDDC

+1.1V +PCIE_VDDC

B B

26R_600mA

26R_600mA

A A

B21220R_2A B21220R_2A

10uF_X6S

10uF_X6S

+PCIE_VDDR+1.8V

B23

B23

C95

C95

C94

C94

1uF_6.3V

1uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

C88

C88

C51

C51

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C96

C96

C97

C97

1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

5

C89

C89

C98

C98

1uF_6.3V

1uF_6.3V

C90

C90

1uF_6.3V

1uF_6.3V

C99

C99

1uF_6.3V

1uF_6.3V

C91

C91

1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

C100

C100

C92

C92

1uF_6.3V

1uF_6.3V

C101

C101

1uF_6.3V

1uF_6.3V

C93

C93

1uF_6.3V

1uF_6.3V

4

R22 1.27KR22 1.27K

R24

R24

4

3

U1A

U1A

AM48

PCIE_RX0P

AL49

PCIE_RX0N

AL51

PCIE_RX1P

AK52

PCIE_RX1N

AK48

PCIE_RX2P

AJ49

PCIE_RX2N

AJ51

PCIE_RX3P

AH52

PCIE_RX3N

AH48

PCIE_RX4P

AG49

PCIE_RX4N

AG51

PCIE_RX5P

AF52

PCIE_RX5N

AF48

PCIE_RX6P

AE49

PCIE_RX6N

AE51

PCIE_RX7P

AD52

PCIE_RX7N

AD48

PCIE_RX8P

AC49

PCIE_RX8N

AC51

PCIE_RX9P

AB52

PCIE_RX9N

AB48

PCIE_RX10P

AA49

PCIE_RX10N

AA51

PCIE_RX11P

Y52

PCIE_RX11N

Y48

PCIE_RX12P

W49

PCIE_RX12N

W51

PCIE_RX13P

V52

PCIE_RX13N

V48

PCIE_RX14P

U49

PCIE_RX14N

U51

PCIE_RX15P

T52

PCIE_RX15N

AM45

PCIE_REFCLKP

AM44

PCIE_REFCLKN

AF39

PCIE_CALRP

AF38

AF37
AA38
AA39
AB37
AB38
AB39
AD37
AD38
AD39
AE37
AE38
AE39

W38

W39

W40

W41

W42

W43

W44

W45
AM40

AJ38

AJ39
AH37
AK38
AK39

AJ37
AK37
AM37
AM38
AM39
AN37
AN38
AN39
AR39
AR40

AA40
AA43
AA47
AB50
AB40
AB43
AC53
AC47
AD50
AD40
AD43
AE53
AE40
AE43
AE47

AF50

AF40

AF43
AG53
AG47

PCIE_CALRN

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
PCIE_VDDC#13
PCIE_VDDC#14
PCIE_VDDC#15
PCIE_VDDC#16
PCIE_VDDC#17
PCIE_VDDC#18
PCIE_VDDC#19
PCIE_VDDC#20

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDR#9
PCIE_VDDR#10
PCIE_VDDR#11
PCIE_VDDR#12
PCIE_VDDR#13
PCIE_VDDR#14
PCIE_VDDR#15
PCIE_VDDR#16

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20

2.0K

2.0K

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

PERSTB

PCIE_PVDD

PCIE_VSS#21

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
PCIE_VSS#36
PCIE_VSS#37
PCIE_VSS#38
PCIE_VSS#39
PCIE_VSS#40
PCIE_VSS#41
PCIE_VSS#42
PCIE_VSS#43
PCIE_VSS#44
PCIE_VSS#45
PCIE_VSS#46
PCIE_VSS#47
PCIE_VSS#48
PCIE_VSS#49
PCIE_VSS#50
PCIE_VSS#51
PCIE_VSS#52
PCIE_VSS#53
PCIE_VSS#54
PCIE_VSS#55
PCIE_VSS#56
PCIE_VSS#57
PCIE_VSS#58
PCIE_VSS#59
PCIE_VSS#60
PCIE_VSS#61
PCIE_VSS#62
PCIE_VSS#63
PCIE_VSS#64
PCIE_VSS#65
PCIE_VSS#66
PCIE_VSS#67
PCIE_VSS#68
PCIE_VSS#69
PCIE_VSS#70
PCIE_VSS#71
PCIE_VSS#72
PCIE_VSS#73
PCIE_VSS#74
PCIE_VSS#75
PCIE_VSS#76
PCIE_VSS#77
PCIE_VSS#78
PCIE_VSS#79
PCIE_VSS#80
PCIE_VSS#81
PCIE_VSS#82

AK45
AK44

AK42
AK41

AJ45
AJ44

AJ42
AJ41

AH45
AH44

AH42
AH41

AF45
AF44

AF42
AF41

AE45
AE44

AE42
AE41

AD45
AD44

AD42
AD41

AB45
AB44

AB42
AB41

AA45
AA44

AA42
AA41

AT39
AR37

AH50
AH40
AH43
AJ53
AJ40
AJ43
AJ47
AK50
AK40
AK43
AL53
AL47
AM50
AA53
AM43
AN53
AN40
AN43
AN47
AP50
AR53
Y50
AR43
AR47
AT50
AT40
AT43
AU53
AU40
AU43
AU47
AV50
AW53
AW40
AW43
AW47
AY50
AY40
AY43
BA53
BA47
BB50
BB43
BC53
BB42
BC47
BD50
BD44
BD45
BF53
BE47
BF50
BJ53
BL45
BN46
W47
BN49
T50
U53
U47
V50
W53

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

C57

C57

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C58

C58

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

PERST#_buf (1,13)

C85

C85

C84

C84

100nF_6.3V

100nF_6.3V

10nF

10nF

3

C52

C52

C59

C59
100nF_6.3V

100nF_6.3V

C60

C60

C61

C61
100nF_6.3V

100nF_6.3V

C62

C62

C53

C53
100nF_6.3V

100nF_6.3V

C54

C54

C63

C63
100nF_6.3V

100nF_6.3V

C64

C64

C65

C65
100nF_6.3V

100nF_6.3V

C55

C55

C66

C66
100nF_6.3V

100nF_6.3V

C67

C67

C68

C68
100nF_6.3V

100nF_6.3V

C69

C69

C70

C70
100nF_6.3V

100nF_6.3V

C71

C71

C56

C56
100nF_6.3V

100nF_6.3V

C72

C72

C73

C73
100nF_6.3V

100nF_6.3V

C74

C74

C75

C75
100nF_6.3V

100nF_6.3V

C76

C76

C77

C77
100nF_6.3V

100nF_6.3V

C78

C78

C79

C79
100nF_6.3V

100nF_6.3V

C80

C80

C81

C81
100nF_6.3V

100nF_6.3V

C82

C82

C83

C83
100nF_6.3V

100nF_6.3V

+PCIE_PVDD +1.8V

C86

C86
10uF_X6S

10uF_X6S

C87

C87
1uF_6.3V

1uF_6.3V

PERp0 (1)
PERn0 (1)

PERp1 (1)
PERn1 (1)

PERp2 (1)
PERn2 (1)

PERp3 (1)
PERn3 (1)

PERp4 (1)
PERn4 (1)

PERp5 (1)
PERn5 (1)

PERp6 (1)
PERn6 (1)

PERp7 (1)
PERn7 (1)

PERp8 (1)
PERn8 (1)PETn8_GFXRn8(1)

PERp9 (1)
PERn9 (1)

PERp10 (1)
PERn10 (1)

PERp11 (1)
PERn11 (1)

PERp12 (1)
PERn12 (1)

PERp13 (1)
PERn13 (1)

PERp14 (1)
PERn14 (1)

PERp15 (1)
PERn15 (1)

BLM15BD121SN1

BLM15BD121SN1

B22

B22

2

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Sheet

Sheet

Sheet

1

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

of

221

of

221

of

221

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

4

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

3

2

32

Q102

Q102

SI2304DS

SI2304DS

LVT_EN(13)

1

R183499RR183499R

R184499RR184499R

R185499RR185499R

R186499RR186499R

R187499RR187499R

R188499RR188499R

R189499RR189499R

R190499RR190499R

R191499RR191499R

R192499RR192499R

R193499RR193499R

R194499RR194499R

R195499RR195499R

1

R196499RR196499R

D D

Q101

Q101

+1.8V

SI2304DS

SI2304DS

+DPA_PVDD

MC3

MC3

+T2PVDD

BLM15BD121SN1

BLM15BD121SN1

B123

B123

NS5NS_VIA NS5NS_VIA

10uF_X6S

10uF_X6S

C143

C143

1uF_6.3V

1uF_6.3V

C147

C147

1

OSC_EN(14)

LVT_EN(13)

C C

+1.8V

BLM15BD121SN1

BLM15BD121SN1

B103

B103

NS1

NS1

NS_VIA

NS_VIA

4.7uF_6.3V

4.7uF_6.3V

1 2

BLM15BD121SN1

BLM15BD121SN1

+1.8V

B105

B105

NS3

NS3

NS_VIA

NS_VIA

1 2

GND_T2PVSS

+1.8V

B B

BLM15BD121SN1

BLM15BD121SN1

+1.8V

B108

B108

BLM15BD121SN1

BLM15BD121SN1

+1.1V

B109

B109

BLM15BD121SN1

BLM15BD121SN1

+1.8V

B110

B110

1 2

A A

BLM15BD121SN1

BLM15BD121SN1

+1.8V

+3.3V_BUS

Install B118 & DNI
B111 for 1.8V
Oscillators

B118

B118

1 2

GND_A2VSSQ

+DPLL_PVDD

NS6NS_VIA NS6NS_VIA

GND_DPLL_PVDD

C150

C150
1uF_6.3V

1uF_6.3V

+A2VDDQ

C151

C151
100nF_6.3V

100nF_6.3V

+1.1V

32

10R_1A_0402

10R_1A_0402

Overlap footprints

1uF_6.3V

1uF_6.3V

C132

C132

10uF_X6S

10uF_X6S

+VDD1DI

1 2

+3.3V

100nF_6.3V

100nF_6.3V

C145

C145

1uF_6.3V

1uF_6.3V

C148

C148

1uF_6.3V

1uF_6.3V

OSC_EN

10R_1A_0402

10R_1A_0402

B102

B102

Use 0R

C126

C126

C133

C133
1uF_6.3V

1uF_6.3V

+1.8V

BLM15BD121SN1

BLM15BD121SN1

C144

C144

4
1

B100

B100

Overlap footprints

MC122

MC122

4.7uF_6.3V

4.7uF_6.3V

C127

C127

100nF

100nF

BLM15BD121SN1

BLM15BD121SN1

B115

B115

NS10NS_VIA NS10NS_VIA

1uF_6.3V

1uF_6.3V

GND_VSS1DI

B106

B106

4.7uF_6.3V

4.7uF_6.3V

+1.8V

C146

C146

100nF_6.3V

100nF_6.3V

C149

C149

100nF_6.3V

100nF_6.3V

Y1

Y1

VCC
TRISTATE

100MHZ_1.8V

100MHZ_1.8V

+DPA_VDDR

GND_DPAVSS

C134

C134

100nF_6.3V

100nF_6.3V

+AVDD

NS9NS_VIA NS9NS_VIA

1 2

C371

C371

100nF_6.3V

100nF_6.3V

+A2VDD

C136

C136

BLM15BD121SN1

BLM15BD121SN1

B107

B107

3

OUT

2

GND

Overlap footprints

MC50

MC50

4.7uF_6.3V

4.7uF_6.3V

C111

C111

1uF_6.3V

1uF_6.3V

C369

C369

C368

C368

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

GND_AVSSQ

C372

C372

C373

C373

10nF

10nF

C137

C137

1uF_6.3V

1uF_6.3V

+VDD2DI

100nF_6.3V

100nF_6.3V

1 2

GND_A2VSSQ

C138

C138

NS4NS_VIA NS4NS_VIA

Crystal Option

Place holder only

Install 0R for 1.8V Osillators

R112 0RR112 0R

DNI for

1.8V
Osillators

+T2XVDDC

C140

C140

1uF_6.3V

1uF_6.3V

GND_VSS2DI

1uF_6.3V

1uF_6.3V

C370

C370

10nF

10nF

C139

C139

10nF

10nF

C104

C104

GND_AVSSQ

100nF_6.3V

100nF_6.3V

XTAL1XTAL2

C141

C141

C117

C117

100nF

100nF

R109150R R109150R

R110 499RR110 499R

GND_A2VSSQ

R111715R R111715R

XTALIN

DP_CALR

C142

C142

10nF

10nF

R2SETGND_A2VSSQ

XTALOUT

TP28TP28

Oscillator Option

5

4

U1B

U1B

BD29

DPAVDDR#1

BE29

DPAVDDR#2

BG25

DPAVSSR#1

BN27

DPAVSSR#2

BN25

DPAVSSR#3

BG27

DPAVSSR#4

BK26

DPAVSSR#5

BK28

DPAVSSR#6

BM24

DPAVSSR#7

BD30

DPBVDDR#1

BE30

DPBVDDR#2

BK32

DPBVSSR#1

BG31

DPBVSSR#2

BN29

DPBVSSR#3

BN31

DPBVSSR#4

BH32

DPBVSSR#5

BK30

DPBVSSR#6

BG29

DPBVSSR#7

BG37

T2XVDDC#1

BK38

T2XVDDC#2

BK44

T2VXDDC#3

BM44

T2XVDDC#4

BG35

T2XVSSR#1

BN41

T2XVSSR#2

BM34

T2XVSSR#3

BG39

T2XVSSR#4

BK36

T2XVSSR#5

BJ43

T2XVSSR#6

BN43

T2XVSSR#7

BK40

T2XVSSR#8

BN35

T2XVSSR#9

BN37

T2XVSSR#10

BN39

T2XVSSR#11

BG41

T2XVSSR#12

BH42

T2XVSSR#13

BE26

DPA_PVDD

BD26

DPA_PVSS

BE28

DPB_PVDD

BD28

DPB_PVSS

BC29

DP_CALR

BN33

T2PVDD

BL33

T2PVSS

BC40

AVDD

RV770 PRO A12 HF MVE SLT BIN1

BB40

BG45

BE44

BA40

BD39
BC39

BD43

BE43

BB39
BE39

BD33
BG33

BE33
AV37
BH44

BJ45

RV770 PRO A12 HF MVE SLT BIN1

AVSSQ

VDD1DI

VSS1DI

RSET

A2VDD
A2VSSQ

VDD2DI

VSS2DI

R2SET
A2VDDQ

DPLL_VDDC
DPLL_PVDD

DPLL_PVSS
PLLTEST
XTALIN

XTALOUT

Multi footprint with MY1

TX0P_DPA2P
TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N
TX2P_DPA0P

TX2M_DPA0N

TXCAP_DPA3P
TXCAM_DPA3N

TX3P_DPB2P
TX3M_DPB2N

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

TXCBP_DPB3P
TXCBM_DPB3N

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP
DDC4CLK_DP4_AUXP

DDC4DATA_DP4_AUXN

3

T2X0P
T2X0M

T2X1P
T2X1M

T2X2P
T2X2M

T2X3P
T2X3M

T2XCLKP
T2XCLKM

T2X4P
T2X4M

T2X5P
T2X5M

NC#1
NC#2

NC#3
NC#4

NC#5
NC#6

HPD1

HSYNC
VSYNC

H2SYNC
V2SYNC

COMP

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

TX0P

BM26

TX0M

BL25

TX1P

BJ27

TX1M

BH26

TX2P

BM28

TX2M

BL27

TXCAP

BJ25

TXCAM

BK24

TX3P

BM30

TX3M

BL29

TX4P

BJ31

TX4M

BH30

TX5P

BM32

TX5M

BL31
BJ29

BH28

BJ35
BH34

BM36
BL35

BJ37
BH36

BM38
BL37

BK34
BJ33

BM40
BL39

BJ41
BH40

BM42
BL41

BL43
BK42

BJ39
BH38

AW39
BC42

R

BC43

Rb

BD42

G

BE42

Gb

BE40

B

BD40

Bb

AY39
BA39

BC37

R2

BC36

R2b

BD37

G2

BE37

G2b

BE36

B2

BD36

B2b

AY37
AW37

BB36
BA37

Y

BB37

C

BC32

SCL

BB32

SDA

AU37
AU38

AY36
BA36

BB28
BC28

BB26
BC26

XTAL1XTAL2

T2X0P
T2X0M

T2X1P
T2X1M

T2X2P
T2X2M

T2X3P

T2X3M

T2XCP
T2XCM

T2X4P

T2X4M

T2X5P

T2X5M

HPD1 (16)

Place close to Connector

C115 100nF_6.3VC115 100nF_6.3V

C116 100nF_6.3VC116 100nF_6.3V

C105 100nF_6.3VC105 100nF_6.3V

C121 100nF_6.3VC121 100nF_6.3V

C107 100nF_6.3VC107 100nF_6.3V

C119 100nF_6.3VC119 100nF_6.3V

C109 100nF_6.3VC109 100nF_6.3V

Place close to ASIC (DNI)

SCL (7)
SDA (7)

DDC3DATA (16)
DDC3CLK (16)

DDC4CLK (15)
DDC4DATA (15)

C102 100nF_6.3VC102 100nF_6.3V

C103 100nF_6.3VC103 100nF_6.3V

C106 100nF_6.3VC106 100nF_6.3V

C110 100nF_6.3VC110 100nF_6.3V

C118 100nF_6.3VC118 100nF_6.3V

C108 100nF_6.3VC108 100nF_6.3V

C120 100nF_6.3VC120 100nF_6.3V

A_DAC1_R (15)
A_DAC1_RB (15)

A_DAC1_G (15)
A_DAC1_GB (15)

A_DAC1_B (15)
A_DAC1_BB (15)

HSYNC1 (7,15)
VSYNC1 (7,15)

A_DAC2_R (16)
A_DAC2_RB (16)

A_DAC2_G (16)
A_DAC2_GB (16)

A_DAC2_B (16)
A_DAC2_BB (16)

HSYNC2 (7,16)
VSYNC2 (7,16)

A_DAC2_COMP (17)
A_DAC2_Y (17)
A_DAC2_C (17)

2

T2X0P (15)
T2X0M (15)

T2X1P (15)
T2X1M (15)

T2X2P (15)
T2X2M (15)

T2X3P (15)
T2X3M (15)

T2XCP (15)
T2XCM (15)

T2X4P (15)
T2X4M (15)

T2X5P (15)
T2X5M (15)

+3.3V

R115

R115

R114

R114

4.7K

4.7K

4.7K

4.7K

DDC2CLK (13,18)
DDC2DATA (13,18)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Sheet

Sheet

Sheet

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

of

321

of

321

of

321

1

Doc No.

Doc No.

Doc No.

T1X0P (16)
T1X0M (16)

T1X1P (16)
T1X1M (16)

T1X2P (16)
T1X2M (16)

T1XCP (16)
T1XCM (16)

T1X3P (16)
T1X3M (16)

T1X4P (16)
T1X4M (16)

T1X5P (16)
T1X5M (16)

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15
VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
VDDCI#23
VDDCI#24
VDDCI#25
VDDCI#26
VDDCI#27
VDDCI#28
VDDCI#29
VDDCI#30

VDDCT#1
VDDCT#2
VDDCT#3
VDDCT#4

C251

C251
1uF_6.3V

1uF_6.3V

SPVDD
SPVSS

C221

C221
1uF_6.3V

1uF_6.3V

C241

C241
1uF_6.3V

1uF_6.3V

C231

C231
1uF_6.3V

1uF_6.3V

C252

C252
1uF_6.3V

1uF_6.3V

5

AA17
AB17
AD17
AE17
AF17
AH17
AJ17
AK17
AR17
AT17
AU17
AU18
AU19
U17
U19
U21
U22
U24
U25
U26
U28
U29
U30
U35
U36
U37
V37
W37
W17
AA37

AV22
AU21
AV21
AV19

AT37
AT38

C222

C222
1uF_6.3V

1uF_6.3V

C242

C242
1uF_6.3V

1uF_6.3V

C232

C232
1uF_6.3V

1uF_6.3V

C253

C253
1uF_6.3V

1uF_6.3V

C186

C186
100nF_6.3V

100nF_6.3V

GND_SPVDD

C223

C223
1uF_6.3V

1uF_6.3V

C243

C243
1uF_6.3V

1uF_6.3V

C254

C254
1uF_6.3V

1uF_6.3V

C233

C233
1uF_6.3V

1uF_6.3V

C343

C343
1uF_6.3V

1uF_6.3V

C353

C353
1uF_6.3V

1uF_6.3V

C354

C354
1uF_6.3V

1uF_6.3V

C349

C349
1uF_6.3V

1uF_6.3V

C361

C361
1uF_6.3V

1uF_6.3V

C244

C244
1uF_6.3V

1uF_6.3V

C187

C187
100nF_6.3V

100nF_6.3V

C224

C224
1uF_6.3V

1uF_6.3V

C234

C234
1uF_6.3V

1uF_6.3V

C255

C255
1uF_6.3V

1uF_6.3V

C344

C344
1uF_6.3V

1uF_6.3V

C352

C352
1uF_6.3V

1uF_6.3V

C355

C355
1uF_6.3V

1uF_6.3V

C357

C357
1uF_6.3V

1uF_6.3V

C350

C350
1uF_6.3V

1uF_6.3V

C245

C245
1uF_6.3V

1uF_6.3V

C188

C188
1uF_6.3V

1uF_6.3V

C363

C363
1uF_6.3V

1uF_6.3V

C225

C225
1uF_6.3V

1uF_6.3V

C256

C256
1uF_6.3V

1uF_6.3V

C235

C235
1uF_6.3V

1uF_6.3V

C246

C246
1uF_6.3V

1uF_6.3V

C345

C345
1uF_6.3V

1uF_6.3V

C347

C347
1uF_6.3V

1uF_6.3V

C346

C346
1uF_6.3V

1uF_6.3V

C359

C359
1uF_6.3V

1uF_6.3V

C362

C362
1uF_6.3V

1uF_6.3V

C189

C189
1uF_6.3V

1uF_6.3V

C226

C226
1uF_6.3V

1uF_6.3V

C257

C257
1uF_6.3V

1uF_6.3V

C236

C236
1uF_6.3V

1uF_6.3V

C247

C247
1uF_6.3V

1uF_6.3V

B112

B112

BLM15BD121SN1

BLM15BD121SN1

+SPVDD +VDDC

C364

C364
100nF_6.3V

100nF_6.3V

NS_VIA

NS_VIA
NS701

NS701

C227

C227
1uF_6.3V

1uF_6.3V

C237

C237
1uF_6.3V

1uF_6.3V

C248

C248
1uF_6.3V

1uF_6.3V

C258

C258
1uF_6.3V

1uF_6.3V

U1G

U1G

AA12

VDDR1#1

AB9

VDDR1#2

AD12

VDDR1#3

AE9

VDDR1#4

AE15

VDDR1#5

AB15

VDDR1#6

AH9

VDDR1#7

AH15

VDDR1#8

AJ12

VDDR1#9

AK15

VDDR1#10

AK9

VDDR1#11

AM12

VDDR1#12

AN15

VDDR1#13

AN9

VDDR1#14

AR12

VDDR1#15

AT15

D D

C C

B B

AU12

AW9
AW14
BB14
BE18
BC10
AW18
BE11
BE15
BB17

W15

AT9

K11
J14
J17
J30
J33
J36
J19
J22
J25
J28
J39
K43
L45
L10
L15
M18
M21
M24
R22
M29
M32
M35
M37
P14
P17
R19
R25
R28
R30
R33
R36
P39
P42

P9
R11
R45
U14
U42

U9
V12
V39
V45

W9

VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
VDDR1#35
VDDR1#36
VDDR1#37
VDDR1#38
VDDR1#39
VDDR1#40
VDDR1#41
VDDR1#42
VDDR1#43
VDDR1#44
VDDR1#45
VDDR1#46
VDDR1#47
VDDR1#48
VDDR1#49
VDDR1#50
VDDR1#51
VDDR1#52
VDDR1#53
VDDR1#54
VDDR1#55
VDDR1#56
VDDR1#57
VDDR1#58
VDDR1#59
VDDR1#60
VDDR1#61
VDDR1#62
VDDR1#63
VDDR1#64
VDDR1#65
VDDR1#66
VDDR1#67
VDDR1#68
VDDR1#69
VDDR1#70
VDDR1#71

C219

C219
1uF_6.3V

1uF_6.3V

C229

C229
1uF_6.3V

1uF_6.3V

C239

C239
1uF_6.3V

1uF_6.3V

C250

C250
1uF_6.3V

1uF_6.3V

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

C220

C220
1uF_6.3V

1uF_6.3V

C230

C230
1uF_6.3V

1uF_6.3V

C240

C240
1uF_6.3V

1uF_6.3V

C348

C348
10uF_6.3V

10uF_6.3V

C360

C360
10uF_6.3V

10uF_6.3V

C356

C356
10uF_6.3V

10uF_6.3V

C358

C358
10uF_6.3V

10uF_6.3V

C351

C351
10uF_6.3V

10uF_6.3V

+1.8V+VDD_CT

B122

B122

BLM15BD121SN1

BLM15BD121SN1

12

+MVDD

C228

C228
1uF_6.3V

1uF_6.3V

C238

C238
1uF_6.3V

1uF_6.3V

C259

C259
1uF_6.3V

1uF_6.3V

C249

C249
1uF_6.3V

1uF_6.3V

4

C374

C374
10uF_6.3V

10uF_6.3V

C375

C375
10uF_6.3V

10uF_6.3V

C376

C376
10uF_6.3V

10uF_6.3V

+VDDC

3

U1I

U1I

G39

VSSM#101

G41

VSSM#102

G43

VSSM#103

G45

VSSM#104

G9

VSSM#105

H1

VSSM#106

J47

VSSM#107

H53

VSSM#108

J7

VSSM#109

J11

VSSM#110

K2

VSSM#111

L40

VSSM#112

K14

VSSM#113

K17

VSSM#114

K19

VSSM#115

K22

VSSM#116

K25

VSSM#117

K28

VSSM#118

K30

VSSM#119

K33

VSSM#120

K36

VSSM#121

K39

VSSM#122

L47

VSSM#123

K52

VSSM#124

L7

VSSM#125

P2

VSSM#126

M2

VSSM#127

M43

VSSM#128

M52

VSSM#129

L9

VSSM#130

R15

VSSM#131

N18

VSSM#132

N21

VSSM#133

N24

VSSM#134

N26

VSSM#135

N29

VSSM#136

N32

VSSM#137

N35

VSSM#138

N37

VSSM#139

N40

VSSM#140

N47

VSSM#141

N7

VSSM#142

P10

VSSM#143

P41

VSSM#144

R53

VSSM#145

R12

VSSM#146

M15

VSSM#147

R17

VSSM#148

T19

VSSM#149

T22

VSSM#150

T25

VSSM#151

T28

VSSM#152

T30

VSSM#153

T33

VSSM#154

T36

VSSM#155

R44

VSSM#156

R47

VSSM#157

R7

VSSM#158

T2

VSSM#159

T48

VSSM#160

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

U10

VSSM#161

U15

VSSM#162

U41

VSSM#163

U7

VSSM#164

V13

VSSM#165

V38

VSSM#166

V44

VSSM#167

V2

VSSM#168

W10

VSSM#169

W16

VSSM#170

W7

VSSM#171

Y2

VSSM#172

VSSM#1
VSSM#2
VSSM#3
VSSM#4
VSSM#5
VSSM#6
VSSM#7
VSSM#8

VSSM#9
VSSM#10
VSSM#11
VSSM#12
VSSM#13
VSSM#14
VSSM#15
VSSM#16
VSSM#17
VSSM#18
VSSM#19
VSSM#20
VSSM#21
VSSM#22
VSSM#23
VSSM#24
VSSM#25
VSSM#26
VSSM#27
VSSM#28
VSSM#29
VSSM#30
VSSM#31
VSSM#32
VSSM#33
VSSM#34
VSSM#35
VSSM#36
VSSM#37
VSSM#38
VSSM#39
VSSM#40
VSSM#41
VSSM#42
VSSM#43
VSSM#44
VSSM#45
VSSM#46
VSSM#47
VSSM#48
VSSM#49
VSSM#50
VSSM#51
VSSM#52
VSSM#53
VSSM#54
VSSM#55
VSSM#56
VSSM#57
VSSM#58
VSSM#59
VSSM#60
VSSM#61
VSSM#62
VSSM#63
VSSM#64
VSSM#65
VSSM#66
VSSM#67
VSSM#68
VSSM#69
VSSM#70
VSSM#71
VSSM#72
VSSM#73
VSSM#74
VSSM#75
VSSM#76
VSSM#77
VSSM#78
VSSM#79
VSSM#80
VSSM#81
VSSM#82
VSSM#83
VSSM#84
VSSM#85
VSSM#86
VSSM#87
VSSM#88
VSSM#89
VSSM#90
VSSM#91
VSSM#92
VSSM#93
VSSM#94
VSSM#95
VSSM#96
VSSM#97
VSSM#98
VSSM#99

VSSM#100

B14
B18
B22
A39
A49
A5
AA13
AA7
AB10
AB16
AB2
AC7
AD13
AD2
AE10
AE16
AE7
AF13
AF2
AG7
AH10
AH16
AH2
AJ13
AJ7
AK10
AK16
AK2
AL7
AM13
AM2
AN1
AN10
AN16
AN7
AR13
AR7
AT10
AT16
AT2
AU13
AU7
AW1
AW10
AW7
AY13
AY2
B10
B16
B26
B30
A33
B42
BA14
BA17
BA7
AY11
AV18
BB2
BD15
BD18
BC7
BC12
BD2
BE7
BG11
BG13
BG15
BG9
BJ1
BM12
BN8
BN15
BM10
BN5
B12
B20
B24
B28
B32
B36
B40
B44
A8
E1
E53
G11
G13
G15
G17
G19
G21
G23
G25
G27
G29
G31
G33
G35
G37

AA20
AA23
AA25
AA28
AA30
AA33
AA35
AC19
AC21
AC24
AC26
AC29
AC31
AC34
AD20
AD23
AD25
AD28
AD30
AD33
AD35
AE19
AE21
AE24
AE26
AE29
AE31
AE34
AF20
AF23
AF25
AF28
AF30
AF33
AF35
AH19
AH21
AH24
AH26
AH29
AH31
AH34

AK19
AK21
AK24
AK26
AK29
AK31
AK34

AN19
AN21
AN24
AN26
AN29
AN31
AN34
AP20
AP23
AP25
AP28
AP30
AP33
AR21
AR24
AR26
AR29
AR31
AR34

AP35

AJ20
AJ23
AJ25
AJ28
AJ30
AJ33
AJ35

AL20
AL23
AL25
AL28
AL30
AL33
AL35

VSSC#1
VSSC#2
VSSC#3
VSSC#4
VSSC#5
VSSC#6
VSSC#7
VSSC#8
VSSC#9
VSSC#10
VSSC#11
VSSC#12
VSSC#13
VSSC#14
VSSC#15
VSSC#16
VSSC#17
VSSC#18
VSSC#19
VSSC#20
VSSC#21
VSSC#22
VSSC#23
VSSC#24
VSSC#25
VSSC#26
VSSC#27
VSSC#28
VSSC#29
VSSC#30
VSSC#31
VSSC#32
VSSC#33
VSSC#34
VSSC#35
VSSC#36
VSSC#37
VSSC#38
VSSC#39
VSSC#40
VSSC#41
VSSC#42
VSSC#43
VSSC#44
VSSC#45
VSSC#46
VSSC#47
VSSC#48
VSSC#49
VSSC#50
VSSC#51
VSSC#52
VSSC#53
VSSC#54
VSSC#55
VSSC#56
VSSC#57
VSSC#58
VSSC#59
VSSC#60
VSSC#61
VSSC#62
VSSC#63
VSSC#64
VSSC#65
VSSC#66
VSSC#67
VSSC#68
VSSC#69
VSSC#70
VSSC#71
VSSC#72
VSSC#73
VSSC#74
VSSC#75
VSSC#76
VSSC#77
VSSC#78
VSSC#79
VSSC#80
VSSC#81
VSSC#82

W20

VSSC#83

W23

VSSC#84

W25

VSSC#85

W28

VSSC#86

W30

VSSC#87

W33

VSSC#88

W35

VSSC#89

Y19

VSSC#90

Y21

VSSC#91

Y24

VSSC#92

Y26

VSSC#93

Y29

VSSC#94

Y31

VSSC#95

Y34

VSSC#96
VSSC#97

U1H

U1H

AA19

VDDC#1

AA21

VDDC#2

AA24

VDDC#3

AA26

VDDC#4

AA29

VDDC#5

AA31

VDDC#6

AA34

VDDC#7

AC20

VDDC#8

AC23

VDDC#9

AC25

VDDC#10

AC28

VDDC#11

AC30

VDDC#12

AC33

VDDC#13

AC35

VDDC#14

AD19

VDDC#15

AD21

VDDC#16

AD24

VDDC#17

AD26

VDDC#18

AD29

VDDC#19

AD31

VDDC#20

AD34

VDDC#21

AE20

VDDC#22

AE23

VDDC#23

AE25

VDDC#24

AE28

VDDC#25

AE30

VDDC#26

AE33

VDDC#27

AE35

VDDC#28

AF19

VDDC#29

AF21

VDDC#30

AF24

VDDC#31

AF26

VDDC#32

AF29

VDDC#33

AF31

VDDC#34

AF34

VDDC#35

AH20

VDDC#36

AH23

VDDC#37

AH25

VDDC#38

AH28

VDDC#39

AH30

VDDC#40

AH33

VDDC#41

AH35

VDDC#42

AJ19

VDDC#43

AJ21

VDDC#44

AJ24

VDDC#45

AJ26

VDDC#46

AJ29

VDDC#47

AJ31

VDDC#48

AJ34

VDDC#49

AK20

VDDC#50

AK23

VDDC#51

AK25

VDDC#52

AK28

VDDC#53

AK30

VDDC#54

AK33

VDDC#55

AK35

VDDC#56

AL19

VDDC#57

AL21

VDDC#58

AL24

VDDC#59

AL26

VDDC#60

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
VDDC#75
VDDC#76
VDDC#77
VDDC#78
VDDC#79
VDDC#80
VDDC#81
VDDC#82
VDDC#83
VDDC#84
VDDC#85
VDDC#86
VDDC#87
VDDC#88
VDDC#89
VDDC#90
VDDC#91
VDDC#92
VDDC#93
VDDC#94
VDDC#95
VDDC#96
VDDC#97

SP_PVDD

AL29
AL31
AL34
AN20
AN23
AN25
AN28
AN30
AN33
AN35
AP21
AP24
AP26
AP29
AP31
AP34
AR20
AR23
AR25
AR28
AR30
AR33
W19
W21
W24
W26
W29
W31
W34
Y20
Y23
Y25
Y28
Y30
Y33
Y35
AR35
AR38

+PCIE_PVDD

C152

C152
1uF_6.3V

1uF_6.3V

C164

C164
1uF_6.3V

1uF_6.3V

C174

C174
1uF_6.3V

1uF_6.3V

C179

C179
10uF_X6S

10uF_X6S

C377

C377
1uF_6.3V

1uF_6.3V

C190

C190
1uF_6.3V

1uF_6.3V

C200

C200
1uF_6.3V

1uF_6.3V

C153

C153
1uF_6.3V

1uF_6.3V

C165

C165
1uF_6.3V

1uF_6.3V

C180

C180
10uF_X6S

10uF_X6S

C378

C378
1uF_6.3V

1uF_6.3V

C191

C191
1uF_6.3V

1uF_6.3V

C201

C201
1uF_6.3V

1uF_6.3V

C175

C175
1uF_6.3V

1uF_6.3V

2

C154

C154
1uF_6.3V

1uF_6.3V

C166

C166
1uF_6.3V

1uF_6.3V

C379

C379
1uF_6.3V

1uF_6.3V

C192

C192
1uF_6.3V

1uF_6.3V

C202

C202
1uF_6.3V

1uF_6.3V

C155

C155
1uF_6.3V

1uF_6.3V

C167

C167
1uF_6.3V

1uF_6.3V

C176

C176
1uF_6.3V

1uF_6.3V

C182

C182
10uF_X6S

10uF_X6S

Overlapped Footprints

C380

C380
1uF_6.3V

1uF_6.3V

C193

C193
1uF_6.3V

1uF_6.3V

C203

C203
1uF_6.3V

1uF_6.3V

C156

C156
1uF_6.3V

1uF_6.3V

C168

C168
1uF_6.3V

1uF_6.3V

C177

C177
1uF_6.3V

1uF_6.3V

C204

C204
1uF_6.3V

1uF_6.3V

C381

C381
1uF_6.3V

1uF_6.3V

C194

C194
1uF_6.3V

1uF_6.3V

C157

C157
1uF_6.3V

1uF_6.3V

C169

C169
1uF_6.3V

1uF_6.3V

C205

C205
1uF_6.3V

1uF_6.3V

C178

C178
1uF_6.3V

1uF_6.3V

C382

C382
1uF_6.3V

1uF_6.3V

C195

C195
1uF_6.3V

1uF_6.3V

C158

C158
1uF_6.3V

1uF_6.3V

C170

C170
1uF_6.3V

1uF_6.3V

C383

C383
1uF_6.3V

1uF_6.3V

C209

C209
1uF_6.3V

1uF_6.3V

C159

C159
1uF_6.3V

1uF_6.3V

C171

C171
1uF_6.3V

1uF_6.3V

C196

C196
1uF_6.3V

1uF_6.3V

C185

C185
10uF_X6S

10uF_X6S

C160

C160
1uF_6.3V

1uF_6.3V

C384

C384
1uF_6.3V

1uF_6.3V

C206

C206
1uF_6.3V

1uF_6.3V

C172

C172
1uF_6.3V

1uF_6.3V

C197

C197
1uF_6.3V

1uF_6.3V

C161

C161
1uF_6.3V

1uF_6.3V

C385

C385
1uF_6.3V

1uF_6.3V

C207

C207
1uF_6.3V

1uF_6.3V

C173

C173
1uF_6.3V

1uF_6.3V

1

C198

C198
1uF_6.3V

1uF_6.3V

C162

C162
1uF_6.3V

1uF_6.3V

C386

C386
1uF_6.3V

1uF_6.3V

C208

C208
1uF_6.3V

1uF_6.3V

C387

C387
1uF_6.3V

1uF_6.3V

+VDDC

C199

C199
1uF_6.3V

1uF_6.3V

C210

C210
1uF_6.3V

1uF_6.3V

C163

C163
1uF_6.3V

1uF_6.3V

+VDDC

+VDDC

C388

C388
1uF_6.3V

1uF_6.3V

C262

C262

C261

C261

C260

C260

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C271

C271
100nF_6.3V

100nF_6.3V

A A

C286

C286

C285

C285

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

1uF_6.3V

1uF_6.3V

C272

C272
100nF_6.3V

100nF_6.3V

C287

C287
10uF_X6S

10uF_X6S

C263

C263
1uF_6.3V

1uF_6.3V

C273

C273
100nF_6.3V

100nF_6.3V

5

C288

C288
10uF_X6S

10uF_X6S

C264

C264
1uF_6.3V

1uF_6.3V

C274

C274
100nF_6.3V

100nF_6.3V

C289

C289
10uF_X6S

10uF_X6S

C265

C265
1uF_6.3V

1uF_6.3V

C275

C275
100nF_6.3V

100nF_6.3V

C266

C266
1uF_6.3V

1uF_6.3V

C290

C290
10uF_X6S

10uF_X6S

C276

C276
100nF_6.3V

100nF_6.3V

C291

C291
10uF_X6S

10uF_X6S

C267

C267
1uF_6.3V

1uF_6.3V

C277

C277
100nF_6.3V

100nF_6.3V

C269

C269

C268

C268

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C278

C278
100nF_6.3V

100nF_6.3V

Overlapped Footprints

C292

C292
10uF_X6S

10uF_X6S

C270

C270
1uF_6.3V

1uF_6.3V

C217

C215

C215

C214

C212

C212

C211

C211

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C390

C390

C389

C389

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

4

3

C391

C391
1uF_6.3V

1uF_6.3V

C392

C392
1uF_6.3V

1uF_6.3V

2

C214

C213

C213
100nF_6.3V

100nF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C216

C216
100nF_6.3V

100nF_6.3V

C217
100nF_6.3V

100nF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

421

of

421

of

421

1

C218

C218
100nF_6.3V

100nF_6.3V

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

U1C

R102

R102
1uF_6.3V

1uF_6.3V

AW19

V40
R42
V41
R41
V42
V43
U45
P44
M48
M50

L53

L51
P48
P50
P52
N53

L49

J51
K50
K48
G52
H48
F48
C51
C43
F44
E43
D44
A46
D46
F46
B47

L44
M45
P40
M44
R43
P43

J43
K44
M42

K45
R51

R49
E50
D49

U44
N49

J49
C45

U43
N51
H50
E45

U38
R39
R40

J44
P45

L43
U40
U39

U33
U32

T32
P36

U1C

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31

MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8

ADBIA0
WCKA0_0

WCKA0B_0
WCKA0_1
WCKA0B_1

EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3

DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3

WEA0B
CSA0B_0
CSA0B_1
CASA0B
RASA0B

CKEA0
CLKA0
CLKA0B

MVREFAS
MVREFAD

MEM_CALRPA
MEM_CALRNA

DRAM_RST

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

+MVDD

R122

R122

40.2R

40.2R

1%

R125

R125
100R

100R

1%

+MVDD

R126

R126

40.2R

40.2R

1%

R128

R128
100R

100R

1%

DQA_[31..0](8)

D D

MAA_[8..0](8)

DQMAb_0(8)
DQMAb_1(8)
DQMAb_2(8)

C C

B B

A A

DQMAb_3(8)

QSA_0(8)
QSA_1(8)
QSA_2(8)
QSA_3(8)

QSAb_0(8)
QSAb_1(8)
QSAb_2(8)
QSAb_3(8)

WEA0b(8)
CSA0b_0(8)

CASA0b(8)
RASA0b(8)

CKEA0(8)
CLKA0(8)
CLKA0b(8)

DRAM_RST(8,9)

+MVDD

C396

C396
1uF_6.3V

1uF_6.3V

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7

MVREFS_A
MVREFD_A

R120 243RR120 243R
R121 243RR121 243R

DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8

DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MAA1_0

MAA1_1

MAA1_2

MAA1_3

MAA1_4

MAA1_5

MAA1_6

MAA1_7

MAA1_8

ADBIA1

WCKA1_0

WCKA1B_0

WCKA1_1

WCKA1B_1

EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3

WEA1B
CSA1B_0
CSA1B_1

CASA1B
RASA1B

CKEA1
CLKA1

CLKA1B

MPVDD#0
MPVDD#1
MPVDD#2

C300

C300
1uF_6.3V

1uF_6.3V

C305

C305
1uF_6.3V

1uF_6.3V

4

D30
A31
F30
E29
D32
C33
E33
F32
J35
L32
L35
K35
M30
L33
L30
J29
F34
A35
E35
C35
E37
C37
B38
A37
F42
E41
A43
D42
D40
E39
C39
F40

J42
K40
L37
J40
J37
K37
M39
M40
K42

L42
B34

D34
D38
F38

C31
J32
D36
C41

E31
K32
F36
A41

N36
P37
R37
N39
L39

T37
M36
L36

J10
K10
K9

DNI

MVREFD_A

DNI

MVREFS_A

DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

MAA_8
MAA_9

MAA_10
MAA_11

MAA_BA2
MAA_BA0
MAA_BA1

+MPVDD

C339

C339

1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

DQA_[63..32] (8)

DQMAb_4 (8)
DQMAb_5 (8)
DQMAb_6 (8)
DQMAb_7 (8)

QSA_4 (8)
QSA_5 (8)
QSA_6 (8)
QSA_7 (8)

QSAb_4 (8)
QSAb_5 (8)
QSAb_6 (8)
QSAb_7 (8)

WEA1b (8)

CSA1b_0 (8)
CASA1b (8)

RASA1b (8)

CKEA1 (8)

CLKA1 (8)

CLKA1b (8)

C338

C338

C337

C337

1uF_6.3V

1uF_6.3V

MAA_[11..8] (8)

MAA_BA[2..0] (8)

C336

C336

10uF_X6S

10uF_X6S

B114

B114

10R_1A_0402

10R_1A_0402

+1.8V

3

DQB_[63..0](8)

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30

MAB_[7..0](8)

DQMBb_0(8)
DQMBb_1(8)
DQMBb_2(8)
DQMBb_3(8)

QSB_0(8)
QSB_1(8)
QSB_2(8)
QSB_3(8)

QSBb_0(8)
QSBb_1(8)
QSBb_2(8)
QSBb_3(8)

WEB0b(8)
CSB0b_0(8)

CASB0b(8)
RASB0b(8)

CKEB0(8)
CLKB0(8)
CLKB0b(8)

+MVDD

DQB_31

MAB_0
MAB_1 MAB_9
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7

MVREFS_B
MVREFD_B

R118 243RR118 243R
R119 243RR119 243R

P35
P32
T35
P33

N30

P30
R32
R35
M25
M28
N25

T26

K26

J26
R29
N28

A29
C29

F28
D28

A27
D26

E25

F26

E21
D22
C21

A21
C23

E23

F24
D24

J24

L24

L25

P24

L28

P25
N22

P22

L22
M22

K29

L29
C25

A25
N33

L26
E27
F22

M33
M26
C27

A23
T29

P26

R26
R24

K24
T24

P29
P28

T17

U18

T21

R21

U1D

U1D

DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31

MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB0_8

ADBIB0
WCKB0_0

WCKB0B_0
WCKB0_1
WCKB0B_1

EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3

DDBIB0_0
DDBIB0_1
DDBIB0_2
DDBIB0_3

WEB0B
CSB0B_0
CSB0B_1
CASB0B
RASB0B

CKEB0
CLKB0
CLKB0B

MVREFBS
MVREFBD

MEM_CALRPB
MEM_CALRNB

2

C3

DQB1_0

D5

DQB1_1

B7

DQB1_2

D8

DQB1_3

E9

DQB1_4

F10

DQB1_5

D10

DQB1_6

A11

DQB1_7

K18

DQB1_8

L18

DQB1_9

L17

DQB1_10

M17

DQB1_11

M12

DQB1_12

L12

DQB1_13

K12

DQB1_14

J12

DQB1_15

F12

DQB1_16

D12

DQB1_17

C13

DQB1_18

A13

DQB1_19

F14

DQB1_20

C15

DQB1_21

A15

DQB1_22

E15

DQB1_23

F20

DQB1_24

C17

DQB1_25

D20

DQB1_26

C19

DQB1_27

E19

DQB1_28

D18

DQB1_29

E17

DQB1_30

A17

DQB1_31

J18

MAB1_0

M19

MAB1_1

P18

MAB1_2

T18

MAB1_3

N17

MAB1_4

R18

MAB1_5

N19

MAB1_6

P21

MAB1_7

L19

MAB1_8

J21

ADBIB1

C11

WCKB1_0

E11

WCKB1B_0

D16

WCKB1_1

F16

WCKB1B_1

F8

EDCB1_0

K15

EDCB1_1

E13

EDCB1_2

A19

EDCB1_3

C9

DDBIB1_0

J15

DDBIB1_1

D14

DDBIB1_2

F18

DDBIB1_3

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

+MVDD

+MVDD

R123

R123

40.2R

40.2R

1%

R124

R124
100R

100R

1%

R127

R127

40.2R

40.2R

1%

R129

R129
100R

100R

1%

WEB1B
CSB1B_0
CSB1B_1

CASB1B
RASB1B

CKEB1
CLKB1

CLKB1B

C298

C298
1uF_6.3V

1uF_6.3V

C307

C307
1uF_6.3V

1uF_6.3V

P15
N15
L14
K21
P19

L21
N14
M14

DNI

DNI

DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFD_B

MVREFS_B

MAB_8
MAB_10

MAB_11
MAB_BA2

MAB_BA0
MAB_BA1

DQMBb_4 (8)
DQMBb_5 (8)
DQMBb_6 (8)
DQMBb_7 (8)

QSB_4 (8)
QSB_5 (8)
QSB_6 (8)
QSB_7 (8)

QSBb_4 (8)
QSBb_5 (8)
QSBb_6 (8)
QSBb_7 (8)

WEB1b (8)

CSB1b_0 (8)
CASB1b (8)

RASB1b (8)

CKEB1 (8)

CLKB1 (8)

CLKB1b (8)

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

1

MAB_[11..8] (8)

MAB_BA[2..0] (8)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

5

4

3

2

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

521

of

521

of

521

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

U1E

AA14

AA10

AA11

AA16
AA15

V10
V11
U11
U12

M11
M10

W12

V14
V16
U13
V15

W13
W11

AA9

R10

R14
R13
P11

W14

P13
P12

U16
V17

E4
H4
G2

F6

J5

K6

K4

L1

L11

M9
M6
M4
N3
N1

P6
R3
R1
R5

Y6

W3

Y4

W5

V4
U3
U5
U1

V9

L3

L5

T4

T6
H6
N5

W1

J3
R9

P4

V6

U1E

DQC0_0
DQC0_1
DQC0_2
DQC0_3
DQC0_4
DQC0_5
DQC0_6
DQC0_7
DQC0_8
DQC0_9
DQC0_10
DQC0_11
DQC0_12
DQC0_13
DQC0_14
DQC0_15
DQC0_16
DQC0_17
DQC0_18
DQC0_19
DQC0_20
DQC0_21
DQC0_22
DQC0_23
DQC0_24
DQC0_25
DQC0_26
DQC0_27
DQC0_28
DQC0_29
DQC0_30
DQC0_31

MAC0_0
MAC0_1
MAC0_2
MAC0_3
MAC0_4
MAC0_5
MAC0_6
MAC0_7
MAC0_8

ADBIC0
WCKC0_0

WCKC0B_0
WCKC0_1
WCKC0B_1

EDCC0_0
EDCC0_1
EDCC0_2
EDCC0_3

DDBIC0_0
DDBIC0_1
DDBIC0_2
DDBIC0_3

WEC0B
CSC0B_0
CSC0B_1
CASC0B
RASC0B

CKEC0
CLKC0
CLKC0B

MVREFCS
MVREFCD

MEM_CALRPC
MEM_CALRNC

WCKC1_0

WCKC1B_0

WCKC1_1

WCKC1B_1

DDBIC1_0
DDBIC1_1
DDBIC1_2
DDBIC1_3

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

DQC_[31..0](9)

D D

MAC_[7..0](9)

DQMCb_0(9)

C C

DQMCb_1(9)
DQMCb_2(9)
DQMCb_3(9)

QSC_0(9)
QSC_1(9)
QSC_2(9)
QSC_3(9)

QSCb_0(9)
QSCb_1(9)
QSCb_2(9)
QSCb_3(9)

WEC0b(9)
CSC0b_0(9)

CASC0b(9)
RASC0b(9)

CKEC0(9)
CLKC0(9)
CLKC0b(9)

+MVDD

DQC_0
DQC_1
DQC_2
DQC_3
DQC_4
DQC_5
DQC_6
DQC_7
DQC_8
DQC_9
DQC_10
DQC_11
DQC_12
DQC_13
DQC_14
DQC_15
DQC_16
DQC_17
DQC_18
DQC_19
DQC_20
DQC_21
DQC_22
DQC_23
DQC_24
DQC_25
DQC_26
DQC_27
DQC_28
DQC_29
DQC_30
DQC_31

MAC_0
MAC_1
MAC_2
MAC_3
MAC_4
MAC_5
MAC_6
MAC_7

MVREFS_C
MVREFD_C

R135 243RR135 243R
R137 243RR137 243R

DQC1_0
DQC1_1
DQC1_2
DQC1_3
DQC1_4
DQC1_5
DQC1_6
DQC1_7
DQC1_8

DQC1_9
DQC1_10
DQC1_11
DQC1_12
DQC1_13
DQC1_14
DQC1_15
DQC1_16
DQC1_17
DQC1_18
DQC1_19
DQC1_20
DQC1_21
DQC1_22
DQC1_23
DQC1_24
DQC1_25
DQC1_26
DQC1_27
DQC1_28
DQC1_29
DQC1_30
DQC1_31

MAC1_0

MAC1_1

MAC1_2

MAC1_3

MAC1_4

MAC1_5

MAC1_6

MAC1_7

MAC1_8

ADBIC1

EDCC1_0
EDCC1_1
EDCC1_2
EDCC1_3

WEC1B
CSC1B_0
CSC1B_1

CASC1B
RASC1B

CKEC1
CLKC1

CLKC1B

AR16
AN14
AR14
AR15
AM15
AM14
AK13
AK14
AJ15
AH12
AH13
AF10
AF9
AF16
AE13
AE12
AJ3
AJ1
AH4
AH6
AG1
AF4
AE5
AF6
AA5
AB4
AA3
AA1
AC5
AD6
AD4
AC3

AD9
AD11
AE11
AD14
AH11
AE14
AB13
AB14
AB11

AB12
AJ10

AJ11
AE3
AE1

AN13
AF11
AG5
AB6

AN12
AF12
AG3
AC1

AJ16
AF14
AF15
AD15
AD10

AD16
AJ14
AH14

4

DQC_32
DQC_33
DQC_34
DQC_35
DQC_36
DQC_37
DQC_38
DQC_39
DQC_40
DQC_41
DQC_42
DQC_43
DQC_44
DQC_45
DQC_46
DQC_47
DQC_48
DQC_49
DQC_50
DQC_51
DQC_52
DQC_53
DQC_54
DQC_55
DQC_56
DQC_57
DQC_58
DQC_59
DQC_60
DQC_61
DQC_62
DQC_63

MAC_8
MAC_9
MAC_10
MAC_11

MAC_BA2
MAC_BA0
MAC_BA1

DQC_[63..32] (9)

MAC_[11..8] (9)

MAC_BA[2..0] (9)

DQMCb_4 (9)
DQMCb_5 (9)
DQMCb_6 (9)
DQMCb_7 (9)

QSC_4 (9)
QSC_5 (9)
QSC_6 (9)
QSC_7 (9)

QSCb_4 (9)
QSCb_5 (9)
QSCb_6 (9)
QSCb_7 (9)

WEC1b (9)
CSC1b_0 (9)

CASC1b (9)

CKEC1 (9)
CLKC1 (9)

CLKC1b (9)

3

U1F

AR11
AK12
AR10

AN11
AK11

AM11

AY10
AU11

AU10
AW12
AY12
BB10

BB11

AM10

AT13
AU14
AU15
AW13
AW11

AU16
AT12
AT11

AM17
AN17

AM16
AT14

AK6
AK4

AM6
AM4
AN5
AN3

AR9

AR3
AR1
AP6
AR5
AU1
AU3
AU5
AV2
BB6
BA5
BC1
BB4
AY6
AW5
AW3
AY4

BB9

AY9
AU9

AP2
AP4
AV4
AV6

AM9
AT4
BA3

AT6
BA1

AJ5

AL1

AJ9

AL3

AL5

U1F

DQD0_0
DQD0_1
DQD0_2
DQD0_3
DQD0_4
DQD0_5
DQD0_6
DQD0_7
DQD0_8
DQD0_9
DQD0_10
DQD0_11
DQD0_12
DQD0_13
DQD0_14
DQD0_15
DQD0_16
DQD0_17
DQD0_18
DQD0_19
DQD0_20
DQD0_21
DQD0_22
DQD0_23
DQD0_24
DQD0_25
DQD0_26
DQD0_27
DQD0_28
DQD0_29
DQD0_30
DQD0_31

MAD0_0
MAD0_1
MAD0_2
MAD0_3
MAD0_4
MAD0_5
MAD0_6
MAD0_7
MAD0_8

ADBID0
WCKD0_0

WCKD0B_0
WCKD0_1
WCKD0B_1

EDCD0_0
EDCD0_1
EDCD0_2
EDCD0_3

DDBID0_0
DDBID0_1
DDBID0_2
DDBID0_3

WED0B
CSD0B_0
CSD0B_1
CASD0B
RASD0B

CKED0
CLKD0
CLKD0B

MVREFDS
MVREFDD

MEM_CALRPD
MEM_CALRND

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

DQD_[31..0](9)

MAD_[7..0](9) MAD_[11..8] (9)

DQMDb_0(9)
DQMDb_1(9)
DQMDb_2(9)
DQMDb_3(9)

QSD_0(9)
QSD_1(9)
QSD_2(9)
QSD_3(9)

QSDb_0(9)
QSDb_1(9)
QSDb_2(9)
QSDb_3(9)

WED0b(9)
CSD0b_0(9)

CASD0b(9)
RASD0b(9)

CKED0(9)
CLKD0(9)
CLKD0b(9)

+MVDD

DQD_0
DQD_1
DQD_2
DQD_3
DQD_4
DQD_5
DQD_6
DQD_7
DQD_8
DQD_9
DQD_10
DQD_11
DQD_12
DQD_13
DQD_14
DQD_15
DQD_16
DQD_17
DQD_18
DQD_19
DQD_20
DQD_21
DQD_22
DQD_23
DQD_24
DQD_25
DQD_26
DQD_27
DQD_28
DQD_29
DQD_30
DQD_31

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7

MVREFS_D
MVREFD_D

R134 243RR134 243R
R136 243RR136 243R

DQD1_0
DQD1_1
DQD1_2
DQD1_3
DQD1_4
DQD1_5
DQD1_6
DQD1_7
DQD1_8

DQD1_9
DQD1_10
DQD1_11
DQD1_12
DQD1_13
DQD1_14
DQD1_15
DQD1_16
DQD1_17
DQD1_18
DQD1_19
DQD1_20
DQD1_21
DQD1_22
DQD1_23
DQD1_24
DQD1_25
DQD1_26
DQD1_27
DQD1_28
DQD1_29
DQD1_30
DQD1_31

MAD1_0

MAD1_1

MAD1_2

MAD1_3

MAD1_4

MAD1_5

MAD1_6

MAD1_7

MAD1_8

ADBID1

WCKD1_0

WCKD1B_0

WCKD1_1

WCKD1B_1

EDCD1_0
EDCD1_1
EDCD1_2
EDCD1_3

DDBID1_0
DDBID1_1
DDBID1_2
DDBID1_3

WED1B
CSD1B_0
CSD1B_1

CASD1B
RASD1B

CKED1
CLKD1

CLKD1B

2

DQD_32

BC18

DQD_33

BB18

DQD_34

BA18

DQD_35

AY18

DQD_36

BE17

DQD_37

BA15

DQD_38

BB15

DQD_39

BD14

DQD_40

BH12

DQD_41

BK12

DQD_42

BN11

DQD_43

BL11

DQD_44

BH14

DQD_45

BK14

DQD_46

BM14

DQD_47

BN13

DQD_48

BJ11

DQD_49

BK10

DQD_50

BM7

DQD_51

BL9

DQD_52

BH10

DQD_53

BH8

DQD_54

BH6

DQD_55

BL3

DQD_56

BC5

DQD_57

BD4

DQD_58

BC3

DQD_59

BF1

DQD_60

BD6

DQD_61

BF6

DQD_62

BF4

DQD_63

BG2

MAD_8

BD11

MAD_9

BE12

MAD_10

AY14

MAD_11

BD12
BC15
BC14
BC9
BD10
BC11

BE10
BL15

BJ15
BK5
BJ4

BD17
BJ13
BJ9
BE3

BC17
BL13
BK8
BE5

AV17
AW15
AY15
BD9
BE14

BB12
AY17
AW17

MAD_BA2
MAD_BA0
MAD_BA1

DQMDb_4 (9)
DQMDb_5 (9)
DQMDb_6 (9)
DQMDb_7 (9)

QSD_4 (9)
QSD_5 (9)
QSD_6 (9)
QSD_7 (9)

QSDb_4 (9)
QSDb_5 (9)
QSDb_6 (9)
QSDb_7 (9)

WED1b (9)
CSD1b_0 (9)

CASD1b (9)

CKED1 (9)
CLKD1 (9)

CLKD1b (9)

MAD_BA[2..0] (9)

RASD1b (9)RASC1b (9)

1

DQD_[63..32] (9)

B B

+MVDD

R139

R139

40.2R

40.2R

1%

R141

R141
100R

100R

1%

+MVDD

R143

R143

40.2R

40.2R

1%

R145

R145
100R

100R

1%

A A

5

C315

C315
1uF_6.3V

1uF_6.3V

C323

C323
1uF_6.3V

1uF_6.3V

MVREFD_C

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

MVREFS_C

4

3

+MVDD

+MVDD

R138

R138

40.2R

40.2R

1%

R140

R140
100R

100R

1%

R142

R142

40.2R

40.2R

1%

R144

R144
100R

100R

1%

C313

C313
1uF_6.3V

1uF_6.3V

C321

C321
1uF_6.3V

1uF_6.3V

MVREFD_D

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

MVREFS_D

Title

Title

2

Title

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

621

of

621

of

621

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

U1K

U1K

+1.8V

R147 221RR147 221R

R151 110RR151 110R
C328 100nF_6.3VC328 100nF_6.3V

+3.3V

C333

C333

C332

C332

100nF_6.3V

100nF_6.3V

100nF_6.3V

D D

+1.8V

BLM15BD121SN1

BLM15BD121SN1

C C

B B

100nF_6.3V

B113

B113

C325

C325

C335

C335

10uF_X6S

10uF_X6S

1uF_6.3V

1uF_6.3V

C329

C329
1uF_6.3V

1uF_6.3V

B119

B119

1 2

+TSVDD

C365

C365

NS702NS_VIA NS702NS_VIA

1uF_6.3V

1uF_6.3V

+3.3V

BLM15BD121SN1

BLM15BD121SN1

+1.8V

DNI

JTAG_MODE(1) GPIO_18 (13)

R1701KR170
1K

VREFG

BG21

VREFG

AU29

VDDR3#1

AU30

VDDR3#2

AU32

C334

C334
100nF_6.3V

100nF_6.3V

C326

C326

C327

C327

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C330

C330

C331

C331

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

TS_FDO(18)

GPU_DPLUS(18)
GPU_DMINUS(18)

C366

C366

C367

100nF_6.3V

100nF_6.3V

C367
10nF

10nF

GND_TSVSS

JTAG_MODE GPIO_18

TP4008 35milTP4008 35mil
TP4009 35milTP4009 35mil

AU33

BB24
BE24
BC24
BD24

BE25
BD25
BB25
BC25

AV36

AV30
AW30

AU24

AU25

BA30
BB30

AU39

BG19
BA22
AV28
BA29
BA35
AW36
BA26
AY30
BM22
BN19
AU22
BG43
AU28
AU26

AR19
AP19

BA19
AY19

VDDR3#3
VDDR3#4

VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4

TS_FDO

DPLUS
DMINUS

TSVDD

TSVSS

RSVD#1
RSVD#2

JMODE

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

VSSD#1
VSSD#2
VSSD#3
VSSD#4
VSSD#5
VSSD#6
VSSD#7
VSSD#8
VSSD#9
VSSD#10
VSSD#11
VSSD#12
VSSD#13
VSSD#14

NC_GPIO_31
NC_GPIO_32

TEST_YCLK
TEST_MCLK

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11

DVPCLK

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2
DVPDATA_12

DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

DVPCNTL_MVP_0
DVPCNTL_MVP_1

GPIO_0
GPIO_1

GPIO_2
GPIO_3_SMBDAT
GPIO_4_SMBCLK

GPIO_5

GPIO_6_TACH

GPIO_7

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16_SSIN

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

GPIO_23_CLKREQB

GPIO_24_TRSTB

GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE
GENERICF

GENERICG

GENERICH

VPCLK0

DVALID

VHAD_0
VHAD_1

VPHCTL

VIPCLK

VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7

PSYNC

BH20
BK20
BM20
BJ21
BL21
BN21
BH22
BK22
BG23
BJ23
BN23
BL23

BK18
BM18

BJ19
BL19

AW25
AY24
AV25
AY25
AY26
AW26
BA28
AV26
AY28
AW28
AY29
AW29

AW24
AV24

BA24
AV29
BH24
BD22
BA25
BE22
AY22
BC22
BB22
BA21
BB21
AW22
BE21
BD21
BD19
BB19
BC19
BE19
AY21
BH18
BN17
BG17
BC21
AW21
BL17
BM16
BH16
BK16
BJ17

BC35
BE32
BC33
BA33
BC30
BD35
BB29
BD32

AV35
AW35
AY35
AV33
AW33
AY33
AV32
AW32

AY32
BB33
BE35
AU36
AU35

BB35
BA32

4

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10

DVPDATA_11
DVOCLK
DVPCNTL_0

DVPCNTL_1
DVPCNTL_2

DVPDATA_12

DVPDATA_13

DVPDATA_14

DVPDATA_15

DVPDATA_16

DVPDATA_17

DVPDATA_18

DVPDATA_19

DVPDATA_20

DVPDATA_21

DVPDATA_22

DVPDATA_23

DVP_MVP_CNTL_0
DVP_MVP_CNTL_1

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
HPD2
GPIO_15_PWRCNTL_0
EXT_12V_DETb
GPIO_17_INT

GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSb
PCIE_CLK_REQb
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO

GENERICA
GENERICB
GENERICC
GENERICD

R197 0RR197 0R

R4037 0RR4037 0R

VID_0
VID_1
VID_2
VID_3

VID_6

DVALID
PSYNC
VHAD_0

3

Place SW1 & SW2 on the bottom side

TP400535mil TP400535mil

CrossFire

TP400335mil TP400335mil
TP400435mil TP400435mil

TP400635mil TP400635mil

DVP_MVP_CNTL_0 : DE for bits D[12..23]

TP400735mil TP400735mil

DVP_MVP_CNTL_1 : CLK for bits D[12..23]

CrossFire

HPD2 (15)

ThermINT (18)

GPIO_19_CTF (13)

EXT_12V_DET (13)

GENERICF (13)

FLOW_CONTROL_1 - Lower Cable
FLOW_CONTROL_2 - Upper Cable
SWAP_LOCK_1 - Lower Cable
SWAP_LOCK_2 - Upper Cable

GPIO_8_R

RP1A33R RP1A33R

81

GPIO_9_R

RP1B33R RP1B33R

72

GPIO_10_R

RP1C33R RP1C33R

63

ROMCSb_R

RP1D33R RP1D33R

54

EXT_12V_DET (13)

GPIO_3 (1)
GPIO_4 (1)
GPIO_5 (13)

TACH (18)

JTAG_TRSTB (1)

JTAG_TDI (1)
JTAG_TCK (1)
JTAG_TMS (1)
JTAG_TDO (1)

TP401135mil TP401135mil
TP401235mil TP401235mil

TP401335mil TP401335mil
TP401435mil TP401435mil

TP401035mil TP401035mil
TP401535mil TP401535mil

TP401635mil TP401635mil

(easily accessible).
Clearly Mark A & B contacts on the
silkscreen.

GPIOs for VDDC Setting

GPIO_15_PWRCNTL_0 (13)

GPIO_20_PWRCNTL_1 (13)
GPIO_21 (13)

GENERICA (17)

+3.3V

DNI

DNI

MR148 10KMR148 10K

DNI

MR153 10KMR153 10K

MR156 10KMR156 10K

MR158 10KMR158 10K
MR159 10KMR159 10K

MR161 10KMR161 10K

TR1

TR1
10K

10K

TP29

TP29

35mil

35mil

MR163 10KMR163 10K

DNI

+3.3V

2

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

NTSC

R146 10KR146 10K

R150 10KR150 10K

R149 10KR149 10K

R152 10KR152 10K

R157 10KR157 10K

R160 10KR160 10K

R176 10KR176 10K

PIN BASED STRAPS

VSYNC1 (3,15)

VSYNC

VHAD_0

PSYNC

GPIO_0

GPIO_1

GPIO_2

VID_1

GPIO_9_R
GPIO_13
GPIO_12
GPIO_11

GPIO_8

HSYNC1 (3,15)

HSYNC1

DVALID

VID_6

VID_3

VID_2

VID_0

GPIO_21

VSYNC2
HSYNC2

GENERICC

GPIO_7

VSYNC2 (3,16)
HSYNC2 (3,16)

BUO

1

VIP_DEVICE_STRAP_EN
0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for
configurations without video-in)

If VIP_DEVICE_STRAP_EN is set to ‘1’, then this pin is
used to sense whether a VIP slave device is connected to
the VIP Host interface. If VIP_DEVICE_STRAP_EN is set
to ‘0’, then this pin is not used as a strap at all

VGA DISABLE : 1 for disable (set to 0 for normal operation)

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
1 : Allows either PCIe 2.5 GT/s or 5.0 GT/s operation
0 : Debug use only (disables PCIe 5.0 GT/s negotiation)
MSI_DIS (Default: 0)
Disable Message Signaled Interrupt is both a ROM strap
and a pin strap. The pin strap is only applicable if a BIOS
ROM is not present.

GPIO(9,13, 12,11) - CONFIG[3..0]

CONFIG[3]

0100 - 512Kbit M25P05A (ST)
0101 - 1Mbit M25P10A (ST)

CONFIG[2]

0101 - 2Mbit M25P20 (ST)
0101 - 4Mbit M25P40 (ST)

CONFIG[1]

0101 - 8Mbit M25P80 (ST)
0100 - 512Kbit Pm25LV512 (Chingis)

CONFIG[0]

0101 - 1Mbit Pm25LV010 (Chingis)

AUDIO_EN : Enable HD Audio function in the PCI configuration space.
0 - Disable HD Audio
1 - Enable HD Audio
HD audio must only be enabled on systems that are legally
entitled. It is the responsibility of the system designer to
ensure that the system is entitled to support this feature.

HDMI_EN :
Note: Board manufacturer must not set this strap to 1 unless
there is an onboard HDMI connector. It is the
manufacturers responsibility to pay royalties if this strap is
enabled.
This Board doesn't have HDMI Connector
therefore only pull down option is available

BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability

RESERVED :Internal use only. Other logic must not affect this signal
during RESET.

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

Pull-Down Resistors are for BU until built-in pull-downs are verified.

CrossFire Card-Edge

Place it at top edge of the
board on the bottom side.

Lower Cable Card Edge

1

DVOCLK
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7

A A

DVPDATA_9
DVPDATA_11
DVPCNTL_1
GENERICD

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

J1J1

2
4
6
8

DVPDATA_0

10
12

DVPDATA_2

14
16

DVPDATA_4

18
20

DVPDATA_6

22
24

DVPDATA_8

26
28

DVPDATA_10

32

DVPCNTL_0

34
36

GPIO_2

38
40

Bundle B

5

Upper Cable Card Edge

1

DVP_MVP_CNTL_1
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GENERICC

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

J2J2

2
4
6
8

DVPDATA_12

10
12

DVPDATA_14

14
16

DVPDATA_16

18
20

DVPDATA_18

22
24

DVPDATA_20

26
28

DVPDATA_22

32

DVALID_R

34
36

GPIO_1

38
40

Bundle A (closer to the bracket)

4

+3.3V

In production, this block
will not be populated.

Mating connector: 6010028300G
(HEADER 2X8 1.27MM PITCH, SMD)
When attaching the daughter card (B176) align it by mounting hole.

R181 0RR181 0R
R182 0RR182 0R

GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL

DNI

JTAG_MODE

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

DNI

DVALID

DNI

GENERICB

TP31

TP31

TP30

TP30

35mil

35mil

35mil

35mil

For wire soldering

EXT_ADJ_1.8V

Place TRP1 & TR2 in a way

BUO

GPIO_8_T
ROMCSb_T
GPIO_9_T
GPIO_10_T
SDA
SCL

to minimize the stub when
they are not populated.

GPIO_8_R

TRP1A33R TRP1A33R

81

ROMCSb_R

TRP1B33R TRP1B33R

72

GPIO_9_R

TRP1C33R TRP1C33R

63

GPIO_10_R

TRP1D33R TRP1D33R

54

+3.3V+5V

HOLD#

+3.3V

8

VCC

7

GPIO_10_R

6

SCK

GPIO_9_R

5

C342

C342
100nF_6.3V

100nF_6.3V

BIOS1

BIOS1

BIOS

BIOS

113-B339XX-XXX

113-B339XX-XXX

VIDEO BIOS
FIRMWARE

BUOBUO

R180

SDA (3)
SCL (3)

ROMCSb_R
GPIO_8_R

R180
10K

10K

U2

U2

1

CE#

2

SO

3

WP#
GND4SI

PM25LV512A-100SCE

PM25LV512A-100SCE

PN 2280007900G for 1Mbit (PM25LV010A-100SCE)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

3

2

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

721

of

721

of

721

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

DQA_24
DQA_27
DQA_28
DQA_26
DQA_30
DQA_25
DQA_31
DQA_29
DQA_14
DQA_12
DQA_13
DQA_15
DQA_8
DQA_11
DQA_9
DQA_10
DQA_7
DQA_3
DQA_1
DQA_6
DQA_2
DQA_5
DQA_0
DQA_4
DQA_23
DQA_22
DQA_20
DQA_21
DQA_17
DQA_18
DQA_19
DQA_16

MAA_BA2
MAA_BA1
MAA_BA0

MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

QSA_3
QSA_1
QSA_0
QSA_2

QSAb_3
QSAb_1
QSAb_0
QSAb_2

DQMAb_3
DQMAb_1
DQMAb_0
DQMAb_2

R1202

R1202
243R

243R

C1214

C1214
1uF_6.3V

1uF_6.3V

C1226

C1226
1uF_6.3V

1uF_6.3V

R1223 60.4RR1223 60.4R
R1224 60.4RR1224 60.4R

R1226 121RR1226 121R
R1228 121RR1228 121R
R1230 121RR1230 121R
R1232 121RR1232 121R
R1234 121RR1234 121R

R1237 60.4RR1237 60.4R
R1238 60.4RR1238 60.4R

R1241 121RR1241 121R
R1243 121RR1243 121R
R1245 121RR1245 121R
R1247 121RR1247 121R

C1264

C1264
1uF_6.3V

1uF_6.3V

C1299

C1299
100nF_6.3V

100nF_6.3V

C1337

C1337
1uF_6.3V

1uF_6.3V

5

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10

R11
M10
N11

L10
M11
G10

F11

F10
E11
C10
C11
B10
B11

G3

F2
F3

E2
C3
C2

B3

B2

H10

G9
G4

L4

K2
M9

K11

L9

K10
H11

K9
M4

K3
H2

K4

F9
H9
H3

F4
H4

J10
J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

H1

H12

+MVDD

C1265

C1265
100nF_6.3V

100nF_6.3V

C1300

C1300
1uF_6.3V

1uF_6.3V

5

U3

U3

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

23CC1287QB1A

23CC1287QB1A

+MVDD

C1266

C1266
1uF_6.3V

1uF_6.3V

C1301

C1301
100nF_6.3V

100nF_6.3V

C1344

C1344

4.7uF_6.3V

4.7uF_6.3V

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA#K12

VSSA#J12

GND | VDD

GND | VDD

CLKB0(5)
CLKB0b(5)

CKEB0(5)
CSB0b_0(5)
WEB0b(5)
RASB0b(5)
CASB0b(5)

CLKB1(5)
CLKB1b(5)

CKEB1(5)
CSB1b_0(5)
WEB1b(5)
RASB1b(5)
CASB1b(5)

C1267

C1267
100nF_6.3V

100nF_6.3V

C1302

C1302
1uF_6.3V

1uF_6.3V

C1345

C1345

4.7uF_6.3V

4.7uF_6.3V

VSSQ

VDDA

VSSA

RFU2
RFU1
RFU0

VDD

VSS

MF

C1268

C1268
1uF_6.3V

1uF_6.3V

C1303

C1303
1uF_6.3V

1uF_6.3V

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

+MVDD
A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

K1
K12

C1203

C1203
100nF_6.3V

100nF_6.3V

J12
J1

J3
J2
V4

A9

R1221 60.4RR1221 60.4R
R1222 60.4RR1222 60.4R

R1225 121RR1225 121R
R1227 121RR1227 121R
R1229 121RR1229 121R
R1231 121RR1231 121R
R1233 121RR1233 121R

R1235 60.4RR1235 60.4R
R1236 60.4RR1236 60.4R

R1240 121RR1240 121RR1239 121RR1239 121R
R1242 121RR1242 121R
R1244 121RR1244 121R
R1246 121RR1246 121R
R1248 121RR1248 121R

C1269

C1269
100nF_6.3V

100nF_6.3V

C1304

C1304
1uF_6.3V

1uF_6.3V

C1346

C1346

4.7uF_6.3V

4.7uF_6.3V

+MVDD

B1201B1201
B1203B1203

C1204

C1204
10nF

10nF

+MVDD

C1210

C1210

R1203

R1203

10nF

10nF

1.15K

1.15K

R1210

R1210
2K74

2K74

+MVDD

+MVDD

R1214

R1214

C1222

C1222

1.15K

1.15K

10nF

10nF

R1218

R1218
2K74

+MVDD

2K74

QSA_[7..0](5)

+MVDD

QSAb_[7..0](5)

+MVDD

C1272

C1272

C1271

C1271

C1270

C1270
100nF_6.3V

100nF_6.3V

C1305

C1305
1uF_6.3V

1uF_6.3V

+MVDD +MVDD

C1347

C1347

4.7uF_6.3V

4.7uF_6.3V

100nF_6.3V

100nF_6.3V

C1306

C1306
1uF_6.3V

1uF_6.3V

+MVDD

100nF_6.3V

100nF_6.3V

C1307

C1307
1uF_6.3V

1uF_6.3V

C1338

C1338
100nF_6.3V

100nF_6.3V

DQA_[63..0](5)

D D

+MVDD

C1201

C1201
10nF

10nF

+MVDD

C1221

C1221
10nF

10nF

C1261

C1261
100nF_6.3V

100nF_6.3V

C1296

C1296
1uF_6.3V

1uF_6.3V

C1329

C1329
100nF_6.3V

100nF_6.3V

CKEA0(5)
CSA0b_0(5)
WEA0b(5)
RASA0b(5)
CASA0b(5)

R1201

R1201

1.15K

1.15K

R1209

R1209
2K74

2K74

R1213

R1213

1.15K

1.15K

R1217

R1217
2K74

2K74

CLKA0(5)
CLKA0b(5)

+MVDD

+MVDD

CKEA1(5)
CSA1b_0(5)
WEA1b(5)
RASA1b(5)
CASA1b(5)

CSA0b_0(5)
WEA0b(5)
RASA0b(5)
CASA0b(5)
CKEA0(5)
CLKA0b(5)

CLKA0(5)

DRAM_RST(5,9)

CLKA1(5)
CLKA1b(5)

C1262

C1262
100nF_6.3V

100nF_6.3V

C1297

C1297
1uF_6.3V

1uF_6.3V

C1330

C1330
100nF_6.3V

100nF_6.3V

C1263

C1263
100nF_6.3V

100nF_6.3V

C1298

C1298
1uF_6.3V

1uF_6.3V

C1331

C1331
100nF_6.3V

100nF_6.3V

C C

B B

+MVDD

A A

+MVDD

+MVDD

RASA1b(5)

CASA1b(5)
CKEA1(5)

CSA1b_0(5)

WEA1b(5)
CLKA1b(5)

CLKA1(5)

DRAM_RST(5,9)

C1273

C1273
100nF_6.3V

100nF_6.3V

C1308

C1308
1uF_6.3V

1uF_6.3V

C1339

C1339
1uF_6.3V

1uF_6.3V

MAA_7
MAA_8
MAA_3
MAA_10
MAA_11
MAA_2
MAA_1
MAA_0
MAA_9
MAA_6
MAA_5
MAA_4

MAA_BA2

QSA_5
QSA_7
QSA_6
QSA_4

QSAb_5
QSAb_7
QSAb_6
QSAb_4

DQMAb_5
DQMAb_7
DQMAb_6
DQMAb_4

R1204

R1204
243R

243R

C1274

C1274
100nF_6.3V

100nF_6.3V

C1309

C1309
1uF_6.3V

1uF_6.3V

C1341

C1341
1uF_6.3V

1uF_6.3V

4

DQA_43
DQA_40
DQA_42
DQA_45
DQA_44
DQA_41
DQA_47
DQA_46
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_63
DQA_61
DQA_62
DQA_52
DQA_54
DQA_53
DQA_55
DQA_50
DQA_51
DQA_49
DQA_48
DQA_38
DQA_39
DQA_37
DQA_36
DQA_32
DQA_35
DQA_34
DQA_33

MAA_BA0
MAA_BA1

C1216

C1216
1uF_6.3V

1uF_6.3V

QSAb_0
QSAb_1
QSAb_2
QSAb_3
QSAb_4
QSAb_5
QSAb_6
QSAb_7

4

C1230

C1230
1uF_6.3V

1uF_6.3V

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

C1275

C1275
100nF_6.3V

100nF_6.3V

C1310

C1310
1uF_6.3V

1uF_6.3V

C1342

C1342
100nF_6.3V

100nF_6.3V

T3
T2
R3
R2
M3
N2
L3

M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2

F3

E2

C3

C2

B3

B2

H10

G9

G4

L4

K2

M9
K11

L9
K10
H11

K9

M4

K3

H2

K4

F9

H9

H3

F4

H4

J10
J11

P3
P10
D10

D3

P2
P11
D11

D2

N3
N10
E10

E3

V9

A4

H1
H12

U4

U4

23CC1287QB1A

23CC1287QB1A

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

C1276

C1276

C1277

C1277

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1312

C1312

C1311

C1311

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C1348

C1348

4.7uF_6.3V

4.7uF_6.3V

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA

VDDA#K12

VSSA#J12

VSSA

RFU2
RFU1
RFU0

GND | VDD

GND | VDD

DQMAb_[7..0](5)

DQMBb_[7..0](5)

C1286

C1286
100nF_6.3V

100nF_6.3V

C1313

C1313
1uF_6.3V

1uF_6.3V

VDD

VSS

MF

C1349

C1349

4.7uF_6.3V

4.7uF_6.3V

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

K1
K12

J12
J1

J3
J2
V4

A9

C1287

C1287
100nF_6.3V

100nF_6.3V

C1314

C1314
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

C1208

C1208
100nF_6.3V

100nF_6.3V

+MVDD

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

C1288

C1288
100nF_6.3V

100nF_6.3V

C1315

C1315
1uF_6.3V

1uF_6.3V

C1350

C1350

4.7uF_6.3V

4.7uF_6.3V

C1209

C1209
10nF

10nF

C1289

C1289
100nF_6.3V

100nF_6.3V

C1325

C1325
1uF_6.3V

1uF_6.3V

C1351

C1351

4.7uF_6.3V

4.7uF_6.3V

+MVDD

B1202B1202
B1204B1204

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

QSBb_0
QSBb_1
QSBb_2
QSBb_3
QSBb_4
QSBb_5
QSBb_6
QSBb_7

C1295

C1295
100nF_6.3V

100nF_6.3V

C1328

C1328
1uF_6.3V

1uF_6.3V

3

QSB_[7..0] (5)

QSBb_[7..0] (5)

+MVDD

C1278

C1278
100nF_6.3V

100nF_6.3V

C1316

C1316
1uF_6.3V

1uF_6.3V

+MVDD

C1332

C1332
100nF_6.3V

100nF_6.3V

C1343

C1343
1uF_6.3V

1uF_6.3V

3

C1211

C1211
10nF

10nF

C1223

C1223
10nF

10nF

2

DQB_[63..0](5)

CSB0b_0(5)
WEB0b(5)
RASB0b(5)
CASB0b(5)
CKEB0(5)
CLKB0b(5)

CLKB0(5)

QSB_3
QSB_1
QSB_0
QSB_2

QSBb_3
QSBb_1
QSBb_0
QSBb_2

DQMBb_3
DQMBb_1
DQMBb_0

+MVDD

+MVDD

C1279

C1279
100nF_6.3V

100nF_6.3V

C1317

C1317
1uF_6.3V

1uF_6.3V

DQMBb_2

DRAM_RST(5,9) DRAM_RST(5,9)

R1205

R1205

1.15K

1.15K

R1211

R1211
2K74

2K74

+MVDD

R1215

R1215

1.15K

1.15K

R1219

R1219
2K74

2K74

+MVDD

C1280

C1280

C1281

C1281

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1318

C1318

C1319

C1319

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

U5

U5

DQB_24

T3

DQ31 | DQ23

DQB_27

T2

DQ30 | DQ22

DQB_25

R3

DQ29 | DQ21

DQB_26

R2

DQ28 | DQ20

DQB_29

M3

DQ27 | DQ19

DQB_28

N2

DQ26 | DQ18

DQB_31

L3

DQ25 | DQ17

DQB_30

M2

DQ24 | DQ16

DQB_11

T10

DQ23 | DQ31

DQB_8

T11

DQ22 | DQ30

DQB_10

R10

DQ21 | DQ29

DQB_13

R11

DQ20 | DQ28

DQB_9

M10

DQ19 | DQ27

DQB_12

N11

DQ18 | DQ26

DQB_14

L10

DQ17 | DQ25

DQB_15

M11

DQ16 | DQ24

DQB_5

G10

DQ15 | DQ7

DQB_6

F11

DQ14 | DQ6

DQB_4

F10

DQ13 | DQ5

DQB_1

E11

DQ12 | DQ4

DQB_0

C10

DQ11 | DQ3

DQB_3

C11

DQ10 | DQ2

DQB_2

B10

DQ9 | DQ1

DQB_7

B11

DQ8 | DQ0

DQB_22

G3

DQ7 | DQ15

DQB_21

F2

DQ6 | DQ14

DQB_23

F3

DQ5 | DQ13

DQB_20

E2

DQ4 | DQ12

DQB_19

C3

DQ3 | DQ11

DQB_16

C2

DQ2 | DQ10

DQB_17

B3

DQ1 | DQ9

DQB_18

B2

DQ0 | DQ8

MAB_BA2

H10

BA2 | RAS

MAB_BA1

G9

BA1 | BA0

MAB_BA0

G4

BA0 | BA1

MAB_11

L4

A11 | A7

MAB_10

K2

A10 | A8

MAB_9

M9

A9 | A3

MAB_8

K11

A8/AP | A10

MAB_7

L9

A7 | A11

MAB_6

K10

A6 | A2

MAB_5

H11

A5 | A1

MAB_4

K9

A4 | A0

MAB_3

M4

A3 | A9

MAB_2

K3

A2 | A6

MAB_1

H2

A1 | A5

MAB_0

K4

A0 | A4

F9

CS | CAS

H9

WE | CKE

H3

RAS | BA2

F4

CAS | CS

H4

CKE | WE

J10

CK

J11

CK

P3

RDQS3 | RDQS2

P10

RDQS2 | RDQS3

D10

RDQS1 | RDQS0

D3

RDQS0 | RDQS1

P2

WDQS3 | WDQS2

P11

WDQS2 | WDQS3

D11

WDQS1 | WDQS0

D2

WDQS0 | WDQS1

N3

DM3 | DM2

N10

DM2 | DM3

E10

DM1 | DM0

E3

DM0 | DM1

V9

RESET

R1206

R1206

A4

ZQ

243R

243R

H1

VREF

C1218

C1218

H12

VREF#H12

1uF_6.3V

1uF_6.3V

23CC1287QB1A

23CC1287QB1A

C1232

C1232
1uF_6.3V

1uF_6.3V

MAA_BA[2..0](5)

MAA_[11..0](5) MAB_[11..0](5)

C1282

C1282
100nF_6.3V

100nF_6.3V

C1320

C1320
1uF_6.3V

1uF_6.3V

C1283

C1283
100nF_6.3V

100nF_6.3V

C1321

C1321
1uF_6.3V

1uF_6.3V

MAA_BA0
MAA_BA1
MAA_BA2

MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

C1284

C1284
100nF_6.3V

100nF_6.3V

C1322

C1322
1uF_6.3V

1uF_6.3V

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4

VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1

VSSQ#T4

VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA#K12

VSSA#J12

GND | VDD

GND | VDD

C1285

C1285
100nF_6.3V

100nF_6.3V

C1323

C1323
1uF_6.3V

1uF_6.3V

VDDQ

VDD

VSSQ

VSS

VDDA

VSSA

RFU2
RFU1
RFU0

MF

MAB_BA[2..0](5)

C1290

C1290
100nF_6.3V

100nF_6.3V

C1324

C1324
1uF_6.3V

1uF_6.3V

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

K1
K12

J12
J1

J3
J2
V4

A9

C1291

C1291
100nF_6.3V

100nF_6.3V

C1326

C1326
1uF_6.3V

1uF_6.3V

+MVDD

C1333

C1333
100nF_6.3V

100nF_6.3V

C1352

C1352
1uF_6.3V

1uF_6.3V

C1334

C1334

4.7uF_6.3V

4.7uF_6.3V

C1335

C1335

4.7uF_6.3V

4.7uF_6.3V

C1336

C1336

4.7uF_6.3V

4.7uF_6.3V

C1340

C1340

4.7uF_6.3V

4.7uF_6.3V

2

+MVDD

+MVDD

+MVDD

B1205B1205
B1207B1207

C1205

C1205

C1202

C1202

10nF

10nF

100nF_6.3V

100nF_6.3V

+MVDD

R1207

R1207

C1212

C1212

1.15K

1.15K

10nF

10nF

R1212

R1212
2K74

2K74

+MVDD

+MVDD

R1216

R1216

C1224

C1224

1.15K

1.15K

10nF

10nF

R1220

R1220
2K74

2K74

+MVDD

MAB_BA0
MAB_BA1
MAB_BA2

+MVDD

MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

C1292

C1292
100nF_6.3V

100nF_6.3V

C1327

C1327
1uF_6.3V

1uF_6.3V

C1233

C1233
100nF_6.3V

100nF_6.3V

C1244

C1244
1uF_6.3V

1uF_6.3V

+MVDD

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RASB1b(5)

CSB1b_0(5)

C1234

C1234
100nF_6.3V

100nF_6.3V

C1245

C1245
1uF_6.3V

1uF_6.3V

C1258

C1258
100nF_6.3V

100nF_6.3V

C1293

C1293
1uF_6.3V

1uF_6.3V

CASB1b(5)
CKEB1(5)

MAB_BA2

WEB1b(5)
CLKB1b(5)

CLKB1(5)

QSB_5
QSB_7
QSB_6
QSB_4

QSBb_5
QSBb_7
QSBb_6
QSBb_4

DQMBb_5
DQMBb_7
DQMBb_6
DQMBb_4

R1208

R1208
243R

243R

C1235

C1235
100nF_6.3V

100nF_6.3V

C1246

C1246
1uF_6.3V

1uF_6.3V

C1259

C1259
100nF_6.3V

100nF_6.3V

C1294

C1294
1uF_6.3V

1uF_6.3V

DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_46
DQB_45
DQB_47
DQB_58
DQB_59
DQB_56
DQB_60
DQB_62
DQB_61
DQB_57
DQB_63
DQB_53
DQB_54
DQB_55
DQB_52
DQB_49
DQB_50
DQB_48
DQB_51
DQB_39
DQB_37
DQB_38
DQB_36
DQB_33
DQB_34
DQB_35
DQB_32

MAB_BA0
MAB_BA1

MAB_7
MAB_8
MAB_3
MAB_10
MAB_11
MAB_2
MAB_1
MAB_0
MAB_9
MAB_6
MAB_5
MAB_4

C1220

C1220
1uF_6.3V

1uF_6.3V

T3
T2
R3
R2
M3
N2
L3

M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2

F3

E2

C3

C2

B3

B2

H10

G9

G4

L4

K2

M9
K11

L9
K10
H11

K9

M4

K3

H2

K4

F9

H9

H3

F4

H4

J10
J11

P3
P10
D10

D3

P2
P11
D11

D2

N3
N10
E10

E3

V9

A4

H1
H12

C1228

C1228
1uF_6.3V

1uF_6.3V

C1236

C1236
100nF_6.3V

100nF_6.3V

C1247

C1247
1uF_6.3V

1uF_6.3V

U6

U6

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

23CC1287QB1A

23CC1287QB1A

C1237

C1237
100nF_6.3V

100nF_6.3V

C1248

C1248
1uF_6.3V

1uF_6.3V

1

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4

VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSS

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA

VDDA#K12

VSSA#J12

VSSA

RFU2
RFU1
RFU0

MF

GND | VDD

GND | VDD

C1238

C1238

C1239

C1239

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1249

C1249

C1250

C1250

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C1256

C1255

C1255

4.7uF_6.3V

4.7uF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Sheet

Sheet

Sheet

C1256

4.7uF_6.3V

4.7uF_6.3V

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

of

821

of

821

of

821

1

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

K1
K12

J12
J1

J3
J2
V4

A9

C1240

C1240
100nF_6.3V

100nF_6.3V

C1251

C1251
1uF_6.3V

1uF_6.3V

Doc No.

Doc No.

Doc No.

+MVDD

+MVDD

C1206

C1206
100nF_6.3V

100nF_6.3V

+MVDD

C1241

C1241
100nF_6.3V

100nF_6.3V

C1252

C1252
1uF_6.3V

1uF_6.3V

C1257

C1257

4.7uF_6.3V

4.7uF_6.3V

102-B50102-00

102-B50102-00

102-B50102-00

C1207

C1207
10nF

10nF

C1242

C1242
100nF_6.3V

100nF_6.3V

C1253

C1253
1uF_6.3V

1uF_6.3V

+MVDD

RevDate:

RevDate:

RevDate:

+MVDD

B1206B1206
B1208B1208

C1243

C1243
100nF_6.3V

100nF_6.3V

C1254

C1254
1uF_6.3V

1uF_6.3V

C1260

C1260

4.7uF_6.3V

4.7uF_6.3V

25

25

25

www.vinafix.vn

5

DQC_[63..0](6)

DQC_26

R1401

R1401

1.15K

1.15K

R1409

R1409
2K74

2K74

R1413

R1413

1.15K

1.15K

R1417

R1417
2K74

2K74

DQC_25
DQC_24
DQC_27
DQC_30
DQC_28
DQC_29
DQC_31
DQC_8
DQC_9
DQC_10
DQC_11
DQC_12
DQC_14
DQC_13
DQC_15
DQC_7
DQC_5
DQC_6
DQC_4
DQC_0
DQC_2
DQC_1
DQC_3
DQC_21
DQC_22
DQC_23
DQC_20
DQC_17
DQC_18
DQC_16
DQC_19

RASC0b(6)

MAC_BA0
MAC_BA1

MAC_7
MAC_8
MAC_3
MAC_10
MAC_11
MAC_2
MAC_1
MAC_0
MAC_9
MAC_6
MAC_5
MAC_4

CASC0b(6)
CKEC0(6)

MAC_BA2

CSC0b_0(6)

WEC0b(6)
CLKC0b(6)

CLKC0(6)

QSC_3
QSC_1
QSC_0
QSC_2

QSCb_3
QSCb_1
QSCb_0
QSCb_2

DQMCb_3
DQMCb_1
DQMCb_0
DQMCb_2

DRAM_RST(5,8)

+MVDD

+MVDD

QSC_0
QSC_1
QSC_2
QSC_3
QSC_4
QSC_5
QSC_6
QSC_7

D D

QSCb_0
QSCb_1
QSCb_2
QSCb_3
QSCb_4
QSCb_5
QSCb_6
QSCb_7

DQMCb_[7..0](6)

C C

QSCb_[7..0] (6)

DQMCb_0
DQMCb_1
DQMCb_2
DQMCb_3
DQMCb_4
DQMCb_5
DQMCb_6
DQMCb_7

MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

+MVDD

C1401

C1401
10nF

10nF

QSC_[7..0] (6)

B B

+MVDD

C1421

C1421
10nF

10nF

+MVDD

R1423 60.4RR1423 60.4R

CLKC1(6)

R1427 60.4RR1427 60.4R

CLKC1b(6)

R1431 121RR1431 121R

CKEC1(6)

R1435 121RR1435 121R

CSC1b_0(6)

R1439 121RR1439 121R

WEC1b(6)

R1443 121RR1443 121R

RASC1b(6)

R1447 121RR1447 121R

CASC1b(6)

R1402

R1402
243R

243R

C1414

C1414
1uF_6.3V

1uF_6.3V

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10
R11
M10
N11

L10
M11
G10

F11

F10
E11
C10
C11
B10
B11

G3

F2
F3

E2
C3
C2

B3

B2

H10

G9
G4

L4

K2
M9

K11

L9

K10
H11

K9
M4

K3
H2

K4

F9
H9
H3

F4
H4

J10
J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

H1

H12

C1426

C1426
1uF_6.3V

1uF_6.3V

CLKC0(6)
CLKC0b(6)

CKEC0(6)
CSC0b_0(6)
WEC0b(6)
RASC0b(6)
CASC0b(6)

U7

U7

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

23CC1287QB1A

23CC1287QB1A

R1421 60.4RR1421 60.4R
R1424 60.4RR1424 60.4R

R1429 121RR1429 121R
R1432 121RR1432 121R
R1436 121RR1436 121R
R1440 121RR1440 121R
R1444 121RR1444 121R

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA#K12

VSSA#J12

GND | VDD

GND | VDD

+MVDD

C1482

C1479

C1479

C1480

C1477

C1477

C1478

C1478

1uF_6.3V

1uF_6.3V

100nF_6.3V

C1504

C1504
100nF_6.3V

100nF_6.3V

100nF_6.3V

C1505

C1505
1uF_6.3V

1uF_6.3V

A A

100nF_6.3V

100nF_6.3V

C1506

C1506
1uF_6.3V

1uF_6.3V

C1480
100nF_6.3V

100nF_6.3V

C1507

C1507
1uF_6.3V

1uF_6.3V

C1481

C1481
100nF_6.3V

100nF_6.3V

C1508

C1508
1uF_6.3V

1uF_6.3V

C1482
100nF_6.3V

100nF_6.3V

C1509

C1509
1uF_6.3V

1uF_6.3V

C1483

C1483
100nF_6.3V

100nF_6.3V

C1510

C1510
1uF_6.3V

1uF_6.3V

C1484

C1484
100nF_6.3V

100nF_6.3V

C1511

C1511
1uF_6.3V

1uF_6.3V

C1485

C1485
100nF_6.3V

100nF_6.3V

C1512

C1512
1uF_6.3V

1uF_6.3V

+MVDD

C1535

C1535

C1536

C1536

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1551

C1551
1uF_6.3V

1uF_6.3V

100nF_6.3V

C1552

C1552
1uF_6.3V

1uF_6.3V

C1542

C1542

4.7uF_6.3V

4.7uF_6.3V

5

C1543

C1543

4.7uF_6.3V

4.7uF_6.3V

C1544

C1544

4.7uF_6.3V

4.7uF_6.3V

+MVDD

A1

VDDQ

A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

+MVDD

A2

VDD

A11
F1
F12
M1
M12
V2
V11

B1

VSSQ

B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3

VSS

A10
G1
G12
L1
L12
V3
V10

K1

VDDA

K12

C1404

C1404

C1405

C1405

100nF_6.3V

100nF_6.3V

10nF

10nF

J12
J1

VSSA

J3

RFU2

J2

RFU1

V4

RFU0

A9

MF

+MVDD

+MVDD

+MVDD

C1487

C1487

C1488

100nF_6.3V

100nF_6.3V

C1514

C1514
100nF_6.3V

100nF_6.3V

+MVDD

C1488
100nF_6.3V

100nF_6.3V

C1515

C1515
1uF_6.3V

1uF_6.3V

C1537

C1537
100nF_6.3V

100nF_6.3V

C1486

C1486
100nF_6.3V

100nF_6.3V

C1513

C1513
1uF_6.3V

1uF_6.3V

+MVDD +MVDD

C1545

C1545

4.7uF_6.3V

4.7uF_6.3V

B1401B1401
B1403B1403

+MVDD

C1410

C1410
10nF

10nF

+MVDD

C1422

C1422
10nF

10nF

C1489

C1489
100nF_6.3V

100nF_6.3V

C1516

C1516
1uF_6.3V

1uF_6.3V

C1538

C1538
100nF_6.3V

100nF_6.3V

+MVDD

4

R1403

R1403

1.15K

1.15K

R1410

R1410
2K74

2K74

R1414

R1414

1.15K

1.15K

R1418

R1418
2K74

2K74

CKED1(6)
CSD1b_0(6)
WED1b(6)
RASD1b(6)
CASD1b(6)

C1490

C1490
100nF_6.3V

100nF_6.3V

C1517

C1517
1uF_6.3V

1uF_6.3V

C1539

C1539
100nF_6.3V

100nF_6.3V

4

3

DQMDb_[7..0](6)

QSD_0
QSD_1
QSD_2
QSD_3
QSD_4
QSD_5
QSD_6
QSD_7

QSDb_0
QSDb_1
QSDb_2
QSDb_3
QSDb_4
QSDb_5
QSDb_6
QSDb_7

MAD_[11..0](6)MAC_[11..0](6)

+MVDD

B1402B1402
B1404B1404

DQD_[63..0](6)

QSD_[7..0] (6)

QSDb_[7..0] (6)

DQMDb_0
DQMDb_1
DQMDb_2
DQMDb_3
DQMDb_4
DQMDb_5
DQMDb_6
DQMDb_7

DQD_24
DQD_25
DQD_26
DQD_27
DQD_31
DQD_28
DQD_29
DQD_30
DQD_10
DQD_11
DQD_8
DQD_12
DQD_9
DQD_15
DQD_14
DQD_13
DQD_6
DQD_4
DQD_7
DQD_5
DQD_2
DQD_0
DQD_1
DQD_3
DQD_22
DQD_23
DQD_21
DQD_20
DQD_19
DQD_16
DQD_17
DQD_18

RASD0b(6)

MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

MAC_BA[2..0](6)

MAD_BA[2..0](6)

+MVDD

C1411

C1411
10nF

10nF

C1423

C1423
10nF

10nF

MAC_BA0
MAC_BA1
MAC_BA2

MAD_BA0
MAD_BA1
MAD_BA2

R1406

R1406

1.15K

1.15K

R1411

R1411
2K74

2K74

R1415

R1415

1.15K

1.15K

R1419

R1419
2K74

2K74

CASD0b(6)
CKED0(6)

CSD0b_0(6)
WED0b(6)
CLKD0b(6)

CLKD0(6)

+MVDD

+MVDD

MAD_BA2

QSD_3
QSD_1
QSD_0
QSD_2

QSDb_3
QSDb_1
QSDb_0
QSDb_2

DQMDb_3
DQMDb_1
DQMDb_0
DQMDb_2

MAD_BA0
MAD_BA1

MAD_7
MAD_8
MAD_3
MAD_10
MAD_11
MAD_2
MAD_1
MAD_0
MAD_9
MAD_6
MAD_5
MAD_4

R1405

R1405
243R

243R

C1417

C1417
1uF_6.3V

1uF_6.3V

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2

F3

E2
C3
C2

B3

B2

H10

G9
G4

L4

K2
M9

K11

L9

K10
H11

K9
M4

K3
H2

K4

F9
H9
H3

F4
H4
J10

J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

H1

H12

C1430

C1430
1uF_6.3V

1uF_6.3V

U9

U9

23CC1287QB1A

23CC1287QB1A

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

+MVDD

C1434

C1434

C1435

100nF_6.3V

100nF_6.3V

C1456

C1456
1uF_6.3V

1uF_6.3V

C1435
100nF_6.3V

100nF_6.3V

C1457

C1457
1uF_6.3V

1uF_6.3V

C1436

C1436
100nF_6.3V

100nF_6.3V

C1458

C1458
1uF_6.3V

1uF_6.3V

C1437

C1437
100nF_6.3V

100nF_6.3V

C1459

C1459
1uF_6.3V

1uF_6.3V

C1438

C1438
100nF_6.3V

100nF_6.3V

C1460

C1460
1uF_6.3V

1uF_6.3V

C1439

C1439
100nF_6.3V

100nF_6.3V

C1461

C1461
1uF_6.3V

1uF_6.3V

C1433

C1433
100nF_6.3V

100nF_6.3V

C1455

C1455
1uF_6.3V

1uF_6.3V

+MVDD

C1499

C1499

C1534

C1534

100nF_6.3V

1uF_6.3V

1uF_6.3V

100nF_6.3V

C1526

C1526

4.7uF_6.3V

4.7uF_6.3V

U8

R1404

R1404
243R

243R

C1420

C1420
1uF_6.3V

1uF_6.3V

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10
R11
M10
N11

L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2
F3

E2
C3
C2

B3

B2

H10

G9
G4

L4

K2
M9

K11

L9

K10
H11

K9
M4

K3
H2

K4

F9
H9
H3

F4
H4

J10
J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

H1

H12

U8

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

23CC1287QB1A

23CC1287QB1A

C1428

C1428
1uF_6.3V

1uF_6.3V

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4

VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA#K12

VSSA#J12

GND | VDD

GND | VDD

DQC_45
DQC_47
DQC_46
DQC_44
DQC_41
DQC_43
DQC_40
DQC_42
DQC_56
DQC_59
DQC_57
DQC_58
DQC_60
DQC_63
DQC_62
DQC_61
DQC_54
DQC_53
DQC_55
DQC_52
DQC_50
DQC_49
DQC_48
DQC_51
DQC_39
DQC_36
DQC_38
DQC_37
DQC_34
DQC_33
DQC_32
DQC_35

MAC_BA2
MAC_BA1
MAC_BA0

MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

CSC1b_0(6)
WEC1b(6)
RASC1b(6)
CASC1b(6)
CKEC1(6)
CLKC1b(6)

CLKC1(6)

QSC_5
QSC_7
QSC_6
QSC_4

QSCb_5
QSCb_7
QSCb_6
QSCb_4

DQMCb_5
DQMCb_7
DQMCb_6
DQMCb_4

DRAM_RST(5,8)

+MVDD

+MVDD

+MVDD +MVDD

R1425 60.4RR1425 60.4R

CLKD1(6)

R1428 60.4RR1428 60.4R

CLKD1b(6)

C1491

C1491
100nF_6.3V

100nF_6.3V

C1518

C1518
1uF_6.3V

1uF_6.3V

R1433 121RR1433 121R
R1437 121RR1437 121R
R1441 121RR1441 121R
R1445 121RR1445 121R
R1448 121RR1448 121R

C1493

C1493

C1492

C1492

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1520

C1520

C1519

C1519

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C1494

C1494
100nF_6.3V

100nF_6.3V

C1521

C1521
1uF_6.3V

1uF_6.3V

C1495

C1495
100nF_6.3V

100nF_6.3V

C1522

C1522
1uF_6.3V

1uF_6.3V

CKED0(6)
CSD0b_0(6)
WED0b(6)
RASD0b(6)
CASD0b(6)

VDDQ

VDD

VSSQ

VSS

VDDA

VSSA

RFU2
RFU1
RFU0

MF

CLKD0(6)
CLKD0b(6)

C1496

C1496
100nF_6.3V

100nF_6.3V

C1523

C1523
1uF_6.3V

1uF_6.3V

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

K1
K12

J12
J1

J3
J2
V4

A9

R1422 60.4RR1422 60.4R
R1426 60.4RR1426 60.4R

R1430 121RR1430 121R
R1434 121RR1434 121R
R1438 121RR1438 121R
R1442 121RR1442 121R
R1446 121RR1446 121R

C1497

C1497
100nF_6.3V

100nF_6.3V

C1524

C1524
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

C1406

C1406
100nF_6.3V

100nF_6.3V

C1498

C1498
100nF_6.3V

100nF_6.3V

C1525

C1525
1uF_6.3V

1uF_6.3V

C1407

C1407
10nF

10nF

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4

VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F12
VDD#M12

VDD#V11

VSSQ#B4

VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1

VSSQ#P4

VSSQ#P9

VSSQ#P12

VSSQ#T1

VSSQ#T4

VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G12

VSS#V10

VDDA#K12

VSSA#J12

C1527

C1527

4.7uF_6.3V

4.7uF_6.3V

VDDQ

VDD
VDD#F1
VDD#M1
VDD#V2

VSSQ

VSS

VSS#G1

VSS#L1

VSS#L12

VSS#V3

VDDA

VSSA

RFU2
RFU1
RFU0

GND | VDD

GND | VDD

C1440

C1440
100nF_6.3V

100nF_6.3V

C1462

C1462
1uF_6.3V

1uF_6.3V

2

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

+MVDD
A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

C1403

C1403
10nF

10nF

+MVDD

C1412

C1412
10nF

10nF

B1405B1405
B1407B1407

K1
K12

C1402

C1402
100nF_6.3V

100nF_6.3V

J12
J1

J3
J2
V4

A9

MF

+MVDD+MVDD

+MVDD

C1424

C1424
10nF

10nF

+MVDD

R1407

R1407

1.15K

1.15K

R1412

R1412
2K74

2K74

R1416

R1416

1.15K

1.15K

R1420

R1420
2K74

2K74

DRAM_RST(5,8)DRAM_RST(5,8)

CSD1b_0(6)
WED1b(6)
RASD1b(6)
CASD1b(6)
CKED1(6)
CLKD1b(6)

CLKD1(6)

+MVDD

DQD_46
DQD_44
DQD_45
DQD_47
DQD_40
DQD_43
DQD_41
DQD_42
DQD_58
DQD_57
DQD_59
DQD_56
DQD_61
DQD_60
DQD_63
DQD_62
DQD_55
DQD_54
DQD_50
DQD_53
DQD_51
DQD_49
DQD_52
DQD_48
DQD_39
DQD_37
DQD_38
DQD_36
DQD_34
DQD_32
DQD_35
DQD_33

MAD_BA2
MAD_BA1
MAD_BA0

QSD_5
QSD_7
QSD_6
QSD_4

QSDb_5
QSDb_7
QSDb_6
QSDb_4

DQMDb_5
DQMDb_7
DQMDb_6
DQMDb_4

MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

R1408

R1408
243R

243R

C1419

C1419
1uF_6.3V

1uF_6.3V

T3
T2
R3
R2
M3
N2
L3

M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2

F3

E2

C3

C2

B3

B2

H10

G9

G4

L4

K2

M9
K11

L9
K10
H11

K9

M4

K3

H2

K4

F9

H9

H3

F4

H4

J10
J11

P3
P10
D10

D3

P2
P11
D11

D2

N3
N10
E10

E3

V9

A4

H1
H12

U10

U10

23CC1287QB1A

23CC1287QB1A

C1432

C1432
1uF_6.3V

1uF_6.3V

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

BA2 | RAS
BA1 | BA0
BA0 | BA1

A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4

CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREF
VREF#H12

1

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4
VDDQ#E9

VDDQ#E12

VDDQ#J4

VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9

VDDQ#N12

VDDQ#R1
VDDQ#R4
VDDQ#R9

VDDQ#R12

VDDQ#V1

VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VDDA

VDDA#K12

VSSA#J12

VSSA

RFU2
RFU1
RFU0

GND | VDD

GND | VDD

VDD

VSS

MF

+MVDD

+MVDD

C1449

C1444

C1444

C1445

C1445

C1446

C1441

C1441

C1442

C1442

C1443

C1443

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1463

C1463

C1464

C1464

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

+MVDD +MVDD

C1529

C1529

C1528

C1528

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

100nF_6.3V

100nF_6.3V

C1465

C1465
1uF_6.3V

1uF_6.3V

+MVDD

100nF_6.3V

C1466

C1466
1uF_6.3V

1uF_6.3V

C1500

C1500
100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C1467

C1467
1uF_6.3V

1uF_6.3V

C1501

C1501
100nF_6.3V

100nF_6.3V

C1446
100nF_6.3V

100nF_6.3V

C1468

C1468
1uF_6.3V

1uF_6.3V

C1502

C1502
100nF_6.3V

100nF_6.3V

C1447

C1447
100nF_6.3V

100nF_6.3V

C1469

C1469
1uF_6.3V

1uF_6.3V

C1503

C1503
1uF_6.3V

1uF_6.3V

C1448

C1448
100nF_6.3V

100nF_6.3V

C1470

C1470
1uF_6.3V

1uF_6.3V

C1449
100nF_6.3V

100nF_6.3V

C1471

C1471
1uF_6.3V

1uF_6.3V

C1530

C1530

4.7uF_6.3V

4.7uF_6.3V

C1450

C1450
100nF_6.3V

100nF_6.3V

C1472

C1472
1uF_6.3V

1uF_6.3V

C1531

C1531

4.7uF_6.3V

4.7uF_6.3V

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

K1
K12

J12
J1

J3
J2
V4

A9

C1451

C1451
100nF_6.3V

100nF_6.3V

C1473

C1473
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

C1408

C1408
100nF_6.3V

100nF_6.3V

C1452

C1452
100nF_6.3V

100nF_6.3V

C1474

C1474
1uF_6.3V

1uF_6.3V

C1532

C1532

4.7uF_6.3V

4.7uF_6.3V

C1409

C1409
10nF

10nF

C1453

C1453
100nF_6.3V

100nF_6.3V

C1475

C1475
1uF_6.3V

1uF_6.3V

C1533

C1533

4.7uF_6.3V

4.7uF_6.3V

+MVDD

B1406B1406
B1408B1408

C1454

C1454
100nF_6.3V

100nF_6.3V

C1476

C1476
1uF_6.3V

1uF_6.3V

+MVDD

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

C1540

C1540
1uF_6.3V

1uF_6.3V

C1546

C1546

4.7uF_6.3V

4.7uF_6.3V

C1547

C1547

4.7uF_6.3V

4.7uF_6.3V

C1548

C1548

4.7uF_6.3V

4.7uF_6.3V

C1549

C1549

4.7uF_6.3V

4.7uF_6.3V

C1541

C1541
100nF_6.3V

100nF_6.3V

C1550

C1550
1uF_6.3V

1uF_6.3V

3

2

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

921

of

921

of

921

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

8

7

6

5

4

3

2

1

D D

C C

B B

BK49
BL51

BJ50

BG52

BF48
BE49

BE51
BD52

BD48
BC49

BC51
BB52

BB48
BA49

BA51
AY52

AY48

AW49
AW51

AV52
AV48

AU49
AU51

AT52
AT48

AR49
AR51

AP52
AP48

AN49
AN51

AM52

BM47

BK46

U1J

U1J

SP_RX0P
SP_RX0N

SP_RX1P
SP_RX1N

SP_RX2P
SP_RX2N

SP_RX3P
SP_RX3N

SP_RX4P
SP_RX4N

SP_RX5P
SP_RX5N

SP_RX6P
SP_RX6N

SP_RX7P
SP_RX7N

SP_RX8P
SP_RX8N

SP_RX9P
SP_RX9N

SP_RX10P
SP_RX10N

SP_RX11P
SP_RX11N

SP_RX12P
SP_RX12N

SP_RX13P
SP_RX13N

SP_RX14P
SP_RX14N

SP_RX15P
SP_RX15N

SP_REFCLKP
SP_REFCLKN

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

SP_TX0P

SP_TX0N

SP_TX1P

SP_TX1N

SP_TX2P

SP_TX2N

SP_TX3P

SP_TX3N

SP_TX4P

SP_TX4N

SP_TX5P

SP_TX5N

SP_TX6P

SP_TX6N

SP_TX7P

SP_TX7N

SP_TX8P

SP_TX8N

SP_TX9P

SP_TX9N

SP_TX10P
SP_TX10N

SP_TX11P
SP_TX11N

SP_TX12P
SP_TX12N

SP_TX13P
SP_TX13N

SP_TX14P
SP_TX14N

SP_TX15P
SP_TX15N

SP_CALRP
SP_CALRN

BH48
BH46

BC45
BC44

BB45
BB44

AY42
AY41

AY45
AY44

AW42
AW41

AW45
AW44

AU42
AU41

AU45
AU44

AT42
AT41

AT45
AT44

AR42
AR41

AR45
AR44

AN42
AN41

AN45
AN44

AM42
AM41

AH39
AH38

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

8

7

6

5

4

3

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

10 21

of

10 21

of

10 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

8

Input Bulk CAPs

+VDDC_Source

+VDDC_Source

D D

C C

B B

PHASE1

603 603

Place across
Q613, Q614

RC snubber values shown
are for reference only,
tuning is required

A A

+VDDC_Source

MC623

MC623
470UF_16V

470UF_16V

TH 10x12.5mm TH 10mm Dia

TH 8mm Dia

Overlap

+VDDC_Source

MC630

MC630
470UF_16V

470UF_16V

TH 10x12.5mm

TH 8mm Dia

TH 10x12.5mm

Overlap

+VDDC_Source

MC636

MC636
470UF_16V

470UF_16V

TH 8mm Dia

+12V_BUS

IND_0.47uH_7A

IND_0.47uH_7A

C633

C633

C632

C632

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

805 805

Mirrored on PCB

C634

C634

C635

C635

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

805805 805 805

678

9

Q601

Q601
BSC120N03LSG

BSC120N03LSG

Pad

Pad

Thermal

Thermal

123

4 5

UGATE1 UGATE1

567

8

9

Q603

Q603
BSC042N03LSG

BSC042N03LSG

432

1

LGATE1

+VDDC

R696

R696
300R

300R

805 6.3V

8

Q604

Q604
BSC042N03LSG

BSC042N03LSG

LGATE1

+VDDC

Thermal

Thermal

7

+VDDC_ExtSource

+VDDC_ExtSource

+VDDC_ExtSource

+VDDC_ExtSource

TH 10mm Dia

+VDDC_ExtSource +VDDC_ExtSource

L621

L621

DUAL FOOTPRINT

C621

C621

C622

C622

10UF_16V

10UF_16V

10UF_16V

10UF_16V

12061206

Mirrored on PCB

C663

C663

C640

C640

10UF_16V

10UF_16V

10UF_16V

10UF_16V

12061206

Mirrored on PCB

678

9

Q602

Q602
BSC120N03LSG

BSC120N03LSG

Pad

Pad

123

4 5

567

8

9

432

1

FB_S

C647

C647

C646

C646

C645

C645

Y5V

Y5V

Y5V

10uf

10uf

10uf

10uf

10uf

10uf

1206 6.3V

1206 6.3V

1206 6.3V

7

MC626

MC626
470UF_16V

470UF_16V

TH 8mm Dia

MC637

MC637
470UF_16V

470UF_16V

TH 8mm Dia

MC657

MC657
470UF_16V

470UF_16V

TH 8mm DiaTH 10mm Dia

C600

C600
150nF_16V

150nF_16V

603

R604

R604

4.32K

4.32K

1/10W
0603

C648

C648
10uf

10uf

1206

Overlap

Overlap

Overlap

1 2

PCMB103T-R47MS

PCMB103T-R47MS

L602

L602

1 2

PCMB103T-R47MS

PCMB103T-R47MS

C604 100nFC604 100nF

CSP1

Y5V

C690

C690
100uF_16V

100uF_16V

TH
6x7mm

+VDDC_Source

L601

L601

X7R

6

Choosing Different Gate Drive

Populate Do Not PopulateGate Drive

5V Gate Drive R630, R670, C660,

R631, R632

8V Gate Drive R631, R632,

R630, C660,
R661, Q661

12V Gate Drive R630, C660,

R670

12V Bus power for 12V
Gate Drive

+12V_BUS +12V_BUS

402

C695

C695
100uF_16V

100uF_16V

TH
6x7mm

C639

C639
150nF_16V

150nF_16V

Overlap

Overlap

C614 100nFC614 100nF

X7R

12

PCMB103T-R47MS

PCMB103T-R47MS

12

R614

R614

4.32K

4.32K

1/10W
0603

CSP2

603

PCMB103T-R47MS

PCMB103T-R47MS

Overlap

Overlap

R605

R605

1.47K

1.47K

C605

C605

100nF_6.3V

100nF_6.3V

+VDDC

100nF_6.3V

100nF_6.3V

+VDDC_ExtSource

C615

C615

R615

R615

1.47K

1.47K

CSN2

CSN1

6

R661, Q661

R670

R631, R632,
R661, Q661

Pass Transistor Circuit for 8V Gate Drive

This circuit is only for 8V
gate drive application

C625

C625
10UF_16V

10UF_16V

C665

C665
10UF_16V

10UF_16V

1206

L611

L611

L612

L612

FB_S

5

Assume VCC consumes 200mA total including
5VCC providing buffered output sourcing a
minimum 20mA requirement

32

R661

R661
10K

10K

1

SI2304DS

SI2304DS
Q661

Q661

VCC

L622

L622

IND_0.47uH_7A

IND_0.47uH_7A

DUAL FOOTPRINT

C624

C624
10UF_16V

10UF_16V

12061206

Mirrored on PCB

C664

C664
10UF_16V

10UF_16V

1206

Mirrored on PCB

678

9

Thermal

Thermal

Pad

Pad

123

4 5

BSC120N03LSG

BSC120N03LSG

UGATE2 UGATE2

567

8

9

Q613

Q613

BSC042N03LSG

BSC042N03LSG

432

1

C661

C661
15nF

15nF

5

P(Q_8VCC)max = (12V-8V)*0.2A = 800mW

VCCDRV

+12V_EXT

C628

C628

C627

C627

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

805805

Mirrored on PCB

C631

C631

C629

C629

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

Mirrored on PCBMirrored on PCB

678

123

8

1

9

Thermal

Thermal

Pad

Pad

4 5

567

9

432

LGATE2LGATE2

Q612

Q612

BSC120N03LSG

BSC120N03LSG

Q611

Q611

Q614

Q614

BSC042N03LSG

BSC042N03LSG

+VDDC+VDDC

C650

C650
15nF

15nF

402 402 603402 402 603

4

OPTIONAL

Rdroop

C694

C694

1206

1UF_16V

1UF_16V

X5R

X7R

16V

603

OPTIONAL

PHASE2

805805

Place across
Q613, Q614

RC snubber values shown
are for reference only,
tuning is required

4

Reserved for ARIES-II

+12V_EXT

UGATE2

C612

C612

U601

U601

1uF

1uF

uPI6201BQ

uPI6201BQ

PHASE2

19

0R
R6130RR613

VCC

0R
R6030RR603

PHASE1

C602

C602
1uF

1uF

+VDDC

+VDDC

+VDDC

+VDDC

20

21

22

23

24
25

26
27
28
29

UGATE1

R601 0RR601 0R

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

PHASE2

LGATE2

VCCDRV/DROOP

VCC

LGATE1

PHASE1
PGND

PGND26
PGND27
PGND28
PGND29

LGATE2

Droop Option

LGATE1

Populate - For 5V Gate Drive application
Remove - For 8V or 12V Gate Drive application

3

VDDC_REFIN

Overlap the footprints
for MR655 and C655

VCC2

PGND Option

0R
R6110RR611

18

UGATE2

17

BOOT2

16

REFOUT/POK

15

REFIN/EN

UGATE11BOOT125VCC3AGND4BUSEN5CSP1

C660

C660
1uF_6.3V

1uF_6.3V

402

6.3V 402 10V

Y5V

5VCC applied externally or generated internally from the IC, must
be in regulation before IC start soft-start sequence.

1. For 5V Gate Drive application:
External filtered +5V_EXT is applied to this pin.

2. For 8V or 12V Gate Drive application:
+5VCC is generated internally and this is an output with
20mA minimum current capability

VDDC_EN(13)

***

C641

C641
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

+VDDC

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

+VDDC

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

+VDDC

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

+VDDC

***

***

2.5V, 9mR
SP/POSCAP,
SMT 7343 2MM H

5VCC

Mirrored on PCB

Mirrored on PCB

Mirrored on PCB

Mirrored on PCB

3

2

+VDDC

12

NS600

NS600
NS_VIA

NS_VIA

VDDC_FB_TRACE

RFB1

R651

R651

5.11K

5.11K

402

COMP_FB

14

Current
Compensation

Css if
current
comp.
not
used

SS_ICOMP

402

C655

C655

402

10nF_25V

10nF_25V

402

6.3V

25V

13

FB

Iout

Droop Option

Iout (13)

Rdroop

CSP2

CSN2

CSN1

CSP1

PH2_ENb (13)

COMP/DROOP

CSP2

CSN2

CSN1

12

R_RT

R655

R655

402

30.1K

30.1K

11

RT

10

9

8

7

SS/ICOMP

IOUT/IMAX/DROOP

6

X5R

PH2_ENb

- When +12V_EXT=ON, PH2_ENb=Low, Phase 2 Enabled

- When +12V_EXT=OFF, PH2_ENb=Hi , Phase 2 Disabled

C638

C638
1nF

1nF

402 10V
X5R

X7R402
50V

X7R402
50V

5VCC (13,14)

VCCDRV

R685 0RR685 0R

share pad

VDDC PWM Whole CHip Enable

SS_ICOMP

VDDC_REFIN

+VDDC+VDDC +VDDC+VDDC

***

C643

C643
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

***

C644

C644
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

***

C642

C642
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

Place seperately

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

11 21

11 21

11 21

VDDC_FB

Rdroop

of

of

of

FB_S

R3

R653

R653
10K

10K

402

C3

C653

C653

4.7NF_50V

4.7NF_50V

402

1

VDDC_FB (13)VDDC_REFIN (13)

Type III compensation

COMP_GND

Rj1

402

Rj2

R6560RR656
0R

402

R1

R652

R652

40.2K

40.2K

402

C1

C652

C652

4.7NF_50V

4.7NF_50V

402

VDDC_FB_TRACE

DNI

Doc No.

Doc No.

Doc No.

102-B50102-00

102-B50102-00

102-B50102-00

1

C2

C651

C651
15pF

15pF

402

RevDate:

RevDate:

RevDate:

25

25

25

www.vinafix.vn

8

7

6

5

4

3

2

1

Thermal

Thermal

Pad

Pad

+MVDDC_S

9

6
7
8

Place Rs and Cs across QL

RC snubber values shown
are for reference only,
tuning is required

MVDDC_FB

C715

C715

C716

C716

10UF

10UF

10UF

10UF

12061206

Mirrored on PCB

ML701 PCMC104T-1R5MNML701 PCMC104T-1R5MN

1 2

1210
1%

402
X7R
25V

4mm Hi Max SM

11.7mm Hi Max SM

Rs

Cs

C717

C717

4.7uF_16V

4.7uF_16V

805 805

TH

MVDD_FB_TRACE

R1

RFB1

R711

R711
10K

10K

402
1%

Mirrored on PCB

overlap

C713

C713

2.2nF_50V

2.2nF_50V

402

16V

10%

X7R

R7131KR713
1K

402
5%

Place R1 and
R4 close to
PWM and
routed with
separate
20mil trace to
the ASIC

C719

C719

4.7uF_16V

4.7uF_16V

12

NS700

NS700
NS_VIA

NS_VIA

C718

C718
150nF_16V

150nF_16V

603

C721

C721
15nF

15nF

402 402 603

C730

C730
470uF_25V

470uF_25V

TH 10x12.5mm

***

C725

C725
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

+MVDD

***

C726

C726
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

Q701

Q701

QH

+PW_MVDDC_HGD

C703

C703

0.22uF

0.22uF

MVDD_EN (13)

402

D D

+MVDDC_B

+PW_MVDDC_HGD

+PW_MVDDC_LGD

U703

U703

1

BOOT

2

UGATE

3

GND
LGATE4VCC

UP6101BS8-A

UP6101BS8-A

PHASE

COMP

FB

8
7
6
5

+PW_MVDDC_M
MVDDC_COMP

MVDDC_FB

+MVDD_VCC

place R715 close to IC pin4

R721 0RR721 0R

+PW_MVDDC_HGDR

402

4 5
3
2
1

BSC042N03LSG

BSC042N03LSG

+PW_MVDDC_M

Q702

Q702

QL

Thermal

Thermal

Pad

Pad

BSC020N03LSG

BSC020N03LSG

9

6
7
8

+PW_MVDDC_LGD

C C

R722 0RR722 0R

+PW_MVDDC_LGDR

603

4 5
3
2
1

MVDDC_FB(13)

Layout guideline

1-Position the controller (U703) such that LGate(pin4) is the closet to gate
of the MOSFETs. You can place the gate resistors R721 and R722 next to the gate
of the MOSFETs. Make the gate drive traces(PW MVDDC LGD and PW MVDDC HGD) as
short and as wide as possible to reduce the trace inductance.
2-Place the bypass capacitors for Vcc as well as Boost caps as close to the
controller as possible. They are as follows;
Vcc bypass cap is C703, and Boost cap is C705.
3-Voltage amplifier compensation network. Place C714 close to the pin 7. Place
the rest of the compensation network close to the pins 7 and 6. These are R710,
R711, R713, C713 and R712, C711 and C712.

+PW_MVDDC_HGDR

B B

+MVDDC_S

+PW_MVDDC_LGDR

MULTI FOOTPRINT

+PW_MVDDC_M

COMPENSATION CIRCUIT FILTERED SMPS VCC BOOT CIRCUIT

+12V_BUS

402

A A

C711

C711

8.2nF_25V

8.2nF_25V

402

10V
10%

R712

R712

33.2K

33.2K

402
1%

MVDDC_COMP

C712

C712
15pF_50V

15pF_50V

603

50V

NPOX7R

5%

R7090RR709
0R

share pad of R714,R709

8

402
X5R

MVDDC_FB

10V
10%

+MVDD_VCC

7

+12V_BUS

R707

R707

2.2R

2.2R

C707

C707
100nF

100nF

603
X7R
5%

C705

C705
100nF

100nF

603 X7R
5%

6

+MVDDC_B

16V

+PW_MVDDC_M

5

4

3

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

12 21

12 21

12 21

RevDate:

RevDate:

RevDate:

25

25

of

of

of

Doc No.

Doc No.

Doc No.

102-B50102-00

102-B50102-00

102-B50102-00

1

25

www.vinafix.vn

5

J1601

J1601
6P_HDER

6P_HDER

1

+12V_1

2

+12V_2

3

+12V_3

4

GND_1

6

GND_2

5

Sense

D D

12V_EXT Connector

C1623

C1623

C1601

C1601

47pF_50V

47pF_50V

220pF_50V

220pF_50V

Overlap MC1603 and C1603

SENSE_GND_PIN

C1608

C1608
47pF_50V

47pF_50V

AUX plug
Enforcment
option
(BUO not for
production)

DNI

+12V_BUS

C C

PH2_ENb

R1620 10KR1620 10K

+3.3V_BUS

147

1
2

74VHC00MTC

74VHC00MTC

U1606A

U1606A
74VHC00MTC

74VHC00MTC

+12V_EXT

MC1603

C1602

C1602
220pF_50V

220pF_50V

R16091KR1609

1K

C1604

C1604

100nF_6.3V

100nF_6.3V

U1606B

U1606B

R1601

R1601
10K

10K

MC1603
10UF

10UF

+3.3V_BUS +3.3V_BUS +3.3V

R1615

R1615

R1610

R1610

10K

10K

2.2K

2.2K

PH2_ENb

Q1612

Q1612

1

MMBT3904

MMBT3904

2 3

R1633 5.1KR1633 5.1K

R16171KR1617
1K

R1637 5.1KR1637 5.1K

4

5

6

1

MMBT3904

MMBT3904

Q1613

Q1613

1

11

12

C1625

C1625

100nF_6.3V

100nF_6.3V

2

3

CP

D

FF_RST

D

CP

+3.3V_BUS

2 3

23

23

Q1614

Q1614

+3.3V_BUS

14

5V

GND7C

R1634

R1634

5.1K

5.1K

Q1602

Q1602
MMBT3904

MMBT3904

1

MMBT3904

MMBT3904

74LCX74

74LCX74
U1601B

U1601B

13

C

S

10

+3.3V_BUS

U1601A

U1601A
74LCX74

74LCX74

4

S

1

+3.3V_BUS

Q

Q

Q

Q

+12V_EXT

3

VDDC_EN is open collector and it is
deactivated (pulled down to ground)
when: EN_INTb =1 OR EN_Tb =1 OR (EN_EXTb
=1 AND SENSE_GND_PIN=0)

Phase Control Support

R1612

R1612
10K

10K

R1630

R1630
100K

100K

R16471KR1647

1K

1K
R16381KR1638

8

9

5

6

Q1605

Q1605

1

MMBT3904

MMBT3904

2 3

+3.3V_BUS +3.3V_BUS

R1650

R1650

5.1K

5.1K

R16481KR1648

Q1628

Q1628

1

MMBT3904

MMBT3904

2 3

+3.3V_BUS

+12V_BUS

74VHC00MTC

74VHC00MTC
U1606C

U1606C

9

10

R1627

R1627

180R

180R

R1628

R1628

R16162.2K R16162.2K

R16071K R16071K

DNI

1K

R1629

R1629
10K

10K

5.1K

5.1K

AUX Hot Plug/ Unplug Fault supprt

B B

+3.3V_BUS

R16910RR1691

0R

Critical Temperature Support

+3.3V_BUS

DNI

PERST#_buf(1,2)
GPIO_19_CTF(7)

A A

R1626

R1626

10K

10K

12

U1606D

U1606D

11

13

74VHC00MTC

74VHC00MTC

5

+3.3V_BUS

MMBT3904

MMBT3904

Q1603

Q1603

R1624

R1624

1

10K

10K

DNI

+VDDC_Source+MVDDC_S

FF_RST

+3.3V_BUS

C1607

C1607

100nF_6.3V

100nF_6.3V

U1605

U1605

8

7

NC7SZ74K8X

NC7SZ74K8X

2

D

Q

PR

Vcc

1

C

Q

G4CL

6

+3.3V_BUS

R1695

R1695

10K

10K

2 3

Q1604

Q1604
MMBT3904

MMBT3904

1

2 3

DNI

MVDD Input Option Circuit

+VDDC_Source

+MVDDC_S

4

R1649

R1649

5.1K

5.1K

Q1627

Q1627

1

MMBT3904

MMBT3904

2 3

+3.3V_BUS

12V/3.3V Bonding

R1697

R1697

2.2K

2.2K

Bypass Switch
(not for production)

R1604 2.2KR1604 2.2K

8

R1632

R1632

Q1618

Q1618

499R

499R

MMBT3906

MMBT3906

2 3

21

D1602D1602

1

FF_RST

5.1K

5.1K

1

R1631

R1631

R1613 499RR1613 499R

5

R1692

R1692

EN_Tb

3

2.2K

2.2K

R1635

R1635
10K

10K

R1696

R1696

2.2K

2.2K

R16221KR1622

1K

8 1

7 2

RP1202A 0RRP1202A 0R

4

EXT_12V_DET (7)

PH2_ENb (11)

12V AUX Power
up Fault Support

R16211KR1621

1K

1

MMBT3904

MMBT3904

R1608

R1608

100K

100K

Red LED On,
shows 12V
AUX fault

MMBT3906

MMBT3906
Q1620

Q1620

2 3

Red LED On, shows critical
temperature fault

R1603

R1603
180R

180R

D1601D1601

R1625

R1625
100K

100K

PTC

Q1631

Q1631

1

MMBT3904

MMBT3904

2 3

FAN_FULL_SPEED# (18)

Q1611

Q1611

1

MMBT3904

MMBT3904

2 3

7 2

6 3

5 4

6 3

8 1

5 4

RP1203B 0RRP1203B 0R

RP1203A 0RRP1203A 0R

RP1202B 0RRP1202B 0R

RP1202C 0RRP1202C 0R

RP1202D 0RRP1202D 0R

RP1203C 0RRP1203C 0R

RP1203D 0RRP1203D 0R

1

MMBT3904

MMBT3904

Q1601

Q1601

Q1615

Q1615

MMBT3904

MMBT3904

1

Q1630

Q1630

2 3

Q1607

Q1607

MMBT3904

MMBT3904

1

+3.3V_BUS

21

1

MMBT3904

MMBT3904

Q1609

Q1609

Bypass
Switch
(not for
production)

R16860RR1686

0R

MVDD_EN (12)

+VDDC_ExtSource

+MVDDC_S

2 3

2 3

MVDD_EN (12)

2 3

2 3

3

+3.3V

GPIO_5(7)
GPIO_21(7)

GPIO_18(7)
GPIO_15_PWRCNTL_0(7)
GPIO_20_PWRCNTL_1(7)

VDDC_REFIN(11)

R1687 & R1688 must
be selected to limit
MAX ref voltage to MAX
VDDC.

See BOM for qualified
values.

MVDDC Voltage Control

R16420R R16420R

R1676

R1676
10K

10K

VDDC_REFIN

GENERICF(7)

C659

C659
33nF_16V

33nF_16V

R636, R639
share pad

MVDDC_FB(12)

402
10V

R639 0RR639 0R

External Reference is used when
REFIN is driven by voltage ranged
from 0.4V to 3.3V

Internal Reference is used when
REFIN is pull-up to > 4.5V

RFB2

R4

10x Buffered VDDC Output Current Monitoring

Temp Comp

Rp

Rs

VDDC_EN (11)

PTC Themal Protection

Table 5

PTC

>= Themal shutdown temp (R>=4.7K)
< Themal shutdown temp (R < 4.7K)

32

Q1625

Q1625

1

SI2312BDS

SI2312BDS

C1614

PTC_I

C1614

100nF_6.3V

100nF_6.3V

32

Q1629

Q1629

SI2312BDS

SI2312BDS

1

C1622

C1622

100nF_6.3V

100nF_6.3V

- Place PTC1, PTC2 close to VDDC MOSFET

- Place PTC3, PTC4 close to MVDD

Overlap Pad of
R1653/MR1653

PTC_VDDC PTC_MVDD

X7R

402

50V

RT

Rs1

Requi

R16530RR1653

PTC_VDDC

0R

DNI

PTC2

MR33

MR33

470_Thermistor

470_Thermistor

0603

R16660RR1666

PTC_MVDD

0R

DNI 0603

PTC Comparator Solution

VREF_PTC

+5V

3

2

Place all parts close to the
regulator that uses the
voltage reference. R1673 &
R1674 can be placed close to
GPU for easy access to +3.3V.

U1604

U1604

1

VID2

2

VID1

3

VDA
VDD4VIDO

RT9401BPV8

RT9401BPV8

C1620

C1620
100nF_6.3V

100nF_6.3V

VDDC Vref Mode Selection

R639/C659 Vref (V)

NC 0.6

Populate

DNI

Populate

+VDDC

R16430R R16430R

R636

NC

402
10V
X5R

8

VID3

7

VID4

6

GND

5

set by VID IC (U1220)

+VDDC

+1.8V

R16181KR1618

1K

C1605

C1605
1uF_6.3V

1uF_6.3V

R1646 10KR1646 10K

C1609

C1609

1uF_6.3V

1uF_6.3V

+12V_BUS

1

R1677

R1677
10K

10K

+3.3V +3.3V

R710

R710

6.49K

6.49K

4-bit VID for VDDC Setting

(bit 5 is fixed to zero VID4=0)

R1674

R1674
10K

10K

VID0_VDDC
VID1_VDDC
VID2_VDDC
VID3_VDDC
VID4_VDDC

VID_VREF

R1680

R1680

R1679

R1679

10K

10K

10K

10K

R1688

R1688

6.19K

6.19K

5VCC

1%402

R40380RR4038
0R Q1622

+5V

+3.3V_BUS

R1687

R1687

C1621

C1621

1.87K

1.87K

33nF_16V

33nF_16V

Table 4

Vref Mode

5VCC (11,14)

Internal
External

VDDC Transient Test Circuit

RS1

For testing only, not intended for production

16-bit ADC for voltage & current read back

Place caps very
close to power pin

603

603

X7R

X7R

1%

1%

For testing only, not intended for production

Table 2: VDDC Enable/Shutdown

THEM_PRT

Low

Hi

MR1652

MR1652

47.5K

47.5K

PTC1

R1659

R1659
470_Thermistor

470_Thermistor

0603

+5V

R1681

R1681

47.5K

47.5K

PTC3

R1667

R1667
470R_THERMISTOR

470R_THERMISTOR

PTC4

R16680RR1668
0R

0603

PTC_II

EN_INTb asserted
(0) when:

EN_EXTb asserted
(0) when:

EN_Tb

EXT_12V_DET
(Active High)

R650 must be pouplated only if VID is not used and
VDDC VREFIN is pulled high to >4.5V.
Then this will set VDDC to a fixed value.

- VDDC Hi-Side Divider R651 is Fixed to 5.11K

- Vo = Vref * (1 + R651 / R650 )

- Vref = 0.6V

Overlap Pad of
R1666/MR1666

+12V_BUS & +3.3V_BUS
are passed the
threshold limit set by
the voltage dividers

External cable plugged in, and
+12V_EXT is passed the threshold
limit set by the voltage divider

This will be cleared at
power-up, and will be set when
Critical Temperature is reached

On rising edge of LDO_EN, condition
of PH2_EN is latched to determine
the status of EXT cable.

VDDC Low Side Divider

VDDC_FB(11)

+5V

VREF_PTC

Install only R1270 or MR1270

VDDC_FB

Overlap Pad of
R1686/MR1686

PTC

PTC_II

+3.3V_BUS

Place caps very
close to power pin

+VDDC+12V_BUS +MVDD

12

NS7

NS7
NS_VIA

NS_VIA

Connect to +VDDC &
+MVDD at the ASIC

12

NS8

NS8
NS_VIA

NS_VIA

A_VDDC_IOUT

A_VDDCIout
A_MVDD

For testing only, not intended for production

12V_BUS & 12V_EXT
Input Switch Circuit

+3.3V_BUS

R12511KR1251
1K

SENSE_GND_PIN

RFB2

402

FDS6675, -10A, -30V, SO-8 (2020002200G)
Alt. FDS7779Z, -16A, -30V, SO-8 (2020013800G)

Put copper area under Q1230/1231 for heat dissipation.

0: OFF / 1: ON

12V_BUS

0

2

R1250 0RR1250 0R

Table 3

12V_EXT

EXT_12V_DET

0NA
001

NA

10
111

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Power up Sequencing

R1614

R1614

5.1K

5.1K

5%

R1619 5.1KR1619 5.1K

5%

Q1608

Q1608
MMBT3904

MMBT3904

2 3

R1623 5.1KR1623 5.1K

5%

+12V_BUS

R1639

R1639
100K

100K

Q1621

Q1621

2 3

MMBT3904

MMBT3904

1

1

0: OFF / 1: ON

NA
11
0D0
00

1

R1256

R1256
10K

10K

R1257

R1257
10K

10K

Q3

Q1232

Q1232
MMBT3904

MMBT3904

2 3

23

MMBT3904

MMBT3904
Q1235

Q1235

Q4

R1258

R1258
10K

10K

R1259

R1259
10K

10K

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Sheet

Sheet

Sheet

1

R1254 5.1KR1254 5.1K

R1255 5.1KR1255 5.1K

DNI

Q1 Q2

NA

1

+3.3V_BUS

5.1K

5.1K
R1611

R1611

LDO_EN

Q1606

Q1606

1

MMBT3904

MMBT3904

2 3

Q1610

Q1610

1

MMBT3904

MMBT3904

2 3

+3.3V_BUS

Q1616

Q1616
SI2304DS

SI2304DS

3 2

C1606

C1606
10uF_X6S

10uF_X6S

R1640

R1640
10K

10K

Q1622
MMBT3904

MMBT3904

2 3

C1610

C1610
100NF

100NF

402
X5R
16V

See BOM for qualified config.

+VDDC_Source

S

23

1

G

D

TBD

NF1200

NF1200

1812L125-C

1812L125-C

Fuse P/N 5120003000G

TBD

G

1

2 3

S

Status

No Power, No boot

Board is Powered
by 12V_BUS, action taken by software

No 12V_BUS, No boot
Boot up in normal condition

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

of

13 21

of

13 21

of

13 21

Doc No.

Doc No.

Doc No.

1

LDO_EN (14)

MVDD_EN (12)

1

IRLML6402TR

IRLML6402TR

Q1231

Q1231

Q1230

Q1230

IRLML6402TR

IRLML6402TR

+MVDDC_S

102-B50102-00

102-B50102-00

102-B50102-00

+3.3V

R1636

R1636
100K

100K

LVT_EN (3)

+3.3V_BUS

DDC2DATA (3,18)
DDC2CLK (3,18)Iout(11)

Q1

Q2

RevDate:

RevDate:

RevDate:

25

25

25

www.vinafix.vn

8

7

6

5

4

3

2

1

LDO #2: Vout = +1.8V +/- 3%

Vin = 2.5V to 3.6V MAX Iout = 1.7A (TBV) RMS MAX

PCB: Min 70mm sq. copper area for cooling

R801

R801

2.4R_1210_0.5W

2.4R_1210_0.5W
R804

D D

+3.3V_BUS +1.8V+5V +3.3V

C C

LDO #3: Vout = +1.1V +/- 3%

R804

2.4R_1210_0.5W

2.4R_1210_0.5W
R806

R806

2.4R_1210_0.5W

2.4R_1210_0.5W

R810

R810

2.4R_1210_0.5W

2.4R_1210_0.5W

DNI

= 0.6R 2W Max total
dissipation 1.7W

LDO2_VIN

LDO_EN(13)

U801

LDO2_POK
LDO_EN LDO2_FB

C816

C816

C801

10uF_X6S

10uF_X6S

C801

10uF_X6S

10uF_X6S

C806

C806
1uF_6.3V

1uF_6.3V

U801

1

POK

2

EN

3

VIN
CNTL4NC

uPI7701U8

uPI7701U8

GND#8

VOUT

GND#9

FB

8
7
6

R808 1.5KR808 1.5K

5
9

DNI

R805

R805

13.0K

13.0K

R5

R809

R809

R4

10.2K

10.2K

VOUT = Vref x (1 + R5/R4)

Vin = +1.50V to 2.1VMAX Iout = Up to 1.3A (TBV) RMS MAX

C802

C802
33pF_50V

33pF_50V

C3

+1.8V

C805

C805

C803

C803

10uF_X6S

10uF_X6S

100nF_6.3V

DNI

100nF_6.3V

Install R817 if Y1 is a 1.8V Device
Install R807 if Y1 is a 3.3V Device

+1.8V

LDO2_POK

R817

R817

1.5K

1.5K

OSC_EN (3)

Regulators for +5V, +5V_VESA and +5V_VESA2

+12V_BUS

R803

R803
nanoSMDC020F

nanoSMDC020F

1206

0805

1206

0805

1/4W

1/8W

1206 0805

U802

U802

1

VIN

5

NC

8

NC#8
ADJ4VOUT

LM317LCDR

LM317LCDR

VOUT#2
VOUT#3
VOUT#6

2
3

R811

R811

6

499R

499R

7

0402

R1

1uF_6.3V

1uF_6.3V

R812

R812

1.5K

1.5K

0402

R2

+12V_BUS

1/4W

1/8W

5%

5%

C807

C807
100nF

100nF

0603
16V

Vout(V) = Vref (1+R2/R1)

1206

0805

1/4W

1/8W

5%

5%

+5V_VESA

C808

C808

+5V_VESA2

PCB: Min 70mm sq. copper area for cooling

0.1R

0.1R
MR814

MR814

+MVDD

1/2W 1210

1/4W 1206

LDO_EN(13)

Overlap footprints

LDO3_VIN

C813

C813

10uF_X6S

10uF_X6S

LDO_EN

C814

C814
1uF_6.3V

1uF_6.3V

U803

U803

1

POK

2

EN

3

VIN
CNTL4NC

uPI7701U8

uPI7701U8

GND#8

VOUT

GND#9

FB

8
7
6

R815 1.5KR815 1.5K

5
9

+1.1V+5V

R813

R813

3.83K

3.83K

LDO3_FB

DNI

R816

R816

10.2K

10.2K

R5

R4

VOUT = Vref x (1 + R5/R4)

C809

C809
33pF_50V

33pF_50V

C3

+1.1V

C810

C810

C812

C812

100nF_6.3V

100nF_6.3V

10uF_X6S

10uF_X6S

DNI

0603
16V

Vout(V) = Vref (1+R2/R1)

0402

R1

0402

R2

+12V_BUS

B B

1206

1/4W

5%

0603
16V

0805

1/8W

5%

Vout(V) = Vref (1+R2/R1)

Install only R839 or MR839
See BOM for qualified option

+5V_BAK

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

8

7

6

5

4

3

Title

5VCC

5VCC(11,13)

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

MR8390RMR839

1206

1/4W

5%

0R

0805

1/8W

5%

+5V

C839

C839

1uF_6.3V

1uF_6.3V

C838

C838

1uF_6.3V

1uF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

14 21

14 21

14 21

+5V_BAK

0402

R1

0402

R2

+5V_VESA

of

of

of

Doc No.

Doc No.

Doc No.

R8290RR829

0R

102-B50102-00

102-B50102-00

102-B50102-00

1

+5V_VESA2

RevDate:

RevDate:

RevDate:

25

25

25

www.vinafix.vn

8

A_DAC1_R(3)

R1027

A_DAC1_RB(3)

R1027

37.4R

37.4R

A_DAC1_G(3)

R1028

D D

A_DAC1_GB(3)

A_DAC1_B(3)

A_DAC1_BB(3)

R1028

37.4R

37.4R

R1029

R1029

37.4R

37.4R

7

6

L1001 47nHL1001 47nH

R1001

R1001
75R

75R

402

402

402

L1002 47nHL1002 47nH

R1002

R1002
75R

75R

402

402

402

L1003 47nHL1003 47nH

R1003

R1003
75R

75R

402

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

L100x and ML100x footprints are overlapped

402402

5

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F

DDCDATA_DAC1_R
DDCCLK_DAC1_R
HSYNC_DAC1_R

VSYNC_DAC1_R

4

For ESD ProtectionSee BOM for qualified filters

+3.3V

3

2

1

+5V_VESA

+5V_VESA

DDC2_MONID0
DDC2_MONID1(SDA)
DDC2_MONID2
DDC2_MONID3(SCL)

603

+5V

DB15 pin

R1005

R1005

2.2K

2.2K

C C

DDC4CLK(3)

DDC4DATA(3)

C1999 100nF_6.3VC1999 100nF_6.3V

HSYNC1(3,7)

VSYNC1(3,7)

+5V

14

2 3

1

7

4

5 6

U1999A

U1999A
74VHC125

74VHC125

74VHC125

74VHC125
U1999B

U1999B

HSYNC_DAC1_B

VSYNC_DAC1_B

DDCDATA_DAC1_5V DDCDATA_DAC1_R

+5V

R1008

R1008

2.2K

2.2K

DDCCLK_DAC1_5V

R1006 33RR1006 33R

R1009 33RR1009 33R

R1010

R1010

R1011

R1011

SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane

B B

10R

10R

10R

10R

402

402

402

402

DDCCLK_DAC1_R

HSYNC_DAC1_R

VSYNC_DAC1_R

T2X2M(3)
T2X2P(3)

T2X4M(3)
T2X4P(3)

DDCCLK_DAC1_R
DDCDATA_DAC1_R
VSYNC_DAC1_R

T2X1M(3)

+3.3V

2 3

R1023

R1023
10K

10K

1

R1022 10KR1022 10K

Q1021

Q1021

MMBT3904

MMBT3904

HPD2(7)

T2X1P(3)
T2X3M(3)

T2X3P(3)

HPD_DVI2

T2X0M(3)
T2X0P(3)

T2X5M(3)
T2X5P(3)

T2XCP(3)
T2XCM(3)

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F
HSYNC_DAC1_R

Standard VGA
Monitor ID bit 0

11

Monitor ID bit 1

12

Monitor ID bit 2

4

Monitor ID bit 3

15

N/C

9

Mechanical Key
Hardware
Support

No Yes Yes No Yes

Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997

+5V_VESA

25

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

C1
C2
C3
C4
C5
C6

26
27
28
29
30

DDC1 Host
Monitor ID bit 0

Data from display
Monitor ID bit 2
Open
+5V
50mA min
1A max

J1001

J1001

CASE
TMDS Data2-

TMDS Data2+
TMDS Data2/4 Shield
TMDS Data4­TMDS Data4+
DDC Clock
DDC Data
Analog VSYNC
TMDS Data1­TMDS Data1+
TMDS Data1/3 Shield
TMDS Data3­TMDS Data3+
+5V Power
GND (for +5V)
Hot Plug Detect
TMDS Data0­TMDS Data0+
TMDS Data0/5 Shield
TMDS Data5­TMDS Data5+
TMDS Clock Shield
TMDS Clock+
TMDS Clock-

Analog Red
Analog Green
Analog Blue
Analog HYNC
Analog GND
Analog GND#C6

CASE#26
CASE#27
CASE#28
CASE#29
CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max

DDC2AB Host
Monitor ID bit 0

SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max

DDC1/2 Display
Optional

SDA
Optional
SCL

Optional

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

8

7

6

5

4

3

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

15 21

of

15 21

of

15 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

8

7

6

5

4

3

2

1

See BOM for qualified filters

A_DAC2_R(3)

A_DAC2_RB(3)

A_DAC2_G(3)

D D

C C

A_DAC2_GB(3)

A_DAC2_B(3)

A_DAC2_BB(3)

DDC3DATA(3)

DDC3CLK(3)

HSYNC2(3,7)

VSYNC2(3,7)

SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane

9 8

10
13

12 11

R2027

R2027

37.4R

37.4R

R2028

R2028

37.4R

37.4R

R2029

R2029

37.4R

37.4R

U1999C

U1999C
74VHC125

74VHC125

74VHC125

74VHC125
U1999D

U1999D

R2001

R2001
75R

75R

402

R2002

R2002
75R

75R

402

R2003

R2003
75R

75R

HSYNC_DAC2_B

VSYNC_DAC2_B

L2001 47nHL2001 47nH

R2010

R2010

R2011

R2011

402

402

402402

R2006 33RR2006 33R

R2009 33RR2009 33R

402

10R

10R

402

10R

10R

402

HSYNC_DAC2_R

VSYNC_DAC2_R

402

L2002 47nHL2002 47nH

402

L2003 47nHL2003 47nH

402

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

L200x and ML200x footprints are overlapped

+5V

R2005

R2005

2.2K

2.2K

402

DDCDATA_DAC2_5V DDCDATA_DAC2_R

+5V

R2008

R2008

2.2K

2.2K

402 402

DDCCLK_DAC2_5V

DDCCLK_DAC2_R

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F

DDCDATA_DAC2_R
DDCCLK_DAC2_R

+3.3V

HSYNC_DAC2_R
VSYNC_DAC2_R

+5V_VESA2

+5V_VESA2

603

DB15 pin

Standard VGA
Monitor ID bit 0

11

Monitor ID bit 1

12

Monitor ID bit 2

4

Monitor ID bit 3

15

N/C

9

Mechanical Key
Hardware
Support

No Yes Yes No Yes

Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997

DDC1 Host
Monitor ID bit 0

Data from display
Monitor ID bit 2
Open
+5V
50mA min
1A max

DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max

DDC2AB Host
Monitor ID bit 0

SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max

DDC2_MONID0
DDC2_MONID1(SDA)
DDC2_MONID2
DDC2_MONID3(SCL)

DDC1/2 Display
Optional

SDA
Optional
SCL

Optional

+5V_VESA2

T1X2M(3)
T1X2P(3)

T1X3M(3)
T1X3P(3)

T1X4M(3)

B B

A A

8

7

6

T1X4P(3)
T1X5M(3)

T1X5P(3)

T1X0M(3)
T1X0P(3)

T1X1M(3)
T1X1P(3)

T1XCP(3)
T1XCM(3)

For ESD Protection

Place
Close to
Connector

5

4

T1X2M
T1X2P

T1X3M
T1X3P

T1X4M
T1X4P

T1X5M
T1X5P

T1X0M
T1X0P

T1X1M
T1X1P

T1XCP
T1XCM

3

T1X2M
T1X2P

T1X4M
T1X4P

T1X1M
T1X1P

T1X3M
T1X3P

T1X0M
T1X0P

T1X5M
T1X5P

T1XCP
T1XCM

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

DDCCLK_DAC2_R
DDCDATA_DAC2_R
VSYNC_DAC2_R

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
HSYNC_DAC2_R

+3.3V

2 3

R2023

R2023
10K

10K

2

R2022 10KR2022 10K

1

Q2021

Q2021

MMBT3904

MMBT3904

HPD1(3)

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

HPD_DVI1

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

16 21

of

16 21

of

16 21

Doc No.

Doc No.

Doc No.

25

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

C1
C2
C3
C4
C5
C6

26
27
28
29
30

1

J2001

J2001

CASE
TMDS Data2-

TMDS Data2+
TMDS Data2/4 Shield
TMDS Data4­TMDS Data4+
DDC Clock
DDC Data
Analog VSYNC
TMDS Data1­TMDS Data1+
TMDS Data1/3 Shield
TMDS Data3­TMDS Data3+
+5V Power
GND (for +5V)
Hot Plug Detect
TMDS Data0­TMDS Data0+
TMDS Data0/5 Shield
TMDS Data5­TMDS Data5+
TMDS Clock Shield
TMDS Clock+
TMDS Clock-

Analog Red
Analog Green
Analog Blue
Analog HYNC
Analog GND
Analog GND#C6

CASE#26
CASE#27
CASE#28
CASE#29
CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

RevDate:

RevDate:

RevDate:

102-B50102-00

102-B50102-00

102-B50102-00

25

25

25

www.vinafix.vn

8

D D

7

6

5

4

3

2

1

C3001

C3001
47pF_50V

47pF_50V

C3002

C3002
47pF_50V

47pF_50V

C3003

C3003
47pF_50V

47pF_50V

Install for Dell

R3009 0RR3009 0R

L3001 470nH_250mAL3001 470nH_250mA

L3002 470nH_250mAL3002 470nH_250mA

L3003 470nH_250mAL3003 470nH_250mA

402

A_DAC2_Y(3)

R3001

R3001
75R

75R

A_DAC2_C(3)

R3002

R3002
75R

75R

A_DAC2_COMP(3)

R3003

R3003
75R

75R

C C

DAC2_C_F
DAC2_COMP_F

Install for Dell

GENERICA(7)

R3004 0RR3004 0R
R3005 0RR3005 0R
R3006 0RR3006 0R

402

STV/HDTV#_DET PIN6

402

DAC2_Y_DINDAC2_Y_F

402

DAC2_C_DIN

402

DAC2_COMP_DIN

+3.3V

R3008

R3008
10K

10K

402 402

DNI for Dell

Place near connector
0R leaves footprint for Ferrite
Beads if req'd for EMI

B B

- 4-pin Svideo MiniDIN P/N 6070001000G

402402 402

DAC2_Y_F

C3004

C3004
47pF_50V

47pF_50V

DAC2_C_F

C3005

C3005
47pF_50V

47pF_50V

DAC2_COMP_F

C3006

C3006
47pF_50V

47pF_50V

R30070RR3007
0R

402

DNI for Dell

Install for Dell only when it's needed for EMI

402

TV Out

J3001

J3001

6

HDTV_OUT_DET#

3

Y-OUT

4

C-OUT

7

Comp_out

CompIn

5

SYNC

1

GND

2

GND#2

8

Rpin5

CASE

9

CASE#9

10

CASE#10

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

8

7

6

5

4

3

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

17 21

of

17 21

of

17 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

8

+3.3V +3.3V

R4032

R4032

2.61K

2.61K

DDC2CLK(3,13)

DDC2DATA(3,13)

D D

TS_FDO(7)

Warning: TS_FDO is not 5V tolerant. MAX sink current 1.65mA

C C

RV770_FANSINK

RV770_FANSINK

H1A

H1A

SCL_R
SDA_R
ThermINT

H1B

H1B

7

RV770_FANSINK

RV770_FANSINK

H1C

H1C

RV770_FANSINK

RV770_FANSINK

6

LM63_PWM

TS_FDO

GPU_DPLUS

GPU_DMINUS

R4007

R4007

H1D

H1D

GPU_DPLUS (7)

GPU_DMINUS (7)ThermINT(7)

33R

33R

RV770_FANSINK

RV770_FANSINK

PWM

5

4

For 4-WIRE FAN, Production

+3.3V_BUS

R4030

R4030

5.1K

5.1K

Q4001

Q4001

1

MMBT3904

R4005 33RR4005 33R

FAN_FULL_SPEED#(13)

If Critical Temperature is reached this will force the fan to run at full
speed while power is removed from GPU & rest of the board.
This is an open collector signal. Active level is hard pull down to ground.

RV770_FANSINK

RV770_FANSINK

H1E

H1E

MMBT3904

2 3

R40311KR4031

1

1K

DNI For ProductionDNI For Production

+3.3V_BUS

DNI

2 3

Q4030

Q4030
MMBT3904

MMBT3904

3

TP4001

TP4001

35mil

35mil

TACH(7)

TP4002

TP4002

35mil

35mil

TACH Connection is for testing
and RPM measurement only

For 2-WIRE FAN, Socket Board Only

Overlap R4000 & B4002

TACH

C4030

C4030
10nF

10nF

DNI

B4002

B4002
26R_600mA

26R_600mA

+12V_BUS

R4034 1KR4034 1K
R4033

R4033

3.83K

3.83K

2

+VDDC_Source

0805
16V

R4035

R4035
10K

10K

+12V_BUS

J4030 is 2mm, and
it does not follow

2.54mm spacing as 4-wire
PWM Fan Specification

1

USE PN 4212047500G

4.7uF, 0805, 16V

C4008

C4008

4.7uF_16V

4.7uF_16V

4
3
2

J4030

J4030

1

1X4 3A 2MM

1X4 3A 2MM

112233445566778

8

RV770_FANSINK

8

RV770_FANSINK

H1F

H1F

414142424343444445454646474748

48

B B

A A

9910101111121213131414151516

RV770_FANSINK

RV770_FANSINK

H1G

H1G

494950505151525253535454555556

7

16

56

171718181919202021212222232324

RV770_FANSINK

RV770_FANSINK

H1H

H1H

575758585959606061616262636364

24

64

6

252526262727282829293030313132

RV770_FANSINK

RV770_FANSINK

H1I

H1I

656566666767686869697070717172

32

72

333334343535363637373838393940

RV770_FANSINK

RV770_FANSINK

H1J

H1J

737374747575767677777878797980

5

40

80

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

4

3

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

18 21

of

18 21

of

18 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

ASSY-SCREW2

ASSY-SCREW2

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

ASSY-SCREW1

ASSY-SCREW1

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY-SCREW3

ASSY-SCREW3

D D

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY1

ASSY1

ANTISTATIC

ANTISTATIC
BAG

BAG

0

0

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY-SCREW4

ASSY-SCREW4

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

BKT1: DS, DVI - DIN - DVI

BKT2

BKT2

BRACKET

BRACKET

8020038600G

8020038600G

4

MT2

MT1

MT1
MT_Hole_0.136 TM 5.5 BM 7.0

MT_Hole_0.136 TM 5.5 BM 7.0

MT2
MT_Hole_0.136_in_6VIA

MT_Hole_0.136_in_6VIA

PCB1

PCB1

PCB

PCB

109-B50131-00

109-B50131-00

PCIE 12V/3.3V Power up Bonding support

3

2

1

C C

B B

MVDD1MVDD1

TPC1TPC1VDDC1VDDC1

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

5

4

3

2

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

19 21

of

19 21

of

19 21

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

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102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH Thursday, June 05, 2008

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH Thursday, June 05, 2008

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH Thursday, June 05, 2008

REVISION HISTORY

REVISION HISTORY

REVISION HISTORY

D D

Sch

Sch

Sch
Rev

Rev

Rev

PCB

PCB

PCB
Rev

Rev

Rev

0

00A

Date

Date

Date

07/10/11

Initial design for RV770 GDDR3

4

NOTE:

NOTE:

NOTE:

3

102-B50102-00

102-B50102-00

102-B50102-00

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.
For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.

For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.

For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.
Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

REVISION DESCRIPTION

REVISION DESCRIPTION

REVISION DESCRIPTION

2

Date:Schematic No.

Date:Schematic No.

Date:Schematic No.

1

Rev

Rev

Rev

25

25

25

00B1

2

00

C C

B B

08/02/25

08/03/27

Improvement:

1) Add 1 uF CAP on memory reset, Pg5

2) MVDDC current leakage board workaround; Pg13

3) MVDD Themal Protection, Pg 13

4) Improvement on Hot Plug protection Pg13

5) 12V_BUS & 12V_EXT Input Switch Circuit Page 13

1.Correct PTC comparator power connection.

2. Add Fuse NF1200 on page 13

A A

5

4

3

2

1

www.vinafix.vn

5

4

3

2

1

MEMORY CHANNEL A & B

4 Pcs. 16M x 32 GDDR3

D D

CH A&B

CH C&D

MEMORY CHANNEL C & D

4 Pcs. 16M x 32 GDDR3

TMDS1

DL TMDS1

POWER REGULATORS

From +12V

+VDDC (MPVDD, VDDCI), +MVDD
(MVDDC, VDDR1/VDDRH) ,VDDM

From +12V LINEAR:

+5V, +5V_VESA,
+5V_VESA2,

C C

From +12V DIRECT:

FAN

From +3.3V:
Direct or Linear (1.8V)

VDD_CT, DPLL_PVDD, TPVDD,
T2PVDD, TXVDDR, T2XVDDR/
T2XVDDC, AVDD, VDD1DI,
VDD2DI, PCIE_VDDR, PCIE_PLL,
VDDR4, VDDR5
VDDR3, A2VDD , PCIE_PVDD
Option for VDDCI

From MVDDC to Linear (+1.1V):

PCIE_VDDC , DPLL_VDDC

From MVDDC to Linear
(+VDDCI_LDO):

Option for VDDCI , MPVDD

DPM VDDC Voltage Control

CrossFire
Interlink
Edge Finger

Critical Temperature Fault (active low)

FAN
4-wire production
2-wire socket board

2x12 Links

Straps

BIOS

GPIO15/20
(DPM Control)

CrossFire

DVOCLK
DVPCNTL_[0..2]
DVPDATA[23:0]
DVP_MVP_CNTL[1:0]
GPIO[6:3]

GPIO

ROM

GPIO_19_CTFB

PWM1

RV770

+PCIE_SOURCE

B B

+3.3V_BUS

3.3V_BUS
delayed circuit

SMPS Enable
Circuit

+12V_BUS

JTAG
Conn

I2C Debug
Conn

Analog
Switch

JTAG

I2C Debug

SMBUS

PCI-Express

HPD1

DAC2

CRT2

H/V2Sync

DDC3

XTALIN/OUT

GENERICA

TMDS2

DL TMDS2

HPD2
(GPIO14)

DAC1

CRT1

H/VSync

DDC4

5V Tolerant DDC , No Level shifter is expected

TVO

Oscillator or Crystal , 27.000MHz

STV/HDTV#_OUT_DET

5V Tolerant DDC , No Level shifter is expected

RC Terminations

RGB Filters

TVO Filters

RGB Filters

HPD

Slim-VGA
Connector

VO

Connector

HPD

DVI-I
Slim-VGA
Connector

&DVI-I

&

+3.3V_BUS
+12V_BUS

SMBUS

PCI-Express Bus

RH PCIE RV770 512MB GDDR3
DUAL DL-DVI-I VO FH

REV 1

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

5

4

3

2

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

21 21

of

21 21

of

21 21

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

www.vinafix.vn