MSI MS-V150 Schematic 10

5

Title

Title

Title

RH RV620 256MB DDR2 VO+DMS59 6L LP Friday, April 25, 2008

RH RV620 256MB DDR2 VO+DMS59 6L LP Friday, April 25, 2008

RH RV620 256MB DDR2 VO+DMS59 6L LP Friday, April 25, 2008

REVISION HISTORY

REVISION HISTORY

REVISION HISTORY

D D

Sch

Sch

Sch
Rev

Rev

Rev

PCB

PCB

PCB
Rev

Rev

Rev

00A01

Date

Date

Date

2008.02.04

TYPHOON

START NEW TYPHOON SCHEMATIC. DERIVED FROM B530 REV06 (-00A) SCHEMATIC. CHANGED DISPLAY OUTPUT TO VO + DMS59.

4

NOTE:

NOTE:

NOTE:

3

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.
For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.

For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.

For Stuffing options (component values, DNI’s, …) please consult the product specific BOM.
Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

REVISION DESCRIPTION

REVISION DESCRIPTION

REVISION DESCRIPTION

2

Date:Schematic No.

Date:Schematic No.

Date:Schematic No.

1

Rev

Rev

Rev

03

03

03

02 00A

03 00A

04 00A

05 00A

C C

B B

00A06

00A07

00A08

00B09

00B010

011 00B

2008.02.04

2008.02.05

2008.02.12

2008.02.12

2008.02.14

2008.02.20

2008.02.21

2008.03.17

2008.03.19

2008.03.24

REMOVED B100. CHANGED C2026 TO 0603 SIZE. REDUCED # OF STITCHING CAPS. CHANGED TO DDC3 & DDC4 FOR DISPLAY EDIDs, AND TO DDC2 FOR I2C DEBUG COMPONENTS.

REMOVED SUPPORT FOR 64Mx16 MEMORY CONFIGURATION FOR EASE OF LAYOUT.

ADDED CTF TEST CIRCUIT.

ADDED R1280 IN THE CTF TEST CIRCUIT.

REMOVED SHUNT RESISTORS R110 - R113 ON TMDP Tx LINES BECAUSE THEY ARE NOT REQUIRED.

ADD NOTE "DNI" FOR LVTM SHUNT RESISTORS (R100 - R102, R106)

CORRECT DDC4 DATA/CLOCK OFF-PAGE CONNECTORS (p.4)

CORRECT MVDDC_FB NET (p.9); UPDATE BLOCK DIAGRAM (p.20)

REMOVE FOOTPRINT FOR OSCILLATOR CIRCUIT (Y81, B80, C80, C81, R81, R82, R83, MR83) TO IMPROVE LAYOUT OF THE CRYSTAL (p.3); UPDATE BLOCK DIAGRAM (p.20)

ADD FOOTPRINT FOR AN ADDITIONAL CAPACITOR C64 (0402 SIZE) ON THE +DPLL_VDDC RAIL (p.3)

A A

5

4

3

2

1

www.vinafix.vn

5

4

3

2

1

MEMORY CHANNEL A

D D

64bit DDR2 32M/16Mx16

MEM A0 MEM A1

POWER REGULATION

CFTb

GPIO0..7
GPIO9, 11..13

GPIO8..10
GPIO22

DDC2_CLK
DDC2_DATA

Internal
Temperature
Reader

D+/D-

TS_FDO

PWM Out

GPIO19

Fan Circuit

Settings

BIOS

Temperature
Sensor Output

FAN

Straps/
Switches

Flash ROM

VDDC
Voltage Control

External
Temperature
Reader

Critical Temp.
Fault Circuit

From +12V SMPS

ASIC Core:
ASIC Core I/O:
Memory:

From +12V LIN.REG.

+5V_VESA

C C

From +12V_BUS DIRECT

FAN

From +3.3V LIN.REG. to 1.8V/1.1V

Memory PLL:
PCIe:
I/O Level Shift:
PLL_Analog:
DVP:
DAC1:
DAC2:

TMDS2:

From +3.3V DIRECT

3.3V I/O:

B B

VDDC
VDDCI
MVDD, VDDR1, VDDRH

MPVDD

PCIE_VDDC, PCIE_VDDR, PCIE_PVDD

VDD_CT
DPLL_PVDD, DPLL_VDDC
VDDR4, VDDR5
AVDD, VDD1DI
A2VDD, VDD2DI, A2VDDQ
DPA/B_PVDD, DPA/B_VDDRDP/TMDS1:
T2PVDD, T2XVDDR

VDDR3

+PCIE_SOURCE

+12V_BUS+3.3V_BUS

DAC2

C
Y
COMP

CRT

H/VSync

DDC4

VO Filter

RGB Filter

VO

TMDS1

Data
Clock

HPD2

TMDS Termination

DAC1

RV620 ASIC

CRT

H/VSync

DDC3

RGB Filter

DMS-59 Connector

(2 singlelink DVI-I)

TMDS2

Data

(internal termination)

Clock

HPD1

XTALIN/OUT

Crystal

PCI-Express

Power Up/Down
Sequencing Circuit

+3.3V_BUS
+12V_BUS

PCI-Express Bus

RV620 B629 DDR2 6-Layer LP

REV 03

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV620 - BLOCK DIAGRAM

RH RV620 - BLOCK DIAGRAM

5

4

3

2

RH RV620 - BLOCK DIAGRAM

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, April 25, 2008

Friday, April 25, 2008

Friday, April 25, 2008

Sheet

Sheet

Sheet

of

20 20

of

20 20

of

20 20

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

03

03

03

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

www.vinafix.vn

8

7

6

5

4

3

2

1

TYPHOON

D D

TP30TP30

TP31TP31

TP6TP6

PETn0_GFXRn0(2)

PETp1_GFXRp1(2)
PETn1_GFXRn1(2)

PETp2_GFXRp2(2)

C C

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

+12V_BUS

+12V_BUS

C3

C3

C2

150nF_16V

150nF_16V

150nF_16VC2150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

LF CAP CER 150NF 10% 16V X7R (0603)

+3.3V_BUS

CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK

C4

+3.3V_BUS

10uFC410uF

C5
1uF_6.3VC51uF_6.3V

Place these caps last,
ideally as close to the bus
connector as possible

C6
1uF_6.3VC61uF_6.3V

C0
10nFC010nF

B B

PETn2_GFXRn2(2)

PETp3_GFXRp3(2)
PETn3_GFXRn3(2)

PETp4_GFXRp4(2)
PETn4_GFXRn4(2)

PETp5_GFXRp5(2)
PETn5_GFXRn5(2)

PETp6_GFXRp6(2)
PETn6_GFXRn6(2)

PETp7_GFXRp7(2)
PETn7_GFXRn7(2)

PETp8_GFXRp8(2)
PETn8_GFXRn8(2)

PETp9_GFXRp9(2)
PETn9_GFXRn9(2)

PETp10_GFXRp10(2)
PETn10_GFXRn10(2)

PETp11_GFXRp11(2)
PETn11_GFXRn11(2)

PETp12_GFXRp12(2)
PETn12_GFXRn12(2)

PETp13_GFXRp13(2)
PETn13_GFXRn13(2)

PETp14_GFXRp14(2)
PETn14_GFXRn14(2)

PETp15_GFXRp15(2)
PETn15_GFXRn15(2)

PRESENCE

PCI-EXPRESS EDGE CONNECTOR

+12V_BUS+3.3V_BUS +3.3V_BUS+12V_BUS

x16 PCIe

x16 PCIe

B1

+12V#B1

B2

+12V#B2

B3

+12V#B3

B4
SMCLK
SMDAT JTDI

JTRST#

B5

B6

B7

B8

B9

B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

Mechanical Key

Mechanical Key

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

MPCIE1

MPCIE1

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

PRESENCE

JTCK
JTDO

JTMS

C7
100nFC7100nF

C9
100nFC9100nF

C11

C11
100nF

100nF

C13

C13
100nF

100nF

C15

C15
100nF

100nF

C17

C17
100nF

100nF

C19

C19
100nF

100nF

C21

C21
100nF

100nF

C23

C23
100nF

100nF

C25

C25
100nF

100nF

C27

C27
100nF

100nF

C29

C29
100nF

100nF

C31

C31
100nF

100nF

C33

C33
100nF

100nF

C35

C35
100nF

100nF

C37

C37
100nF

100nF

C8
100nFC8100nF

C10

C10
100nF

100nF

C12

C12
100nF

100nF

C14

C14
100nF

100nF

C16

C16
100nF

100nF

C18

C18
100nF

100nF

C20

C20
100nF

100nF

C22

C22
100nF

100nF

C24

C24
100nF

100nF

C26

C26
100nF

100nF

C28

C28
100nF

100nF

C30

C30
100nF

100nF

C32

C32
100nF

100nF

C34

C34
100nF

100nF

C36

C36
100nF

100nF

C38

C38
100nF

100nF

TP1TP1

PCIE_REFCLKP (2)
PCIE_REFCLKN (2)PETp0_GFXRp0(2)

GFXTp0_PERp0 (2)
GFXTn0_PERn0 (2)

GFXTp1_PERp1 (2)
GFXTn1_PERn1 (2)

GFXTp2_PERp2 (2)
GFXTn2_PERn2 (2)

GFXTp3_PERp3 (2)
GFXTn3_PERn3 (2)

GFXTp4_PERp4 (2)
GFXTn4_PERn4 (2)

GFXTp5_PERp5 (2)
GFXTn5_PERn5 (2)

GFXTp6_PERp6 (2)
GFXTn6_PERn6 (2)

GFXTp7_PERp7 (2)
GFXTn7_PERn7 (2)

GFXTp8_PERp8 (2)
GFXTn8_PERn8 (2)

GFXTp9_PERp9 (2)
GFXTn9_PERn9 (2)

GFXTp10_PERp10 (2)
GFXTn10_PERn10 (2)

GFXTp11_PERp11 (2)
GFXTn11_PERn11 (2)

GFXTp12_PERp12 (2)
GFXTn12_PERn12 (2)

GFXTp13_PERp13 (2)
GFXTn13_PERn13 (2)

GFXTp14_PERp14 (2)
GFXTn14_PERn14 (2)

GFXTp15_PERp15 (2)
GFXTn15_PERn15 (2)

TP2TP2

TP3TP3 TP4TP4

PERST#

+3.3V

C39

C39
100nF

100nF

53

1

4

2

U5

U5
NC7SZ08P5X_NL

NC7SZ08P5X_NL

PERST#_buf (2)

SYMBOL LEGEND

DO NOT

DNI

INSTALL
ACTIVE

#

LOW
DIGITAL

Doc No.

Doc No.

Doc No.

1

GROUND
ANALOG

GROUND

RevDate:

RevDate:

RevDate:

03

03

03

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV620 - PCI-E Edge Connector

RH RV620 - PCI-E Edge Connector

8

7

6

5

4

3

RH RV620 - PCI-E Edge Connector

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, April 25, 2008

Friday, April 25, 2008

Friday, April 25, 2008

Sheet

Sheet

Sheet

of

120

of

120

of

120

www.vinafix.vn

5

D D

4

3

2

1

NOTE: some of the PCIE testpoints will
be available through via on traces.

PETp0_GFXRp0(1)
PETn0_GFXRn0(1)

PETp1_GFXRp1(1)
PETn1_GFXRn1(1)

PETp2_GFXRp2(1)
PETn2_GFXRn2(1)

PETp3_GFXRp3(1)
PETn3_GFXRn3(1)

PETp4_GFXRp4(1)
PETn4_GFXRn4(1)

PETp5_GFXRp5(1)
PETn5_GFXRn5(1)

PETp6_GFXRp6(1)

C C

B B

PETn6_GFXRn6(1)

PETp7_GFXRp7(1)
PETn7_GFXRn7(1)

PETp8_GFXRp8(1)
PETn8_GFXRn8(1)

PETp9_GFXRp9(1)
PETn9_GFXRn9(1)

PETp10_GFXRp10(1)
PETn10_GFXRn10(1)

PETp11_GFXRp11(1)
PETn11_GFXRn11(1)

PETp12_GFXRp12(1)
PETn12_GFXRn12(1)

PETp13_GFXRp13(1)
PETn13_GFXRn13(1)

PETp14_GFXRp14(1)
PETn14_GFXRn14(1)

PETp15_GFXRp15(1)
PETn15_GFXRn15(1)

PCIE_REFCLKP(1)
PCIE_REFCLKN(1)

DNI DNI

R13

R13
51R

51R

402 402

R14

R14
51R

51R

TP7TP7

TP8TP8

TP9TP9

TP10TP10

TP11TP11

TP12TP12

TP13TP13

TP14TP14

TP15TP15

TP16TP16

TP17TP17

TP18TP18

TP19TP19

TP20TP20

TP21TP21

TP22TP22

TP23TP23

TP24TP24

TP25TP25

TP26TP26

TP27TP27

TP28TP28

PERST#_buf(1)

AC30
AC31

AC29
AB29

AB31
AB30

AA31
AA30

AD29
AD30

AC28
AC27

AG25

W30
W31

W29

V29

V31
V30

U31
U30

P30
P31

P29
N29

N31
N30

M31
M30

K30
K31

K29
J29

J31
J30

H31
H30

U1A

U1A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

Clock

Clock

PCIE_REFCLKP
PCIE_REFCLKN

NC_SMBCLK
NC_SMBDATA

PERSTB

RV620 GL A11 RH

RV620 GL A11 RH

PART 1 OF 6

PART 1 OF 6

P

P
C

C
I

I

-

­E

E
X

X
P

P
R

R
E

E
S

S
S

S

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Calibration

Calibration

PCIE_CALRN
PCIE_CALRP

AA28
AA27

AA25
AA24

Y28
Y27

Y25
Y24

V28
V27

V25
V24

T28
T27

T25
T24

P28
P27

P25
P24

M28
M27

M25
M24

L28
L27

L25
L24

J28
J27

G28
G27

+1.1V

PCIE_CALRN

AF25

PCIE_CALRP

AE25
AE23

NC

402

R82.0K R82.0K

402

R91.27K R91.27K

GFXTp0_PERp0 (1)
GFXTn0_PERn0 (1)

GFXTp1_PERp1 (1)
GFXTn1_PERn1 (1)

GFXTp2_PERp2 (1)
GFXTn2_PERn2 (1)

GFXTp3_PERp3 (1)
GFXTn3_PERn3 (1)

GFXTp4_PERp4 (1)
GFXTn4_PERn4 (1)

GFXTp5_PERp5 (1)
GFXTn5_PERn5 (1)

GFXTp6_PERp6 (1)
GFXTn6_PERn6 (1)

GFXTp7_PERp7 (1)
GFXTn7_PERn7 (1)

GFXTp8_PERp8 (1)
GFXTn8_PERn8 (1)

GFXTp9_PERp9 (1)
GFXTn9_PERn9 (1)

GFXTp10_PERp10 (1)
GFXTn10_PERn10 (1)

GFXTp11_PERp11 (1)
GFXTn11_PERn11 (1)

GFXTp12_PERp12 (1)
GFXTn12_PERn12 (1)

GFXTp13_PERp13 (1)
GFXTn13_PERn13 (1)

GFXTp14_PERp14 (1)
GFXTn14_PERn14 (1)

GFXTp15_PERp15 (1)
GFXTn15_PERn15 (1)

For Tektronix LA only

Place close
to ASIC

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV610 - ASIC PCIE Interface

RH RV610 - ASIC PCIE Interface

5

4

3

2

RH RV610 - ASIC PCIE Interface

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, April 25, 2008

Friday, April 25, 2008

Friday, April 25, 2008

Sheet

Sheet

Sheet

of

220

of

220

of

220

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

03

03

03

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

www.vinafix.vn

5

PSYNC(13)

+3.3V

D D

R47

R47

4.7K

4.7K

DVALID(13)

C C

GPIO_[13..0](13)

GPIO_8

R30 33RR30 33R

GPIO_9

R31 33RR31 33R

GPIO_10

R32 33RR32 33R

HPD2(14)

C82

C82
6R8PF

6R8PF

PWRCNTL_0(11)

ThermINT(17)

GPIO_18(13)

CTFb(17)

PWRCNTL_1(11)

GPIO21_BB_EN(13)

GPIO_22(13)

R33 33RR33 33R

XTALIN_S XTALIN

GPIO_16 IS OUT ONLY

B B

2 1

C83

C83

Y82

Y82

6R8PF

6R8PF

27.000MHz_10PPM

27.000MHz_10PPM

A A

5

MR51KMR5
1K

+1.8V_D2

TP54TP54

TP50TP50
TP62TP62

TP61TP61
TP64TP64
TP63TP63

R43 221RR43 221R

R44 110RR44 110R
C46 100nFC46 100nF

R86 100RR86 100R

R841MR84
1M

R85 0RR85 0R

GENERICA(16)
GENERICB(13)
GENERICC(13)

PSYNC

R48

R48

4.7K

4.7K

DVALID

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO8_SO
GPIO9_SI
GPIO10_SCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14
PWRCNTL_0
GPIO_16

GPIO_18
CTFb
PWRCNTL_1
GPIO21_BB_EN

GPIO22_CS
PCIE_CLK_REQb
JTAG_MODE

JTAG_TDI

JTAG_TCK

JTAG_TMS

JTAG_TDO

GENERICA

GENERICB
GENERICC

VREFG

XTALOUTXTALOUT_S

SDA
SCL

4

AE7

AH6
AG6

AD9

AA4
AA5

AK4
AL3

W3
W1

AA2
AA3
AB1
AB2

AB3
AC1
AC3
AD1
AD2
AD3
AF3
AG3
AH3
AG1
AH2
AH1

AJ3

AJ1

AJ2
AK2
AK3

AC11

AJ31

AJ30

4

U1B

U1B

V2
V1

Y1
Y2
Y3

Y4
V3
V4

V5
U3
U2
T4
T5
T7
T8
R1
R2
R3
P1
P3
N1
N2
P4
P7
P8
P5
V7
N3
Y5
M4
M5
M7
M8
L8

Y8
Y7
V8

RV620 GL A11 RH

RV620 GL A11 RH

PSYNC_NEW

GEN_D_HPD4
GEN_E

MISC/I2C

MISC/I2C

DVALID
SDA

SCL
DVPCNTL_MVP_0

DVPCNTL_MVP_1
DVPCNTL_0

DVPCNTL_1
DVPCNTL_2

DVPCLK
DVPDATA_0

DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5

External

External

DVPDATA_6

TMDS

TMDS

DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

GPIO_0
GPIO_1
GPIO_2

General

General

GPIO_3

Purpose

Purpose

GPIO_4

I/O

I/O

GPIO_5
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTFB
GPIO_20_PWRCNTL1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_24_JMODE
GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO

GENERICA
GENERICB
GENERICC

VREFG

XTALIN

XTAL

XTAL

XTALOUT

PART 2 OF 6

PART 2 OF 6

PLL Power

PLL Power

DAC / CRT

DAC / CRT

DAC2 (TV/CRT2)

DAC2 (TV/CRT2)

Monitor

Monitor
Interface

Interface

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP

Thermal

Thermal

Test

Test

DPLL_PVDD

DPLL_PVSS

PCIE_PVDD

MPVDD

MPVSS

DPLL_VDDC

HSYNC
VSYNC

RSET
AVDD

AVSSQ
VDD1DI
VSS1DI

COMP

V2SYNC
H2SYNC

A2VDD

A2VDDQ

A2VSSQ

VDD2DI
VSS2DI

R2SET

HPD1

DDC1DATA

DDC1CLK

DDC2DATA

DDC2CLK

TS_FDO

DPLUS

DMINUS

TESTEN

PLLTEST

3

AH12

C72

C72

10uF_X6S

10uF_X6S

GND_PVSS

AG12

GND_PVSS

+PCIE_PVDD

AH31

C933

C933

C932

C932

1uF_6.3V

1uF_6.3V

10uF_X6S

10uF_X6S

+MPVDD

A9

C84

C84
10nF

GND_MPVSS

B9

+DPLL_VDDC

AE12

AL28

R

AK28

RB

AL27

G

AK27

GB

AL26

B

AK26

BB

AK29
AK30

RSET

AJ28

+AVDD

AL29

AH28
AJ27
AJ26

AL17

R2

AK17

R2B

AL15

G2

AK15

G2B

AL14

B2

AK14

B2B

AJ17

C

AJ15

Y

AJ14
AE16

AF16

+A2VDD

AH14

+A2VDDQ

AH16
AG16

+VDD2DI

AF18
AE18
AG14

R2SET

AA8
AJ29

AH29
AC5

AC4
AF4

AH4
AE14
AE5

AE4

TEST_EN

AH26
AD12

10nF

A_R_DAC1 (14)
A_RB_DAC1 (14)

A_G_DAC1 (14)
A_GB_DAC1 (14)

A_B_DAC1 (14)
A_BB_DAC1 (14)

A_HSYNC_DAC1 (13,14)
A_VSYNC_DAC1 (13,14)

R1030 499RR1030 499R

+VDD1DI

A_R_DAC2 (15)
A_RB_DAC2 (15)

A_G_DAC2 (15)
A_GB_DAC2 (15)

A_B_DAC2 (15)
A_BB_DAC2 (15)

DAC2_C (16)
DAC2_Y (16)
DAC2_COMP (16)

A_VSYNC_DAC2 (13,15)
A_HSYNC_DAC2 (13,15)

C2024

C2024
10nF

10nF

HPD1 (14)

TS_FDO (17)

GPU_DPLUS (17)

GPU_DMINUS (17)

TP42TP42

MC72

MC72

4.7uF_6.3V

4.7uF_6.3V

C931

C931

100nF

100nF

C85

C85
100nF

100nF

C64

C64
10nF

10nF

GND_PVSS

GND_AVSSQ

C2025

C2025
1uF_6.3V

1uF_6.3V
R2030 715RR2030 715R

MR71KMR7
1K

3

DNI DNI

C886

C886

10uF_X6S

10uF_X6S

C86

C86

C76

C76

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

GND_MPVSS

C60

C60

C61

C61

10nF

10nF

100nF

100nF

C1020

C1020
10nF

10nF

10V X7R
402 10%

C1023

C1023
10nF

10nF

C2032

C2032

C2031

C2031

1uF_6.3V

1uF_6.3V

100nF

100nF

C2021

C2021

C2022

C2022

100nF

100nF

1uF_6.3V

1uF_6.3V

C2026

C2026

NS2021NS_VIANS2021NS_VIA

4.7uF_6.3V

4.7uF_6.3V
GND_VSS2DI

R7 1KR7 1K

MC886

MC886

4.7uF_6.3V

4.7uF_6.3V

B931

B931

BLM15BD121SN1

BLM15BD121SN1

B67

B67
60R

60R

C62

C62
1uF_6.3V

1uF_6.3V

C1021

C1021
100nF

100nF

10V X5R
402 10%

C1024

C1024
100nF

100nF

NS2020NS_VIANS2020NS_VIA

GND_A2VSSQ

B885

B885

BLM15BD121SN1

BLM15BD121SN1

12

+3.3V

100nF

100nF

+1.8V_D2

+VDDC

NS64NS_VIA NS64NS_VIA

12

C1022

C1022
1uF_6.3V

1uF_6.3V

6.3V X5R
402 10%

C1025

C1025
1uF_6.3V

1uF_6.3V

12

+1.8V_D2

C71

C71

C63

C63
10uF_X6S

10uF_X6S

OVERLAP

+DPLL_PVDD

B993 1Kohm@100MHzB993 1Kohm@100MHz

B886

B886

BLM15BD121SN1

BLM15BD121SN1

C70

C70

10nF

10nF

B60

B60
BLM15BD121SN1

BLM15BD121SN1

NS1020NS_VIANS1020NS_VIA

12

GND_AVSSQ

NS1021NS_VIANS1021NS_VIA

12

GND_VSS1DI

+3.3V

B2030

B2030
120R_300mA

120R_300mA

Possible alternate 5150005600G

+1.8V_D2

B883

B883

BLM15BD121SN1

BLM15BD121SN1

+3.3V

R40

R40

R41

R41

4.7K

4.7K

4.7K

4.7K

2

12

POPULATE B993 IF +1.8V IS
CONNECTED TO +MVDD

NS70NS_VIA NS70NS_VIA

+1.1V

B882

B882

BLM15BD121SN1

BLM15BD121SN1

B884

B884

BLM15BD121SN1

BLM15BD121SN1

I2C DEVICE ADDRESSES ON DDC2

DEVICE

ADDRESS

LM63

0x98

I2C DAC

0xA0

DDC2_DATA (11,17)
DDC2_CLK (11,17)

DDC3_DATA (14)
DDC3_CLK (14)

2

+1.8V_D2

+1.8V_D2

+1.8V_D2

+3.3V

R46

R46
10K

10K

GPIO_10

+3.3V

GPIO_22

ROM_WP

+3.3V

C47

C47
100nF

100nF

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV620 - ASIC Main

RH RV620 - ASIC Main

RH RV620 - ASIC Main

U2

U2

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

VSS

M25P05-AVNM6P

M25P05-AVNM6P

BIOS1

BIOS1

BIOS

BIOS

113-XXXXXX-XXX

113-XXXXXX-XXX
VIDEO BIOS
FIRMWARE

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, April 25, 2008

Friday, April 25, 2008

Friday, April 25, 2008

Sheet

Sheet

Sheet

320

320

320

1

GPIO_8GPIO_9

2

Q

4

RevDate:

RevDate:

RevDate:

03

03

of

of

of

Doc No.

Doc No.

Doc No.

1

03

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

www.vinafix.vn

5

D D

+1.8V_D2

32

Q100

Q100

SI2304DS

SI2304DS

1

C119

C119

10uF_X6S

10uF_X6S

LVT_EN(11)

C C

+1.8V_D2

B889 BLM15BD121SN1B889 BLM15BD121SN1

1 2

C102

C102

10uF_X6S

10uF_X6S

NS100NS_VIA NS100NS_VIA

+1.8V_D2

B887

B887
BLM15BD121SN1

BLM15BD121SN1

NS110NS_VIA NS110NS_VIA

1 2

GND_DPAPVSS

B B

+1.1V

B888

B888
30R_1A

30R_1A

C113

C113

10uF_X6S

10uF_X6S

C117

C117

10uF_X6S

10uF_X6S

4.7uF_6.3V

4.7uF_6.3V

OVERLAP

4.7uF_6.3V

4.7uF_6.3V

MC113

MC113

MC117

MC117

C111

C111

1uF_6.3V

1uF_6.3V

C147

C147

1uF_6.3V

1uF_6.3V

OVERLAP

C106

C106

1uF_6.3V

1uF_6.3V

C101

C101
100nF

100nF

GND_T2PVSS

C110

C110

100nF

100nF

C114

C114

100nF

100nF

4

+DPAB_PVDD

+DPAB_VDDR

C105

C105

1uF_6.3V

1uF_6.3V

100nF

100nF

C100

C100

+LTVDD18

+DPAB_PVDD

GND_DPAPVSS

+DPAB_VDDR

AF20
AG20

AJ18
AH20

AF23
AF21
AL18
AJ22
AJ25
AK18
AK23
AK25
AJ21
AL23
AL25

AG18
AH18

AE11

AF11

AJ12
AJ13
AK13
AL13

AH11
AL12

AJ11
AK12

AL7

AK7

AF7
AG7
AH7

AJ7

AJ8

AH9

U1F

U1F

PART6OF6

PART6OF6

T2XVDDR_1
T2XVDDR_2

T2XVDDC_1
T2XVDDC_2

T2XVSSR_1
T2XVSSR_2
T2XVSSR_3
T2XVSSR_4
T2XVSSR_5
T2XVSSR_6
T2XVSSR_7
T2XVSSR_8
T2XVSSR_9
T2XVSSR_10
T2XVSSR_11

T2PVDD
T2PVSS

Integrated TMDP

Integrated TMDP

DPA_PVDD
DPB_PVDD

DPA_PVSS
DPB_PVSS

DPA_VDDR_1
DPA_VDDR_2
DPB_VDDR_2
DPB_VDDR_1

DPA_VSSR_1
DPA_VSSR_2
DPA_VSSR_3
DPA_VSSR_4
DPA_VSSR_5
DPB_VSSR_1
DPB_VSSR_2
DPB_VSSR_3
DPB_VSSR_4
DPB_VSSR_5

RV620 GL A11 RH

RV620 GL A11 RH

3

RSVD_7

Control

Control

RSVD

LVTM channel

LVTM channel

RSVD_1
RSVD_2

T2X4P
T2X4M
T2X5P

T2X5M
RSVD_4
RSVD_3
RSVD_6
RSVD_5

T2XCP

T2XCM

T2X0P

T2X0M

T2X1P

T2X1M

T2X2P

T2X2M

T2X3P

T2X3M

TXCM_DPA3N

TXCP_DPA3P

TX0M_DPA2N

TX0P_DPA2P
TX1M_DPA1N

TX1P_DPA1P

TX2M_DPA0N

TX2P_DPA0P

TXCM_DPB3N

TXCP_DPB3P

TX0M_DPB2N

TX0P_DPB2P

TX1M_DPB1N

TX1P_DPB1P

TX2M_DPB0N

TX2P_DPB0P

DDC4CLK_DP4_AUXP

DDC4DATA_DP4_AUXN

DP_CALR

AA7
AC6

AD21
AE21
AJ24
AJ23
AK24
AL24
AG21
AH21
AG23
AH23

AL19
AK19
AJ20
AJ19
AK20
AL20
AK21
AL21
AK22
AL22

AJ4
AJ5

AL5
AK5

AL6
AK6

AK8
AL8

AK9
AL9

AJ9
AJ10

AL10
AK10

AL11
AK11

AG9
AF9

AG11

DP_CALR

TjXCP
TjXCM

TjX0P
TjX0M

TjX1P
TjX1M

TjX2P
TjX2M

DPA_TXCM
DPA_TXCP

DPA_TX0M
DPA_TX0P

DPA_TX1M
DPA_TX1P

DPA_TX2M
DPA_TX2P

R153

R153
150R

150R
1%

Place close to ASIC
<7mm

DNI

R106 100RR106 100R

R100 100RR100 100R

R101 100RR101 100R

R102 100RR102 100R

DDC4_CLK (15)
DDC4_DATA (15)

2

TjXCP (14)
TjXCM (14)

TjX0P (14)
TjX0M (14)

TjX1P (14)
TjX1M (14)

TjX2P (14)
TjX2M (14)

Place close to Connector

C1120 100nF_6.3VC1120 100nF_6.3V

C1121 100nF_6.3VC1121 100nF_6.3V

C1112 100nF_6.3VC1112 100nF_6.3V

C1113 100nF_6.3VC1113 100nF_6.3V

C1114 100nF_6.3VC1114 100nF_6.3V

C1115 100nF_6.3VC1115 100nF_6.3V

C1116 100nF_6.3VC1116 100nF_6.3V

C1117 100nF_6.3VC1117 100nF_6.3V

R130 499RR130 499R

R122 499RR122 499R

R124 499RR124 499R

R126 499RR126 499R

RV620 - INSTALL C1112-C1117, C1120, C1121 100nF X7R;

1

TXCM (14)

R131 499RR131 499R

R123 499RR123 499R

R125 499RR125 499R

R127 499RR127 499R

DP_GND

LVT_EN(11)

1

TXCP (14)
TX0M (14)

TX0P (14)
TX1M (14)

TX1P (14)
TX2M (14)

TX2P (14)

DNI - FOR

Q110

Q110
SI2304DS

SI2304DS

STUDY ONLY

MR1100RMR110
0R

32

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV620 - ASIC TMDP/LVTM Interface

RH RV620 - ASIC TMDP/LVTM Interface

5

4

3

2

RH RV620 - ASIC TMDP/LVTM Interface

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, April 25, 2008

Friday, April 25, 2008

Friday, April 25, 2008

Sheet

Sheet

Sheet

of

420

of

420

of

420

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

03

03

03

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

www.vinafix.vn

5

D D

C C

B B

A A

5

4

U1E

U1E

AA26

PCIE_VSS_1

AA29

PCIE_VSS_2

AC26

PCIE_VSS_3

AD31

PCIE_VSS_4

AE29

PCIE_VSS_5

AE30

PCIE_VSS_6

AE31

PCIE_VSS_7

F28

PCIE_VSS_8

G26

PCIE_VSS_9

G29

PCIE_VSS_10

G30

PCIE_VSS_11

G31

PCIE_VSS_12

H29

PCIE_VSS_13

J25

PCIE_VSS_14

J26

PCIE_VSS_15

L26

PCIE_VSS_16

L29

PCIE_VSS_17

L30

PCIE_VSS_18

L31

PCIE_VSS_19

M26

PCIE_VSS_20

M29

PCIE_VSS_21

P26

PCIE_VSS_22

R29

PCIE_VSS_23

R30

PCIE_VSS_24

R31

PCIE_VSS_25

T26

PCIE_VSS_26

U29

PCIE_VSS_27

V26

PCIE_VSS_28

Y26

PCIE_VSS_29

Y29

PCIE_VSS_30

Y30

PCIE_VSS_31

Y31

PCIE_VSS_32

A13

VSS_1

A2

VSS_2

C18

VSS_3

A24

VSS_4

A30

VSS_5

AA1

VSS_6

AA11

VSS_7

AA14

VSS_8

AA17

VSS_9

AA20

VSS_10

AA6

VSS_11

AC2

VSS_12

AC7

VSS_13

AE3

VSS_15

AL4

VSS_16

AD14

VSS_17

AF12

VSS_18

AF14

VSS_19

AD16

VSS_20

AD18

VSS_21

AE6

VSS_22

AG2

VSS_23

AE9

VSS_24

AH25

VSS_25

AK1

VSS_26

AK31

VSS_27

AJ6

VSS_28

AL2

VSS_29

AL30

VSS_30

B1

VSS_31

C13

VSS_32

CORE GND

CORE GND

RV620 GL A11 RH

RV620 GL A11 RH

4

Part 5 of 6

Part 5 of 6

PCI-Express GND

PCI-Express GND

VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102

B25
J8
B5
D11
C17
C22
C27
D29
C3
C6
D3
D28
F29
D4
F11
F12
F14
F16
F18
F20
F21
F23
F25
F7
F9
G3
G6
H23
J3
J4
J6
K1
L12
L15
L18
L21
L6
M11
M14
M17
M20
M6
P12
P15
P18
P21
P6
AC21
R14
R17
R20
T6
U1
U12
U15
U18
U21
AE20
V14
V17
V20
P2
V6
W2
Y12
Y15
Y18
Y21
Y6
M9

3

3

2

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV620 - ASIC Ground

RH RV620 - ASIC Ground

RH RV620 - ASIC Ground

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, April 25, 2008

Friday, April 25, 2008

Friday, April 25, 2008

Sheet

Sheet

Sheet

of

520

of

520

of

520

1

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

03

03

03

105-B629xx-00B

105-B629xx-00B

105-B629xx-00B

www.vinafix.vn