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2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P615-A01,G96-GB1-128,MXM-III,512/256MB GDDR3(32/16Mx32),LVDS,HDMI,DP,VGA,HD AUDIO
MXM 2.1A SPECIFICATION COMPLIANT
Table of Contents
Page 1: PAGE OVERVIEW
Page 2: PCI EXPRESS INTERFACE, PEX_VDD DECOUPLING CAPS
Page 3: FBA MEMORY INTERFACE FBVDDQ DECOUPLING CAPS
Page 4: FRAME BUFFER A MEMORIES
Page 5: FBA MEMORY FBVDDQ DECOUPLING CAPS
Page 6: FBC MEMORY INTERFACE
Page 7: FRAME BUFFER C MEMORIES
Page 8: FBC MEMORY FBVDDQ DECOUPLING CAPS, GPU GND CONNECTIONS
Page 9: DAC A/B
Page 10: LVDS/TMDS OPTION (LINK A/B)
Page 11: DISPLAY PORT (LINK C)
Page 12: HDMI/DP OPTION (LINK E), TMDS (LINK F)
Page 13: MXM CONNECTOR
Page 14: GPIO, JTAG, TEMP SENSOR
Page 15: MIO A/B SLI, STRAPPING OPTIONS
Page 16: VBIOS, HDCP/I2C ROM, XTAL, SPREAD SPECTRUM, HD AUDIO
Page 17: NVVDD POWER SUPPLY
Page 18: FBVDDQ AND PEX_VDD POWER SUPPLY
Page 19: PEX SWING LEVEL, MECHANICAL
www.vinafix.vn
Base
SKU0001
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY
PAGE OVERVIEW
600-10615-BASE-SCH
600-10615-0001-000
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY
NB9E-GE G96 650MHz, 512MB(128bit) GDDR3 32Mx32, LVDS,HDMI,TV,DP,HD_AUDIO
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
602-10615-0001-100 A
design 1 OF 19
dhao
18-SEP-2007
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1/16 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
NC_18
NC_17
NC_16
NC_15
NC_14
NC_13
NC_12
NC_11
NC_10
NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
NC_19
VDD33_5
VDD33_4
VDD33_3
VDD33_2
VDD33_1
VDD_SENSE
GND_SENSE
PEX_PLLVDD
PEX_RFU1
PEX_RFU2
PEX_TERMP
TESTMODE
PEX_CLKREQ
PEX_RST
PEX_RX1
PEX_RX0
PEX_RX0
PEX_REFCLK
PEX_REFCLK
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX4
PEX_TX4
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_TX2
PEX_TX2
PEX_TX3
PEX_TX3
PEX_TX5
PEX_TX8
PEX_TX8
PEX_RX6
PEX_RX6
PEX_RX5
PEX_RX5
PEX_RX7
PEX_RX7
PEX_TX5
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7
PEX_TX11
PEX_TX11
PEX_TX10
PEX_TX10
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_TX9
PEX_TX9
PEX_TX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_TX12
PEX_TX12
PEX_TX13
PEX_TX13
PEX_RX15
PEX_RX15
1/2 PCI-Express, Power
CLK_REQ
PEX_RST
PEX_REFCLK
PEX_REFCLK
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX1
PEX_TX1
PEX_RX1
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX0
PEX_RX0
PEX_RX6
PEX_RX6
PEX_TX5
PEX_TX5
PEX_TX4
PEX_RX5
PEX_TX3
PEX_RX4
PEX_RX4
PEX_TX3
PEX_RX3
PEX_RX3
PEX_RX5
PEX_TX4
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX6
PEX_TX6
PEX_TX12
PEX_TX12
PEX_RX13
PEX_RX12
PEX_TX11
PEX_TX11
PEX_RX12
PEX_RX11
PEX_RX11
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX13
PEX_RX14
PRSNT1
PEX_TX15
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX14
PEX_TX13
PEX_TX13
PEX_LSW
1V8RUN
(3.5A)
(1.5A)
3V3RUN
(0.5A)
2V5RUN
PWR_SRC
(14A)
PWR_SRC
5VRUN
(0.5A)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PCI EXPRESS
CN1
CON_MXM_HE_EDGE
GND
C542
.1UF
25V
10%
X7R
0603
238
234
101
104
107
110
113
116
119
122
125
128
131
138
142
150
154
158
163
164
175
176
181
182
187
188
194
199
205
206
211
212
218
223
229
235
236
241
E1
18
17
20
41
44
47
50
53
56
59
62
65
68
71
74
77
80
83
86
89
92
95
98
E2
2
1
NONPHY-HE
NONPHY-HE
COMMON
GND
PEX_CLKREQ*
137
139
135
133
PEX_TX0_C
129
PEX_TX0_C*
127
132
130
123
PEX_TX1_C* PEX_TX1_C
121
126
124
PEX_TX2_C PEX_TX2_C
117
PEX_TX2_C* PEX_TX2_C
115
120
118
111
109
114
112
PEX_TX4_C PEX_TX4_C
105
PEX_TX4_C* PEX_TX4_C
103
108
106
PEX_TX5_C PEX_TX5_C
99
PEX_TX5_C* PEX_TX5_C
97
102
100
PEX_TX6_C
93
91
96
94
87
PEX_TX7_C* PEX_TX7_C
85
90
88
81
PEX_TX8_C* PEX_TX8_C
79
84
82
75
PEX_TX9_C* PEX_TX9_C
73
78
76
69
PEX_TX10_C* PEX_TX10_C
67
72
70
63
PEX_TX11_C* PEX_TX11_C
61
66
64
57
55
60
58
51
49
54
52
45
43
48
46
PEX_TX15_C
39
PEX_TX15_C*
37
42
40
134
PEX_PRSNT*
38
GND
R79
0
5%
0402
COMMON
PEX_TX0_C
PEX_TX0_C
PEX_TX1_CPEX_TX1_C
PEX_TX3_CPEX_TX3_C
PEX_TX3_CPEX_TX3_C*
PEX_TX6_C
PEX_TX6_CPEX_TX6_C*
PEX_TX7_CPEX_TX7_C
PEX_TX8_CPEX_TX8_C
PEX_TX9_CPEX_TX9_C
PEX_TX10_CPEX_TX10_C
PEX_TX11_CPEX_TX11_C
PEX_TX12_CPEX_TX12_C
PEX_TX12_CPEX_TX12_C*
PEX_TX13_CPEX_TX13_C
PEX_TX13_CPEX_TX13_C*
PEX_TX14_CPEX_TX14_C
PEX_TX14_CPEX_TX14_C*
PEX_TX15_C
PEX_TX15_C
R94
0402
PEX_CLKREQ_R*
0
R74
NO STUFF
0402
5%
NV_IMPEDANCEDIFF_PAIRNET_NAME
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
Place to the bottom side for test usage.
NV_CRITICAL
1
1
1 .1UFC650
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
C661
16V
C639
16V
C627
16V
C619
16V
C611
16V
C602
16V
C592
16V
C587
16V
C580
16V
C570
16V
C568
16V
C565
16V
16V
C555
16V
16V0402
NO STUFF FOR PRODUCTION
.1UF
X7R
10%16V
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UF
X7R
10%
.1UFC561
X7R
10%
.1UF
X7R
10%
.1UFC552
X7R
10%
LOW: Low Swing Mode
PEX_PRSNT_R*
0
COMMON
5%
19.4A<
Floating: Stand Mode
3V3_RUN
GND
C75
.1UF
16V
10%
X7R
0402
COMMON
GND
C501
.1UF
25V
10%
X7R
0603
COMMON COMMON
5V_RUN
GND
C4
.1UF
16V
10%
X7R
0402
COMMON
C79
.1UF
16V
10%
X7R
0402
COMMON
C3
1V8_RUN
PWR_SRC
C11
.1UF
16V
10%
X7R
0402
COMMON
GND
.1UF
16V
10%
X7R
0402
COMMON
C541
.1UF
25V
10%
X7R
0603
COMMON
2V5_RUN
GND
PEX_RST
PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT*
PEX_REFCLK
PEX_REFCLK*
PEX_TX0
PEX_TX0*
PEX_RX0
PEX_RX0*
PEX_TX1*
PEX_RX1
PEX_RX1*
PEX_TX2
PEX_TX2*
PEX_RX2
PEX_RX2*
PEX_TX3
PEX_TX3*
PEX_RX3
PEX_RX3*
PEX_TX4
PEX_TX4*
PEX_RX4
PEX_RX4*
PEX_TX5
PEX_TX5*
PEX_RX5
PEX_RX5*
PEX_TX6
PEX_TX6*
PEX_RX6
PEX_RX6*
PEX_TX7
PEX_TX7*
PEX_RX7
PEX_RX7*
PEX_TX8
PEX_TX8*
PEX_RX8
PEX_RX8*
PEX_TX9
PEX_TX9*
PEX_RX9
PEX_RX9*
PEX_TX10
PEX_TX10*
PEX_RX10
PEX_RX10*
PEX_TX11
PEX_TX11*
PEX_RX11
PEX_RX11*
PEX_TX12
PEX_TX12*
PEX_RX12
PEX_RX12*
PEX_TX13
PEX_TX13*
PEX_RX13
PEX_RX13*
PEX_TX14
PEX_TX14*
PEX_RX14
PEX_RX14*PEX_RX141
PEX_TX15*PEX_TX151
PEX_RX15PEX_RX151
PEX_RX15*PEX_RX151
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
R564
0402
5%
C655
0402
C642
0402
C631
0402
C621
0402
C614
0402
C607
0402
C596
0402
C590
0402
C582
0402
C573
0402
C569
0402
C566
0402
C562
0402
C559
0402
C553
0402
C551
0402
100
NO STUFF
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V 10%
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V 10%
PEX_TCLK
90DIFF
90DIFF
100DIFF
100DIFF
90DIFF
90DIFF
COMMON
X7R10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
90DIFF
90DIFF
90DIFF
90DIFF.1UF
X7R
10%16V
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%16V
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
90DIFF
90DIFF
1
PEX_TCLK
1
PEX_RCLK
1
PEX_RCLK
1
PEX_TX0
1
PEX_TX0
1
PEX_RX0
1
PEX_RX0
1
PEX_TX11 PEX_TX1
PEX_TX1
1
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
PEX_RX1
1
PEX_RX1
1
PEX_TX2
1
PEX_TX2
1
PEX_RX2
1
PEX_RX2
1
PEX_TX3
1
PEX_TX3
1
PEX_RX3
1
PEX_RX3
1
PEX_TX4
1
PEX_TX4
1
PEX_RX4
1
PEX_RX4
1
PEX_TX5
1
PEX_TX5
1
PEX_RX5
1
PEX_RX5
1
PEX_TX6
1
PEX_TX6
1
PEX_RX6
1
PEX_RX6
1
PEX_TX7
1
PEX_TX7
1
PEX_RX7
1
PEX_RX7
1
PEX_TX8
1
PEX_TX8
1
PEX_RX8
1
PEX_RX8
1
PEX_TX9
1
PEX_TX9
1
PEX_RX9
1
PEX_RX9
1
PEX_TX10
1
PEX_TX10
1
PEX_RX10
1
PEX_RX10
1
PEX_TX11
1
PEX_TX11
1
PEX_RX11
1
PEX_RX11
1
PEX_TX12
1
PEX_TX12
1
PEX_RX12
1
PEX_RX12
1
PEX_TX13
1
PEX_TX13
1
PEX_RX13
1
PEX_RX13
1
PEX_TX14
1
PEX_TX14
1
PEX_RX14
1
1 PEX_TX15 PEX_TX15
BASE LEVEL GENERIC SCHEMATIC ONLY
PCI EXPRESS INTERFACE, PEX_VDD DECOUPLING CAPS
www.vinafix.vn
G1
G96-400-A1 DT
BGA969
COMMON
AM16
AR13
NET_NAMEDIFF_PAIRNV_CRITICALNV_IMPEDANCE
AJ17
AJ18
AR16
AR17
AL17
AM17
AP17
AN17
AM18
AM19
AN19
AP19
AL19
AK19
AR19
AR20
AL20
AM20
AP20
AN20
AM21
AM22
AN22
AP22
AL22
AK22
AR22
AR23
AL23
AM23
AP23
AN23
AM24
AM25
AN25
AP25
AL25
AK25
AR25
AR26
AL26
AM26
AP26
AN26
AM27
AM28
AN28
AP28
AL28
AK28
AR28
AR29
AK29
AL29
AP29
AN29
AM29
AM30
AN31
AP31
AM31
AM32
AR31
AR32
AN32
AP32
AR34
AP34
AK16
AK17
AK21
AK24
AK27
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
A2
AB7
AD6
AF6
AG6
AJ5
AK15
AL7
D35
E35
E7
F7
H32
M7
P6
P7
R7
U7
V6
J10
J11
J12
J13
J9
AD20
AD19
AG14
AG19
AG20
AG21
AP35
SNN_NC<1>
SNN_NC<2>
SNN_NC<3>
SNN_NC<4>
SNN_NC<5>
SNN_NC<6>
SNN_NC<7>
SNN_NC<8>
SNN_NC<9>
SNN_NC<10>
SNN_NC<11>
SNN_NC<12>
SNN_NC<13>
SNN_NC<14>
SNN_NC<15>
SNN_NC<16>
SNN_NC<17>
SNN_NC<18>
SNN_NC<19>
NVVDD_SENSE
NVVDD_GND_SENSE
PEX_PLLVDD
PEX_CAL_PD_VDDQ
PEX_CAL_PU_GND
PEX_TERMP
GPU_TESTMODE
GND
C606
.1UF
16V
10%
X7R
0402
COMMON
C560
.1UF
16V
10%
X7R
0402
COMMON
C634
.01UF
16V
10%
X7R
0402
COMMON
CLOSE TO BALLS
C624
.1UF
16V
10%
X7R
0402
COMMON
C571
.1UF
16V
10%
X7R
0402
COMMON
C660
.1UF
16V
10%
X7R
0402
COMMON
L<750mil
C706
.1UF
16V
10%
X7R
0402
COMMON
GND
2.49K
R560
COMMON
0402
1%
2.49K
R559
0402 COMMON
1%
2.49K
R558
COMMON
0402
1%
1K
R92
COMMON
0402
5%
3V3_RUN
2.5G<>
2.5G<>
C597
C622
1UF
1UF
6.3V
6.3V
10%
10%
X7R
X5R
0603
0402
COMMON
COMMON
GND
C73
C610
1UF
1UF
6.3V
6.3V
10%
10%
X7R
X5R
0603
0402
COMMON
COMMON
GND
C641
1UF
6.3V
10%
X5R
0402
COMMON
GND
17.4H<
17.4H<
C670
1UF
6.3V
10%
X5R
0402
COMMON
GND
PWR_SRC
1V8_RUN
2V5_RUN
3V3_RUN
5V_RUN
NVVDD_SENSE
NVVDD_GND_SENSE
PEX_PLLVDD
PWR_SRC
1V8_RUN
2V5_RUN
3V3_RUN
5V_RUN
PEX_VDD
17.4H<
17.4H<
GND
602-10615-0001-100 A
design
dhao
C589
4.7UF
6.3V
10%
X5R
0603
COMMON
C708
4.7UF
6.3V
10%
X5R
0603
COMMON
PEX_VDD
GND
C645
10UF
6.3V
20%
X5R
0805
COMMON
DP_PWR_VDD
GND
VOLTAGE
24MIL
24MIL
16MIL
16MIL
16MIL
C707
10UF
6.3V
20%
X5R
0805
COMMON
22V
1.8V
2.5V
3.3V
5V
10nH
COMMON0603
MIN_LINE_WIDTH
MAX_CURRENT
10MIL 1.0V
10MIL 0V
10MIL 1.1V
MIN_LINE_WIDTH
16.0A
3.5A
0.5A
1.5A
0.5A
L501
C663
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
VOLTAGESOURCE_PWR_NET
2 OF 19
18-SEP-2007

2/16 FBA
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD6
FBA_CMD5
FBA_CMD4
FBA_CMD3
FBA_CMD2
FBA_CMD1
FBA_CMD0
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_DEBUG
FBA_CMD30
FBA_CMD29
FBA_CMD28
FBA_CLK1
FBA_CLK1
FBA_CLK0
FBA_CLK0
FB_PLLAVDD
FB_DLLAVDD
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
RFU
RFU
RFU
RFU
RFU
RFU
FB_VREF
RFU
RFU
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GPU MEMORY INTERFACE: PARTITION A
0402
931
1%
FBA_D<63..0>
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=270MA
R_DS_ON=1.5 ohm
MAX_CURRENT=800MA
MAX_WATTAGE=330MW
V_BE_GS=+/-20V
LOW PERF:
HIGH PERF:
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
RTopVREF
0.77V
549
0.90V
549
1.09V
549
1.26V
549
VREF = 0.50 * FBVDDQ
VREF = 0.70 * FBVDDQ
RBot
1k33 || 931
1k32 || 931
1k33
1k33
4.1H< 14.3G> 7.1H<
FBVDDQ
1.55V
1.8V
1.55V
1.8V
Low
Low
High
High
GPIO10_FB_VREF_SW
4.4A<> 4.4F>
GPIO10PERF MODE
1G1D1S
4.4F> 4.5A<>
4.4A<> 4.4F<
High
High
Low
Low
1
4.4A<> 4.4F<>
FBA_DQM<7..0>
FBA_DQS_WP<7..0>
FBA_DQS_RN<7..0>
R555
Rbot1
COMMON
FBAC_VREF_CTL
3
Q504
NTS4001NT1G
SOT323_1G1D1S
COMMON
2
R553
0402
COMMON
R554
1.33K
0402
COMMON
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBVDDQ
549
1%
1%
GND
FBA_DQM<0>
FBA_DQM<1>
FBA_DQM<2>
FBA_DQM<3>
FBA_DQM<4>
FBA_DQM<5>
FBA_DQM<6>
FBA_DQM<7>
FBA_DQS_WP<0>
FBA_DQS_WP<1>
FBA_DQS_WP<2>
FBA_DQS_WP<3>
FBA_DQS_WP<4>
FBA_DQS_WP<5>
FBA_DQS_WP<6>
FBA_DQS_WP<7>
FBA_DQS_RN<0>
FBA_DQS_RN<1>
FBA_DQS_RN<2>
FBA_DQS_RN<3>
FBA_DQS_RN<4>
FBA_DQS_RN<5>
FBA_DQS_RN<6>
FBA_DQS_RN<7>
Rtop
Rbot
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38>
38
FBA_D<39>
39
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
SNN_FBA_WDS0
SNN_FBA_WDS0*
SNN_FBA_WDS1
SNN_FBA_WDS1*
SNN_FBA_WDS2
SNN_FBA_WDS2*
SNN_FBA_WDS3
SNN_FBA_WDS3*
FB_VREF1
C576
.01UF
16V
10%
X7R
0402
COMMON
G1
G96-400-A1 DT
BGA969
COMMON
R30
R32
P31
N30
L31
M32
M30
L30
P33
P34
N35
P35
N34
L33
L32
N33
K31
K30
G30
K32
G32
H30
F30
G31
H33
K35
K33
G34
K34
E33
E34
G33
AG30
AH31
AG32
AF31
AF30
AD30
AC32
AE30
AE32
AF33
AF34
AE35
AE33
AE34
AC35
AB32
AN33
AK32
AL33
AM33
AL31
AK30
AJ30
AH30
AM35
AH33
AH35
AH32
AH34
AM34
AL35
AJ33
P30
P32
J30
H34
AF32
AF35
AL32
AL34
N31
L34
J32
H35
AE31
AC33
AJ32
AJ34
N32
L35
H31
G35
AD32
AC34
AJ31
AJ35
P29
R29
L29
M29
AD29
AE29
AG29
AH29
J27
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29
T32
T31
AC31
AC30
T30
AG27
AF27
FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
SNN_FBA_CMD7
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<22>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
SNN_FBA_CMD26
FBA_CMD<27>
SNN_FBA_CMD28
SNN_FBA_CMD29
SNN_FBA_CMD30
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DEBUG
FB_PLLAVDD
C574
.1UF
16V
10%
X7R
0402
COMMON
C623
.1UF
16V
10%
X7R
0402
COMMON
R546
0402
4.2A<
4.2A<
4.2D<
4.2D<
1%
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
C629
.1UF
16V
10%
X7R
0402
COMMON
C572
.1UF
16V
10%
X7R
0402
COMMON
FBA_CMD<27..0>
4.4F<
4.4F<
4.4F<
4.4F<
40.2
NO STUFF
3.5G<> 6.5G<
FBVDDQ
C595
.1UF
16V
10%
X7R
0402
COMMON
C575
.1UF
16V
10%
X7R
0402
COMMON
C506
1UF
6.3V
10%
X7R
0603
COMMON
C539
1UF
6.3V
10%
X7R
0603
COMMON
C524
1UF
6.3V
10%
X7R
0603
COMMON
C540
1UF
6.3V
10%
X7R
0603
COMMON
4.1A< 4.4F<
C535
4.7UF
6.3V
10%
X5R
0603
COMMON
C526
4.7UF
6.3V
10%
X5R
0603
COMMON
3.4F>
6.5G<
FBVDDQ
GND
GND
FB_PLLAVDD
FB_VREF1
10MIL
12MIL
VOLTAGEMIN_LINE_WIDTHNET
1.1V
1.26V
GND
www.vinafix.vn
BASE LEVEL GENERIC SCHEMATIC ONLY
FBA MEMORY INTERFACE & FBVDDQ DECOUPLING CAPS
602-10615-0001-100 A
design
dhao
3 OF 19
18-SEP-2007

BIBIININOUTINININOUTINBIBIBIBIBIBIBIININ
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
FRAME BUFFER PARTITION A
Default
Termination
4.4F<
3.4E>
3.4E>
4.4F<
GDDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
FBVDDQ
4.4F<>
4.4F>
4.4F<
4.4F>
3.2F> 4.4F<
475
R519
COMMON
0402
1%
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
ZQ = 6x desired output
FBA_CMD<22>
121
R513
NO STUFF
0402
R106
0402
R514
0402
R524
0402
R502
0402
R515
0402
R517
0402
R525
0402
1%
1%
1%
1%
1%
1%
1%
1%
3.1C<>
3.3C<>
3.4C<
3.3C<>
121
NO STUFF
121
NO STUFF
121
NO STUFF
121
NO STUFF
121
NO STUFF
121
NO STUFF
121
NO STUFF
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<4>
FBA_CMD<6>
FBA_CMD<5>
FBA_CMD<13>
FBA_D<63..0>
FBA_DQM<7..0>
FBA_DQS_RN<7..0>
FBA_DQS_WP<7..0>
FBA_CMD<27..0>
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD27 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
CMD14 A<12>
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
GND
FBA_DQM<0>
FBA_DQM<1>
FBA_DQM<2>
FBA_DQM<3>
FBA_DQM<4>
FBA_DQM<5>
FBA_DQM<6>
FBA_DQM<7>
FBA_DQS_RN<0>
FBA_DQS_RN<1>
FBA_DQS_RN<2>
FBA_DQS_RN<3>
FBA_DQS_RN<4>
FBA_DQS_RN<5>
FBA_DQS_RN<6>
FBA_DQS_RN<7>
FBA_DQS_WP<0>
FBA_DQS_WP<1>
FBA_DQS_WP<2>
FBA_DQS_WP<3>
FBA_DQS_WP<4>
FBA_DQS_WP<5>
FBA_DQS_WP<6>
FBA_DQS_WP<7>
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
27
18
14
15
R508
10K
5%
0402
COMMON
FBA_CMD<1>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<22>
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<9>
FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<27>
FBA_CMD<18>
FBA_CLK0
FBA_CLK0*
SNN_FBA0_NC1
FBA_CMD<14>
FBA_DEBUG1
1K
R107
COMMON
0402
5%
FOR QIMONDA Rsen= 1Kohm
FOR OTHERS Rsen= 0 ohm
FBA_CMD<15>
GND
FBA_ZQ0
GND
R518
10K
5%
0402
COMMON
GND
FBVDDQ
0
1
2
3
4
5
6
7
32
33
34
35
36
37
38
39
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
R507
243
1%
0402
COMMON
GND
K1
K12
J1
J12
GND
FBA_D<0>
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_DQM<0>
FBA_DQS_RN<0>
FBA_DQS_WP<0>
FBA_D<32>
FBA_D<33>
FBA_D<34> C2
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_DQM<4>
FBA_DQS_RN<4>
FBA_DQS_WP<4>
B11
B10
C10
C11
F10
F11
E11
G10
E10
D10
D11
C3
G3
F2
F3
B2
B3
E2
E3
D3
D2
M3
DDR3BGA136
BGA136
BGA136
COMMON
M4
DDR3BGA136
BGA136
BGA136
COMMON
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
FBA_VREF0
H1
FBA_VREF2
H12
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_DQM<1>
FBA_DQS_RN<1>
FBA_DQS_WP<1>
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42> F11
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_DQM<5>
FBA_DQS_RN<5>
FBA_DQS_WP<5>
FBVDDQ
FBVDDQ
GND
GND
G10
E11
F10
C10
B10
B11
C11
E10
D10
D11
C3FBA_D<8>
B3
C2
B2
F3
E2
F2
G3
E3
D3
D2
R110
549
0402
COMMON
1.33K
0402
COMMON
M3
DDR3BGA136
BGA136
BGA136
COMMON
M4
DDR3BGA136
BGA136
BGA136
COMMON
ROUTE CMD BRANCH 56 OHM
(FROM TRUNK TO MEMORY)
Default
Termination
4.4F<
3.4E>
3.4E>
4.4F<
FBVDDQ
Rtop
1%
C101R111
Rbot
1%
.01UF
16V
10%
X7R
0402
COMMON
GND
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
475
R501
COMMON
0402
1%
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
ZQ = 6x desired output
GDDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
FOR QIMONDA Rsen= 1Kohm
FOR OTHERS Rsen= 0 ohm
4.4F<>
FBVDDQ
R102
549
Rtop
1%
0402
COMMON
R101
1.33K
0402
COMMON
Rbot
1%
C84
.01UF
16V
10%
X7R
0402
COMMON
GND
M3
DDR3BGA136
BGA136
BGA136
COMMON
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_DQM<2>
FBA_DQS_RN<2>
FBA_DQS_WP<2>
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_DQM<6>
FBA_DQS_RN<6>
FBA_DQS_WP<6>
M11
L10
R11
M10
T10
N11
R10
T11
N10
P10
P11
T3
R2
T2
R3
N2
M2
M3
L3
N3
P3
P2
M4
DDR3BGA136
BGA136
BGA136
COMMON
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD27 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
CMD14 A<12>
4.5F<>
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
FBVDDQ
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_DQM<3>
FBA_DQS_RN<3>
FBA_DQS_WP<3>
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
FBA_DQM<7>
FBA_DQS_RN<7>
FBA_DQS_WP<7>
M4
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
FBA_CMD<1>
1
FBA_CMD<10>
10
FBA_CMD<11>
11
FBA_CMD<8>
8
FBA_CMD<19>
19
FBA_CMD<25>
25
FBA_CMD<4>
4
FBA_CMD<6>
6
FBA_CMD<5>
5
FBA_CMD<13>
13
FBA_CMD<21>
21
FBA_CMD<16>
16
FBA_CMD<23>
23
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<9>
9
FBA_CMD<12>
12
FBA_CMD<3>
3
FBA_CMD<27>
27
FBA_CMD<18>
18
FBA_CLK1
FBA_CLK1*
SNN_FBA1_NC1
FBA_CMD<14>
14
FBA_DEBUG2
FBA_CMD<15>
15
H10
H11
K10
K11
J11
J10
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
FBA_ZQ1
R503
R516
243
1K
1%
5%
0402
0402
COMMON
COMMON
GND
GND
FBVDDQ
K12
J12
K1
J1
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBA_VREF1
FBA_VREF3
FBVDDQ
FBVDDQ
GND
GND
FBA_VREF1
FBA_VREF2
FBA_VREF0
FBA_VREF3
R105
549
0402
COMMON
1.33K
0402
COMMON
FBVDDQ
1%
1%
GND
R103
0402
1%
R100
0402
1%
R109
0402
1%
R113
0402
1%
CONTINUOUS_CURRENT=0.22A@31C
LOW PERF:
HIGH PERF:
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
RTopVREF
5490.77V
549
0.90V
549
1.09V
549
1.26V
Rtop
C85 C102R104 R112
Rbot
.01UF
16V
10%
X7R
0402
COMMON
FBA_VREFCTL1
931
COMMON
931
COMMON
931
COMMON
931
COMMON
VREF = 0.50 * FBVDDQ
VREF = 0.70 * FBVDDQ
Q502
BSS138
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=50V
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
3
2
RBot
1k33 || 931
1k32 || 931
1k33
1k33
R114
549
0402
COMMON
4.4F<>
1.33K
0402
COMMON
Low Power VREF Switch
1G1D1S
GPIO10_FB_VREF_SW1
FBVDDQ
FBVDDQ
1%
1%
GND
PERF MODE
1.55V Low
1.8V
1.55V
1.8V High
Rtop
Rbot
Low
High
.01UF
16V
10%
X7R
0402
COMMON
4.5F<>
GPIO10
High
High
Low
Low
14.3G>
7.1H< 3.5B<
GND
NET RULES for FrameBuffer A
DIFFPAIR
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
MIN_WIDTHMAX_CURRENT
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
R10
L10
M10
N11
M11
T10
R11
T11
N10
P10
P11
N2
L3
M3
R3
M2
T2
R2
T3
N3
P3
P2
M3
DDR3BGA136
BGA136
BGA136
COMMON
M4
DDR3BGA136
BGA136
BGA136
COMMON
4.5A<>
4.4A<>
4.4A<>
4.4A<>
4.1A<
4.2A<
4.2A<
4.2D<
4.2D<
3.4E>
3.4E>
3.4E>
3.4E>
3.3C<>
3.4C<
3.3C<>
3.1C<>
3.2F>
4.3D<>
4.3G<>
4.3E<>
4.3H<>
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DQS_WP<7..0>
FBA_DQS_RN<7..0>
FBA_DQM<7..0>
FBA_D<63..0>
FBA_CMD<27..0>
FBA_VREF0
FBA_VREF1
FBA_VREF2
FBA_VREF3
FBA_ZQ0
FBA_ZQ1
NV_CRITICALNET
1
1
1
1
1
1
1
1
1
NV_IMPEDANCE
80DIFF
80DIFF
80DIFF
80DIFF
50OHM
50OHM
50OHM
50OHM
50OHM
VOLTAGENET
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
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BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
FRAME BUFFER A MEMORIES
602-10615-0001-100 A
design
dhao
4 OF 19
12-JAN-2007
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VDD
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VDD
VDD
VDD
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VDD
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VDD
VDD
VDD
VDD
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VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
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VDD
VDD
VDD
2
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1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
FRAME BUFFER: PARTITION A DECOUPLING
NVVDD POWER AND DECOUPLING
FBVDDQ
C504
1UF
6.3V
X7R
0603
COMMON
C502
1UF
6.3V
10%
X7R
0603
COMMON
C525
1UF
6.3V
10% 10%10%
X7R
0603
COMMON
C531
1UF
6.3V
10%
X7R
0603
COMMON
C510
.1UF
16V
X7R
0402
COMMON
C509
.1UF
16V
10%
X7R
0402
COMMON
C521
C516
.1UF
.1UF
16V
X7R
X7R
0402
0402
COMMONCOMMON
C532
C512
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C534
.1UF
16V16V
X7R
0402
COMMON
C511
.1UF
16V
10%
X7R
0402
COMMON
C536
.1UF
16V
10%10%10%10%
X7R
0402
COMMON
C515
.1UF
16V
10%
X7R
0402
COMMON
Decoupling for M3
GND
FBVDDQ
C517
1UF
6.3V
10%
X7R
0603
COMMON
C537
1UF
6.3V
10%
0603
COMMON
C507
1UF
6.3V
10%
X7R
0603
COMMON
C518
1UF
6.3V
10%
X7RX7R
0603
COMMON
C530
.1UF
16V
10%
X7R
0402
COMMON
C520
.1UF
16V
10%
X7R
0402
COMMON
C514
.1UF
16V
10%
X7R
0402
COMMON
C508
.1UF
16V
10%
X7R
0402
COMMON
C528
.1UF
16V
10%
X7R
0402
COMMON
C533
.1UF
16V
10%
X7R
0402
COMMON
C529
.1UF
16V
10%
X7R
0402
COMMON
C538
.1UF
16V
10%
X7R
0402
COMMON
C519
.1UF
16V
10%
X7R
0402
COMMON
C505
.1UF
16V
10%
X7R
0402
COMMON
Decoupling for M4
GND
BASE LEVEL GENERIC SCHEMATIC ONLY
FBA & NVVDD DECOUPLING CAPS
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4.7UF 4.7UF4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C615
C647
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C630
C600
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON COMMONCOMMON
C617
C594
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C638
C625
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
NVVDD
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
C585C657C584
6.3V
10%
X5R
0603
COMMON
C632
.1UF
16V
10%
X7R
0402
COMMON
C612
.022UF
16V
10%
X7R
0402
C637
.1UF
16V
10%
X7R
0402
COMMON
C601
.022UF
16V
10%
X7R
0402
COMMON
G1
G96-400-A1 DT
BGA969
COMMON
NVVDD
C640
C626
.022UF
.022UF
16V
10%
X7R
0402
COMMON
C593
.022UF
16V
10%
X7R
0402
COMMON COMMON
C605
.022UF
16V
10%
X7R
0402
COMMON
C608
.022UF
16V
10%
X7R
COMMON
16V
10%
X7R
0402
COMMON
C633
.022UF
16V
10%
X7R
0402
C609
.022UF
16V
10%
X7R
0402
COMMON
C620
.022UF
16V
10%
X7R
04020402
COMMON
GND
GND
GND
GND
GND
NVVDD
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
602-10615-0001-100 A
design
dhao
5 OF 19
18-SEP-2007

G96 only
3/16 FBC
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD6
FBC_CMD5
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CLK0
FBC_CMD30
FBC_CMD29
FBC_CMD28
FBC_DEBUG
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBAC_PLLAVDD
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBAC_DLLAVDD
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_RN7
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN2
FBC_DQS_RN1
FBC_DQS_RN0
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN3
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GPU MEMORY INTERFACE: PARTITION C
MIN_LINE_WIDTHNET
7.4A<> 7.4F<>
7.4F>
7.5A<>
7.4F<
7.4A<>
7.4F>
7.4A<>
FBC_DQM<7..0>
FBC_DQS_WP<7..0>
FBC_DQS_RN<7..0>
FBC_D<63..0>
G1
G96-400-A1 DT
BGA969
COMMON
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
FBC_DQM<0>
0
FBC_DQM<1>
1
FBC_DQM<2>
2
FBC_DQM<3>
3
FBC_DQM<4> D27
4
FBC_DQM<5>
5
FBC_DQM<6>
6
FBC_DQM<7>
7
FBC_DQS_WP<0>
0
FBC_DQS_WP<1>
1
FBC_DQS_WP<2>
2
FBC_DQS_WP<3>
3
FBC_DQS_WP<4>
4
FBC_DQS_WP<5>
5
FBC_DQS_WP<6>
6
FBC_DQS_WP<7>
7
FBC_DQS_RN<0>
0
FBC_DQS_RN<1>
1
FBC_DQS_RN<2>
2
FBC_DQS_RN<3>
3
4
FBC_DQS_RN<5>
5
FBC_DQS_RN<6>
6
FBC_DQS_RN<7>
7
FBC_D<0>
FBC_D<1>
FBC_D<2>
FBC_D<3>
FBC_D<4>
FBC_D<5>
FBC_D<6>
FBC_D<7>
FBC_D<8>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_D<16>
FBC_D<17>
FBC_D<18>
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<28>
FBC_D<29> A17
FBC_D<30>
FBC_D<31>
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_D<40>
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
FBC_D<48>
FBC_D<49>
FBC_D<50>
FBC_D<51>
FBC_D<52>
FBC_D<53>
FBC_D<54>
FBC_D<55>
FBC_D<56>
FBC_D<57>
FBC_D<58>
FBC_D<59>
FBC_D<60>
FBC_D<61>
FBC_D<62>
FBC_D<63>
SNN_FBC_WDS0
SNN_FBC_WDS0*
SNN_FBC_WDS1
SNN_FBC_WDS1*
SNN_FBC_WDS2
SNN_FBC_WDS2*
SNN_FBC_WDS3
SNN_FBC_WDS3*
D11
E11
F10
D8
F8
F9
E8
F12
B11
C13
A11
B8
A8
C8
C11
C10
D12
E13
F17
F15
F16
E16
F14
F13
D13
A13
B13
A14
C16
B16
D16
D24
D26
E25
F25
F27
E28
F28
D29
A25
B25
D25
C26
C28
B28
A28
A29
E29
F29
D30
E31
C33
D33
F32
E32
B29
C29
B31
C31
B32
C32
B34
B35
F11
D10
D15
A16
D28
D34
A34
E10
A10
D14
C14
E26
B26
D32
A32
D9
B10
E14
B14
F26FBC_DQS_RN<4>
A26
D31
A31
G11
G12
G14
G15
G24
G25
G27
G28
BASE LEVEL GENERIC SCHEMATIC ONLY
FBC MEMORY INTERFACE
www.vinafix.vn
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20
E17
D17
D23
E23
G19
J19
J18
K27
L27
M27
FBVDDQ
FBC_CMD<0>
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
SNN_FBC_CMD7
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
SNN_FBC_CMD26
FBC_CMD<27>
SNN_FBC_CMD28
SNN_FBC_CMD29
SNN_FBC_CMD30
NET_NAME
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DEBUG
FB_PLLAVDD
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
R561
0402
R552
0402
R556
0402
R557
0402
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
0
1
2
3
4
5
6
8
9
1%
40.2
NO STUFF
1%
1%
1%
FBC_CMD<27..0>
7.4F<
7.2A<
7.4F<
7.2A<
7.4F<
7.2D<
7.4F< 7.2D<
FBVDDQ
44.2
COMMON
30.9
COMMON
40.2
COMMON
GND
FBVDDQ
CLOSE TO BALLS
<100 mil
C613
.1UF
16V
10%
X7R
0402
COMMON
GND
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
10MIL
10MIL
10MIL
7.1A< 7.4F<
L<750mil
COMMONBEAD_0402
PEX_VDD
LB501
6 OF 19
18-SEP-2007
3.5G<> 3.4F>
C577
.1UF
16V
10%
X7R
0402
COMMON
GND
C618
2.2UF
6.3V
20%
X5R
0402
COMMON
GND
C583
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
240R@100MHz
602-10615-0001-100 A
design
dhao