MSI MS-v142 Schematics

8

7

6

5

4

3

2

1

PCI-EXPRESS EDGE CONNECTOR

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

D D

C C

B B

+12V_BUS+12V_BUS

C3

C3

C2

150nF_16V

150nF_16V

150nF_16VC2150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

LF CAP CER 150NF 10% 16V X7R (0603)

+3.3V_BUS

CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK

C4
10uF_X6SC410uF_X6S

+3.3V_BUS

C6

C5

1uF_6.3VC61uF_6.3V

100nF_6.3VC5100nF_6.3V

Place these caps as close to the PCIE
connector as possible

R10RR1

0R

PETn0_GFXRn0<2>

PETp1_GFXRp1<2>

C0
10nFC010nF

PETn1_GFXRn1<2>

PETp2_GFXRp2<2>
PETn2_GFXRn2<2>

PETp3_GFXRp3<2>
PETn3_GFXRn3<2>

PETp4_GFXRp4<2>
PETn4_GFXRn4<2>

PETp5_GFXRp5<2>
PETn5_GFXRn5<2>

PETp6_GFXRp6<2>
PETn6_GFXRn6<2>

PETp7_GFXRp7<2>
PETn7_GFXRn7<2>

PETp8_GFXRp8<2>
PETn8_GFXRn8<2>

PETp9_GFXRp9<2>
PETn9_GFXRn9<2>

PETp10_GFXRp10<2>
PETn10_GFXRn10<2>

PETp11_GFXRp11<2>
PETn11_GFXRn11<2>

PETp12_GFXRp12<2>
PETn12_GFXRn12<2>

PETp13_GFXRp13<2>
PETn13_GFXRn13<2>

PETp14_GFXRp14<2>
PETn14_GFXRn14<2>

PETp15_GFXRp15<2>
PETn15_GFXRn15<2>

PRESENCE

+3.3V_BUS

+12V_BUS

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

x16 PCIe

x16 PCIe

Mechanical Key

Mechanical Key

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

MPCIE1

MPCIE1

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

PRESENCE

+12V_BUS

JTDI
JTDO

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

+3.3V_BUS

100nF_6.3VC7100nF_6.3V

100nF_6.3VC9100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

R2 0RR2 0R

PERST#

PCIE_REFCLKP <2>

C7

C8
100nF_6.3VC8100nF_6.3V

C9

C10

C10
100nF_6.3V

100nF_6.3V

C11

C11

C12

C12
100nF_6.3V

100nF_6.3V

C13

C13

C14

C14
100nF_6.3V

100nF_6.3V

C15

C15

C16

C16
100nF_6.3V

100nF_6.3V

C17

C17

C18

C18
100nF_6.3V

100nF_6.3V

C19

C19

C20

C20
100nF_6.3V

100nF_6.3V

C21

C21

C22

C22
100nF_6.3V

100nF_6.3V

C23

C23

C24

C24
100nF_6.3V

100nF_6.3V

C25

C25

C26

C26
100nF_6.3V

100nF_6.3V

C27

C27

C28

C28
100nF_6.3V

100nF_6.3V

C29

C29

C30

C30
100nF_6.3V

100nF_6.3V

C31

C31

C32

C32
100nF_6.3V

100nF_6.3V

C33

C33

C34

C34
100nF_6.3V

100nF_6.3V

C35

C35

C36

C36
100nF_6.3V

100nF_6.3V

C37

C37

C38

C38
100nF_6.3V

100nF_6.3V

PCIE_REFCLKN <2>PETp0_GFXRp0<2>

GFXTp0_PERp0 <2>
GFXTn0_PERn0 <2>

GFXTp1_PERp1 <2>
GFXTn1_PERn1 <2>

GFXTp2_PERp2 <2>
GFXTn2_PERn2 <2>

GFXTp3_PERp3 <2>
GFXTn3_PERn3 <2>

GFXTp4_PERp4 <2>
GFXTn4_PERn4 <2>

GFXTp5_PERp5 <2>
GFXTn5_PERn5 <2>

GFXTp6_PERp6 <2>
GFXTn6_PERn6 <2>

GFXTp7_PERp7 <2>
GFXTn7_PERn7 <2>

GFXTp8_PERp8 <2>
GFXTn8_PERn8 <2>

GFXTp9_PERp9 <2>
GFXTn9_PERn9 <2>

GFXTp10_PERp10 <2>
GFXTn10_PERn10 <2>

GFXTp11_PERp11 <2>
GFXTn11_PERn11 <2>

GFXTp12_PERp12 <2>
GFXTn12_PERn12 <2>

GFXTp13_PERp13 <2>
GFXTn13_PERn13 <2>

GFXTp14_PERp14 <2>
GFXTn14_PERn14 <2>

GFXTp15_PERp15 <2>
GFXTn15_PERn15 <2>

+3.3V

53

1
2

R_RST

R3 0RR3 0R

C39

C39
100nF_6.3V

100nF_6.3V

NC7SZ08P5X_NL

NC7SZ08P5X_NL

4

U5

U5

DNI

Place R3 in U5

PERST#_buf <2>

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - PCI-E Edge Connector

RH RV670 - PCI-E Edge Connector

8

7

6

5

www.vinafix.vn

4

3

RH RV670 - PCI-E Edge Connector

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

123

of

123

of

123

GROUND

BUO BRING UP

ONLY

Doc No.

Doc No.

Doc No.

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

1

RevDate:

RevDate:

RevDate:

1

1

1

5

D D

NOTE: some of the PCIE testpoints will
be available trought via on traces.

PETp0_GFXRp0<1>
PETn0_GFXRn0<1>

PETp1_GFXRp1<1>
PETn1_GFXRn1<1>

PETp2_GFXRp2<1>
PETn2_GFXRn2<1>

PETp3_GFXRp3<1>
PETn3_GFXRn3<1>

PETp4_GFXRp4<1>
PETn4_GFXRn4<1>

PETp5_GFXRp5<1>
PETn5_GFXRn5<1>

PETp6_GFXRp6<1>

C C

B B

PCIE_REFCLKP<1>
PCIE_REFCLKN<1>

PETn6_GFXRn6<1>

PETp7_GFXRp7<1>
PETn7_GFXRn7<1>

PETp8_GFXRp8<1>

PETp9_GFXRp9<1>
PETn9_GFXRn9<1>

PETp10_GFXRp10<1>
PETn10_GFXRn10<1>

PETp11_GFXRp11<1>
PETn11_GFXRn11<1>

PETp12_GFXRp12<1>
PETn12_GFXRn12<1>

PETp13_GFXRp13<1>
PETn13_GFXRn13<1>

PETp14_GFXRp14<1>
PETn14_GFXRn14<1>

PETp15_GFXRp15<1>
PETn15_GFXRn15<1>

DNI DNI

R13

R13

R14

R14

51R

51R

51R

51R

402 402

TP11TP11

TP12TP12

TP13TP13

TP14TP14

TP19TP19

TP20TP20

TP21TP21

TP22TP22

TP27TP27

TP28TP28

4

U1A

TP7TP7

TP8TP8

TP9TP9

TP10TP10

TP15TP15

TP16TP16

TP17TP17

TP18TP18

TP23TP23

TP24TP24

TP25TP25

TP26TP26

U1A

AW48

PCIE_RX0P

AW46

PCIE_RX0N

AV51

PCIE_RX1P

AV49

PCIE_RX1N

AU48

PCIE_RX2P

AU46

PCIE_RX2N

AT51

PCIE_RX3P

AT49

PCIE_RX3N

AR48

PCIE_RX4P

AR46

PCIE_RX4N

AP51

PCIE_RX5P

AP49

PCIE_RX5N

AN48

PCIE_RX6P

AN46

PCIE_RX6N

AM51

PCIE_RX7P

AM49

PCIE_RX7N

AL48

PCIE_RX8P

AL46

PCIE_RX8N

AK51

PCIE_RX9P

AK49

PCIE_RX9N

AJ48

PCIE_RX10P

AJ46

PCIE_RX10N

AH51

PCIE_RX11P

AH49

PCIE_RX11N

AG48

PCIE_RX12P

AG46

PCIE_RX12N

AF51

PCIE_RX13P

AF49

PCIE_RX13N

AE48

PCIE_RX14P

AE46

PCIE_RX14N

AD51

PCIE_RX15P

AD49

PCIE_RX15N

AW43

PCIE_REFCLKP

AW42

PCIE_REFCLKN

PERST#_buf<1>

AP36

PERSTB

Clock

Clock

PART 1 OF 10

PART 1 OF 10

P

P
C

C
I

I

-

­E

E
X

X
P

P
R

R
E

E
S

S
S

S

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

Calibration

Calibration

PCIE_CALRN
PCIE_CALRP

3

AU40
AU39

AU43
AU42

AT40
AT39

AT43
AT42

AP40
AP39

AP43
AP42

AN40
AN39

AN43
AN42

AL40
AL39

AL43
AL42

AK40
AK39

AK43
AK42

AH40
AH39

AH43
AH42

AG40
AG39

AG43
AG42

+PCIE_VDDC

402

AN37
AP37

R82.0K R82.0K

402

R91.27K R91.27K

2

GFXTp0_PERp0 <1>
GFXTn0_PERn0 <1>

GFXTp1_PERp1 <1>
GFXTn1_PERn1 <1>

GFXTp2_PERp2 <1>
GFXTn2_PERn2 <1>

GFXTp3_PERp3 <1>
GFXTn3_PERn3 <1>

GFXTp4_PERp4 <1>
GFXTn4_PERn4 <1>

GFXTp5_PERp5 <1>
GFXTn5_PERn5 <1>

GFXTp6_PERp6 <1>
GFXTn6_PERn6 <1>

GFXTp7_PERp7 <1>
GFXTn7_PERn7 <1>

GFXTp8_PERp8 <1>
GFXTn8_PERn8 <1>PETn8_GFXRn8<1>

GFXTp9_PERp9 <1>
GFXTn9_PERn9 <1>

GFXTp10_PERp10 <1>
GFXTn10_PERn10 <1>

GFXTp11_PERp11 <1>
GFXTn11_PERn11 <1>

GFXTp12_PERp12 <1>
GFXTn12_PERn12 <1>

GFXTp13_PERp13 <1>
GFXTn13_PERn13 <1>

GFXTp14_PERp14 <1>
GFXTn14_PERn14 <1>

GFXTp15_PERp15 <1>
GFXTn15_PERn15 <1>

1

For Tektronix LA only

Place close
to ASIC

A A

5

4

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

www.vinafix.vn

3

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC PCIE_Interface

RH RV670 - ASIC PCIE_Interface

2

RH RV670 - ASIC PCIE_Interface

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

223

of

223

of

223

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

Place close to ASIC

NS100

NS100

NS_VIA

NS_VIA

1 2

GND_T2PVSS

C103

C103

10uF_X6S

10uF_X6S

DDC3CLK<20>

R71KR7
1K

DNI

R106 100RR106 100R

R100 100RR100 100R

R101 100RR101 100R

R102 100RR102 100R

R103 100RR103 100R

R104 100RR104 100R

R105 100RR105 100R

C100

C100

10uF_X6S

10uF_X6S

C106

C106

1uF_6.3V

1uF_6.3V

+3.3V

R40

R40

4.7K

4.7K

+1.8V

R43 221RR43 221R
R44 110RR44 110R

C46 100nF_6.3VC46 100nF_6.3V

R81 33RR81 33R

C102

C102

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

R41

R41

4.7K

4.7K

402 402

C108

C108

TP42TP42

T2XCM
T2XCP

T2X0M
T2X0P

T2X1M
T2X1P

T2X2M
T2X2P

T2X3M
T2X3P

T2X4M
T2X4P

T2X5M
T2X5P

C101

C101

100nF_6.3V

100nF_6.3V

C109

C109

100nF_6.3V

100nF_6.3V

DDC1DATA<17>

DDC2DATA<18>

DDC4DATA
DDC4CLK

GPU_DMINUS<20>
GPU_DPLUS<20>

TS_FDO<20>

XTALIN

DDC1CLK<17>

DDC2CLK<18>

DDC3DATA
DDC3CLK

PLL_TEST
TEST_EN

D D

+1.8V

B102

B102

BLM15BD121SN1

BLM15BD121SN1

Q100

Q100

SI2304DS

SI2304DS

C C

LVT_EN<15>

B B

A A

1

+3.3V

TR40

TR40

4.7K

4.7K

402 402

BUO BUO

I2C DEVICE ADDRESS

DEVICE
LM63
ADS1112

C82

C82

12pF_50V

12pF_50V

C83

C83

12pF_50V

12pF_50V

32

TR41

TR41

4.7K

4.7K

2 1

Y82

Y82

27.000MHz_10PPM

27.000MHz_10PPM

T2XCM<17>
T2XCP<17>

T2X0M<17>

T2X0P<17>

T2X1M<17>

T2X1P<17>

T2X2M<17>

T2X2P<17>

T2X3M<17>

T2X3P<17>

T2X4M<17>

T2X4P<17>

T2X5M<17>

T2X5P<17>

+T2PVDD

+T2XVDD

B100

B100

26R_600mA

26R_600mA

Use 0R

ADDRESS
1001 100 (R/W#) --> DDC3
1001 000 (R/W#) --> DDC4 BUO

R841MR84
1M

DDC3DATA<20>

4

U1B

U1B

Integrated TMDS2

Integrated TMDS2

BH35

T2XCM

BF35

T2XCP

BL36

T2X0M

BJ36

T2X0P

BH37

T2X1M

BF37

T2X1P

BL38

T2X2M

BJ38

T2X2P

BH39

T2X3M

BF39

T2X3P

BH41

T2X4M

BF41

T2X4P

BL42

T2X5M

BJ42

T2X5P

BL44

TXOUT_U2N

BJ44

TXOUT_U2P

BL46

TXOUT_U3N

BJ46

TXOUT_U3P

BJ40

TXCLK_UP

BL40

TXCLK_UN

BE38

LPVDD

BE40

LPVSS

BG34

LVDDC1

BK35

LVDDC2

BL34

LVDDR1

BJ34

LVDDR2

BE36

LVSSR1

BE42

LVSSR2

BL49

LVSSR3

BG36

LVSSR4

BG38

LVSSR5

BG40

LVSSR6

BG42

LVSSR7

BF44

LVSSR8

BK37

LVSSR9

BK39

LVSSR10

BK41

LVSSR11

BB45

DDC1DATA

BB47

DDC1CLK

AV36

DDC2DATA

AW36

DDC2CLK

AU32

DDC3DATA

AT32

DDC3CLK

AV35

DDC4DATA

AW35

DDC4CLK

VREFG

BB29

HPD1

AV27

SDA

AV29

SCL

BC27

DMINUS

BB27

DPLUS

AT21

TS_FDO

AU36

PLLTEST

AT37

TESTEN

AT20

VREFG

BJ49

XTALIN

BF46

XTALOUT

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

HPD1<18>

XTALOUT

Monitor Interface

Monitor Interface

MMI2C

MMI2C

Thermal

Thermal
Diode

Diode

Test

Test

PART 2 OF 10

PART 2 OF 10

V

V
I

I
D

D
E

E
O

O

&

&

M

M
U

U
L

L
T

T
I

I
M

M
E

E
D

D
I

I
A

A

Integrated TMDS

Integrated TMDS

TXVDDR1
TXVDDR2
TXVDDR3
TXVDDR4

TXVSSR1
TXVSSR2
TXVSSR3
TXVSSR4
TXVSSR5
TXVSSR6
TXVSSR7
TXVSSR8
TXVSSR9

TXVSSR10

DAC / CRT

DAC / CRT

DAC2 (TV/CRT2)

DAC2 (TV/CRT2)

H2SYNC

A2VDDQ

TXCAM
TXCAP

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TX3M

TX3P

TX4M

TX4P

TX5M

TX5P

TPVDD
TPVSS

TXCBM
TXCBP

HSYNC

VSYNC

RSET
AVDD

AVSSQ

VDD1DI
VSS1DI

V2SYNC

COMP

R2SET

A2VSSQ

VDD2DI
VSS2DI

A2VDD

NC_1
NC_2

NC_3
NC_4
NC_5
NC_6
NC_7

BL26
BJ26

BH27
BF27

BL28
BJ28

BH29
BF29

BH31
BF31

BL32
BJ32

BH33
BF33

BL24
BJ24

BL30
BJ30

BE26
BF25
BH25
BK25

BE28
BE30
BG26
BG28
BG30
BG32
BK27
BK29
BK31
BK33

BB49

R

BB51

RB

BD49

G

BD51

GB

BF49

B

BF51

BB

BA42
BA43

BB43
BD46
BD44

BA50
BA48

BA39

R2

AY39

R2B

BC39

G2

BB39

G2B

BC37

B2

BB37

B2B

BA36
AY36

AY37

Y

BA37

C

AW37

BA40

BC42
BB41

BC36
BB36

BC41
BC40

BB40
BB32

BE34
BC33
BC32
BE32

3

T1XCM
T1XCP

T1X0M
T1X0P

T1X1M
T1X1P

T1X2M
T1X2P

T1X3M
T1X3P

T1X4M
T1X4P

T1X5M
T1X5P

C111

C111

C112

C112

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C115

C115

C116

C116

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C2021

C2021
100nF_6.3V

100nF_6.3V

C2024

C2024
10nF

10nF

C2031

C2031
100nF_6.3V

100nF_6.3V

C1023

C1023
10nF

10nF

GND_AVSSQRSET

DNI

C2025

C2025
100nF_6.3V

100nF_6.3V

C2032

C2032
1uF_6.3V

1uF_6.3V

C1024

C1024
100nF_6.3V

100nF_6.3V

C2022

C2022
1uF_6.3V

1uF_6.3V

C2026

C2026
1uF_6.3V

1uF_6.3V

GND_VSS2DI

R1030 499RR1030 499R

R2SET GND_A2VSSQ

R2030 715RR2030 715R

C2030

C2030
10nF

10nF

C113

C113
10uF_X6S

10uF_X6S

C117

C117
10uF_X6S

10uF_X6S

C1025

C1025
1uF_6.3V

1uF_6.3V

NS2021 NS_VIANS2021 NS_VIA

C2033

C2033

4.7uF_6.3V

4.7uF_6.3V

GND_TPVSS

A_DAC1_R <17>
A_DAC1_RB <17>

A_DAC1_G <17>
A_DAC1_GB <17>

A_DAC1_B <17>
A_DAC1_BB <17>

HSYNC1 <7,17>
VSYNC1 <7,17>

GND_AVSSQ

C1020

C1020

C1021

C1021
100nF_6.3V

100nF_6.3V

10nF

10nF

A_DAC2_R <18>
A_DAC2_RB <18>

A_DAC2_G <18>
A_DAC2_GB <18>

A_DAC2_B <18>
A_DAC2_BB <18>

HSYNC2 <7,18>
VSYNC2 <7,18>

A_DAC2_Y <19>
A_DAC2_C <19>
A_DAC2_COMP <19>

GND_A2VSSQ

NS2020 NS_VIANS2020 NS_VIA

+VDD2DI

12

Place close to ASIC

R116 182RR116 182R

DNI

R110 182RR110 182R

R111 182RR111 182R

R112 182RR112 182R

R113 182RR113 182R

R114 182RR114 182R

R115 182RR115 182R

+TPVDD

NS110

NS110
NS_VIA

NS_VIA

12

+TXVDDR

+AVDD

C1022

C1022
1uF_6.3V

1uF_6.3V

+VDD1DI

NS1021 NS_VIANS1021 NS_VIA

GND_VSS1DI

+A2VDDQ

12

GND_A2VSSQ

+A2VDD

NS1020 NS_VIANS1020 NS_VIA

GND_AVSSQ

12

2

T1XCM <18>
T1XCP <18>

T1X0M <18>
T1X0P <18>

T1X1M <18>
T1X1P <18>

T1X2M <18>
T1X2P <18>

T1X3M <18>
T1X3P <18>

T1X4M <18>
T1X4P <18>

T1X5M <18>
T1X5P <18>

B112

B112

BLM15BD121SN1

BLM15BD121SN1

B110

B110

26R_600mA

26R_600mA

B1020

B1020

BLM15BD121SN1

BLM15BD121SN1

12

BLM15BD121SN1

BLM15BD121SN1

B2020

B2020

BLM15BD121SN1

BLM15BD121SN1

B2021

B2021

BLM15BD121SN1

BLM15BD121SN1

B2030

B2030

BLM15BD121SN1

BLM15BD121SN1

B1021

B1021

1

+1.8V

+3.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC MAIN

RH RV670 - ASIC MAIN

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC MAIN

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 26, 2008

Wednesday, March 26, 2008

Wednesday, March 26, 2008

Sheet

Sheet

Sheet

of

323

of

323

of

323

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

C151

C151
1uF_6.3V

1uF_6.3V

C133

C133
1uF_6.3V

1uF_6.3V

C141

C141
1uF_6.3V

1uF_6.3V

C981

C981
1uF_6.3V

1uF_6.3V

C961

C961
1uF_6.3V

1uF_6.3V

C972

C972
100nF_6.3V

100nF_6.3V

B94

B94

BLM15BD121SN1

BLM15BD121SN1

BLM15BD121SN1

BLM15BD121SN1

NS70 NS_VIANS70 NS_VIA

1 2

GND_PVSS

B60

B60
BLM15BD121SN1

BLM15BD121SN1

5

C152

C152
1uF_6.3V

1uF_6.3V

C135

C135
1uF_6.3V

1uF_6.3V

C142

C142
1uF_6.3V

1uF_6.3V

C962

C962
1uF_6.3V

1uF_6.3V

MC955

MC955

4.7uF_6.3V

4.7uF_6.3V

C956

C956
10uF_X6S

10uF_X6S

C121

C121
1uF_6.3V

1uF_6.3V

Use 0R

B69

B69

MB67

MB67

220R_2A

220R_2A

B67

B67

220R_2A

220R_2A
NS64 NS_VIANS64 NS_VIA

1 2

GND_MPVSS

C153

C153
1uF_6.3V

1uF_6.3V

C143

C143
1uF_6.3V

1uF_6.3V

C982

C982
1uF_6.3V

1uF_6.3V

C963

C963
1uF_6.3V

1uF_6.3V

C973

C973
100nF_6.3V

100nF_6.3V

MC956

MC956

4.7uF_6.3V

4.7uF_6.3V

C958

C958
10uF_X6S

10uF_X6S

NS122 NS_VIANS122 NS_VIA

+DPLL_PVDD

DNI

C136

C136
1uF_6.3V

1uF_6.3V

C983

C983
1uF_6.3V

1uF_6.3V

C964

C964
1uF_6.3V

1uF_6.3V

C974

C974
100nF_6.3V

100nF_6.3V

1 2

GND_VSSRHC

+3.3V

+DPLL_VDDC

GND_PVSS

GND_MPVSS

GND_MPVSS

C154

C154
1uF_6.3V

1uF_6.3V

C144

C144
1uF_6.3V

1uF_6.3V

C984

C984
1uF_6.3V

1uF_6.3V

MC958

MC958

4.7uF_6.3V

4.7uF_6.3V

C959

C959
10uF_X6S

10uF_X6S

+MPVDD

C155

C155
1uF_6.3V

1uF_6.3V

C138

C138
1uF_6.3V

1uF_6.3V

C145

C145
1uF_6.3V

1uF_6.3V

C985

C985
1uF_6.3V

1uF_6.3V

C965

C965
1uF_6.3V

1uF_6.3V

C130

C130
100nF_6.3V

100nF_6.3V

MC959

MC959

4.7uF_6.3V

4.7uF_6.3V

C126

C126
10uF_X6S

10uF_X6S

NS123 NS_VIANS123 NS_VIA

1 2

GND_VSSRHD

C91

C91
100nF_6.3V

100nF_6.3V

+VDDR_DVP

C60

C60
10uF_X6S

10uF_X6S

C62

C62
10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

C156

C156
1uF_6.3V

1uF_6.3V

C139

C139
1uF_6.3V

1uF_6.3V

C146

C146
1uF_6.3V

1uF_6.3V

C986

C986
1uF_6.3V

1uF_6.3V

C967

C967

C966

C966

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C131

C131
100nF_6.3V

100nF_6.3V

MC126

MC126

4.7uF_6.3V

4.7uF_6.3V

C127

C127
10uF_X6S

10uF_X6S

NS120 NS_VIANS120 NS_VIA

1 2
GND_VSSRHA

C122

C122
1uF_6.3V

1uF_6.3V

C92

C92
100nF_6.3V

100nF_6.3V

C94

C94
10uF_X6S

10uF_X6S

C68

C68
1uF_6.3V

1uF_6.3V

C64

C64
10nF

10nF

C67

C67

1uF_6.3V

1uF_6.3V

C157

C157
1uF_6.3V

1uF_6.3V

C975

C975

C976

C976

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C148

C148

C147

C147

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C987

C987
1uF_6.3V

1uF_6.3V

C968

C968
1uF_6.3V

1uF_6.3V

C134

C134
100nF_6.3V

100nF_6.3V

MC127

MC127

4.7uF_6.3V

4.7uF_6.3V

Overlapped Footprints

C128

C128
10uF_X6S

10uF_X6S

C120

C120

1uF_6.3V

1uF_6.3V

C123

C123
1uF_6.3V

1uF_6.3V

C93

C93
100nF_6.3V

100nF_6.3V

C95

C95
1uF_6.3V

1uF_6.3V

C69

C69
100nF_6.3V

100nF_6.3V

C61

C61
100nF_6.3V

100nF_6.3V

C66

C66

C988

C988
1uF_6.3V

1uF_6.3V

C137

C137
100nF_6.3V

100nF_6.3V

+DPLL_PVDD

GND_PVSS

+DPLL_VDDC

C63

C63
1uF_6.3V

1uF_6.3V

C65

C65

100nF_6.3V

100nF_6.3V

+MVDD

C150

C150
1uF_6.3V

1uF_6.3V

C132

C132
1uF_6.3V

1uF_6.3V

D D

C C

B B

A A

+MVDD

C140

C140
1uF_6.3V

1uF_6.3V

C980

C980
1uF_6.3V

1uF_6.3V

C960

C960
1uF_6.3V

1uF_6.3V

C971

C971
100nF_6.3V

100nF_6.3V

MC954

MC954

4.7uF_6.3V

4.7uF_6.3V

C954

C954
10uF_X6S

10uF_X6S

B120

B120

B121

B121

BLM15BD121SN1

BLM15BD121SN1

NS121 NS_VIANS121 NS_VIA

1 2

GND_VSSRHB

B122

B122

BLM15BD121SN1

BLM15BD121SN1

B123

B123

BLM15BD121SN1

BLM15BD121SN1

+1.8V

+1.1V

+VDDCI_LDO

+VDDC

C955

C955
10uF_X6S

10uF_X6S

BLM15BD121SN1

BLM15BD121SN1

C158

C158
1uF_6.3V

1uF_6.3V

C977

C977
1uF_6.3V

1uF_6.3V

C149

C149
1uF_6.3V

1uF_6.3V

C969

C969
1uF_6.3V

1uF_6.3V

MC128

MC128

4.7uF_6.3V

4.7uF_6.3V

C97

C97
100nF_6.3V

100nF_6.3V

+MPVDD

C159

C159
1uF_6.3V

1uF_6.3V

C989

C989
1uF_6.3V

1uF_6.3V

+VDDRHA

+VDDRHB

C96

C96
1uF_6.3V

1uF_6.3V

4

C978

C978
1uF_6.3V

1uF_6.3V

C979

C979
1uF_6.3V

1uF_6.3V

C970

C970
1uF_6.3V

1uF_6.3V

+VDDRHC

+VDDRHD

C98

C98
100nF_6.3V

100nF_6.3V

U1G

U1G

G14

VDDR1#1

G18

VDDR1#2

G22

VDDR1#3

G26

VDDR1#4

G30

VDDR1#5

R34

VDDR1#6

G40

VDDR1#7

T15

VDDR1#8

M26

VDDR1#9

AD15

VDDR1#10

P29

VDDR1#11

L38

VDDR1#12

M39

VDDR1#13

L10

VDDR1#14

N19

VDDR1#15

M32

VDDR1#16

N16

VDDR1#17

P25

VDDR1#18

K35

VDDR1#19

P7

VDDR1#20

T19

VDDR1#21

R22

VDDR1#22

K43

VDDR1#23

P41

VDDR1#24

P45

VDDR1#25

T12

VDDR1#26

V38

VDDR1#27

U40

VDDR1#28

V7

VDDR1#29

V45

VDDR1#30

AA14

VDDR1#31

AB45

VDDR1#32

AA40

VDDR1#33

AB7

VDDR1#34

W15

VDDR1#35

AD43

VDDR1#36

AC37

VDDR1#37

AB10

VDDR1#38

AE13

VDDR1#39

AF7

VDDR1#40

AH11

VDDR1#41

AF15

VDDR1#42

AK7

VDDR1#43

AL13

VDDR1#44

AP7

VDDR1#45

AP12

VDDR1#46

BC14

VDDR1#47

AU11

VDDR1#48

AV7

VDDR1#49

BA10

VDDR1#50

AW14

VDDR1#51

AT15

VDDR1#52

V42

VDDRHA

V41

VSSRHA

L31

VDDRHB

L29

VSSRHB

W12

VDDRHC

W11

VSSRHC

AM12

VDDRHD

AM11

VSSRHD

AT26

VDDR3#1

AT27

VDDR3#2

AT29

VDDR3#3

AT30

VDDR3#4

BF23

VDDR4#1

BH23

VDDR4#2

BK23

VDDR4#3

BE22

VDDR5#1

BG22

VDDR5#2

BJ22

VDDR5#3

BA35

DPLL_PVDD

BB35

DPLL_PVSS

BC35

DPLL_VDDC

T22

MPVDD

T23

MPVSS

Y19

NC_15

W20

NC_16

W19

NC_17

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 7 OF 10

Part 7 OF 10

Memory I/O

Memory I/O

P

P
O

O
W

W
E

E
R

R

PCIE_PVDD

PCIE_VDDC1
PCIE_VDDC2
PCIE_VDDC3
PCIE_VDDC4
PCIE_VDDC5
PCIE_VDDC6
PCIE_VDDC7
PCIE_VDDC8

PCIE_VDDC9
PCIE_VDDC10
PCIE_VDDC11
PCIE_VDDC12

PCIE_VDDR1

PCIE_VDDR2

PCIE_VDDR3

PCIE_VDDR4

PCI-Express

PCI-Express

PCIE_VDDR5

PCIE_VDDR6

PCIE_VDDR7

PCIE_VDDR8

Core

Core

VDDC0
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8

VDDC9
VDDC10
VDDC11
VDDC12
VDDC13
VDDC14
VDDC15
VDDC16
VDDC17
VDDC18
VDDC19
VDDC20
VDDC21
VDDC22
VDDC23
VDDC24
VDDC25
VDDC26
VDDC27
VDDC28
VDDC29
VDDC30
VDDC31
VDDC32
VDDC33
VDDC34
VDDC35
VDDC36
VDDC37
VDDC38
VDDC39
VDDC40
VDDC41
VDDC42
VDDC43
VDDC44
VDDC45
VDDC46
VDDC47
VDDC48
VDDC49
VDDC50
VDDC51
VDDC52
VDDC53
VDDC54
VDDC55
VDDC56
VDDC57
VDDC58
VDDC59
VDDC60
VDDC61
VDDC62
VDDC63
VDDC64
VDDC65
VDDC66
VDDC67
VDDC68
VDDC69
VDDC70
VDDC71
VDDC72
VDDC73
VDDC74

VDDCI1
VDDCI2
VDDCI3
VDDCI4
VDDCI5
VDDCI6
VDDCI7
VDDCI8

VDD_CT1
VDD_CT2
VDD_CT3

3

AY51
AF36

AF37
AG36
AG37
AH36
AH37
AK36
AK37
AL36
AL37
AN36
AF38

AW40
AW41
AY41
AY42
AY43
AY45
AY47
BA46

AM19
W26
W28
W31
W33
Y25
Y27
Y30
Y32
AA24
AA26
AA28
AA31
AA33
AB22
AB25
AB27
AB30
AB32
AD21
AD24
AD26
AD28
AD31
AD33
AE20
AE22
AE25
AE27
AE30
AE32
AF19
AF21
AF24
AF26
AF28
AF31
AF33
AG20
AG22
AG25
AG27
AG30
AG32
AH19
AH21
AH24
AH26
AH28
AH31
AH33
AK20
AK22
AK25
AK27
AK30
AK32
AL19
AL21
AL24
AL26
AL28
AL31
AL33
AM22
AM25
AM27
AM30
AM32
AN21
AN24
AN26
AN28
AN31
AN33

W21
W24
Y20
Y22
AA19
AA21
AB20
AD19

BG14
BJ14
BL14

C161

C161
1uF_6.3V

1uF_6.3V

C171

C171
1uF_6.3V

1uF_6.3V

C1125

C1125
10uF_X6S

10uF_X6S

C1102

C1102
1uF_6.3V

1uF_6.3V

C1111

C1111
1uF_6.3V

1uF_6.3V

C911

C911
1uF_6.3V

1uF_6.3V

C78

C78
100nF_6.3V

100nF_6.3V

C900

C900
1uF_6.3V

1uF_6.3V

C940

C940
1uF_6.3V

1uF_6.3V

MC1125

MC1125

4.7uF_6.3V

4.7uF_6.3V

C162

C162
1uF_6.3V

1uF_6.3V

C172

C172
1uF_6.3V

1uF_6.3V

C941

C941
1uF_6.3V

1uF_6.3V

C1136

C1136
10uF_X6S

10uF_X6S

MC1136

MC1136

4.7uF_6.3V

4.7uF_6.3V

C1103

C1103
1uF_6.3V

1uF_6.3V

C1112

C1112
1uF_6.3V

1uF_6.3V

C1123

C1123
100nF_6.3V

100nF_6.3V

C913

C913
1uF_6.3V

1uF_6.3V

C79

C79
100nF_6.3V

100nF_6.3V

C930

C930
10nF

10nF

C920

C920
1uF_6.3V

1uF_6.3V

C901

C901
100nF_6.3V

100nF_6.3V

C163

C163
1uF_6.3V

1uF_6.3V

C173

C173
1uF_6.3V

1uF_6.3V

C1104

C1104
1uF_6.3V

1uF_6.3V

C1114

C1114
1uF_6.3V

1uF_6.3V

C77

C77
1uF_6.3V

1uF_6.3V

C931

C931
100nF_6.3V

100nF_6.3V

C921

C921
1uF_6.3V

1uF_6.3V

C902

C902
1uF_6.3V

1uF_6.3V

C946

C946
1uF_6.3V

1uF_6.3V

C1137

C1137
10uF_X6S

10uF_X6S

MC1137

MC1137

4.7uF_6.3V

4.7uF_6.3V

C180

C180
100nF_6.3V

100nF_6.3V

C914

C914
100nF_6.3V

100nF_6.3V

C164

C164
1uF_6.3V

1uF_6.3V

C174

C174
1uF_6.3V

1uF_6.3V

C1115

C1115
1uF_6.3V

1uF_6.3V

+PCIE_PVDD

C932

C932
10uF_X6S

10uF_X6S

C922

C922
1uF_6.3V

1uF_6.3V

C903

C903
1uF_6.3V

1uF_6.3V

C165

C165
1uF_6.3V

1uF_6.3V

C175

C175
1uF_6.3V

1uF_6.3V

C948

C948
1uF_6.3V

1uF_6.3V

C1138

C1138
10uF_X6S

10uF_X6S

MC1138

MC1138

4.7uF_6.3V

4.7uF_6.3V

Overlapped Footprints

C1100

C1100

C1107

C1107

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C1116

C1116
1uF_6.3V

1uF_6.3V

C942

C942
100nF_6.3V

100nF_6.3V

C915

C915
100nF_6.3V

100nF_6.3V

B76

B76

+VDD_CT

C76

C76

BLM15BD121SN1

BLM15BD121SN1

1uF_6.3V

1uF_6.3V

C933

C933
1uF_6.3V

1uF_6.3V

C923

C923
1uF_6.3V

1uF_6.3V

C904

C904
100nF_6.3V

100nF_6.3V

C166

C166
1uF_6.3V

1uF_6.3V

C176

C176
1uF_6.3V

1uF_6.3V

C1139

C1139
10uF_X6S

10uF_X6S

MC1139

MC1139

4.7uF_6.3V

4.7uF_6.3V

C1117

C1117
1uF_6.3V

1uF_6.3V

C1113

C1113
100nF_6.3V

100nF_6.3V

C918

C918

4.7uF_6.3V

4.7uF_6.3V

+1.8V

2

C949

C949
1uF_6.3V

1uF_6.3V

C1121

C1121
1uF_6.3V

1uF_6.3V

C924

C924
1uF_6.3V

1uF_6.3V

C905

C905
1uF_6.3V

1uF_6.3V

C167

C167
1uF_6.3V

1uF_6.3V

C177

C177
1uF_6.3V

1uF_6.3V

C182

C182
10uF_X6S

10uF_X6S

MC182

MC182

4.7uF_6.3V

4.7uF_6.3V

C947

C947
100nF_6.3V

100nF_6.3V

C919

C919
10uF_X6S

10uF_X6S

B930

B930

BLM15BD121SN1

BLM15BD121SN1

C925

C925
1uF_6.3V

1uF_6.3V

C906

C906
1uF_6.3V

1uF_6.3V

C168

C168
1uF_6.3V

1uF_6.3V

C179

C179
1uF_6.3V

1uF_6.3V

C183

C183
10uF_X6S

10uF_X6S

C1122

C1122
1uF_6.3V

1uF_6.3V

C1110

C1110
1uF_6.3V

1uF_6.3V

+1.8V

C907

C907

4.7uF_6.3V

4.7uF_6.3V

C169

C169
1uF_6.3V

1uF_6.3V

C186

C186
1uF_6.3V

1uF_6.3V

MC183

MC183

4.7uF_6.3V

4.7uF_6.3V

C1127

C1127
1uF_6.3V

1uF_6.3V

C1130

C1130
1uF_6.3V

1uF_6.3V

C178

C178
100nF_6.3V

100nF_6.3V

C926

C926
10uF_X6S

10uF_X6S

C170

C170
1uF_6.3V

1uF_6.3V

C1133

C1133
1uF_6.3V

1uF_6.3V

+PCIE_VDDC

C185

C185
1uF_6.3V

1uF_6.3V

MC187

MC187

4.7uF_6.3V

4.7uF_6.3V

C1128

C1128
1uF_6.3V

1uF_6.3V

C1131

C1131
100nF_6.3V

100nF_6.3V

+PCIE_VDDR

C160

C160
1uF_6.3V

1uF_6.3V

C1132

C1132
1uF_6.3V

1uF_6.3V

B920 220R_2AB920 220R_2A

B900

B900

26R_600mA

26R_600mA

C184

C184
1uF_6.3V

1uF_6.3V

MC181

MC181

4.7uF_6.3V

4.7uF_6.3V

+VDDC

C1129

C1129
1uF_6.3V

1uF_6.3V

C1134

C1134
1uF_6.3V

1uF_6.3V

C943

C943
100nF_6.3V

100nF_6.3V

+VDDCI

See BOM for qualified option

1

+1.8V

+VDDC

MR9100RMR910
0R
MR9110RMR911
0R

B911 220R_2AB911 220R_2A

B910 220R_2AB910 220R_2A

+1.1V

+VDDCI_LDO

+VDDC

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

5

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Power

RH RV670 - ASIC Power

4

www.vinafix.vn

3

2

RH RV670 - ASIC Power

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, March 13, 2008

Thursday, March 13, 2008

Thursday, March 13, 2008

Sheet

Sheet

Sheet

of

423

of

423

of

423

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

4

3

2

1

+MVDD

R291

R291
100R

100R

402
1%

R292

R292
100R

100R

402
1%

DQA_[63..0]<9>

C291

C291
100nF_6.3V

100nF_6.3V

C293

C293
100nF_6.3V

100nF_6.3V

C292

C292
10nF

10nF

C294

C294
10nF

10nF

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

MVREFD_A
MVREFS_A

U1C

U1C

AB47

DQA_0

AB49

DQA_1

AB51

DQA_2

AA46

DQA_3

Y51

DQA_4

V47

DQA_5

W48

DQA_6

W46

DQA_7

V49

DQA_8

V51

DQA_9

U46

DQA_10

U50

DQA_11

P49

DQA_12

P47

DQA_13

R48

DQA_14

R46

DQA_15

AD38

DQA_16

AD39

DQA_17

AD40

DQA_18

AD41

DQA_19

AC39

DQA_20

AA42

DQA_21

Y43

DQA_22

Y42

DQA_23

P51

DQA_24

N50

DQA_25

N46

DQA_26

M47

DQA_27

K51

DQA_28

K49

DQA_29

L48

DQA_30

K47

DQA_31

J43

DQA_32

K45

DQA_33

H46

DQA_34

H49

DQA_35

H51

DQA_36

A46

DQA_37

C49

DQA_38

C46

DQA_39

U42

DQA_40

R41

DQA_41

R42

DQA_42

R43

DQA_43

J40

DQA_44

L42

DQA_45

K42

DQA_46

N41

DQA_47

F44

DQA_48

E42

DQA_49

C42

DQA_50

A44

DQA_51

A40

DQA_52

C40

DQA_53

E40

DQA_54

F39

DQA_55

B39

DQA_56

C38

DQA_57

A38

DQA_58

E38

DQA_59

C36

DQA_60

B35

DQA_61

F35

DQA_62

A36

DQA_63

AC46

MVREFDA

AC43

MVREFSA

AD37

NC_8

AC36

NC_9

U36

NC_31

V40

NC_32

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 3 of 10

Part 3 of 10

MEMORY INTERFACE

A

MEMORY INTERFACE

A

DDR1 DDR2 DDR3

DDR1 DDR2 DDR3

read strobe

bidir. strobe

read strobe

bidir. strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

DQMAB_0
DQMAB_1
DQMAB_2
DQMAB_3
DQMAB_4
DQMAB_5
DQMAB_6
DQMAB_7

QSA_0

QSA_1

QSA_2

QSA_3

QSA_4

QSA_5

QSA_6

QSA_7
QSA_0B

QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B

ODTA0

ODTA1

CLKA0
CLKA0B

CKEA0
RASA0B
CASA0B

WEA0B

CSA0B_0
CSA0B_1

CLKA1
CLKA1B

CKEA1
RASA1B
CASA1B

WEA1B

CSA1B_0
CSA1B_1

U38
U39
R37
Y38
AA37
Y37
Y39
Y40
K39
K38
M38
M37
P38
P39
L40
K40

Y49
T47
AC42
M49
F49
P43
F41
D37

AA50
T51
AC41
L46
C51
N43
A42
E36

Y47
T49
AA43
M51
F46
N42
D41
F37

V37
AA41

V43
U43

R38
P37
R40
Y36
AA38

V36

G38
J39

L37
J37
J35
N37
P40

K37

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9

MAA_10
MAA_11

MAA_12

ODTA0 <9>

CLKA0 <9>
CLKA0b <9>

CLKA1 <9>
CLKA1b <9>

MAA_BA2
MAA_BA0
MAA_BA1

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

MAA_[12..0] <9>

MAA_BA[2..0] <9>

DQMAb_[7..0] <9>

QSA_[7..0] <9>

CKEA0 <9>
RASA0b <9>
CASA0b <9>
WEA0b <9>
CSA0b_0 <9>

CKEA1 <9>
RASA1b <9>
CASA1b <9>
WEA1b <9>
CSA1b_0 <9>

+MVDD

+MVDD

R391

R391
100R

100R

402
1%

R392

R392
100R

100R

402
1%

R393

R393
100R

100R

402
1%

R394

R394
100R

100R

402
1%

C391

C391
100nF_6.3V

100nF_6.3V

C393

C393
100nF_6.3V

100nF_6.3V

C392

C392
10nF

10nF

C394

C394
10nF

10nF

D D

C C

B B

+MVDD

R293

R293
100R

100R

402
1%

R294

R294
100R

100R

402
1%

MVREFD_B
MVREFS_B

DQB_[63..0]<10>

U1D

R296

R296

4.7K

4.7K

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

R297

R297

4.7K

4.7K

BF11
BL12
BJ12

E34
C34
A34
F33
A32
F31
B31
E30
R35
P35
N35
M35
N34
K32
K31

J31
C30
A30
F29
D29
B27
E26
F27
C26
A26
F25
D25
E24
A22
E22
C22
B23
F21
D21
E20
C20
A18
C18
E18
F17
M23
L25

J25
L23
M22
M20

J20
K20
D17
E16
C16
A16
F13
A14
C14
D13
K17
L17
L19

J16

J13
M17
K14
K13

J34
G34

T35
T34

J29
M29

U1D

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFDB
MVREFSB

DRAM_RST
TEST_MCLK
TEST_YCLK
NC_10

NC_11
NC_33
NC_34

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 4 of 10

Part 4 of 10

MEMORY INTERFACE

MEMORY INTERFACE

DDR1 DDR2

DDR1 DDR2

bidir. strobe

bidir. strobe

Not used

Not used

For DDR2

For DDR2

L28

MAB_0

N28

MAB_1

T29

MAB_2

P31

MAB_3

R32

MAB_4

P32

MAB_5

N32

MAB_6

M31

MAB_7

N22

MAB_8

R23

MAB_9

T25

MAB_10

R26

MAB_11

J26

MAB_12

R28

MAB_13

P26

MAB_14

N23

MAB_15

C32

DQMBB_0

L34

DQMBB_1

E28

DQMBB_2
DQMBB_3
DQMBB_4
DQMBB_5
DQMBB_6
DQMBB_7

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

QSB_0B

read strobe

read strobe

QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B

write strobe

write strobe

ODTB0
ODTB1

CLKB0

CLKB0B

CKEB0
RASB0B
CASB0B

WEB0B

CSB0B_0
CSB0B_1

CLKB1
CLKB1B

CKEB1
RASB1B
CASB1B

WEB1B

CSB1B_0
CSB1B_1

C24
A20
J23
E14
J17

D33
K34
A28
F23
B19
K23
F15
K16

E32
J32
C28
A24
F19
K22
B15
J14

N20
K25

K28
J28

K26
T28
P28
R31
T31

L32
J19

K19

R25
N17
P20
N26
M25

P17

B

B

DDR3

DDR3

bidir. differential strobe

bidir. differential strobe

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_BA2
MAB_BA0
MAB_BA1

DQMBb_0
DQMBb_1

DQMBb_2

DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

ODTB0 <10>

CLKB0 <10>
CLKB0b <10>

CLKB1 <10>
CLKB1b <10>

MAB_[12..0] <10>

MAB_BA[2..0] <10>

DQMBb_[7..0] <10>

QSB_[7..0] <10>

CKEB0 <10>
RASB0b <10>
CASB0b <10>
WEB0b <10>
CSB0b_0 <10>

CKEB1 <10>
RASB1b <10>
CASB1b <10>
WEB1b <10>
CSB1b_0 <10>

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Memory Interface (Channel A & B)

RH RV670 - ASIC Memory Interface (Channel A & B)

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Memory Interface (Channel A & B)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, March 28, 2008

Friday, March 28, 2008

Friday, March 28, 2008

Sheet

Sheet

Sheet

of

523

of

523

of

523

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

4

3

2

1

+MVDD

R491

R491
100R

100R

402
1%

R492

R492
100R

100R

402
1%

DQC_[63..0]<11>

C491

C491
100nF_6.3V

100nF_6.3V

C493

C493
100nF_6.3V

100nF_6.3V

C492

C492
10nF

10nF

C494

C494
10nF

10nF

DQC_0
DQC_1
DQC_2
DQC_3
DQC_4
DQC_5
DQC_6
DQC_7
DQC_8
DQC_9
DQC_10
DQC_11
DQC_12
DQC_13
DQC_14
DQC_15
DQC_16
DQC_17
DQC_18
DQC_19
DQC_20
DQC_21
DQC_22
DQC_23
DQC_24
DQC_25
DQC_26
DQC_27
DQC_28
DQC_29
DQC_30
DQC_31
DQC_32
DQC_33
DQC_34
DQC_35
DQC_36
DQC_37
DQC_38
DQC_39
DQC_40
DQC_41
DQC_42
DQC_43
DQC_44
DQC_45
DQC_46
DQC_47
DQC_48
DQC_49
DQC_50
DQC_51
DQC_52
DQC_53
DQC_54
DQC_55
DQC_56
DQC_57
DQC_58
DQC_59
DQC_60
DQC_61
DQC_62
DQC_63

MVREFD_C
MVREFS_C

U1E

U1E

E12

DQC_0

C12

DQC_1

A12

DQC_2

F11

DQC_3

A10

DQC_4

G10

DQC_5

A8

DQC_6

F8

DQC_7

C8

DQC_8

C6

DQC_9

A3

DQC_10

F6

DQC_11

F1

DQC_12

H1

DQC_13

H6

DQC_14

K5

DQC_15

K12

DQC_16

J11

DQC_17

L9

DQC_18

L12

DQC_19

P11

DQC_20

P9

DQC_21

P10

DQC_22

R11

DQC_23

K3

DQC_24

K1

DQC_25

L6

DQC_26

L2

DQC_27

N6

DQC_28

N4

DQC_29

P5

DQC_30

P3

DQC_31

P1

DQC_32

R6

DQC_33

T5

DQC_34

R2

DQC_35

V1

DQC_36

V3

DQC_37

U4

DQC_38

V5

DQC_39

AA9

DQC_40

AA10

DQC_41

AB9

DQC_42

AA11

DQC_43

AF9

DQC_44

AE11

DQC_45

AE10

DQC_46

AE9

DQC_47

W6

DQC_48

W2

DQC_49

Y5

DQC_50

Y3

DQC_51

AB5

DQC_52

AB3

DQC_53

AB1

DQC_54

AC6

DQC_55

AC2

DQC_56

AD5

DQC_57

AD3

DQC_58

AD1

DQC_59

AF3

DQC_60

AF1

DQC_61

AG6

DQC_62

AG2

DQC_63

G12

MVREFDC

J12

MVREFSC

R19

MEMTEST

P19

NC_12

R16

NC_35

R298

R298

AB16

NC_36

243R

243R

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 5 of 10

Part 5 of 10

MEMORY INTERFACE

C

MEMORY INTERFACE

C

DDR3

DDR1 DDR2

DDR3

DDR1 DDR2

bidir. strobe

read strobe

bidir. strobe

read strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAC_0
MAC_1
MAC_2
MAC_3
MAC_4
MAC_5
MAC_6
MAC_7
MAC_8

MAC_9
MAC_10
MAC_11
MAC_12
MAC_13
MAC_14
MAC_15

DQMCB_0
DQMCB_1
DQMCB_2
DQMCB_3
DQMCB_4
DQMCB_5
DQMCB_6
DQMCB_7

QSC_0

QSC_1

QSC_2

QSC_3

QSC_4

QSC_5

QSC_6

QSC_7

QSC_0B
QSC_1B
QSC_2B
QSC_3B
QSC_4B
QSC_5B
QSC_6B
QSC_7B

ODTC0

ODTC1

CLKC0
CLKC0B

CKEC0
RASC0B
CASC0B

WEC0B

CSC0B_0
CSC0B_1

CLKC1
CLKC1B

CKEC1
RASC1B
CASC1B

WEC1B

CSC1B_0
CSC1B_1

R14
T13
R13
M13
L16
R17
M11
M14
AB13
AB14
AB12
AA12
V9
W13
W16
AA15

C10
C3
K9
M5
T3
AD11
AA4
AE6

B11
F3
M9
M1
U6
AD10
Y1
AF5

E10
J10
M10
M3
T1
AD9
AA6
AE4

AA16
V16

R9
R10

T10
V12
T9
L14
P16

V14

W9
W10

AD14
AE14
AD12
V11
V10

V15

MAC_0
MAC_1
MAC_2
MAC_3

MAC_4
MAC_5
MAC_6
MAC_7
MAC_8
MAC_9
MAC_10
MAC_11

MAC_BA2
MAC_BA0
MAC_BA1

DQMCb_0
DQMCb_1
DQMCb_2
DQMCb_3
DQMCb_4
DQMCb_5
DQMCb_6
DQMCb_7

QSC_0
QSC_1
QSC_2
QSC_3
QSC_4
QSC_5
QSC_6
QSC_7

ODTC0 <11>

CLKC0 <11>
CLKC0b <11>

CKEC0 <11>
RASC0b <11>
CASC0b <11>
WEC0b <11>
CSC0b_0 <11>

CLKC1 <11>
CLKC1b <11>

CKEC1 <11>
RASC1b <11>
CASC1b <11>
WEC1b <11>
CSC1b_0 <11>

MAC_[12..0] <11>

MAC_BA[2..0] <11>

DQMCb_[7..0] <11>

QSC_[7..0] <11>

+MVDD

R591

R591
100R

100R

402
1%

R592

R592
100R

100R

402
1%

+MVDD

R593

R593
100R

100R

402
1%

R594

R594
100R

100R

402
1%

C591

C591
100nF_6.3V

100nF_6.3V

C593

C593
100nF_6.3V

100nF_6.3V

C592

C592
10nF

10nF

C594

C594
10nF

10nF

D D

C C

B B

+MVDD

R493

R493
100R

100R

402
1%

R494

R494
100R

100R

402
1%

MVREFD_D
MVREFS_D

DQD_[63..0]<12>

U1F

DQD_0
DQD_1
DQD_2
DQD_3
DQD_4
DQD_5
DQD_6
DQD_7
DQD_8
DQD_9
DQD_10
DQD_11
DQD_12
DQD_13
DQD_14
DQD_15
DQD_16
DQD_17
DQD_18
DQD_19
DQD_20
DQD_21
DQD_22
DQD_23
DQD_24
DQD_25
DQD_26
DQD_27
DQD_28
DQD_29
DQD_30
DQD_31
DQD_32
DQD_33
DQD_34
DQD_35
DQD_36
DQD_37
DQD_38
DQD_39
DQD_40
DQD_41
DQD_42
DQD_43
DQD_44
DQD_45
DQD_46
DQD_47
DQD_48
DQD_49
DQD_50
DQD_51
DQD_52
DQD_53
DQD_54
DQD_55
DQD_56
DQD_57
DQD_58
DQD_59
DQD_60
DQD_61
DQD_62
DQD_63

U1F

AH5

DQD_0

AH3

DQD_1

AH1

DQD_2

AJ6

DQD_3

AK1

DQD_4

AL6

DQD_5

AL2

DQD_6

AM5

DQD_7

AM3

DQD_8

AM1

DQD_9

AN6

DQD_10

AN4

DQD_11

AR6

DQD_12

AR2

DQD_13

AT5

DQD_14

AT3

DQD_15

AF11

DQD_16

AF12

DQD_17

AF13

DQD_18

AH12

DQD_19

AM10

DQD_20

AM9

DQD_21

AL11

DQD_22

AL10

DQD_23

AT1

DQD_24

AU6

DQD_25

AY1

DQD_26

AY3

DQD_27

AW2

DQD_28

AY5

DQD_29

AV5

DQD_30

AU4

DQD_31

BA6

DQD_32

BB5

DQD_33

BA4

DQD_34

BB3

DQD_35

BD1

DQD_36

BD3

DQD_37

BF3

DQD_38

BJ1

DQD_39

AU9

DQD_40

AT11

DQD_41

AV9

DQD_42

AV10

DQD_43

BB10

DQD_44

BA9

DQD_45

AW12

DQD_46

BB9

DQD_47

BC9

DQD_48

BF6

DQD_49

BJ3

DQD_50

BJ6

DQD_51

BG10

DQD_52

BL10

DQD_53

BJ10

DQD_54

BH11

DQD_55

BB14

DQD_56

BB15

DQD_57

BC15

DQD_58

BC10

DQD_59

BC11

DQD_60

AY13

DQD_61

BC13

DQD_62

BE12

DQD_63

AJ9

MVREFDD

AH9

MVREFSD

AE16

NC_13

AF16

NC_14

AP15

NC_37

AT14

NC_38

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 6 of 10

Part 6 of 10

MEMORY INTERFACE

D

MEMORY INTERFACE

D

DDR3

DDR1 DDR2

DDR3

DDR1 DDR2

bidir. strobe

read strobe

bidir. strobe

read strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7
MAD_8

MAD_9
MAD_10
MAD_11
MAD_12
MAD_13
MAD_14
MAD_15

DQMDB_0
DQMDB_1
DQMDB_2
DQMDB_3
DQMDB_4
DQMDB_5
DQMDB_6
DQMDB_7

QSD_0

QSD_1

QSD_2

QSD_3

QSD_4

QSD_5

QSD_6

QSD_7

QSD_0B
QSD_1B
QSD_2B
QSD_3B
QSD_4B
QSD_5B
QSD_6B
QSD_7B

ODTD0

ODTD1

CLKD0

CLKD0B

CKED0

RASD0B
CASD0B

WED0B

CSD0B_0
CSD0B_1

CLKD1

CLKD1B

CKED1

RASD1B
CASD1B

WED1B

CSD1B_0
CSD1B_1

AJ16
AM14
AM13
AL14
AE15
AH15
AJ13
AJ15
AU15
AW15
AV17
AV14
AT13
AR16
AU14
AT17

AK3
AP5
AJ10
AV3
BB1
AY10
BL8
BB11

AJ4
AP1
AJ12
AW6
BD6
AY11
BL6
BB13

AK5
AP3
AJ11
AV1
BB7
AV11
BF8
BA13

AU17
AV12

AP10
AP9

AP13
AT12
AM15
AH14
AF14

AW17

AT10
AT9

BA14
AY15
BA15
AU12
AM16

AL15

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7
MAD_8
MAD_9
MAD_10
MAD_11
MAD_12
MAD_BA2MAC_12
MAD_BA0
MAD_BA1

DQMDb_0
DQMDb_1
DQMDb_2
DQMDb_3
DQMDb_4
DQMDb_5
DQMDb_6
DQMDb_7

QSD_0
QSD_1
QSD_2
QSD_3
QSD_4
QSD_5
QSD_6
QSD_7

ODTD0 <12>

CLKD0 <12>
CLKD0b <12>

CKED0 <12>
RASD0b <12>
CASD0b <12>
WED0b <12>
CSD0b_0 <12>

CLKD1 <12>
CLKD1b <12>

CKED1 <12>
RASD1b <12>
CASD1b <12>
WED1b <12>
CSD1b_0 <12>

MAD_[12..0] <12>

MAD_BA[2..0] <12>

DQMDb_[7..0] <12>

QSD_[7..0] <12>

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Memory Interface (Channel C & D)

RH RV670 - ASIC Memory Interface (Channel C & D)

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Memory Interface (Channel C & D)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, March 28, 2008

Friday, March 28, 2008

Friday, March 28, 2008

Sheet

Sheet

Sheet

of

623

of

623

of

623

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

U1J

U1J

Part 10 OF 10

Part 10 OF 10

GPIO_0

VID_0

BA33

VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
VID_7

D D

CrossFire

DVP_MVP_CNTL_0 : DE for bits D[12..23]
DVP_MVP_CNTL_1 : CLK for bits D[12..23]

C C

TP90

TP90

TP84

TP84
TP85

TP85
TP86

TP86
TP87

TP87
TP88

TP88
TP89

TP89

TP60

TP60
TP61

TP61
TP62

TP62
TP63

TP63
TP64

TP64
TP65

TP65
TP66

TP66
TP67

TP67
TP68

TP68
TP69

TP69
TP70

TP70
TP71

TP71
TP72

TP72
TP73

TP73
TP74

TP74
TP75

TP75
TP76

TP76
TP77

TP77
TP78

TP78
TP79

TP79
TP80

TP80
TP81

TP81
TP82

TP82
TP83

TP83

35mil

35mil

35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil

DVP_MVP_CNTL_0

35mil

35mil

DVP_MVP_CNTL_1

35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil

DVOCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

VID_0

AY33

VID_1

AW33

VID_2

AV33

VID_3

BA32

VID_4

AY32

VID_5

AW32

VID_6

BA30

VID_7

BB30

VPCLK0

AV30

VHAD_0

AW30

VHAD_1

BC29

VPHCTL

BC30

VIPCLK

BF15

DVPCLK

BJ20

DVPCNTL_0

BG20

DVPCNTL_1

BK15

DVPCNTL_2

BB20

DVPCNTL_MVP_0

BC20

DVPCNTL_MVP_1

DVO Port

DVO Port

BH15

DVPDATA_0

BG16

DVPDATA_1

BJ16

DVPDATA_2

BL16

DVPDATA_3

BH17

DVPDATA_4

BF17

DVPDATA_5

BL18

DVPDATA_6

BJ18

DVPDATA_7

BG18

DVPDATA_8

BK19

DVPDATA_9

BH19

DVPDATA_10

BF19

DVPDATA_11

AY21

DVPDATA_12

BA21

DVPDATA_13

BC21

DVPDATA_14

BB18

DVPDATA_15

BC18

DVPDATA_16

BC17

DVPDATA_17

BK21

DVPDATA_18

BH21

DVPDATA_19

BF21

DVPDATA_20

BL22

DVPDATA_21

AY20

DVPDATA_22

BA20

DVPDATA_23

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

VIP

VIP
Capture

Capture

VIP

VIP
Host

Host

RESERVED

RESERVED

No Connect

No Connect

GPIO_1
GPIO_2
GPIO_3

General

General

GPIO_4

Purpose

Purpose

GPIO_5

I/O

I/O

GPIO_6

GPIO_7_BLON

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16_SSIN

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

GPIO_23_CLKREQB

GPIO_24_TRST

GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO

GENERICA
GENERICB
GENERICC

DVALID

VARY_BL

PSYNC

DIGON

NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30

AV18
AU18
AV20
AW18
BB17
BA18
AY24
AU20
AW21
AV21
AU21
BA23
AY23
AW23
AV23
AU23
BB24
AY18
BA17
BH13
BF13
BC24
AW24
AV24
AU24
AY26
AW26
AV26
AW27

BC26
BB23
BB26

BC23
AY29

AW29
AU29

AM20
AN20
AT23
BA26
AU35
AU33
AT33
BA29
AY27
AT24
AU27
AU30
BG24

4

GPIO_0
GPIO_1GPIO_1
GPIO_2GPIO_2

GPIO_7GPIO_7
GPIO_8GPIO_8
GPIO_9GPIO_9
GPIO_10GPIO_10
GPIO_11GPIO_11
GPIO_12GPIO_12
GPIO_13GPIO_13
HPD2HPD2

GPIO_17_INT

GPIO_22_ROMCSb
PCIE_CLK_REQb
JTAG_MODE

GENERICA
GENERICB
GENERICC

DVALIDDVALID
PSYNCPSYNC

GPIO_3
GPIO_4
GPIO_5
GPIO_6

CrossFire

FLOW_CONTROL_1 - Lower Cable
FLOW_CONTROL_2 - Upper Cable
SWAP_LOCK_1 - Lower Cable
SWAP_LOCK_2 - Upper Cable

RP60A33R RP60A33R

81

RP60B33R RP60B33R

72

RP60C33R RP60C33R

63

RP60D33R RP60D33R

54

HPD2 <17>

R51KR5
1K

GPIO_8_R
GPIO_9_R
GPIO_10_R
ROMCSb_R

3

Place SW1 & SW2 on the bottom side
(easily accessible).
Clearly Mark A & B contacts on the
silkscreen.

R640RR64

0R

ThermINT <20>

GENERICA <19>

+3.3V

TR50

TR50
10K

10K

35mil

35mil

TP50

TP50

DNI

DNI

DNI

DNI

MR50 10KMR50 10K

MR51 10KMR51 10K

MR52 10KMR52 10K
MR53 10KMR53 10K

MR54 10KMR54 10K

MR55 10KMR55 10K

MR56 10KMR56 10K

MR57 10KMR57 10K

MR58 10KMR58 10K
MR59 10KMR59 10K
MR63 10KMR63 10K
MR62 10KMR62 10K
MR61 10KMR61 10K

MR65 10KMR65 10K

MR66 10KMR66 10K

MR67 10KMR67 10K

MR68 10KMR68 10K

MR70 10KMR70 10K

MR71 10KMR71 10K

MR72 10KMR72 10K

MR73 10KMR73 10K

MR74 10KMR74 10K

MR75 10KMR75 10K

MR76 10KMR76 10K

MR77 10KMR77 10K

MR78 10KMR78 10K
MR79 10KMR79 10K

MR60 10KMR60 10K

+3.3V

DNI

DNI

TBD

DNI

NTSC

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

2

R50 10KR50 10K

R51 10KR51 10K

R52 10KR52 10K
R53 10KR53 10K

R54 1KR54 1K

R55 10KR55 10K

R56 10KR56 10K

R57 10KR57 10K

R58 10KR58 10K
R59 10KR59 10K
R63 10KR63 10K
R62 10KR62 10K
R61 10KR61 10K

R65 10KR65 10K

R66 10KR66 10K

R67 10KR67 10K

R68 10KR68 10K

R70 10KR70 10K

R71 10KR71 10K

R72 10KR72 10K

R73 10KR73 10K

R74 10KR74 10K

R75 10KR75 10K

R76 10KR76 10K

R77 10KR77 10K

R78 10KR78 10K
R79 10KR79 10K

R60 10KR60 10K

PIN BASED STRAPS

GPIO_0

GPIO_1

GPIO_2

GPIO_2
GPIO_3

GPIO_3

GPIO_4

GPIO_5

GPIO_5

GPIO_6

GPIO_6

GPIO_7GPIO_7

GPIO_8_R
GPIO_9_R

GPIO_13

GPIO_13
GPIO_12

GPIO_12
GPIO_11GPIO_11

GPIO_11GPIO_11

CONFIG[3]
CONFIG[2]
CONFIG[1]
CONFIG[0]

GENERICC

VSYNC1

VSYNC1

HSYNC1

PSYNC

PSYNC

VID_0

VID_0

VID_1

VID_1

VID_2

VID_2

VID_3

VID_3

VID_4

VID_4

VID_5

VID_5

VID_6

VID_6

VID_7

VID_7

VSYNC2

VSYNC2
HSYNC2

HSYNC2

DVALID

DVALID

VSYNC1 <3,17>

HSYNC1 <3,17>

VSYNC2 <3,18>
HSYNC2 <3,18>

1

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)

0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

AMD Internal Use Only - Reserved (Default: 00)

DEBUG_ACCESS
AMD Internal Use Only - Reserved (Default: 0)

AMD Board Feature III - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

GPIO(9,13, 12,11) - CONFIG[3..0]

0010 - 512Kbit AT25F512A (Atmel)
0011 - 1Mbit AT25F1024A (Atmel)
0100 - 512Kbit M25P05A (ST)
0101 - 1Mbit M25P10A (ST)
0101 - 2Mbit M25P20 (ST)
0100 - 512Kbit Pm25LV512 (Chingis)
0101 - 1Mbit Pm25LV010 (Chingis)

AMD Internal Use Only - Reserved (Default: 0)

VIP_DEVICE_STRAP_EN

0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for
configurations without video-in)

AMD Board Feature II - HDMI_EN Default 0

VGA DISABLE : 1 for disable (set to 0 for normal operation)

AMD Internal Use Only - Reserved (Default: 0)

MSI_DIS (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

BIF_AUDIO_EN
0 - Disable HD Audio 1- Enable HD Audio

AMD Internal Use Only - Reserved (Default: 0)

64BAR_EN_A (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved for memory strap

AMD Internal Use Only - Reserved

BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability

Default: 0

AMD PCIE FEATURE I

AMD PCIE FEATURE II

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

Pull-Down Resistors are for BU until built-in pull-downs are verified.

B B

CrossFire Card-Edge

Lower Cable Card Edge

1

DVOCLK
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7
DVPDATA_9
DVPDATA_11
DVPCNTL_1

A A

GPIO_3

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

2
4
6
8

DVPDATA_0

10
12

DVPDATA_2

14
16

DVPDATA_4

18
20

DVPDATA_6

22
24

DVPDATA_8

26
28

DVPDATA_10

32

DVPCNTL_0

34
36

GPIO_5

38
40

J8002J8002

Bundle B

5

Upper Cable Card Edge

1

DVP_MVP_CNTL_1
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GPIO_4

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

2
4
6
8

DVPDATA_12

10
12

DVPDATA_14

14
16

DVPDATA_16

18
20

DVPDATA_18

22
24

DVPDATA_20

26
28

DVPDATA_22

32

DVALID_R

34
36

GPIO_6

38
40

J8001J8001

Bundle A (closer to the bracket)

4

DNI

R8001 0RR8001 0R
R8002 0RR8002 0R

GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL

DVALID

DNI

GENERICB

www.vinafix.vn

3

ROMCSb_R
GPIO_8_R

R46

R46
10K

10K

U2

U2

1

CE#

VCC

2

SO

HOLD#

3

WP#

SCK

GND4SI

PM25LV512A-100SCE

PM25LV512A-100SCE

+3.3V

8
7

GPIO_10_R

6

GPIO_9_R

5

C47

C47
100nF_6.3V

100nF_6.3V

BIOS1

BIOS1

BIOS

BIOS

113-B339XX-XXX

113-B339XX-XXX

VIDEO BIOS
FIRMWARE

PN 2280007900G for 1Mbit (PM25LV010A-100SCE)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC DVO, VIP & GPIOs

RH RV670 - ASIC DVO, VIP & GPIOs

2

RH RV670 - ASIC DVO, VIP & GPIOs

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

723

of

723

of

723

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

D D

C C

B B

4

U1H

U1H

AC48

PCIE_VSS1

AC50

PCIE_VSS2

AD45

PCIE_VSS3

AD47

PCIE_VSS4

AE50

PCIE_VSS5

AU38

PCIE_VSS6

AF39

PCIE_VSS7

AF40

PCIE_VSS8

AF41

PCIE_VSS9

AF42

PCIE_VSS10

AF43

PCIE_VSS11

AF45

PCIE_VSS12

AF47

PCIE_VSS13

AG38

PCIE_VSS14

AG41

PCIE_VSS15

AG50

PCIE_VSS16

AH38

PCIE_VSS17

AH41

PCIE_VSS18

AH45

PCIE_VSS19

AH47

PCIE_VSS20

AJ50

PCIE_VSS21

AK38

PCIE_VSS22

AK41

PCIE_VSS23

AK45

PCIE_VSS24

AK47

PCIE_VSS25

AL38

PCIE_VSS26

AL41

PCIE_VSS27

AL50

PCIE_VSS28

AM45

PCIE_VSS29

AM47

PCIE_VSS30

AN38

PCIE_VSS31

AN41

PCIE_VSS32

AN50

PCIE_VSS33

AP38

PCIE_VSS34

AP41

PCIE_VSS35

AP45

PCIE_VSS36

AP47

PCIE_VSS37

AR50

PCIE_VSS38

AT38

PCIE_VSS39

AT41

PCIE_VSS40

AT45

PCIE_VSS41

AT47

PCIE_VSS42

AU41

PCIE_VSS43

AU50

PCIE_VSS44

AV45

PCIE_VSS45

AY49

PCIE_VSS46

AW50

PCIE_VSS47

AV47

PCIE_VSS48

A6

VSS95

A49

VSS96

B13

VSS97

B17

VSS98

B21

VSS99

B25

VSS100

B29

VSS101

B33

VSS102

B37

VSS103

B41

VSS104

C1

VSS105

C44

VSS106

D11

VSS107

D15

VSS108

D19

VSS109

D23

VSS110

D27

VSS111

D31

VSS112

D35

VSS113

D39

VSS114

F51

VSS115

G16

VSS116

G20

VSS117

G24

VSS118

G28

VSS119

G32

VSS120

G36

VSS121

G42

VSS122

H3

VSS123

H8

VSS124

H44

VSS125

J22

VSS126

J38

VSS127

J42

VSS128

K7

VSS129

K11

VSS130

K29

VSS131

L4

VSS132

L13

VSS133

L20

VSS134

L22

VSS135

L26

VSS136

L35

VSS137

L39

VSS138

L43

VSS139

L50

VSS140

M7

VSS141

M16

VSS142

M19

VSS143

M28

VSS144

M34

VSS145

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 8 of 10

Part 8 of 10

PCI-Express GND

PCI-Express GND

Memory GND

Memory GND

VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246

M45
N2
N14
N25
N29
N31
N38
N40
N48
P12
P23
P34
P42
R4
R12
P22
R29
R39
R50
T7
T11
T14
T17
T20
R20
T26
T32
T45
U2
U37
U41
U48
V13
V39
W4
W14
W50
Y7
Y41
Y45
AA2
AA13
AA36
AA39
AA48
AB11
AB15
AC4
AC38
AC40
AD7
AD13
AD16
AD36
AD42
AE2
AE12
AL16
AF10
AG4
AH7
AH10
AH13
AH16
AJ2
AJ14
AL4
AL9
AL12
AM7
AP16
AN2
AP11
AP14
AR4
AT7
AU2
AU10
AU13
AV15
AW4
AV13
AY7
AY9
AY17
BA2
AY14
BG12
BD8
BF1
BE10
BE14
BE16
BE20
BA11
BJ8
BK11
BK13
BK17
BL3
BL20

3

U1I

U1I

AN19

W25
W27
W30
W32

Y21
Y24
Y26
Y28
Y31

Y33
AA20
AA22
AA25
AA27
AA30
AA32
AB19
AB21
AB24
AB26
AB28
AB31
AB33
AD20
AD22
AD25
AD27
AD30
AD32
AE19
AE21
AE24
AE26
AE28
AE31
AE33

AF20
AF22
AF25
AF27
AF30

AF32
AG19
AG21
AG24

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45

2

Part 9 OF 10

Part 9 OF 10

Core GND

Core GND

IO GND

IO GND

VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

AG26
AG28
AG31
AG33
AH20
AH22
AH25
AH27
AH30
AH32
AK19
AK21
AK24
AK26
AK28
AK31
AK33
AL20
AL22
AL25
AL27
AL30
AL32
AM21
AM24
AM26
AM28
AM31
AM33
AN22
AN25
AN27
AN30
AN32
W22

AT18
AT35
AU26
AV32
AW20
AY30
AY35
BA24
BA27
BB21
BB33
BE18
BE24
BJ51

1

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Grounds

RH RV670 - ASIC Grounds

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Grounds

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, March 13, 2008

Thursday, March 13, 2008

Thursday, March 13, 2008

Sheet

Sheet

Sheet

of

823

of

823

of

823

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

4

3

2

1

CHANNEL A: 128MB/256MB DDR2

DQA_[63..0]<5>

D D

MAA_BA[2..0]<5>

MAA_[12..0]<5>

C C

+MVDD +MVDD +MVDD

R201

R201

4.99K

4.99K

VREF_U201

R202

R202

C202

C202

4.99K

4.99K

100nF_6.3V

100nF_6.3V

MAA_BA0
MAA_BA1
MAA_BA2 MAA_BA2

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CLKA0b<5>
CLKA0<5>

CKEA0<5>

CSA0b_0<5>

WEA0b<5>
RASA0b<5>
CASA0b<5>

DQMAb_3
DQMAb_2

ODTA0<5>

QSA_3

VREF_A0

QSA_2

VREF_A0

U201

U201

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA_21

B9

DQA_17

B1

DQA_23

D9

DQA_16

D1

DQA_18

D3

DQA_20

D7

DQA_19

C2

DQ9

DQA_22

C8

DQ8

DQA_30

F9

DQ7

DQA_27

F1

DQ6

DQA_29

H9

DQ5

DQA_26

H1

DQ4

DQA_24

H3

DQ3

DQA_28

H7

DQ2

DQA_25

G2

DQ1

DQA_31

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B201

B201
220R_200mA

220R_200mA

C200

C200
100nF_6.3V

100nF_6.3V

R203

R203

4.99K

4.99K

R204

R204

4.99K

4.99K

+MVDD

+MVDD

C201

C201
1uF_6.3V

1uF_6.3V

VREF_U202

C205

C205
100nF_6.3V

100nF_6.3V

MAA_BA0
MAA_BA1
MAA_BA2

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CLKA0b<5>
CLKA0<5>

CKEA0<5>

CSA0b_0<5>

WEA0b<5>
RASA0b<5>
CASA0b<5>

DQMAb_1
DQMAb_0

ODTA0<5>

QSA_1 QSA_5

VREF_A0

QSA_0

VREF_A0

U202

U202

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

U204

U203

DQA_3

B9

DQA_4

B1

DQA_1

D9

DQA_6

D1

DQA_5

D3

DQA_0

D7

DQA_7

C2

DQ9

DQA_2

C8

DQ8

DQA_11

F9

DQ7

DQA_15

F1

DQ6

DQA_9

H9

DQ5

DQA_12

H1

DQ4

DQA_14

H3

DQ3

DQA_8

H7

DQ2

DQA_13

G2

DQ1

DQA_10

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C203

C203
100nF_6.3V

100nF_6.3V

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B202

B202
220R_200mA

220R_200mA

R205

R205

4.99K

4.99K

R206

R206

4.99K

4.99K

C204

C204
1uF_6.3V

1uF_6.3V

VREF_U203

+MVDD

+MVDD

C208

C208
100nF_6.3V

100nF_6.3V

MAA_BA0
MAA_BA1
MAA_BA2

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CLKA1b<5>
CLKA1<5>

CKEA1<5>

CSA1b_0<5>

WEA1b<5>
RASA1b<5>
CASA1b<5>

DQMAb_4 DQMAb_7

ODTA0<5>

VREF_A1

QSA_4

VREF_A1

U203

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA_34

B9

DQA_38

B1

DQA_33

D9

DQA_37

D1

DQA_39

D3

DQA_36

D7

DQA_32

C2

DQ9

DQA_35

C8

DQ8

DQA_42

F9

DQ7

DQA_45

F1

DQ6

DQA_41

H9

DQ5

DQA_47

H1

DQ4

DQA_46

H3

DQ3

DQA_40

H7

DQ2

DQA_44

G2

DQ1

DQA_43

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C206

C206
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B203

B203
220R_200mA

220R_200mA

R207

R207

4.99K

4.99K

R208

R208

4.99K

4.99K

C207

C207
1uF_6.3V

1uF_6.3V

VREF_U204

+MVDD

+MVDD

C211

C211
100nF_6.3V

100nF_6.3V

MAA_BA0
MAA_BA1

MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5
MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

CSA1b_0<5>

DQMAb_6DQMAb_5

QSA_6

VREF_A1

QSA_7

VREF_A1

CLKA1b<5>
CLKA1<5>

CKEA1<5>

WEA1b<5>
RASA1b<5>
CASA1b<5>

ODTA0<5>

U204

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQA_61

B9

DQA_57

B1

DQA_60

D9

DQA_59

D1

DQA_56

D3

DQA_63

D7

DQA_58

C2

DQ9

DQA_62

C8

DQ8

DQA_54

F9

DQ7

DQA_50

F1

DQ6

DQA_52

H9

DQ5

DQA_49

H1

DQ4

DQA_48

H3

DQ3

DQA_55

H7

DQ2

DQA_51

G2

DQ1

DQA_53

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9

B204

B204

M9

220R_200mA

220R_200mA

R1
J1

J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C209

C209
100nF_6.3V

100nF_6.3V

C210

C210
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

5

C242

C242
1uF_6.3V

1uF_6.3V

C234

C234
1uF_6.3V

1uF_6.3V

QSA_[7..0]<5>DQMAb_[7..0]<5>

C243

C243
1uF_6.3V

1uF_6.3V

C235

C235
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD+MVDD

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

C236

C236
1uF_6.3V

1uF_6.3V

C220

C220
1uF_6.3V

1uF_6.3V

C223

C223
1uF_6.3V

1uF_6.3V

C237

C237
1uF_6.3V

1uF_6.3V

C221

C221
1uF_6.3V

1uF_6.3V

C224

C224
1uF_6.3V

1uF_6.3V

C238

C238
1uF_6.3V

1uF_6.3V

C222

C222
1uF_6.3V

1uF_6.3V

C225

C225
1uF_6.3V

1uF_6.3V

C226

C226
1uF_6.3V

1uF_6.3V

C227

C227
1uF_6.3V

1uF_6.3V

+MVDD

C214

C214

C213

C213

C212

C212
1uF_6.3V

1uF_6.3V

+MVDD

C215

C215
1uF_6.3V

1uF_6.3V

4

1uF_6.3V

1uF_6.3V

C216

C216
1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C217

C217

C218

C218

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

www.vinafix.vn

C219

C219
1uF_6.3V

1uF_6.3V

CLKA0<5>

CLKA0b<5>

CLKA1<5>

CLKA1b<5>

R221

R221
56R

56R

C244 10nFC244 10nF

R222

R222
56R

56R

R223

R223
56R

56R

C245 10nFC245 10nF

R224

R224
56R

56R

3

VREF_A0

+MVDD

R209

R209

4.99K

4.99K

R210

R210

4.99K

4.99K

VREF_A1

+MVDD

2

R219

R219

4.99K

4.99K

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

R220

R220

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

4.99K

4.99K

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - MEM GDDR3 CH A&B 128-bit 256MB

RH RV670 - MEM GDDR3 CH A&B 128-bit 256MB

RH RV670 - MEM GDDR3 CH A&B 128-bit 256MB

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

923

of

923

of

923

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

DQMAb_0

C240

C240
1uF_6.3V

1uF_6.3V

C229

C229
1uF_6.3V

1uF_6.3V

C232

C232
1uF_6.3V

1uF_6.3V

DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

C241

C241
1uF_6.3V

1uF_6.3V

C230

C230
1uF_6.3V

1uF_6.3V

C233

C233
1uF_6.3V

1uF_6.3V

B B

+MVDD

C239

C239
1uF_6.3V

1uF_6.3V

C228

C228

A A

1uF_6.3V

1uF_6.3V

+MVDD +MVDD

C231

C231
1uF_6.3V

1uF_6.3V

5

4

3

2

1

CHANNEL B: 128MB/256MB DDR2

DQB_[63..0]<5>

MAB_BA[2..0]<5>

+MVDD

MAB_[12..0]<5>

R301

R301

4.99K

4.99K

VREF_U301

R302

R302

4.99K

4.99K

C302

C302
100nF_6.3V

100nF_6.3V

D D

C C

MAB_BA0
MAB_BA1

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB0b<5>
CLKB0<5>

CKEB0<5>

CSB0b_0<5>

WEB0b<5>
RASB0b<5>
CASB0b<5>

DQMBb_3
DQMBb_1

ODTB0<5>

QSB_3

VREF_B0

QSB_1

VREF_B0

U301

U301

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQB_13

B9

DQB_9

B1

DQB_15

D9

DQB_8

D1

DQB_11

D3

DQB_12

D7

DQB_10

C2

DQ9

DQB_14

C8

DQ8

DQB_31

F9

DQ7

DQB_27

F1

DQ6

DQB_30

H9

DQ5

DQB_25

H1

DQ4

DQB_24

H3

DQ3

DQB_28

H7

DQ2

DQB_26

G2

DQ1

DQB_29

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9

B301

B301

M9

220R_200mA

220R_200mA

R1
J1

J7

C300

C300
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

R303

R303

4.99K

4.99K

R304

R304

4.99K

4.99K

C301

C301
1uF_6.3V

1uF_6.3V

VREF_U302

+MVDD

+MVDD

C305

C305
100nF_6.3V

100nF_6.3V

MAB_BA0
MAB_BA1

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB0b<5>
CLKB0<5>

CKEB0<5>

CSB0b_0<5>

WEB0b<5>
RASB0b<5>
CASB0b<5>

DQMBb_0
DQMBb_2

ODTB0<5>

QSB_0 QSB_5

VREF_B0

QSB_2

VREF_B0

U302

U302

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQB_18

B9

DQB_22

B1

DQB_17

D9

DQB_23

D1

DQB_20

D3

DQB_16

D7

DQB_21

C2

DQ9

DQB_19

C8

DQ8

DQB_6

F9

DQ7

DQB_2

F1

DQ6

DQB_5

H9

DQ5

DQB_3

H1

DQ4

DQB_1

H3

DQ3

DQB_4

H7

DQ2

DQB_0

G2

DQ1

DQB_7

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B302

B302
220R_200mA

220R_200mA

C303

C303
100nF_6.3V

100nF_6.3V

R305

R305

4.99K

4.99K

R306

R306

4.99K

4.99K

+MVDD

+MVDD

C304

C304
1uF_6.3V

1uF_6.3V

VREF_U303

C308

C308
100nF_6.3V

100nF_6.3V

MAB_BA0
MAB_BA1
MAB_BA2MAB_BA2 MAB_BA2

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB1b<5>
CLKB1<5>

CKEB1<5>

CSB1b_0<5>

WEB1b<5>
RASB1b<5>
CASB1b<5>

DQMBb_4 DQMBb_7

ODTB0<5> ODTB0<5>

VREF_B1

QSB_4

VREF_B1

U303

U303

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQB_34

B9

DQB_38

B1

DQB_33

D9

DQB_37

D1

DQB_39

D3

DQB_32

D7

DQB_36

C2

DQ9

DQB_35

C8

DQ8

DQB_43

F9

DQ7

DQB_44

F1

DQ6

DQB_40

H9

DQ5

DQB_46

H1

DQ4

DQB_47

H3

DQ3

DQB_41

H7

DQ2

DQB_45

G2

DQ1

DQB_42

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C306

C306
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B303

B303
220R_200mA

220R_200mA

R307

R307

4.99K

4.99K

R308

R308

4.99K

4.99K

C307

C307
1uF_6.3V

1uF_6.3V

VREF_U304

C587

C587
100nF_6.3V

100nF_6.3V

+MVDD

+MVDD

CSB1b_0<5>

DQMBb_6DQMBb_5

QSB_6

VREF_B1

QSB_7

VREF_B1

MAB_BA0
MAB_BA1
MAB_BA2

MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

CLKB1b<5>
CLKB1<5>

CKEB1<5>

WEB1b<5>
RASB1b<5>
CASB1b<5>

U304

U304

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQB_60

B9

DQB_57

B1

DQB_61

D9

DQB_56

D1

DQB_59

D3

DQB_62

D7

DQB_58

C2

DQ9

DQB_63

C8

DQ8

DQB_54

F9

DQ7

DQB_51

F1

DQ6

DQB_52

H9

DQ5

DQB_49

H1

DQ4

DQB_48

H3

DQ3

DQB_55

H7

DQ2

DQB_50

G2

DQ1

DQB_53

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B304

B304
220R_200mA

220R_200mA

C309

C309
100nF_6.3V

100nF_6.3V

+MVDD

+MVDD

C310

C310
1uF_6.3V

1uF_6.3V

DQMBb_[7..0]<5>

B B

+MVDD

C339

C339
1uF_6.3V

1uF_6.3V

+MVDD

C312

C312
1uF_6.3V

+MVDD

1uF_6.3V

C315

C315
1uF_6.3V

1uF_6.3V

A A

C340

C340
1uF_6.3V

1uF_6.3V

C313

C313
1uF_6.3V

1uF_6.3V

C316

C316
1uF_6.3V

1uF_6.3V

DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

C341

C341
1uF_6.3V

1uF_6.3V

C314

C314
1uF_6.3V

1uF_6.3V

C317

C317
1uF_6.3V

1uF_6.3V

QSB_[7..0]<5>

C343

C343

C342

C342

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C319

C319

C318

C318

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

5

+MVDD

+MVDD

C336

C336
1uF_6.3V

1uF_6.3V

C320

C320
1uF_6.3V

1uF_6.3V

C323

C323
1uF_6.3V

1uF_6.3V

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

C337

C337
1uF_6.3V

1uF_6.3V

C321

C321
1uF_6.3V

1uF_6.3V

C324

C324
1uF_6.3V

1uF_6.3V

C338

C338
1uF_6.3V

1uF_6.3V

C322

C322
1uF_6.3V

1uF_6.3V

C325

C325
1uF_6.3V

1uF_6.3V

C326

C326
1uF_6.3V

1uF_6.3V

C327

C327
1uF_6.3V

1uF_6.3V

+MVDD

C329

C329

C328

C328
1uF_6.3V

1uF_6.3V

+MVDD+MVDD

C331

C331
1uF_6.3V

1uF_6.3V

4

1uF_6.3V

1uF_6.3V

C332

C332
1uF_6.3V

1uF_6.3V

C330

C330
1uF_6.3V

1uF_6.3V

C333

C333
1uF_6.3V

1uF_6.3V

C335

C335

C334

C334

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

www.vinafix.vn

CLKB0<5>

CLKB0b<5>

CLKB1<5>

CLKB1b<5>

R321

R321
56R

56R

C344 10nFC344 10nF

R322

R322
56R

56R

R323

R323
56R

56R

C345 10nFC345 10nF

R324

R324
56R

56R

3

VREF_B0

+MVDD

R309

R309

4.99K

4.99K

R310

R310

4.99K

4.99K

VREF_B1

+MVDD

2

R319

R319

4.99K

4.99K

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

R320

R320

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

4.99K

4.99K

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - MEM GDDR3 CH C&D 128-bit 256MB

RH RV670 - MEM GDDR3 CH C&D 128-bit 256MB

RH RV670 - MEM GDDR3 CH C&D 128-bit 256MB

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, March 28, 2008

Friday, March 28, 2008

Friday, March 28, 2008

Sheet

Sheet

Sheet

of

10 23

of

10 23

of

10 23

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

4

3

2

1

CHANNEL C: 128MB/256MB DDR2

DQC_[63..0]<6>

D D

C C

MAC_BA[2..0]<6>

MAC_[12..0]<6>

+MVDD +MVDD +MVDD

R401

R401

4.99K

4.99K

VREF_U401

R402

R402

C402

C402

4.99K

4.99K

100nF_6.3V

100nF_6.3V

MAC_BA0
MAC_BA1
MAC_BA2

MAC_12
MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

CLKC0b<6>
CLKC0<6>

CKEC0<6>

CSC0b_0<6>

WEC0b<6>
RASC0b<6>
CASC0b<6>

DQMCb_3
DQMCb_2

ODTC0<6>

QSC_3

VREF_C0

QSC_2

VREF_C0

U401

U401

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQC_21

B9

DQC_17

B1

DQC_23

D9

DQC_16

D1

DQC_18

D3

DQC_20

D7

DQC_19

C2

DQ9

DQC_22

C8

DQ8

DQC_28

F9

DQ7

DQC_27

F1

DQ6

DQC_30

H9

DQ5

DQC_25

H1

DQ4

DQC_24

H3

DQ3

DQC_31

H7

DQ2

DQC_26

G2

DQ1

DQC_29

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B401

B401
220R_200mA

220R_200mA

C400

C400
100nF_6.3V

100nF_6.3V

R403

R403

4.99K

4.99K

R404

R404

4.99K

4.99K

+MVDD

+MVDD

C401

C401
1uF_6.3V

1uF_6.3V

VREF_U402

C405

C405
100nF_6.3V

100nF_6.3V

MAC_BA0
MAC_BA1
MAC_BA2

MAC_12
MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

CLKC0b<6>
CLKC0<6>

CKEC0<6>

CSC0b_0<6>

WEC0b<6>
RASC0b<6>
CASC0b<6>

DQMCb_1
DQMCb_0

ODTC0<6>

QSC_1 QSC_6

VREF_C0

QSC_0

VREF_C0

U402

U402

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQC_3

B9

DQC_4

B1

DQC_1

D9

DQC_7

D1

DQC_6

D3

DQC_0

D7

DQC_5

C2

DQ9

DQC_2

C8

DQ8

DQC_10

F9

DQ7

DQC_15

F1

DQ6

DQC_8

H9

DQ5

DQC_12

H1

DQ4

DQC_14

H3

DQ3

DQC_11

H7

DQ2

DQC_13

G2

DQ1

DQC_9

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C403

C403
100nF_6.3V

100nF_6.3V

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B402

B402
220R_200mA

220R_200mA

R405

R405

4.99K

4.99K

R406

R406

4.99K

4.99K

C404

C404
1uF_6.3V

1uF_6.3V

VREF_U403

+MVDD

+MVDD

C408

C408
100nF_6.3V

100nF_6.3V

U403

MAC_BA0
MAC_BA1
MAC_BA2

MAC_12
MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

CLKC1b<6>
CLKC1<6>

CKEC1<6>

CSC1b_0<6>

WEC1b<6>
RASC1b<6>
CASC1b<6>

DQMCb_4 DQMCb_5

ODTC0<6>

VREF_C1

QSC_4

VREF_C1

U403

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQC_34

B9

DQC_38

B1

DQC_33

D9

DQC_37

D1

DQC_39

D3

DQC_32

D7

DQC_36

C2

DQ9

DQC_35

C8

DQ8

DQC_51

F9

DQ7

DQC_52

F1

DQ6

DQC_49

H9

DQ5

DQC_54

H1

DQ4

DQC_55

H3

DQ3

DQC_50

H7

DQ2

DQC_53

G2

DQ1

DQC_48

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C406

C406
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B403

B403
220R_200mA

220R_200mA

R407

R407

4.99K

4.99K

R408

R408

4.99K

4.99K

C407

C407
1uF_6.3V

1uF_6.3V

VREF_U404

+MVDD

+MVDD

C411

C411
100nF_6.3V

100nF_6.3V

DQMCb_7DQMCb_6

QSC_7

VREF_C1

QSC_5

VREF_C1

MAC_BA0
MAC_BA1
MAC_BA2

MAC_12
MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

CLKC1b<6>
CLKC1<6>

CKEC1<6>

CSC1b_0<6>

WEC1b<6>
RASC1b<6>
CASC1b<6>

ODTC0<6>

U404

U404

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQC_47

B9

DQC_41

B1

DQC_44

D9

DQC_43

D1

DQC_42

D3

DQC_45

D7

DQC_40

C2

DQ9

DQC_46

C8

DQ8

DQC_60

F9

DQ7

DQC_59

F1

DQ6

DQC_62

H9

DQ5

DQC_57

H1

DQ4

DQC_56

H3

DQ3

DQC_63

H7

DQ2

DQC_58

G2

DQ1

DQC_61

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C409

C409
100nF_6.3V

100nF_6.3V

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B404

B404
220R_200mA

220R_200mA

C410

C410
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

DQMCb_0

C440

C440
1uF_6.3V

1uF_6.3V

C429

C429
1uF_6.3V

1uF_6.3V

C432

C432
1uF_6.3V

1uF_6.3V

DQMCb_1
DQMCb_2
DQMCb_3
DQMCb_4
DQMCb_5
DQMCb_6
DQMCb_7

C441

C441
1uF_6.3V

1uF_6.3V

C430

C430
1uF_6.3V

1uF_6.3V

C433

C433
1uF_6.3V

1uF_6.3V

B B

+MVDD

C439

C439
1uF_6.3V

1uF_6.3V

+MVDD

C428

A A

C428
1uF_6.3V

1uF_6.3V

+MVDD +MVDD

C431

C431
1uF_6.3V

1uF_6.3V

QSC_[7..0]<6>DQMCb_[7..0]<6>

C442

C442

C443

C443

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C435

C435

C434

C434

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

5

+MVDD

+MVDD

QSC_0
QSC_1
QSC_2
QSC_3
QSC_4
QSC_5
QSC_6
QSC_7

C436

C436
1uF_6.3V

1uF_6.3V

C420

C420
1uF_6.3V

1uF_6.3V

C423

C423
1uF_6.3V

1uF_6.3V

C437

C437
1uF_6.3V

1uF_6.3V

C421

C421
1uF_6.3V

1uF_6.3V

C424

C424
1uF_6.3V

1uF_6.3V

C438

C438
1uF_6.3V

1uF_6.3V

C422

C422
1uF_6.3V

1uF_6.3V

C425

C425
1uF_6.3V

1uF_6.3V

C426

C426
1uF_6.3V

1uF_6.3V

C427

C427
1uF_6.3V

1uF_6.3V

+MVDD

C412

C412

C413

C413

C414

1uF_6.3V

1uF_6.3V

C416

C416
1uF_6.3V

1uF_6.3V

C414
1uF_6.3V

1uF_6.3V

C417

C417

C418

C418

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

www.vinafix.vn

1uF_6.3V

1uF_6.3V

+MVDD

C415

C415
1uF_6.3V

1uF_6.3V

4

C419

C419
1uF_6.3V

1uF_6.3V

CLKC0<6>

CLKC0b<6>

CLKC1<6>

CLKC1b<6>

R421

R421
56R

56R

C444 10nFC444 10nF

R422

R422
56R

56R

R423

R423
56R

56R

C445 10nFC445 10nF

R424

R424
56R

56R

3

+MVDD +MVDD

R409

R409

4.99K

4.99K

VREF_C0

R410

R410

4.99K

4.99K

VREF_C1

R419

R419

4.99K

4.99K

R420

R420

4.99K

4.99K

2

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

C

<Doc> <RevCode>

C

<Doc> <RevCode>

C

Date: Sheet

Date: Sheet of

Date: Sheet of

1

of

11 23Friday, March 28, 2008

11 23Friday, March 28, 2008

11 23Friday, March 28, 2008

5

4

3

2

1

CHANNEL D: 128MB/256MB DDR2

DQD_[63..0]<6>

MAD_BA[2..0]<6>

D D

C C

+MVDD

MAD_[12..0]<6>

R501

R501

4.99K

4.99K

VREF_U501

R502

R502

4.99K

4.99K

C502

C502
100nF_6.3V

100nF_6.3V

MAD_BA0
MAD_BA1
MAD_BA2

MAD_12
MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

CLKD0b<6>
CLKD0<6>

CKED0<6>

CSD0b_0<6>

WED0b<6>
RASD0b<6>
CASD0b<6>

DQMDb_3
DQMDb_2

ODTD0<6>

QSD_3

VREF_D0

QSD_2

U501

U501

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQD_22

B9

DQD_17

B1

DQD_21

D9

DQD_16

D1

DQD_18

D3

DQD_23

D7

DQD_19

C2

DQ9

DQD_20

C8

DQ8

DQD_28

F9

DQ7

DQD_30

F1

DQ6

DQD_27

H9

DQ5

DQD_31

H1

DQ4

DQD_24

H3

DQ3

DQD_26

H7

DQ2

DQD_25

G2

DQ1

DQD_29

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9

B501

B501

M9

220R_200mA

220R_200mA

R1
J1

J7

C500

C500
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

R503

R503

4.99K

4.99K

R504

R504

4.99K

4.99K

C501

C501
1uF_6.3V

1uF_6.3V

VREF_U502

+MVDD

+MVDD

C505

C505
100nF_6.3V

100nF_6.3V

MAD_BA0
MAD_BA1
MAD_BA2

MAD_12
MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

CLKD0b<6>
CLKD0<6>

CKED0<6>

CSD0b_0<6>

WED0b<6>
RASD0b<6>
CASD0b<6>

DQMDb_1
DQMDb_0

ODTD0<6> ODTD0<6>

QSD_1 QSD_5

VREF_D0

QSD_0

VREF_D0VREF_D0

U502

U502

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQD_3

B9

DQD_4

B1

DQD_1

D9

DQD_6

D1

DQD_7

D3

DQD_0

D7

DQD_5

C2

DQ9

DQD_2

C8

DQ8

DQD_11

F9

DQ7

DQD_13

F1

DQ6

DQD_8

H9

DQ5

DQD_14

H1

DQ4

DQD_12

H3

DQ3

DQD_9

H7

DQ2

DQD_15

G2

DQ1

DQD_10

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B502

B502
220R_200mA

220R_200mA

C503

C503
100nF_6.3V

100nF_6.3V

R505

R505

4.99K

4.99K

R506

R506

4.99K

4.99K

+MVDD

+MVDD

C504

C504
1uF_6.3V

1uF_6.3V

VREF_U503

C508

C508
100nF_6.3V

100nF_6.3V

MAD_BA0
MAD_BA1
MAD_BA2

MAD_12
MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

CLKD1b<6>
CLKD1<6>

CKED1<6>

CSD1b_0<6>

WED1b<6>
RASD1b<6>
CASD1b<6>

DQMDb_4 DQMDb_7

VREF_D1

QSD_4

VREF_D1

U503

U503

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQD_34

B9

DQD_38

B1

DQD_33

D9

DQD_37

D1

DQD_39

D3

DQD_32

D7

DQD_36

C2

DQ9

DQD_35

C8

DQ8

DQD_43

F9

DQ7

DQD_46

F1

DQ6

DQD_40

H9

DQ5

DQD_47

H1

DQ4

DQD_44

H3

DQ3

DQD_41

H7

DQ2

DQD_45

G2

DQ1

DQD_42

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

C506

C506
100nF_6.3V

100nF_6.3V

A7

+MVDD

B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B503

B503
220R_200mA

220R_200mA

R507

R507

4.99K

4.99K

R508

R508

4.99K

4.99K

C507

C507
1uF_6.3V

1uF_6.3V

VREF_U504

C511

C511
100nF_6.3V

100nF_6.3V

+MVDD

+MVDD

CSD1b_0<6>

DQMDb_6DQMDb_5

QSD_6

VREF_D1

QSD_7

VREF_D1

MAD_BA0
MAD_BA1
MAD_BA2

MAD_12
MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

CLKD1b<6>
CLKD1<6>

CKED1<6>

WED1b<6>
RASD1b<6>
CASD1b<6>

ODTD0<6>

U504

U504

L2

BA0

L3

BA1

L1

BA2

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

R3

NC#R3

R7

NC#R7

R8

NC#R8

23BC2347SC25

23BC2347SC25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQD_57

B9

DQD_59

B1

DQD_58

D9

DQD_56

D1

DQD_63

D3

DQD_60

D7

DQD_61

C2

DQ9

DQD_62

C8

DQ8

DQD_52

F9

DQ7

DQD_51

F1

DQ6

DQD_54

H9

DQ5

DQD_50

H1

DQ4

DQD_49

H3

DQ3

DQD_55

H7

DQ2

DQD_48

G2

DQ1

DQD_53

G8

DQ0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B504

B504
220R_200mA

220R_200mA

C509

C509
100nF_6.3V

100nF_6.3V

+MVDD

+MVDD

C510

C510
1uF_6.3V

1uF_6.3V

DQMDb_[7..0]<6>

B B

+MVDD

C539

C539
1uF_6.3V

1uF_6.3V

+MVDD

C512

+MVDD

C512
1uF_6.3V

1uF_6.3V

C515

C515
1uF_6.3V

1uF_6.3V

A A

C540

C540
1uF_6.3V

1uF_6.3V

C513

C513
1uF_6.3V

1uF_6.3V

C516

C516
1uF_6.3V

1uF_6.3V

DQMDb_0
DQMDb_1
DQMDb_2
DQMDb_3
DQMDb_4
DQMDb_5
DQMDb_6
DQMDb_7

C541

C541
1uF_6.3V

1uF_6.3V

C514

C514
1uF_6.3V

1uF_6.3V

C517

C517
1uF_6.3V

1uF_6.3V

5

C542

C542
1uF_6.3V

1uF_6.3V

C518

C518
1uF_6.3V

1uF_6.3V

QSD_[7..0]<6>

C543

C543
1uF_6.3V

1uF_6.3V

C519

C519
1uF_6.3V

1uF_6.3V

+MVDD

+MVDD

C536

C536
1uF_6.3V

1uF_6.3V

C520

C520
1uF_6.3V

1uF_6.3V

C523

C523
1uF_6.3V

1uF_6.3V

QSD_0
QSD_1
QSD_2
QSD_3
QSD_4
QSD_5
QSD_6
QSD_7

C537

C537
1uF_6.3V

1uF_6.3V

C521

C521
1uF_6.3V

1uF_6.3V

C524

C524
1uF_6.3V

1uF_6.3V

C538

C538
1uF_6.3V

1uF_6.3V

C522

C522
1uF_6.3V

1uF_6.3V

C525

C525
1uF_6.3V

1uF_6.3V

C526

C526
1uF_6.3V

1uF_6.3V

C527

C527
1uF_6.3V

1uF_6.3V

+MVDD

C529

C529

C528

C528
1uF_6.3V

1uF_6.3V

+MVDD+MVDD

C531

C531
1uF_6.3V

1uF_6.3V

4

1uF_6.3V

1uF_6.3V

C532

C532
1uF_6.3V

1uF_6.3V

C530

C530
1uF_6.3V

1uF_6.3V

C534

C534

C535

1uF_6.3V

1uF_6.3V

C535
1uF_6.3V

1uF_6.3V

C533

C533
1uF_6.3V

1uF_6.3V

www.vinafix.vn

CLKD0<6>

CLKD0b<6>

CLKD1<6>

CLKD1b<6>

R327

R327
56R

56R

C348 10nFC348 10nF

R325

R325
56R

56R

R328

R328
56R

56R

C364 10nFC364 10nF

R329

R329
56R

56R

3

VREF_D0

+MVDD

R317

R317

4.99K

4.99K

R316

R316

4.99K

4.99K

VREF_D1

2

+MVDD

R326

R326

4.99K

4.99K

R330

R330

4.99K

4.99K

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

<Doc> <RevCode>

C

<Doc> <RevCode>

C

<Doc> <RevCode>

C

Date: Sheet

Date: Sheet of

Date: Sheet of

1

of

12 23Friday, March 28, 2008

12 23Friday, March 28, 2008

12 23Friday, March 28, 2008

8

12V_EXT Connector

J1602

J1602
6P_HDER

6P_HDER

1

+12V_1

2

+12V_2

3

+12V_3

C1609

C1609
220pF_50V

220pF_50V

4

D D

C C

B B

GND_1
GND_2

10K/0402

10K/0402

Sense

R737

R737

VDD_+5V

6

5

C1608

C1608
220pF_50V

220pF_50V

VID_SEL

+12V_EXT

MC1604

MC1604

C1610

C1610

10UF

10UF

10uF

10uF

VDD_+5V

AR13

AR13

10/0402

10/0402

+12V_EXT

VDD_+5V

AR23

AR23

10K/0402

10K/0402

7

+VDDC=0.8 * ( 1+ ( AR49 / AR82 ))

AC19

AC19

AR54

AR54

AR81

AR81

AC16

1uF/0402

1uF/0402

130/0402

130/0402

AC18

AC18

3.9nF/0402

3.9nF/0402

AR55

AR55

820/0402

820/0402

41

AU1

AU1

GND

32

VID 7

33

VID 6

34

VID 5

35

VID 4

36

VID 3

37

VID 2

38

VID 1

VID0

39

VID 0

VID_SEL

40

VID_SEL

31

AC6

AC6

0.1uF/0402

0.1uF/0402

+12V_EXT+3.3V_BUS

ER19

ER19

DNI

DNI

Q993

Q993

1

DNI

DNI

2 3

ER18

ER18

DNI

DNI

VDD

12

DVD

RT8802A

RT8802A

AR17

AR17

1.1K/0402

1.1K/0402

AR16

AR16

1K/0402

1K/0402

ER17

ER17

DNI

DNI

DS

EQ107

EQ107

G

DNI

DNI

6.8K/0402

6.8K/0402

AC17

AC17

AR53

AR53

47nF/0402

47nF/0402

41.2K/0402

41.2K/0402

AR52

AR52

12K/0402

12K/0402

6

13

5

16

17

15

SS

RT

ADJ

IMAX

TCOC

GND

GND

RT8802A

RT8802A

EN/VTT1VR_Ready2FBRTN3QRSEL

VR_FAN8VR_HOT

9

14

GPU_VSS

AC16

DNI

DNI

AR50

AR50

30K/0402

30K/0402

4

FB

COMP

PWM 126PWM 227PWM 3

OFS

7

11

AR22

AR22

10K/0402

10K/0402

5.9K/0402

5.9K/0402

AC14 6.8pF/0402AC14 6.8pF/0402

2.7nF/0402

2.7nF/0402

28

PWM 4
PWM 5

ISN35
ISN24

ISN1
ISP1
ISP2
ISP3
ISP4
ISP5

TSEN10IOUT

6

AR82

AR82

680pF/0402

680pF/0402

AR80

AR80

AC13

AC13

0/0402

AC15

AC15

29
30
20
19
18
25
24
23
22
21

0/0402

AR49

AR49

1.5K/0402

1.5K/0402

VDD_+5V

AR47

AR47

DNI

DNI

Install AR47 for Disable PWM3 function

AR42

AR42

820/0402

820/0402

AR40

AR40

820/0402

820/0402

AR38

AR38

820/0402

820/0402

ACISP3

ACISP1

ACISP2

ACISP3

AC11

AC11

0.1uF/0402

0.1uF/0402

ACISP2

AR31

AR31

12k/0402

12k/0402

5

+12V_EXT

AR62

AVcore35

AVcore24

AVcore1

APhase_1

APhase_2

APhase_3

10/0603

10/0603

AR62

+12V_EXT

0.1uF/0402

0.1uF/0402

PWM1
PWM2

+VDDC

AR37

AR37

0/0402

0/0402

AICSN35

AR36

AR36

0/0402

AC80

AC80

DNI

DNI

AC10

AC10

0.1uF/0402

0.1uF/0402

ACISP1

AR29

AR29

12k/0402

12k/0402

AR86 DNIAR86 DNI

AR94 DNIAR94 DNI

AR93 DNIAR93 DNI

0/0402

AICSN24

AR35

AR35

0/0402

0/0402

AICSN1

AC79

AC79

AC81

AC81

DNI

DNI

DNI

DNI

AC9

AC9

0.1uF/0402

0.1uF/0402

AR27

AR27

12k/0402

12k/0402

AICSN1

AICSN24

AICSN35

4

+12V_EXT

EB17

EB17

Chock 1.2u

Chock 1.2u

470uF_16V

470uF_16V

AC27

AC27

+12V_EXT

0.1uF/0402

0.1uF/0402

BOOT1

BAT54S

BAT54S

ED29

ED29

U706

U706

14

AR63

AR63

10/0603

10/0603

PWM1
PWM2

+12V_EXT

VCC

1

GND

15

PWM1

16

PWM2

17

GND

RT9607PQV_QFN16L-LF

RT9607PQV_QFN16L-LF

+12V_EXT

BAT54S

BAT54S

ED30

ED30

EB18

EB18

Chock 1.2u

Chock 1.2u

470uF_16V

470uF_16V

AR70

AR70

10/0603

10/0603

ED28

ED28
BAT54S

BAT54S

AC38

AC38

0.1uF/0402

0.1uF/0402

BOOT2

C1607

C1607

1
2
3
4

EB19

EB19

Chock 1.2u

Chock 1.2u

U10

U10

RT9619APS

RT9619APS

AC25

AC25

+12V_EXT

+12V_EXT

+12V_EXT

PWM3

4

PGND

GND

GND

3

BOOT
PWM
OD
VCC

5

11

UGATE1

PVCC

BOOT1

PHASE1
LGATE1
UGATE2
PHASE2
LGATE2

BOOT210NC28NC1

BOOT2 PH1

C1604

C1604

470uF_16V

470uF_16V

AR85

AR85

2.2/0603

2.2/0603

PWM3_Vin

AR88 2.2/0603AR88 2.2/0603

8

UG

7

Phase

6

GND

5

LG

RT9619A

RT9619A

AR84 2.2/0603AR84 2.2/0603

12
13
2
9
7
6

AC32

AC32

1uF/0603

1uF/0603

UG3
PH3

LG3

UG1
PH1
LG1
UG2
PH2
LG2

LG1

C1606

C1606

LG2

C1584

C1584

10uF/1206

10uF/1206

PWM2_Vin

AC39

AC39

1uF/0603

1uF/0603

3

PWM1_Vin

C1586

C1586

C1583

C1583

10uF/1206

10uF/1206

10uF/1206

10uF/1206

DS

MQ1303

AR89 0/0603AR89 0/0603

DS

MQ1307

MQ1307

APM2506

APM2506

G

MQ1310

MQ1310

APM2506

APM2506

MQ1303

G

APM2509

APM2509

DS

MQ1305

MQ1305

AR65

AR65

DNI

DNI

G

APM2506

APM2506

AC26

AC26

DNI

DNI

DS

MQ1306

MQ1306

G

APM2509

APM2509

DS

MQ1308

MQ1308

G

APM2506

APM2506

DS

MQ1309

MQ1309

APM2509

APM2509

DS

MQ1311

MQ1311

G

APM2506

APM2506

UG1

AR87 0/0603AR87 0/0603

AC75

AC75

1uF/0603

1uF/0603

DS

MQ1304

MQ1304

G

APM2506

APM2506

C1585

C1585

C1605

C1605

10uF/1206

10uF/1206

10uF/1206

10uF/1206

UG2

PH2

G

C1582

C1582

10uF/1206

10uF/1206

AR90 0/0603AR90 0/0603

DS

G

APhase_1

APhase_3

2

AVcore1

+VDDC

L63

L63

Dip 1.2u

Dip 1.2u

APhase_2

AR69

AR69

DNI

DNI

AC33

AC33

DNI

DNI

L65

L65

Dip 1.2u

Dip 1.2u

AR73

AR73

DNI

DNI

AC40

AC40

DNI

DNI

L64

L64

Dip 1.2u

Dip 1.2u

AVcore35

AVcore24

EC1153

EC1153
820uF_6.3V

820uF_6.3V

+VDDC

+VDDC

EC1159

EC1159
820uF_6.3V

820uF_6.3V

EC1155

EC1155
820uF_6.3V

820uF_6.3V

EC1154

EC1154
820uF_6.3V

820uF_6.3V

EC1161

EC1161
820uF_6.3V

820uF_6.3V

EC1156

EC1156
820uF_6.3V

820uF_6.3V

EC1150

EC1150
10uF

10uF

EC1162

EC1162
10uF

10uF

EC1149

EC1149
10uF

10uF

EC1157

EC1157
10uF

10uF

EC1160

EC1160
10uF

10uF

EC1151

EC1151
10uF

10uF

EC1152

EC1152
10uF

10uF

EC1163

EC1163
10uF

10uF

EC1158

EC1158
10uF

10uF

1

VDD_+5V

EC138

EC138

EC136

EC136

10uF

10uF

10uF

10uF

EC137

EC137
10uF

10uF

+12V_EXT

RC1117S_SOT223U6RC1117S_SOT223

I31-01117F9-A30

4

U6

VIN3VOUT

4

2

ADJ/GND

ER306

ER306

1

121

121

R11-1210T13-W08

ER309

ER309
365

365

R11-3650T13-Y01

Vout=1.25V* [1+(ER305/ER304) ]

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - VDDC SMPS 03

RH RV670 - VDDC SMPS 03

8

7

6

5

4

3

2

RH RV670 - VDDC SMPS 03

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, March 13, 2008

Thursday, March 13, 2008

Thursday, March 13, 2008

Sheet

Sheet

Sheet

of

13 23

of

13 23

of

13 23

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

www.vinafix.vn

8

D D

7

6

5

4

3

2

1

+12V_EXT

ER1595

ER1595

2R2

2R2

ED2

ED2

BAT54SLT1

BAT54SLT1

EC124

EC124

0.1uF

0.1uF

C C

ER20

ER20

DNI

DNI

EMU42

EMU42

1
2
3

APW7120

APW7120

+12V_EXT

ER3070RER307

0R

BOOT

PHASE
UGATE
GND
LGATE4VCC

ER3080RER308

0R

ER15960RER1596

0R

8
7

OPS

6

FB

5

EC168

EC168

0.1uF

0.1uF

EC1692

EC1692

+12V_EXT+VDDC

B B

ER151KER15

1K

ER16

ER16

10K

10K

ER14

ER14

10K

10K

Q992

Q992

1

MMBT3904

MMBT3904

2 3

DS

EQ106

EQ106

G

2N7002

2N7002

ER1801

ER1801

DNI

DNI

EC1801

EC1801

DNI

DNI

DS

G

ER10

ER10

19K

19K

DS

G

ER21

ER21

DNI

DNI

DNI

DNI

EC1693

EC1693

DNI

DNI

Memory Power Seq

EQ36

EQ36

APM2512 TO-252

APM2512 TO-252

EQ37

EQ37

APM2512 TO-252

APM2512 TO-252

ER13

ER13

1.47K

1.47K

EL64

EL64
Dip 1.6uH

Dip 1.6uH

EC7

EC7

0.1uF

0.1uF

EC108

EC108
470uF

470uF

ER12

ER12

1.87K

1.87K

+12V_EXT

EB16

EB16
Chock 1.2u

Chock 1.2u

EC182

EC182

EC181

EC181

10uF

10uF

10uF

10uF

EC164

EC164

EC159

EC159

EC169

EC169

10uF

10uF

10uF

10uF

ER11

ER11

200RF

200RF

10uF

10uF

+MVDDC=0.8*( 1+( ER12 / ER13))

EC346

EC346
10uf

10uf

+MVDD

EC347

EC347
10uf

10uf

EC348

EC348
10uf

10uf

EC349

EC349
10uf

10uf

EC185

EC185
820uF

820uF

EC184

EC184
820uF

820uF

C1029

C1029
100pF

100pF

C1033

C1033
1000pF

1000pF

C1037

C1037
10nF

10nF

C1030

C1030
100pF

100pF

C1034

C1034
1000pF

1000pF

C1038

C1038
10nF

10nF

C1031

C1031
100pF

100pF

C1035

C1035
1000pF

1000pF

C1039

C1039
10nF

10nF

C1032

C1032
100pF

100pF

C1036

C1036
1000pF

1000pF

C1040

C1040
10nF

10nF

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - MVDD SMPS 02

RH RV670 - MVDD SMPS 02

8

7

6

5

4

3

RH RV670 - MVDD SMPS 02

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, May 22, 2008

Thursday, May 22, 2008

Thursday, May 22, 2008

Sheet

Sheet

Sheet

of

14 23

of

14 23

of

14 23

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

www.vinafix.vn

5

4

3

2

1

D D

+VDDC

R8411KR841

1K

C841

C841
1uF_6.3V

1uF_6.3V

C C

+1.8V

R847 10KR847 10K Q844

C844

C844

1uF_6.3V

1uF_6.3V

B B

Power up Sequencing

+12V_BUS

R843

R843

5.1K

5.1K

5%

Q840

Q840

1

MMBT3904

MMBT3904

2 3

1

Q843

Q843

2 3

MMBT3904

MMBT3904

R844 5.1KR844 5.1K

5%

R848

R848
100K

100K

1

+12V_BUS

2 3

+3.3V_BUS

1

+3.3V_BUS

R849

R849
10K

10K

Q844

MMBT3904

MMBT3904

5.1K

5.1K
R845

R845

Q841

Q841
MMBT3904

MMBT3904

2 3

LDO_EN

C842

C842
10uF_X6S

10uF_X6S

C843

C843
100NF

100NF

Q845

Q845
SI2304DS

SI2304DS

3 2

402
X5R
16V

LDO_EN <16>

+3.3V

1

R840

R840
100K

100K

LVT_EN <3>

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Power Management

RH RV670 - Power Management

5

4

3

2

RH RV670 - Power Management

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

15 23

of

15 23

of

15 23

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

www.vinafix.vn

8

7

6

5

4

3

2

1

Regulators for +5V, +5V_VESA and +5V_VESA2

LDO #2:

Iout = 0.8A (TBV) RMS MAXVin = 2.5V to 3.6V MAX Vout = +1.8V +/- 3%

PCB: 50 to 70mm sq. copper area for cooling

0.1R

D D

0.1R
MR868

MR868

R868

R868

0.50R

0.50R

LDO_EN<15>

Overlap footprints

LDO2_VIN

LDO_EN

C866

C866

10uF_X6S

10uF_X6S

+5V +1.8V+3.3V_BUS +1.8V

R865

C868

C868
1uF_6.3V

1uF_6.3V

U861

U861

1

POK

2

EN

3

VIN
CNTL4REFIN

uP7706U8

uP7706U8

GND#8

VOUT

GND#9

R865

13.0K

8
7

FB

6

R866 0RR866 0R

5
9

LDO2_FB

13.0K

R864

R864

10.2K

10.2K

VOUT = Vref x (1 + R5/R4)

R5
R4

C865

C865
33pF_50V

33pF_50V

C3

C862

C862
10uF_X6S

10uF_X6S

DNIDNI

C861

C861
10uF_X6S

10uF_X6S

C864

C864
100nF_6.3V

100nF_6.3V

Vin = +1.70V to 2.1VMAX

Vout = +1.1V +/- 3%LDO #3:

Iout = Up to 1.3A (TBV) RMS MAX

PCB: 50 to 70mm sq. copper area for cooling

0.1R

0.1R
MR858

MR858

1/2W 1210

R8580RR858

0R

LDO_EN<15>

1/4W 1206

Overlap footprints

LDO3_VIN

C856

C856

10uF_X6S

10uF_X6S

LDO_EN

C858

C858
1uF_6.3V

1uF_6.3V

U851

U851

1

POK

2

EN

3

VIN
CNTL4REFIN

uP7706U8

uP7706U8

GND#8

VOUT

GND#9

8
7

FB

6

R856 0RR856 0R

5
9

+MVDD

C C

LDO #6: For fixed output voltage: Vin = +1.70V to 2.1V MAX Vout = +1.20V +/- 3%
PCB: 50 to 70mm sq. copper area for cooling

LDO #6:

B B

A A

PCB: 50 to 70mm sq. copper area for cooling

0.1R

0.1R

MR878

MR878

R870

R870

1R_1210

1R_1210

R872

R872

1R_1210

1R_1210

1/2W 1210

R8780RR878

1/4W 1206

0R

1/2W each

Overlap footprints

R871

R871

1R_1210

1R_1210

R873

R873

1R_1210

1R_1210

1/2W 1210

+MVDD

+3.3V_BUS

Add large copper area under R870~R873 for heat dissipation (~2W).

8

LDO_EN<15>

LDO6_VIN

C876

0.1R

0.1R
NR878

NR878

C876

10uF_X6S

10uF_X6S

NR878 can share pad with MR878.
One of them must be installed

7

DNI

MR8770RMR877

LDO_EN

0R

+5V +VDDCI_LDO

R8770RR877

0R

C878

C878
1uF_6.3V

1uF_6.3V

+1.1V

R855

R855

3.83K

3.83K

LDO3_FB

DNI

R854

R854

10.2K

10.2K

R5

R4

VOUT = Vref x (1 + R5/R4)

C855

C855
33pF_50V

33pF_50V

C3

+1.1V+5V

C852

C852

C851

C851

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

C854

C854
100nF_6.3V

DNI

100nF_6.3V

Iout = 1.3A (TBV) RMS MAX

Iout = 1.3A (TBV) RMS MAXFor tracking VDDC: Vin = TBD Vout = TBD

+12V_BUS

EC133

EC133
10uF

10uF

U4

U4

VIN3VOUT

RC1117S_SOT223

RC1117S_SOT223

I31-01117F9-A30

+5V_BAK +5V

4

4

2

ADJ/GND

1

ER304

ER304
121

121

R11-1210T13-W08

ER305

ER305
365

365

R11-3650T13-Y01

EC135

EC135
10uF

10uF

EC134

EC134
10uF

10uF

Vout=1.25V* [1+(ER305/ER304) ]

+VDDCI_LDO

R875

U871

U871

1

POK

2

EN

3

VIN
CNTL4REFIN

uP7706U8

uP7706U8

GND#8

VOUT

GND#9

R875

5.11K

8
7

FB

6
5
9

LDO6_FB

5.11K

R874

R874
10K

10K

R5
R4

C875

C875
33pF_50V

33pF_50V

C3

C872

C872
10uF_X6S

10uF_X6S

DNI

C871

C871
10uF_X6S

10uF_X6S

C874

C874
100nF_6.3V

100nF_6.3V

VOUT = Vref x (1 + R5/R4)

R8760RR876

DNI

+VDDC

MR876

MR876

TBD

0R

LDO6_VREF

10R

10R

6

DNI

C879

C879
100nF_6.3V

100nF_6.3V

5

1 2

NSR0320MW2T1G

NSR0320MW2T1G

TBD

D870

D870

+VDDC+VDDCI_LDO

+5V

C839

C839

1uF_6.3V

1uF_6.3V

C838

C838

1uF_6.3V

1uF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Linear Regulators

RH RV670 - Linear Regulators

4

3

RH RV670 - Linear Regulators

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

16 23

of

16 23

of

16 23

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

www.vinafix.vn

8

A_DAC1_R<3>

A_DAC1_RB<3>

See BOM for qualified filters

R1027

R1027

37.4R

37.4R

A_DAC1_G<3>

R1028

D D

A_DAC1_GB<3>

A_DAC1_B<3>

A_DAC1_BB<3>

R1028

37.4R

37.4R

R1029

R1029

37.4R

37.4R

7

L1001 47nHL1001 47nH

C1004

C1004

R1001

R1001
75R

75R

402

8.0pF

8.0pF

402

ML1001 36NHML1001 36NH

C1001

C1001
12pF_50V

12pF_50V

402

L1002 47nHL1002 47nH

C1005

C1005

R1002

R1002
75R

75R

402

8.0pF

8.0pF

402

ML1002 36NHML1002 36NH

C1002

C1002
12pF_50V

12pF_50V

402

L1003 47nHL1003 47nH

C1003

C1006

C1006

R1003

R1003

8.0pF

8.0pF

75R

75R

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

L100x and ML100x footprints are overlapped

ML1003 36NHML1003 36NH

402

C1003
12pF_50V

12pF_50V

402402

6

5

For ESD Protection

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F

DDCDATA_DAC1_R
DDCCLK_DAC1_R
HSYNC_DAC1_R

VSYNC_DAC1_R

4

+3.3V

D1001

D1001

4
5
6

CM1213-04

CM1213-04

CH3
Vp
CH4

3

CH2

2

Vn

1

CH1

3

+5V_VESA

4
5
6

D1002

D1002

CH3
Vp
CH4

CM1213-04

CM1213-04

2

+5V_VESA

+5V

EF1

EF1

0.2A

0.2A

MJ1001

MJ1001

1

R

2

G

3

B

11

MS0

12

MS1

4

MS2

15

MS3

9

NC

13

HS

14

VS

5

VSS

6

VSS#6

7

VSS#7

8

VSS#8

10

VSS#10

16

CASE

17

CASE#17

G3179C219-005

G3179C219-005

3

CH2

2

Vn

1

CH1

+5V_VESA2

C1010

C1010
104pF

104pF

1

DDC2_MONID0
DDC2_MONID1(SDA)
DDC2_MONID2
DDC2_MONID3(SCL)

+3.3V

R1004

R1004
10K

+5V

14

1

7

4

10K

+3.3V

R1007

R1007
10K

10K

U1999A

U1999A
SN74HCT125D

SN74HCT125D

SN74HCT125D

SN74HCT125D
U1999B

U1999B

HSYNC_DAC1_B

VSYNC_DAC1_B

C C

DDC1CLK<3>

100nF_6.3V

100nF_6.3V

C1999

C1999

DDC1DATA<3>

HSYNC1<3,7>

VSYNC1<3,7>

2 3

5 6

SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane

B B

+5V

1

1

R1005

R1005

2.2K

2.2K

DDCDATA_DAC1_5V DDCDATA_DAC1_R

32

BSH111

BSH111
Q1001

Q1001

+5V

R1008

R1008

2.2K

2.2K

DDCCLK_DAC1_5V

32

BSH111

BSH111
Q1002

Q1002

R1006 33RR1006 33R

R1009 33RR1009 33R

R1010

R1010

R1011

R1011

10R

10R

10R

10R

402

402

402

402

DDCCLK_DAC1_R

HSYNC_DAC1_R

VSYNC_DAC1_R

T2X2M<3>
T2X2P<3>

T2X4M<3>
T2X4P<3>

DDCCLK_DAC1_R
DDCDATA_DAC1_R
VSYNC_DAC1_R

T2X1M<3>

+3.3V

Q1021

Q1021

MMBT3904

MMBT3904

HPD2<7>

2 3

R1023

R1023
10K

10K

1

R1022 10KR1022 10K

T2X1P<3>
T2X3M<3>

T2X3P<3>

HPD_DVI2

T2X0M<3>
T2X0P<3>

T2X5M<3>
T2X5P<3>

T2XCP<3>
T2XCM<3>

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F
HSYNC_DAC1_R

DB15 pin

Standard VGA
Monitor ID bit 0

11

Monitor ID bit 1

12

Monitor ID bit 2

4

Monitor ID bit 3

15

N/C

9

Mechanical Key
Hardware
Support

No Yes Yes No Yes

DDC1 Host
Monitor ID bit 0

Data from display
Monitor ID bit 2
Open
+5V
50mA min
1A max

DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max

DDC2AB Host
Monitor ID bit 0

SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max

Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997

+5V_VESA

J1001

J1001

25

CASE

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

26

CASE#26

27

CASE#27

28

CASE#28

29

CASE#29

30

CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

DDC1/2 Display
Optional

SDA
Optional
SCL

Optional

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - DAC1/TMDS2

RH RV670 - DAC1/TMDS2

8

7

6

5

4

3

RH RV670 - DAC1/TMDS2

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

17 23

of

17 23

of

17 23

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

www.vinafix.vn

8

7

6

5

4

3

2

1

See BOM for qualified filters

A_DAC2_R<3>

A_DAC2_RB<3>

A_DAC2_G<3>

D D

A_DAC2_GB<3>

A_DAC2_B<3>

A_DAC2_BB<3>

R2027

R2027

37.4R

37.4R

R2028

R2028

37.4R

37.4R

R2029

R2029

37.4R

37.4R

R2001

R2001
75R

75R

402

R2002

R2002
75R

75R

402

R2003

R2003
75R

75R

L2001 47nHL2001 47nH

C2001

C2004

C2004

8.0pF

8.0pF

402

ML2001 36NHML2001 36NH

C2001
12pF_50V

12pF_50V

402

L2002 47nHL2002 47nH

C2002

C2005

C2005

8.0pF

8.0pF

402

ML2002 36NHML2002 36NH

C2002
12pF_50V

12pF_50V

402

L2003 47nHL2003 47nH

C2006

C2006

ML2003 36NHML2003 36NH

8.0pF

8.0pF

402

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

L200x and ML200x footprints are overlapped

C2003

C2003
12pF_50V

12pF_50V

402402

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F

DDCDATA_DAC2_R
DDCCLK_DAC2_R

+3.3V

D2001

D2001

4
5
6

CM1213-04

CM1213-04

HSYNC_DAC2_R
VSYNC_DAC2_R

CH3
Vp
CH4

2

Vn

1

CH1

3

CH2

+5V_VESA2

D2002

D2002

4
5
6

CM1213-04

CM1213-04

CH3
Vp
CH4

2

Vn

1

CH1

3

CH2

+5V_VESA2

MJ2001

MJ2001

1

R

2

G

3

B

DDC2_MONID0

11

MS0

DDC2_MONID1(SDA)

12

MS1

DDC2_MONID2

4

MS2

DDC2_MONID3(SCL)

15

MS3

9

NC

13

HS

14

VS

5

VSS

6

VSS#6

7

VSS#7

8

VSS#8

10

VSS#10

16

CASE

17

CASE#17

G3179C219-005

G3179C219-005

+3.3V

R2004

R2004
10K

C C

DDC2DATA<3>

DDC2CLK<3>

HSYNC2<3,7>

VSYNC2<3,7>

B B

SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane

+3.3V

9 8

10
13

12 11

10K

R2007

R2007
10K

10K

U1999C

U1999C
SN74HCT125D

SN74HCT125D

SN74HCT125D

SN74HCT125D
U1999D

U1999D

1

32

BSH111

BSH111
Q2001

Q2001

1

32

BSH111

BSH111
Q2002

Q2002

HSYNC_DAC2_B

VSYNC_DAC2_B

+5V

R2005

R2005

2.2K

2.2K

402

DDCDATA_DAC2_5V DDCDATA_DAC2_R

R2006 33RR2006 33R

402

+5V

R2008

R2008

2.2K

2.2K

402 402

DDCCLK_DAC2_5V

R2010

R2010

R2011

R2011

R2009 33RR2009 33R

402

10R

10R

402

10R

10R

HSYNC_DAC2_R

VSYNC_DAC2_R

HPD1<3>

DDCCLK_DAC2_R

Q2021

Q2021

MMBT3904

MMBT3904

+3.3V

2 3

R2023

R2023
10K

10K

R2022 10KR2022 10K

1

T1X2M<3>
T1X2P<3>

T1X4M<3>
T1X4P<3>

T1X1M<3>
T1X1P<3>

T1X3M<3>
T1X3P<3>

T1X0M<3>
T1X0P<3>

T1X5M<3>
T1X5P<3>

T1XCP<3>
T1XCM<3>

DDCCLK_DAC2_R
DDCDATA_DAC2_R
VSYNC_DAC2_R

HPD_DVI1

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
HSYNC_DAC2_R

DB15 pin

Standard VGA

Monitor ID bit 0

11

Monitor ID bit 1

12

Monitor ID bit 2

4

Monitor ID bit 3

15

N/C

9

Mechanical Key
Hardware
Support

No Yes Yes No Yes

DDC1 Host
Monitor ID bit 0

Data from display
Monitor ID bit 2
Open
+5V
50mA min
1A max

DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max

DDC2AB Host
Monitor ID bit 0

SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max

Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997

+5V_VESA2

J2001

J2001

25

CASE

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

26

CASE#26

27

CASE#27

28

CASE#28

29

CASE#29

30

CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

DDC1/2 Display
Optional

SDA
Optional
SCL

Optional

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - DAC2/TMDS1

RH RV670 - DAC2/TMDS1

8

7

6

5

4

3

RH RV670 - DAC2/TMDS1

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

18 23

of

18 23

of

18 23

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

www.vinafix.vn

8

D D

7

6

5

4

3

2

1

A_DAC2_Y<3>

R3001

R3001
75R

75R

A_DAC2_C<3>

R3002

R3002
75R

75R

A_DAC2_COMP<3>

R3003

R3003
75R

75R

C C

L3001 470nH_250mAL3001 470nH_250mA

C3001

C3001
47pF_50V

47pF_50V

L3002 470nH_250mAL3002 470nH_250mA

C3002

C3002
47pF_50V

47pF_50V

L3003 470nH_250mAL3003 470nH_250mA

C3003

C3003
47pF_50V

47pF_50V

+3.3V

R3008

R3008
10K

10K

DAC2_Y_F
DAC2_C_F
DAC2_COMP_F

B B

GENERICA<7>

STV/HDTV#_DET PIN6

402 402

R3009 0RR3009 0R

DAC2_Y_F

C3004

C3004
47pF_50V

47pF_50V

DAC2_C_F

C3005

C3005
47pF_50V

47pF_50V

DAC2_COMP_F

C3006

C3006
47pF_50V

47pF_50V

TV Out

J3001

J3001

6

HDTV_OUT_DET#

3

Y-OUT

4

C-OUT

7

Comp_out

5

SYNC

1

GND

2

GND#2

8

Rpin5

CASE

9

CASE#9

10

CASE#10

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - TV OUT

RH RV670 - TV OUT

8

7

6

5

www.vinafix.vn

4

3

RH RV670 - TV OUT

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

19 23

of

19 23

of

19 23

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

8

+3.3V +3.3V

R4032

R4032

R4003

R4003

2.61K

2.61K

10K

10K

DDC3CLK<3>

DDC3DATA<3>

D D

TS_FDO<3>

R4001 100RR4001 100R
R4002 100RR4002 100R

Warning: TS_FDO is not 5V tolerant. MAX sink current 1.65mA

SCL_R
SDA_R
ThermINT

7

C4002

C4002

C4003

1uF_6.3V

1uF_6.3V

VDD

D+

C4003

100pF_50V

100pF_50V

D-

C4001

C4001
10uF_X6S

10uF_X6S

U4001

U4001

8

SMBCLK

7

SMBDAT

6

ALERT
GND5PWM

LM63CIMAX

LM63CIMAX

6

R4004

R4004

13.3K

13.3K

LM63_PWM

TS_FDO

GPU_DPLUS

C4004

C4004

2.2nF_50V

2.2nF_50V

GPU_DMINUS

1
2
3
4

R4006

R4006

R4007

R4007

GPU_DPLUS <3>

GPU_DMINUS <3>ThermINT<7>

33R

33R

33R

33R

PWM

5

For 4-WIRE FAN, Production

R4005 33RR4005 33R

1

+3.3V_BUS

2 3

R4030

R4030

5.1K

5.1K

Q4001

Q4001

MMBT3904

MMBT3904

4

+3.3V_BUS

R4036

R4036

DNI

10K

10K

R40311KR4031

1

Q4030

1K

Q4030
MMBT3904

MMBT3904

2 3

3

TACH Connection is for testing
and RPM measurement only

TACH

C4030

C4030
10nF

10nF

DNI

R4034 1KR4034 1K
R4033

R4033

3.83K

3.83K

2

+12V_BUS

B4001

B4001
26R_600mA

26R_600mA

C4009

C4009
1uF

R4035

R4035
10K

10K

1uF

J4030 is 2mm, and
it does not follow

2.54mm spacing as 4-wire
PWM Fan Specification

1

USE PN 4212047500G

4.7uF, 0805, 16V

C4008

C4008
1uF

1uF

4
3
2

J4030

J4030

1

1X4 3A 2MM

1X4 3A 2MM

For 2-WIRE FAN, Socket Board Only

32

TQ4010

TQ4010

SI2304DS

SI2304DS

TJ4010TJ4010

1
2

+12V_BUS

TR4011

TR4011
10K

10K

TR4010

TR4010

1

TQ4011

10K

If Critical Temperature is reached this will force the fan to run at full
speed while power is removed from GPU & rest of the board.

C C

This is an open collector signal. Active level is hard pull down to ground.

10K

TQ4011
MMBT3904

MMBT3904

2 3

TC4011

TC4011
1uF

1uF

0805
16V

1

B B

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Thermal Management

RH RV670 - Thermal Management

8

7

6

5

www.vinafix.vn

4

3

RH RV670 - Thermal Management

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Wednesday, March 19, 2008

Sheet

Sheet

Sheet

of

20 23

of

20 23

of

20 23

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

ASSY-SCREW2

ASSY-SCREW2

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

ASSY-SCREW1

ASSY-SCREW1

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY-SCREW3

ASSY-SCREW3

D D

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY1

ASSY1

ANTISTATIC

ANTISTATIC
BAG

BAG

6_X_11

6_X_11

C C

B B

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY-SCREW4

ASSY-SCREW4

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

BKT1

BKT1

BRACKET

BRACKET

8020038600G

8020038600G
BKT2

BKT2

BRACKET

BRACKET

80200386B0G

80200386B0G

BKT1: DVI - DIN -DVI
BKT2: DVI - DVI
ASSY-SCREW5 only for Slim-VGA with upper or lower tab bracket

J3

X_PIN1*2J3X_PIN1*2

ASSY-SCREW5

ASSY-SCREW5

SCREW

SCREW

SCREW

SCREW

J6

X_PIN1*2J6X_PIN1*2

X_PIN1*2J9X_PIN1*2

J9

X_PIN1*2

X_PIN1*2

J11

J11

4

MT1

MT1
MT_Hole_0.136 TM 5.5 BM 7.0

MT_Hole_0.136 TM 5.5 BM 7.0

SK1

SK1

Socket_RV670/M88L

Socket_RV670/M88L

FM1

FM1
SW_FB

SW_FB

1

FM2

FM2
SW_FB

SW_FB

1

FM3

FM3
SW_FB

SW_FB

1

J2

341

J7

341

2

impedenceJ7impedence

J4

341

2

impedenceJ4impedence

2

impedenceJ2impedence

J1

341

2

impedenceJ1impedence

PCB1

PCB1

109-B34031-00B

109-B34031-00B

1

1

1

FM4

FM4
SW_FB

SW_FB

FM5

FM5
SW_FB

SW_FB

FM6

FM6
SW_FB

SW_FB

3

PCB

PCB

2

1

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Mechanical

RH RV670 - Mechanical

5

4

www.vinafix.vn

3

2

RH RV670 - Mechanical

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, March 28, 2008

Friday, March 28, 2008

Friday, March 28, 2008

Sheet

Sheet

Sheet

of

21 23

of

21 23

of

21 23

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

RH PCIE RV670 512MB GDDR3 DUAL DL-DVI-I VO FH Thursday, March 13, 2008

RH PCIE RV670 512MB GDDR3 DUAL DL-DVI-I VO FH Thursday, March 13, 2008

RH PCIE RV670 512MB GDDR3 DUAL DL-DVI-I VO FH Thursday, March 13, 2008

REVISION HISTORY

REVISION HISTORY

REVISION HISTORY

D D

Sch

PCB

Sch

PCB

Sch

Rev

Rev

Rev

0

PCB

Rev

Rev

Rev

00A

Date

Date

Date

07/05/11

Initial design for RV670 GDDR3 (Revival) based on B339

4

NOTE:

NOTE:

NOTE:

3

Schematic No.

Schematic No.

Schematic No.

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.
For Stuffing options (component values, DNI , ? please consult the product specific BOM.

For Stuffing options (component values, DNI , ? please consult the product specific BOM.

For Stuffing options (component values, DNI , ? please consult the product specific BOM.
Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

REVISION DESCRIPTION

REVISION DESCRIPTION

REVISION DESCRIPTION

2

Date:

Date:

Date:

1

Rev

Rev

Rev

1

1

1

1 00B

C C

B B

07/08/1

(pg 1) Adding R1 and connecting switch #7 of TSW1. Some mother boards require B7 to be grounded. Table-1 updated accordingly
(pg 7) Adding R64 and MR64 to select HOT_PLUG_DET or ThermINT as the interrupt source.
(pg 13) Adding R1617, MR1617, R1616, Q1613, R1615, R1618, and R1619 as option to support hot plug detection of external cable.
(pg 13) Adding R1282, MR1282, R1283, MR1283, R1284, MR1284, R1281, R1285, Q1280, and C1280 as option for thermal protection for VDDC SMPS MOSFETs
(pg 13) Adding MC1603 (overlapped with C1603)
(pg 14) Adding D870 as option for power up sequencing
(pg 18) Adding heatsink symbol/footprint

(Layout) Increasing spacing between DDC4DATA & DDC4CLK going to U1270 to reduce the crosstalk

A A

5

4

www.vinafix.vn

3

2

1

5

4

3

2

1

MEMORY CHANNEL A & B

MEMORY CHANNEL C & D

GDDR3 4pcs 16M(8M)x32 256MB (128MB) GDDR3 4pcs 16M(8M)x32 256MB (128MB)

D D

External +12V

Connector

12V_EXT_DET
HOT_PLUG_DET

Debug

POWER REGULATORS

From +12V

+VDDC (MPVDD, VDDCI), +MVDD
(MVDDC, VDDR1/VDDRH)

From +12V LINEAR:

C C

B B

+5V, +5V_VESA,
+5V_VESA2,

From +12V DIRECT:

FAN

From +MVDD Linear (1.1V):

PCIE_VDDC, DPLL_VDDC
Option for VDDCI

From +3.3V:
Direct or Linear (1.8V)

VDD_CT, DPLL_PVDD, TPVDD,
T2PVDD, TXVDDR, T2XVDDR/
T2XVDDC, AVDD, VDD1DI,
VDD2DI, PCIE_VDDR, PCIE_PLL,
VDDR4, VDDR5
VDDR3, A2VDD
Option for VDDCI

+PCIE_SOURCE

+3.3V_BUS

3.3V_BUS
delayed circuit

SMPS Enable
Circuit

+12V_BUS

CrossFire
Interlink
Edge Finger

FAN
4-wire production
2-wire socket board

POWER DELIVERY

Connector

Straps

BIOS

Speed control
& temperature

sense

Buffer

Core Voltage Setting (VID0~3)

16-Bit 3-CH
ADC

Critical Temperature Fault

INTERRUPT
Temp. Sensing

Built-in PWM

CH A&B CH C&D

GPIO16
GPIO17

CrossFire

DVOCLK
DVPCNTL_[0..2]
DVPDATA[23:0]
DVP_MVP_CNTL[1:0]
GPIO[6:3]
GENERICB, DVALID

TMDS1

DL TMDS1

HPD1

DAC2

H/V2Sync

GPIO

ROM

Thermal

DDC3

GPIO17
D+/D-

TS_FDO

GPIO21
GPIO18
GPIO15
GPIO20

DDC4

GPIO19_CTF

RV670

XTALIN/OUT

Capture

GENERICA

TMDS2

DL TMDS2

HPD2
(GPIO14)

DAC1

H/VSync

PCI-Express

CRT2

DDC2

CRT1

DDC1

Shunt Resistors

HPD

&DVI-I

RGB Filters

TVO

Oscillator or Crystal

MPP

VIP

STV/HDTV#_OUT_DET

Shunt Resistors

TVO Filters

RGB Filters

Slim-VGA
Connector

TVO

Connector

HPD

DVI-I
Slim-VGA
Connector

&

+3.3V_BUS
+12V_BUS

PCI-Express Bus

RH PCIE RV670 512MB GDDR3
DUAL DL-DVI-I VO FH

REV 1

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV670 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV670 512MB GDDR3 DUAL DL-DVI-I VO FH

5

4

www.vinafix.vn

3

2

RH PCIE RV670 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, March 13, 2008

Thursday, March 13, 2008

Thursday, March 13, 2008

Sheet

Sheet

Sheet

of

23 23

of

23 23

of

23 23

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B