MSI MS-V138 Schematic 0a

8

7

6

5

4

3

2

1

PCI-EXPRESS EDGE CONNECTOR

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

D D

C C

B B

+12V_BUS+12V_BUS

C3

C3

C2

150nF_16V

150nF_16V

150nF_16VC2150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

LF CAP CER 150NF 10% 16V X7R (0603)

+3.3V_BUS

CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK

C4
10uF_X6SC410uF_X6S

+3.3V_BUS

C6

C5

1uF_6.3VC61uF_6.3V

100nF_6.3VC5100nF_6.3V

Place these caps as close to the PCIE
connector as possible

R10RR1

0R

PETn0_GFXRn0{2}

PETp1_GFXRp1{2}

C0
10nFC010nF

PETn1_GFXRn1{2}

PETp2_GFXRp2{2}
PETn2_GFXRn2{2}

PETp3_GFXRp3{2}
PETn3_GFXRn3{2}

PETp4_GFXRp4{2}
PETn4_GFXRn4{2}

PETp5_GFXRp5{2}
PETn5_GFXRn5{2}

PETp6_GFXRp6{2}
PETn6_GFXRn6{2}

PETp7_GFXRp7{2}
PETn7_GFXRn7{2}

PETp8_GFXRp8{2}
PETn8_GFXRn8{2}

PETp9_GFXRp9{2}
PETn9_GFXRn9{2}

PETp10_GFXRp10{2}
PETn10_GFXRn10{2}

PETp11_GFXRp11{2}
PETn11_GFXRn11{2}

PETp12_GFXRp12{2}
PETn12_GFXRn12{2}

PETp13_GFXRp13{2}
PETn13_GFXRn13{2}

PETp14_GFXRp14{2}
PETn14_GFXRn14{2}

PETp15_GFXRp15{2}
PETn15_GFXRn15{2}

PRESENCE

+3.3V_BUS

+12V_BUS

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

x16 PCIe

x16 PCIe

Mechanical Key

Mechanical Key

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

MPCIE1

MPCIE1

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

PRESENCE

+12V_BUS

JTDI
JTDO

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

+3.3V_BUS

100nF_6.3VC7100nF_6.3V

100nF_6.3VC9100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

R2 0RR2 0R

PERST#

PCIE_REFCLKP {2}

C7

C8
100nF_6.3VC8100nF_6.3V

C9

C10

C10
100nF_6.3V

100nF_6.3V

C11

C11

C12

C12
100nF_6.3V

100nF_6.3V

C13

C13

C14

C14
100nF_6.3V

100nF_6.3V

C15

C15

C16

C16
100nF_6.3V

100nF_6.3V

C17

C17

C18

C18
100nF_6.3V

100nF_6.3V

C19

C19

C20

C20
100nF_6.3V

100nF_6.3V

C21

C21

C22

C22
100nF_6.3V

100nF_6.3V

C23

C23

C24

C24
100nF_6.3V

100nF_6.3V

C25

C25

C26

C26
100nF_6.3V

100nF_6.3V

C27

C27

C28

C28
100nF_6.3V

100nF_6.3V

C29

C29

C30

C30
100nF_6.3V

100nF_6.3V

C31

C31

C32

C32
100nF_6.3V

100nF_6.3V

C33

C33

C34

C34
100nF_6.3V

100nF_6.3V

C35

C35

C36

C36
100nF_6.3V

100nF_6.3V

C37

C37

C38

C38
100nF_6.3V

100nF_6.3V

PCIE_REFCLKN {2}PETp0_GFXRp0{2}

GFXTp0_PERp0 {2}
GFXTn0_PERn0 {2}

GFXTp1_PERp1 {2}
GFXTn1_PERn1 {2}

GFXTp2_PERp2 {2}
GFXTn2_PERn2 {2}

GFXTp3_PERp3 {2}
GFXTn3_PERn3 {2}

GFXTp4_PERp4 {2}
GFXTn4_PERn4 {2}

GFXTp5_PERp5 {2}
GFXTn5_PERn5 {2}

GFXTp6_PERp6 {2}
GFXTn6_PERn6 {2}

GFXTp7_PERp7 {2}
GFXTn7_PERn7 {2}

GFXTp8_PERp8 {2}
GFXTn8_PERn8 {2}

GFXTp9_PERp9 {2}
GFXTn9_PERn9 {2}

GFXTp10_PERp10 {2}
GFXTn10_PERn10 {2}

GFXTp11_PERp11 {2}
GFXTn11_PERn11 {2}

GFXTp12_PERp12 {2}
GFXTn12_PERn12 {2}

GFXTp13_PERp13 {2}
GFXTn13_PERn13 {2}

GFXTp14_PERp14 {2}
GFXTn14_PERn14 {2}

GFXTp15_PERp15 {2}
GFXTn15_PERn15 {2}

+3.3V

53

1
2

R_RST

R3 0RR3 0R

C39

C39
100nF_6.3V

100nF_6.3V

NC7SZ08P5X_NL

NC7SZ08P5X_NL

4

U5

U5

DNI

Place R3 in U5

PERST#_buf {2}

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - PCI-E Edge Connector

RH RV670 - PCI-E Edge Connector

8

7

6

5

www.vinafix.vn

4

3

RH RV670 - PCI-E Edge Connector

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

121

of

121

of

121

GROUND

BUO BRING UP

ONLY

Doc No.

Doc No.

Doc No.

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

1

RevDate:

RevDate:

RevDate:

1

1

1

5

D D

NOTE: some of the PCIE testpoints will
be available trought via on traces.

PETp0_GFXRp0{1}
PETn0_GFXRn0{1}

PETp1_GFXRp1{1}
PETn1_GFXRn1{1}

PETp2_GFXRp2{1}
PETn2_GFXRn2{1}

PETp3_GFXRp3{1}
PETn3_GFXRn3{1}

PETp4_GFXRp4{1}
PETn4_GFXRn4{1}

PETp5_GFXRp5{1}
PETn5_GFXRn5{1}

PETp6_GFXRp6{1}

C C

B B

PCIE_REFCLKP{1}
PCIE_REFCLKN{1}

PETn6_GFXRn6{1}

PETp7_GFXRp7{1}
PETn7_GFXRn7{1}

PETp8_GFXRp8{1}

PETp9_GFXRp9{1}
PETn9_GFXRn9{1}

PETp10_GFXRp10{1}
PETn10_GFXRn10{1}

PETp11_GFXRp11{1}
PETn11_GFXRn11{1}

PETp12_GFXRp12{1}
PETn12_GFXRn12{1}

PETp13_GFXRp13{1}
PETn13_GFXRn13{1}

PETp14_GFXRp14{1}
PETn14_GFXRn14{1}

PETp15_GFXRp15{1}
PETn15_GFXRn15{1}

DNI DNI

R13

R13

R14

R14

51R

51R

51R

51R

402 402

TP11TP11

TP12TP12

TP13TP13

TP14TP14

TP19TP19

TP20TP20

TP21TP21

TP22TP22

TP27TP27

TP28TP28

4

U1A

TP7TP7

TP8TP8

TP9TP9

TP10TP10

TP15TP15

TP16TP16

TP17TP17

TP18TP18

TP23TP23

TP24TP24

TP25TP25

TP26TP26

U1A

AW48

PCIE_RX0P

AW46

PCIE_RX0N

AV51

PCIE_RX1P

AV49

PCIE_RX1N

AU48

PCIE_RX2P

AU46

PCIE_RX2N

AT51

PCIE_RX3P

AT49

PCIE_RX3N

AR48

PCIE_RX4P

AR46

PCIE_RX4N

AP51

PCIE_RX5P

AP49

PCIE_RX5N

AN48

PCIE_RX6P

AN46

PCIE_RX6N

AM51

PCIE_RX7P

AM49

PCIE_RX7N

AL48

PCIE_RX8P

AL46

PCIE_RX8N

AK51

PCIE_RX9P

AK49

PCIE_RX9N

AJ48

PCIE_RX10P

AJ46

PCIE_RX10N

AH51

PCIE_RX11P

AH49

PCIE_RX11N

AG48

PCIE_RX12P

AG46

PCIE_RX12N

AF51

PCIE_RX13P

AF49

PCIE_RX13N

AE48

PCIE_RX14P

AE46

PCIE_RX14N

AD51

PCIE_RX15P

AD49

PCIE_RX15N

AW43

PCIE_REFCLKP

AW42

PCIE_REFCLKN

PERST#_buf{1}

AP36

PERSTB

Clock

Clock

PART 1 OF 10

PART 1 OF 10

P

P
C

C
I

I

-

­E

E
X

X
P

P
R

R
E

E
S

S
S

S

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

Calibration

Calibration

PCIE_CALRN
PCIE_CALRP

3

AU40
AU39

AU43
AU42

AT40
AT39

AT43
AT42

AP40
AP39

AP43
AP42

AN40
AN39

AN43
AN42

AL40
AL39

AL43
AL42

AK40
AK39

AK43
AK42

AH40
AH39

AH43
AH42

AG40
AG39

AG43
AG42

+PCIE_VDDC

402

AN37
AP37

R82.0K R82.0K

402

R91.27K R91.27K

2

GFXTp0_PERp0 {1}
GFXTn0_PERn0 {1}

GFXTp1_PERp1 {1}
GFXTn1_PERn1 {1}

GFXTp2_PERp2 {1}
GFXTn2_PERn2 {1}

GFXTp3_PERp3 {1}
GFXTn3_PERn3 {1}

GFXTp4_PERp4 {1}
GFXTn4_PERn4 {1}

GFXTp5_PERp5 {1}
GFXTn5_PERn5 {1}

GFXTp6_PERp6 {1}
GFXTn6_PERn6 {1}

GFXTp7_PERp7 {1}
GFXTn7_PERn7 {1}

GFXTp8_PERp8 {1}
GFXTn8_PERn8 {1}PETn8_GFXRn8{1}

GFXTp9_PERp9 {1}
GFXTn9_PERn9 {1}

GFXTp10_PERp10 {1}
GFXTn10_PERn10 {1}

GFXTp11_PERp11 {1}
GFXTn11_PERn11 {1}

GFXTp12_PERp12 {1}
GFXTn12_PERn12 {1}

GFXTp13_PERp13 {1}
GFXTn13_PERn13 {1}

GFXTp14_PERp14 {1}
GFXTn14_PERn14 {1}

GFXTp15_PERp15 {1}
GFXTn15_PERn15 {1}

1

For Tektronix LA only

Place close
to ASIC

A A

5

4

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

www.vinafix.vn

3

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC PCIE_Interface

RH RV670 - ASIC PCIE_Interface

2

RH RV670 - ASIC PCIE_Interface

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

221

of

221

of

221

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

Place close to ASIC

NS100

NS100

NS_VIA

NS_VIA

1 2

GND_T2PVSS

C103

C103

10uF_X6S

10uF_X6S

DDC3CLK{18}

R71KR7
1K

DNI

R106 100RR106 100R

R100 100RR100 100R

R101 100RR101 100R

R102 100RR102 100R

R103 100RR103 100R

R104 100RR104 100R

R105 100RR105 100R

C100

C100

10uF_X6S

10uF_X6S

C106

C106

1uF_6.3V

1uF_6.3V

+3.3V

R40

R40

4.7K

4.7K

+1.8V

R43 221RR43 221R
R44 110RR44 110R

C46 100nF_6.3VC46 100nF_6.3V

C102

C102

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

R41

R41

4.7K

4.7K

402 402

C108

C108

TP42TP42

T2XCM
T2XCP

T2X0M
T2X0P

T2X1M
T2X1P

T2X2M
T2X2P

T2X3M
T2X3P

T2X4M
T2X4P

T2X5M
T2X5P

C101

C101

100nF_6.3V

100nF_6.3V

C109

C109

100nF_6.3V

100nF_6.3V

DDC1DATA{15}

DDC2DATA{16}

DDC4DATA
DDC4CLK

GPU_DMINUS{18}
GPU_DPLUS{18}

TS_FDO{18}

DDC1CLK{15}

DDC2CLK{16}

DDC3DATA
DDC3CLK

PLL_TEST
TEST_EN

D D

+1.8V

B102

B102

BLM15BD121SN1

BLM15BD121SN1

Q100

Q100

SI2304DS

SI2304DS

C C

LVT_EN{13}

B B

A A

1

+3.3V

TR40

TR40

4.7K

4.7K

402 402

BUO BUO

I2C DEVICE ADDRESS

DEVICE
LM63
ADS1112

C82

C82

12pF_50V

12pF_50V

C83

C83

12pF_50V

12pF_50V

32

TR41

TR41

4.7K

4.7K

2 1

Y82

Y82

27.000MHz_10PPM

27.000MHz_10PPM

T2XCM{15}
T2XCP{15}

T2X0M{15}

T2X0P{15}

T2X1M{15}

T2X1P{15}

T2X2M{15}

T2X2P{15}

T2X3M{15}

T2X3P{15}

T2X4M{15}

T2X4P{15}

T2X5M{15}

T2X5P{15}

+T2PVDD

+T2XVDD

B100

B100

26R_600mA

26R_600mA

Use 0R

ADDRESS
1001 100 (R/W#) --> DDC3
1001 000 (R/W#) --> DDC4 BUO

R841MR84
1M

DDC3DATA{18}

4

U1B

U1B

Integrated TMDS2

Integrated TMDS2

BH35

T2XCM

BF35

T2XCP

BL36

T2X0M

BJ36

T2X0P

BH37

T2X1M

BF37

T2X1P

BL38

T2X2M

BJ38

T2X2P

BH39

T2X3M

BF39

T2X3P

BH41

T2X4M

BF41

T2X4P

BL42

T2X5M

BJ42

T2X5P

BL44

TXOUT_U2N

BJ44

TXOUT_U2P

BL46

TXOUT_U3N

BJ46

TXOUT_U3P

BJ40

TXCLK_UP

BL40

TXCLK_UN

BE38

LPVDD

BE40

LPVSS

BG34

LVDDC1

BK35

LVDDC2

BL34

LVDDR1

BJ34

LVDDR2

BE36

LVSSR1

BE42

LVSSR2

BL49

LVSSR3

BG36

LVSSR4

BG38

LVSSR5

BG40

LVSSR6

BG42

LVSSR7

BF44

LVSSR8

BK37

LVSSR9

BK39

LVSSR10

BK41

LVSSR11

BB45

DDC1DATA

BB47

DDC1CLK

AV36

DDC2DATA

AW36

DDC2CLK

AU32

DDC3DATA

AT32

DDC3CLK

AV35

DDC4DATA

AW35

DDC4CLK

VREFG

BB29

HPD1

AV27

SDA

AV29

SCL

BC27

DMINUS

BB27

DPLUS

AT21

TS_FDO

AU36

PLLTEST

AT37

TESTEN

AT20

VREFG

BJ49

XTALIN

BF46

XTALOUT

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

HPD1{16}

XTALIN
XTALOUT

Monitor Interface

Monitor Interface

MMI2C

MMI2C

Thermal

Thermal
Diode

Diode

Test

Test

PART 2 OF 10

PART 2 OF 10

V

V
I

I
D

D
E

E
O

O

&

&

M

M
U

U
L

L
T

T
I

I
M

M
E

E
D

D
I

I
A

A

Integrated TMDS

Integrated TMDS

TXVDDR1
TXVDDR2
TXVDDR3
TXVDDR4

TXVSSR1
TXVSSR2
TXVSSR3
TXVSSR4
TXVSSR5
TXVSSR6
TXVSSR7
TXVSSR8
TXVSSR9

TXVSSR10

DAC / CRT

DAC / CRT

DAC2 (TV/CRT2)

DAC2 (TV/CRT2)

H2SYNC

A2VDDQ

TXCAM
TXCAP

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TX3M

TX3P

TX4M

TX4P

TX5M

TX5P

TPVDD
TPVSS

TXCBM
TXCBP

HSYNC

VSYNC

RSET
AVDD

AVSSQ

VDD1DI
VSS1DI

V2SYNC

COMP

R2SET

A2VSSQ

VDD2DI
VSS2DI

A2VDD

NC_1
NC_2

NC_3
NC_4
NC_5
NC_6
NC_7

BL26
BJ26

BH27
BF27

BL28
BJ28

BH29
BF29

BH31
BF31

BL32
BJ32

BH33
BF33

BL24
BJ24

BL30
BJ30

BE26
BF25
BH25
BK25

BE28
BE30
BG26
BG28
BG30
BG32
BK27
BK29
BK31
BK33

BB49

R

BB51

RB

BD49

G

BD51

GB

BF49

B

BF51

BB

BA42
BA43

BB43
BD46
BD44

BA50
BA48

BA39

R2

AY39

R2B

BC39

G2

BB39

G2B

BC37

B2

BB37

B2B

BA36
AY36

AY37

Y

BA37

C

AW37

BA40

BC42
BB41

BC36
BB36

BC41
BC40

BB40
BB32

BE34
BC33
BC32
BE32

3

T1XCM
T1XCP

T1X0M
T1X0P

T1X1M
T1X1P

T1X2M
T1X2P

T1X3M
T1X3P

T1X4M
T1X4P

T1X5M
T1X5P

C111

C111

C112

C112

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C115

C115

C116

C116

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C2021

C2021
100nF_6.3V

100nF_6.3V

C2024

C2024
10nF

10nF

C2031

C2031
100nF_6.3V

100nF_6.3V

C1023

C1023
10nF

10nF

GND_AVSSQRSET

DNI

C2025

C2025
100nF_6.3V

100nF_6.3V

C2032

C2032
1uF_6.3V

1uF_6.3V

C1024

C1024
100nF_6.3V

100nF_6.3V

C2022

C2022
1uF_6.3V

1uF_6.3V

C2026

C2026
1uF_6.3V

1uF_6.3V

GND_VSS2DI

R1030 499RR1030 499R

R2SET GND_A2VSSQ

R2030 715RR2030 715R

C2030

C2030
10nF

10nF

C113

C113
10uF_X6S

10uF_X6S

C117

C117
10uF_X6S

10uF_X6S

C1025

C1025
1uF_6.3V

1uF_6.3V

NS2021 NS_VIANS2021 NS_VIA

C2033

C2033

4.7uF_6.3V

4.7uF_6.3V

GND_TPVSS

A_DAC1_R {15}
A_DAC1_RB {15}

A_DAC1_G {15}
A_DAC1_GB {15}

A_DAC1_B {15}
A_DAC1_BB {15}

HSYNC1 {7,15}
VSYNC1 {7,15}

GND_AVSSQ

C1020

C1020

C1021

C1021
100nF_6.3V

100nF_6.3V

10nF

10nF

A_DAC2_R {16}
A_DAC2_RB {16}

A_DAC2_G {16}
A_DAC2_GB {16}

A_DAC2_B {16}
A_DAC2_BB {16}

HSYNC2 {7,16}
VSYNC2 {7,16}

A_DAC2_Y {17}
A_DAC2_C {17}
A_DAC2_COMP {17}

GND_A2VSSQ

+VDD2DI

12

Place close to ASIC

R116 182RR116 182R

DNI

R110 182RR110 182R

R111 182RR111 182R

R112 182RR112 182R

R113 182RR113 182R

R114 182RR114 182R

R115 182RR115 182R

NS110

NS110
NS_VIA

NS_VIA

12

+AVDD

C1022

C1022
1uF_6.3V

1uF_6.3V

+VDD1DI

NS1021 NS_VIANS1021 NS_VIA

GND_VSS1DI

+A2VDDQ

NS2020 NS_VIANS2020 NS_VIA

GND_A2VSSQ

+A2VDD

+TPVDD

+TXVDDR

NS1020 NS_VIANS1020 NS_VIA

12

12

GND_AVSSQ

2

T1XCM {16}
T1XCP {16}

T1X0M {16}
T1X0P {16}

T1X1M {16}
T1X1P {16}

T1X2M {16}
T1X2P {16}

T1X3M {16}
T1X3P {16}

T1X4M {16}
T1X4P {16}

T1X5M {16}
T1X5P {16}

B112

B112

BLM15BD121SN1

BLM15BD121SN1

B110

B110

26R_600mA

26R_600mA

B1020

B1020

BLM15BD121SN1

BLM15BD121SN1

12

BLM15BD121SN1

BLM15BD121SN1

B2020

B2020

BLM15BD121SN1

BLM15BD121SN1

B2021

B2021

BLM15BD121SN1

BLM15BD121SN1

B2030

B2030

BLM15BD121SN1

BLM15BD121SN1

B1021

B1021

1

+1.8V

+3.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC MAIN

RH RV670 - ASIC MAIN

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC MAIN

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

321

of

321

of

321

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

C151

C151
1uF_6.3V

1uF_6.3V

C133

C133
1uF_6.3V

1uF_6.3V

C141

C141
1uF_6.3V

1uF_6.3V

C981

C981
1uF_6.3V

1uF_6.3V

C961

C961
1uF_6.3V

1uF_6.3V

C972

C972
100nF_6.3V

100nF_6.3V

B94

B94

BLM15BD121SN1

BLM15BD121SN1

BLM15BD121SN1

BLM15BD121SN1

NS70 NS_VIANS70 NS_VIA

1 2

GND_PVSS

B60

B60
BLM15BD121SN1

BLM15BD121SN1

5

C152

C152
1uF_6.3V

1uF_6.3V

C135

C135
1uF_6.3V

1uF_6.3V

C142

C142
1uF_6.3V

1uF_6.3V

C962

C962
1uF_6.3V

1uF_6.3V

MC955

MC955

4.7uF_6.3V

4.7uF_6.3V

C956

C956
10uF_X6S

10uF_X6S

C121

C121
1uF_6.3V

1uF_6.3V

Use 0R

B69

B69

MB67

MB67

220R_2A

220R_2A

B67

B67

220R_2A

220R_2A
NS64 NS_VIANS64 NS_VIA

1 2

GND_MPVSS

C153

C153
1uF_6.3V

1uF_6.3V

C143

C143
1uF_6.3V

1uF_6.3V

C982

C982
1uF_6.3V

1uF_6.3V

C963

C963
1uF_6.3V

1uF_6.3V

C973

C973
100nF_6.3V

100nF_6.3V

MC956

MC956

4.7uF_6.3V

4.7uF_6.3V

C958

C958
10uF_X6S

10uF_X6S

NS122 NS_VIANS122 NS_VIA

+DPLL_PVDD

DNI

C136

C136
1uF_6.3V

1uF_6.3V

C983

C983
1uF_6.3V

1uF_6.3V

C964

C964
1uF_6.3V

1uF_6.3V

C974

C974
100nF_6.3V

100nF_6.3V

1 2

GND_VSSRHC

+3.3V

+DPLL_VDDC

GND_PVSS

GND_MPVSS

GND_MPVSS

C154

C154
1uF_6.3V

1uF_6.3V

C144

C144
1uF_6.3V

1uF_6.3V

C984

C984
1uF_6.3V

1uF_6.3V

MC958

MC958

4.7uF_6.3V

4.7uF_6.3V

C959

C959
10uF_X6S

10uF_X6S

+MPVDD

C155

C155
1uF_6.3V

1uF_6.3V

C138

C138
1uF_6.3V

1uF_6.3V

C145

C145
1uF_6.3V

1uF_6.3V

C985

C985
1uF_6.3V

1uF_6.3V

C965

C965
1uF_6.3V

1uF_6.3V

C130

C130
100nF_6.3V

100nF_6.3V

MC959

MC959

4.7uF_6.3V

4.7uF_6.3V

C126

C126
10uF_X6S

10uF_X6S

NS123 NS_VIANS123 NS_VIA

1 2

GND_VSSRHD

C91

C91
100nF_6.3V

100nF_6.3V

+VDDR_DVP

C60

C60
10uF_X6S

10uF_X6S

C62

C62
10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

C156

C156
1uF_6.3V

1uF_6.3V

C139

C139
1uF_6.3V

1uF_6.3V

C146

C146
1uF_6.3V

1uF_6.3V

C986

C986
1uF_6.3V

1uF_6.3V

C967

C967

C966

C966

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C131

C131
100nF_6.3V

100nF_6.3V

MC126

MC126

4.7uF_6.3V

4.7uF_6.3V

C127

C127
10uF_X6S

10uF_X6S

NS120 NS_VIANS120 NS_VIA

1 2
GND_VSSRHA

C122

C122
1uF_6.3V

1uF_6.3V

C92

C92
100nF_6.3V

100nF_6.3V

C94

C94
10uF_X6S

10uF_X6S

C68

C68
1uF_6.3V

1uF_6.3V

C64

C64
10nF

10nF

C67

C67

1uF_6.3V

1uF_6.3V

C157

C157
1uF_6.3V

1uF_6.3V

C975

C975

C976

C976

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C148

C148

C147

C147

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C987

C987
1uF_6.3V

1uF_6.3V

C968

C968
1uF_6.3V

1uF_6.3V

C134

C134
100nF_6.3V

100nF_6.3V

MC127

MC127

4.7uF_6.3V

4.7uF_6.3V

Overlapped Footprints

C128

C128
10uF_X6S

10uF_X6S

C120

C120

1uF_6.3V

1uF_6.3V

C123

C123
1uF_6.3V

1uF_6.3V

C93

C93
100nF_6.3V

100nF_6.3V

C95

C95
1uF_6.3V

1uF_6.3V

C69

C69
100nF_6.3V

100nF_6.3V

C61

C61
100nF_6.3V

100nF_6.3V

C66

C66

C988

C988
1uF_6.3V

1uF_6.3V

C137

C137
100nF_6.3V

100nF_6.3V

+DPLL_PVDD

GND_PVSS

+DPLL_VDDC

C63

C63
1uF_6.3V

1uF_6.3V

C65

C65

100nF_6.3V

100nF_6.3V

+MVDD

C150

C150
1uF_6.3V

1uF_6.3V

C132

C132
1uF_6.3V

1uF_6.3V

D D

C C

B B

A A

+MVDD

C140

C140
1uF_6.3V

1uF_6.3V

C980

C980
1uF_6.3V

1uF_6.3V

C960

C960
1uF_6.3V

1uF_6.3V

C971

C971
100nF_6.3V

100nF_6.3V

MC954

MC954

4.7uF_6.3V

4.7uF_6.3V

C954

C954
10uF_X6S

10uF_X6S

B120

B120

B121

B121

BLM15BD121SN1

BLM15BD121SN1

NS121 NS_VIANS121 NS_VIA

1 2

GND_VSSRHB

B122

B122

BLM15BD121SN1

BLM15BD121SN1

B123

B123

BLM15BD121SN1

BLM15BD121SN1

+1.8V

+1.1V

+VDDCI_LDO

+VDDC

C955

C955
10uF_X6S

10uF_X6S

BLM15BD121SN1

BLM15BD121SN1

C158

C158
1uF_6.3V

1uF_6.3V

C977

C977
1uF_6.3V

1uF_6.3V

C149

C149
1uF_6.3V

1uF_6.3V

C969

C969
1uF_6.3V

1uF_6.3V

MC128

MC128

4.7uF_6.3V

4.7uF_6.3V

C97

C97
100nF_6.3V

100nF_6.3V

+MPVDD

C159

C159
1uF_6.3V

1uF_6.3V

C989

C989
1uF_6.3V

1uF_6.3V

+VDDRHA

+VDDRHB

C96

C96
1uF_6.3V

1uF_6.3V

4

C978

C978
1uF_6.3V

1uF_6.3V

C979

C979
1uF_6.3V

1uF_6.3V

C970

C970
1uF_6.3V

1uF_6.3V

+VDDRHC

+VDDRHD

C98

C98
100nF_6.3V

100nF_6.3V

U1G

U1G

G14

VDDR1#1

G18

VDDR1#2

G22

VDDR1#3

G26

VDDR1#4

G30

VDDR1#5

R34

VDDR1#6

G40

VDDR1#7

T15

VDDR1#8

M26

VDDR1#9

AD15

VDDR1#10

P29

VDDR1#11

L38

VDDR1#12

M39

VDDR1#13

L10

VDDR1#14

N19

VDDR1#15

M32

VDDR1#16

N16

VDDR1#17

P25

VDDR1#18

K35

VDDR1#19

P7

VDDR1#20

T19

VDDR1#21

R22

VDDR1#22

K43

VDDR1#23

P41

VDDR1#24

P45

VDDR1#25

T12

VDDR1#26

V38

VDDR1#27

U40

VDDR1#28

V7

VDDR1#29

V45

VDDR1#30

AA14

VDDR1#31

AB45

VDDR1#32

AA40

VDDR1#33

AB7

VDDR1#34

W15

VDDR1#35

AD43

VDDR1#36

AC37

VDDR1#37

AB10

VDDR1#38

AE13

VDDR1#39

AF7

VDDR1#40

AH11

VDDR1#41

AF15

VDDR1#42

AK7

VDDR1#43

AL13

VDDR1#44

AP7

VDDR1#45

AP12

VDDR1#46

BC14

VDDR1#47

AU11

VDDR1#48

AV7

VDDR1#49

BA10

VDDR1#50

AW14

VDDR1#51

AT15

VDDR1#52

V42

VDDRHA

V41

VSSRHA

L31

VDDRHB

L29

VSSRHB

W12

VDDRHC

W11

VSSRHC

AM12

VDDRHD

AM11

VSSRHD

AT26

VDDR3#1

AT27

VDDR3#2

AT29

VDDR3#3

AT30

VDDR3#4

BF23

VDDR4#1

BH23

VDDR4#2

BK23

VDDR4#3

BE22

VDDR5#1

BG22

VDDR5#2

BJ22

VDDR5#3

BA35

DPLL_PVDD

BB35

DPLL_PVSS

BC35

DPLL_VDDC

T22

MPVDD

T23

MPVSS

Y19

NC_15

W20

NC_16

W19

NC_17

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 7 OF 10

Part 7 OF 10

Memory I/O

Memory I/O

P

P
O

O
W

W
E

E
R

R

PCIE_PVDD

PCIE_VDDC1
PCIE_VDDC2
PCIE_VDDC3
PCIE_VDDC4
PCIE_VDDC5
PCIE_VDDC6
PCIE_VDDC7
PCIE_VDDC8

PCIE_VDDC9
PCIE_VDDC10
PCIE_VDDC11
PCIE_VDDC12

PCIE_VDDR1

PCIE_VDDR2

PCIE_VDDR3

PCIE_VDDR4

PCI-Express

PCI-Express

PCIE_VDDR5

PCIE_VDDR6

PCIE_VDDR7

PCIE_VDDR8

Core

Core

VDDC0
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8

VDDC9
VDDC10
VDDC11
VDDC12
VDDC13
VDDC14
VDDC15
VDDC16
VDDC17
VDDC18
VDDC19
VDDC20
VDDC21
VDDC22
VDDC23
VDDC24
VDDC25
VDDC26
VDDC27
VDDC28
VDDC29
VDDC30
VDDC31
VDDC32
VDDC33
VDDC34
VDDC35
VDDC36
VDDC37
VDDC38
VDDC39
VDDC40
VDDC41
VDDC42
VDDC43
VDDC44
VDDC45
VDDC46
VDDC47
VDDC48
VDDC49
VDDC50
VDDC51
VDDC52
VDDC53
VDDC54
VDDC55
VDDC56
VDDC57
VDDC58
VDDC59
VDDC60
VDDC61
VDDC62
VDDC63
VDDC64
VDDC65
VDDC66
VDDC67
VDDC68
VDDC69
VDDC70
VDDC71
VDDC72
VDDC73
VDDC74

VDDCI1
VDDCI2
VDDCI3
VDDCI4
VDDCI5
VDDCI6
VDDCI7
VDDCI8

VDD_CT1
VDD_CT2
VDD_CT3

3

AY51
AF36

AF37
AG36
AG37
AH36
AH37
AK36
AK37
AL36
AL37
AN36
AF38

AW40
AW41
AY41
AY42
AY43
AY45
AY47
BA46

AM19
W26
W28
W31
W33
Y25
Y27
Y30
Y32
AA24
AA26
AA28
AA31
AA33
AB22
AB25
AB27
AB30
AB32
AD21
AD24
AD26
AD28
AD31
AD33
AE20
AE22
AE25
AE27
AE30
AE32
AF19
AF21
AF24
AF26
AF28
AF31
AF33
AG20
AG22
AG25
AG27
AG30
AG32
AH19
AH21
AH24
AH26
AH28
AH31
AH33
AK20
AK22
AK25
AK27
AK30
AK32
AL19
AL21
AL24
AL26
AL28
AL31
AL33
AM22
AM25
AM27
AM30
AM32
AN21
AN24
AN26
AN28
AN31
AN33

W21
W24
Y20
Y22
AA19
AA21
AB20
AD19

BG14
BJ14
BL14

C161

C161
1uF_6.3V

1uF_6.3V

C171

C171
1uF_6.3V

1uF_6.3V

C1125

C1125
10uF_X6S

10uF_X6S

C1102

C1102
1uF_6.3V

1uF_6.3V

C1111

C1111
1uF_6.3V

1uF_6.3V

C911

C911
1uF_6.3V

1uF_6.3V

C78

C78
100nF_6.3V

100nF_6.3V

C900

C900
1uF_6.3V

1uF_6.3V

C940

C940
1uF_6.3V

1uF_6.3V

MC1125

MC1125

4.7uF_6.3V

4.7uF_6.3V

C162

C162
1uF_6.3V

1uF_6.3V

C172

C172
1uF_6.3V

1uF_6.3V

C941

C941
1uF_6.3V

1uF_6.3V

C1136

C1136
10uF_X6S

10uF_X6S

MC1136

MC1136

4.7uF_6.3V

4.7uF_6.3V

C1103

C1103
1uF_6.3V

1uF_6.3V

C1112

C1112
1uF_6.3V

1uF_6.3V

C1123

C1123
100nF_6.3V

100nF_6.3V

C913

C913
1uF_6.3V

1uF_6.3V

C79

C79
100nF_6.3V

100nF_6.3V

C930

C930
10nF

10nF

C920

C920
1uF_6.3V

1uF_6.3V

C901

C901
100nF_6.3V

100nF_6.3V

C163

C163
1uF_6.3V

1uF_6.3V

C173

C173
1uF_6.3V

1uF_6.3V

C1104

C1104
1uF_6.3V

1uF_6.3V

C1114

C1114
1uF_6.3V

1uF_6.3V

C77

C77
1uF_6.3V

1uF_6.3V

C931

C931
100nF_6.3V

100nF_6.3V

C921

C921
1uF_6.3V

1uF_6.3V

C902

C902
1uF_6.3V

1uF_6.3V

C946

C946
1uF_6.3V

1uF_6.3V

C1137

C1137
10uF_X6S

10uF_X6S

MC1137

MC1137

4.7uF_6.3V

4.7uF_6.3V

C180

C180
100nF_6.3V

100nF_6.3V

C914

C914
100nF_6.3V

100nF_6.3V

C164

C164
1uF_6.3V

1uF_6.3V

C174

C174
1uF_6.3V

1uF_6.3V

C1115

C1115
1uF_6.3V

1uF_6.3V

+PCIE_PVDD

C932

C932
10uF_X6S

10uF_X6S

C922

C922
1uF_6.3V

1uF_6.3V

C903

C903
1uF_6.3V

1uF_6.3V

C165

C165
1uF_6.3V

1uF_6.3V

C175

C175
1uF_6.3V

1uF_6.3V

C948

C948
1uF_6.3V

1uF_6.3V

C1138

C1138
10uF_X6S

10uF_X6S

MC1138

MC1138

4.7uF_6.3V

4.7uF_6.3V

Overlapped Footprints

C1100

C1100

C1107

C1107

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C1116

C1116
1uF_6.3V

1uF_6.3V

C942

C942
100nF_6.3V

100nF_6.3V

C915

C915
100nF_6.3V

100nF_6.3V

B76

B76

+VDD_CT

C76

C76

BLM15BD121SN1

BLM15BD121SN1

1uF_6.3V

1uF_6.3V

C933

C933
1uF_6.3V

1uF_6.3V

C923

C923
1uF_6.3V

1uF_6.3V

C904

C904
100nF_6.3V

100nF_6.3V

C166

C166
1uF_6.3V

1uF_6.3V

C176

C176
1uF_6.3V

1uF_6.3V

C1139

C1139
10uF_X6S

10uF_X6S

MC1139

MC1139

4.7uF_6.3V

4.7uF_6.3V

C1117

C1117
1uF_6.3V

1uF_6.3V

C1113

C1113
100nF_6.3V

100nF_6.3V

C918

C918

4.7uF_6.3V

4.7uF_6.3V

+1.8V

2

C949

C949
1uF_6.3V

1uF_6.3V

C1121

C1121
1uF_6.3V

1uF_6.3V

C924

C924
1uF_6.3V

1uF_6.3V

C905

C905
1uF_6.3V

1uF_6.3V

C167

C167
1uF_6.3V

1uF_6.3V

C177

C177
1uF_6.3V

1uF_6.3V

C182

C182
10uF_X6S

10uF_X6S

MC182

MC182

4.7uF_6.3V

4.7uF_6.3V

C947

C947
100nF_6.3V

100nF_6.3V

C919

C919
10uF_X6S

10uF_X6S

B930

B930

BLM15BD121SN1

BLM15BD121SN1

C925

C925
1uF_6.3V

1uF_6.3V

C906

C906
1uF_6.3V

1uF_6.3V

C168

C168
1uF_6.3V

1uF_6.3V

C179

C179
1uF_6.3V

1uF_6.3V

C183

C183
10uF_X6S

10uF_X6S

C1122

C1122
1uF_6.3V

1uF_6.3V

C1110

C1110
1uF_6.3V

1uF_6.3V

+1.8V

C907

C907

4.7uF_6.3V

4.7uF_6.3V

C169

C169
1uF_6.3V

1uF_6.3V

C186

C186
1uF_6.3V

1uF_6.3V

MC183

MC183

4.7uF_6.3V

4.7uF_6.3V

C1127

C1127
1uF_6.3V

1uF_6.3V

C1130

C1130
1uF_6.3V

1uF_6.3V

C178

C178
100nF_6.3V

100nF_6.3V

C926

C926
10uF_X6S

10uF_X6S

C170

C170
1uF_6.3V

1uF_6.3V

C1133

C1133
1uF_6.3V

1uF_6.3V

+PCIE_VDDC

C185

C185
1uF_6.3V

1uF_6.3V

MC187

MC187

4.7uF_6.3V

4.7uF_6.3V

C1128

C1128
1uF_6.3V

1uF_6.3V

C1131

C1131
100nF_6.3V

100nF_6.3V

+PCIE_VDDR

C160

C160
1uF_6.3V

1uF_6.3V

C1132

C1132
1uF_6.3V

1uF_6.3V

B920 220R_2AB920 220R_2A

B900

B900

26R_600mA

26R_600mA

C184

C184
1uF_6.3V

1uF_6.3V

MC181

MC181

4.7uF_6.3V

4.7uF_6.3V

+VDDC

C1129

C1129
1uF_6.3V

1uF_6.3V

C1134

C1134
1uF_6.3V

1uF_6.3V

C943

C943
100nF_6.3V

100nF_6.3V

+VDDCI

See BOM for qualified option

1

+1.8V

+VDDC

MR9100RMR910
0R
MR9110RMR911
0R

B911 220R_2AB911 220R_2A

B910 220R_2AB910 220R_2A

+1.1V

+VDDCI_LDO

+VDDC

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

5

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Power

RH RV670 - ASIC Power

4

www.vinafix.vn

3

2

RH RV670 - ASIC Power

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

421

of

421

of

421

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

4

3

2

1

+MVDD

R291

R291

40.2R

40.2R

402
1%

R292

R292
100R

100R

402
1%

DQA_[63..0]{9}

C291

C291
100nF_6.3V

100nF_6.3V

C293

C293
100nF_6.3V

100nF_6.3V

C294

C294
10nF

10nF

C292

C292
10nF

10nF

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

MVREFD_A
MVREFS_A

U1C

U1C

AB47

DQA_0

AB49

DQA_1

AB51

DQA_2

AA46

DQA_3

Y51

DQA_4

V47

DQA_5

W48

DQA_6

W46

DQA_7

V49

DQA_8

V51

DQA_9

U46

DQA_10

U50

DQA_11

P49

DQA_12

P47

DQA_13

R48

DQA_14

R46

DQA_15

AD38

DQA_16

AD39

DQA_17

AD40

DQA_18

AD41

DQA_19

AC39

DQA_20

AA42

DQA_21

Y43

DQA_22

Y42

DQA_23

P51

DQA_24

N50

DQA_25

N46

DQA_26

M47

DQA_27

K51

DQA_28

K49

DQA_29

L48

DQA_30

K47

DQA_31

J43

DQA_32

K45

DQA_33

H46

DQA_34

H49

DQA_35

H51

DQA_36

A46

DQA_37

C49

DQA_38

C46

DQA_39

U42

DQA_40

R41

DQA_41

R42

DQA_42

R43

DQA_43

J40

DQA_44

L42

DQA_45

K42

DQA_46

N41

DQA_47

F44

DQA_48

E42

DQA_49

C42

DQA_50

A44

DQA_51

A40

DQA_52

C40

DQA_53

E40

DQA_54

F39

DQA_55

B39

DQA_56

C38

DQA_57

A38

DQA_58

E38

DQA_59

C36

DQA_60

B35

DQA_61

F35

DQA_62

A36

DQA_63

AC46

MVREFDA

AC43

MVREFSA

AD37

NC_8

AC36

NC_9

U36

NC_31

V40

NC_32

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 3 of 10

Part 3 of 10

MEMORY INTERFACE

A

MEMORY INTERFACE

A

DDR1 DDR2 DDR3

DDR1 DDR2 DDR3

read strobe

bidir. strobe

read strobe

bidir. strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

DQMAB_0
DQMAB_1
DQMAB_2
DQMAB_3
DQMAB_4
DQMAB_5
DQMAB_6
DQMAB_7

QSA_0

QSA_1

QSA_2

QSA_3

QSA_4

QSA_5

QSA_6

QSA_7
QSA_0B

QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B

ODTA0

ODTA1

CLKA0
CLKA0B

CKEA0
RASA0B
CASA0B

WEA0B

CSA0B_0
CSA0B_1

CLKA1
CLKA1B

CKEA1
RASA1B
CASA1B

WEA1B

CSA1B_0
CSA1B_1

U38
U39
R37
Y38
AA37
Y37
Y39
Y40
K39
K38
M38
M37
P38
P39
L40
K40

Y49
T47
AC42
M49
F49
P43
F41
D37

AA50
T51
AC41
L46
C51
N43
A42
E36

Y47
T49
AA43
M51
F46
N42
D41
F37

V37
AA41

V43
U43

R38
P37
R40
Y36
AA38

V36

G38
J39

L37
J37
J35
N37
P40

K37

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9

MAA_10
MAA_11

MAA_BA2
MAA_BA0
MAA_BA1

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

QSAb_0
QSAb_1
QSAb_2
QSAb_3
QSAb_4
QSAb_5
QSAb_6
QSAb_7

CLKA0 {9}
CLKA0b {9}

CLKA1 {9}
CLKA1b {9}

MAA_[11..0] {9}

MAA_BA[2..0] {9}

DQMAb_[7..0] {9}

QSA_[7..0] {9}

QSAb_[7..0] {9}

CKEA0 {9}
RASA0b {9}
CASA0b {9}
WEA0b {9}
CSA0b_0 {9}

CSA0b_1 {9}

CKEA1 {9}
RASA1b {9}
CASA1b {9}
WEA1b {9}
CSA1b_0 {9}

CSA1b_1 {9}

+MVDD

+MVDD

R391

R391

40.2R

40.2R

402
1%

R392

R392
100R

100R

402
1%

R393

R393

40.2R

40.2R

402
1%

R394

R394
100R

100R

402
1%

C391

C391
100nF_6.3V

100nF_6.3V

C393

C393
100nF_6.3V

100nF_6.3V

C392

C392
10nF

10nF

C394

C394
10nF

10nF

D D

C C

B B

+MVDD

R293

R293

40.2R

40.2R

402
1%

R294

R294
100R

100R

402
1%

DRAM_RST{9,10}

MVREFD_B
MVREFS_B

R495

R495

4.7K

4.7K

R395

R395

4.7K

4.7K

DQB_[63..0]{9}

+MVDD

MR295

MR295

2.0K

2.0K

R295

R295

4.7K

4.7K

DNI

R296

R296

4.7K

4.7K

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

R297

R297

4.7K

4.7K

BF11
BL12
BJ12

E34
C34
A34
F33
A32
F31
B31
E30
R35
P35
N35
M35
N34
K32
K31

J31
C30
A30
F29
D29
B27
E26
F27
C26
A26
F25
D25
E24
A22
E22
C22
B23
F21
D21
E20
C20
A18
C18
E18
F17
M23
L25

J25
L23
M22
M20

J20
K20
D17
E16
C16
A16
F13
A14
C14
D13
K17
L17
L19

J16

J13
M17
K14
K13

J34
G34

T35
T34

J29
M29

U1D

U1D

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFDB
MVREFSB

DRAM_RST
TEST_MCLK
TEST_YCLK
NC_10

NC_11
NC_33
NC_34

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 4 of 10

Part 4 of 10

MEMORY INTERFACE

MEMORY INTERFACE

DDR1 DDR2

DDR1 DDR2

bidir. strobe

bidir. strobe

Not used

Not used

For DDR2

For DDR2

L28

MAB_0

N28

MAB_1

T29

MAB_2

P31

MAB_3

R32

MAB_4

P32

MAB_5

N32

MAB_6

M31

MAB_7

N22

MAB_8

R23

MAB_9

T25

MAB_10

R26

MAB_11

J26

MAB_12

R28

MAB_13

P26

MAB_14

N23

MAB_15

C32

DQMBB_0

L34

DQMBB_1

E28

DQMBB_2
DQMBB_3
DQMBB_4
DQMBB_5
DQMBB_6
DQMBB_7

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

QSB_0B

read strobe

read strobe

QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B

write strobe

write strobe

ODTB0
ODTB1

CLKB0

CLKB0B

CKEB0
RASB0B
CASB0B

WEB0B

CSB0B_0
CSB0B_1

CLKB1
CLKB1B

CKEB1
RASB1B
CASB1B

WEB1B

CSB1B_0
CSB1B_1

C24
A20
J23
E14
J17

D33
K34
A28
F23
B19
K23
F15
K16

E32
J32
C28
A24
F19
K22
B15
J14

N20
K25

K28
J28

K26
T28
P28
R31
T31

L32
J19

K19

R25
N17
P20
N26
M25

P17

B

B

DDR3

DDR3

bidir. differential strobe

bidir. differential strobe

DQMBb_0
DQMBb_1

DQMBb_2

DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

QSBb_0
QSBb_1
QSBb_2
QSBb_3
QSBb_4
QSBb_5
QSBb_6
QSBb_7

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11

MAB_BA2
MAB_BA0
MAB_BA1

CLKB0 {9}
CLKB0b {9}

CLKB1 {9}
CLKB1b {9}

MAB_[11..0] {9}

MAB_BA[2..0] {9}

DQMBb_[7..0] {9}

QSB_[7..0] {9}

QSBb_[7..0] {9}

CKEB0 {9}
RASB0b {9}
CASB0b {9}
WEB0b {9}
CSB0b_0 {9}

CSB0b_1 {9}

CKEB1 {9}
RASB1b {9}
CASB1b {9}
WEB1b {9}
CSB1b_0 {9}

CSB1b_1 {9}

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Memory Interface (Channel A & B)

RH RV670 - ASIC Memory Interface (Channel A & B)

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Memory Interface (Channel A & B)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

521

of

521

of

521

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

4

3

2

1

+MVDD

R491

R491

40.2R

40.2R

402
1%

R492

R492
100R

100R

402
1%

DQC_[63..0]{10}

C491

C491
100nF_6.3V

100nF_6.3V

C493

C493
100nF_6.3V

100nF_6.3V

C494

C494
10nF

10nF

C492

C492
10nF

10nF

DQC_0
DQC_1
DQC_2
DQC_3
DQC_4
DQC_5
DQC_6
DQC_7
DQC_8
DQC_9
DQC_10
DQC_11
DQC_12
DQC_13
DQC_14
DQC_15
DQC_16
DQC_17
DQC_18
DQC_19
DQC_20
DQC_21
DQC_22
DQC_23
DQC_24
DQC_25
DQC_26
DQC_27
DQC_28
DQC_29
DQC_30
DQC_31
DQC_32
DQC_33
DQC_34
DQC_35
DQC_36
DQC_37
DQC_38
DQC_39
DQC_40
DQC_41
DQC_42
DQC_43
DQC_44
DQC_45
DQC_46
DQC_47
DQC_48
DQC_49
DQC_50
DQC_51
DQC_52
DQC_53
DQC_54
DQC_55
DQC_56
DQC_57
DQC_58
DQC_59
DQC_60
DQC_61
DQC_62
DQC_63

MVREFS_C

R298

R298
243R

243R

U1E

U1E

E12

DQC_0

C12

DQC_1

A12

DQC_2

F11

DQC_3

A10

DQC_4

G10

DQC_5

A8

DQC_6

F8

DQC_7

C8

DQC_8

C6

DQC_9

A3

DQC_10

F6

DQC_11

F1

DQC_12

H1

DQC_13

H6

DQC_14

K5

DQC_15

K12

DQC_16

J11

DQC_17

L9

DQC_18

L12

DQC_19

P11

DQC_20

P9

DQC_21

P10

DQC_22

R11

DQC_23

K3

DQC_24

K1

DQC_25

L6

DQC_26

L2

DQC_27

N6

DQC_28

N4

DQC_29

P5

DQC_30

P3

DQC_31

P1

DQC_32

R6

DQC_33

T5

DQC_34

R2

DQC_35

V1

DQC_36

V3

DQC_37

U4

DQC_38

V5

DQC_39

AA9

DQC_40

AA10

DQC_41

AB9

DQC_42

AA11

DQC_43

AF9

DQC_44

AE11

DQC_45

AE10

DQC_46

AE9

DQC_47

W6

DQC_48

W2

DQC_49

Y5

DQC_50

Y3

DQC_51

AB5

DQC_52

AB3

DQC_53

AB1

DQC_54

AC6

DQC_55

AC2

DQC_56

AD5

DQC_57

AD3

DQC_58

AD1

DQC_59

AF3

DQC_60

AF1

DQC_61

AG6

DQC_62

AG2

DQC_63

G12

MVREFDC

J12

MVREFSC

R19

MEMTEST

P19

NC_12

R16

NC_35

AB16

NC_36

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 5 of 10

Part 5 of 10

MEMORY INTERFACE

C

MEMORY INTERFACE

C

DDR3

DDR1 DDR2

DDR3

DDR1 DDR2

bidir. strobe

read strobe

bidir. strobe

read strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAC_0
MAC_1
MAC_2
MAC_3
MAC_4
MAC_5
MAC_6
MAC_7
MAC_8

MAC_9
MAC_10
MAC_11
MAC_12
MAC_13
MAC_14
MAC_15

DQMCB_0
DQMCB_1
DQMCB_2
DQMCB_3
DQMCB_4
DQMCB_5
DQMCB_6
DQMCB_7

QSC_0

QSC_1

QSC_2

QSC_3

QSC_4

QSC_5

QSC_6

QSC_7

QSC_0B
QSC_1B
QSC_2B
QSC_3B
QSC_4B
QSC_5B
QSC_6B
QSC_7B

ODTC0

ODTC1

CLKC0
CLKC0B

CKEC0
RASC0B
CASC0B

WEC0B

CSC0B_0
CSC0B_1

CLKC1
CLKC1B

CKEC1
RASC1B
CASC1B

WEC1B

CSC1B_0
CSC1B_1

R14
T13
R13
M13
L16
R17
M11
M14
AB13
AB14
AB12
AA12
V9
W13
W16
AA15

C10
C3
K9
M5
T3
AD11
AA4
AE6

B11
F3
M9
M1
U6
AD10
Y1
AF5

E10
J10
M10
M3
T1
AD9
AA6
AE4

AA16
V16

R9
R10

T10
V12
T9
L14
P16

V14

W9
W10

AD14
AE14
AD12
V11
V10

V15

MAC_0
MAC_1
MAC_2
MAC_3

MAC_4
MAC_5
MAC_6
MAC_7
MAC_8
MAC_9
MAC_10
MAC_11

MAC_BA2
MAC_BA0
MAC_BA1

DQMCb_0
DQMCb_1
DQMCb_2
DQMCb_3
DQMCb_4
DQMCb_5
DQMCb_6
DQMCb_7

QSC_0
QSC_1
QSC_2
QSC_3
QSC_4
QSC_5
QSC_6
QSC_7

QSCb_0
QSCb_1
QSCb_2
QSCb_3
QSCb_4
QSCb_5
QSCb_6
QSCb_7

CLKC0 {10}
CLKC0b {10}

CKEC0 {10}
RASC0b {10}
CASC0b {10}
WEC0b {10}
CSC0b_0 {10}

CSC0b_1 {10}

CLKC1 {10}
CLKC1b {10}

CKEC1 {10}
RASC1b {10}
CASC1b {10}
WEC1b {10}
CSC1b_0 {10}

CSC1b_1 {10}

MAC_[11..0] {10}

MAC_BA[2..0] {10}

DQMCb_[7..0] {10}

QSC_[7..0] {10}

QSCb_[7..0] {10}

+MVDD

+MVDD

R591

R591

40.2R

40.2R

402
1%

R592

R592
100R

100R

402
1%

R593

R593

40.2R

40.2R

402
1%

R594

R594
100R

100R

402
1%

C591

C591
100nF_6.3V

100nF_6.3V

C593

C593
100nF_6.3V

100nF_6.3V

C592

C592
10nF

10nF

C594

C594
10nF

10nF

D D

C C

B B

+MVDD

R493

R493

40.2R

40.2R

402
1%

R494

R494
100R

100R

402
1%

MVREFD_D
MVREFS_DMVREFD_C

DQD_[63..0]{10}

U1F

DQD_0
DQD_1
DQD_2
DQD_3
DQD_4
DQD_5
DQD_6
DQD_7
DQD_8
DQD_9
DQD_10
DQD_11
DQD_12
DQD_13
DQD_14
DQD_15
DQD_16
DQD_17
DQD_18
DQD_19
DQD_20
DQD_21
DQD_22
DQD_23
DQD_24
DQD_25
DQD_26
DQD_27
DQD_28
DQD_29
DQD_30
DQD_31
DQD_32
DQD_33
DQD_34
DQD_35
DQD_36
DQD_37
DQD_38
DQD_39
DQD_40
DQD_41
DQD_42
DQD_43
DQD_44
DQD_45
DQD_46
DQD_47
DQD_48
DQD_49
DQD_50
DQD_51
DQD_52
DQD_53
DQD_54
DQD_55
DQD_56
DQD_57
DQD_58
DQD_59
DQD_60
DQD_61
DQD_62
DQD_63

U1F

AH5

DQD_0

AH3

DQD_1

AH1

DQD_2

AJ6

DQD_3

AK1

DQD_4

AL6

DQD_5

AL2

DQD_6

AM5

DQD_7

AM3

DQD_8

AM1

DQD_9

AN6

DQD_10

AN4

DQD_11

AR6

DQD_12

AR2

DQD_13

AT5

DQD_14

AT3

DQD_15

AF11

DQD_16

AF12

DQD_17

AF13

DQD_18

AH12

DQD_19

AM10

DQD_20

AM9

DQD_21

AL11

DQD_22

AL10

DQD_23

AT1

DQD_24

AU6

DQD_25

AY1

DQD_26

AY3

DQD_27

AW2

DQD_28

AY5

DQD_29

AV5

DQD_30

AU4

DQD_31

BA6

DQD_32

BB5

DQD_33

BA4

DQD_34

BB3

DQD_35

BD1

DQD_36

BD3

DQD_37

BF3

DQD_38

BJ1

DQD_39

AU9

DQD_40

AT11

DQD_41

AV9

DQD_42

AV10

DQD_43

BB10

DQD_44

BA9

DQD_45

AW12

DQD_46

BB9

DQD_47

BC9

DQD_48

BF6

DQD_49

BJ3

DQD_50

BJ6

DQD_51

BG10

DQD_52

BL10

DQD_53

BJ10

DQD_54

BH11

DQD_55

BB14

DQD_56

BB15

DQD_57

BC15

DQD_58

BC10

DQD_59

BC11

DQD_60

AY13

DQD_61

BC13

DQD_62

BE12

DQD_63

AJ9

MVREFDD

AH9

MVREFSD

AE16

NC_13

AF16

NC_14

AP15

NC_37

AT14

NC_38

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 6 of 10

Part 6 of 10

MEMORY INTERFACE

D

MEMORY INTERFACE

D

DDR3

DDR1 DDR2

DDR3

DDR1 DDR2

bidir. strobe

read strobe

bidir. strobe

read strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7
MAD_8

MAD_9
MAD_10
MAD_11
MAD_12
MAD_13
MAD_14
MAD_15

DQMDB_0
DQMDB_1
DQMDB_2
DQMDB_3
DQMDB_4
DQMDB_5
DQMDB_6
DQMDB_7

QSD_0

QSD_1

QSD_2

QSD_3

QSD_4

QSD_5

QSD_6

QSD_7

QSD_0B
QSD_1B
QSD_2B
QSD_3B
QSD_4B
QSD_5B
QSD_6B
QSD_7B

ODTD0

ODTD1

CLKD0

CLKD0B

CKED0

RASD0B
CASD0B

WED0B

CSD0B_0
CSD0B_1

CLKD1

CLKD1B

CKED1

RASD1B
CASD1B

WED1B

CSD1B_0
CSD1B_1

AJ16
AM14
AM13
AL14
AE15
AH15
AJ13
AJ15
AU15
AW15
AV17
AV14
AT13
AR16
AU14
AT17

AK3
AP5
AJ10
AV3
BB1
AY10
BL8
BB11

AJ4
AP1
AJ12
AW6
BD6
AY11
BL6
BB13

AK5
AP3
AJ11
AV1
BB7
AV11
BF8
BA13

AU17
AV12

AP10
AP9

AP13
AT12
AM15
AH14
AF14

AW17

AT10
AT9

BA14
AY15
BA15
AU12
AM16

AL15

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7
MAD_8
MAD_9
MAD_10
MAD_11

MAD_BA2
MAD_BA0
MAD_BA1

DQMDb_0
DQMDb_1
DQMDb_2
DQMDb_3
DQMDb_4
DQMDb_5
DQMDb_6
DQMDb_7

QSD_0
QSD_1
QSD_2
QSD_3
QSD_4
QSD_5
QSD_6
QSD_7

QSDb_0
QSDb_1
QSDb_2
QSDb_3
QSDb_4
QSDb_5
QSDb_6
QSDb_7

CLKD0 {10}
CLKD0b {10}

CKED0 {10}
RASD0b {10}
CASD0b {10}
WED0b {10}
CSD0b_0 {10}

CSD0b_1 {10}

CLKD1 {10}
CLKD1b {10}

CKED1 {10}
RASD1b {10}
CASD1b {10}
WED1b {10}
CSD1b_0 {10}

CSD1b_1 {10}

MAD_[11..0] {10}

MAD_BA[2..0] {10}

DQMDb_[7..0] {10}

QSD_[7..0] {10}

QSDb_[7..0] {10}

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Memory Interface (Channel C & D)

RH RV670 - ASIC Memory Interface (Channel C & D)

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Memory Interface (Channel C & D)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

621

of

621

of

621

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B

5

U1J

U1J

Part 10 OF 10

Part 10 OF 10

GPIO_0

VID_0

BA33

VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
VID_7

D D

CrossFire

DVP_MVP_CNTL_0 : DE for bits D[12..23]
DVP_MVP_CNTL_1 : CLK for bits D[12..23]

C C

TP90

TP90

TP84

TP84
TP85

TP85
TP86

TP86
TP87

TP87
TP88

TP88
TP89

TP89

TP60

TP60
TP61

TP61
TP62

TP62
TP63

TP63
TP64

TP64
TP65

TP65
TP66

TP66
TP67

TP67
TP68

TP68
TP69

TP69
TP70

TP70
TP71

TP71
TP72

TP72
TP73

TP73
TP74

TP74
TP75

TP75
TP76

TP76
TP77

TP77
TP78

TP78
TP79

TP79
TP80

TP80
TP81

TP81
TP82

TP82
TP83

TP83

35mil

35mil

35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil

DVP_MVP_CNTL_0

35mil

35mil

DVP_MVP_CNTL_1

35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil

DVOCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

VID_0

AY33

VID_1

AW33

VID_2

AV33

VID_3

BA32

VID_4

AY32

VID_5

AW32

VID_6

BA30

VID_7

BB30

VPCLK0

AV30

VHAD_0

AW30

VHAD_1

BC29

VPHCTL

BC30

VIPCLK

BF15

DVPCLK

BJ20

DVPCNTL_0

BG20

DVPCNTL_1

BK15

DVPCNTL_2

BB20

DVPCNTL_MVP_0

BC20

DVPCNTL_MVP_1

DVO Port

DVO Port

BH15

DVPDATA_0

BG16

DVPDATA_1

BJ16

DVPDATA_2

BL16

DVPDATA_3

BH17

DVPDATA_4

BF17

DVPDATA_5

BL18

DVPDATA_6

BJ18

DVPDATA_7

BG18

DVPDATA_8

BK19

DVPDATA_9

BH19

DVPDATA_10

BF19

DVPDATA_11

AY21

DVPDATA_12

BA21

DVPDATA_13

BC21

DVPDATA_14

BB18

DVPDATA_15

BC18

DVPDATA_16

BC17

DVPDATA_17

BK21

DVPDATA_18

BH21

DVPDATA_19

BF21

DVPDATA_20

BL22

DVPDATA_21

AY20

DVPDATA_22

BA20

DVPDATA_23

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

VIP

VIP
Capture

Capture

VIP

VIP
Host

Host

RESERVED

RESERVED

No Connect

No Connect

GPIO_1
GPIO_2
GPIO_3

General

General

GPIO_4

Purpose

Purpose

GPIO_5

I/O

I/O

GPIO_6

GPIO_7_BLON

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16_SSIN

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

GPIO_23_CLKREQB

GPIO_24_TRST

GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO

GENERICA
GENERICB
GENERICC

DVALID

VARY_BL

PSYNC

DIGON

NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30

AV18
AU18
AV20
AW18
BB17
BA18
AY24
AU20
AW21
AV21
AU21
BA23
AY23
AW23
AV23
AU23
BB24
AY18
BA17
BH13
BF13
BC24
AW24
AV24
AU24
AY26
AW26
AV26
AW27

BC26
BB23
BB26

BC23
AY29

AW29
AU29

AM20
AN20
AT23
BA26
AU35
AU33
AT33
BA29
AY27
AT24
AU27
AU30
BG24

4

GPIO_0
GPIO_1GPIO_1
GPIO_2GPIO_2

GPIO_7GPIO_7
GPIO_8GPIO_8
GPIO_9GPIO_9
GPIO_10GPIO_10
GPIO_11GPIO_11
GPIO_12GPIO_12
GPIO_13GPIO_13
HPD2HPD2

GPIO_17_INT

GPIO_22_ROMCSb
PCIE_CLK_REQb
JTAG_MODE

GENERICA
GENERICB
GENERICC

DVALIDDVALID
PSYNCPSYNC

GPIO_3
GPIO_4
GPIO_5
GPIO_6

CrossFire

FLOW_CONTROL_1 - Lower Cable
FLOW_CONTROL_2 - Upper Cable
SWAP_LOCK_1 - Lower Cable
SWAP_LOCK_2 - Upper Cable

RP60A33R RP60A33R

81

RP60B33R RP60B33R

72

RP60C33R RP60C33R

63

RP60D33R RP60D33R

54

HPD2 {15}

R51KR5
1K

GPIO_8_R
GPIO_9_R
GPIO_10_R
ROMCSb_R

3

Place SW1 & SW2 on the bottom side
(easily accessible).
Clearly Mark A & B contacts on the
silkscreen.

R640RR64

0R

ThermINT {18}

GENERICA {17}

+3.3V

TR50

TR50
10K

10K

35mil

35mil

TP50

TP50

DNI

DNI

DNI

DNI

MR50 10KMR50 10K

MR51 10KMR51 10K

MR52 10KMR52 10K
MR53 10KMR53 10K

MR54 10KMR54 10K

MR55 10KMR55 10K

MR56 10KMR56 10K

MR57 10KMR57 10K

MR58 10KMR58 10K
MR59 10KMR59 10K
MR63 10KMR63 10K
MR62 10KMR62 10K
MR61 10KMR61 10K

MR65 10KMR65 10K

MR66 10KMR66 10K

MR67 10KMR67 10K

MR68 10KMR68 10K

MR70 10KMR70 10K

MR71 10KMR71 10K

MR72 10KMR72 10K

MR73 10KMR73 10K

MR74 10KMR74 10K

MR75 10KMR75 10K

MR76 10KMR76 10K

MR77 10KMR77 10K

MR78 10KMR78 10K
MR79 10KMR79 10K

MR60 10KMR60 10K

+3.3V

DNI

DNI

TBD

DNI

NTSC

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

2

R50 10KR50 10K

R51 10KR51 10K

R52 10KR52 10K
R53 10KR53 10K

R54 1KR54 1K

R55 10KR55 10K

R56 10KR56 10K

R57 10KR57 10K

R58 10KR58 10K
R59 10KR59 10K
R63 10KR63 10K
R62 10KR62 10K
R61 10KR61 10K

R65 10KR65 10K

R66 10KR66 10K

R67 10KR67 10K

R68 10KR68 10K

R70 10KR70 10K

R71 10KR71 10K

R72 10KR72 10K

R73 10KR73 10K

R74 10KR74 10K

R75 10KR75 10K

R76 10KR76 10K

R77 10KR77 10K

R78 10KR78 10K
R79 10KR79 10K

R60 10KR60 10K

PIN BASED STRAPS

GPIO_0

GPIO_1

GPIO_2

GPIO_2
GPIO_3

GPIO_3

GPIO_4

GPIO_5

GPIO_5

GPIO_6

GPIO_6

GPIO_7GPIO_7

GPIO_8_R
GPIO_9_R

GPIO_13

GPIO_13
GPIO_12

GPIO_12
GPIO_11GPIO_11

GPIO_11GPIO_11

CONFIG[3]
CONFIG[2]
CONFIG[1]
CONFIG[0]

GENERICC

VSYNC1

VSYNC1

HSYNC1

PSYNC

PSYNC

VID_0

VID_0

VID_1

VID_1

VID_2

VID_2

VID_3

VID_3

VID_4

VID_4

VID_5

VID_5

VID_6

VID_6

VID_7

VID_7

VSYNC2

VSYNC2
HSYNC2

HSYNC2

DVALID

DVALID

VSYNC1 {3,15}

HSYNC1 {3,15}

VSYNC2 {3,16}
HSYNC2 {3,16}

1

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)

0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

AMD Internal Use Only - Reserved (Default: 00)

DEBUG_ACCESS
AMD Internal Use Only - Reserved (Default: 0)

AMD Board Feature III - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

GPIO(9,13, 12,11) - CONFIG[3..0]

0010 - 512Kbit AT25F512A (Atmel)
0011 - 1Mbit AT25F1024A (Atmel)
0100 - 512Kbit M25P05A (ST)
0101 - 1Mbit M25P10A (ST)
0101 - 2Mbit M25P20 (ST)
0100 - 512Kbit Pm25LV512 (Chingis)
0101 - 1Mbit Pm25LV010 (Chingis)

AMD Internal Use Only - Reserved (Default: 0)

VIP_DEVICE_STRAP_EN

0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for
configurations without video-in)

AMD Board Feature II - HDMI_EN Default 0

VGA DISABLE : 1 for disable (set to 0 for normal operation)

AMD Internal Use Only - Reserved (Default: 0)

MSI_DIS (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

BIF_AUDIO_EN
0 - Disable HD Audio 1- Enable HD Audio

AMD Internal Use Only - Reserved (Default: 0)

64BAR_EN_A (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved for memory strap

AMD Internal Use Only - Reserved

BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability

Default: 0

AMD PCIE FEATURE I

AMD PCIE FEATURE II

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

Pull-Down Resistors are for BU until built-in pull-downs are verified.

B B

CrossFire Card-Edge

Lower Cable Card Edge

1

DVOCLK
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7
DVPDATA_9
DVPDATA_11
DVPCNTL_1

A A

GPIO_3

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

2
4
6
8

DVPDATA_0

10
12

DVPDATA_2

14
16

DVPDATA_4

18
20

DVPDATA_6

22
24

DVPDATA_8

26
28

DVPDATA_10

32

DVPCNTL_0

34
36

GPIO_5

38
40

J8002J8002

Bundle B

5

Upper Cable Card Edge

1

DVP_MVP_CNTL_1
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GPIO_4

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

2
4
6
8

DVPDATA_12

10
12

DVPDATA_14

14
16

DVPDATA_16

18
20

DVPDATA_18

22
24

DVPDATA_20

26
28

DVPDATA_22

32

DVALID_R

34
36

GPIO_6

38
40

J8001J8001

Bundle A (closer to the bracket)

4

DNI

R8001 0RR8001 0R
R8002 0RR8002 0R

GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL

DVALID

DNI

GENERICB

www.vinafix.vn

3

ROMCSb_R
GPIO_8_R

R46

R46
10K

10K

U2

U2

1

CE#

VCC

2

SO

HOLD#

3

WP#

SCK

GND4SI

PM25LV512A-100SCE

PM25LV512A-100SCE

+3.3V

8
7

GPIO_10_R

6

GPIO_9_R

5

C47

C47
100nF_6.3V

100nF_6.3V

BIOS1

BIOS1

BIOS

BIOS

113-B339XX-XXX

113-B339XX-XXX

VIDEO BIOS
FIRMWARE

PN 2280007900G for 1Mbit (PM25LV010A-100SCE)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC DVO, VIP & GPIOs

RH RV670 - ASIC DVO, VIP & GPIOs

2

RH RV670 - ASIC DVO, VIP & GPIOs

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Tuesday, February 19, 2008

Sheet

Sheet

Sheet

of

721

of

721

of

721

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

1

1

1

105-B340xx-00B

105-B340xx-00B

105-B340xx-00B