MSI MS-V120 Schematic 10

8

7

6

5

4

3

2

1

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

+12V_BUS

+12V_BUS

C3

C3

D D

C C

B B

C2

150nF_16V

150nF_16V

150nF_16VC2150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

LF CAP CER 150NF 10% 16V X7R (0603)

+3.3V_BUS

CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK

C4
10uF_X6SC410uF_X6S

+3.3V_BUS

C6

C5

1uF_6.3VC61uF_6.3V

100nF_6.3VC5100nF_6.3V

Place these caps as close to the PCIE
connector as possible

TEST_EN_J TEST_EN_J

No JTAG

R10RR1

0R

PETn0_GFXRn0(2)

C0
10nFC010nF

PETp1_GFXRp1(2)
PETn1_GFXRn1(2)

PETp2_GFXRp2(2)
PETn2_GFXRn2(2)

PETp3_GFXRp3(2)
PETn3_GFXRn3(2)

PETp4_GFXRp4(2)
PETn4_GFXRn4(2)

PETp5_GFXRp5(2)
PETn5_GFXRn5(2)

PETp6_GFXRp6(2)
PETn6_GFXRn6(2)

PETp7_GFXRp7(2)
PETn7_GFXRn7(2)

PETp8_GFXRp8(2)
PETn8_GFXRn8(2)

PETp9_GFXRp9(2)
PETn9_GFXRn9(2)

PETp10_GFXRp10(2)
PETn10_GFXRn10(2)

PETp11_GFXRp11(2)
PETn11_GFXRn11(2)

PETp12_GFXRp12(2)
PETn12_GFXRn12(2)

PETp13_GFXRp13(2)
PETn13_GFXRn13(2)

PETp14_GFXRp14(2)
PETn14_GFXRn14(2)

PETp15_GFXRp15(2)
PETn15_GFXRn15(2)

JTRST

PRESENCE

PCI-EXPRESS EDGE CONNECTOR

+3.3V_BUS

+12V_BUS

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

x16 PCIe

x16 PCIe

Mechanical Key

Mechanical Key

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

MPCIE1

MPCIE1

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

PRESENCE

+12V_BUS

JTCK
JTDI
JTDO
JTMS

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

+3.3V_BUS

TP4

TP4
35mil

35mil

100nF_6.3VC7100nF_6.3V

100nF_6.3VC9100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

TP2

TP2

TP3

TP3

TP1

TP1

35mil

35mil

35mil

35mil

35mil

35mil

No JTAG

R2 0RR2 0R

TDA08H0SB1R

TDA08H0SB1R

98
107

TSW1

TSW1

116
125
134
143
152

21 345678

21 345678

161

ON

ON

JTRST

PCIE_REFCLKP (2)

C7

C8
100nF_6.3VC8100nF_6.3V

C9

C10

C10
100nF_6.3V

100nF_6.3V

C11

C11

C12

C12
100nF_6.3V

100nF_6.3V

C13

C13

C14

C14
100nF_6.3V

100nF_6.3V

C15

C15

C16

C16
100nF_6.3V

100nF_6.3V

C17

C17

C18

C18
100nF_6.3V

100nF_6.3V

C19

C19

C20

C20
100nF_6.3V

100nF_6.3V

C21

C21

C22

C22
100nF_6.3V

100nF_6.3V

C23

C23

C24

C24
100nF_6.3V

100nF_6.3V

C25

C25

C26

C26
100nF_6.3V

100nF_6.3V

C27

C27

C28

C28
100nF_6.3V

100nF_6.3V

C29

C29

C30

C30
100nF_6.3V

100nF_6.3V

C31

C31

C32

C32
100nF_6.3V

100nF_6.3V

C33

C33

C34

C34
100nF_6.3V

100nF_6.3V

C35

C35

C36

C36
100nF_6.3V

100nF_6.3V

C37

C37

C38

C38
100nF_6.3V

100nF_6.3V

PCIE_REFCLKN (2)PETp0_GFXRp0(2)

GFXTp0_PERp0 (2)
GFXTn0_PERn0 (2)

GFXTp1_PERp1 (2)
GFXTn1_PERn1 (2)

GFXTp2_PERp2 (2)
GFXTn2_PERn2 (2)

GFXTp3_PERp3 (2)
GFXTn3_PERn3 (2)

GFXTp4_PERp4 (2)
GFXTn4_PERn4 (2)

GFXTp5_PERp5 (2)
GFXTn5_PERn5 (2)

GFXTp6_PERp6 (2)
GFXTn6_PERn6 (2)

GFXTp7_PERp7 (2)
GFXTn7_PERn7 (2)

GFXTp8_PERp8 (2)
GFXTn8_PERn8 (2)

GFXTp9_PERp9 (2)
GFXTn9_PERn9 (2)

GFXTp10_PERp10 (2)
GFXTn10_PERn10 (2)

GFXTp11_PERp11 (2)
GFXTn11_PERn11 (2)

GFXTp12_PERp12 (2)
GFXTn12_PERn12 (2)

GFXTp13_PERp13 (2)
GFXTn13_PERn13 (2)

GFXTp14_PERp14 (2)
GFXTn14_PERn14 (2)

GFXTp15_PERp15 (2)
GFXTn15_PERn15 (2)

TP6

TP6
35mil

35mil

+3.3V

53

1
2

R_RST

R3 0RR3 0R

C39

C39
100nF_6.3V

100nF_6.3V

NC7SZ08P5X_NL

NC7SZ08P5X_NL

4

U5

U5

DNI

PERST#_buf (2)

PERST#

TEST_EN_R (3)

HSYNC1 (3,7,15)

VSYNC1 (3,7,15)

DDC1DATA (3,15)

DDC3CLK (3,18)
DDC1CLK (3,15)

Place R3 in U5

Table 1: Connection for JTAG

Production
(No JTAG)

Internal Use Only

TSW1, R1 & R2 are located on the bottom side of the board close to PCIE connector.

Install R1, R2 & Don't Install TSW1

Install TSW1 & Don't Install R1 & R2

TSW1 Switch #1, 2, 3, 4, 5 and 6 closed (ON)

JTAG

#8 and 7 open

TSW1 Switch #1, 2, 3, 4, 5 and 6 open

NO JTAG

#8 & 7 closed (ON)

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - PCI-E Edge Connector

RH RV670 - PCI-E Edge Connector

8

7

6

5

www.vinafix.vn

4

3

RH RV670 - PCI-E Edge Connector

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

121

of

121

of

121

GROUND

BUO BRING UP

ONLY

Doc No.

Doc No.

Doc No.

105-B339xx-00

105-B339xx-00

105-B339xx-00

1

RevDate:

RevDate:

RevDate:

2

2

2

5

D D

NOTE: some of the PCIE testpoints will
be available trought via on traces.

PETp0_GFXRp0(1)
PETn0_GFXRn0(1)

PETp1_GFXRp1(1)
PETn1_GFXRn1(1)

PETp2_GFXRp2(1)
PETn2_GFXRn2(1)

PETp3_GFXRp3(1)
PETn3_GFXRn3(1)

PETp4_GFXRp4(1)
PETn4_GFXRn4(1)

PETp5_GFXRp5(1)
PETn5_GFXRn5(1)

PETp6_GFXRp6(1)

C C

B B

PCIE_REFCLKP(1)
PCIE_REFCLKN(1)

PETn6_GFXRn6(1)

PETp7_GFXRp7(1)
PETn7_GFXRn7(1)

PETp8_GFXRp8(1)

PETp9_GFXRp9(1)
PETn9_GFXRn9(1)

PETp10_GFXRp10(1)
PETn10_GFXRn10(1)

PETp11_GFXRp11(1)
PETn11_GFXRn11(1)

PETp12_GFXRp12(1)
PETn12_GFXRn12(1)

PETp13_GFXRp13(1)
PETn13_GFXRn13(1)

PETp14_GFXRp14(1)
PETn14_GFXRn14(1)

PETp15_GFXRp15(1)
PETn15_GFXRn15(1)

DNI DNI

R13

R13

R14

R14

51R

51R

51R

51R

402 402

TP11TP11

TP12TP12

TP13TP13

TP14TP14

TP19TP19

TP20TP20

TP21TP21

TP22TP22

TP27TP27

TP28TP28

4

U1A

TP7TP7

TP8TP8

TP9TP9

TP10TP10

TP15TP15

TP16TP16

TP17TP17

TP18TP18

TP23TP23

TP24TP24

TP25TP25

TP26TP26

U1A

AW48

PCIE_RX0P

AW46

PCIE_RX0N

AV51

PCIE_RX1P

AV49

PCIE_RX1N

AU48

PCIE_RX2P

AU46

PCIE_RX2N

AT51

PCIE_RX3P

AT49

PCIE_RX3N

AR48

PCIE_RX4P

AR46

PCIE_RX4N

AP51

PCIE_RX5P

AP49

PCIE_RX5N

AN48

PCIE_RX6P

AN46

PCIE_RX6N

AM51

PCIE_RX7P

AM49

PCIE_RX7N

AL48

PCIE_RX8P

AL46

PCIE_RX8N

AK51

PCIE_RX9P

AK49

PCIE_RX9N

AJ48

PCIE_RX10P

AJ46

PCIE_RX10N

AH51

PCIE_RX11P

AH49

PCIE_RX11N

AG48

PCIE_RX12P

AG46

PCIE_RX12N

AF51

PCIE_RX13P

AF49

PCIE_RX13N

AE48

PCIE_RX14P

AE46

PCIE_RX14N

AD51

PCIE_RX15P

AD49

PCIE_RX15N

AW43

PCIE_REFCLKP

AW42

PCIE_REFCLKN

PERST#_buf(1)

AP36

PERSTB

Clock

Clock

PART 1 OF 10

PART 1 OF 10

P

P
C

C
I

I

-

­E

E
X

X
P

P
R

R
E

E
S

S
S

S

I

I
N

N
T

T
E

E
R

R
F

F
A

A
C

C
E

E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

Calibration

Calibration

PCIE_CALRN
PCIE_CALRP

3

AU40
AU39

AU43
AU42

AT40
AT39

AT43
AT42

AP40
AP39

AP43
AP42

AN40
AN39

AN43
AN42

AL40
AL39

AL43
AL42

AK40
AK39

AK43
AK42

AH40
AH39

AH43
AH42

AG40
AG39

AG43
AG42

+PCIE_VDDC

402

AN37
AP37

R82.0K R82.0K

402

R91.27K R91.27K

2

GFXTp0_PERp0 (1)
GFXTn0_PERn0 (1)

GFXTp1_PERp1 (1)
GFXTn1_PERn1 (1)

GFXTp2_PERp2 (1)
GFXTn2_PERn2 (1)

GFXTp3_PERp3 (1)
GFXTn3_PERn3 (1)

GFXTp4_PERp4 (1)
GFXTn4_PERn4 (1)

GFXTp5_PERp5 (1)
GFXTn5_PERn5 (1)

GFXTp6_PERp6 (1)
GFXTn6_PERn6 (1)

GFXTp7_PERp7 (1)
GFXTn7_PERn7 (1)

GFXTp8_PERp8 (1)
GFXTn8_PERn8 (1)PETn8_GFXRn8(1)

GFXTp9_PERp9 (1)
GFXTn9_PERn9 (1)

GFXTp10_PERp10 (1)
GFXTn10_PERn10 (1)

GFXTp11_PERp11 (1)
GFXTn11_PERn11 (1)

GFXTp12_PERp12 (1)
GFXTn12_PERn12 (1)

GFXTp13_PERp13 (1)
GFXTn13_PERn13 (1)

GFXTp14_PERp14 (1)
GFXTn14_PERn14 (1)

GFXTp15_PERp15 (1)
GFXTn15_PERn15 (1)

1

For Tektronix LA only

Place close
to ASIC

A A

5

4

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

www.vinafix.vn

3

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC PCIE_Interface

RH RV670 - ASIC PCIE_Interface

2

RH RV670 - ASIC PCIE_Interface

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

221

of

221

of

221

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

Place close to ASIC

NS100

NS100

NS_VIA

NS_VIA

1 2

GND_T2PVSS

C103

C103

10uF_X6S

10uF_X6S

DDC3CLK(1,18)

R71KR7
1K

DNI

R106 100RR106 100R

R100 100RR100 100R

R101 100RR101 100R

R102 100RR102 100R

R103 100RR103 100R

R104 100RR104 100R

R105 100RR105 100R

C100

C100

10uF_X6S

10uF_X6S

C106

C106

1uF_6.3V

1uF_6.3V

+3.3V

R40

R40

4.7K

4.7K

+1.8V

R43 221RR43 221R
R44 110RR44 110R

C46 100nF_6.3VC46 100nF_6.3V

DNI

NR81 182RNR81 182R
R81 182RR81 182R

Share one pad

OSC_EN

C102

C102

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

R41

R41

4.7K

4.7K

402 402

OSC_EN (14)

C108

C108

TP42TP42

T2XCM
T2XCP

T2X0M
T2X0P

T2X1M
T2X1P

T2X2M
T2X2P

T2X3M
T2X3P

T2X4M
T2X4P

T2X5M
T2X5P

C101

C101

100nF_6.3V

100nF_6.3V

C109

C109

100nF_6.3V

100nF_6.3V

DDC1DATA(1,15)

DDC2DATA(16)

DDC4DATA
DDC4CLK

GPU_DMINUS(18)
GPU_DPLUS(18)

TS_FDO(18)

DDC1CLK(1,15)

DDC2CLK(16)

DDC3DATA
DDC3CLK

PLL_TEST
TEST_EN

D D

+1.8V

B102

B102

BLM15BD121SN1

BLM15BD121SN1

Q100

Q100

SI2304DS

SI2304DS

C C

LVT_EN(13)

DDC4DATA(13)

DDC4CLK(13)

B B

TEST_EN_R(1)

+3.3V_BUS

B80

B80
BLM15BD121SN1

BLM15BD121SN1

C81

C81

1uF_6.3V

1uF_6.3V

A A

32

1

+3.3V

TR40

TR40

4.7K

4.7K

402 402

BUO BUO

I2C DEVICE ADDRESS

DEVICE
LM63
ADS1112

XTALOUT_S
is done for
ease of layout

XTALOUT_S

C80

C80
100nF_6.3V

100nF_6.3V

TR41

TR41

4.7K

4.7K

T2XCM(15)
T2XCP(15)

T2X0M(15)

T2X0P(15)

T2X1M(15)

T2X1P(15)

T2X2M(15)

T2X2P(15)

T2X3M(15)

T2X3P(15)

T2X4M(15)

T2X4P(15)

T2X5M(15)

T2X5P(15)

+T2PVDD

+T2XVDD

B100

B100

26R_600mA

26R_600mA

Use 0R

TP41TP41

TP40TP40

ADDRESS
1001 100 (R/W#) --> DDC3
1001 000 (R/W#) --> DDC4 BUO

For JTAG

TR7 0RTR7 0R

DNI

Y81

Y81

4

VCC

OUT

2

GND

E/D

27.000MHz

27.000MHz

DDC3DATA(18)

3
1

4

U1B

U1B

Integrated TMDS2

Integrated TMDS2

BH35

T2XCM

BF35

T2XCP

BL36

T2X0M

BJ36

T2X0P

BH37

T2X1M

BF37

T2X1P

BL38

T2X2M

BJ38

T2X2P

BH39

T2X3M

BF39

T2X3P

BH41

T2X4M

BF41

T2X4P

BL42

T2X5M

BJ42

T2X5P

BL44

TXOUT_U2N

BJ44

TXOUT_U2P

BL46

TXOUT_U3N

BJ46

TXOUT_U3P

BJ40

TXCLK_UP

BL40

TXCLK_UN

BE38

LPVDD

BE40

LPVSS

BG34

LVDDC1

BK35

LVDDC2

BL34

LVDDR1

BJ34

LVDDR2

BE36

LVSSR1

BE42

LVSSR2

BL49

LVSSR3

BG36

LVSSR4

BG38

LVSSR5

BG40

LVSSR6

BG42

LVSSR7

BF44

LVSSR8

BK37

LVSSR9

BK39

LVSSR10

BK41

LVSSR11

BB45

DDC1DATA

BB47

DDC1CLK

AV36

DDC2DATA

AW36

DDC2CLK

AU32

DDC3DATA

AT32

DDC3CLK

AV35

DDC4DATA

AW35

DDC4CLK

VREFG

R82

R82
221R

221R

Share one pad

BB29

HPD1

AV27

SDA

AV29

SCL

BC27

DMINUS

BB27

DPLUS

AT21

TS_FDO

AU36

PLLTEST

AT37

TESTEN

AT20

VREFG

BJ49

XTALIN

BF46

XTALOUT

DNI

MR82

MR82
221R

221R

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

HPD1(16)

SDA(7)

SCL(7)

XTALIN
XTALOUT

Monitor Interface

Monitor Interface

MMI2C

MMI2C

Thermal

Thermal
Diode

Diode

Test

Test

PART 2 OF 10

PART 2 OF 10

V

V
I

I
D

D
E

E
O

O

&

&

M

M
U

U
L

L
T

T
I

I
M

M
E

E
D

D
I

I
A

A

Integrated TMDS

Integrated TMDS

TXVDDR1
TXVDDR2
TXVDDR3
TXVDDR4

TXVSSR1
TXVSSR2
TXVSSR3
TXVSSR4
TXVSSR5
TXVSSR6
TXVSSR7
TXVSSR8
TXVSSR9

TXVSSR10

DAC / CRT

DAC / CRT

DAC2 (TV/CRT2)

DAC2 (TV/CRT2)

H2SYNC

A2VDDQ

TXCAM
TXCAP

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TX3M

TX3P

TX4M

TX4P

TX5M

TX5P

TPVDD
TPVSS

TXCBM
TXCBP

HSYNC

VSYNC

RSET
AVDD

AVSSQ

VDD1DI
VSS1DI

V2SYNC

COMP

R2SET

A2VSSQ

VDD2DI
VSS2DI

A2VDD

NC_1
NC_2

NC_3
NC_4
NC_5
NC_6
NC_7

BL26
BJ26

BH27
BF27

BL28
BJ28

BH29
BF29

BH31
BF31

BL32
BJ32

BH33
BF33

BL24
BJ24

BL30
BJ30

BE26
BF25
BH25
BK25

BE28
BE30
BG26
BG28
BG30
BG32
BK27
BK29
BK31
BK33

BB49

R

BB51

RB

BD49

G

BD51

GB

BF49

B

BF51

BB

BA42
BA43

BB43
BD46
BD44

BA50
BA48

BA39

R2

AY39

R2B

BC39

G2

BB39

G2B

BC37

B2

BB37

B2B

BA36
AY36

AY37

Y

BA37

C

AW37

BA40

BC42
BB41

BC36
BB36

BC41
BC40

BB40
BB32

BE34
BC33
BC32
BE32

3

T1XCM
T1XCP

T1X0M
T1X0P

T1X1M
T1X1P

T1X2M
T1X2P

T1X3M
T1X3P

T1X4M
T1X4P

T1X5M
T1X5P

C111

C111

C112

C112

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C115

C115

C116

C116

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C2021

C2021
100nF_6.3V

100nF_6.3V

C2024

C2024
10nF

10nF

C2031

C2031
100nF_6.3V

100nF_6.3V

C1023

C1023
10nF

10nF

GND_AVSSQRSET

DNI

C2025

C2025
100nF_6.3V

100nF_6.3V

C2032

C2032
1uF_6.3V

1uF_6.3V

C1024

C1024
100nF_6.3V

100nF_6.3V

C2022

C2022
1uF_6.3V

1uF_6.3V

C2026

C2026
1uF_6.3V

1uF_6.3V

GND_VSS2DI

R1030 499RR1030 499R

R2SET GND_A2VSSQ

R2030 715RR2030 715R

C2030

C2030
10nF

10nF

C113

C113
10uF_X6S

10uF_X6S

C117

C117
10uF_X6S

10uF_X6S

C1025

C1025
1uF_6.3V

1uF_6.3V

NS2021 NS_VIANS2021 NS_VIA

C2033

C2033

4.7uF_6.3V

4.7uF_6.3V

GND_TPVSS

A_DAC1_R (15)
A_DAC1_RB (15)

A_DAC1_G (15)
A_DAC1_GB (15)

A_DAC1_B (15)
A_DAC1_BB (15)

HSYNC1 (1,7,15)
VSYNC1 (1,7,15)

GND_AVSSQ

C1020

C1020

C1021

C1021
100nF_6.3V

100nF_6.3V

10nF

10nF

A_DAC2_R (16)
A_DAC2_RB (16)

A_DAC2_G (16)
A_DAC2_GB (16)

A_DAC2_B (16)
A_DAC2_BB (16)

HSYNC2 (7,16)
VSYNC2 (7,16)

A_DAC2_Y (17)
A_DAC2_C (17)
A_DAC2_COMP (17)

GND_A2VSSQ

NS2020 NS_VIANS2020 NS_VIA

+VDD2DI

12

Place close to ASIC

R116 182RR116 182R

DNI

R110 182RR110 182R

R111 182RR111 182R

R112 182RR112 182R

R113 182RR113 182R

R114 182RR114 182R

R115 182RR115 182R

+TPVDD

NS110

NS110
NS_VIA

NS_VIA

12

+TXVDDR

+AVDD

C1022

C1022
1uF_6.3V

1uF_6.3V

+VDD1DI

NS1021 NS_VIANS1021 NS_VIA

GND_VSS1DI

+A2VDDQ

12

GND_A2VSSQ

+A2VDD

NS1020 NS_VIANS1020 NS_VIA

GND_AVSSQ

12

2

T1XCM (16)
T1XCP (16)

T1X0M (16)
T1X0P (16)

T1X1M (16)
T1X1P (16)

T1X2M (16)
T1X2P (16)

T1X3M (16)
T1X3P (16)

T1X4M (16)
T1X4P (16)

T1X5M (16)
T1X5P (16)

B112

B112

BLM15BD121SN1

BLM15BD121SN1

B110

B110

26R_600mA

26R_600mA

B1020

B1020

BLM15BD121SN1

BLM15BD121SN1

12

BLM15BD121SN1

BLM15BD121SN1

B2020

B2020

BLM15BD121SN1

BLM15BD121SN1

B2021

B2021

BLM15BD121SN1

BLM15BD121SN1

B2030

B2030

BLM15BD121SN1

BLM15BD121SN1

B1021

B1021

1

+1.8V

+3.3V

C82

C82

12pF_50V

12pF_50V

C83

C83

12pF_50V

12pF_50V

2 1

Y82

Y82

27.000MHz_10PPM

27.000MHz_10PPM

XTALIN_S

R841MR84

XTALOUT_S

1M

MR86 0RMR86 0R

For Crystal: Adjust C82, C83, R81

5

XTALOUT

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC MAIN

RH RV670 - ASIC MAIN

4

www.vinafix.vn

3

2

RH RV670 - ASIC MAIN

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

321

of

321

of

321

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

C151

C151
1uF_6.3V

1uF_6.3V

C133

C133
1uF_6.3V

1uF_6.3V

C141

C141
1uF_6.3V

1uF_6.3V

C981

C981
1uF_6.3V

1uF_6.3V

C961

C961
1uF_6.3V

1uF_6.3V

C972

C972
100nF_6.3V

100nF_6.3V

B94

B94

BLM15BD121SN1

BLM15BD121SN1

BLM15BD121SN1

BLM15BD121SN1

NS70 NS_VIANS70 NS_VIA

1 2

GND_PVSS

B60

B60
BLM15BD121SN1

BLM15BD121SN1

5

C152

C152
1uF_6.3V

1uF_6.3V

C135

C135
1uF_6.3V

1uF_6.3V

C142

C142
1uF_6.3V

1uF_6.3V

C962

C962
1uF_6.3V

1uF_6.3V

MC955

MC955

4.7uF_6.3V

4.7uF_6.3V

C956

C956
10uF_X6S

10uF_X6S

C121

C121
1uF_6.3V

1uF_6.3V

Use 0R

B69

B69

MB67

MB67

220R_2A

220R_2A

B67

B67

220R_2A

220R_2A
NS64 NS_VIANS64 NS_VIA

1 2

GND_MPVSS

C153

C153
1uF_6.3V

1uF_6.3V

C143

C143
1uF_6.3V

1uF_6.3V

C982

C982
1uF_6.3V

1uF_6.3V

C963

C963
1uF_6.3V

1uF_6.3V

C973

C973
100nF_6.3V

100nF_6.3V

MC956

MC956

4.7uF_6.3V

4.7uF_6.3V

C958

C958
10uF_X6S

10uF_X6S

NS122 NS_VIANS122 NS_VIA

+DPLL_PVDD

DNI

C136

C136
1uF_6.3V

1uF_6.3V

C983

C983
1uF_6.3V

1uF_6.3V

C964

C964
1uF_6.3V

1uF_6.3V

C974

C974
100nF_6.3V

100nF_6.3V

1 2

GND_VSSRHC

+3.3V

+DPLL_VDDC

GND_PVSS

GND_MPVSS

GND_MPVSS

C154

C154
1uF_6.3V

1uF_6.3V

C144

C144
1uF_6.3V

1uF_6.3V

C984

C984
1uF_6.3V

1uF_6.3V

MC958

MC958

4.7uF_6.3V

4.7uF_6.3V

C959

C959
10uF_X6S

10uF_X6S

+MPVDD

C155

C155
1uF_6.3V

1uF_6.3V

C138

C138
1uF_6.3V

1uF_6.3V

C145

C145
1uF_6.3V

1uF_6.3V

C985

C985
1uF_6.3V

1uF_6.3V

C965

C965
1uF_6.3V

1uF_6.3V

C130

C130
100nF_6.3V

100nF_6.3V

MC959

MC959

4.7uF_6.3V

4.7uF_6.3V

C126

C126
10uF_X6S

10uF_X6S

NS123 NS_VIANS123 NS_VIA

1 2

GND_VSSRHD

C91

C91
100nF_6.3V

100nF_6.3V

+VDDR_DVP

C60

C60
10uF_X6S

10uF_X6S

C62

C62
10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

C156

C156
1uF_6.3V

1uF_6.3V

C139

C139
1uF_6.3V

1uF_6.3V

C146

C146
1uF_6.3V

1uF_6.3V

C986

C986
1uF_6.3V

1uF_6.3V

C967

C967

C966

C966

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C131

C131
100nF_6.3V

100nF_6.3V

MC126

MC126

4.7uF_6.3V

4.7uF_6.3V

C127

C127
10uF_X6S

10uF_X6S

NS120 NS_VIANS120 NS_VIA

1 2
GND_VSSRHA

C122

C122
1uF_6.3V

1uF_6.3V

C92

C92
100nF_6.3V

100nF_6.3V

C94

C94
10uF_X6S

10uF_X6S

C68

C68
1uF_6.3V

1uF_6.3V

C64

C64
10nF

10nF

C67

C67

1uF_6.3V

1uF_6.3V

C157

C157
1uF_6.3V

1uF_6.3V

C975

C975

C976

C976

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C148

C148

C147

C147

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C987

C987
1uF_6.3V

1uF_6.3V

C968

C968
1uF_6.3V

1uF_6.3V

C134

C134
100nF_6.3V

100nF_6.3V

MC127

MC127

4.7uF_6.3V

4.7uF_6.3V

Overlapped Footprints

C128

C128
10uF_X6S

10uF_X6S

C120

C120

1uF_6.3V

1uF_6.3V

C123

C123
1uF_6.3V

1uF_6.3V

C93

C93
100nF_6.3V

100nF_6.3V

C95

C95
1uF_6.3V

1uF_6.3V

C69

C69
100nF_6.3V

100nF_6.3V

C61

C61
100nF_6.3V

100nF_6.3V

C66

C66

C988

C988
1uF_6.3V

1uF_6.3V

C137

C137
100nF_6.3V

100nF_6.3V

+DPLL_PVDD

GND_PVSS

+DPLL_VDDC

C63

C63
1uF_6.3V

1uF_6.3V

C65

C65

100nF_6.3V

100nF_6.3V

+MVDD

C150

C150
1uF_6.3V

1uF_6.3V

C132

C132
1uF_6.3V

1uF_6.3V

D D

C C

B B

A A

+MVDD

C140

C140
1uF_6.3V

1uF_6.3V

C980

C980
1uF_6.3V

1uF_6.3V

C960

C960
1uF_6.3V

1uF_6.3V

C971

C971
100nF_6.3V

100nF_6.3V

MC954

MC954

4.7uF_6.3V

4.7uF_6.3V

C954

C954
10uF_X6S

10uF_X6S

B120

B120

B121

B121

BLM15BD121SN1

BLM15BD121SN1

NS121 NS_VIANS121 NS_VIA

1 2

GND_VSSRHB

B122

B122

BLM15BD121SN1

BLM15BD121SN1

B123

B123

BLM15BD121SN1

BLM15BD121SN1

+1.8V

+1.1V

+VDDCI_LDO

+VDDC

C955

C955
10uF_X6S

10uF_X6S

BLM15BD121SN1

BLM15BD121SN1

C158

C158
1uF_6.3V

1uF_6.3V

C977

C977
1uF_6.3V

1uF_6.3V

C149

C149
1uF_6.3V

1uF_6.3V

C969

C969
1uF_6.3V

1uF_6.3V

MC128

MC128

4.7uF_6.3V

4.7uF_6.3V

C97

C97
100nF_6.3V

100nF_6.3V

+MPVDD

C159

C159
1uF_6.3V

1uF_6.3V

C989

C989
1uF_6.3V

1uF_6.3V

+VDDRHA

+VDDRHB

C96

C96
1uF_6.3V

1uF_6.3V

4

C978

C978
1uF_6.3V

1uF_6.3V

C979

C979
1uF_6.3V

1uF_6.3V

C970

C970
1uF_6.3V

1uF_6.3V

+VDDRHC

+VDDRHD

C98

C98
100nF_6.3V

100nF_6.3V

U1G

U1G

G14

VDDR1#1

G18

VDDR1#2

G22

VDDR1#3

G26

VDDR1#4

G30

VDDR1#5

R34

VDDR1#6

G40

VDDR1#7

T15

VDDR1#8

M26

VDDR1#9

AD15

VDDR1#10

P29

VDDR1#11

L38

VDDR1#12

M39

VDDR1#13

L10

VDDR1#14

N19

VDDR1#15

M32

VDDR1#16

N16

VDDR1#17

P25

VDDR1#18

K35

VDDR1#19

P7

VDDR1#20

T19

VDDR1#21

R22

VDDR1#22

K43

VDDR1#23

P41

VDDR1#24

P45

VDDR1#25

T12

VDDR1#26

V38

VDDR1#27

U40

VDDR1#28

V7

VDDR1#29

V45

VDDR1#30

AA14

VDDR1#31

AB45

VDDR1#32

AA40

VDDR1#33

AB7

VDDR1#34

W15

VDDR1#35

AD43

VDDR1#36

AC37

VDDR1#37

AB10

VDDR1#38

AE13

VDDR1#39

AF7

VDDR1#40

AH11

VDDR1#41

AF15

VDDR1#42

AK7

VDDR1#43

AL13

VDDR1#44

AP7

VDDR1#45

AP12

VDDR1#46

BC14

VDDR1#47

AU11

VDDR1#48

AV7

VDDR1#49

BA10

VDDR1#50

AW14

VDDR1#51

AT15

VDDR1#52

V42

VDDRHA

V41

VSSRHA

L31

VDDRHB

L29

VSSRHB

W12

VDDRHC

W11

VSSRHC

AM12

VDDRHD

AM11

VSSRHD

AT26

VDDR3#1

AT27

VDDR3#2

AT29

VDDR3#3

AT30

VDDR3#4

BF23

VDDR4#1

BH23

VDDR4#2

BK23

VDDR4#3

BE22

VDDR5#1

BG22

VDDR5#2

BJ22

VDDR5#3

BA35

DPLL_PVDD

BB35

DPLL_PVSS

BC35

DPLL_VDDC

T22

MPVDD

T23

MPVSS

Y19

NC_15

W20

NC_16

W19

NC_17

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 7 OF 10

Part 7 OF 10

Memory I/O

Memory I/O

P

P
O

O
W

W
E

E
R

R

PCIE_PVDD

PCIE_VDDC1
PCIE_VDDC2
PCIE_VDDC3
PCIE_VDDC4
PCIE_VDDC5
PCIE_VDDC6
PCIE_VDDC7
PCIE_VDDC8

PCIE_VDDC9
PCIE_VDDC10
PCIE_VDDC11
PCIE_VDDC12

PCIE_VDDR1

PCIE_VDDR2

PCIE_VDDR3

PCIE_VDDR4

PCI-Express

PCI-Express

PCIE_VDDR5

PCIE_VDDR6

PCIE_VDDR7

PCIE_VDDR8

Core

Core

VDDC0
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8

VDDC9
VDDC10
VDDC11
VDDC12
VDDC13
VDDC14
VDDC15
VDDC16
VDDC17
VDDC18
VDDC19
VDDC20
VDDC21
VDDC22
VDDC23
VDDC24
VDDC25
VDDC26
VDDC27
VDDC28
VDDC29
VDDC30
VDDC31
VDDC32
VDDC33
VDDC34
VDDC35
VDDC36
VDDC37
VDDC38
VDDC39
VDDC40
VDDC41
VDDC42
VDDC43
VDDC44
VDDC45
VDDC46
VDDC47
VDDC48
VDDC49
VDDC50
VDDC51
VDDC52
VDDC53
VDDC54
VDDC55
VDDC56
VDDC57
VDDC58
VDDC59
VDDC60
VDDC61
VDDC62
VDDC63
VDDC64
VDDC65
VDDC66
VDDC67
VDDC68
VDDC69
VDDC70
VDDC71
VDDC72
VDDC73
VDDC74

VDDCI1
VDDCI2
VDDCI3
VDDCI4
VDDCI5
VDDCI6
VDDCI7
VDDCI8

VDD_CT1
VDD_CT2
VDD_CT3

3

AY51
AF36

AF37
AG36
AG37
AH36
AH37
AK36
AK37
AL36
AL37
AN36
AF38

AW40
AW41
AY41
AY42
AY43
AY45
AY47
BA46

AM19
W26
W28
W31
W33
Y25
Y27
Y30
Y32
AA24
AA26
AA28
AA31
AA33
AB22
AB25
AB27
AB30
AB32
AD21
AD24
AD26
AD28
AD31
AD33
AE20
AE22
AE25
AE27
AE30
AE32
AF19
AF21
AF24
AF26
AF28
AF31
AF33
AG20
AG22
AG25
AG27
AG30
AG32
AH19
AH21
AH24
AH26
AH28
AH31
AH33
AK20
AK22
AK25
AK27
AK30
AK32
AL19
AL21
AL24
AL26
AL28
AL31
AL33
AM22
AM25
AM27
AM30
AM32
AN21
AN24
AN26
AN28
AN31
AN33

W21
W24
Y20
Y22
AA19
AA21
AB20
AD19

BG14
BJ14
BL14

C161

C161
1uF_6.3V

1uF_6.3V

C171

C171
1uF_6.3V

1uF_6.3V

C1125

C1125
10uF_X6S

10uF_X6S

C1102

C1102
1uF_6.3V

1uF_6.3V

C1111

C1111
1uF_6.3V

1uF_6.3V

C911

C911
1uF_6.3V

1uF_6.3V

C78

C78
100nF_6.3V

100nF_6.3V

C900

C900
1uF_6.3V

1uF_6.3V

C940

C940
1uF_6.3V

1uF_6.3V

MC1125

MC1125

4.7uF_6.3V

4.7uF_6.3V

C162

C162
1uF_6.3V

1uF_6.3V

C172

C172
1uF_6.3V

1uF_6.3V

C941

C941
1uF_6.3V

1uF_6.3V

C1136

C1136
10uF_X6S

10uF_X6S

MC1136

MC1136

4.7uF_6.3V

4.7uF_6.3V

C1103

C1103
1uF_6.3V

1uF_6.3V

C1112

C1112
1uF_6.3V

1uF_6.3V

C1123

C1123
100nF_6.3V

100nF_6.3V

C913

C913
1uF_6.3V

1uF_6.3V

C79

C79
100nF_6.3V

100nF_6.3V

C930

C930
10nF

10nF

C920

C920
1uF_6.3V

1uF_6.3V

C901

C901
100nF_6.3V

100nF_6.3V

C163

C163
1uF_6.3V

1uF_6.3V

C173

C173
1uF_6.3V

1uF_6.3V

C1104

C1104
1uF_6.3V

1uF_6.3V

C1114

C1114
1uF_6.3V

1uF_6.3V

C77

C77
1uF_6.3V

1uF_6.3V

C931

C931
100nF_6.3V

100nF_6.3V

C921

C921
1uF_6.3V

1uF_6.3V

C902

C902
1uF_6.3V

1uF_6.3V

C946

C946
1uF_6.3V

1uF_6.3V

C1137

C1137
10uF_X6S

10uF_X6S

MC1137

MC1137

4.7uF_6.3V

4.7uF_6.3V

C180

C180
100nF_6.3V

100nF_6.3V

C914

C914
100nF_6.3V

100nF_6.3V

C164

C164
1uF_6.3V

1uF_6.3V

C174

C174
1uF_6.3V

1uF_6.3V

C1115

C1115
1uF_6.3V

1uF_6.3V

+PCIE_PVDD

C932

C932
10uF_X6S

10uF_X6S

C922

C922
1uF_6.3V

1uF_6.3V

C903

C903
1uF_6.3V

1uF_6.3V

C165

C165
1uF_6.3V

1uF_6.3V

C175

C175
1uF_6.3V

1uF_6.3V

C948

C948
1uF_6.3V

1uF_6.3V

C1138

C1138
10uF_X6S

10uF_X6S

MC1138

MC1138

4.7uF_6.3V

4.7uF_6.3V

Overlapped Footprints

C1100

C1100

C1107

C1107

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C1116

C1116
1uF_6.3V

1uF_6.3V

C942

C942
100nF_6.3V

100nF_6.3V

C915

C915
100nF_6.3V

100nF_6.3V

B76

B76

+VDD_CT

C76

C76

BLM15BD121SN1

BLM15BD121SN1

1uF_6.3V

1uF_6.3V

C933

C933
1uF_6.3V

1uF_6.3V

C923

C923
1uF_6.3V

1uF_6.3V

C904

C904
100nF_6.3V

100nF_6.3V

C166

C166
1uF_6.3V

1uF_6.3V

C176

C176
1uF_6.3V

1uF_6.3V

C1139

C1139
10uF_X6S

10uF_X6S

MC1139

MC1139

4.7uF_6.3V

4.7uF_6.3V

C1117

C1117
1uF_6.3V

1uF_6.3V

C1113

C1113
100nF_6.3V

100nF_6.3V

C918

C918

4.7uF_6.3V

4.7uF_6.3V

+1.8V

2

C949

C949
1uF_6.3V

1uF_6.3V

C1121

C1121
1uF_6.3V

1uF_6.3V

C924

C924
1uF_6.3V

1uF_6.3V

C905

C905
1uF_6.3V

1uF_6.3V

C167

C167
1uF_6.3V

1uF_6.3V

C177

C177
1uF_6.3V

1uF_6.3V

C182

C182
10uF_X6S

10uF_X6S

MC182

MC182

4.7uF_6.3V

4.7uF_6.3V

C947

C947
100nF_6.3V

100nF_6.3V

C919

C919
10uF_X6S

10uF_X6S

B930

B930

BLM15BD121SN1

BLM15BD121SN1

C925

C925
1uF_6.3V

1uF_6.3V

C906

C906
1uF_6.3V

1uF_6.3V

C168

C168
1uF_6.3V

1uF_6.3V

C179

C179
1uF_6.3V

1uF_6.3V

C183

C183
10uF_X6S

10uF_X6S

C1122

C1122
1uF_6.3V

1uF_6.3V

C1110

C1110
1uF_6.3V

1uF_6.3V

+1.8V

C907

C907

4.7uF_6.3V

4.7uF_6.3V

C169

C169
1uF_6.3V

1uF_6.3V

C186

C186
1uF_6.3V

1uF_6.3V

MC183

MC183

4.7uF_6.3V

4.7uF_6.3V

C1127

C1127
1uF_6.3V

1uF_6.3V

C1130

C1130
1uF_6.3V

1uF_6.3V

C178

C178
100nF_6.3V

100nF_6.3V

C926

C926
10uF_X6S

10uF_X6S

+VDDCI

C170

C170
1uF_6.3V

1uF_6.3V

C1133

C1133
1uF_6.3V

1uF_6.3V

+PCIE_VDDC

C185

C185
1uF_6.3V

1uF_6.3V

MC187

MC187

4.7uF_6.3V

4.7uF_6.3V

C1128

C1128
1uF_6.3V

1uF_6.3V

C1131

C1131
100nF_6.3V

100nF_6.3V

+PCIE_VDDR

C160

C160
1uF_6.3V

1uF_6.3V

C1132

C1132
1uF_6.3V

1uF_6.3V

C943

C943
100nF_6.3V

100nF_6.3V

MR9100RMR910
0R
MR9110RMR911
0R

B911 220R_2AB911 220R_2A

B910 220R_2AB910 220R_2A

B920 220R_2AB920 220R_2A

26R_600mA

26R_600mA

C184

C184
1uF_6.3V

1uF_6.3V

MC181

MC181

4.7uF_6.3V

4.7uF_6.3V

+VDDC

C1129

C1129
1uF_6.3V

1uF_6.3V

C1134

C1134
1uF_6.3V

1uF_6.3V

+VDDCI_LDO

See BOM for qualified option

B900

B900

1

+1.1V

+1.8V

+VDDC

+VDDC

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

5

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Power

RH RV670 - ASIC Power

4

www.vinafix.vn

3

2

RH RV670 - ASIC Power

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

421

of

421

of

421

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

4

3

2

1

+MVDD

R291

R291

40.2R

40.2R

402
1%

R292

R292
100R

100R

402
1%

DQA_[63..0](9)

C291

C291
100nF_6.3V

100nF_6.3V

C293

C293
100nF_6.3V

100nF_6.3V

C294

C294
10nF

10nF

C292

C292
10nF

10nF

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

MVREFD_A
MVREFS_A

U1C

U1C

AB47

DQA_0

AB49

DQA_1

AB51

DQA_2

AA46

DQA_3

Y51

DQA_4

V47

DQA_5

W48

DQA_6

W46

DQA_7

V49

DQA_8

V51

DQA_9

U46

DQA_10

U50

DQA_11

P49

DQA_12

P47

DQA_13

R48

DQA_14

R46

DQA_15

AD38

DQA_16

AD39

DQA_17

AD40

DQA_18

AD41

DQA_19

AC39

DQA_20

AA42

DQA_21

Y43

DQA_22

Y42

DQA_23

P51

DQA_24

N50

DQA_25

N46

DQA_26

M47

DQA_27

K51

DQA_28

K49

DQA_29

L48

DQA_30

K47

DQA_31

J43

DQA_32

K45

DQA_33

H46

DQA_34

H49

DQA_35

H51

DQA_36

A46

DQA_37

C49

DQA_38

C46

DQA_39

U42

DQA_40

R41

DQA_41

R42

DQA_42

R43

DQA_43

J40

DQA_44

L42

DQA_45

K42

DQA_46

N41

DQA_47

F44

DQA_48

E42

DQA_49

C42

DQA_50

A44

DQA_51

A40

DQA_52

C40

DQA_53

E40

DQA_54

F39

DQA_55

B39

DQA_56

C38

DQA_57

A38

DQA_58

E38

DQA_59

C36

DQA_60

B35

DQA_61

F35

DQA_62

A36

DQA_63

AC46

MVREFDA

AC43

MVREFSA

AD37

NC_8

AC36

NC_9

U36

NC_31

V40

NC_32

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 3 of 10

Part 3 of 10

MEMORY INTERFACE

A

MEMORY INTERFACE

A

DDR1 DDR2 DDR3

DDR1 DDR2 DDR3

read strobe

bidir. strobe

read strobe

bidir. strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

DQMAB_0
DQMAB_1
DQMAB_2
DQMAB_3
DQMAB_4
DQMAB_5
DQMAB_6
DQMAB_7

QSA_0

QSA_1

QSA_2

QSA_3

QSA_4

QSA_5

QSA_6

QSA_7
QSA_0B

QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B

ODTA0

ODTA1

CLKA0
CLKA0B

CKEA0
RASA0B
CASA0B

WEA0B

CSA0B_0
CSA0B_1

CLKA1
CLKA1B

CKEA1
RASA1B
CASA1B

WEA1B

CSA1B_0
CSA1B_1

U38
U39
R37
Y38
AA37
Y37
Y39
Y40
K39
K38
M38
M37
P38
P39
L40
K40

Y49
T47
AC42
M49
F49
P43
F41
D37

AA50
T51
AC41
L46
C51
N43
A42
E36

Y47
T49
AA43
M51
F46
N42
D41
F37

V37
AA41

V43
U43

R38
P37
R40
Y36
AA38

V36

G38
J39

L37
J37
J35
N37
P40

K37

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9

MAA_10

MAA_11

MAA_12
MAA_13
MAA_14
MAA_15

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

QSAb_0
QSAb_1
QSAb_2
QSAb_3
QSAb_4
QSAb_5
QSAb_6
QSAb_7

CLKA0 (9)
CLKA0b (9)

CLKA1 (9)
CLKA1b (9)

DQMAb_[7..0] (9)

QSA_[7..0] (9)

QSAb_[7..0] (9)

CKEA0 (9)
RASA0b (9)
CASA0b (9)
WEA0b (9)
CSA0b_0 (9)

CKEA1 (9)
RASA1b (9)
CASA1b (9)
WEA1b (9)
CSA1b_0 (9)

MAA_[15..0] (9)

+MVDD

+MVDD

R391

R391

40.2R

40.2R

402
1%

R392

R392
100R

100R

402
1%

R393

R393

40.2R

40.2R

402
1%

R394

R394
100R

100R

402
1%

C391

C391
100nF_6.3V

100nF_6.3V

C393

C393
100nF_6.3V

100nF_6.3V

C392

C392
10nF

10nF

C394

C394
10nF

10nF

D D

C C

B B

+MVDD

R293

R293

40.2R

40.2R

402
1%

R294

R294
100R

100R

402
1%

DRAM_RST(9,10)

MVREFD_B
MVREFS_B

R495

R495

4.7K

4.7K

R395

R395

4.7K

4.7K

DQB_[63..0](9)

+MVDD

MR295

MR295

2.0K

2.0K

R295

R295

4.7K

4.7K

DNI

R296

R296

4.7K

4.7K

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

R297

R297

4.7K

4.7K

BF11
BL12
BJ12

E34
C34
A34
F33
A32
F31
B31
E30
R35
P35
N35
M35
N34
K32
K31

J31
C30
A30
F29
D29
B27
E26
F27
C26
A26
F25
D25
E24
A22
E22
C22
B23
F21
D21
E20
C20
A18
C18
E18
F17
M23
L25

J25
L23
M22
M20

J20
K20
D17
E16
C16
A16
F13
A14
C14
D13
K17
L17
L19

J16

J13
M17
K14
K13

J34
G34

T35
T34

J29
M29

U1D

U1D

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFDB
MVREFSB

DRAM_RST
TEST_MCLK
TEST_YCLK
NC_10

NC_11
NC_33
NC_34

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 4 of 10

Part 4 of 10

MEMORY INTERFACE

MEMORY INTERFACE

DDR1 DDR2

DDR1 DDR2

bidir. strobe

bidir. strobe

Not used

Not used

For DDR2

For DDR2

L28

MAB_0

N28

MAB_1

T29

MAB_2

P31

MAB_3

R32

MAB_4

P32

MAB_5

N32

MAB_6

M31

MAB_7

N22

MAB_8

R23

MAB_9

T25

MAB_10

R26

MAB_11

J26

MAB_12

R28

MAB_13

P26

MAB_14

N23

MAB_15

C32

DQMBB_0

L34

DQMBB_1

E28

DQMBB_2
DQMBB_3
DQMBB_4
DQMBB_5
DQMBB_6
DQMBB_7

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

QSB_0B

read strobe

read strobe

QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B

write strobe

write strobe

ODTB0
ODTB1

CLKB0

CLKB0B

CKEB0
RASB0B
CASB0B

WEB0B

CSB0B_0
CSB0B_1

CLKB1
CLKB1B

CKEB1
RASB1B
CASB1B

WEB1B

CSB1B_0
CSB1B_1

C24
A20
J23
E14
J17

D33
K34
A28
F23
B19
K23
F15
K16

E32
J32
C28
A24
F19
K22
B15
J14

N20
K25

K28
J28

K26
T28
P28
R31
T31

L32
J19

K19

R25
N17
P20
N26
M25

P17

B

B

DDR3

DDR3

bidir. differential strobe

bidir. differential strobe

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8

MAB_9
MAB_10
MAB_11

MAB_13
MAB_14
MAB_15

DQMBb_0
DQMBb_1

DQMBb_2

DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

QSB_0

QSB_1

QSB_2

QSB_3

QSB_4

QSB_5

QSB_6

QSB_7
QSBb_0

QSBb_1
QSBb_2
QSBb_3
QSBb_4
QSBb_5
QSBb_6
QSBb_7

MAB_12

CLKB0 (9)
CLKB0b (9)

CLKB1 (9)
CLKB1b (9)

MAB_[15..0] (9)

DQMBb_[7..0] (9)

QSB_[7..0] (9)

QSBb_[7..0] (9)

CKEB0 (9)
RASB0b (9)
CASB0b (9)
WEB0b (9)
CSB0b_0 (9)

CKEB1 (9)
RASB1b (9)
CASB1b (9)
WEB1b (9)
CSB1b_0 (9)

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Memory Interface (Channel A & B)

RH RV670 - ASIC Memory Interface (Channel A & B)

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Memory Interface (Channel A & B)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

521

of

521

of

521

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

4

3

2

1

+MVDD

R491

R491

40.2R

40.2R

402
1%

R492

R492
100R

100R

402
1%

DQC_[63..0](10)

C491

C491
100nF_6.3V

100nF_6.3V

C493

C493
100nF_6.3V

100nF_6.3V

C494

C494
10nF

10nF

C492

C492
10nF

10nF

DQC_0
DQC_1
DQC_2
DQC_3
DQC_4
DQC_5
DQC_6
DQC_7
DQC_8
DQC_9
DQC_10
DQC_11
DQC_12
DQC_13
DQC_14
DQC_15
DQC_16
DQC_17
DQC_18
DQC_19
DQC_20
DQC_21
DQC_22
DQC_23
DQC_24
DQC_25
DQC_26
DQC_27
DQC_28
DQC_29
DQC_30
DQC_31
DQC_32
DQC_33
DQC_34
DQC_35
DQC_36
DQC_37
DQC_38
DQC_39
DQC_40
DQC_41
DQC_42
DQC_43
DQC_44
DQC_45
DQC_46
DQC_47
DQC_48
DQC_49
DQC_50
DQC_51
DQC_52
DQC_53
DQC_54
DQC_55
DQC_56
DQC_57
DQC_58
DQC_59
DQC_60
DQC_61
DQC_62
DQC_63

MVREFS_C

R298

R298
243R

243R

U1E

U1E

E12

DQC_0

C12

DQC_1

A12

DQC_2

F11

DQC_3

A10

DQC_4

G10

DQC_5

A8

DQC_6

F8

DQC_7

C8

DQC_8

C6

DQC_9

A3

DQC_10

F6

DQC_11

F1

DQC_12

H1

DQC_13

H6

DQC_14

K5

DQC_15

K12

DQC_16

J11

DQC_17

L9

DQC_18

L12

DQC_19

P11

DQC_20

P9

DQC_21

P10

DQC_22

R11

DQC_23

K3

DQC_24

K1

DQC_25

L6

DQC_26

L2

DQC_27

N6

DQC_28

N4

DQC_29

P5

DQC_30

P3

DQC_31

P1

DQC_32

R6

DQC_33

T5

DQC_34

R2

DQC_35

V1

DQC_36

V3

DQC_37

U4

DQC_38

V5

DQC_39

AA9

DQC_40

AA10

DQC_41

AB9

DQC_42

AA11

DQC_43

AF9

DQC_44

AE11

DQC_45

AE10

DQC_46

AE9

DQC_47

W6

DQC_48

W2

DQC_49

Y5

DQC_50

Y3

DQC_51

AB5

DQC_52

AB3

DQC_53

AB1

DQC_54

AC6

DQC_55

AC2

DQC_56

AD5

DQC_57

AD3

DQC_58

AD1

DQC_59

AF3

DQC_60

AF1

DQC_61

AG6

DQC_62

AG2

DQC_63

G12

MVREFDC

J12

MVREFSC

R19

MEMTEST

P19

NC_12

R16

NC_35

AB16

NC_36

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 5 of 10

Part 5 of 10

MEMORY INTERFACE

C

MEMORY INTERFACE

C

DDR3

DDR1 DDR2

DDR3

DDR1 DDR2

bidir. strobe

read strobe

bidir. strobe

read strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAC_0
MAC_1
MAC_2
MAC_3
MAC_4
MAC_5
MAC_6
MAC_7
MAC_8

MAC_9
MAC_10
MAC_11
MAC_12
MAC_13
MAC_14
MAC_15

DQMCB_0
DQMCB_1
DQMCB_2
DQMCB_3
DQMCB_4
DQMCB_5
DQMCB_6
DQMCB_7

QSC_0

QSC_1

QSC_2

QSC_3

QSC_4

QSC_5

QSC_6

QSC_7

QSC_0B
QSC_1B
QSC_2B
QSC_3B
QSC_4B
QSC_5B
QSC_6B
QSC_7B

ODTC0

ODTC1

CLKC0
CLKC0B

CKEC0
RASC0B
CASC0B

WEC0B

CSC0B_0
CSC0B_1

CLKC1
CLKC1B

CKEC1
RASC1B
CASC1B

WEC1B

CSC1B_0
CSC1B_1

R14
T13
R13
M13
L16
R17
M11
M14
AB13
AB14
AB12
AA12
V9
W13
W16
AA15

C10
C3
K9
M5
T3
AD11
AA4
AE6

B11
F3
M9
M1
U6
AD10
Y1
AF5

E10
J10
M10
M3
T1
AD9
AA6
AE4

AA16
V16

R9
R10

T10
V12
T9
L14
P16

V14

W9
W10

AD14
AE14
AD12
V11
V10

V15

MAC_0
MAC_1
MAC_2
MAC_3

MAC_4
MAC_5
MAC_6
MAC_7
MAC_8
MAC_9
MAC_10

MAC_11
MAC_12
MAC_13
MAC_14
MAC_15

DQMCb_0

DQMCb_1

DQMCb_2

DQMCb_3

DQMCb_4

DQMCb_5

DQMCb_6

DQMCb_7

QSC_0

QSC_1

QSC_2

QSC_3

QSC_4

QSC_5

QSC_6

QSC_7

QSCb_0

QSCb_1

QSCb_2

QSCb_3

QSCb_4

QSCb_5

QSCb_6

QSCb_7

CLKC0 (10)
CLKC0b (10)

CKEC0 (10)
RASC0b (10)
CASC0b (10)
WEC0b (10)
CSC0b_0 (10)

CLKC1 (10)
CLKC1b (10)

CKEC1 (10)
RASC1b (10)
CASC1b (10)
WEC1b (10)
CSC1b_0 (10)

MAC_[15..0] (10)

DQMCb_[7..0] (10)

QSC_[7..0] (10)

QSCb_[7..0] (10)

+MVDD

R591

R591

40.2R

40.2R

402
1%

R592

R592
100R

100R

402
1%

+MVDD

R593

R593

40.2R

40.2R

402
1%

R594

R594
100R

100R

402
1%

C591

C591
100nF_6.3V

100nF_6.3V

C593

C593
100nF_6.3V

100nF_6.3V

C592

C592
10nF

10nF

C594

C594
10nF

10nF

D D

C C

B B

+MVDD

R493

R493

40.2R

40.2R

402
1%

R494

R494
100R

100R

402
1%

MVREFD_D
MVREFS_DMVREFD_C

DQD_[63..0](10)

U1F

DQD_0
DQD_1
DQD_2
DQD_3
DQD_4
DQD_5
DQD_6
DQD_7
DQD_8
DQD_9
DQD_10
DQD_11
DQD_12
DQD_13
DQD_14
DQD_15
DQD_16
DQD_17
DQD_18
DQD_19
DQD_20
DQD_21
DQD_22
DQD_23
DQD_24
DQD_25
DQD_26
DQD_27
DQD_28
DQD_29
DQD_30
DQD_31
DQD_32
DQD_33
DQD_34
DQD_35
DQD_36
DQD_37
DQD_38
DQD_39
DQD_40
DQD_41
DQD_42
DQD_43
DQD_44
DQD_45
DQD_46
DQD_47
DQD_48
DQD_49
DQD_50
DQD_51
DQD_52
DQD_53
DQD_54
DQD_55
DQD_56
DQD_57
DQD_58
DQD_59
DQD_60
DQD_61
DQD_62
DQD_63

U1F

AH5

DQD_0

AH3

DQD_1

AH1

DQD_2

AJ6

DQD_3

AK1

DQD_4

AL6

DQD_5

AL2

DQD_6

AM5

DQD_7

AM3

DQD_8

AM1

DQD_9

AN6

DQD_10

AN4

DQD_11

AR6

DQD_12

AR2

DQD_13

AT5

DQD_14

AT3

DQD_15

AF11

DQD_16

AF12

DQD_17

AF13

DQD_18

AH12

DQD_19

AM10

DQD_20

AM9

DQD_21

AL11

DQD_22

AL10

DQD_23

AT1

DQD_24

AU6

DQD_25

AY1

DQD_26

AY3

DQD_27

AW2

DQD_28

AY5

DQD_29

AV5

DQD_30

AU4

DQD_31

BA6

DQD_32

BB5

DQD_33

BA4

DQD_34

BB3

DQD_35

BD1

DQD_36

BD3

DQD_37

BF3

DQD_38

BJ1

DQD_39

AU9

DQD_40

AT11

DQD_41

AV9

DQD_42

AV10

DQD_43

BB10

DQD_44

BA9

DQD_45

AW12

DQD_46

BB9

DQD_47

BC9

DQD_48

BF6

DQD_49

BJ3

DQD_50

BJ6

DQD_51

BG10

DQD_52

BL10

DQD_53

BJ10

DQD_54

BH11

DQD_55

BB14

DQD_56

BB15

DQD_57

BC15

DQD_58

BC10

DQD_59

BC11

DQD_60

AY13

DQD_61

BC13

DQD_62

BE12

DQD_63

AJ9

MVREFDD

AH9

MVREFSD

AE16

NC_13

AF16

NC_14

AP15

NC_37

AT14

NC_38

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 6 of 10

Part 6 of 10

MEMORY INTERFACE

D

MEMORY INTERFACE

D

DDR3

DDR1 DDR2

DDR3

DDR1 DDR2

bidir. strobe

read strobe

bidir. strobe

read strobe

bidir. differential strobe

bidir. differential strobe

Not used

Not used

write strobe

write strobe

For DDR2

For DDR2

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7
MAD_8

MAD_9
MAD_10
MAD_11
MAD_12
MAD_13
MAD_14
MAD_15

DQMDB_0
DQMDB_1
DQMDB_2
DQMDB_3
DQMDB_4
DQMDB_5
DQMDB_6
DQMDB_7

QSD_0

QSD_1

QSD_2

QSD_3

QSD_4

QSD_5

QSD_6

QSD_7

QSD_0B
QSD_1B
QSD_2B
QSD_3B
QSD_4B
QSD_5B
QSD_6B
QSD_7B

ODTD0

ODTD1

CLKD0

CLKD0B

CKED0

RASD0B
CASD0B

WED0B

CSD0B_0
CSD0B_1

CLKD1

CLKD1B

CKED1

RASD1B
CASD1B

WED1B

CSD1B_0
CSD1B_1

AJ16
AM14
AM13
AL14
AE15
AH15
AJ13
AJ15
AU15
AW15
AV17
AV14
AT13
AR16
AU14
AT17

AK3
AP5
AJ10
AV3
BB1
AY10
BL8
BB11

AJ4
AP1
AJ12
AW6
BD6
AY11
BL6
BB13

AK5
AP3
AJ11
AV1
BB7
AV11
BF8
BA13

AU17
AV12

AP10
AP9

AP13
AT12
AM15
AH14
AF14

AW17

AT10
AT9

BA14
AY15
BA15
AU12
AM16

AL15

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7
MAD_8
MAD_9
MAD_10
MAD_11
MAD_12
MAD_13
MAD_14
MAD_15

DQMDb_0
DQMDb_1
DQMDb_2
DQMDb_3
DQMDb_4
DQMDb_5
DQMDb_6
DQMDb_7

QSD_0
QSD_1
QSD_2
QSD_3
QSD_4
QSD_5
QSD_6
QSD_7

QSDb_0
QSDb_1
QSDb_2
QSDb_3
QSDb_4
QSDb_5
QSDb_6
QSDb_7

CLKD0 (10)
CLKD0b (10)

CKED0 (10)
RASD0b (10)
CASD0b (10)
WED0b (10)
CSD0b_0 (10)

CLKD1 (10)
CLKD1b (10)

CKED1 (10)
RASD1b (10)
CASD1b (10)
WED1b (10)
CSD1b_0 (10)

MAD_[15..0] (10)

DQMDb_[7..0] (10)

QSD_[7..0] (10)

QSDb_[7..0] (10)

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Memory Interface (Channel C & D)

RH RV670 - ASIC Memory Interface (Channel C & D)

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Memory Interface (Channel C & D)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

621

of

621

of

621

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

U1J

U1J

Part 10 OF 10

Part 10 OF 10

GPIO_0

VID_0

BA33

VID_0

AY33

VID_1

AW33

VID_2

AV33

VID_3

BA32

VID_4

AY32

VID_5

AW32

VID_6

BA30

VID_7

BB30

VPCLK0

AV30

VHAD_0

AW30

VHAD_1

BC29

VPHCTL

BC30

VIPCLK

BF15

DVPCLK

BJ20

DVPCNTL_0

BG20

DVPCNTL_1

BK15

DVPCNTL_2

BB20

DVPCNTL_MVP_0

BC20

DVPCNTL_MVP_1

DVO Port

DVO Port

BH15

DVPDATA_0

BG16

DVPDATA_1

BJ16

DVPDATA_2

BL16

DVPDATA_3

BH17

DVPDATA_4

BF17

DVPDATA_5

BL18

DVPDATA_6

BJ18

DVPDATA_7

BG18

DVPDATA_8

BK19

DVPDATA_9

BH19

DVPDATA_10

BF19

DVPDATA_11

AY21

DVPDATA_12

BA21

DVPDATA_13

BC21

DVPDATA_14

BB18

DVPDATA_15

BC18

DVPDATA_16

BC17

DVPDATA_17

BK21

DVPDATA_18

BH21

DVPDATA_19

BF21

DVPDATA_20

BL22

DVPDATA_21

AY20

DVPDATA_22

BA20

DVPDATA_23

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

VIP

VIP
Capture

Capture

VIP

VIP
Host

Host

RESERVED

RESERVED

No Connect

No Connect

35mil

35mil

35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil

DVP_MVP_CNTL_0

35mil

35mil

DVP_MVP_CNTL_1

35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil
35mil

35mil

VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
VID_7

DVOCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

VID_1(13)
VID_2(13)
VID_3(13)

For MVDD Setting
(Not for production)

D D

CrossFire

DVP_MVP_CNTL_0 : DE for bits D[12..23]
DVP_MVP_CNTL_1 : CLK for bits D[12..23]

C C

TP90

TP90

TP84

TP84
TP85

TP85
TP86

TP86
TP87

TP87
TP88

TP88
TP89

TP89

TP60

TP60
TP61

TP61
TP62

TP62
TP63

TP63
TP64

TP64
TP65

TP65
TP66

TP66
TP67

TP67
TP68

TP68
TP69

TP69
TP70

TP70
TP71

TP71
TP72

TP72
TP73

TP73
TP74

TP74
TP75

TP75
TP76

TP76
TP77

TP77
TP78

TP78
TP79

TP79
TP80

TP80
TP81

TP81
TP82

TP82
TP83

TP83

GPIO_1
GPIO_2
GPIO_3

General

General

GPIO_4

Purpose

Purpose

GPIO_5

I/O

I/O

GPIO_6

GPIO_7_BLON

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16_SSIN

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

GPIO_23_CLKREQB

GPIO_24_TRST

GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO

GENERICA
GENERICB
GENERICC

DVALID

VARY_BL

PSYNC

DIGON

NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30

AV18
AU18
AV20
AW18
BB17
BA18
AY24
AU20
AW21
AV21
AU21
BA23
AY23
AW23
AV23
AU23
BB24
AY18
BA17
BH13
BF13
BC24
AW24
AV24
AU24
AY26
AW26
AV26
AW27

BC26
BB23
BB26

BC23
AY29

AW29
AU29

AM20
AN20
AT23
BA26
AU35
AU33
AT33
BA29
AY27
AT24
AU27
AU30
BG24

4

GPIO_0
GPIO_1GPIO_1
GPIO_2GPIO_2

GPIO_7GPIO_7
GPIO_8GPIO_8
GPIO_9GPIO_9
GPIO_10GPIO_10
GPIO_11GPIO_11
GPIO_12GPIO_12
GPIO_13GPIO_13

HPD2HPD2
GPIO_15_PWRCNTL_0
EXT_12V_DETb
GPIO_17_INT
GPIO_18
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSb
PCIE_CLK_REQb
JTAG_MODE
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO

GENERICA
GENERICB
GENERICC

DVALIDDVALID
PSYNCPSYNC

GPIO_3
GPIO_4
GPIO_5
GPIO_6

CrossFire

FLOW_CONTROL_1 - Lower Cable
FLOW_CONTROL_2 - Upper Cable
SWAP_LOCK_1 - Lower Cable
SWAP_LOCK_2 - Upper Cable

RP60A33R RP60A33R

81

RP60B33R RP60B33R

72

RP60C33R RP60C33R

63

RP60D33R RP60D33R

54

HPD2 (15)

EXT_12V_DET (13)

GPIO_19_CTF (13)

R51KR5
1K

GPIO_8_R
GPIO_9_R
GPIO_10_R
ROMCSb_R

3

Place SW1 & SW2 on the bottom side
(easily accessible).
Clearly Mark A & B contacts on the
silkscreen.

R640RR64

MR640RMR64

0R

0R

ThermINT (18)

HOT_PLUG_DET (13)

GPIOs for VDDC Setting

GPIO_15_PWRCNTL_0 (13)

GPIO_18 (13)
GPIO_20_PWRCNTL_1 (13)

GPIO_21 (13)

GENERICA (17)

+3.3V

TR50

TR50
10K

10K

35mil

35mil

TP50

TP50

DNI

DNI

TBD

DNI

MR50 10KMR50 10K

MR51 10KMR51 10K

MR52 10KMR52 10K
MR53 10KMR53 10K

MR54 10KMR54 10K

NR55 1KNR55 1K
MR55 10KMR55 10K

MR56 10KMR56 10K

MR58 10KMR58 10K
MR59 10KMR59 10K
MR63 10KMR63 10K
MR62 10KMR62 10K
MR61 10KMR61 10K

MR65 10KMR65 10K

MR66 10KMR66 10K

MR67 10KMR67 10K

MR68 10KMR68 10K

MR70 10KMR70 10K

MR71 10KMR71 10K

MR72 10KMR72 10K

MR73 10KMR73 10K

MR74 10KMR74 10K

MR75 10KMR75 10K

MR76 10KMR76 10K

MR77 10KMR77 10K

MR78 10KMR78 10K
MR79 10KMR79 10K

MR60 10KMR60 10K

+3.3V

DNI

DNI

BUO

TBD

TBD

DNI

BUO

NTSC

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

2

R50 10KR50 10K

R51 10KR51 10K

R52 10KR52 10K
R53 10KR53 10K

R54 1KR54 1K

R55 10KR55 10K
VR55 1KVR55 1K

R56 10KR56 10K
NR56 1KNR56 1K

R57 10KR57 10K
R58 10KR58 10K
R59 10KR59 10K
R63 10KR63 10K
R62 10KR62 10K
R61 10KR61 10K

R65 10KR65 10K

R66 10KR66 10K

R67 10KR67 10K

R68 10KR68 10K

R70 10KR70 10K

R71 10KR71 10K

R72 10KR72 10K

R73 10KR73 10K

R74 10KR74 10K

R75 10KR75 10K

R76 10KR76 10K

R77 10KR77 10K

R78 10KR78 10K
R79 10KR79 10K

R60 10KR60 10K

PIN BASED STRAPS

GPIO_0

GPIO_1

GPIO_2

GPIO_2
GPIO_3

GPIO_3

SW2B

SW2B

BUO

DIP_SWX2

DIP_SWX2

GPIO_5

SW2A

SW2A

BUO

41

DIP_SWX2

DIP_SWX2

GPIO_6

BUO

41

SW1B

SW1B

GPIO_7GPIO_7

GPIO_8_R

DIP_SWX2

DIP_SWX2

GPIO_9_R

GENERICC

CONFIG[3]
CONFIG[2]
CONFIG[1]
CONFIG[0]

VSYNC1 (1,3,15)

HSYNC1 (1,3,15)

VSYNC2 (3,16)
HSYNC2 (3,16)

GPIO_13

GPIO_13
GPIO_12

GPIO_12
GPIO_11GPIO_11

GPIO_11GPIO_11

VSYNC1

VSYNC1

HSYNC1

PSYNC

PSYNC

VID_0

VID_0

VID_1

VID_1

VID_2

VID_2

VID_3

VID_3

VID_4

VID_4

VID_5

VID_5

VID_6

VID_6

VID_7

VID_7

VSYNC2

VSYNC2
HSYNC2

HSYNC2

DVALID

DVALID

32

SW1A

SW1A
DIP_SWX2

DIP_SWX2

BUO

32

GPIO_4

1

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)

0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

AMD Internal Use Only - Reserved (Default: 00)

DEBUG_ACCESS
AMD Internal Use Only - Reserved (Default: 0)

AMD Board Feature III - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

GPIO(9,13, 12,11) - CONFIG[3..0]

0010 - 512Kbit AT25F512A (Atmel)
0011 - 1Mbit AT25F1024A (Atmel)
0100 - 512Kbit M25P05A (ST)
0101 - 1Mbit M25P10A (ST)
0101 - 2Mbit M25P20 (ST)
0100 - 512Kbit Pm25LV512 (Chingis)
0101 - 1Mbit Pm25LV010 (Chingis)

AMD Internal Use Only - Reserved (Default: 0)

VIP_DEVICE_STRAP_EN

0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for
configurations without video-in)

AMD Board Feature II - Default (0)

VGA DISABLE : 1 for disable (set to 0 for normal operation)

AMD Internal Use Only - Reserved (Default: 0)

MSI_DIS (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Board Feature III - Default (0)

AMD Internal Use Only - Reserved (Default: 0)

64BAR_EN_A (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved (Default: 0)

AMD Internal Use Only - Reserved for memory strap

AMD Internal Use Only - Reserved

BIF_CLK_PM_EN (Default 0)
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability

(Default: 0)

AMD PCIE FEATURE I

AMD PCIE FEATURE II

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

Pull-Down Resistors are for BU until built-in pull-downs are verified.

B B

Place it at top edge of the
board on the bottom side.

CrossFire Card-Edge

Lower Cable Card Edge

1

DVOCLK
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7
DVPDATA_9
DVPDATA_11
DVPCNTL_1

A A

GPIO_3

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

J8002J8002

2
4
6
8

DVPDATA_0

10
12

DVPDATA_2

14
16

DVPDATA_4

18
20

DVPDATA_6

22
24

DVPDATA_8

26
28

DVPDATA_10

32

DVPCNTL_0

34
36

GPIO_5

38
40

Bundle B

5

Upper Cable Card Edge

1

DVP_MVP_CNTL_1
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GPIO_4

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

J8001J8001

2
4
6
8

DVPDATA_12

10
12

DVPDATA_14

14
16

DVPDATA_16

18
20

DVPDATA_18

22
24

DVPDATA_20

26
28

DVPDATA_22

32

DVALID_R

34
36

GPIO_6

38
40

Bundle A (closer to the bracket)

4

+3.3V

TC47

TC47
100nF_6.3V

100nF_6.3V

In production, this block
will not be populated.

Mating connector: 6010028300G
(HEADER 2X8 1.27MM PITCH, SMD)
When attaching the daughter card (B176) align it by mounting hole.

TR57 0RTR57 0R

DNI

1

JTAG_MODE

3
5
7

JTAG_TCK

9

JTAG_TMS

11

JTAG_TDI

13

JTAG_TDO

15

2X8SOCKET

2X8SOCKET

DNI

R8001 0RR8001 0R
R8002 0RR8002 0R

GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL

DVALID

DNI

GENERICB

www.vinafix.vn

TP47

TP47

TP46

TP46

35mil

35mil

35mil

35mil

For wire soldering

EXT_ADJ_1.8V

Place TRP61 & TR57 in a way

BUO

TJ47

TJ47

2

GPIO_8_T

4

ROMCSb_T

6

GPIO_9_T

8

GPIO_10_T

10

SDA

12

SCL

14
16

3

to minimize the stub when
they are not populated.

GPIO_8_R

TRP61C33R TRP61C33R

63

ROMCSb_R

TRP61D33R TRP61D33R

54

GPIO_9_R

TRP61B33R TRP61B33R

72

GPIO_10_R

TRP61A33R TRP61A33R

81

TC46

TC46
100nF_6.3V

100nF_6.3V

TR47

TR47

4.7K

4.7K

+3.3V+5V

TR48

TR48

4.7K

4.7K

BUOBUO

Note: GPIO_21 is also pin strap and must not have pull-up. See data book for details

GPIO_22_ROMCSb is pulled high by R46

SDA (3)
SCL (3)

+3.3V

R46

R46
10K

10K

U2

ROMCSb_R
GPIO_8_R

U2

1

CE#

VCC

2

SO

HOLD#

3

WP#

SCK

GND4SI

PM25LV512A-100SCE

PM25LV512A-100SCE

8
7
6
5

PN 2280007900G for 1Mbit (PM25LV010A-100SCE)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC DVO, VIP & GPIOs

RH RV670 - ASIC DVO, VIP & GPIOs

2

RH RV670 - ASIC DVO, VIP & GPIOs

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Sheet

Sheet

Sheet

C47

C47
100nF_6.3V

100nF_6.3V

GPIO_10_R
GPIO_9_R

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

of

721

of

721

of

721

1

Doc No.

Doc No.

Doc No.

BIOS1

BIOS1

BIOS

BIOS

113-B339XX-XXX

113-B339XX-XXX

VIDEO BIOS
FIRMWARE

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

D D

C C

B B

4

U1H

U1H

AC48

PCIE_VSS1

AC50

PCIE_VSS2

AD45

PCIE_VSS3

AD47

PCIE_VSS4

AE50

PCIE_VSS5

AU38

PCIE_VSS6

AF39

PCIE_VSS7

AF40

PCIE_VSS8

AF41

PCIE_VSS9

AF42

PCIE_VSS10

AF43

PCIE_VSS11

AF45

PCIE_VSS12

AF47

PCIE_VSS13

AG38

PCIE_VSS14

AG41

PCIE_VSS15

AG50

PCIE_VSS16

AH38

PCIE_VSS17

AH41

PCIE_VSS18

AH45

PCIE_VSS19

AH47

PCIE_VSS20

AJ50

PCIE_VSS21

AK38

PCIE_VSS22

AK41

PCIE_VSS23

AK45

PCIE_VSS24

AK47

PCIE_VSS25

AL38

PCIE_VSS26

AL41

PCIE_VSS27

AL50

PCIE_VSS28

AM45

PCIE_VSS29

AM47

PCIE_VSS30

AN38

PCIE_VSS31

AN41

PCIE_VSS32

AN50

PCIE_VSS33

AP38

PCIE_VSS34

AP41

PCIE_VSS35

AP45

PCIE_VSS36

AP47

PCIE_VSS37

AR50

PCIE_VSS38

AT38

PCIE_VSS39

AT41

PCIE_VSS40

AT45

PCIE_VSS41

AT47

PCIE_VSS42

AU41

PCIE_VSS43

AU50

PCIE_VSS44

AV45

PCIE_VSS45

AY49

PCIE_VSS46

AW50

PCIE_VSS47

AV47

PCIE_VSS48

A6

VSS95

A49

VSS96

B13

VSS97

B17

VSS98

B21

VSS99

B25

VSS100

B29

VSS101

B33

VSS102

B37

VSS103

B41

VSS104

C1

VSS105

C44

VSS106

D11

VSS107

D15

VSS108

D19

VSS109

D23

VSS110

D27

VSS111

D31

VSS112

D35

VSS113

D39

VSS114

F51

VSS115

G16

VSS116

G20

VSS117

G24

VSS118

G28

VSS119

G32

VSS120

G36

VSS121

G42

VSS122

H3

VSS123

H8

VSS124

H44

VSS125

J22

VSS126

J38

VSS127

J42

VSS128

K7

VSS129

K11

VSS130

K29

VSS131

L4

VSS132

L13

VSS133

L20

VSS134

L22

VSS135

L26

VSS136

L35

VSS137

L39

VSS138

L43

VSS139

L50

VSS140

M7

VSS141

M16

VSS142

M19

VSS143

M28

VSS144

M34

VSS145

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

Part 8 of 10

Part 8 of 10

PCI-Express GND

PCI-Express GND

Memory GND

Memory GND

VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246

M45
N2
N14
N25
N29
N31
N38
N40
N48
P12
P23
P34
P42
R4
R12
P22
R29
R39
R50
T7
T11
T14
T17
T20
R20
T26
T32
T45
U2
U37
U41
U48
V13
V39
W4
W14
W50
Y7
Y41
Y45
AA2
AA13
AA36
AA39
AA48
AB11
AB15
AC4
AC38
AC40
AD7
AD13
AD16
AD36
AD42
AE2
AE12
AL16
AF10
AG4
AH7
AH10
AH13
AH16
AJ2
AJ14
AL4
AL9
AL12
AM7
AP16
AN2
AP11
AP14
AR4
AT7
AU2
AU10
AU13
AV15
AW4
AV13
AY7
AY9
AY17
BA2
AY14
BG12
BD8
BF1
BE10
BE14
BE16
BE20
BA11
BJ8
BK11
BK13
BK17
BL3
BL20

3

U1I

U1I

AN19

W25
W27
W30
W32

Y21
Y24
Y26
Y28
Y31

Y33
AA20
AA22
AA25
AA27
AA30
AA32
AB19
AB21
AB24
AB26
AB28
AB31
AB33
AD20
AD22
AD25
AD27
AD30
AD32
AE19
AE21
AE24
AE26
AE28
AE31
AE33

AF20
AF22
AF25
AF27
AF30

AF32
AG19
AG21
AG24

RV670 XTX A11 MV ENABLE RH

RV670 XTX A11 MV ENABLE RH

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45

2

Part 9 OF 10

Part 9 OF 10

Core GND

Core GND

IO GND

IO GND

VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

AG26
AG28
AG31
AG33
AH20
AH22
AH25
AH27
AH30
AH32
AK19
AK21
AK24
AK26
AK28
AK31
AK33
AL20
AL22
AL25
AL27
AL30
AL32
AM21
AM24
AM26
AM28
AM31
AM33
AN22
AN25
AN27
AN30
AN32
W22

AT18
AT35
AU26
AV32
AW20
AY30
AY35
BA24
BA27
BB21
BB33
BE18
BE24
BJ51

1

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - ASIC Grounds

RH RV670 - ASIC Grounds

5

4

www.vinafix.vn

3

2

RH RV670 - ASIC Grounds

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

821

of

821

of

821

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

U201

U201

DQA_0

MAA_[15..0](5)

MAA_15
MAA_14
MAA_13
MAA_12
MAA_11
MAA_10
MAA_9
MAA_8
MAA_7
MAA_6
MAA_5

D D

DQMAb_[7..0](5)

C C

MAA_4
MAA_3
MAA_2
MAA_1
MAA_0

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

CASA0b(5)
CSA0b_0(5)

CKEA0(5)
WEA0b(5)

CLKA0(5)
CLKA0b(5)

R20360.4R R20360.4R
R20260.4R R20260.4R

CLKA0b(5)
CLKA0(5)

+MVDD

DRAM_RST(5,10) DRAM_RST(5,10)

R206

R206

R207 243RR207 243R

1.15K

1.15K

1%

+MVDD

R214

R214

B B

1.15K

1.15K

1%

R218

R218
2K74

2K74

1%

R212

R212
2K74

2K74

1%

C200

C200
100nF_6.3V

100nF_6.3V

C204

C204
100nF_6.3V

100nF_6.3V

T3

DQ31 | DQ23

DQA_2

T2

DQ30 | DQ22

DQA_1

R3

DQ29 | DQ21

DQA_3

R2

DQ28 | DQ20

DQA_6

M3

DQ27 | DQ19

DQA_4

N2

DQ26 | DQ18

DQA_5

L3

DQ25 | DQ17

DQA_7

M2

DQ24 | DQ16

DQA_28

T10

DQ23 | DQ31

DQA_31

T11

DQ22 | DQ30

DQA_29

R10

DQ21 | DQ29

DQA_30

R11

DQ20 | DQ28

DQA_26

M10

DQ19 | DQ27

DQA_24

N11

DQ18 | DQ26

DQA_27

L10

DQ17 | DQ25

DQA_25

M11

DQ16 | DQ24

DQA_17

G10

DQ15 | DQ7

DQA_16

F11

DQ14 | DQ6

DQA_18

F10

DQ13 | DQ5

DQA_19

E11

DQ12 | DQ4

DQA_20

C10

DQ11 | DQ3

DQA_23

C11

DQ10 | DQ2

DQA_22

B10

DQ9 | DQ1

DQA_21

B11

DQ8 | DQ0

DQA_8

G3

DQ7 | DQ15

DQA_9

F2

DQ6 | DQ14

DQA_10

F3

DQ5 | DQ13

DQA_11

E2

DQ4 | DQ12

DQA_12

C3

DQ3 | DQ11

DQA_15

C2

DQ2 | DQ10

DQA_14

B3

DQ1 | DQ9

DQA_13

B2

DQ0 | DQ8

MAA_4

K2

A0/A10 | A4/A8

MAA_5

H4

A1/BA0 | A5/BA1

MAA_6

K3

A2 /A12 | A6/BA2

MAA_7

L4

A3/A11 | A7/A9

MAA_0 MAA_8

K11

A4/A8 | A0/A10

MAA_1

H9

A5/BA1 | A1/BA0

MAA_2

K10

A6/BA2 | A2/A12

MAA_3

L9

A7/A9 | A3/A11

H2

RAS# | RFM

H11

RASA0b(5)

+MVDD

QSA_0
QSA_3
QSA_2
QSA_1

QSAb_0
QSAb_3
QSAb_2
QSAb_1

DQMAb_0
DQMAb_3
DQMAb_2
DQMAb_1

+MVDD

RFM | RAS#

G9

CS# | CAS#

G4

CAS# | CS#

H10

WE# | CKE#

H3

CKE# | WE#

J10

CK

J11

CK

P3

RDQS3 | RDQS2

P10

RDQS2 | RDQS3

D10

RDQS1 | RDQS0

D3

RDQS0 | RDQS1

P2

WDQS3 | WDQS2

P11

WDQS2 | WDQS3

D11

WDQS1 | WDQS0

D2

WDQS0 | WDQS1

N3

DM3 | DM2

N10

DM2 | DM3

E10

DM1 | DM0

E3

DM0 | DM1

V9

RESET

A4

ZQ

1%

J4

VREFC

C201

C201

J9

VREFD

10nF

10nF

23D41287QE08

23D41287QE08

C205

C205
10nF

10nF

+MVDD +MVDD

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

VDD

VSS

MF

+MVDD

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3
A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

QSAb_0
QSAb_1
QSAb_2
QSAb_3
QSAb_4
QSAb_5
QSAb_6
QSAb_7

+MVDDC

+MVDD +MVDD

A9

+MVDD

R216

R216

1.15K

1.15K

1%

R219

R219
2K74

2K74

1%

+MVDD

CLKA1(5)
CLKA1b(5)

QSA_[7..0] (5)

QSAb_[7..0] (5)

+MVDD

R209

R209

1.15K

1.15K

1%

R213

R213
2K74

2K74

1%

4

U202

U202

DQA_48

T3

DQ31 | DQ23

DQA_49

T2

DQ30 | DQ22

DQA_51

R3

DQ29 | DQ21

DQA_50

R2

DQ28 | DQ20

DQA_52

M3

DQ27 | DQ19

DQA_54

N2

DQ26 | DQ18

DQA_55

L3

DQ25 | DQ17

DQA_53

M2

DQ24 | DQ16

DQA_61

T10

DQ23 | DQ31

DQA_63

T11

DQ22 | DQ30

DQA_62

R10

DQ21 | DQ29

DQA_60

R11

DQ20 | DQ28

DQA_59

M10

DQ19 | DQ27

DQA_56

N11

DQ18 | DQ26

DQA_58

L10

DQ17 | DQ25

DQA_57

M11

DQ16 | DQ24

DQA_41

G10

DQ15 | DQ7

DQA_40

F11

DQ14 | DQ6

DQA_42

F10

DQ13 | DQ5

DQA_43

E11

DQ12 | DQ4

DQA_45

C10

DQ11 | DQ3

DQA_46

C11

DQ10 | DQ2

DQA_47

B10

DQ9 | DQ1

DQA_44

B11

DQ8 | DQ0

DQA_33

G3

DQ7 | DQ15

DQA_34

F2

DQ6 | DQ14

DQA_36

F3

DQ5 | DQ13

DQA_35

E2

DQ4 | DQ12

DQA_37

C3

DQ3 | DQ11

DQA_32

C2

DQ2 | DQ10

DQA_39

B3

DQ1 | DQ9

DQA_38

B2

DQ0 | DQ8

MAA_12

K2

A0/A10 | A4/A8

MAA_13

H4

A1/BA0 | A5/BA1

MAA_14

K3

A2 /A12 | A6/BA2

MAA_15

L4

A3/A11 | A7/A9

K11

A4/A8 | A0/A10

MAA_9

H9

A5/BA1 | A1/BA0

MAA_10

K10

A6/BA2 | A2/A12

MAA_11

L9

A7/A9 | A3/A11

H2

RAS# | RFM

RASA1b(5)
CASA1b(5)

CSA1b_0(5)
CKEA1(5)

WEA1b(5)

CLKA1b(5)
CLKA1(5)

R210 243RR210 243R

C202

C202
100nF_6.3V

100nF_6.3V

C206

C206
100nF_6.3V

100nF_6.3V

H11

RFM | RAS#

G9

CS# | CAS#

G4

CAS# | CS#

H10

WE# | CKE#

H3

CKE# | WE#

+MVDD

R20560.4R R20560.4R
R20460.4R R20460.4R

J10

CK

J11

C203

C203
10nF

10nF

+MVDD

1%

C207

C207
10nF

10nF

P3
P10
D10

D3

P2
P11
D11

D2

N3
N10
E10

E3

V9

A4

J4

J9

CK
RDQS3 | RDQS2

RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREFC
VREFD

23D41287QE08

23D41287QE08

QSA_6
QSA_7
QSA_5
QSA_4

QSAb_6
QSAb_7
QSAb_5
QSAb_4

DQMAb_6
DQMAb_7 DQMBb_3
DQMAb_5
DQMAb_4

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3
VSS#V10
VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2

VDD

A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3

VSS

A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

A9

MF

+MVDD

+MVDDC

MAB_[15..0](5)

CLKB0(5)
CLKB0b(5)

R314

R314

1.15K

1.15K

1%

R318

R318
2K74

2K74

1%

3

+MVDD

R306

R306

1.15K

1.15K

1%

R312

R312
2K74

2K74

1%

DQB_[63..0](5)DQA_[63..0](5)

+MVDD

+MVDD

MAB_15
MAB_14
MAB_13
MAB_12
MAB_11
MAB_10
MAB_9
MAB_8
MAB_7
MAB_6
MAB_5
MAB_4
MAB_3
MAB_2
MAB_1
MAB_0

R307 243RR307 243R

C300

C300
100nF_6.3V

100nF_6.3V

C304

C304
100nF_6.3V

100nF_6.3V

2

U301

U301

DQB_0

T3

DQ31 | DQ23

DQB_2

T2

DQ30 | DQ22

DQB_1

R3

DQ29 | DQ21

DQB_3

R2

DQ28 | DQ20

DQB_6

M3

DQ27 | DQ19

DQB_4

N2

DQ26 | DQ18

DQB_7

L3

DQ25 | DQ17

DQB_5

M2

DQ24 | DQ16

DQB_28

T10

DQ23 | DQ31

DQB_29

T11

DQ22 | DQ30

DQB_30

R10

DQ21 | DQ29

DQB_31

R11

DQ20 | DQ28

DQB_25

M10

DQ19 | DQ27

DQB_24

N11

DQ18 | DQ26

DQB_27

L10

DQ17 | DQ25

DQB_26

M11

DQ16 | DQ24

DQB_9

G10

DQ15 | DQ7

DQB_8

F11

DQ14 | DQ6

DQB_10

F10

DQ13 | DQ5

DQB_11

E11

DQ12 | DQ4

DQB_12

C10

DQ11 | DQ3

DQB_15

C11

DQ10 | DQ2

DQB_14

B10

DQ9 | DQ1

DQB_13

B11

DQ8 | DQ0

DQB_19

G3

DQ7 | DQ15

DQB_18

F2

DQ6 | DQ14

DQB_16

F3

DQ5 | DQ13

DQB_17

E2

DQ4 | DQ12

DQB_21

C3

DQ3 | DQ11

DQB_22

C2

DQ2 | DQ10

DQB_23

B3

DQ1 | DQ9

DQB_20

B2

DQ0 | DQ8

+MVDD

R30360.4R R30360.4R
R30260.4R R30260.4R

MAB_4

K2

A0/A10 | A4/A8

MAB_5 MAB_13

H4

A1/BA0 | A5/BA1

MAB_6

K3

A2 /A12 | A6/BA2

MAB_7

L4

A3/A11 | A7/A9

K11

A4/A8 | A0/A10

MAB_1

H9

A5/BA1 | A1/BA0

MAB_2

K10

A6/BA2 | A2/A12

MAB_3

L9

A7/A9 | A3/A11

H2

RAS# | RFM

QSB_0
QSB_3
QSB_1
QSB_2

QSBb_0
QSBb_3
QSBb_1
QSBb_2

DQMBb_0
DQMBb_1

DQMBb_2

C301

C301
10nF

10nF

+MVDD

1%

C305

C305
10nF

10nF

+MVDD

H11

G9
G4

H10

H3

J10
J11

P3
P10
D10

D3

P2
P11
D11

D2

N3
N10
E10

E3
V9
A4

J4
J9

23D41287QE08

23D41287QE08

RFM | RAS#
CS# | CAS#

CAS# | CS#
WE# | CKE#

CKE# | WE#

CK
CK

RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREFC
VREFD

RASB0b(5)
CASB0b(5)

CSB0b_0(5)
CKEB0(5)

WEB0b(5)

CLKB0b(5)
CLKB0(5)

DRAM_RST(5,10)

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

VDD

VSS

MF

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3
A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

+MVDDC

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

QSBb_0
QSBb_1
QSBb_2
QSBb_3
QSBb_4
QSBb_5
QSBb_6
QSBb_7

CLKB1(5)
CLKB1b(5)

+MVDD +MVDD

A9

DQMBb_[7..0](5)

+MVDD

R316

R316

1.15K

1.15K

1%

R319

R319
2K74

2K74

1%

+MVDD

R309

R309

1.15K

1.15K

1%

R313

R313
2K74

2K74

1%

QSB_[7..0] (5)

QSBb_[7..0] (5)

+MVDD

DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

RASB1b(5)
CASB1b(5)

CSB1b_0(5)
CKEB1(5)

WEB1b(5)

+MVDD

R30560.4R R30560.4R
R30460.4R R30460.4R

CLKB1b(5)
CLKB1(5)

QSBb_4
QSBb_6
QSBb_7
QSBb_5

DRAM_RST(5,10)

R310 243RR310 243R

C302

C302
100nF_6.3V

100nF_6.3V

C306

C306
100nF_6.3V

100nF_6.3V

DQB_32
DQB_34
DQB_33
DQB_35
DQB_36
DQB_38
DQB_39
DQB_37
DQB_55
DQB_53
DQB_52
DQB_54
DQB_49
DQB_48
DQB_51
DQB_50
DQB_57
DQB_56
DQB_58
DQB_59
DQB_61
DQB_63
DQB_62
DQB_60
DQB_40
DQB_41
DQB_42
DQB_43
DQB_47
DQB_44
DQB_46
DQB_45

MAB_12
MAB_14

MAB_15
MAB_8MAB_0
MAB_9
MAB_10
MAB_11

QSB_4
QSB_6
QSB_7
QSB_5

DQMBb_4
DQMBb_6
DQMBb_7
DQMBb_5

C303

C303
10nF

10nF

+MVDD

+MVDD

1%

C307

C307
10nF

10nF

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2

F3

E2
C3
C2

B3

B2

K2
H4

K3

L4

K11

H9

K10

L9
H2

H11

G9
G4

H10

H3

J10
J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

J4

J9

U302

U302

23D41287QE08

23D41287QE08

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

A0/A10 | A4/A8
A1/BA0 | A5/BA1
A2 /A12 | A6/BA2
A3/A11 | A7/A9
A4/A8 | A0/A10
A5/BA1 | A1/BA0
A6/BA2 | A2/A12
A7/A9 | A3/A11

RAS# | RFM
RFM | RAS#

CS# | CAS#
CAS# | CS#

WE# | CKE#
CKE# | WE#

CK
CK

RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREFC
VREFD

+MVDDC

1

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

C385

C385
10uF_X6S

10uF_X6S

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

+MVDDC
A2

VDD

A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3

VSS

A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

A9

MF

C386

C386

C387

C387

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

C325

C222

C252

C252

4.7uF_6.3V

4.7uF_6.3V

4

C221

C221
100nF_6.3V

100nF_6.3V

C243

C243
1uF_6.3V

1uF_6.3V

C271

C271
1uF_6.3V

1uF_6.3V

C276

C276
1uF_6.3V

1uF_6.3V

C222
100nF_6.3V

100nF_6.3V

C244

C244
1uF_6.3V

1uF_6.3V

C272

C272
1uF_6.3V

1uF_6.3V

C277

C277
1uF_6.3V

1uF_6.3V

C223

C223
100nF_6.3V

100nF_6.3V

C245

C245
1uF_6.3V

1uF_6.3V

C273

C273
1uF_6.3V

1uF_6.3V

C278

C278
1uF_6.3V

1uF_6.3V

C253

C253

4.7uF_6.3V

4.7uF_6.3V

C224

C224
100nF_6.3V

100nF_6.3V

C246

C246
1uF_6.3V

1uF_6.3V

C274

C274
1uF_6.3V

1uF_6.3V

C279

C279
1uF_6.3V

1uF_6.3V

C226

C226

C225

C225
100nF_6.3V

100nF_6.3V

C247

C247
1uF_6.3V

1uF_6.3V

C285

C285
10uF_X6S

10uF_X6S

100nF_6.3V

100nF_6.3V

C248

C248
1uF_6.3V

1uF_6.3V

C227

C227
1uF_6.3V

1uF_6.3V

C249

C249
1uF_6.3V

1uF_6.3V

C286

C286
10uF_X6S

10uF_X6S

C228

C228
1uF_6.3V

1uF_6.3V

C250

C250
1uF_6.3V

1uF_6.3V

C287

C287
10uF_X6S

10uF_X6S

C251

C251
1uF_6.3V

1uF_6.3V

www.vinafix.vn

C220

+MVDDC

C219

C219
100nF_6.3V

100nF_6.3V

C241

C241
1uF_6.3V

1uF_6.3V

C282

C282
10uF_X6S

10uF_X6S

C220
100nF_6.3V

100nF_6.3V

C242

C242
1uF_6.3V

1uF_6.3V

C270

C270
1uF_6.3V

1uF_6.3V

C275

C275
1uF_6.3V

1uF_6.3V

C214

C208

C208
100nF_6.3V

100nF_6.3V

C230

C230
1uF_6.3V

1uF_6.3V

C209

C209
100nF_6.3V

100nF_6.3V

C231

C231
1uF_6.3V

1uF_6.3V

C210

C210
100nF_6.3V

100nF_6.3V

C232

C232
1uF_6.3V

1uF_6.3V

C211

C211
100nF_6.3V

100nF_6.3V

C233

C233
1uF_6.3V

1uF_6.3V

C212

C212
100nF_6.3V

100nF_6.3V

C234

C234
1uF_6.3V

1uF_6.3V

C213

C213
100nF_6.3V

100nF_6.3V

C235

C235
1uF_6.3V

1uF_6.3V

C214
100nF_6.3V

100nF_6.3V

C236

C236
1uF_6.3V

1uF_6.3V

C215

C215
100nF_6.3V

100nF_6.3V

C237

C237
1uF_6.3V

1uF_6.3V

C216

C216
1uF_6.3V

1uF_6.3V

C238

C238
1uF_6.3V

1uF_6.3V

C217

C217
1uF_6.3V

1uF_6.3V

C239

C239
1uF_6.3V

1uF_6.3V

C218

C218
1uF_6.3V

1uF_6.3V

C240

C240
1uF_6.3V

1uF_6.3V

+MVDDC

C260

C260

C261

C261

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

A A

C265

C265
1uF_6.3V

1uF_6.3V

C266

C266
1uF_6.3V

1uF_6.3V

B201 220R_2AB201 220R_2A

B202 220R_2AB202 220R_2A

C263

C263

C262

C262

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C268

C268

C267

C267

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

+MVDD+MVDDC +MVDD+MVDDC

5

C264

C264
1uF_6.3V

1uF_6.3V

C269

C269
1uF_6.3V

1uF_6.3V

B203 220R_2AB203 220R_2A

B204 220R_2AB204 220R_2A

+MVDDC +MVDD +MVDDC +MVDD

C281

C281

C280

C280

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

C229

C229
1uF_6.3V

1uF_6.3V

+MVDDC

C254

C254

4.7uF_6.3V

4.7uF_6.3V

3

C308

C308
100nF_6.3V

100nF_6.3V

C330

C330
1uF_6.3V

1uF_6.3V

C360

C360
1uF_6.3V

1uF_6.3V

C365

C365
1uF_6.3V

1uF_6.3V

C309

C309
100nF_6.3V

100nF_6.3V

C331

C331
1uF_6.3V

1uF_6.3V

C361

C361
1uF_6.3V

1uF_6.3V

C366

C366
1uF_6.3V

1uF_6.3V

C255

C255

4.7uF_6.3V

4.7uF_6.3V

C311

C311

C310

C310
100nF_6.3V

100nF_6.3V

C332

C332
1uF_6.3V

1uF_6.3V

C362

C362
1uF_6.3V

1uF_6.3V

C367

C367
1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

C333

C333
1uF_6.3V

1uF_6.3V

C363

C363
1uF_6.3V

1uF_6.3V

C368

C368
1uF_6.3V

1uF_6.3V

C312

C312
100nF_6.3V

100nF_6.3V

C334

C334
1uF_6.3V

1uF_6.3V

C364

C364
1uF_6.3V

1uF_6.3V

C369

C369
1uF_6.3V

1uF_6.3V

+MVDDC +MVDD

C380

C380
10uF_X6S

10uF_X6S

C313

C313
100nF_6.3V

100nF_6.3V

C335

C335
1uF_6.3V

1uF_6.3V

C314

C314
100nF_6.3V

100nF_6.3V

C336

C336
1uF_6.3V

1uF_6.3V

C381

C381
10uF_X6S

10uF_X6S

C315

C315
100nF_6.3V

100nF_6.3V

C337

C337
1uF_6.3V

1uF_6.3V

C382

C382
10uF_X6S

10uF_X6S

C316

C316
1uF_6.3V

1uF_6.3V

C338

C338
1uF_6.3V

1uF_6.3V

C317

C317
1uF_6.3V

1uF_6.3V

C339

C339
1uF_6.3V

1uF_6.3V

C352

C352

4.7uF_6.3V

4.7uF_6.3V

C318

C318
1uF_6.3V

1uF_6.3V

C340

C340
1uF_6.3V

1uF_6.3V

C319
100nF_6.3V

100nF_6.3V

C341

C341
1uF_6.3V

1uF_6.3V

C320

C320
100nF_6.3V

100nF_6.3V

C342

C342
1uF_6.3V

1uF_6.3V

C321

C321
100nF_6.3V

100nF_6.3V

C343

C343
1uF_6.3V

1uF_6.3V

C322

C322
100nF_6.3V

100nF_6.3V

C344

C344
1uF_6.3V

1uF_6.3V

C323

C323
100nF_6.3V

100nF_6.3V

C345

C345
1uF_6.3V

1uF_6.3V

C319

+MVDDC

C371

C371

C372

1uF_6.3V

1uF_6.3V

C376

C376
1uF_6.3V

1uF_6.3V

C372
1uF_6.3V

1uF_6.3V

C377

C377
1uF_6.3V

1uF_6.3V

C373

C373
1uF_6.3V

1uF_6.3V

C378

C378
1uF_6.3V

1uF_6.3V

C370

C370
1uF_6.3V

1uF_6.3V

C375

C375
1uF_6.3V

1uF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

C353

C353

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

4.7uF_6.3V

4.7uF_6.3V

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670- GDDR4 136p 256MB 128bit (Ch A & B)

RH RV670- GDDR4 136p 256MB 128bit (Ch A & B)

2

RH RV670- GDDR4 136p 256MB 128bit (Ch A & B)

C324

C324
100nF_6.3V

100nF_6.3V

C346

C346
1uF_6.3V

1uF_6.3V

C374

C374
1uF_6.3V

1uF_6.3V

C379

C379
1uF_6.3V

1uF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Sheet

Sheet

Sheet

C325

C326

C326

C327

100nF_6.3V

100nF_6.3V

C348

C348
1uF_6.3V

1uF_6.3V

C327
1uF_6.3V

1uF_6.3V

C349

C349
1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

C347

C347
1uF_6.3V

1uF_6.3V

+MVDD

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

of

921

of

921

of

921

1

C354

C354

4.7uF_6.3V

4.7uF_6.3V

Doc No.

Doc No.

Doc No.

C328

C328
1uF_6.3V

1uF_6.3V

C350

C350
1uF_6.3V

1uF_6.3V

C329

C329
1uF_6.3V

1uF_6.3V

C351

C351
1uF_6.3V

1uF_6.3V

C355

C355

4.7uF_6.3V

4.7uF_6.3V

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

U401

U401

DQC_0

T3

DQ31 | DQ23

DQC_2

T2

DQ30 | DQ22

DQC_1

R3

DQ29 | DQ21

DQC_3

R2

DQ28 | DQ20

DQC_7

M3

DQ27 | DQ19

DQC_4

N2

DQ26 | DQ18

DQC_6

L3

DQ25 | DQ17

DQC_5

M2

DQ24 | DQ16

DQC_31

T10

DQ23 | DQ31

DQC_29

T11

DQ22 | DQ30

DQC_30

R10

DQ21 | DQ29

DQC_28

R11

DQ20 | DQ28

DQC_25

M10

DQ19 | DQ27

DQC_24

N11

DQ18 | DQ26

DQC_27

D D

MAC_[15..0](6)

DQMCb_[7..0](6)

C C

CLKC0(6)
CLKC0b(6)

MAC_15
MAC_14
MAC_13
MAC_12
MAC_11
MAC_10
MAC_9
MAC_8
MAC_7
MAC_6
MAC_5
MAC_4
MAC_3
MAC_2
MAC_1
MAC_0

DQMCb_0
DQMCb_1
DQMCb_2
DQMCb_3
DQMCb_4
DQMCb_5
DQMCb_6
DQMCb_7

RASC0b(6)
CASC0b(6)

CSC0b_0(6)
CKEC0(6)

WEC0b(6)

R40360.4R R40360.4R
R40260.4R R40260.4R

CLKC0b(6)
CLKC0(6)

+MVDD

DRAM_RST(5,9) DRAM_RST(5,9)

R406

R406

R407 243RR407 243R

1.15K

1.15K

1%

+MVDD

R412

R412

C400

C400

2K74

2K74

100nF_6.3V

100nF_6.3V

1%

R415

R415

B B

1.15K

1.15K

1%

C404

R418

R418
2K74

2K74

1%

C404
100nF_6.3V

100nF_6.3V

L10

DQ17 | DQ25

DQC_26

M11

DQ16 | DQ24

DQC_17

G10

DQ15 | DQ7

DQC_16

F11

DQ14 | DQ6

DQC_18

F10

DQ13 | DQ5

DQC_19

E11

DQ12 | DQ4

DQC_20

C10

DQ11 | DQ3

DQC_23

C11

DQ10 | DQ2

DQC_21

B10

DQ9 | DQ1

DQC_22

B11

DQ8 | DQ0

DQC_8

G3

DQ7 | DQ15

DQC_9

F2

DQ6 | DQ14

DQC_10

F3

DQ5 | DQ13

DQC_11

E2

DQ4 | DQ12

DQC_12

C3

DQ3 | DQ11

DQC_13

C2

DQ2 | DQ10

DQC_14

B3

DQ1 | DQ9

DQC_15

B2

DQ0 | DQ8

MAC_4

K2

A0/A10 | A4/A8

MAC_5

H4

A1/BA0 | A5/BA1

MAC_6

K3

A2 /A12 | A6/BA2

MAC_7

L4

A3/A11 | A7/A9

MAC_0

K11

A4/A8 | A0/A10

MAC_1

H9

A5/BA1 | A1/BA0

MAC_2

K10

A6/BA2 | A2/A12

MAC_3

L9

A7/A9 | A3/A11

H2

RAS# | RFM

H11

RFM | RAS#

G9

CS# | CAS#

G4

CAS# | CS#

H10

WE# | CKE#

H3

C401

C401
10nF

10nF

1%

+MVDD

J10
J11

P3

P10

D10

D3

P2

P11

D11

D2
N3

N10

E10

E3
V9
A4

J4
J9

CKE# | WE#

CK
CK

RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREFC
VREFD

23D41287QE08

23D41287QE08

+MVDD

QSC_0
QSC_3
QSC_2
QSC_1

QSCb_0
QSCb_3
QSCb_2
QSCb_1

DQMCb_0
DQMCb_3
DQMCb_2
DQMCb_1

+MVDD +MVDD

C405

C405
10nF

10nF

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3
VSS#V10
VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

VDD

VSS

MF

+MVDD

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2
A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3
A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

A9

QSC_0
QSC_1
QSC_2
QSC_3
QSC_4
QSC_5
QSC_6
QSC_7

QSCb_0
QSCb_1
QSCb_2
QSCb_3
QSCb_4
QSCb_5
QSCb_6
QSCb_7

+MVDDC +MVDDC

CLKC1(6)
CLKC1b(6)

+MVDD

R416

R416

1.15K

1.15K

1%

R419

R419
2K74

2K74

1%

+MVDD

4

U402

QSC_[7..0] (6)

QSCb_[7..0] (6)

+MVDD

R40560.4R R40560.4R
R40460.4R R40460.4R

RASC1b(6)
CASC1b(6)

CSC1b_0(6)
CKEC1(6) CKED0(6)

WEC1b(6)

CLKC1b(6)
CLKC1(6)

QSC_6
QSC_7
QSC_5
QSC_4

QSCb_6
QSCb_7
QSCb_5
QSCb_4

DQMCb_6

DQMCb_7

DQMCb_5
DQMCb_4

R410 243RR410 243R

C402

C402
100nF_6.3V

100nF_6.3V

C406

C406
100nF_6.3V

100nF_6.3V

R409

R409

1.15K

1.15K

1%

R414

R414
2K74

2K74

1%

+MVDD

DQC_48
DQC_50
DQC_49
DQC_51
DQC_54
DQC_52
DQC_55
DQC_53
DQC_63
DQC_61
DQC_62
DQC_60
DQC_57
DQC_56
DQC_59
DQC_58
DQC_44
DQC_47
DQC_46
DQC_45
DQC_43
DQC_42
DQC_41
DQC_40
DQC_32
DQC_33
DQC_35
DQC_34
DQC_37
DQC_38
DQC_36
DQC_39

MAC_12
MAC_13
MAC_14
MAC_15
MAC_8
MAC_9
MAC_10
MAC_11

1%

C403

C403
10nF

10nF

C407

C407
10nF

10nF

+MVDD

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10
R11
M10
N11

L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2
F3

E2
C3
C2

B3

B2

K2
H4

K3

L4

K11

H9

K10

L9
H2

H11

G9
G4

H10

H3

J10
J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

J4

J9

U402

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

A0/A10 | A4/A8
A1/BA0 | A5/BA1
A2 /A12 | A6/BA2
A3/A11 | A7/A9
A4/A8 | A0/A10
A5/BA1 | A1/BA0
A6/BA2 | A2/A12
A7/A9 | A3/A11

RAS# | RFM
RFM | RAS#

CS# | CAS#
CAS# | CS#

WE# | CKE#
CKE# | WE#

CK
CK

RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREFC
VREFD

23D41287QE08

23D41287QE08

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3
VSS#V10
VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2

VDD

A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3

VSS

A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

A9

MF

+MVDD

+MVDDC

+MVDD

CLKD0(6)
CLKD0b(6)

MAD_[15..0](6)

+MVDD

R514

R514

1.15K

1.15K

1%

R518

R518
2K74

2K74

1%

+MVDD

3

DQD_[63..0](6)DQC_[63..0](6)

MAD_15
MAD_14
MAD_13
MAD_12
MAD_11
MAD_10
MAD_9
MAD_8
MAD_7
MAD_6
MAD_5
MAD_4
MAD_3
MAD_2
MAD_1
MAD_0

+MVDD

R50360.4R R50360.4R
R50260.4R R50260.4R

RASD0b(6) RASD1b(6)
CASD0b(6)

CSD0b_0(6)

WED0b(6)

CLKD0b(6)
CLKD0(6)

QSD_0 QSD_4
QSD_3
QSD_2
QSD_1

QSDb_0
QSDb_3
QSDb_2
QSDb_1

DQMDb_0

DQMDb_3
DQMDb_2

DRAM_RST(5,9)

R507 243RR507 243R

C500

C500
100nF_6.3V

100nF_6.3V

C504

C504
100nF_6.3V

100nF_6.3V

R506

R506

1.15K

1.15K

1%

R512

R512
2K74

2K74

1%

+MVDD

U501

U501

DQD_0

T3

DQ31 | DQ23

DQD_2

T2

DQ30 | DQ22

DQD_1

R3

DQ29 | DQ21

DQD_3

R2

DQ28 | DQ20

DQD_6

M3

DQ27 | DQ19

DQD_4

N2

DQ26 | DQ18

DQD_7

L3

DQ25 | DQ17

DQD_5

M2

DQ24 | DQ16

DQD_26

T10

DQ23 | DQ31

DQD_29

T11

DQ22 | DQ30

DQD_27

R10

DQ21 | DQ29

DQD_28

R11

DQ20 | DQ28

DQD_25

M10

DQ19 | DQ27

DQD_24

N11

DQ18 | DQ26

DQD_30

L10

DQ17 | DQ25

DQD_31

M11

DQ16 | DQ24

DQD_17

G10

DQ15 | DQ7

DQD_16

F11

DQ14 | DQ6

DQD_19

F10

DQ13 | DQ5

DQD_18

E11

DQ12 | DQ4

DQD_23

C10

DQ11 | DQ3

DQD_20

C11

DQ10 | DQ2

DQD_22

B10

DQ9 | DQ1

DQD_21

B11

DQ8 | DQ0

DQD_11

G3

DQ7 | DQ15

DQD_10

F2

DQ6 | DQ14

DQD_9

F3

DQ5 | DQ13

DQD_8

E2

DQ4 | DQ12

DQD_14

C3

DQ3 | DQ11

DQD_15

C2

DQ2 | DQ10

DQD_12

B3

DQ1 | DQ9

DQD_13

B2

DQ0 | DQ8

MAD_4

K2

A0/A10 | A4/A8

MAD_5 MAD_13

H4

A1/BA0 | A5/BA1

MAD_6

K3

A2 /A12 | A6/BA2

MAD_7

L4

A3/A11 | A7/A9

K11

A4/A8 | A0/A10

MAD_1

H9

A5/BA1 | A1/BA0

MAD_2

K10

A6/BA2 | A2/A12

MAD_3

L9

A7/A9 | A3/A11

H2

RAS# | RFM

H11

RFM | RAS#

G9

CS# | CAS#

G4

CAS# | CS#

H10

WE# | CKE#

H3

CKE# | WE#

J10

CK

J11

CK

P3

RDQS3 | RDQS2

P10

RDQS2 | RDQS3

D10

RDQS1 | RDQS0

D3

RDQS0 | RDQS1

P2

WDQS3 | WDQS2

P11

WDQS2 | WDQS3

D11

WDQS1 | WDQS0

D2

WDQS0 | WDQS1

N3

DM3 | DM2

N10

DM2 | DM3

E10

DM1 | DM0

E3

DM0 | DM1

V9

RESET

A4

ZQ

1%

J4

VREFC

C501

C501

J9

VREFD

10nF

10nF

+MVDD

23D41287QE08

23D41287QE08

C505

C505
10nF

10nF

+MVDD

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

2

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A2

VDD

A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3

VSS

A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

QSD_0
QSD_1
QSD_2
QSD_3
QSD_4
QSD_5
QSD_6
QSD_7

QSDb_0
QSDb_1
QSDb_2
QSDb_3
QSDb_4
QSDb_5
QSDb_6
QSDb_7

+MVDD

A9

MF

QSD_[7..0] (6)

QSDb_[7..0] (6)

DQMDb_[7..0](6)

+MVDD

R516

R516

1.15K

1.15K

1%

R519

R519
2K74

2K74

1%

DQMDb_0
DQMDb_1
DQMDb_2
DQMDb_3
DQMDb_4
DQMDb_5
DQMDb_6
DQMDb_7

+MVDD

CLKD1(6)
CLKD1b(6)

+MVDD

R509

R509

1.15K

1.15K

1%

R513

R513
2K74

2K74

1%

R50560.4R R50560.4R
R50460.4R R50460.4R

CASD1b(6)
CSD1b_0(6)

CKED1(6)
WED1b(6)

CLKD1b(6)
CLKD1(6)

QSDb_4
QSDb_6
QSDb_7

DQMDb_4
DQMDb_6
DQMDb_7

DRAM_RST(5,9)

R510 243RR510 243R

C502

C502
100nF_6.3V

100nF_6.3V

C506

C506
100nF_6.3V

100nF_6.3V

DQD_32
DQD_33
DQD_34
DQD_35
DQD_38
DQD_36
DQD_39
DQD_37
DQD_55
DQD_53
DQD_54
DQD_52
DQD_50
DQD_49
DQD_51
DQD_48
DQD_59
DQD_56
DQD_61
DQD_63
DQD_62
DQD_58
DQD_60
DQD_57
DQD_40
DQD_41
DQD_42
DQD_43
DQD_47
DQD_44
DQD_46
DQD_45

MAD_12
MAD_14

MAD_15
MAD_8MAD_0
MAD_9
MAD_10
MAD_11

QSD_6
QSD_7

QSD_5

QSDb_5

DQMDb_5DQMDb_1

C503

C503
10nF

10nF

+MVDD

+MVDD

1%

C507

C507
10nF

10nF

T3

T2
R3
R2
M3
N2

L3
M2

T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11

G3

F2

F3

E2
C3
C2

B3

B2

K2
H4

K3

L4

K11

H9

K10

L9
H2

H11

G9
G4

H10

H3

J10
J11

P3

P10
D10

D3

P2

P11
D11

D2
N3

N10
E10

E3

V9

A4

J4

J9

U502

U502

23D41287QE08

23D41287QE08

DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8

A0/A10 | A4/A8
A1/BA0 | A5/BA1
A2 /A12 | A6/BA2
A3/A11 | A7/A9
A4/A8 | A0/A10
A5/BA1 | A1/BA0
A6/BA2 | A2/A12
A7/A9 | A3/A11

RAS# | RFM
RFM | RAS#

CS# | CAS#
CAS# | CS#

WE# | CKE#
CKE# | WE#

CK
CK

RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1

WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1

DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1

RESET
ZQ

VREFC
VREFD

1

VDDQ

VDDQ#A12

VDDQ#C1
VDDQ#C4
VDDQ#C9

VDDQ#C12

VDDQ#E1
VDDQ#E4

VDDQ#E9
VDDQ#E12
VDDQ#H12

VDDQ#H1

VDDQ#N1

VDDQ#N4

VDDQ#N9
VDDQ#N12

VDDQ#R1

VDDQ#R4

VDDQ#R9
VDDQ#R12

VDDQ#V1
VDDQ#V12

VDD#A11

VDD#F1

VDD#F12

VDD#M1

VDD#M12

VDD#V2

VDD#V11

VDD#K1

VDD#K12

VSSQ
VSSQ#B4
VSSQ#B9

VSSQ#B12

VSSQ#D1
VSSQ#D4
VSSQ#D9

VSSQ#D12

VSSQ#G2

VSSQ#G11

VSSQ#L2

VSSQ#L11

VSSQ#P1
VSSQ#P4
VSSQ#P9

VSSQ#P12

VSSQ#T1
VSSQ#T4
VSSQ#T9

VSSQ#T12

VSSQ#M4
VSSQ#M9

VSSQ#F4
VSSQ#F9

VSS#A10

VSS#G1

VSS#G12

VSS#L1

VSS#L12

VSS#V3

VSS#V10

VSS#J12

VSS#J1
VSS#K4
VSS#K9

RFU1
RFU0

PERR#

GND | VDD

GND | VDD

+MVDDC

C585

C585
10uF_X6S

10uF_X6S

+MVDD
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
H12
H1
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

+MVDDC

A2

VDD

A11
F1
F12
M1
M12
V2
V11
K1
K12

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
M4
M9
F4
F9

A3

VSS

A10
G1
G12
L1
L12
V3
V10
J12
J1
K4
K9

J2
V4
J3

+MVDD+MVDD

A9

MF

C586

C586

C587

C587

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

+MVDD

C525

C410

C409

C409
100nF_6.3V

100nF_6.3V

C431

C431
1uF_6.3V

1uF_6.3V

C461

C461

C460

C460

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C465

C465

C466

C466

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

B402 220R_2AB402 220R_2A

C410
100nF_6.3V

100nF_6.3V

C432

C432
1uF_6.3V

1uF_6.3V

C462

C462
1uF_6.3V

1uF_6.3V

C467

C467
1uF_6.3V

1uF_6.3V

C412

C412

C411

C411

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C433

C433

C434

C434

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C463

C463

C464

C464

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C469

C469

C468

C468

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

+MVDD+MVDDC +MVDD+MVDDC

5

C413

C413
100nF_6.3V

100nF_6.3V

C435

C435
1uF_6.3V

1uF_6.3V

C414

C414
100nF_6.3V

100nF_6.3V

C436

C436
1uF_6.3V

1uF_6.3V

C415

C415
100nF_6.3V

100nF_6.3V

C437

C437
1uF_6.3V

1uF_6.3V

C416

C416
100nF_6.3V

100nF_6.3V

C438

C438
1uF_6.3V

1uF_6.3V

C417

C417
100nF_6.3V

100nF_6.3V

C439

C439
1uF_6.3V

1uF_6.3V

C418

C418
100nF_6.3V

100nF_6.3V

C440

C440
1uF_6.3V

1uF_6.3V

C419

C419
100nF_6.3V

100nF_6.3V

C441

C441
1uF_6.3V

1uF_6.3V

C420

C420
100nF_6.3V

100nF_6.3V

C442

C442
1uF_6.3V

1uF_6.3V

C421

C421
100nF_6.3V

100nF_6.3V

C443

C443
1uF_6.3V

1uF_6.3V

C422

C422
100nF_6.3V

100nF_6.3V

C444

C444
1uF_6.3V

1uF_6.3V

C423

C423
100nF_6.3V

100nF_6.3V

C445

C445
1uF_6.3V

1uF_6.3V

C424

C424
100nF_6.3V

100nF_6.3V

C446

C446
1uF_6.3V

1uF_6.3V

+MVDDC

+MVDD

C452

C452

4.7uF_6.3V

4.7uF_6.3V

C453

C453

4.7uF_6.3V

4.7uF_6.3V

C470

C470
1uF_6.3V

1uF_6.3V

C475

C475
1uF_6.3V

1uF_6.3V

C471

C471
1uF_6.3V

1uF_6.3V

C476

C476
1uF_6.3V

1uF_6.3V

C472

C472
1uF_6.3V

1uF_6.3V

C477

C477
1uF_6.3V

1uF_6.3V

C473

C473
1uF_6.3V

1uF_6.3V

C478

C478
1uF_6.3V

1uF_6.3V

C474

C474
1uF_6.3V

1uF_6.3V

C479

C479
1uF_6.3V

1uF_6.3V

+MVDDC

C481

C481

C480

C480
10uF_X6S

B403 220R_2AB403 220R_2AB401 220R_2AB401 220R_2A C582

10uF_X6S

10uF_X6S

10uF_X6S

C482

C482
10uF_X6S

10uF_X6S

C425

C425
100nF_6.3V

100nF_6.3V

C447

C447
1uF_6.3V

1uF_6.3V

+MVDDC

C426

C426
100nF_6.3V

100nF_6.3V

C448

C448
1uF_6.3V

1uF_6.3V

C485

C485
10uF_X6S

10uF_X6S

C427

C427
100nF_6.3V

100nF_6.3V

C449

C449
1uF_6.3V

1uF_6.3V

+MVDD

C486

C486
10uF_X6S

10uF_X6S

C428

C428
100nF_6.3V

100nF_6.3V

C450

C450
1uF_6.3V

1uF_6.3V

C454

C454

4.7uF_6.3V

4.7uF_6.3V

C429

C429
100nF_6.3V

100nF_6.3V

C451

C451
1uF_6.3V

1uF_6.3V

C487

C487
10uF_X6S

10uF_X6S

C455

C455

4.7uF_6.3V

4.7uF_6.3V

+MVDDC

C508

C508
100nF_6.3V

100nF_6.3V

C530

C530
1uF_6.3V

1uF_6.3V

C560

C560
1uF_6.3V

1uF_6.3V

C565

C565
1uF_6.3V

1uF_6.3V

C509

C509
100nF_6.3V

100nF_6.3V

C531

C531
1uF_6.3V

1uF_6.3V

C561

C561
1uF_6.3V

1uF_6.3V

C566

C566
1uF_6.3V

1uF_6.3V

C510

C510
100nF_6.3V

100nF_6.3V

C532

C532
1uF_6.3V

1uF_6.3V

C562

C562
1uF_6.3V

1uF_6.3V

C567

C567
1uF_6.3V

1uF_6.3V

C511

C511
100nF_6.3V

100nF_6.3V

C533

C533
1uF_6.3V

1uF_6.3V

C563

C563
1uF_6.3V

1uF_6.3V

C568

C568
1uF_6.3V

1uF_6.3V

C512

C512
100nF_6.3V

100nF_6.3V

C534

C534
1uF_6.3V

1uF_6.3V

C564

C564
1uF_6.3V

1uF_6.3V

C569

C569
1uF_6.3V

1uF_6.3V

+MVDDC

C513

C513
100nF_6.3V

100nF_6.3V

C535

C535
1uF_6.3V

1uF_6.3V

C580

C580
10uF_X6S

10uF_X6S

C514

C514
100nF_6.3V

100nF_6.3V

C536

C536
1uF_6.3V

1uF_6.3V

+MVDD

C581

C581
10uF_X6S

10uF_X6S

C515

C515
100nF_6.3V

100nF_6.3V

C537

C537
1uF_6.3V

1uF_6.3V

C552

C552

4.7uF_6.3V

4.7uF_6.3V

B404 220R_2AB404 220R_2A

4

www.vinafix.vn

3

C516

C516
100nF_6.3V

100nF_6.3V

C538

C538
1uF_6.3V

1uF_6.3V

C582
10uF_X6S

10uF_X6S

C517

C517
100nF_6.3V

100nF_6.3V

C539

C539
1uF_6.3V

1uF_6.3V

C553

C553

4.7uF_6.3V

4.7uF_6.3V

2

C519

C518

C518
100nF_6.3V

100nF_6.3V

C540

C540
1uF_6.3V

1uF_6.3V

C519
100nF_6.3V

100nF_6.3V

C541

C541
1uF_6.3V

1uF_6.3V

C520

C520
100nF_6.3V

100nF_6.3V

C542

C542
1uF_6.3V

1uF_6.3V

+MVDDC

C570

C570

C571

C571

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C576

C576

C575

C575

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670- GDDR4 136p 256MB 128bit (Ch C & D)

RH RV670- GDDR4 136p 256MB 128bit (Ch C & D)

RH RV670- GDDR4 136p 256MB 128bit (Ch C & D)

C521

C521
100nF_6.3V

100nF_6.3V

C543

C543
1uF_6.3V

1uF_6.3V

C572

C572
1uF_6.3V

1uF_6.3V

C577

C577
1uF_6.3V

1uF_6.3V

C522

C522
100nF_6.3V

100nF_6.3V

C544

C544
1uF_6.3V

1uF_6.3V

C573

C573
1uF_6.3V

1uF_6.3V

C578

C578
1uF_6.3V

1uF_6.3V

C523

C523
100nF_6.3V

100nF_6.3V

C545

C545
1uF_6.3V

1uF_6.3V

C408

C408
100nF_6.3V

100nF_6.3V

C430

C430
1uF_6.3V

1uF_6.3V

+MVDDC

A A

C525

C524

C524

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C547

C547

C546

C546

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C574

C574
1uF_6.3V

1uF_6.3V

C579

C579
1uF_6.3V

1uF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

10 21

10 21

10 21

C526

C526
100nF_6.3V

100nF_6.3V

C548

C548
1uF_6.3V

1uF_6.3V

of

of

of

C527

C527

C528

C528

C529

100nF_6.3V

100nF_6.3V

C550

C550
1uF_6.3V

1uF_6.3V

C529
100nF_6.3V

100nF_6.3V

C551

C551
1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

C549

C549
1uF_6.3V

1uF_6.3V

+MVDD

C555

C555

C554

C554

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

RevDate:

RevDate:

RevDate:

2

2

2

Doc No.

Doc No.

Doc No.

105-B339xx-00

105-B339xx-00

1

105-B339xx-00

8

D D

+VDDC_Source

C623

C623
180uF_16V

180uF_16V

SM 10mm Dia

8mm Hi

MC623

MC623
820uF_2.5V

820uF_2.5V

8 x 8 mm, TH

Input Bulk CAPs

NC623

NC623
68uF_16V

68uF_16V

SM 6.3mm Dia

5.8mm Hi

Overlap

+VDDC_Source

MC630

MC630

C630

C630
180uF_16V

180uF_16V

SM 10mm Dia

8mm Hi

+VDDC_Source

NC631

NC631
68uF_16V

68uF_16V

SM 6.3mm Dia

820uF_2.5V

820uF_2.5V

8 x 8 mm, TH

+VDDC_Source

NC630

NC630
68uF_16V

68uF_16V

SM 6.3mm Dia

5.8mm Hi

NC632

NC632
68uF_16V

68uF_16V

SM 6.3mm Dia

5.8mm Hi5.8mm Hi

Overlap

+12V_BUS

C C

L621

L621

IND_0.47uH_7A

R6090RR609
0R

C633

C633

4.7uF_16V

4.7uF_16V

IND_0.47uH_7A

DUAL FOOTPRINT

R6080RR608
0R

C632

C632

4.7uF_16V

4.7uF_16V

805 805

Mirrored on PCB

C635

C635

C634

C634

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

805805 805 805

C621

C621
10UF_16V

10UF_16V

Mirrored on PCB

C640

C640
10UF_16V

10UF_16V

L620

L620

0.47uH

0.47uH

C622

C622
10UF_16V

10UF_16V

12061206

C663

C663
10UF_16V

10UF_16V

12061206

Mirrored on PCB

678

678

B B

9

Q601

Q601
BSC119N03SG

BSC119N03SG

Pad

Pad

Thermal

Thermal

123

4 5

UGATE1 UGATE1

9

Q602

Q602
BSC119N03SG

BSC119N03SG

Pad

Pad

Thermal

Thermal

123

4 5

PHASE1

567

8

9

Q603

Q603
BSC042N03S

BSC042N03S

432

LGATE1

A A

1

8

Q604

Q604
BSC042N03S

BSC042N03S

LGATE1

567

8

9

432

1

R607R607

+VDDC_ExtSource

C626

C626
180uF_16V

180uF_16V

SM 10mm Dia

+VDDC_ExtSource

+VDDC_ExtSource

C637

C637
150nF_16V

150nF_16V

603

ML601 220nH_31AML601 220nH_31A

ML602 220nH_31AML602 220nH_31A

R604

R604
221R

221R

1/10W
0603

FB_S

CSP1

7

8mm Hi

NC636

NC636
68uF_16V

68uF_16V

NC637

NC637
68uF_16V

68uF_16V

SM 6.3mm Dia

C690

C690

100uF

100uF

16V SM
6mm Dia

+VDDC_Source

L601

L601

1 2

PCMB105T-R47MS

PCMB105T-R47MS

NL601

NL601

1 2

HC1018

HC1018

L602

L602

1 2

PCMB105T-R47MS

PCMB105T-R47MS

NL602

NL602

1 2

HC1018

HC1018

C604 1UF_16VC604 1UF_16V

X7R

R602R602

7

MC626

MC626
820uF_2.5V

820uF_2.5V

8 x 8 mm, TH

+VDDC_ExtSource

Overlap

Overlap

R605

R605
221R

221R

CSN1

Overlap

NC638

NC638
68uF_16V

68uF_16V

SM 6.3mm Dia

5.8mm Hi5.8mm Hi

+VDDC

+VDDC_ExtSource

C614 1UF_16VC614 1UF_16V

R615

R615
221R

221R

CSN2

Overlap

Overlap

6

Choosing Different Gate Drive

Gate Drive

5V Gate Drive R630, R670, C660,

8V Gate Drive R631, R632,

12V Gate Drive R630, C660,

Populate

R631, R632

R630, C660,
R661, Q661

R670

12V Bus power for 12V
Gate Drive

+12V_BUS +12V_BUS

R670

R670
10R

10R

402

L622

C695

C695

100uF_16V

100uF_16V

16V SM
6mm Dia

C639

C639
150nF_16V

150nF_16V

603

R6100RR610
0R

C625

C625
10UF_16V

10UF_16V

L622

IND_0.47uH_7A

IND_0.47uH_7A

R6180RR618
0R

DUAL FOOTPRINT

C624

C624
10UF_16V

10UF_16V

12061206

Mirrored on PCB

C665

C665

C664

C664

10UF_16V

10UF_16V

10UF_16V

10UF_16V

1206

1206

Mirrored on PCB

678

L611

L611

12

PCMB105T-R47MS

PCMB105T-R47MS

ML611

ML611

220nH_31A

220nH_31A

NL611

NL611

12

HC1018

HC1018

L612

L612

PCMB105T-R47MS

PCMB105T-R47MS

12

ML612

ML612

220nH_31A

220nH_31A

NL612

NL612

12

HC1018

HC1018

R614

R614
221R

221R

1/10W
0603

X7R

R612R612

CSP2

R617R617

FB_S

6

9

Thermal

Thermal

Pad

Pad

123

4 5

UGATE2 UGATE2

567

8

9

Q613

Q613

BSC042N03S

BSC042N03S

432

1

5

Do Not Populate

R661, Q661

R670

R631, R632,
R661, Q661

Pass Transistor Circuit for 8V Gate Drive

This circuit is only for 8V
gate drive application

32

+12V_EXT

L623

L623

0.47uH

0.47uH

C628

C628

C627

C627

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

805805

Mirrored on PCB

C629

C629

C631

C631

4.7uF_16V

4.7uF_16V

4.7uF_16V

4.7uF_16V

Mirrored on PCBMirrored on PCB

Q612

Q612

BSC119N03SG

BSC119N03SG

Q611

Q611

BSC119N03SG

BSC119N03SG

123

8

1

5

Assume VCC consumes 200mA total including
5VCC providing buffered output sourcing a
minimum 20mA requirement

P(Q_8VCC)max = (12V-8V)*0.2A = 800mW

R661

R661
10K

10K

1

SI2304DS

SI2304DS
Q661

Q661

VCC

678

9

Thermal

Thermal

Pad

Pad

4 5

PHASE2

567

9

Q614

Q614

BSC042N03S

BSC042N03S

432

LGATE2LGATE2

+VDDC+VDDC

R696

R696
300R

300R

C645

C645

805

10uf

10uf

1206 6.3V

VCCDRV

+VDDC

C649

C649
100nF

100nF

402 402 603

+VDDC

C658

C658
100nF

100nF

402 402 603

C646

C646

Y5V

Y5V

10uf

10uf

6.3V

1206 6.3V

4

C670

C670
10UF

10UF

1206
X5R
16V

C656

C656

C650

C650

390pF

390pF

15nF

15nF

C662

C662

C661

C661

390pF

390pF

15nF

15nF

C647

C647

C648

C648

Y5V

10uf

10uf

10uf

10uf

1206 6.3V

1206

4

TP601TP601

PWRGD1

D611

D611

2

3

BAT54A

BAT54A

1

OPTIONAL

UGATE2

C612

C612
1uF

1uF

PHASE2

19

LGATE2

0R
R6130RR613

20

R664

R664

Rdroop

Droop Option

C694

C694
1UF_16V

1UF_16V

X7R
603

OPTIONAL

D601

D601

3

100K

100K

LGATE1

BAT54A

BAT54A

21

VCC

22

0R

23

R6030RR603

PHASE1

24
25

26
27

C602

C602

28

1uF

1uF

29

1

UGATE1

R601 0RR601 0R

2

R632 0RR632 0R

Populate - For 5V Gate Drive application
Remove - For 8V or 12V Gate Drive application

+VDDC

***

C641

C641
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

+VDDC

***

C642

C642
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

+VDDC

***

C643

C643
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

+VDDC

***

C644

C644
820uF_2.5V

Y5V

820uF_2.5V

***

8 x 8 mm, TH

3

POK > 1 used to control
other on-board enables

VDDC_REFIN

R634 10KR634 10K

R6110RR611
0R

U601

U601
uPI6201Q

uPI6201Q

PHASE2

18

UGATE2

17

16

BOOT2

REFOUT/POK

LGATE2

VCCDRV/DROOP

VCC

LGATE1

PHASE1
PGND

PGND26
PGND27
PGND28
PGND29

UGATE11BOOT125VCC3AGND4BUSEN5CSP1

C660

C660
1uF_6.3V

1uF_6.3V

402

5VCC

3

Y5V

5VCC applied externally or generated internally from the IC, must
be in regulation before IC start soft-start sequence.

1. For 5V Gate Drive application:
External filtered +5V_EXT is applied to this pin.

2. For 8V or 12V Gate Drive application:
+5VCC is generated internally and this is an output with
20mA minimum current capability

- Bulk Cap 每 SMT, H<10mm (C641, C642, C643)

1. UCC APXE2R5ARA102MH80G, 8x7.7mm, 1000uF, 12mR, 2.5V, 4260mArms, ATI PN - ?

2. UCC APXE2R5ARA152MHA0G, 8x10mm, 1500uF, 10mR, 2.5V, 5220mArms, ATI PN - ?

- Bulk Cap 每 TH, H<10mm (NC641, NC642, NC643)

1. Fujitsu FP-2R5RE102M-L8xx, 8x8mm, 1000uF, 6mR, 2.5V, 5600mArms, ATI PN - ?

2. Fujitsu FP-2R5RE152M-L8xx, 8x8mm, 1500uF, 6mR, 2.5V, 5600mArms, ATI PN - ?

- SP/TANT/POS Cap 每 SMT (MC641, MC642, MC643)

1. Sanyo 2R5TPD1000M5, POSCAP, 4mmH, 1000uF, 5mR, 2.5V, 6100mArms, 4230010800G

2. NEC/TOKIN TEPSGD0E108M5-12R, SPCAP?, 3mmH, 1000uF, 5mR, 2.5V, 5477mArms, 4230010801G

2

Overlap the footprints
for MR655 and C655

Current

PGND Option

Compensation

Css if

MR6550RMR655

current

0R

15

14

comp.
not
used

SS_ICOMP

C655

C655

6.8nF_25V

6.8nF_25V

402
25V

13

FB

REFIN/EN

SS/ICOMP

COMP/DROOP

RT

IOUT/IMAX/DROOP

CSP2

CSN2

CSN1

6

C671

C671
100nF

100nF

6.3V 402 10V
X5R

- When +12V_EXT=ON, PH2_ENb=Low, Phase 2 Enabled

- When +12V_EXT=OFF, PH2_ENb=Hi , Phase 2 Disabled

R686 0RR686 0R

VDDC_EN(13)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

R685 0RR685 0R
R684 0RR684 0R

share pad

VDDC PWM Whole CHip Enable

RH RV670 - VDDC SMPS 03

RH RV670 - VDDC SMPS 03

RH RV670 - VDDC SMPS 03

2

12

11

10

9

8

7

R654

R654
150R

150R

402

402

6.3V

C654

C654

2.2nF_50V

2.2nF_50V

C607

C607
220pF_50V

220pF_50V

R_RT
402

C603

C603
1nF

1nF

PH2_ENb

5VCC (13,14)

R655

R655

51.1K

51.1K

C613

C613
1nF

1nF

C638

C638
100nF

100nF

402 10V
X5R

X7R402
50V

Iout

X7R402
50V

R616R616

R606R606

VCCDRV

SS_ICOMP

VDDC_REFIN

R658 0RR658 0R

+VDDC

12

NS600

NS600
NS_VIA

NS_VIA

VDDC_FB_TRACE

R1
RFB1

R651

R651
10K

10K

402

Droop Option

R662

R662
100K

100K

Rdroop

CSP2

CSN2

CSN1

CSP1

PH2_ENb (13)

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

11 21

11 21

11 21

VDDC_FB

R663

R663
100K

100K

Rdroop

Iout (13)

of

of

of

FB_S

X7R
50V

COMP_FB

R656 0RR656 0R

1

VDDC_FB (13)VDDC_REFIN (13)

Type III compensation

R3

R653

R653

2.67K

2.67K

COMP_GND

402

R6570RR657

C3

0R

C653

C653

2.2nF

2.2nF

402

R2

R652

R652

3.65K

3.65K

402

C2 C1

C652

C652
10nF

10nF

X7R

402

10V

Doc No.

Doc No.

Doc No.

105-B339xx-00

105-B339xx-00

105-B339xx-00

1

C651

C651
220pF_50V

220pF_50V

402

RevDate:

RevDate:

RevDate:

2

2

2

www.vinafix.vn

8

7

6

5

4

3

2

1

Thermal

Thermal

Pad

Pad

+MVDDC_S

9

6
7
8

Place Rs and Cs across QL

RC snubber values shown
are for reference only,
tuning is required

MVDDC_FB

C715

C715

C716

C716

10UF_16V

10UF_16V

10UF_16V

10UF_16V

12061206

Mirrored on PCB

ML701

ML701

1 2

PCMC104T-1R5MN

PCMC104T-1R5MN

L701 1.7UHL701 1.7UH

1 2

11.7mm Hi Max

R719

R719
33MOHM

33MOHM

Rs

1210
1%

C708

C708
10nF_25V

10nF_25V

402

Cs

X7R
25V

4mm Hi

C717

C717

4.7uF_16V

4.7uF_16V

805 805

Mirrored on PCB

overlap

MVDD_FB_TRACE

R1

RFB1

R711

R711

4.99K

4.99K

402
1%

Place R1 and
R4 close to
PWM and
routed with
separate
20mil trace to
the ASIC

C713

C713

3.9nF

3.9nF

402
10%

R713

R713

3.65K

3.65K

402
5%

C719

C719

4.7uF_16V

4.7uF_16V

16V
X7R

MC730 is to reserve the
footprint. It must be a 16V
rated cap.

C718

C718
150nF_16V

150nF_16V

603

C730

C730
180uF_16V

180uF_16V

8mm Hi

NC730

NC730
68uF_16V

68uF_16V

SM 6.3mm DiaSM 10mm Dia

5.8mm Hi

Overlap

MC730

MC730
820uF_2.5V

820uF_2.5V

+MVDD

12

NS700

NS700

C720

NS_VIA

NS_VIA

C720
100nF

100nF

402 402 603

C721

C721
15nF

15nF

C722

C722
390pF

390pF

***

C725

C725
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

***

C726

C726
820uF_2.5V

820uF_2.5V

***

8 x 8 mm, TH

Q701

Q701

QH

+PW_MVDDC_HGD

D D

C703

C703

0.22uF

0.22uF

MVDD_EN (13)

R708 20KR708 20K

402

+PW_MVDDC_M

+PW_MVDDC_LGD

R722 0RR722 0R

+PW_MVDDC_LGDR

603

+MVDDC_B

U703

U703

1

+PW_MVDDC_HGD

+PW_MVDDC_LGD

R715

R715

42.2K

42.2K

place R715 close to IC pin4

C C

BOOT

2

UGATE

3

GND
LGATE4VCC

APW7065

APW7065

PHASE

COMP

+PW_MVDDC_M

8

MVDDC_COMP

7

MVDDC_FB

6

FB

5

+MVDD_VCC

R721 0RR721 0R

+PW_MVDDC_HGDR

402

QL

4 5
3
2
1

Q702

Q702

Thermal

Thermal

Pad

Pad

BSC119N03SG

BSC119N03SG

4 5
3
2
1

BSC119N03SG

BSC119N03SG

9

6
7
8

MVDDC_FB(13)

Layout guideline

1-Position the controller (U703) such that LGate(pin4) is the closet to gate
of the MOSFETs. You can place the gate resistors R721 and R722 next to the gate
of the MOSFETs. Make the gate drive traces(PW MVDDC LGD and PW MVDDC HGD) as
short and as wide as possible to reduce the trace inductance.
2-Place the bypass capacitors for Vcc as well as Boost caps as close to the
controller as possible. They are as follows;
Vcc bypass cap is C703, and Boost cap is C705.
3-Voltage amplifier compensation network. Place C714 close to the pin 7. Place
the rest of the compensation network close to the pins 7 and 6. These are R710,
R711, R713, C713 and R712, C711 and C712.

+PW_MVDDC_HGDR

MQ701

MQ701

B B

4 5
3
2
1

Thermal

Thermal

Pad

Pad

FDS7096N3

FDS7096N3

+MVDDC_S

9

6
7
8

+PW_MVDDC_LGDR

MQ702

MQ702

Thermal

Thermal

Pad

Pad

4 5
3
2
1

FDS7096N3

FDS7096N3

9

6
7
8

MULTI FOOTPRINT

+PW_MVDDC_M

COMPENSATION CIRCUIT FILTERED SMPS VCC BOOT CIRCUIT

+12V_BUS

MR7060RMR706
0R

D701

D701
BAT54A

BAT54A

+MVDDC_B

402

C706

C706
150nF_16V

150nF_16V

+PW_MVDDC_M

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - MVDD SMPS 02

RH RV670 - MVDD SMPS 02

5

4

3

RH RV670 - MVDD SMPS 02

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

12 21

of

12 21

of

12 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

402

A A

C711

C711
15nF

15nF

402

10V
10%

R712

R712

2.94K

2.94K

402
1%

MVDDC_COMP

C712

C712
390pF

390pF

603

50V

NPOX7R

5%

R714 0RR714 0R

R7090RR709
0R

share pad of R714,R709

8

C714

C714
100nF

100nF

402
X5R

MVDDC_FB

+MVDD_VCC

+12V_BUS

R707

R707

2.2R

2.2R

603
X7R

C707

C707

5%

100nF

100nF

7

10V
10%

1

3

C705

C705
100nF

100nF

603 X7R
5%

6

2

16V

www.vinafix.vn

12V_EXT Connector

C1660

C1660
47pF_50V

1
2
3

C1662

C1662
100pF_50V

100pF_50V

4
6

Overlap MC1603 and C1603

5

+12V_BUS

R1611

R1611
10K

10K

R1612

R1612

R16101KR1610
1K

R16091KR1609

1K

GPIO_19_CTF(7)

+3.3V_BUS

+5V

R12831KR1283
1K

0402

MR1284

MR1284

221R

221R

Place close

0603

to MOSFET

See Databook & SCH pg7

VDDC_REFIN(11)

47pF_50V

220pF_50V

220pF_50V

5.1K

5.1K

DNI

R1282

R1282

2.2K

2.2K

PTC2

C1601

C1601

R1613

R1613

5.1K

5.1K

1

1

VDDC_REFIN

J1601

J1601
6P_HDER

6P_HDER

+12V_1
+12V_2
+12V_3

GND_1
GND_2

D D

Sense

+3.3V_BUS

2.2K

2.2K
R1607

R1607

R16061KR1606

C C

1K

MR1282

MR1282

5.1K

5.1K

PTC1

B B

Place close
to MOSFET

GPIO_21(7)
GPIO_18(7)
GPIO_15_PWRCNTL_0(7)
GPIO_20_PWRCNTL_1(7)

A A

R1222 & R1223 must
be selected to limit
MAX ref voltage to MAX
VDDC.

See BOM for qualified
values.

5

+12V_EXT

220pF_50V

220pF_50V
C1602

C1602

DNI

C1603

C1603

MC1603

MC1603

10uF

10uF

10UF

10UF

SENSE_GND_PIN

C1661

C1661
47pF_50V

47pF_50V

+12V_BUS

EN_INTb

R1608

R1608

5.1K

5.1K

MMBT3904

MMBT3904
Q1611

Q1611

2 3

MMBT3904

MMBT3904
Q1610

Q1610

2 3

R1251

R1251

5.1K

5.1K

100NF

100NF
C1606

C1606

R1253

R1253

2.2K

2.2K

0R

R12810RR1281

C1280

C1280
100nF_6.3V

100nF_6.3V

Table 5

MOSFET Themal Protection

PTC

>= Themal shutdown temp (R>=4.7K)
< Themal shutdown temp (R < 4.7K)

+3.3V

DNI

R1295

R1295
10K

10K

R1290

R1290

R1291

R1291

10K

10K

10K

10K

R639 0RR639 0R

External Reference is used when

C659

C659
33nF_16V

33nF_16V

REFIN is driven by voltage ranged

402

from 0.4V to 3.3V

10V

R636 1KR636 1K

Internal Reference is used when

R636, R639

REFIN is pull-up to > 4.5V

share pad

5

R1602

R1602
10K

10K

R16011KR1601
1K

1

+3.3V_BUS

1

+3.3V +3.3V

R1292

R1292
10K

10K

+3.3V_BUS

R1605

R1605

5.1K

5.1K

EN_EXTb

R1603

R1603

1

5.1K

5.1K

2 3

Q1601

Q1601
MMBT3904

MMBT3904

100nF_6.3V

100nF_6.3V

C1250

C1250

PH2_ENb_r

LDO_EN

Q1612

Q1612
MMBT3904

MMBT3904

2 3

R1250

R1250

Critical Temperature Support

10K

10K

Q1253

Q1253
MMBT3904

MMBT3904

12

MMBT3904

MMBT3904

Q1251

Q1251

1

11

+3.3V_BUS

1

2 3

MOS_CTF

32

THEM_PROTECT

D

CP

R1252

R1252
10K

10K

Q1280

Q1280
BSH111

BSH111

Low
Hi

2 3

R1255

R1255
100K

100K

R1285

R1285
100K

100K

4-bit VID for VDDC Setting

R1240

R1240

R1241

R1241

10K

10K

10K

10K

R1294

R1294

R1293

R1293

10K

10K

10K

10K

R1223

R1223

10.2K

10.2K

5VCC

R16041KR1604

Q1602

Q1602

1

MMBT3904

MMBT3904

1K

2 3

MR16170RMR1617

R16170RR1617

0R

0R

+3.3V_BUS

74LCX74

74LCX74
U1250A

U1250A

14

4

10

S

C

13

2

3

U1250B

U1250B
74LCX74

74LCX74

D

CP

Q

Q

5V

GND7C

1

+3.3V_BUS

C1251

C1251

1uF_6.3V

1uF_6.3V

9

8

4 1

S

Q

Q

R1256

R1256

2.2K

2.2K

SW3A

SW3A
DIP_SWX2

DIP_SWX2

5

6

EN_Tb

1

R1254

R1254
100K

100K

Table 2: VDDC Enable/Shutdown

EN_INTb asserted
(0) when:

EN_EXTb asserted
(0) when:

EN_Tb

EXT_12V_DET
(Active High)

VDDC_EN is open collector and it is deactivated (pulled down to ground)
when: EN_INTb =1 OR EN_Tb =1 OR (EN_EXTb =1 AND SENSE_GND_PIN=0)

(bit 5 is fixed to zero VID4=0)

VID0_VDDC
VID1_VDDC
VID2_VDDC
VID3_VDDC
VID4_VDDC

VID_VREF

R1222

R1222

C1221

C1221

2.37K

2.37K

33nF_16V

33nF_16V

Table 4

Vref Mode

5VCC (11,14)

Internal
External

4

VDDC_EN

MMBT3904

MMBT3904
Q1252

Q1252

2 3

Bypass Switch
(not for production)

+12V_BUS & +3.3V_BUS are passed
the threshold limit set by the
voltage dividers

External cable plugged in, and
+12V_EXT is passed the threshold
limit set by the voltage divider

This will be cleared at
power-up, and will be set when
Critical Temperature is reached

On rising edge of LDO_EN, condition
of PH2_EN is latched to determine
the status of EXT cable.

+5V

C1222

C1222
100nF_6.3V

100nF_6.3V

40210V
X5R

VDDC Vref Mode Selection

R636

Populate

NC

VDDC_EN (11)

R1616

R1616

5.1K

5.1K

SENSE_GND_PIN

Not intended for
production

R1268

R1268

2.2K

2.2K

R1258

R1258

1

2.2K

2.2K

Place all parts close to the
regulator that uses the
voltage reference. R1241 &
R1240 can be placed close to
GPU for easy access to +3.3V.

U1220

U1220

1

VID2

2

VID1

3

VDA
VDD4VIDO

RT9401BPV8

RT9401BPV8

R639/C659 Vref (V)

NC 0.6

Populate set by VID IC (U1220)

4

+3.3V

1

+3.3V_BUS

1

+3.3V_BUS

2 3
21

R12571KR1257

1K

VID3
VID4
GND

R1615

R1615
10K

10K

Q1613

Q1613
MMBT3904

MMBT3904

2 3

R1267

R1267

2.2K

2.2K

R1269

R1269
499R

499R

Q1260

Q1260
MMBT3904

MMBT3904

2 3
21

R1259

R1259
499R

499R

Q1250

Q1250
MMBT3904

MMBT3904

D1250

D1250
GREEN_LED

GREEN_LED

8
7
6
5

D1260

D1260
SML-010-L

SML-010-L

1

See BOM for qualified config.

HOT_PLUG_DET (7)

+3.3V

R1266

R1266

5.1K

5.1K

1

Red LED On: Shows EXT
cable is not detected

Green LED Off, shows
critical temperature
fault

MMBT3904

MMBT3904
Q1254

Q1254

2 3

PH2_ENb(11)

EXT_12V_DET (7)

Q1261

Q1261
MMBT3904

MMBT3904

2 3

FAN_FULL_SPEED# (18)

VDDC Low Side Divider

R650 must be pouplated only if VID is not used and
VDDC VREFIN is pulled high to >4.5V.
Then this will set VDDC to a fixed value.

VDDC_FB(11)

- VDDC Hi-Side Divider R651 is Fixed to 5.11K

- Vo = Vref * (1 + R651 / R650 )

- Vref = 0.6V

3

12V_BUS & 12V_EXT Input Switch Circuit

+3.3V_BUS

R12351KR1235
1K

+3.3V_BUS

R1234

R1234

5.1K

5.1K

1

0R

R12370RR1237

12V_EXT

EXT_12V_DET

0NA
001
10
111

PH2_ENb

R1619

R1619

PH2_ENb_r

0R

5.1K

5.1K

R16180RR1618

Q1233

Q1233

MMBT3904

MMBT3904

SENSE_GND_PIN

2 3

SW3B

SW3B
DIP_SWX2

DIP_SWX2

3 2

FDS6675, -10A, -30V, SO-8 (2020002200G)
Alt. FDS7779Z, -16A, -30V, SO-8 (2020013800G)

Put copper area under Q1230/1231 for heat dissipation.

Table 3

0: OFF / 1: ON

12V_BUS

0

10x Buffered VDDC Output Current Monitoring

+12V_BUS

Place caps very
close to power pin

C692

C692

C691

C691

100nF

100nF

100nF

Iout(11)

Iout

Temp Comp

R693

R693

R695

R695

3.32K

3.32K

9.09K

9.09K

RpRsRT

R694

R694
7K68

7K68

Requi

U611

U611

LM321MF_NOPB

LM321MF_NOPB

R640 0RR640 0R

C657

C657
1nF

1nF

X7R

402

50V

R6911KR691

1K

1%

12V Supply Voltage single Op-Amp (U611) :

1. National LM321, SOT23-5

2. TI alternate

1
3

603
X7R

+

+

-

-

2 5

100nF

603
X7R

4

header_1x2_2mm_smt

header_1x2_2mm_smt

MVDD Power Play (Not for production)

(Vout = 1.8V ~ 2.1V )

VID0_MVDD

VDDC_FB

VID_1(7)

VID_2(7)

RFB2

R650

R650
20K

20K

VID_3(7)

402

3

0R

R12480RR1248

0R

MR12490RMR1249

0R

R12490RR1249

Install Only One

VID1_MVDD

R1230

R1230
10K

10K

TBV

DNI

R12360RR1236
0R

R1238

R1238

5.1K

5.1K

R1239

R1239

5.1K

5.1K

R1231

R1231
10K

10K

Q1232

Q1232

1

MMBT3904

MMBT3904

2 3

TBD

23

MMBT3904

MMBT3904

1

Q1235

Q1235

R1232

R1232
10K

10K

R1233

R1233
10K

10K

Q1 Q2 Q3 Q4

NA NA NA NA

11 1

NA

000
0000

Install only R1270 or MR1270

TP603

TP603
TP_32mil_SM_top

TP_32mil_SM_top

R692

R692

C693

C693

9.09K

9.09K

10nF

10nF

1%

J601

J601

2 1

RS0

R1244

R1244

165K

165K

32

Q1242

Q1242

1

2N7002E

2N7002E

2

+VDDC_Source

MQ1231

MQ1231

S

1

8

2

7

3

6

4 5

FDS6675

FDS6675

Q1

23

G

Q3

Q4

G

0: OFF / 1: ON

1

100R

100R
MR1270

MR1270

10K

10K
R1270

R1270

R1275

R1275

2.05K

2.05K

DNI
when
MR1270
used

S

+MVDDC_S

1

TBD

TBD

1

2 3

MQ1230

MQ1230

4 5
3
2
1

FDS6675

FDS6675

No Power, No boot

Board is Powered
by 12V_BUS, action taken by software

No 12V_BUS, No boot

0

Boot up in normal condition

+VDDC

12

Connect to +VDDC &
+MVDD at the ASIC

C1270

C1270
100nF_6.3V

100nF_6.3V

IRLML6402TR

IRLML6402TR

Q1231

Q1231

Q1230

Q1230

IRLML6402TR

IRLML6402TR

Status

NS1271

NS1271
NS_VIA

NS_VIA

R12711KR1271
1K

Q2

6
7
8

R12731KR1273

D

D

+MVDD

C1271

C1271

1K

100nF_6.3V

100nF_6.3V

For testing only, not intended for production

2N7002E

2N7002E

Q1243

Q1243

0R

R12460RR1246

RS1

R1245

R1245

93.1K

93.1K

32

Vref = 0.8V R1=10K

1

R4 = (R1 x 0.8V) / (Vout1 - 0.8V)

For Production

R4

RFB2

R710

R710

7.15K

7.15K

402
1%

2

MVDDC_FB (12)

Power up Sequencing

+3.3V_BUS

+VDDC

+12V_BUS

R843

R843

5.1K

5.1K

5%

R8411KR841

1K

1

C841

C841
1uF_6.3V

1uF_6.3V

+1.8V

R847 10KR847 10K

C844

C844

1uF_6.3V

1uF_6.3V

16-bit ADC for voltage & current read back

12

NS1272

NS1272
NS_VIA

NS_VIA

A_VDDC_IOUT

A_VDDC

R12721KR1272

A_MVDD

1K

R12741KR1274

C1272

C1272

1K

100nF_6.3V

100nF_6.3V

+VDDC_Source

R12420RR1242

+MVDDC_S

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Power Management

RH RV670 - Power Management

RH RV670 - Power Management

R844 5.1KR844 5.1K

1

5%

Q840

Q840
MMBT3904

MMBT3904

2 3

R846 5.1KR846 5.1K

1

5%

+12V_BUS

R848

R848
100K

100K

R849

R849
10K

10K

Q844

R12770RR1277

Q844

1

MMBT3904

MMBT3904

2 3

6

VDD

7

SDA

8

SCL

10

A1

9

A0

3

GND

0R

1

Q843

Q843

2 3

MMBT3904

MMBT3904

U1270

U1270

1

AIN0

2

AIN1

4

AIN2

5

AIN3

ADS1112

ADS1112

MVDD Input Option Circuit

R12430RR1243

0R

0R

8 1

7 2

RP1202A 0RRP1202A 0R

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, October 04, 2007

Thursday, October 04, 2007

Thursday, October 04, 2007

Sheet

Sheet

Sheet

1

5.1K

5.1K
R845

R845

Q841

Q841
MMBT3904

MMBT3904

2 3

Q842

Q842
MMBT3904

MMBT3904

2 3

+3.3V_BUS

C842

C842
10uF_X6S

10uF_X6S

C1279

C1279
100nF_6.3V

100nF_6.3V

5 4

6 3

8 1

RP1202B 0RRP1202B 0R

RP1202D 0RRP1202D 0R

RP1202C 0RRP1202C 0R

of

13 21

of

13 21

of

13 21

1

LDO_EN

Q845

Q845
SI2304DS

SI2304DS

3 2

C843

C843
100NF

100NF

402
X5R
16V

BLM15BD121SN1

BLM15BD121SN1

6 3

5 4

7 2

RP1203A 0RRP1203A 0R

RP1203B 0RRP1203B 0R

RP1203C 0RRP1203C 0R

RP1203D 0RRP1203D 0R

LDO_EN (14)

MVDD_EN (12)

1

B1279

B1279

BLM15BD121SN1

BLM15BD121SN1

R1279

R1279
100R

100R
100R

100R
R1278

R1278

B1278

B1278

+VDDC_ExtSource

+MVDDC_S

Doc No.

Doc No.

Doc No.

105-B339xx-00

105-B339xx-00

105-B339xx-00

+3.3V

R840

R840
100K

100K

LVT_EN (3)

+3.3V_BUS

DDC4DATA (3)

DDC4CLK (3)

RevDate:

RevDate:

RevDate:

2

2

2

www.vinafix.vn

8

7

6

5

4

3

2

1

LDO #2: Vout = +1.8V +/- 3%Vin = 2.5V to 3.6V MAX Iout = 0.8A (TBV) RMS MAX
PCB: 50 to 70mm sq. copper area for cooling

Use 0.51 1/2W 1210 PN 3180003200G

0.1R

0.1R
MR868

MR868

D D

+3.3V_BUS +1.8V+5V +1.8V

LDO #3: Vout = +1.1V +/- 3%

Overlap footprints

R868

R868

0.50R

0.50R

LDO_EN(13)

LDO2_VIN

LDO2_POK
LDO_EN

10uF_X6S

10uF_X6S

C866

C866

C868

C868
1uF_6.3V

1uF_6.3V

U861

U861

1

POK

2

EN

3

VIN
CNTL4REFIN

uP7706U8

uP7706U8

GND#8

VOUT

GND#9

R865

R865

C865

C865

13.0K

13.0K

33pF_50V

R864

R864

10.2K

10.2K

R5
R4

33pF_50V

C3

8
7

FB

6

R866 0RR866 0R

5
9

LDO2_FB

C862

C862
10uF_X6S

10uF_X6S

DNIDNI

C861

C861
10uF_X6S

10uF_X6S

VOUT = Vref x (1 + R5/R4)

Vin = +1.70V to 2.1VMAX Iout = Up to 1.3A (TBV) RMS MAX

C864

C864
100nF_6.3V

100nF_6.3V

LDO2_POK

+3.3V

R8991KR899
1K

OSC_EN (3)

Regulators for +5V, +5V_VESA and +5V_VESA2

+12V_BUS

MR811

MR811

R811

R811

MR812

MR812

R812

R812

27R

27R

47R

47R

1206

0805

1/4W

1/8W

5%

5%

C810

C810
100nF

100nF

0603
16V

Vout(V) = Vref (1+R2/R1)

1206

1/4W

27R

27R

47R

47R

0805

1/8W

MU810

MU810
MCP1702T-5002E/MB

MCP1702T-5002E/MB

IN2OUT

U810

U810

1

VIN

5

NC

8

NC#8
ADJ4VOUT

LM317LCDR

LM317LCDR

GND

1

VOUT#2
VOUT#3
VOUT#6

3

2
3

R813

R813

6

499R

499R

7

0402

R1

1uF_6.3V

1uF_6.3V

R814

R814

1.5K

1.5K

0402

R2

+5V_VESA

C811

C811

PCB: 50 to 70mm sq. copper area for cooling

0.1R

0.1R
MR858

MR858

1/2W 1210

R8580RR858

0R

LDO_EN(13)

1/4W 1206

Overlap footprints

LDO3_VIN

C856

C856

10uF_X6S

10uF_X6S

LDO_EN

C858

C858
1uF_6.3V

1uF_6.3V

U851

U851

1

POK

2

EN

3

VIN
CNTL4REFIN

uP7706U8

uP7706U8

GND#8

VOUT

GND#9

8
7

FB

6

R856 0RR856 0R

5
9

+MVDD

C C

LDO #6: Vout = +1.20V +/- 3%For fixed output voltage: Vin = +1.70V to 2.1V MAX
PCB: 50 to 70mm sq. copper area for cooling

+1.1V+5V +1.1V

LDO3_FB

DNI

VOUT = Vref x (1 + R5/R4)

R855

R855

3.83K

3.83K

R854

R854

10.2K

10.2K

R5

R4

C855

C855
33pF_50V

33pF_50V

C3

C851

C851

C852

C852

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

DNI

C854

C854
100nF_6.3V

100nF_6.3V

Iout = 1.3A (TBV) RMS MAX

+12V_BUS

R822

1206

1/4W

5%

C820

C820
100nF

100nF

0603
16V

R822
47R

47R

MR822

MR822
27R

27R

0805

1/8W

5%

R821

R821
47R

47R

1206 0805

Vout(V) = Vref (1+R2/R1)

MR821

MR821
27R

27R

MU820

MU820
MCP1702T-5002E/MB

MCP1702T-5002E/MB

IN2OUT

GND

1

U820

U820

1

VIN

VOUT#2

5

NC

VOUT#3

8

NC#8

VOUT#6

ADJ4VOUT

LM317LCDR

LM317LCDR

+5V_VESA2

3

2
3

R823

R823

6

499R

499R

7

0402

R1

C821

C821

1uF_6.3V

1uF_6.3V

R824

R824

1.5K

1.5K

0402

R2

LDO #6: Vout = TBDFor tracking VDDC: Vin = TBD
PCB: 50 to 70mm sq. copper area for cooling

B B

0.1R

0.1R

MR878

MR878

R870

R870

1R_1210

1R_1210

R872

R872

1R_1210

1R_1210

1/2W 1210

R8780RR878

1/4W 1206

0R

1/2W each

Overlap footprints

R871

R871

1R_1210

1R_1210

R873

R873

1R_1210

1R_1210

1/2W 1210

+MVDD

+3.3V_BUS

Add large copper area under R870~R873 for heat dissipation (~2W).

A A

8

LDO_EN(13)

LDO6_VIN

C876

0.1R

0.1R
NR878

NR878

C876

10uF_X6S

10uF_X6S

NR878 can share pad with MR878.
One of them must be installed

7

C878

C878
1uF_6.3V

1uF_6.3V

0R

R8770RR877

0R

+VDDC

DNI

MR8770RMR877

LDO_EN

See BOM for Qualified Option

U871

U871

1
2
3

uP7706U8

uP7706U8

POK
EN
VIN
CNTL4REFIN

R8760RR876

DNI

0R

MR876

MR876

10R

10R

TBD

GND#8

VOUT

GND#9

FB

8
7
6
5
9

LDO6_VREF

6

+VDDCI_LDO+5V +VDDCI_LDO

LDO6_FB

VOUT = Vref x (1 + R5/R4)

DNI

C879

C879
100nF_6.3V

100nF_6.3V

Iout = 1.3A (TBV) RMS MAX

R875

R875

5.11K

5.11K

R874

R874
10K

10K

R5
R4

C875

C875
33pF_50V

33pF_50V

C3

C872

C872
10uF_X6S

10uF_X6S

DNI

+VDDCI_LDO +VDDC

1 2

NSR0320MW2T1G

NSR0320MW2T1G

5

TBD

D870

D870

C871

C871
10uF_X6S

10uF_X6S

C874

C874
100nF_6.3V

100nF_6.3V

+12V_BUS

MR832

MR832

R832

R832

27R

27R

47R

47R

1206

0805

1/4W

1/8W

5%

5%

C830

C830
100nF

100nF

0603
16V

Vout(V) = Vref (1+R2/R1)

Install only R839 or MR839
See BOM for qualified option

+5V_BAK

5VCC

5VCC(11,13)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Linear Regulators

RH RV670 - Linear Regulators

4

3

RH RV670 - Linear Regulators

2

R8390RR839

MR8390RMR839

R831

R831
47R

47R

1206

1/4W

5%

0R

0R

MR831

MR831
27R

27R

0805

1/8W

5%

1
5
8

+5V

C839

C839

1uF_6.3V

1uF_6.3V

C838

C838

1uF_6.3V

1uF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

14 21

14 21

14 21

MU830

MU830
MCP1702T-5002E/MB

MCP1702T-5002E/MB

IN2OUT

GND

1

U830

U830

VIN

VOUT#2

NC

VOUT#3

NC#8

VOUT#6

ADJ4VOUT

LM317LCDR

LM317LCDR

+5V_VESA

of

of

of

3

2
3
6
7

Doc No.

Doc No.

Doc No.

1

+5V_BAK

R833

R833
499R

499R

0402

R1

C831

C831

1uF_6.3V

1uF_6.3V

R834

R834

1.5K

1.5K

0402

R2

+5V_VESA2

R8290RR829

0R

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

www.vinafix.vn

8

A_DAC1_R(3)

R1027

A_DAC1_RB(3)

R1027

37.4R

37.4R

A_DAC1_G(3)

R1028

D D

A_DAC1_GB(3)

A_DAC1_B(3)

A_DAC1_BB(3)

R1028

37.4R

37.4R

R1029

R1029

37.4R

37.4R

7

6

L1001 47nHL1001 47nH

C1004

C1004

R1001

R1001
75R

75R

402

8.0pF

8.0pF

402

ML1001 36NHML1001 36NH

C1001

C1001
12pF_50V

12pF_50V

402

L1002 47nHL1002 47nH

C1005

C1005

R1002

R1002
75R

75R

402

8.0pF

8.0pF

402

ML1002 36NHML1002 36NH

C1002

C1002
12pF_50V

12pF_50V

402

L1003 47nHL1003 47nH

C1003

C1006

C1006

R1003

R1003

8.0pF

8.0pF

75R

75R

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

L100x and ML100x footprints are overlapped

ML1003 36NHML1003 36NH

402

C1003
12pF_50V

12pF_50V

402402

5

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F

DDCDATA_DAC1_R
DDCCLK_DAC1_R
HSYNC_DAC1_R

VSYNC_DAC1_R

4

For ESD ProtectionSee BOM for qualified filters

+3.3V

4
5
6

D1001

D1001

CH3
Vp
CH4

CM1213-04

CM1213-04

CH2

Vn

CH1

3

+5V_VESA

D1002

3
2
1

D1002

4
5
6

CM1213-04

CM1213-04

CH3
Vp
CH4

2

Vn

1

CH1

3

CH2

2

1

+5V_VESA

MJ1001

MJ1001

1

R

2

G

3

B

11

MS0

DDC2_MONID0

12

MS1

DDC2_MONID1(SDA)

4

MS2

DDC2_MONID2

15

MS3

DDC2_MONID3(SCL)

9

NC

13

HS

14

VS

5

VSS

6

VSS#6

7

C1010

C1010
68pF

68pF

603

VSS#7

8

VSS#8

10

VSS#10

16

CASE

17

CASE#17

G3179C219-005

G3179C219-005

+3.3V

R1004

R1004
10K

C C

DDC1CLK(1,3)

C1999 100nF_6.3VC1999 100nF_6.3V

DDC1DATA(1,3)

HSYNC1(1,3,7)

VSYNC1(1,3,7)

2 3

5 6

10K

+3.3V

R1007

R1007
10K

10K

+5V

14

1

7

4

U1999A

U1999A
74VHC125

74VHC125

74VHC125

74VHC125
U1999B

U1999B

HSYNC_DAC1_B

VSYNC_DAC1_B

SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane

B B

+5V

1

1

R1005

R1005

2.2K

2.2K

DDCDATA_DAC1_5V DDCDATA_DAC1_R

32

BSH111

BSH111
Q1001

Q1001

+5V

R1008

R1008

2.2K

2.2K

DDCCLK_DAC1_5V

32

BSH111

BSH111
Q1002

Q1002

R1006 33RR1006 33R

R1009 33RR1009 33R

R1010

R1010

R1011

R1011

10R

10R

10R

10R

402

402

402

402

DDCCLK_DAC1_R

HSYNC_DAC1_R

VSYNC_DAC1_R

T2X2M(3)
T2X2P(3)

T2X4M(3)
T2X4P(3)

DDCCLK_DAC1_R
DDCDATA_DAC1_R
VSYNC_DAC1_R

T2X1M(3)

+3.3V

Q1021

Q1021

MMBT3904

MMBT3904

HPD2(7)

2 3

R1023

R1023
10K

10K

R1022 10KR1022 10K

1

T2X1P(3)
T2X3M(3)

T2X3P(3)

HPD_DVI2

T2X0M(3)
T2X0P(3)

T2X5M(3)
T2X5P(3)

T2XCP(3)
T2XCM(3)

A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F
HSYNC_DAC1_R

DB15 pin

Standard VGA
Monitor ID bit 0

11

Monitor ID bit 1

12

Monitor ID bit 2

4

Monitor ID bit 3

15

N/C

9

Mechanical Key
Hardware
Support

No Yes Yes No Yes

DDC1 Host
Monitor ID bit 0

Data from display
Monitor ID bit 2
Open
+5V
50mA min
1A max

DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max

DDC2AB Host
Monitor ID bit 0

SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max

Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997

+5V_VESA

J1001

J1001

25

CASE

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

26

CASE#26

27

CASE#27

28

CASE#28

29

CASE#29

30

CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

DDC1/2 Display
Optional

SDA
Optional
SCL

Optional

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - DAC1/TMDS2

RH RV670 - DAC1/TMDS2

8

7

6

5

4

3

RH RV670 - DAC1/TMDS2

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

15 21

of

15 21

of

15 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

www.vinafix.vn

8

7

6

5

4

3

2

1

See BOM for qualified filters

A_DAC2_R(3)

A_DAC2_RB(3)

A_DAC2_G(3)

D D

A_DAC2_GB(3)

A_DAC2_B(3)

A_DAC2_BB(3)

R2027

R2027

37.4R

37.4R

R2028

R2028

37.4R

37.4R

R2029

R2029

37.4R

37.4R

R2001

R2001
75R

75R

402

R2002

R2002
75R

75R

402

R2003

R2003
75R

75R

L2001 47nHL2001 47nH

C2004

C2004

8.0pF

8.0pF

402

ML2001 36NHML2001 36NH

C2001

C2001
12pF_50V

12pF_50V

402

L2002 47nHL2002 47nH

C2002

C2005

C2005

8.0pF

8.0pF

402

ML2002 36NHML2002 36NH

C2002
12pF_50V

12pF_50V

402

L2003 47nHL2003 47nH

C2006

C2006

ML2003 36NHML2003 36NH

8.0pF

8.0pF

402

Pseudo differential RGB should be routed from the ASIC to the display
connector without switching reference plane or running over split plane.

L200x and ML200x footprints are overlapped

C2003

C2003
12pF_50V

12pF_50V

402402

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F

DDCDATA_DAC2_R
DDCCLK_DAC2_R

+3.3V

HSYNC_DAC2_R
VSYNC_DAC2_R

D2001

D2001

4

CH3

5

Vp

6

CH4

CM1213-04

CM1213-04

3

CH2

2

Vn

1

CH1

+5V_VESA2

4
5
6

For ESD Protection

D2002

D2002

CH3
Vp
CH4

CM1213-04

CM1213-04

3

CH2

2

Vn

1

CH1

+5V_VESA2

MJ2001

MJ2001

1

R

2

G

3

B

DDC2_MONID0

11

MS0

DDC2_MONID1(SDA)

12

MS1

DDC2_MONID2

4

MS2

DDC2_MONID3(SCL)

15

MS3

9

NC

13

HS

14

VS

5

VSS

6

VSS#6

7

C2010

C2010
68pF

68pF

603

VSS#7

8

VSS#8

10

VSS#10

16

CASE

17

CASE#17

G3179C219-005

G3179C219-005

+3.3V

R2004

R2004
10K

C C

DDC2DATA(3)

DDC2CLK(3)

HSYNC2(3,7)

VSYNC2(3,7)

B B

SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane

+3.3V

9 8

10
13

12 11

10K

R2007

R2007
10K

10K

U1999C

U1999C
74VHC125

74VHC125

74VHC125

74VHC125
U1999D

U1999D

1

32

BSH111

BSH111
Q2001

Q2001

1

32

BSH111

BSH111
Q2002

Q2002

HSYNC_DAC2_B

VSYNC_DAC2_B

+5V

R2005

R2005

2.2K

2.2K

402

DDCDATA_DAC2_5V DDCDATA_DAC2_R

R2006 33RR2006 33R

402

+5V

R2008

R2008

2.2K

2.2K

402 402

DDCCLK_DAC2_5V

R2010

R2010

R2011

R2011

R2009 33RR2009 33R

402

10R

10R

402

10R

10R

HSYNC_DAC2_R

VSYNC_DAC2_R

HPD1(3)

DDCCLK_DAC2_R

Q2021

Q2021

MMBT3904

MMBT3904

+3.3V

2 3

R2023

R2023
10K

10K

R2022 10KR2022 10K

1

T1X2M(3)
T1X2P(3)

T1X4M(3)
T1X4P(3)

T1X1M(3)
T1X1P(3)

T1X3M(3)
T1X3P(3)

T1X0M(3)
T1X0P(3)

T1X5M(3)
T1X5P(3)

T1XCP(3)
T1XCM(3)

DDCCLK_DAC2_R
DDCDATA_DAC2_R
VSYNC_DAC2_R

HPD_DVI1

A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
HSYNC_DAC2_R

DB15 pin

Standard VGA

Monitor ID bit 0

11

Monitor ID bit 1

12

Monitor ID bit 2

4

Monitor ID bit 3

15

N/C

9

Mechanical Key
Hardware
Support

No Yes Yes No Yes

DDC1 Host
Monitor ID bit 0

Data from display
Monitor ID bit 2
Open
+5V
50mA min
1A max

DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max

DDC2AB Host
Monitor ID bit 0

SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max

Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997

+5V_VESA2

J2001

J2001

25

CASE

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

26

CASE#26

27

CASE#27

28

CASE#28

29

CASE#29

30

CASE#30

DVI_CONNECTOR

DVI_CONNECTOR

DDC1/2 Display
Optional

SDA
Optional
SCL

Optional

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - DAC2/TMDS1

RH RV670 - DAC2/TMDS1

8

7

6

5

4

3

RH RV670 - DAC2/TMDS1

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

16 21

of

16 21

of

16 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

www.vinafix.vn

8

D D

7

6

5

4

3

2

1

C3001

C3001
47pF_50V

47pF_50V

C3002

C3002
47pF_50V

47pF_50V

C3003

C3003
47pF_50V

47pF_50V

Install for Dell

R3010 0RR3010 0R

R3009 0RR3009 0R

C3008

C3008

C3009

C3009

82pF

82pF

82pF

82pF

402402 402

L3001 470nH_250mAL3001 470nH_250mA

L3002 470nH_250mAL3002 470nH_250mA

L3003 470nH_250mAL3003 470nH_250mA

402

A_DAC2_Y(3)

R3001

R3001
75R

75R

A_DAC2_C(3)

R3002

R3002
75R

75R

A_DAC2_COMP(3)

R3003

R3003
75R

75R

C C

Install for Dell

GENERICA(7)

DNI for Dell

402

STV/HDTV#_DET PIN6

402

DAC2_Y_DINDAC2_Y_F

402

DAC2_C_DIN

402

DAC2_COMP_DIN

+3.3V

R3008

R3008
10K

10K

402 402

C3007

C3007
82pF

82pF

- 4-pin Svideo MiniDIN P/N 6070001000G

R3011 0RR3011 0R

DAC2_C_F
DAC2_COMP_F

B B

R3004 0RR3004 0R
R3005 0RR3005 0R
R3006 0RR3006 0R

Place near connector
0R leaves footprint for Ferrite
Beads if req'd for EMI

DAC2_Y_F

C3004

C3004
47pF_50V

47pF_50V

DAC2_C_F

C3005

C3005
47pF_50V

47pF_50V

DAC2_COMP_F

C3006

C3006
47pF_50V

47pF_50V

R30070RR3007
0R

402

DNI for Dell

Install for Dell only when it's needed for EMI

C3010

C3010
82pF

82pF

402

TV Out

J3001

J3001

6

HDTV_OUT_DET#

3

Y-OUT

4

C-OUT

7

Comp_out

CompIn

5

SYNC

1

GND

2

GND#2

8

Rpin5

CASE

9

CASE#9

10

CASE#10

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

Conn_DIN_Mini_Circular_7_Pin_with_O_Ring

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - TV OUT

RH RV670 - TV OUT

8

7

6

5

www.vinafix.vn

4

3

RH RV670 - TV OUT

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

17 21

of

17 21

of

17 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

8

+3.3V +3.3V

R4032

R4032

R4003

R4003

2.61K

2.61K

10K

10K

DDC3CLK(1,3)

DDC3DATA(3)

D D

TS_FDO(3)

R4001 100RR4001 100R
R4002 100RR4002 100R

Warning: TS_FDO is not 5V tolerant. MAX sink current 1.65mA

SCL_R
SDA_R
ThermINT

7

C4002

C4002

C4003

1uF_6.3V

1uF_6.3V

VDD

C4003

100pF_50V

100pF_50V

D+

D-

C4001

C4001
10uF_X6S

10uF_X6S

U4001

U4001

8

SMBCLK

7

SMBDAT

6

ALERT
GND5PWM

LM63CIMAX

LM63CIMAX

6

R4004

R4004

13.3K

13.3K

LM63_PWM

TS_FDO

GPU_DPLUS

C4004

C4004

2.2nF_50V

2.2nF_50V

GPU_DMINUS

1
2
3
4

R4006

R4006

R4007

R4007

GPU_DPLUS (3)

GPU_DMINUS (3)ThermINT(7)

33R

33R

33R

33R

PWM

5

For 4-WIRE FAN, Production (See BOM)

R4005 33RR4005 33R

1

+3.3V_BUS

Q4001

Q4001

2 3

R4030

R4030

5.1K

5.1K

MMBT3904

MMBT3904

4

+3.3V_BUS

R4036

R4036

DNI

10K

10K

R40311KR4031

1

Q4030

1K

Q4030
MMBT3904

MMBT3904

2 3

3

TP4001

TP4001

35mil

35mil

TP4002

TP4002

35mil

35mil

TACH Connection is for testing
and RPM measurement only

Overlap R4000 & B4002

TACH

C4030

C4030
10nF

10nF

DNI

B4002

B4002
26R_600mA

26R_600mA

R4034 1KR4034 1K
R4033

R4033

3.83K

3.83K

2

+VDDC_Source

R4035

R4035
10K

10K

R4000

R4000

0.1R

0.1R

+12V_BUS

B4001

B4001
26R_600mA

26R_600mA

USE PN 4212047500G

4.7uF, 0805, 16V

C4008

C4008

C4009

C4009

1uF

1uF

1uF

1uF

4
3
2
1

1X4 3A 2MM

1X4 3A 2MM

J4030 is 2mm, and
it does not follow

2.54mm spacing as 4-wire
PWM Fan Specification

J4030

J4030

1

For 2-WIRE FAN, Socket Board Only

32

TQ4010

TQ4010

SI2304DS

SI2304DS

TJ4010TJ4010

1
2

+12V_BUS

TR4011

TR4011
10K

10K

TR4010

TR4010

FAN_FULL_SPEED#(13)

If Critical Temperature is reached this will force the fan to run at full
speed while power is removed from GPU & rest of the board.

C C

This is an open collector signal. Active level is hard pull down to ground.

1

TQ4011

10K

10K

TQ4011
MMBT3904

MMBT3904

2 3

TC4011

TC4011
1uF

1uF

0805
16V

1

H1E

H1B

H1A

H1A
RV670_DS_CU_NTK

RV670_DS_CU_NTK

1234567

8

H1F

H1F
RV670_DS_CU_NTK

8

RV670_DS_CU_NTK

41424344454647

48

B B

A A

H1B
RV670_DS_CU_NTK

RV670_DS_CU_NTK

9

10111213141516

H1G

H1G
RV670_DS_CU_NTK

RV670_DS_CU_NTK

49505152535455

7

56

H1C

H1C
RV670_DS_CU_NTK

RV670_DS_CU_NTK

17181920212223

H1H

H1H
RV670_DS_CU_NTK

RV670_DS_CU_NTK

57585960616263

H1D

H1D
RV670_DS_CU_NTK

RV670_DS_CU_NTK

24

64

6

25262728293031

H1I

H1I
RV670_DS_CU_NTK

RV670_DS_CU_NTK

656566666767686869697070717172

32

72

H1E
RV670_DS_CU_NTK

RV670_DS_CU_NTK

33343536373839

40

H1J

H1J
RV670_DS_CU_NTK

RV670_DS_CU_NTK

737374747575767677777878797980

80

5

www.vinafix.vn

4

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Thermal Management

RH RV670 - Thermal Management

3

RH RV670 - Thermal Management

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

18 21

of

18 21

of

18 21

Doc No.

Doc No.

Doc No.

1

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

ASSY-SCREW2

ASSY-SCREW2

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

ASSY-SCREW1

ASSY-SCREW1

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY-SCREW3

ASSY-SCREW3

D D

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY1

ASSY1

ANTISTATIC

ANTISTATIC
BAG

BAG

6_X_11

6_X_11

C C

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

ASSY-SCREW4

ASSY-SCREW4

SCREW

SCREW

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

JACKPOST, HEX, 3/16 AF, 4-40 INT/EXT

<3rd part field>

<3rd part field>

BKT1

BKT1

BRACKET

BRACKET
DUAL

DUAL

80200388B0G

80200388B0G

BKT1: DS, DVI - DIN - DVI

ASSY-SCREW5

ASSY-SCREW5

SCREW

SCREW

SCREW

SCREW

4

MT1

MT1
MT_Hole_0.136 TM 5.5 BM 7.0

MT_Hole_0.136 TM 5.5 BM 7.0

SK1

SK1

Socket_RV670/M88L

Socket_RV670/M88L

MT2

MT2
MT_Hole_0.136_in_6VIA

MT_Hole_0.136_in_6VIA

PCB1

PCB1

PCB

PCB

109-B33931-00

109-B33931-00

3

2

1

B B

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH RV670 - Mechanical

RH RV670 - Mechanical

5

4

www.vinafix.vn

3

2

RH RV670 - Mechanical

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

19 21

of

19 21

of

19 21

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00

5

Title

Title

Title

RH PCIE RV670 512MB GDDR4 DUAL DL-DVI-I VO FH Friday, September 14, 2007

RH PCIE RV670 512MB GDDR4 DUAL DL-DVI-I VO FH Friday, September 14, 2007

RH PCIE RV670 512MB GDDR4 DUAL DL-DVI-I VO FH Friday, September 14, 2007

REVISION HISTORY

REVISION HISTORY

REVISION HISTORY

D D

Sch

Sch

Sch

Rev

Rev

Rev

PCB

PCB

PCB

Rev

Rev

Rev

0

00A

Date

Date

Date

07/05/11

Initial design for RV670 GDDR4 (Gladiator)

4

NOTE:

NOTE:

NOTE:

3

Schematic No.

Schematic No.

Schematic No.

105-B339xx-00

105-B339xx-00

105-B339xx-00

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.

This schematic represents the PCB, it does not represent any specific SKU.
For Stuffing options (component values, DNI , ? please consult the product specific BOM.

For Stuffing options (component values, DNI , ? please consult the product specific BOM.

For Stuffing options (component values, DNI , ? please consult the product specific BOM.
Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

Please contact AMD representative to obtain latest BOM closest to the application desired.

REVISION DESCRIPTION

REVISION DESCRIPTION

REVISION DESCRIPTION

2

Date:

Date:

Date:

1

Rev

Rev

Rev

2

2

2

1 00B

C C

200

B B

07/07/29

07/08/29 (pg 16) Adding back C2001

(pg 1) Adding R1 and connecting switch #7 of TSW1. Some mother boards require PCIE pin B7 to be grounded. Table-1 updated accordingly
(pg 7) Adding R64 and MR64 to select HOT_PLUG_DET or ThermINT as the interrupt source.
(pg 13) Adding R1617, MR1617, R1616, Q1613, R1615, R1618, and R1619 as option to support hot plug detection of external cable.
(pg 13) Adding R1282, MR1282, R1283, MR1283, R1284, MR1284, R1281, R1285, Q1280, and C1280 as option for thermal protection for VDDC SMPS MOSFETs
(pg 13) Adding MC1603, Moving series resistors R1244 and R1245 from source of Q1242 & Q1245 to the drain side. It is for consistency between B340 and B339
(pg 13) Adding ADC block similar to B340 (U1270 & surrounding components). This feature allows digital readback of actual VDDC voltage, MVDD voltage and VDDC current.
(pg 14) Adding D870 as option for power up sequencing
(pg 18) Adding heatsink symbol/footprint

(Layout) Clean up of silk screen and correcting free text "JTAG ON" to "NO JTAG" on the bottom side to match Tabel-1 on pg-1
(DFM) Increasing clearance between C968, C150, R292, R294 and the clip bumpers and between C575, R1254 & mounting holes.

(pg 13) Removing overlapped parts R1284, and MR1283 to address DFM
(pg 13) Adding C1660, C1661, and C1662 to improve EMI
(Layout) Fill in the gap between vias in +MVDD and +VDDC planes

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MEMORY CHANNEL A & B

MEMORY CHANNEL C & D

GDDR4 4pcs 16Mx32 256MB GDDR4 4pcs 16Mx32 256MB

D D

External +12V

Connector

12V_EXT_DET
HOT_PLUG_DET

Debug

POWER REGULATORS

From +12V

+VDDC (MPVDD, VDDCI), +MVDD
(MVDDC, VDDR1/VDDRH)

From +12V LINEAR:

C C

B B

+5V, +5V_VESA,
+5V_VESA2,

From +12V DIRECT:

FAN

From +MVDD Linear (1.1V):

PCIE_VDDC, DPLL_VDDC
Option for VDDCI

From +3.3V:
Direct or Linear (1.8V)

VDD_CT, DPLL_PVDD, TPVDD,
T2PVDD, TXVDDR, T2XVDDR/
T2XVDDC, AVDD, VDD1DI,
VDD2DI, PCIE_VDDR, PCIE_PLL,
VDDR4, VDDR5
VDDR3, A2VDD
Option for VDDCI

+PCIE_SOURCE

+3.3V_BUS

3.3V_BUS
delayed circuit

SMPS Enable
Circuit

+12V_BUS

CrossFire
Interlink
Edge Finger

FAN
4-wire production
2-wire socket board

POWER DELIVERY

Connector

Straps

BIOS

Speed control
& temperature

sense

Buffer

Core Voltage Setting (VID0~3)

16-Bit 3-CH
ADC

Critical Temperature Fault

INTERRUPT
Temp. Sensing

Built-in PWM

CH A&B CH C&D

GPIO16
GPIO17

CrossFire

DVOCLK
DVPCNTL_[0..2]
DVPDATA[23:0]
DVP_MVP_CNTL[1:0]
GPIO[6:3]
GENERICB, DVALID

TMDS1

DL TMDS1

DAC2

H/V2Sync

GPIO

ROM

Thermal

DDC3

GPIO17
D+/D-

TS_FDO

GPIO21
GPIO18
GPIO15
GPIO20

DDC4

GPIO19_CTF

RV670

XTALIN/OUT

Capture

GENERICA

TMDS2

DL TMDS2

HPD2
(GPIO14)

DAC1

H/VSync

PCI-Express

HPD1

CRT2

DDC2

CRT1

DDC1

Shunt Resistors

HPD

&DVI-I

RGB Filters

TVO

Oscillator or Crystal

MPP

VIP

STV/HDTV#_OUT_DET

Shunt Resistors

TVO Filters

RGB Filters

Slim-VGA
Connector

TVO

Connector

HPD

DVI-I
Slim-VGA
Connector

&

+3.3V_BUS
+12V_BUS

PCI-Express Bus

RH PCIE RV670 512MB GDDR4
DUAL DL-DVI-I VO FH

REV 2

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CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
?2007 Advanced Micro Devices

?2007 Advanced Micro Devices

?2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV670 512MB GDDR4 DUAL DL-DVI-I VO FH

RH PCIE RV670 512MB GDDR4 DUAL DL-DVI-I VO FH

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RH PCIE RV670 512MB GDDR4 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Friday, September 14, 2007

Friday, September 14, 2007

Friday, September 14, 2007

Sheet

Sheet

Sheet

of

21 21

of

21 21

of

21 21

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

2

2

2

105-B339xx-00

105-B339xx-00

105-B339xx-00