Page 1
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
ASSEMBLY NVPN VARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P621-A02: G98-GB1-64, MXM-I, 256/128MB GDDR2 (32M/16Mx16),
LVDS, HDMI, TV_OUT, VGA, HD Audio, DP option
Table of Contents
Page 1: PAGE OVERVIEW
Page 2: PCI EXPRESS INTERFACE
Page 3: GPU MEMORY INTERFACE
Page 4: MEMORY LOWER SUB-PARTITION INTERFACE
Page 5: MEMORY UPPER SUB-PARTITION INTERFACE
Page 6: DAC A/B
Page 7: LVDS(LINK A/B), HD AUDIO
Page 8: HDMI, DP
Page 9: MXM CONNECTOR
Page 10: GPIO, JTAG, TEMP SENSOR
Page 11: VBIOS & HDCP ROM, XTAL, SPREAD SPECTRUM, SPDIF
Page 12: NVVDD POWER SUPPLY
Page 13: PEX, FBVDDQ POWER SUPPLY
Page 14: STRAPS
Page 15: Basenet Report
Page 16: Cref Part
Base
SKU0001
SKU0002
SKU0003
SKU9998
SKU0500
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10621-0000-200
600-10621-0001-200
600-10621-0002-200
600-10621-0003-200
600-10621-9998-200
600-50621-0500-200
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
Cancelled 128MB version
NB9M-GE G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
All components
G98-920 (G98-GLM) WORKSTATION SKU, DUAL TMDS, 256MB 32X16 DDR2
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
PAGE OVERVIEW
www.vinafix.vn
600-10621-0001-200 A
p621 1 OF 16
Thorsten Freund
11-DEC-2007
Page 2
1/13 PCI_EXPRESS
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PEX_IOVDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD_SENSE
GND_SENSE
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
PEX_PLLVDD
RFU
PEX_TERMP
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_RST
RFU
PEX_TX2
PEX_RX0
PEX_RX0
PEX_REFCLK
PEX_REFCLK
PEX_RX1
PEX_RX1
PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX2
PEX_TX5
PEX_TX5
PEX_TX4
PEX_TX4
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_RX5
PEX_RX5
PEX_TX3
PEX_TX3
PEX_TX9
PEX_TX9
PEX_TX8
PEX_TX8
PEX_RX7
PEX_RX6
PEX_RX6
PEX_RX7
PEX_RX8
PEX_RX8
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7
PEX_TX12
PEX_TX12
PEX_TX11
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_RX12
PEX_TX10
PEX_TX10
PEX_TX11
PEX_RX12
PEX_TX15
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_RX15
PEX_RX15
PEX_TX13
PEX_TX13
PEX_TX14
PEX_TX14
PEX_TX15
1/2 PCI-Express, Power
PEX_RST
CLK_REQ
PEX_REFCLK
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX1
PEX_TX1
PEX_RX1
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX0
PEX_REFCLK
PEX_RX0
PEX_TX2
PEX_RX6
PEX_TX5
PEX_TX5
PEX_RX6
PEX_TX4
PEX_TX4
PEX_RX5
PEX_RX5
PEX_TX3
PEX_RX4
PEX_RX4
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX6
PEX_TX6
PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX13
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_RX11
PEX_TX11
PEX_TX11
PEX_RX13
PEX_LSW
PRSNT1
PEX_TX15
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX13
PEX_TX13
(1.5A)
3V3RUN
1V8RUN
(3.5A)
(0.5A)
2V5RUN
(4A)
PWR_SRC
(0.5A)
5VRUN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
PCI-EXPRESS
PLACE UNDER GPU (near BALLS)
PLACE near GPU
PEX_VDD
3V3_RUN
C2
.1UF
X5R
0402
COMMON
1V8_RUN
C3
.1UF
10V 10V
10% 10%
X5R
0402
COMMON
GND
CN1
CON_MXM_X16_EDGE
NONPHY-X16
NONPHY-X16
COMMON
238
G1
G98-630-U1 NB
BGA533
CHANGED
2
C535
.1UF
10V
10%
GND
C531
4.7UF
25V
10%
X5R
1206
COMMON
GND
C29
.1UF
10V
10%
X5R
0402
COMMON
GND
C536
.1UF
10V
10%
X5R
0402
COMMON
GND
X5R
0402
COMMON
GND
234
101
104
107
110
113
116
119
122
125
128
131
138
142
150
154
158
163
164
175
176
181
182
187
188
194
199
205
206
211
212
218
223
229
235
236
241
1
18
17
20
41
44
47
50
53
56
59
62
65
68
71
74
77
80
83
86
89
92
95
98
PWR_SRC
2V5_RUN
5V_RUN
137
139
135
133
129
127
132
130
123
121
126
124
117
115
120
118
111
109
114
112
105
103
108
106
99
97
102
100
93
91
96
94
87
85
90
88
81
84
82
75
73
78
76
69
67
72
70
63
61
66
64
57
55
60
58
51
49
54
52
45
43
48
46
42
40
134
38
GND
GND
NET_NAME
PEX_TX0_C
PEX_TX0_C*
PEX_TX1_C
PEX_TX2_C
PEX_TX2_C*
PEX_TX3_C
PEX_TX3_C*
PEX_TX4_C
PEX_TX4_C*
PEX_TX5_C
PEX_TX5_C*
PEX_TX6_C
PEX_TX6_C*
PEX_TX7_C
PEX_TX7_C*
PEX_TX8_C* PEX_TX8_C79
PEX_TX9_C
PEX_TX9_C*
PEX_TX10_C
PEX_TX10_C*
PEX_TX11_C
PEX_TX11_C*
PEX_TX12_C
PEX_TX12_C*
PEX_TX13_C
PEX_TX13_C*
PEX_TX14_C
PEX_TX14_C*
PEX_TX15_C*37
PEX_PRSNT2
DIFF_PAIR
PEX_TX0_C
PEX_TX0_C
PEX_TX1_C
PEX_TX1_C PEX_TX1_C*
PEX_TX2_C
PEX_TX2_C
PEX_TX3_C
PEX_TX3_C
PEX_TX4_C
PEX_TX4_C
PEX_TX5_C
PEX_TX5_C
PEX_TX6_C
PEX_TX6_C
PEX_TX7_C
PEX_TX7_C
PEX_TX8_C PEX_TX8_C
PEX_TX9_C
PEX_TX9_C
PEX_TX10_C
PEX_TX10_C
PEX_TX11_C
PEX_TX11_C
PEX_TX12_C
PEX_TX12_C
PEX_TX13_C
PEX_TX13_C
PEX_TX14_C
PEX_TX14_C
PEX_TX15_C PEX_TX15_C39
PEX_TX15_C
R83
0402
NV_CRITICAL_NET
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
COMMON
5%
NV_IMPEDANCE
100DIFF
100DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF 0402 10V
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF .1UF C545
90DIFF
90DIFF
90DIFF
PEX_PRSNT2_R
C622
0402
C611
C601
0402
C593
0402
C587
0402
C579
0402
C575
0402
C570
0402
C568
C566
0402
C564
0402
C562
0402
C560
0402
C558
0402
C553
0402
0402
.1UF
10V
10%
X5R
COMMON
.1UF
10V 0402
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
10V
10%
X5R
COMMON
PEX_RST
14<
NV_CRITICAL_NET
NV_IMPEDANCE
1
1
C612
0402
COMMON
.1UF
10V
10%
X5R
0402 10V
C594
0402
C589
0402
C581
0402
C578
0402
C573
C569
0402
0402
C565
0402
C563
0402
C561
0402
C559
0402
C557
0402 10V
C549
C541
0402
.1UF C602
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V 0402
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
NO STUFF
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10%
X5R
COMMON
.1UF
10V 0402
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF.1UF C567
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
PCI EXPRESS INTERFACE
www.vinafix.vn
SNN_RFU_AE9
NET_NAME
DIFF_PAIR
PEX_REFCLK
PEX_RCLK
PEX_REFCLK*
PEX_RCLK
PEX_TX0
PEX_TX0
PEX_TX0*
PEX_TX0
PEX_RX0
PEX_RX0
PEX_RX0*
PEX_RX0
PEX_TX1
PEX_TX1
PEX_TX1*
PEX_TX1
PEX_RX1
PEX_RX1
PEX_RX1*
PEX_RX1
PEX_TX2
PEX_TX2
PEX_TX2*
PEX_TX2
PEX_RX2
PEX_RX2
PEX_RX2*
PEX_RX2
PEX_TX3
PEX_TX3
PEX_TX3*
PEX_TX3
PEX_RX3
PEX_RX3
PEX_RX3*
PEX_RX3
PEX_TX4
PEX_TX4
PEX_TX4*
PEX_TX4
PEX_RX4
PEX_RX4
PEX_RX4*
PEX_RX4
PEX_TX5
PEX_TX5
PEX_TX5*
PEX_TX5
PEX_RX5
PEX_RX5
PEX_RX5*
PEX_RX5
PEX_TX6
PEX_TX6
PEX_TX6*
PEX_TX6
PEX_RX6
PEX_RX6
PEX_RX6*
PEX_RX6
PEX_TX7
PEX_TX7
PEX_TX7*
PEX_TX7
PEX_RX7
PEX_RX7
PEX_RX7*
PEX_RX7
PEX_TX8
PEX_TX8
PEX_TX8* PEX_TX8 AB18
PEX_RX8
PEX_RX8
PEX_RX8*
PEX_RX8
PEX_TX9
PEX_TX9
PEX_TX9*
PEX_TX9
PEX_RX9
PEX_RX9
PEX_RX9*
PEX_RX9
PEX_TX10
PEX_TX10
PEX_TX10*
PEX_TX10
PEX_RX10
PEX_RX10
PEX_RX10*
PEX_RX10
PEX_TX11
PEX_TX11
PEX_TX11*
PEX_TX11
PEX_RX11
PEX_RX11
PEX_RX11*
PEX_RX11
PEX_TX12
PEX_TX12
PEX_TX12*
PEX_TX12
PEX_RX12
PEX_RX12
PEX_RX12*
PEX_RX12
PEX_TX13
PEX_TX13
PEX_TX13*
PEX_TX13
PEX_RX13
PEX_RX13
PEX_RX13*
PEX_RX13
PEX_TX14
PEX_TX14
PEX_TX14*
PEX_TX14
PEX_RX14
PEX_RX14
PEX_RX14*
PEX_RX14
PEX_TX15 PEX_TX15 AE25
PEX_TX15*
PEX_TX15
PEX_RX15
PEX_RX15
PEX_RX15*
PEX_RX15
AE9
AD9
AB10
AC10
AD10
AD11
AE12
AF12
AD12
AC12
AG12
AG13
AB11
AB12
AF13
AE13
AD13
AD14
AE15
AF15
AD15
AC15
AG15
AG16
AB14
AB15
AF16
AE16
AC16
AD16
AE18
AF18
AD17
AD18
AG18
AG19
AC18
AF19
AE19
AB19
AB20
AE21
AF21
AD19
AD20
AG21
AG22
AD21
AC21
AF22
AE22
AB21
AB22
AE24
AF24
AC22
AD22
AG24
AF25
AD23
AD24
AG25
AG26
AE26
AF27
AE27
AC9
AD7
AD8
AE7
AF7
AG7
AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6
J10
J12
J13
J9
L9
M11
M17
M9
N11
N12
N13
N14
N15
N16
N17
N19
N9
P11
P12
P13
P14
P15
P16
P17
R11
R12
R13
R14
R15
R16
R17
R9
T11
T17
T9
U19
U9
W10
W12
W13
W18
W19
W9
W15
W16
A12
B12
C12
D12
E12
F12
AF10
AE10
AG9
AG10
NVVDD_SENSE
GND_SENSE
PEX_PLLVDDAF9
PEX_TCLK
PEX_TCLK*
SNN_RFU_AG9
PEX_TERMP
C632
.47UF
6.3V
10%
X5R
0402
COMMON
C629
.1UF
16V
10%
X7R
0402
COMMON
PLACE UNDER GPU (near BALLS)
C626
.47UF
6.3V
10%
X5R
0402
COMMON
C619
.1UF
16V
10%
X7R
0402
COMMON
PLACE UNDER GPU (near BALLS)
C596 C618
.022UF
6.3V
10%
X5R
0402
COMMON
C627
.1UF
6.3V
10%
X7R
0402
COMMON
C628
.1UF
6.3V
10%
X7R
0402
1
PLACE UNDER GPU
C37
.1UF
6.3V
10%
X7R
0402
COMMON
PLACE UNDER GPU
C35
.01UF
6.3V
10%
X5R
0402
COMMON
R71
0402
C33
.1UF
6.3V
10%
X5R
0402
COMMON
1
1
2.49K
COMMON
1%
TP6
100DIFF
100DIFF
1.1V
16MIL
.022UF
6.3V
10%
X5R
0402
COMMON
C625
.1UF
6.3V
10%
X7R
0402
COMMON
C600
.1UF
6.3V
10%
X7R
0402
PEX_TCLK
PEX_TCLK
C634
1UF
6.3V
10%
X5R
0402
COMMON
C640
1UF
6.3V
10%
X5R
0402
COMMON
PLACE near GPU
C606
1UF 4.7UF 22UF 1UF
6.3V
10%
X5R
0402
COMMON
C613 C631
.022UF
6.3V
10%
X5R
0402
COMMON
C592
.1UF
6.3V
10%
X7R
0402
COMMON
C597
.1UF
6.3V
10%
X7R
0402
.022UF
6.3V
10%
X5R
0402
COMMON
3V3_RUN
C620
1UF
6.3V
10%
X5R
0402
COMMON
C610
.47UF
6.3V
10%
X5R
0402
COMMON
C49
10UF
6.3V
20%
X5R
0805
C614
.022UF
6.3V
10%
X5R
0402
COMMON
C609
.1UF
6.3V
10%
X7R
0402
COMMON
C624
.1UF
6.3V
10%
X7R
0402
COMMON COMMON COMMON
12<>
C621
.1UF
6.3V
10%
X7R
0402
COMMON
C31
6.3V
10%
X5R
0402
COMMON
GND
10nH
LB3
COMMON
C34
1UF
6.3V
10%
X5R
0402
COMMON
GND
0603
200
R70
NO STUFF 0402
600-10621-0001-200 A
p621
Thorsten Freund
C616
.022UF
6.3V
10%
X5R
0402
COMMON
C30
4.7UF
6.3V
10%
X5R
0603
COMMON
C537
6.3V
10%
X5R
0603
COMMON
C598
1UF
6.3V
10%
X7R
0603
COMMON
C45
22UF
6.3V
20%
X5R
0805
C36
4.7UF
6.3V
10%
X5R
0603
COMMON
NVVDD
PEX_VDD
GND
C28
22UF
6.3V
20%
X5R
0805
COMMON
GND
PEX_VDD
C32
6.3V
20%
X5R
0805
COMMON
GND
C607
4.7UF
6.3V
10%
X5R
0603
COMMON
C48
47UF
4V
20%
X5R
0805
COMMON COMMON COMMON COMMON
2 OF 16
11-DEC-2007
GND
GND
GND
Page 3
GPU MEMORY INTERFACE
OUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2/13 FRAME_BUFFER
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD19
FBA_CMD18
FBA_CMD17
FBA_CMD16
FBA_CMD15
FBA_CMD14
FBA_CMD13
FBA_CMD12
FBA_CMD11
FBA_CMD10
FBA_CMD9
FBA_CMD8
FBA_CMD7
FBA_CMD6
FBA_CMD5
FBA_CMD4
FBA_CMD3
FBA_CMD2
FBA_CMD1
FBA_CMD0
FBA_CMD20
RFU
RFU
FBA_CMD28
FBA_CMD27
FBA_CMD26
FBA_CMD25
FBA_CMD24
FBA_CMD23
FBA_CMD22
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_CMD21
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
FBA_DEBUG
FB_DLLAVDD
FB_PLLAVDD
FBA_D17
FBA_D16
FBA_D15
FBA_D14
FBA_D13
FBA_D12
FBA_D11
FBA_D10
FBA_D9
FBA_D8
FBA_D7
FBA_D6
FBA_D5
FBA_D4
FBA_D3
FBA_D2
FBA_D1
FBA_D0
FBA_D18
FBA_D38
FBA_D37
FBA_D36
FBA_D35
FBA_D34
FBA_D33
FBA_D32
FBA_D31
FBA_D30
FBA_D29
FBA_D28
FBA_D27
FBA_D26
FBA_D25
FBA_D24
FBA_D23
FBA_D22
FBA_D21
FBA_D20
FBA_D19
FBA_D58
FBA_D57
FBA_D56
FBA_D55
FBA_D54
FBA_D53
FBA_D52
FBA_D51
FBA_D50
FBA_D49
FBA_D48
FBA_D47
FBA_D46
FBA_D45
FBA_D44
FBA_D43
FBA_D42
FBA_D41
FBA_D40
FBA_D39
FBA_D59
FBA_DQS_WP3
FBA_DQS_WP2
FBA_DQS_WP1
FBA_DQS_WP0
FBA_DQM7
FBA_DQM6
FBA_DQM5
FBA_DQM4
FBA_DQM3
FBA_DQM2
FBA_DQM1
FBA_DQM0
FBA_D63
FBA_D62
FBA_D61
FBA_D60
FBA_DQS_WP7
FBA_DQS_WP6
FBA_DQS_WP5
FBA_DQS_WP4
FBA_DQS_RN7
FBA_DQS_RN6
FBA_DQS_RN5
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FB_VREF
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
GPU MEMORY CONSTRAINTS
NET
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
NET
FB_VREF
FB_PLLAVDD
50OHM
50OHM
50OHM
0.9V
1.1V
G1
G98-630-U1 NB
D21
C22
B22
A22
C24
B25
A25
A26
D22
E22
E24
D24
D26
D27
C27
B27
D16
E16
D17
F18
D20
F20
E21
F21
C16
B18
C18
D18
C19
C21
B21
A21
P22
P24
R23
R24
T23
U24
V24
N25
N26
R25
R26
T25
V26
V25
V27
V22
W22
W23
W24
AA22
AB23
AB24
AC24
W25
W26
W27
AA25
AB25
AB26
AD26
AD27
D23
C26
D19
B19
T24
T26
AA23
AB27
A24
C25
E19
A19
T22
T27
AA24
AA26
B24
D25
E18
A18
R22
R27
Y24
AA27
BGA533
CHANGED
4<> 5<>
FB_VREF
C608
.1UF
10V
10%
X5R
0402
COMMON
FBA_D<63..0>
FBA_DQM<7..0>
4<
4<
4<
4<
5<
5<
5<
5<
4<
4<
4<
4<
5<
5<
5<
5<
FBA_D<0>
0
FBA_D<1>
1
FBA_D<2>
2
FBA_D<3>
3
FBA_D<4>
4
FBA_D<5>
5
FBA_D<6>
6
FBA_D<7>
7
FBA_D<8>
8
FBA_D<9>
9
FBA_D<10>
10
FBA_D<11>
11
FBA_D<12>
12
FBA_D<13>
13
FBA_D<14>
14
FBA_D<15>
15
FBA_D<16>
16
FBA_D<17>
17
FBA_D<18>
18
FBA_D<19>
19
FBA_D<20>
20
FBA_D<21>
21
FBA_D<22>
22
FBA_D<23>
23
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31>
31
FBA_D<32>
32
FBA_D<33>
33
FBA_D<34>
34
FBA_D<35>
35
FBA_D<36>
36
FBA_D<37>
37
FBA_D<38> V23
38
FBA_D<39>
39
FBA_D<40>
40
FBA_D<41>
41
FBA_D<42>
42
FBA_D<43>
43
FBA_D<44>
44
FBA_D<45>
45
FBA_D<46>
46
FBA_D<47>
47
FBA_D<48>
48
FBA_D<49>
49
FBA_D<50>
50
FBA_D<51>
51
FBA_D<52>
52
FBA_D<53>
53
FBA_D<54>
54
FBA_D<55>
55
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<0>
0
FBA_DQM<1>
1
FBA_DQM<2>
2
FBA_DQM<3>
3
FBA_DQM<4>
4
FBA_DQM<5>
5
FBA_DQM<6>
6
FBA_DQM<7>
7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
16.00 A16
5<> 4<>
NV_CRITICAL NV_IMPEDANCE
2
2
2
MIN_LINE_WIDTH VOLTAGE
16.00
16.00
Rtop
Rbot
FBVDDQ
R531
1.05K
1%
0402
COMMON
R530
1.05K
1%
0402
COMMON
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22
FBA_CMD<0>
F26
FBA_CMD<1>
J24
FBA_CMD<2>
F25
FBA_CMD<3>
M23
FBA_CMD<4>
N27
FBA_CMD<5>
M27
FBA_CMD<6>
K26
SNN_FBA_CMD7
J25
FBA_CMD<8>
J27
FBA_CMD<9>
G23
FBA_CMD<10>
G26
FBA_CMD<11>
J23
FBA_CMD<12>
M25
FBA_CMD<13>
K27
FBA_CMD<14>
G25
FBA_CMD<15>
L24
FBA_CMD<16>
K23
FBA_CMD<17>
K24
FBA_CMD<18>
G22
FBA_CMD<19>
K25
FBA_CMD<20>
H22
FBA_CMD<21>
M26
FBA_CMD<22>
H24
FBA_CMD<23>
F27
FBA_CMD<24>
J26
FBA_CMD<25>
G24
SNN_FBA_CMND26
G27
FBA_CMD<27>
M24
SNN_FBA_CMND28
K22
SNN_FBA_RFU_1
J22
SNN_FBA_RFU_2
L22
FBA_CLK0
F24
FBA_CLK0*
F23
FBA_CLK1
N24
FBA_CLK1*
N23
FB_CAL_PD_VDDQ
B15
FB_CAL_PU_GND
A15
FB_CAL_TERM_GND
B16
M22
FB_PLLAVDD
R19
T19
FBA_DEBUG
PLACE UNDER GPU
C604
.022UF
16V
10%
X7R
0402
COMMON
C519
.1UF
10V
10%
X5R
0402
COMMON
C571 C586
4700PF
25V
10%
X7R
0402
COMMON
FBA_CMD<27..0>
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
4<
4<
5<
5<
30.1
R77
COMMON
0402
1%
30.1
R79
COMMON
0402
1%
60.4
R80
NO STUFF
0402
1%
3 50OHM
16.00
PLACE NEAR BALLS
C605
.022UF
16V
10%
X7R
0402
COMMON
C595
.1UF
10V
10%
X5R
COMMON
4700PF
25V
10%
X7R
0402
COMMON
GND
C580
.022UF
16V
10%
X7R
0402
COMMON
C508
.1UF
10V
10%
X5R
0402 0402
COMMON
C591
4700PF
25V
10%
X7R
0402
COMMON
5< 4<
FBA_CMD<11>
CKE PD
FBA_CMD<12>
ODT/RST PD
FBVDDQ
GND
R521
0402
5%
C590
1UF
6.3V
10%
X5R
0402
COMMON
GND
10K
COMMON
GND
GND
C617
.022UF
16V
10%
X7R
0402
COMMON
C603
.1UF
10V
10%
X5R
0402
COMMON
4700PF
25V
10%
X7R
0402
COMMON
R515
10K
5%
0402
COMMON
R516
10K
5%
0402
COMMON
FBVDDQ
GND
PLACE NEAR GPU
C584
.022UF
16V
10%
X7R
0402
COMMON
C583
.1UF
10V
10%
X5R
0402
COMMON
C574 C582
4700PF
25V
10%
X7R
0402
COMMON
C41
.1UF
6.3V
10%
X5R
0402
COMMON
C585
.022UF
16V
10%
X7R
0402
COMMON
C65
.1UF
10V
10%
X5R
0402
COMMON
C504
1UF
6.3V
10%
X5R
0402
COMMON
C588
1UF
6.3V
10%
X5R
COMMON
C54
4.7UF
6.3V
10%
X5R
0603
COMMON
C534
4.7UF
6.3V
10%
X5R
0603 0402
COMMON
GND
COMMAND BUS MAPPING DDR2-FBGA84
FB[63..32]
ÂA0
ÂA1
A3
A4
A5
CS1*(BA2)
CS0*
WE*
BA0
CKE
RST/ODT
A2
A12
RAS*
220R@100MHz
COMMON
PEX_VDD
C43
4.7UF
6.3V
10%
X5R
0603
COMMON
CMD
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
FB[31..0]
A3
A0
A2
A1
-
-
ÂCS1*(BA2)
CS0*
WE*
BA0
CKE
RST/ODT
ÂA12
RAS*
LB4
BEAD_0603
FBVDDQ
GND
GND
FB[31..0]
CMD
A11
CMD16
A10
CMD17
BA1
CMD18
A8 CMD19
A9
CMD20
A6
CMD21
A5
CMD22
A7
CMD23
A4
CMD24
CAS*
CMD25
A13 CMD26
BA2
CMD27
RFU0
CMD28
RFU1
CMD29
RFU2
CMD30
C47
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
FB[63..32]
A11
A10
BA1
A8
A9
A6
ÂA7
ÂCAS*
A13
BA2
RFU0
RFU1
RFU2
GND
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
GPU MEMORY INTERFACE
www.vinafix.vn
600-10621-0001-200 A
p621
Thorsten Freund
3 OF 16
11-DEC-2007
Page 4
C514
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BIBIBIININININININININININBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
.1UF
6.3V
X5R X5R
0402
COMMON COMMON
C506
.1UF
6.3V
10%
X5R
0402
COMMON
C84
.1UF
6.3V
X5R
0402
COMMON
C74
.1UF
6.3V
X5R
0402
COMMON
GND
C62
.1UF
6.3V
10%
X5R
0402
COMMON
C520
.1UF
6.3V
10%
X5R
0402
COMMON
GND
MEMORY LOWER SUB-PARTITION INTERFACE D<31..0>
3> 5< 4<
3<>
4<>
FBA_DQM<3..0>
3<>
4<>
FBA_CMD<27..0>
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<2>
2
FBA_CMD<0>
0
FBA_CMD<24>
24
FBA_CMD<22>
22
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
FBA_CMD<10>
10
FBA_CMD<18>
18
FBA_CMD<27>
27
FBA_CMD<11>
11
FBA_CLK0
FBA_CLK0*
FBA_CMD<12>
12
FBA_D<31..0>
SNN_A13_1
SNN_A14_1
SNN_A15_1
SNN_FBA_NC1
SNN_FBA_NC2
0
1
2
3
4
5
6
7
M1
32MX16DDR2-2.5
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBA_D<0>
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7> D3
FBA_DQS_WP0
FBA_DQS_RN0
M1
32MX16DDR2-2.5
BGA84
COMMON
D9
B9
D7
C8
D1
C2
B1
B3FBA_DQM<0>
B7
A8
FBVDDQ
A1
E1
J9
M9
FBVDDQ
R1
A9
C1
C3
C7 N8
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
GND
FBVDDQ
R505
1.02K
1%
R1
0402
COMMON
FBA_VREF1J2
R501
1.02K
1%
R2
0402
COMMON
VREF = FBVDDQ * R2/(R1 + R2)
LOWER SUB_PARTITION A
COMMAND BUS MAPPING
Note: CS1* not used
for single rank
C70
.1UF
16V
10%
X5R
0402
COMMON
CMD-ADDR
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27 BA2
CMD28
CMD29
CMD30
A3
A0
A2
A1
NC
NC
NC
CS1*
CS0*
WE*
BA0
CKE
RST/ODT
NC
A12
RAS*
A11
A10
BA1
A8
A9
A6
A5
A7
A4
CAS*
A13
RFU0
RFU1
RFU2
GND
M501
32MX16DDR2-2.5
BGA84
8
9
10
11
12
13
14
15
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_DQS_WP1
FBA_DQS_RN1
COMMON
D1
C2
B1
D3
D7
D9
B9
C8
B3FBA_DQM<1>
B7
A8
16
19
18
17
20
21
22
23
FBA_D<16>
FBA_D<19>
FBA_D<18>
FBA_D<17>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_DQS_WP2
FBA_DQS_RN2
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<2>
2
FBA_CMD<0>
0
FBA_CMD<24>
24
FBA_CMD<22>
22
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
FBA_CMD<10>
10
FBA_CMD<18>
18
FBA_CMD<27>
27
FBA_CMD<11>
11
FBA_CLK0
FBA_CLK0* K8
FBA_CMD<12>
12
SNN_FBA_NC3
SNN_FBA_NC4
M501
32MX16DDR2-2.5
BGA84
COMMON
F1
H3
G2
H1
F9
G8
H7
H9
F3FBA_DQM<2>
F7
E8
FBA_D<24>
24
FBA_D<25>
25
FBA_D<26>
26
FBA_D<27>
27
FBA_D<28>
28
FBA_D<29>
29
FBA_D<30>
30
FBA_D<31> H3
31
FBA_DQM<3>
FBA_DQS_WP3
SNN_A13_2
SNN_A14_2 R3
SNN_A15_2
M1
32MX16DDR2-2.5
BGA84
COMMON
H9
G8
H7
F9
G2
H1
F1
F3
F7
E8FBA_DQS_RN3
M501
32MX16DDR2-2.5
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N3
N7
P2
P8
P3
M2
P7
R2
R8
R7
L2
L3
L1
K2
J8
K9
A2
E2
FBVDDQ
FBVDDQ
A1
E1
J9
M9
FBVDDQ
R1
A9
C1
C3
C7 N8
C9
E9
G1
G3
G7
G9
FBVDDQ
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
GND
FBVDDQ
FBVDDQ
MEMORY DECOUPLING
C510
4.7UF
6.3V
10%
X5R
0603
COMMON
C509
.1UF
6.3V
10% 10% 10%
X5R
0402
COMMON
C556
4.7UF
6.3V
10%
X5R
0603
COMMON
C76
.1UF
6.3V
X5R
COMMON
MEMORY DECOUPLING
C53
4.7UF
6.3V
10%
X5R
0603
COMMON COMMON
C57
4.7UF
6.3V
10%
X5R
0603
C79
.1UF
6.3V
X5R
0402 0402
COMMON
GND
GND
C518
.1UF
6.3V
X5R
0402
COMMON
C521
.1UF
6.3V
10% 10% 10% 10% 10%
0402
J7
C551
FBA_VREF1
J2
.1UF
6.3V
10%
X5R
0402
COMMON
C502
6.3V
10%
X5R
0402
COMMON
C507
.1UF .1UF
6.3V
10%
X5R
0402
COMMON
C82
.1UF
6.3V
10%
X5R
0402
COMMON
C512
.1UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
R89
0
0402
NO STUFF
4< 3>
4< 3>
FBA_CLK0
FBA_CLK0*
R91
0402
1%
FBA_CLK0_TERM
R90
237
1%
0402
NO STUFF
475
COMMON
R92
237
1%
0402
NO STUFF
GND
1.8V
5.00
C80
.01UF
16V
10%
X7R
0402
NO STUFF
PLACE close to memorires so as to
Minimize the stub length!!
Single resistor termination to be placed on
same pads as 2 resistor termination
Place vias for both DQS, longest, and shortest
bit of each byte just outside the memory packaged body.
X-cap for CMD BUS
FBVDDQ
Place these caps next to plane transitions
MEMORY CONSTRAINTS
NET
FBA_VREF1
NET
3> 4<
3> 4<
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
4< 3>
5<
3<>
4<>
3<>
4<>
FBA_CLK0
FBA_CLK0*
FBA_DQS_WP0
FBA_DQS_RN0
FBA_DQS_WP1
FBA_DQS_RN1
FBA_DQS_WP2
FBA_DQS_RN2
FBA_DQS_WP3
FBA_DQS_RN3
FBA_CMD<27..0>
FBA_D<31..0>
FBA_DQM<3..0>
DIFFPAIR
FBA_CLK0
FBA_CLK0
FBADQS0
FBADQS0
FBADQS1
FBADQS1
FBADQS2
FBADQS2
FBADQS3
FBADQS3
MIN_LINE_WIDTH
16MIL
CRITICAL
1
1
1
1
1
1
1
1
1
1
2
2
2
VOLTAGE
0.9V
IMPEDANCE
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
50OHM
50OHM
50OHM
www.vinafix.vn
FBVDDQ
C513
.01UF
25V
10%
X7R
0402
COMMON
FBVDDQ
GND GND
FBVDDQ
C527
.01UF
25V
10%
X7R
0402
COMMON
GND
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
MEMORY LOWER SUB-PARTITION INTERFACE
C547
.01UF
25V
10%
X7R
0402
COMMON
FBVDDQ
GND
C72
.01UF
25V
10%
X7R
0402
COMMON
GND
FBVDDQ
GND
C69
.01UF
10%
X7R
0402
COMMON
C75
.01UF
25V
10%
X7R
0402
COMMON
C539
.01UF
25V 25V 25V
10%
X7R
0402
COMMON
C68
.01UF
25V
10%
X7R
0402
COMMON
C533
.01UF
10%
X7R
0402
COMMON
C511
.01UF
25V
10%
X7R
0402
COMMON
C51
.01UF
25V
10%
X7R
0402
COMMON
C525
.01UF
10%
X7R
0402
COMMON
C530
.01UF
25V 25V
10%
X7R
0402
COMMON
C71
.01UF
25V
10%
X7R
0402
COMMON
600-10621-0001-200 A
p621
Thorsten Freund
4 OF 16
11-DEC-2007
Page 5
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BIBIBIINININININININININININBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
MEMORY UPPER SUB-PARTITION INTERFACE D<63..32>
5<> 3<>
15
25
9
8
1
3
13
4
5
6
21
23
19
20
17
16
14
10
18
27
11
12
3<> 5<>
FBA_CMD<27..0>
FBA_CMD<15>
FBA_CMD<25>
FBA_CMD<9>
FBA_CMD<8>
FBA_CMD<1>
FBA_CMD<3>
FBA_CMD<13>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
FBA_CMD<21>
FBA_CMD<23>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<16>
FBA_CMD<14>
SNN_A13_3
SNN_A14_3
SNN_A15_3
FBA_CMD<10>
FBA_CMD<18>
FBA_CMD<27>
FBA_CMD<11>
FBA_CLK1
FBA_CLK1*
FBA_CMD<12>
SNN_FBA_NC5
SNN_FBA_NC6
FBA_DQM<7..4>
FBA_D<63..32>
M2
32MX16DDR2-2.5
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
32
33
34
35
36
37
38
39
FBA_D<32>
FBA_D<33>
FBA_D<34>
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<39> D9
FBA_DQM<4>
FBA_DQS_WP4
FBA_DQS_RN4
M502
32MX16DDR2-2.5
BGA84
COMMON
D3
D1
B1
C2
D7
C8
B9FBA_D<38>
B3
B7
A8
A1
E1
J9
M9
R1
A9
C1
C3 N2
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
FBVDDQ
FBVDDQ
R502
1.02K
COMMON
FBA_VREF2
R506
1.02K
COMMON
GND
FBVDDQ
1%
0402
1%
0402
R1
R2
VREF = FBVDDQ * R2/(R1 + R2)
GND
40
41
42
43
44
45
46
47
C73
.1UF
16V
10%
X5R
0402
COMMON
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_DQM<5>
FBA_DQS_WP5
FBA_DQS_RN5
UPPER SUB_PARTITION A
COMMAND BUS MAPPING
CMD-ADDR
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
Note: CS1* not used
for single rank
M2
32MX16DDR2-2.5
BGA84
COMMON
D7
D9
C8
B9
D3
C2
D1
B1
B3
B7
A8
NC
A0
NC
A1
A3
A4
A5
CS1*
CS0*
WE*
BA0
CKE
RST/ODT
A2
A12
RAS*
A11
A10
BA1
A8
A9
A6
NC
A7
NC
CAS*
A13
BA2
RFU0
RFU1
RFU2
48
49
50
51
52
53
54
55
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<55> H3
FBA_DQM<6>
FBA_DQS_WP6
M2
32MX16DDR2-2.5
BGA84
COMMON
F9
H9
H7
G8
H1
G2
F1FBA_D<54>
F3
F7
E8FBA_DQS_RN6
FBA_CMD<15>
15
FBA_CMD<25>
25
FBA_CMD<9>
9
FBA_CMD<8>
8
FBA_CMD<1>
1
FBA_CMD<3>
3
FBA_CMD<13>
13
FBA_CMD<4>
4
FBA_CMD<5>
5
FBA_CMD<6>
6
FBA_CMD<21>
21
FBA_CMD<23>
23
FBA_CMD<19>
19
FBA_CMD<20>
20
FBA_CMD<17>
17
FBA_CMD<16>
16
FBA_CMD<14>
14
SNN_A13_4
SNN_A14_4
SNN_A15_4
FBA_CMD<10>
10
FBA_CMD<18>
18
FBA_CMD<27>
27
FBA_CMD<11>
11
FBA_CLK1 J8
FBA_CLK1*
FBA_CMD<12>
12
SNN_FBA_NC7
SNN_FBA_NC8
FBA_D<56>
56
FBA_D<57>
57
FBA_D<58>
58
FBA_D<59>
59
FBA_D<60>
60
FBA_D<61>
61
FBA_D<62>
62
FBA_D<63>
63
FBA_DQM<7>
FBA_DQS_WP7
FBA_DQS_RN7
M502
32MX16DDR2-2.5
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
K8
K9
A2
E2
M502
32MX16DDR2-2.5
BGA84
COMMON
H3
F1
G2
F9
H1
H9
H7
G8
F3
F7
E8
3> 4< 5<
Place vias for both DQS, longest, and shortest
bit of each byte just outside the memory packaged body.
MEMORY CONSTRAINTS
5<
5<
5< 4<
5<>
5<> 3<>
3>
3>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3>
3<>
NET
FBA_VREF2
NET
FBA_CLK1
FBA_CLK1*
FBA_DQS_WP4
FBA_DQS_RN4
FBA_DQS_WP5
FBA_DQS_RN5
FBA_DQS_WP6
FBA_DQS_RN6
FBA_DQS_WP7
FBA_DQS_RN7
FBA_CMD<27..0>
FBA_D<63..32>
FBA_DQM<7..4>
DIFFPAIR
FBA_CLK1
FBA_CLK1
FBADQS4
FBADQS4
FBADQS5
FBADQS5
FBADQS6
FBADQS6
FBADQS7
FBADQS7
MIN_LINE_WIDTH
16MIL
CRITICAL
1
1
1
1
1
1
1
1
1
1
2
2
2
VOLTAGE
0.9V
IMPEDANCE
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
50OHM
50OHM
50OHM
www.vinafix.vn
Place near signal transition area
FBVDDQ
GND
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
MEMORY UPPER SUB-PARTITION INTERFACE
C543
.01UF
25V
10%
X7R
0402
COMMON
FBVDDQ
GND
C554
.01UF
25V
10%
X7R
0402
COMMON
FBVDDQ
GND
C64
.01UF
25V
10%
X7R
0402
COMMON
FBVDDQ
A1
E1
J9
M9
FBVDDQ
R1
A9
C1
C3 N2
C7
C9
E9
G1
G3
G7
G9
FBVDDQ
FBVDDQ
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
GND
FBVDDQ
J7
FBA_VREF2
J2
FBVDDQ
MEMORY DECOUPLING
C63
4.7UF
6.3V
10%
X5R
0603
COMMON
C503
.1UF
6.3V
10%
X5R
0402
COMMON
C555
4.7UF
6.3V
10%
X5R
0603
COMMON
C77
.1UF
6.3V
10%
X5R
0402
COMMON
MEMORY DECOUPLING
C85
4.7UF
6.3V
10%
X5R
0603
COMMON
C538
.1UF
10%
X5R
0402
COMMON
C59
4.7UF
6.3V
10%
X5R
0603
COMMON
C546
.1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10%
X5R
0402
COMMON
C548
.1UF
6.3V
10%
X5R
0402
COMMON
C516
.1UF
10%
X5R
0402
COMMON
GND
GND
C81
.1UF
6.3V
10%
X5R
0402
COMMON
C529
.1UF
10%
X5R
0402
COMMON
C544
.1UF
6.3V
10%
X5R
0402
COMMON
C528
.1UF
10%
X5R
0402
COMMON
C505
.1UF
6.3V
10%
X5R
0402
COMMON
C517
.1UF
10%
X5R
0402
C67
.1UF
6.3V
10%
X5R
0402
COMMON
C50
.1UF
10%
X5R
0402
COMMON COMMON
GND
C522
.1UF
6.3V
10%
X5R
0402
COMMON
C515
.1UF
10%
X5R
0402
COMMON
GND
FBVDDQ
R93
0
0402
NO STUFF
5< 3>
5< 3>
FBA_CLK1
FBA_CLK1*
R95
0402
1%
FBA_CLK1_TERM
R96
237
1%
0402
NO STUFF
475
COMMON
R94
237
1%
0402
NO STUFF
GND
1.8V
5.00
C83
.01UF
16V
10%
X7R
0402
NO STUFF
PLACE close to memorires so as to
Minimize the stub length!!
Single resistor termination to be placed on
same pads as 2 resistor termination
600-10621-0001-200 A
p621
Thorsten Freund
5 OF 16
11-DEC-2007
Page 6
3/13 DACA
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_RSET
DACA_VDD
DACA_VREF
4/13 DACB
DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_RSET
DACB_VDD
DACB_VREF
5/13 DACC
DACC_VSYNC
DACC_HSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
DACC_RSET
DACC_VDD
DACC_VREF
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
DAC_A
AG2
AF1
AE1
G1
G98-630-U1 NB
BGA533
CHANGED
AD2
AD1
AE2
AE3
AD3
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
R555
150
1%
0402
COMMON
9<
NV_CRITICAL
1
R553
R554
150
150
1%
1%
0402
0402
COMMON
COMMON
GND
GND GND
NV_IMPEDANCE
50OHM 1
50OHM
50OHM 1
9<
9<
9<
9<
3V3_RUN
180R@100MHz
LB2
COMMON BEAD_0603
C21
4.7UF
6.3V
X5R
0603
COMMON
GND
C23
1UF
10%
6.3V
10%
X5R
0402
COMMON
C27
470PF
50V
X7R
0402
COMMON
12mil
C25
.01UF
10%
X7R
0402
COMMON
DACA_VDD
DACA_VREF
DACA_RSET
10% 16V
R51
124
1%
0402
COMMON
GND
Place close to GPU
DAC_B
3V3_RUN
LB506
BEAD_0603
180R@100MHz
NO STUFF
G1
G98-630-U1 NB
BGA533
CHANGED
12mil
C676
4.7UF
6.3V
X5R
0603
NO STUFF
GND
C678
10K
6.3V
10%
X5R
0402
CHANGED
C633
470PF
5%
50V
X7R
0402
NO STUFF
C652
.01UF
10%
X7R
0402
NO STUFF
DACB_VDD
DACB_VREF
DACB_RSET
10% 16V
R538
124
1%
0402
NO STUFF
GND
D7
G6
F8
SNN_DACB_CSYNC
D6
E7
E6
DACB_REDF7
DACB_GREEN
DACB_BLUE
1
1
50OHM
50OHM
50OHM 1
9<
9<
9<
3
3
3
3V3_RUN
2
1
GND
2
1
GND
2
1
GND
D8
BAV99
SOT23
100V
100MA
NO STUFF
D7
BAV99
SOT23
100V
100MA
NO STUFF
D6
BAV99
SOT23
100V
100MA
NO STUFF
DACA_RED
DACA_GREEN
DACA_BLUE
R544
150
1%
0402
GND
NO STUFF
GND
150
1%
0402
NO STUFF
GND
150
1%
0402
NO STUFF
DACB_RED
R548
R542
Place close to GPU
DAC_C
G1
G98-630-U1 NB
BGA533
CHANGED
DACC_VDD
SNN_DACC_VREF
SNN_DACC_RSET
R549
10K
5%
0402
COMMON
GND
W5
R6
SNN_DACC_HSYNC
V6
U6
U4
T5
T4
SNN_DACC_VSYNC
SNN_DACC_RED
SNN_DACC_GREEN
SNN_DACC_BLUER4
DACB_GREEN
DACB_BLUE
3
3
3
3V3_RUN
2
1
GND
2
1
GND
2
1
GND
D503
BAV99
SOT23
100V
100MA
COMMON
D501
BAV99
SOT23
100V
100MA
COMMON
D502
BAV99
SOT23
100V
100MA
COMMON
TV DAC ESD PROTECTION
DAC A/B
www.vinafix.vn
600-10621-0001-200 A
p621
Thorsten Freund 11-DEC-2007
6 OF 16
Page 7
A
B
B
A
DATA
CLOCK
6/13 IFPAB
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXD4
IFPB_TXD4
IFPA_TXC
IFPA_TXC
IFPB_TXC
IFPB_TXC
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
IFPAB_RSET
IFPAB_PLLVDD
IFPB_IOVDD
IFPA_IOVDD
10/13 HDAUDIO
HDA_SYNC
HDA_SDO
HDA_SDI
HDA_RST
HDA_BCLK
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
Loading options for IFPAB outputs
Option #1) IFPAB outputs to LVDS only.
Option #2) IFPAB outputs to DVI-C only.
Option #3) Controlled with GPIO9, IFPAB dynamically outputs to LVDS or DVI-C.
13>
13>
PS_VCC_FB
PS_PGOOD_FB
R576
10K
5%
0402
COMMON
1V8_RUN
GND
Delay to
control
inrush
current on
IFPx_IOVDD.
C692
1UF
10V
10%
X5R
0603
COMMON
LB505
BEAD_0603 COMMON
180R@100MHz
GND
LB501
BEAD_0603
C658
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C668
4.7UF
6.3V
10%
X5R
0603
COMMON
180R@100MHz
COMMON
C657
1UF
6.3V
10%
X5R
0402
COMMON
1.8V
12mil
C642
C651
4700PF
4.7UF
25V
6.3V
10%
10%
X7R
X5R
0402
0603
COMMON
COMMON
GND
3.3V
16mil
C645
C654
4700PF
4700PF
10V
10V
10%
10%
X5R
X5R
0402 0402
COMMON
COMMON
C641
470PF
50V
10%
X7R
0402
COMMON
C649
470PF
16V
10%
X7R
0402
COMMON
IFPAB_PLLVDD
IFPAB_RSET
R545
1K
1%
0402
COMMON
IFPAB_IOVDD
3V3_RUN
R563
10K
5%
0402
COMMON
GPIO9_LVDS_SYS*
10>
3V3_RUN
1G1D1S
1
1G1D1S
3
Q514
SI2305DS
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
3
Q513
RTR040N03
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
GND
GPIO9_TMDS_IOVDD_EN*
1G1D1S
1V8_RUN
1
option #3.
IFPAB_IOVDD_LVDS_ISOL
3
Q516
RTR040N03
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
1G1D1S
1
R19
C8
10K
.1UF
5%
16V
0402
10%
COMMON
X7R
0402
COMMON
GND
Load for Load for
option
#1.
IFPAB_IOVDD_SW
3
Q509
SI2305DS
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
R575
0
5%
0402
NO STUFF
Load for
options
#1 and #3.
RTR040N03
SOT23_1G1D1S
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
16mil
GND
COMMON
C675
4.7UF
6.3V
10%
X5R
0603
COMMON
Q515
3
2
1G1D1S
1
IFPx_IOVDD
Sequencing
Circuit
Load for option #2.
LB504
180R@100MHz
NO STUFF BEAD_0603
LVDS/TMDS(link A&B)
G1
G98-630-U1 NB
BGA533
CHANGED
V4
V5
AA4
AD5
AB6
V3
V2
AA5
Y4
W4
AB5
AB4
V1
W1
W2
W3
AA3
AA2
AA1
AB1
AD4
AC4
AB2
AB3
IFPA_TXD0*
IFPA_TXD0
IFPA_TXD1*
IFPA_TXD1
IFPA_TXD2*
IFPA_TXD2
IFPA_TXD3*
IFPA_TXD3
IFPB_TXD4*
IFPB_TXD4
IFPB_TXD5*
IFPB_TXD5
IFPB_TXD6*
IFPB_TXD6
IFPB_TXD7*
IFPB_TXD7
IFPA_TXC*
IFPA_TXC
IFPB_TXC*
IFPB_TXC
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9< 7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
9<
7<>
3V3_RUN
IFPAB_IOVDD_EN*
1
3
Q505
RTR040N03
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
GND
1G1D1S
MOBILE_RUNPWROK
9> 12<
1G1D1S
R534
10K
5%
0402
COMMON
TMDS backdrive protection
3
Q506
SI2305DS
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
IFPAB_IOVDD_3V3 16mil
(LVDS & HD AUDIO CONSTRAINTS)
NV_IMPEDANCE NV_CRITICAL_NET DIFFPAIR NET NAME
IFPA_TXD0*
IFPA_TXD0
IFPA_TXD1*
IFPA_TXD1
IFPA_TXD2*
IFPA_TXD2
IFPA_TXD3*
IFPA_TXD3
IFPB_TXD4*
IFPB_TXD4
IFPB_TXD5*
IFPB_TXD5
IFPB_TXD6*
IFPB_TXD6
IFPB_TXD7*
IFPB_TXD7
IFPA_TXC*
IFPA_TXC
IFPB_TXC*
IFPB_TXC
IFPATXD0
IFPATXD0
IFPATXD1
IFPATXD1
IFPATXD2
IFPATXD2
IFPATXD3
IFPATXD3
IFPBTXD4
IFPBTXD4
IFPBTXD5
IFPBTXD6
IFPBTXD6 1
IFPBTXD7 1
IFPBTXD7 1
IFPATXC 1
IFPATXC 1
IFPBTXC 1
IFPBTXC 1
1
1
1
1
1
1
1
1
1
1
1
1 IFPBTXD5
1
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
7> 9<
7> 9<
7>
7> 9<
7> 9<
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9< 7>
9<
9< 7>
9< 7>
HDA1_BCLK 2
HDA1_SYNC 2
HDA1_SDI
HDA1_SDO
HDA1_RST*
HDA_BCLK
HDA_SYNC
HDA_SDI
HDA_SDO
HDA_RST*
NV_CRITICAL_NET
2
2
2
2
2
2
2
2
NV_IMPEDANCE
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
9>
7<
9>
7<
9>
7<
9>
7>
9>
7<
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
LVDS(LINK A/B), HD AUDIO
www.vinafix.vn
G1
G98-630-U1 NB
BGA533
CHANGED
HD AUDIO
A7
B7
HDA1_SDI
A6
B6
C6
R60
0402
HDA_BCLK
HDA_SYNC
10
COMMON
5%
R551
10K
5%
0402
COMMON
GND
HDA_SDI
HDA_SDO
HDA_RST*
9>
7<>
9>
7<>
9>
7<>
9>
7<>
9>
7<>
600-10621-0001-200 A
p621
Thorsten Freund
7 OF 16
11-DEC-2007
Page 8
9< 8<>
DP
TXC
DVI
TXC
TXD0
TXD0
TXD2
TXD2
TXD1
TXD1
7/13 IFPC
C
IFPC_L3
IFPC_AUX
IFPC_AUX
IFPC_L3
IFPC_L0
IFPC_L0
IFPC_L1
IFPC_L1
IFPC_L2
IFPC_L2
IFPC_RSET
IFPC_PLLVDD
IFPC_IOVDD
DP
TXC
DVI
TXC
TXD0
TXD0
TXD2
TXD2
TXD1
TXD1
8/13 IFPE
E
IFPE_L3
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L0
IFPE_L0
IFPE_L1
IFPE_L1
IFPE_L2
IFPE_L2
IFPE_PLLVDD
IFPE_RSET
IFPE_IOVDD
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
9< 8<>
9< 8<>
9< 8<>
9< 8<>
9< 8<>
9< 8<>
9< 8<>
1G1D1S
R29
100K
0402
COMMON
I2CD_SDA
I2CD_SCL
10<>
10>
3V3_RUN
R43
4.7K
5%
0402
GPIO16_MODE_C1
COMMON
DP MODE detection by SW
3V3_RUN
INTEROPERABILITY
REQUIREMENT
FOR DETECTION
1%
NO STUFF
R32
100K
5%
0402
NO STUFF
GND
R34
100K
5%
0402
COMMON
10<
9<> 8<>
9<> 8<>
4
Q1
FDC6301N
SOT23_6D_1G1D1S
COMMON
2
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
V_BE_GS=8V
DP_AUXG_R
C643
0402
C650
0402
C659
0402
C662
0402
DP_AUXT*
DP_AUXT
C4
.1UF
16V
10%
X5R
0402
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
C646
0402
C656
0402
C661
0402
C663
0402
DP(link C)
G1
G98-630-U1 NB
BGA533
C684
470PF
50V
10%
X7R
0402
COMMON
CHANGED
P6IFPC_PLLVDD
R5
J6IFPC_IOVDD
1V8_RUN
120R@100MHz
LB1
COMMON BEAD_0402
C689
4.7UF
6.3V
10%
X5R
0603
COMMON
C18
4.7UF
6.3V
10%
X5R
0603 0402 0402
COMMON
GND
C630
1UF
6.3V
10%
X5R
0402
COMMON
C15
4.7UF
6.3V
10%
X5R
0603
PEX_VDD
LB507
C691
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
120R@100MHz
COMMON BEAD_0402
16mil
COMMON
GND
GND
C26
4700PF
25V
10%
X7R
COMMON
C679
1UF
6.3V
10%
X5R
0402
COMMON
1.8V
12mil
1.1V
16mil
C683
4700PF
10V
10%
X5R
0402
COMMON
C22
470PF
50V
10%
X7R
COMMON
IFPC_RSET
R546
1K
1%
0402
COMMON
C685
470PF
50V
10%
X7R
0402
COMMON
6
Q1
FDC6301N
SOT23_6D_1G1D1S
COMMON
5
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
MAX_WATTAGE=0.7W@125C
DP_AUXG*G5
DP_AUXG
G4
DP_L3*J4
DP_L3
H4
DP_L2*
K4
DP_L2
L4
DP_L1*
M4
DP_L1
M5
DP_L0*
N4
DP_L0
P4
R_DS_ON=5R
MAX_CURRENT=0.5A
V_BE_GS=8V
1G1D1S 1G1D1S
DP_AUXG_R*
C6
.1UF
16V
10%
X5R
0402
COMMON
31
R25
0402
0402
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
0
COMMON
5%
0 R26
COMMON
5%
GPIO16_MODE_C*
SOT323_1G1D1S
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
DP_AUX_C*
DP_AUX_C
DP_L3_C*
DP_L3_C
DP_L2_C*
DP_L2_C
DP_L1_C*
DP_L1_C
DP_L0_C*
DP_L0_C
R44
0402
0402
5V_RUN
Q510
RHU002N06
COMMON
R_DS_ON=4R
V_BE_GS=+/-20V
3
2
GND
5%
5%
R562
10K
5%
0402
COMMON
33
COMMON
33 R45
COMMON
HDMI(link E)
G1
G98-630-U1 NB
BGA533
C682
470PF
50V
10%
X7R
0402
COMMON
CHANGED
N6
M6
SNN_IFPE_AUX*D4
SNN_IFPE_AUX
D3
IFPE_L3*B4 C664
IFPE_L3B3
IFPE_L2*
C4
IFPE_L2
C3
IFPE_L1*
D5
IFPE_L1
H6IFPE_IOVDD
E4
IFPE_L0*
F4
IFPE_L0F5
0402
C686
0402
C677
0402
C666
0402
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
C665
0402
C688
0402
C681
0402
0402
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF C671
COMMON
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
9< 8<>
9<
8<>
9<
8<>
9<
8<>
9<
8<>
9<
8<>
9<
8<>
9< 8<>
LinkE BIAS
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
R38
0402
R37
0402
R22
0402
R17
0402
R30
0402
R27
0402
R33
0402
R31
0402
499
COMMON
1%
499
COMMON
1%
499
COMMON
1%
499
COMMON
1%
499
COMMON
1%
499
COMMON
1%
499
COMMON
1%
499
COMMON
1%
CONTINUOUS_CURRENT=0.22A@31C
MAX_WATTAGE=0.36W@25C
1.8V
16mil
IFPE_TERM
MAX_VOLTAGE=50V
R_DS_ON=3.5R
MAX_CURRENT=0.88A
V_BE_GS=+/-20V
Q518
BSS138
SOT23_1G1D1S
COMMON
3V3_RUN
3
1G1D1S
1
2
PEX_VDD
LB508
C693
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
120R@100MHz
COMMON BEAD_0402
16mil
1V8_RUN
GND
C674
4.7UF
6.3V
10%
X5R
0603
COMMON
LB502
120R@100MHz
COMMON BEAD_0402
GND
C673
4.7UF
6.3V
10%
X5R
0603
COMMON
C16
4.7UF
6.3V
10%
X5R
0603 0402 0402
COMMON
GND
C672
1UF
6.3V
10%
X5R
0402
COMMON
C638
4700PF
25V
10%
X7R
COMMON
C667
1UF
6.3V
10%
X5R
0402
COMMON
1.8V
12mil
1.1V
16mil
C644
4700PF
10V
10%
X5R
0402
COMMON
C635
470PF
50V
10%
X7R
COMMON
IFPE_PLLVDD
IFPE_RSET
R540
1K
1%
0402
COMMON
C687
470PF
50V
10%
X7R
0402
COMMON
(HDMI / DP CONSTRAINTS)
NV_CRITICAL_NET DIFFPAIR NET NAME
IFPE_L3*
IFPE_L3
IFPE_L2*
IFPE_L2
IFPE_L1*
IFPE_L1
IFPE_L0*
IFPE_L0
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0 1
IFPE_L0
IFPETXC
IFPETXC
IFPETXD0
IFPETXD0
IFPETXD1
IFPETXD1
IFPETXD2
IFPETXD2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
9<
8>
9<
8>
9<
8>
9<
8>
9<
8>
9< 8>
9<
8>
9<
8>
DP_AUXG*
DP_AUXG
DP_AUXG_R*
DP_AUXG_R
DP_L3*
DP_L3
DP_L2*
DP_L2
DP_L1*
DP_L1
DP_L0*
DP_L0
DP_AUX
DP_AUX
DP_AUX1
DP_AUX1
DP_L3
DP_L3
DP_L2
DP_L3
DP_L1
DP_L1
DP_L0
DP_L0
1
1
1
1
1
1
1
1
1
1
1
1
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
www.vinafix.vn
NET NAME NV_IMPEDANCE NV_CRITICAL_NET DIFFPAIR NET NAME NV_IMPEDANCE
DP_AUX_C*
DP_AUX_C
DP_AUXT*
DP_AUXT
DP_L3_C*
DP_L3_C
DP_L2_C*
DP_L2_C
DP_L1_C*
DP_L1_C
DP_L0_C*
DP_L0_C
DP_AUX3
DP_AUX3
DP_AUX2
DP_AUX2
DPL3C 1
DPL3C
DPL2C 1
DPL2C 1
DPL1C
DPL0C
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
HDMI, DP
1
1
1
1
1
1 DPL1C
1
1
1 DPL0C
NV_IMPEDANCE NV_CRITICAL_NET DIFFPAIR
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
GND
9<>
8>
9<>
8>
9<
8>
9<
8>
9<
8>
9<
8>
9<
8>
9<
8>
9<
8>
9<
8>
600-10621-0001-200 A
p621
Thorsten Freund
8 OF 16
11-DEC-2007
Page 9
INININININININININININININININININININININININININININININININININININ
DVI-B DP_A
2/2 IO - LVDS,DVI,DP,VGA,TV
HDTV SDTV
DVI_A_CLK
DVI_A_CLK
DVI_A_TX0
DVI_A_TX2
DVI_A_TX1
DVI_A_TX1
DVI_A_TX0
DVI_A_TX2
DVI_B_TX2
DVI_B_TX2 DP_A_L0
DP_A_L0
DVI_B_TX1
DVI_B_TX1
DVI_B_CLK
DVI_B_CLK
DVI_B_TX0
DVI_B_TX0
DP_B_L2
DP_B_L2
DP_B_L1
DP_B_L0
DP_B_L0
DP_B_L1
DP_A_L2
DP_A_L2
DP_A_L3
DP_A_L3
DP_A_L1
DP_A_L1
DP_B_L3
DP_B_L3
LVDS_UTX0
LVDS_UTX1
LVDS_UTX3
LVDS_UTX2
LVDS_UTX2
LVDS_UTX0
LVDS_UTX1
LVDS_LTX0
LVDS_UCLK
LVDS_UCLK
LVDS_UTX3
LVDS_LTX0
LVDS_LTX1
LVDS_LTX3
LVDS_LCLK
LVDS_LTX2
LVDS_LTX3
LVDS_LTX2
LVDS_LTX1
LVDS_LCLK
DVI_B_C_HPD
DVI_A_HPD
DDCB_SDATA
DDCB_SCLK
HDTV_Y
HDTV_Pr
HDTV_Pb TV_CVBS
TV_C
TV_Y
VGA_BLU
VSYNC
HSYNC
VGA_RED
VGA_GRN
DDCA_SCLK
LVDS_BL_BRGHT
DP_AUX
DP_AUX
DDCA_SDATA
DP_HPD
DDCC_SCLK
LVDS_BLEN
DDCC_SDATA
LVDS_PPEN
SMB_CLK
THERM
SMB_DAT
RUNPWROK
AC/BATT*
HDA_SDI
HDA_SDO
HDA_SYNC
HDA_BCLK
SPDIF
HDA_RST
OUTININININBIININININBIINOUTBIIN
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
MXM CONNECTOR
CN1
CON_MXM_X16_EDGE
(NON)PHY(-X16,-HE)
NONPHY-X16
COMMON
219
10<
10>
10<>
6>
6>
6>
6>
6>
11< 10>
11<>
12<
10<>
10<>
10<>
10<
6>
6>
6>
10>
10>
10>
10>
10<
10>
7<
MOBILE_RUNPWROK
R86
0402
1%
C60
220PF
50V
5%
C0G
0402
COMMON
GND
ESD Protection for
MOSFET Gates
1K
COMMON
10<
11<
IFPE_HPD
I2CB_SCL_R
I2CB_SDA_R
10<
DACB_GREEN
DACB_RED
DACB_BLUE
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL_R
I2CA_SDA_R
8<> 8>
8<> 8>
GPIO3_PPEN
GPIO4_BLEN
GPIO2_BL_PWM
I2CC_SCL_R
I2CC_SDA_R
SMB_DATA
SMB_CLK
THERM_ALERT*
MOBILE_RUNPWROK_IN
MOBILE_AC_BATT
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=2
C615SPDIF
0402
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=2
.01UF
25V
10%
7<>
JB
7<>
COMMON
7> 7<>
7<> 7<
7<> 7<
IFPC_HPD
SNN_CN1_200
DP_AUX_C*
DP_AUX_C
SPDIF_MXM
HDA_BCLK
HDA_SYNC
HDA_SDO
HDA_SDI
HDA_RST*
217
232
230
193
140
136
144
153
151
148
152
156
155
157
200
171
173
224
228
226
222
220
145
147
149
169
170
143
141
161
159
146
16
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
MXM CONNECTOR
www.vinafix.vn
221
237
239
231
233
225
227
201
203
207
209
213
215
189
191
195
197
183
185
177
179
165
167
186
184
180
178
174
172
168
166
162
160
216
214
210
208
204
202
198
196
192
190
SNN_DPB_195
SNN_DPB_197
SNN_DPB_183
SNN_DPB_185
SNN_DPB_177
SNN_DPB_179
SNN_DPB_165
SNN_DPB_167
IFPB_TXD4
IFPB_TXD4*
IFPB_TXD5
IFPB_TXD5*
IFPB_TXD6
IFPB_TXD6*
IFPB_TXD7
IFPB_TXD7*
IFPB_TXC
IFPB_TXC*
IFPA_TXD0
IFPA_TXD0*
IFPA_TXD1
IFPA_TXD1*
IFPA_TXD2
IFPA_TXD2*
IFPA_TXD3
IFPA_TXD3*
IFPA_TXC
IFPA_TXC*
DP_L0*
DP_L0
DP_L1*
DP_L1
DP_L2*
DP_L2
DP_L3*
DP_L3
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
DP_L0_C*
DP_L0_C
DP_L1_C*
DP_L1_C
DP_L2_C*
DP_L2_C
DP_L3_C*
DP_L3_C
8<> 8>
8<> 8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
8<>
8>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7> 7<>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
7<> 7>
600-10621-0001-200 A
p621
Thorsten Freund
9 OF 16
11-DEC-2007
Page 10
VDD
THERM
ALERT
GND
D+
D-
SDA
SCL
9/13 I2C_GPIO_THERM_JTAG
GPIO0
I2CE_SDA
I2CE_SCL
I2CD_SDA
I2CD_SCL
I2CC_SDA
I2CC_SCL
I2CB_SDA
I2CB_SCL
I2CA_SDA
I2CA_SCL
GPIO1
GPIO5
GPIO4
GPIO3
GPIO2
GPIO6
GPIO8
GPIO7
GPIO9
GPIO19
GPIO18
GPIO17
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
THERMDP
JTAG_TDI
JTAG_TCK
JTAG_TDO
JTAG_TMS
JTAG_TRST
THERMDN
I2CS_SCL
I2CS_SDA
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
GPIO, TEMP SENSOR, JTAG
R569
10k
5%
0402
COMMON
5%
R48
R47
0402
R53
0402
MOBILE_AC_BATT
0
COMMON
GND
3V3_RUN 3V3_RUN
5%
5%
5%
R41
10K
5%
0402
COMMON
R568
2.2K
5%
0402
COMMON
33
COMMON 0402
33
COMMON
33
COMMON
1G1D1S
6
Q2
FDC6301N
SOT23_6D_1G1D1S
1
5
COMMON
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
7<
9>
8<
1G1D1S
4
V_BE_GS=8V
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
PS_PGOOD_NV
3
2
Q2
COMMON
FDC6301N
SOT23_6D_1G1D1S
GND
CONTINUOUS_CURRENT=4A@25C
MAX_WATTAGE=1W@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
V_BE_GS=12V
MAX_VOLTAGE=30V
V_BE_GS=8V
R_DS_ON=5R
MAX_VOLTAGE=25V
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
CONTINUOUS_CURRENT=0.22A
R4
10K
5%
0402
COMMON
1
SOT23_1G1D1S
COMMON
2
R21
10K
5%
0402
COMMON
1G1D1S
RTR040N03
3
GND GND
Q511
GPIO3_PPEN
GPIO4_BLEN
R11
10K
5%
0402
COMMON
THERM_ALERT*
13< 12>
3V3_RUN
R36
R35
4.7K
4.7K
5%
5%
0402
0402
COMMON
COMMON
9<
9<
9<
12<
12<
9<
as per HDMI spec
1k5 < R < 2k2
3V3_RUN
R7
R1
4.7K
4.7K
5%
5%
0402
0402
COMMON
COMMON
R5
100K
5%
0402
COMMON
GND
R50
100K
5%
0402
COMMON
GND
0402
3V3_RUN
2
3
1
GND
R13
04025%COMMON
3V3_RUN
2
3
1
GND
R6
D2
BAV99
SOT23
70V
215MA
COMMON
D4
BAV99
SOT23
70V
215MA
COMMON
R3
2.2K
5%
0402
COMMON
5%
10K
COMMON
10K
3V3_RUN
R8
2.2K
5%
0402
COMMON
I2CA_SCL_R
I2CA_SDA_R
I2CB_SCL_R
I2CB_SDA_R
I2CC_SCL_R
I2CC_SDA_R
I2CD_SCL
I2CD_SDA
IFPC_HPD
IFPE_HPD
9<
9<>
9<
9<>
11<
10< 9<
11<> 10<>
9<>
8<>
8<>
9>
9>
3V3_RUN
R564
200
5%
0402
I2C ADDRESS: 0x98H
NOSTUFF for internal sensor
U503
MAX6649MUA
SO8_122MIL
COMMON
10MIL
R579
0402
10V
10%
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
0
NO STUFF
5%
10MIL
THERM_SCL
THERM_SDA
THERM*
THERM
I2CS_SCL
I2CS_SDA
Stuff for
11< 10> 9<
9<> 10<> 11<>
I2CC_SCL_R
I2CC_SDA_R
connecting ExtThermalSensor to DDCC
0
R574
NO STUFF
0402
5%
R570
0402
5%
3V3_RUN
R55
180
5%
0402
COMMON
TP1
TP5
TP4
TP3
TP2
Place lab TP
together
0
R567
COMMON
0402
5%
0
R582
COMMON
0402
5%
NOSTUFF,
except to
connect
SMBus to
external
sensor.
0
NO STUFF
3V3_RUN
R56
270
5%
0402
COMMON
3V3_RUN
R58
R59
10K
10K
5%
5%
0402
0402
COMMON
COMMON
R57
10K
5%
0402
COMMON
GND GND
3V3_RUN
R572
47K
5%
0402
R581
0402
ONLY for IntThermalSensor
tied to SMBus
5%
C680
2200PF
0402
X5R
COMMON
R578
47K
5%
0402
NO STUFF NO STUFF
0
NO STUFF
2
3
8
7
G1
G98-630-U1 NB
BGA533
CHANGED
D8
D9
AF3
AF4
AG4
AE4
AG3
T1
T2
ONLY FOR IntThermalSensor
NOT connected
3V3_RUN
R580
47K
5%
0402
COMMON
1
THERM_ALERTM*
4
GPIO8_SLOWDOWNM*
6
5
R573
47K
5%
0402
COMMON
COMMON
THERM_VDD
12mil
R565
0402
5%
GND
0
COMMON
R1
T3
R2
R3
A2
B1
N2
N3
Y6
W6
N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2
GND
C690
.1UF
16V
10%
X7R
0603
COMMON
0
R566
COMMON
0402
5%
I2CA_SCL
I2CA_SDA
0402
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
SNN_I2CE_SCL
SNN_I2CE_SDA
GPIO1_DP_HPDC
GPIO2_BL_PWM
GPIO3_PPEN_GPU
GPIO4_BLEN_GPU
GPIO5_NVVDDCTL0
GPIO6_NVVDDCTL1
SNN_GPIO7
GPIO8_THERM_ALERT*
GPIO9_LVDS_SYS*
SNN_GPIO10
SNN_GPIO11
GPIO12_AC_DET
SNN_GPIO13
SNN_GPIO14
GPIO15_DVI_A_HPDE
GPIO16_MODE_C
SNN_GPIO17_CEC_DET_C
SNN_GPIO18_MODE_E
SNN_GPIO19_CEC_DET_E
0402
0402
R46
R54
33 R49
COMMON
5%
33
COMMON
5%
33
COMMON
5%
R40
0402
9>
9<>
SMB_CLK
SMB_DATA
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
GPIO, JTAG, TEMP SENSOR
www.vinafix.vn
600-10621-0001-200 A
p621
Thorsten Freund
10 OF 16
11-DEC-2007
Page 11
13/13 GND_NC
NC
NC
NC
NC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SCL
VCC
SDA
GND
A0
WP
A1
A2
VCC
GND
HOLD
WP
CS
SI
SCK
SO
12/13 XTAL_PLL
XTAL_OUTBUFF
XTAL_OUT
PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN
XTAL_SSIN
VDD
CLKOUT/
FS_IN0
REFOUT/
FS_IN1
GND
CLKIN
PD
SDATA
SCLK
11/13 MISC
I2CH_SCL
I2CH_SDA
ROM_CS
ROM_SCLK
ROM_SI
ROM_SO
RFU
RFU
BUFRST
RFU_GND
TESTMODE
STRAP2
STRAP1
STRAP0
STRAP_REF_3V3
STRAP_REF_MIOB
SPDIF
RFU
RFU
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
14> 11<
14>
11<
G1
G98-630-U1 NB
BGA533
GND
4.7
COMMON
C7
B9
A9STRAP2
F11
F10
F9
C15
D15
C17
4.7UF
6.3V
10%
X5R
0603
COMMON
CHANGED
LB503
BEAD_0603
C14
4.7UF
6.3V
10%
X5R
0603
COMMON
180R@100MHz
COMMON
4.7UF
6.3V
10%
X5R
COMMON
C12 C20
.1UF
6.3V
10%
X5R
0402 0603
COMMON
C669
1UF
6.3V
10%
X5R
0402
COMMON
C19
470PF
16V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
B10
A10
C10
C9
A3
A4
N5
J5
F6
AD25
AC6
ROM_CS*
ROM_SO
ROM_SI
ROM_SCLK
I2CH_SCL
I2CH_SDA
SNN_BUFRST*
SNN_RFU_J5
SNN_RFU_F6
GPU_TESTMODE
C648C670
4700PF
25V
10%
X7R
0402
COMMON COMMON
R14
22
5%
0402
COMMON
Place close to ICS91720
C639
470PF
50V 10%
X7R
0402
COMMON
R81
10K
5%
0402
COMMON
GND GND
XTAL_PLLVDD
12MIL
XTAL_SSFOUT
XTALIN
GND
C7
22PF
50V
5%
C0G
0402
COMMON
1
SP_VDD
12MIL
K5
K6
L6
D11
D10
G1
G98-630-U1 NB
BGA533
CHANGED
NV_IMPEDANCE NV_CRITIC
R18
10K
5%
0402
COMMON
14>
14>
14>
STRAP0
STRAP1
Select Multi-level strap
R536
10K
0402
NO STUFF
STRAP_REF_3V3
STRAP_REF_MIOB
SPDIF
5%
GND
PEX_VDD
SNN_RFU_C15
SNN_RFU_D15
3V3_RUN
GND
R39
0603
5%
40.2K
R75
COMMON
0402
1%
40.2K
R543
COMMON
0402
1%
GND
Per design guide,
no pull-down
necessary.
9>
14> 11<
11<
14> 11<
50OHM
SPREAD
3V3_RUN
R12
10K
5%
0402
COMMON
SP_FOUT
14>
R52
0402
COMMON
10K
3V3_RUN
5%
R73
10K
5%
0402
COMMON
ROM_CS*
ROM_SO
ROM_SI
ROM_SCLK
3V3_RUN
GND
XTAL
XTAL_4PIN
27 MHZ
Y1
10 PPM
H10SSMD
COMMON
U2
ICS91730BM
SO8
2
COMMON
4
5SP_REF
I2C Address: 0xD4
www.vinafix.vn
U3
3V3_RUN
7
3
1
5
2
6
MX25L1005
SO8
SO8
COMMON
3V3_RUN
8
4
GND
C13
.1UF
10V
10%
X5R
0402
COMMON
HDCP CRYPTO/I2C ROM
R571
I2C ROM
10K
5%
0402
COMMON
R577
CRYPTO ROM
10K
5%
0402
NO STUFF
XTALOUT_BUF
E9
XTALOUT
E10
NV_IMPEDANCE NV_CRITIC
1
3V3_RUN
50OHM
8
XTALOUT_BUF_R
1
I2CC_SCL_R
7
I2CC_SDA_R
6 3
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
VBIOS & HDCP ROM, XTAL, SPREAD SPECTRUM, SPDIF
GND
C5
.1UF
10V
10%
X5R
0402
COMMON
GND
3V3_RUN
GND
C1
22PF
50V
5%
C0G
0402
COMMON
9<
8
6
5
4
10<
9<>
HDCP_I2CROM_PROGD
10>
10<>
GND
COMMON
R541
10K
5%
0402
NO STUFF
U1
SO8
7
1
2
3
Place close to GPU
R583
INTERNAL SS : STUFF
EXTERNAL SS : NO STUFF
3V3_RUN
VBIOS ROM
14>
11<
0402
3V3_RUN
GND
22
5%
COMMON
G1
G98-630-U1 NB
BGA533
CHANGED
SNN_NC1
AC11
AC14
AC17
AC2
AC20
AC23
AC26
AC5
AC8
AF11
AF14
AF17
AF2
AF20
AF23
AF26
AF5
AF8
B11
B14
B17
B2
B20
B23
B26
B5
B8
E11
E14
E17
E2
E20
E23
E26
E5
E8
H2
H5
J11
J14
J17
K19
K9
L11
L12
L13
L14
L15
L16
L17
L2
L5
M12
M13
M14
M15
M16
P19
P2
P23
P26
P5
P9
T12
T13
T14
T15
T16
U11
U12
U13
U14
U15
U16
U17
U2
U23
U26
U5
V19
V9
W11
W14
W17
Y2
Y23
Y26
Y5
GND
AA6
AC19
E15
T6
SNN_NC2
SNN_NC3
SNN_NC4
600-10621-0001-200 A
p621
Thorsten Freund
11 OF 16
11-DEC-2007
Page 12
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO
FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
VOLTAGE NODE PROPERTIES
MAX CURRENT
POWER
NET
MIN SOURCE
LINE
WIDTH
12MIL
16MIL
12MIL
30MIL
16MIL
16MIL
12MIL
12MIL
1.5A
3.5A
0.5A
4A
10A
2.5A
5A
GND
3V3_RUN
1V8_RUN
5V_RUN
PWR_SRC
NVVDD
PEX_VDD
FBVDDQ
VOLTAGE
3.3V
3V3_RUN
1V8_RUN
5V_RUN
PWR_SRC
5V_RUN
6269: No Stuff
6269A: Stuff
GND
13< 10<
9> 7<
PS_PGOOD_NV
MOBILE_RUNPWROK
R532
C653
1UF
6.3V
10%
X5R
0402
COMMON
0402
0
COMMON
5%
445kHz
GND
R550
30K
5%
0402
COMMON
R535
10K
5%
0402
COMMON
PS_VCC_NVVDD
GND
PS_FS_NVVDD
C647
.01UF
16V
10%
X5R
0402
COMMON
C623
1UF
6.3V
10%
X5R
0402
COMMON
R537
0
5%
0402
NO STUFF
PS_DR_NVFCCM
R533
0
5%
0402
COMMON
3V3_RUN
R525
2.2K
5%
0402
COMMON
10>
GPIO6_NVVDDCTL1
10>
GPIO5_NVVDDCTL0
NVVDD SWITCHER
U502
ISL6269ACRZ
VR_SW=0.6V
MLFP16
MLFP16
12
DEM_DIS
DEM_EN
16
TP
R539
0402
PS_CP_NVVDD1
R24
2.2K
5%
0402
NO STUFF
2
3
4
7
5
CHANGED
5%
0402
R528
10K
5%
0402
NO STUFF
68K
COMMON
PS_CP_NVVDD2
C636
0402
R522
10K
COMMON
5%
R23
10K
5%
0402
COMMON
82PF
50V
5%
C0G
COMMON
0402
1
PS_UG_NVVDD
14
20MIL
PS_BOOT_NVVDD13
PS_PHASE_NVVDD
15
16MIL
PS_ISEN_NVVDD
9
PS_LG_NVVDD
11
20MIL
10
8
6
3300PF
C637
50V 0402
10%
X7R
COMMON
Rbot1
R520
9.76K
1%
0402
COMMON
NVVDD_CTL1_R
1G1D1S
1NVVDD_CTL1
.1UF
C576
16V
0402
10%
X7R
COMMON
R20
10K
COMMON
5%
C599
0402
GND
R558
0402
R552
0402
3
Q502
RHU002N06
SOT323_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
.1UF
16V
10%
X7R
COMMON
0
COMMON
5%
6.49K
COMMON
1%
10MIL
NVVDD_CTL0_R
1G1D1S
NVVDD_CTL0 1
C655
1000PF
16V
10%
X7R
0402
NO STUFF
Rbot0
22.6K
COMMON
R524
0402
.1UFPS_BOOT_NV1
1%
C660
0603
25V
10%
COMMON
X7R
LFPAK
4
GND
PS_FB_NVVDD
3
Q504
RHU002N06
SOT323_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
LFPAK
4
5
Q4
BSC059N03S
LFPAK
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
2
R_DS_ON=5.5mR
MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
PWR_SRC
5
Q3
BSC119N03S
LFPAK
COMMON
1
2
3
R517
390
5%
0402
COMMON
Rtop
R518
3.01K
1%
0402
COMMON
Rbot
R523
5.9K
1%
0402
COMMON
GND
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A
R_DS_ON=18mR@4.5V
MAX_CURRENT=120A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
10A
Input Ripple approx 3.7A
16MIL
GND
GND
NVVDD_SENSE
C24
4.7UF
25V 25V
10%
X5R
1206
COMMON
C38
2200PF
50V
10%
X7R
0402
COMMON
PS_RC_NVVDD
R78
1.5
5%
1206
COMMON
GND
C572
.1UF
25V
10%
X5R
0603
COMMON
R519
10
5%
0402
CHANGED
PS_CP_NVVDD3
C577
1000PF
16V
10%
X7R
0402
CHANGED
C9
4.7UF
10%
X5R
1206
COMMON
GND
Vout = (1 + Rt/Rb) x 0.6
GND
SMD_6X6
L3
SMD_6X6
C10
4.7UF
25V
10%
X5R
1206
COMMON
COMMON
COMMON
GND
2.2uH L1
2.2uH
NVVDD
PEX_VDD
FBVDDQ
C11
4.7UF
25V
10%
X5R
1206
COMMON
GND
NVVDD = 0.9V ~ 1.2V
NVVDD
NVVDD
C40
220UF
NO STUFF
+/-20%
2.5V
POSCAP
3.1A
0.015R
SMD_7343
GND
2<>
C39
470UF
CHANGED
20%
2.5V
POSCAP
3900MA@100KHZ,45C
9MOHM
SMD_7343
GND
10A
C46
4.7UF
6.3V
10%
X5R
0805
COMMON
GND
1.8V
5.0V
22V
1.2V
1.1V
1.8V
TRUE
TRUE
TRUE
TRUE
0V
GND
GND
GND
**STARTUP VOLTAGE 1.09V
0.9V
NOT VALID
1.17V
RTop G98M
3k01
3k01
3k01
3k01
RBot
5k9
5k9 || 9.7K
NOT VALID
5k9 || 19k1 ||8k87
Low
LOW
HIGH
HIGH
GPIO6 GPIO5
Low
HIGH
LOW
HIGH
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
NVVDD POWER SUPPLY
www.vinafix.vn
600-10621-0001-200 A
p621
Thorsten Freund
12 OF 16
11-DEC-2007
Page 13
FBVDDQ & PEX Power Supplies
SW
SW
BST
SW
BG
FB
VCC
IN
IN
IN
PG
EN/SYNC
GND
GND
NC
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO
FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
PEX POWER SUPPLY
PWR_SRC
Ripple Current = 1.2A @ 7.5V
C532
1UF
6.3V
10%
X5R
0402
COMMON
The pull-up on PGOOD is provided
GND
by the dynamic LVDS TIMDS switching
circuit on P7
13> 7<
13< 12> 10<
5V_RUN
7<
PS_PGOOD_FB
PS_PGOOD_NV
500kHz
5V_RUN
GND
13<
GND
PS_PGOOD_FB
PS_PGOOD_NV
C66
.01UF
25V
10%
JB
0402
COMMON
SNN_PEX_NC
C55
1UF
6.3V
10%
X5R
0402
COMMON
13>
12>
C52
1UF
25V
10%
X7R
0805
COMMON
GND
7<
10<
GND
FRAME BUFFER POWER SUPPLY
C540
1UF
6.3V
10%
X5R
0402
COMMON
NO STUFF
PS_FS_FB
R513
0402
0
COMMON
5%
R509
27K
5%
0402
COMMON
GND
PS_VCC_FB
GND
C526
1000PF
16V
10%
X7R
0402
COMMON
R512
0
DEM_DIS
5%
0402
NO STUFF
PS_DR_FBFCCM
R510
0
DEM_EN
5%
0402
COMMON
4
5
6
12
2
3
14
15
7
12
2
3
16
4
7
TP
5
R508
0402
PS_CP_FB1
U4
MP8640DL
VR_SW=0.8V
DFN14
COMMON
U501
ISL6269ACRZ
VR_SW=0.6V
MLFP16
MLFP16
CHANGED
62K
COMMON
5%
C524
0402
82PF
50V
5%
C0G
COMMON
1
14
13
15
9
11
10
8
6
C501PS_CP_FB2
0402
PS_BOOT_PEX
11
8
9
10
PS_LG_PEX
13
1
PS_UG_FBVDDQ
20MIL
PS_BOOT_FBVDDQ
PS_PHASE_FBVDDQ
16MIL
PS_ISEN_FBVDDQ
PS_LG_FBVDDQ
20MIL
3300PF
50V
10%
X7R
COMMON
.01UF
C86
10V
0402
10%
X5R
COMMON
PS_PHASE_PEX
1G4D3S
4
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=7.1A
R_DS_ON=.031R
MAX_CURRENT=50A
MAX_WATTAGE=2.1W
V_BE_GS=20
Solution does not work or
in case of shortage
PS_FB_PEX
PS_BOOT_FB1 .1UF
0 R514
COMMON
0402
5%
3.6K
R511
COMMON
0402
5%
PS_FB_FB
8
7
6
5
Q5
A04414
SO8_1G4D3S
NO STUFF
1
2
3
GND
C542
0603
25V
10%
COMMON
X7R
C552
1000PF
16V
10%
X7R
0402
NO STUFF
3
Q6
RTR040N03
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
V_BE_GS=12V
STUFF BOTH FETS
@3A, P(per Fet) = 160mW Stuff SO8 FET only if SOT23
@70 Deg C Ambient, Junction Temp(per Fet) = 90 C
PWR_SRC
LFPAK
LFPAK
5
Q503
BSC119N03S
LFPAK
4
COMMON
1
2
3
5
Q501
BSC059N03S
LFPAK
4
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
2
R_DS_ON=5.5mR
MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
GND
1G1D1S 1G1D1S
GNDMAX_WATTAGE=1W@25C
Input Ripple approx 2.7A
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A
R_DS_ON=18mR@4.5V
MAX_CURRENT=120A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
5.0A
16MIL
Vout = Vref * (1 + Rtop / Rbot)
1.8V = 0.6V * (1 + 3.09k/1.54k)
For detailed voltage calculation see P473_Voltage_calculator.xls
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
C550
2200PF
50V
10%
X7R
0402
COMMON
PS_RC_FB
R82
2.21
1%
1206
COMMON
GND
3
Q7
RTR040N03
SOT23_1G1D1S
COMMON
2
1
2
GND
L2
GND
GND
17.0mOhm MAX
L4
D9
BAT43
SOD323
40V
400MA
NO STUFF
COMMON SMD_6X6
2.2uH
C42
4.7UF
25V
10%
X5R
1206
COMMON
C89
47UF
6.3V
20%
X5R
1206
COMMON
PEX_VDD
VOUT MIN = 1.06V
VOUT NOM = 1.099V
VOUT MAX = 1.13V
PEX = 1.1V
PEX = 3A
Ripple Voltage = 6.4mV @ 600KHz @VIN = 7.5V
R16
10K
R2
40.2K
1%
0402
COMMON
R9
107K
1%
0402
COMMON
GND
C44
4.7UF
25V
10%
X5R
1206
COMMON
GND
5%
0402
NO STUFF
PS_RC_PEX
C87
.1UF
16V
10%
X5R
0402
NO STUFF
GND
FBVDDQ=1.8V
1UH
COMMON SMD_6X6
C56
100UF
COMMON
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
GND
Rtop
R507
3.09K
1%
0402
COMMON
Rbot
R504
1.54K
1%
0402
COMMON
C523
1000PF
16V
10%
X7R
0402
CHANGED
NO STUFF
PS_CP_FB3
R503
10
5%
0402
CHANGED
NO STUFF
C78
100UF
COMMON
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
GND
C61
100UF
NO STUFF
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
GND
C58
100UF
COMMON
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
GND
FBVDDQ
www.vinafix.vn
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
PEX, FBVDDQ POWER SUPPLY
GND
600-10621-0001-200 A
p621
Thorsten Freund
13 OF 16
11-DEC-2007
Page 14
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5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
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1
A
5
4
3
H F D G E B A C
2V5_RUN
STRAP_VREF
3V3_RUN
STRAP0
USER_BIT0
USER_BIT1
0xF: 45K PU (unused)
USER_BIT2
0
STRAPS
R61
0402
5%
0
NO STUFF
R63
0402
COMMON
5%
USER_BIT3
ROM_SO is routed as the MEMORY Strap (Connects to ROM_SI pin)
ROM_SI is routed as the TV Strap (Connects to ROM_SO pin)
11<
11<
14>
11<
11<
11<
11<
STRAP0
STRAP1
STRAP2
ROM_SO
ROM_SI
ROM_SCLK
R64
45.3K
1%
0402
COMMON
R62
4.99K
1%
0402
NO STUFF
R527
4.99K
1%
0402
NO STUFF
R526
45.3K
1%
0402
CHANGED
R67
24.9K
1%
0402
NO STUFF
R69
10K
1%
0402
R74
4.99K
1%
0402
NO STUFF
R76
4.99K
1%
0402
NO STUFF
R68
10K
1%
0402
CHANGED
R66
4.99K
1%
0402
NO STUFF COMMON
GND
STRAP_VREF
R529
4.99K
1%
0402
NO STUFF
R72
25.5K
1%
0402
CHANGED
GND
STRAP1
STRAP2
ROM_SI
ROM_SCLK
3GIO_PADCFG_LUT_ADR0
3GIO_PADCFG_LUT_ADR1
3GIO_PADCFG_LUT_ADR2
3GIO_PADCFG_LUT_ADR3
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
TV_MODE_BIT0
TV_MODE_BIT1 ROM_SO
TV_MODE_BIT2
XCLK_277
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_EXT
SUB_VENDOR
SLOT_CLK_CONFIG
PEX_PLL_EN_TERM100
0x0: Desktop default (normal swing) - 5k PD
0x1: Mobile default (low swing) - 10k PD
acc. to //hw/tesla_g98b/manuals/dev_ext_devices.ref
all 4 bits set by HW strapping
0x06E8: 5K PU (NB9M-GE)
0x06E9: 10K PU (NB9M-GS)
0x0: NTSC-M
1:
128 MB (4pcs. 16Mx16)
RAM_CFG[3:0] Definitions
0000 Elpida
0001 Samsung
0010 Qimonda
0011 Hynix
0100 Nanya
0:
1: SUB_VENDOR BIOS
0:
0: TERM100 DISABLED
5K PU
256 MB (4pcs. 32Mx16)
RAM_CFG[3:0] Definitions
0100 25k PD Elpida
0101 30k PD Samsung
0110 35k PD Qimonda
0111 45k PD Hynix
25K PD
PEX SWING LEVEL
3V3_RUN
STRAP1
R561
100K
1%
0402
NO STUFF
1G1D1S
R560
0402
1
0
COMMON
5%
3
Q508
BSS138
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
R_STRAP1
10k
5k (10k ll 10k)
PEX_PRSNT2_T
3V3_RUN
R559
100K
1%
0402
COMMON
GND
R65
10K
1%
0402
COMMON
STRAP1_R
3
Q507
BSS138
0
COMMON
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
STRAP1_R_REF
R556
0402
5%
1
5%
R557
0402
1G1D1S
3_GIO_PADCFG_LUT<3..0>
0x1 MOBILE_DEFAULT
0x0 DESKTOP_DEFAULT
STRAP_VREF
0
NO STUFF
MECHANIC
MEC2
1
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
2
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
3
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
4
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
GND
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
STRAPS
www.vinafix.vn
GND
11<
14>
2>
PEX_PRSNT2_R
PEX_PRSNT2_R
GND
FLOAT
MEC1
MXM_I_MOUNTING_HOLES
X2
COMMON
1
MEC1
MXM_I_MOUNTING_HOLES
X2
COMMON
2
600-10621-0001-200 A
p621
Thorsten Freund
14 OF 16
11-DEC-2007
Page 15
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
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H F D G E B A C
Title: Basenet Report
Design: p621
Date: Dec 11 12:08:17 2007
Base nets and synonyms for
p621_lib.P621(@p621_lib.p621(sch_1))
Base Signal Location([Zone][dir])
DACA_BLUE 6.1G> 6.4G 9.3A<
DACA_GREEN 6.1G> 6.4G 9.3A<
DACA_HSYNC 6.1G> 9.3A<
DACA_RED 6.1G> 6.3G 9.3A<
DACA_RSET 6.1C
DACA_VDD 6.1C
DACA_VREF 6.1C
DACA_VSYNC 6.1G> 9.3A<
DACB_BLUE 6.3G> 6.4F 9.3A<
DACB_GREEN 6.3G> 6.4F 9.2A<
DACB_RED 6.3F 6.3G> 9.3A<
DACB_RSET 6.2C
DACB_VDD 6.2C
DACB_VREF 6.2C
DACC_VDD 6.4C
DP_AUXG 8.2E 8.5D<>
DP_AUXG* 8.2E 8.5D<>
DP_AUXG_R 8.1E 8.5D<>
DP_AUXG_R* 8.1E 8.5D<>
DP_AUXT 8.1E 8.5F<>
DP_AUXT* 8.1E 8.5F<>
DP_AUX_C 8.2G> 8.5F<> 9.3C<>
DP_AUX_C* 8.2G> 8.5F<> 9.3C<>
DP_L0 8.2E 8.5D<>
DP_L0* 8.2E 8.5D<>
DP_L0_C 8.2F> 8.5F<> 9.2F<
DP_L0_C* 8.2F> 8.5F<> 9.2F<
DP_L1 8.2E 8.5D<>
DP_L1* 8.2E 8.5D<>
DP_L1_C 8.2F> 8.5F<> 9.2F<
DP_L1_C* 8.2F> 8.5F<> 9.2F<
DP_L2 8.2E 8.5D<>
DP_L2* 8.2E 8.5D<>
DP_L2_C 8.2F> 8.5F<> 9.3F<
DP_L2_C* 8.2F> 8.5F<> 9.2F<
DP_L3 8.2E 8.5D<>
DP_L3* 8.2E 8.5D<>
DP_L3_C 8.2F> 8.5F<> 9.3F<
DP_L3_C* 8.2F> 8.5F<> 9.3F< FBA_D<33> 3.2C 5.3B
FBA_CLK0 3.3E> 4.2A 4.2E 4.3G<
4.5A<
FBA_CLK0* 3.3E> 4.2A 4.2E 4.3G<
4.5A<
FBA_CLK0_TERM 4.3G
FBA_CLK1 3.3E> 5.2A 5.2E 5.4G<
5.5A<
FBA_CLK1* 3.3E> 5.2A 5.2E 5.4G<
5.5A<
FBA_CLK1_TERM 5.3G
FBA_CMD<0> 3.2E 4.1A 4.1E
FBA_CMD<27..0> 3.2F> 4.1A< 4.5A<
5.1A< 5.5A<
FBA_CMD<1> 3.2E 4.1A 4.1E 5.1A
5.1E
FBA_CMD<2> 3.2E 4.1A 4.1E
FBA_CMD<3> 3.2E 4.1A 4.1E 5.1A
5.1E
FBA_CMD<4> 3.2E 5.1A 5.1E
FBA_CMD<5> 3.2E 5.1A 5.1E
FBA_CMD<6> 3.2E 5.1A 5.1E
FBA_CMD<8> 3.2E 4.1A 4.1E 5.1A
5.1E
FBA_CMD<9> 3.2E 4.1A 4.1E 5.1A
5.1E
FBA_CMD<10> 3.2E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<11> 3.2E 3.2F 4.2A 4.2E
5.2A 5.2E
FBA_CMD<12> 3.3E 3.3F 4.2A 4.2E
5.2A 5.2E
FBA_CMD<13> 3.3E 5.1A 5.1E
FBA_CMD<14> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<15> 3.3E 4.1A 4.1E 5.1A
5.1E
FBA_CMD<16> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<17> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<18> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<19> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<20> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<21> 3.3E 4.1A 4.1E 5.2A
5.2E
FBA_CMD<22> 3.3E 4.1A 4.1E
FBA_CMD<23> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_CMD<24> 3.3E 4.1A 4.1E
FBA_CMD<25> 3.3E 4.1A 4.1E 5.1A
5.1E
FBA_CMD<27> 3.3E 4.2A 4.2E 5.2A
5.2E
FBA_D<0> 3.1C 4.3B
FBA_D<31..0> 4.3A<> 4.5A<>
3.1C<>
FBA_D<63..0> 3.1C<>
5.3A<> 5.5A<>
FBA_D<1> 3.1C 4.3B
FBA_D<2> 3.1C 4.3B
FBA_D<3> 3.1C 4.3B
FBA_D<4> 3.1C 4.3B
FBA_D<5> 3.1C 4.3B
FBA_D<6> 3.1C 4.3B
FBA_D<7> 3.1C 4.3B
FBA_D<8> 3.1C 4.3C
FBA_D<9> 3.1C 4.3C
FBA_D<10> 3.1C 4.3C
FBA_D<11> 3.1C 4.3C
FBA_D<12> 3.1C 4.3C
FBA_D<13> 3.1C 4.3C
FBA_D<14> 3.1C 4.3C
FBA_D<15> 3.1C 4.3C
FBA_D<16> 3.1C 4.3D
FBA_D<17> 3.1C 4.3D
FBA_D<18> 3.1C 4.3D
FBA_D<19> 3.1C 4.3D
FBA_D<20> 3.1C 4.3D
FBA_D<21> 3.2C 4.3D
FBA_D<22> 3.2C 4.3D
FBA_D<23> 3.2C 4.3D
FBA_D<24> 3.2C 4.3D
FBA_D<25> 3.2C 4.3D
FBA_D<26> 3.2C 4.3D
FBA_D<27> 3.2C 4.3D
FBA_D<28> 3.2C 4.3D
FBA_D<29> 3.2C 4.3D
FBA_D<30> 3.2C 4.3D
FBA_D<31> 3.2C 4.3D
FBA_D<32> 3.2C 5.3B
FBA_D<63..32> 3.1C<>
5.3A<> 5.5A<>
FBA_D<34> 3.2C 5.3B
FBA_D<35> 3.2C 5.3B
FBA_D<36> 3.2C 5.3B
FBA_D<37> 3.2C 5.3B
FBA_D<38> 3.2C 5.3B
FBA_D<39> 3.2C 5.3B
FBA_D<40> 3.2C 5.3C
FBA_D<41> 3.2C 5.3C
FBA_D<42> 3.2C 5.3C
FBA_D<43> 3.2C 5.3C
FBA_D<44> 3.2C 5.3C
FBA_D<45> 3.2C 5.3C
FBA_D<46> 3.2C 5.3C
FBA_D<47> 3.2C 5.3C
FBA_D<48> 3.2C 5.3D
FBA_D<49> 3.2C 5.3D
FBA_D<50> 3.2C 5.3D
FBA_D<51> 3.3C 5.3D
FBA_D<52> 3.3C 5.3D
FBA_D<53> 3.3C 5.3D
FBA_D<54> 3.3C 5.3D
FBA_D<55> 3.3C 5.3D
FBA_D<56> 3.3C 5.3E
FBA_D<57> 3.3C 5.3E
FBA_D<58> 3.3C 5.3E
FBA_D<59> 3.3C 5.3E
FBA_D<60> 3.3C 5.3E
FBA_D<61> 3.3C 5.3E
FBA_D<62> 3.3C 5.3E
FBA_D<63> 3.3C 5.3E
FBA_DEBUG 3.4E
FBA_DQM<0> 3.3C 4.4B
FBA_DQM<3..0> 4.3A<> 4.5A<>
3.3C<>
FBA_DQM<7..0> 3.3C<>
5.3A<> 5.5A<>
FBA_DQM<1> 3.3C 4.4C
FBA_DQM<2> 3.3C 4.4D
FBA_DQM<3> 3.3C 4.4D
FBA_DQM<4> 3.3C 5.4B
FBA_DQM<7..4> 3.3C<>
5.3A<> 5.5A<>
FBA_DQM<5> 3.3C 5.4C
FBA_DQM<6> 3.3C 5.4D
FBA_DQM<7> 3.3C 5.4E
FBA_DQS_RN0 3.4C<> 4.4B 4.5A<
FBA_DQS_RN1 3.4C<> 4.4C 4.5A<
FBA_DQS_RN2 3.4C<> 4.4D 4.5A<
FBA_DQS_RN3 3.4C<> 4.4D 4.5A<
FBA_DQS_RN4 3.4C<> 5.4B 5.5A<
FBA_DQS_RN5 3.4C<> 5.4C 5.5A<
FBA_DQS_RN6 3.4C<> 5.4D 5.5A<
FBA_DQS_RN7 3.4C<> 5.4E 5.5A<
FBA_DQS_WP0 3.3C<> 4.4B 4.5A<
FBA_DQS_WP1 3.3C<> 4.4C 4.5A<
FBA_DQS_WP2 3.3C<> 4.4D 4.5A<
FBA_DQS_WP3 3.3C<> 4.4D 4.5A<
FBA_DQS_WP4 3.4C<> 5.4B 5.5A<
FBA_DQS_WP5 3.4C<> 5.4C 5.5A<
FBA_DQS_WP6 3.4C<> 5.4D 5.5A<
FBA_DQS_WP7 3.4C<> 5.4E 5.5A<
FBA_VREF1 4.2C 4.2F 4.4A<>
FBA_VREF2 5.2B 5.2F 5.4A<>
FB_CAL_PD_VDDQ 3.1A<> 3.4E
FB_CAL_PU_GND 3.2A<> 3.4E
FB_CAL_TERM_GND 3.2A<> 3.4E
FB_PLLAVDD 3.2A<> 3.4E
FB_VREF 3.2A<> 3.5C
GND_SENSE 2.4F
GPIO1_DP_HPDC 10.3D
GPIO2_BL_PWM 9.4A< 10.3F>
GPIO3_PPEN 9.3A< 10.3F>
GPIO3_PPEN_GPU 10.3D
GPIO4_BLEN 9.3A< 10.3F>
GPIO4_BLEN_GPU 10.3D
GPIO5_NVVDDCTL0 10.3F> 12.4A<
GPIO6_NVVDDCTL1 10.3F> 12.4A<
GPIO8_SLOWDOWNM* 10.2D
GPIO8_THERM_ALERT* 10.3D
GPIO9_LVDS_SYS* 7.2A< 10.3E>
GPIO9_TMDS_IOVDD_E 7.2B
N*
GPIO12_AC_DET 10.3D
GPIO15_DVI_A_HPDE 10.3D
GPIO16_MODE_C 8.1G< 10.3E<
GPIO16_MODE_C* 8.1F
GPU_TESTMODE 11.2C
HDA1_BCLK 7.5D<>
HDA1_RST* 7.5D<>
HDA1_SDI 7.4F 7.5D<>
HDA1_SDO 7.5D<>
HDA1_SYNC 7.5D<>
HDA_BCLK 7.4H< 7.5D<> 9.4C>
HDA_RST* 7.4H< 7.5D<> 9.4C>
HDA_SDI 7.4H< 7.5D<> 9.4C>
HDA_SDO 7.4H> 7.5D<> 9.4C>
HDA_SYNC 7.4H< 7.5D<> 9.4C>
I2CA_SCL 10.2D
I2CA_SCL_R 9.3A< 10.2H>
I2CA_SDA 10.2D
I2CA_SDA_R 9.3A<> 10.2H<>
I2CB_SCL 10.2D
I2CB_SCL_R 9.2A< 10.3H>
I2CB_SDA 10.3D
I2CB_SDA_R 9.2A<> 10.3H<>
I2CC_SCL 10.3D
I2CC_SCL_R 9.4A< 10.2A< 10.3H>
11.5E<
I2CC_SDA 10.3D
I2CC_SDA_R 9.4A<> 10.2A<>
10.3H<> 11.5E<>
I2CD_SCL 8.1G<> 10.3H>
I2CD_SDA 8.1G<> 10.3H<>
I2CH_SCL 11.1C
I2CH_SDA 11.2C
I2CS_SCL 10.3C
I2CS_SDA 10.3C
IFPAB_IOVDD 7.2F
IFPAB_IOVDD_3V3 7.3B
IFPAB_IOVDD_EN* 7.3B
IFPAB_IOVDD_LVDS_I 7.2B
SOL
IFPAB_IOVDD_SW 7.2C
IFPAB_PLLVDD 7.1F
IFPAB_RSET 7.1F
IFPA_TXC 7.2H> 7.5B<> 9.4F<
IFPA_TXC* 7.2H> 7.5B<> 9.4F<
IFPA_TXD0 7.1H> 7.4B<> 9.4F<
IFPA_TXD0* 7.1H> 7.4B<> 9.4F<
IFPA_TXD1 7.1H> 7.4B<> 9.4F<
IFPA_TXD1* 7.1H> 7.4B<> 9.4F<
IFPA_TXD2 7.2H> 7.5B<> 9.4F<
IFPA_TXD2* 7.2H> 7.5B<> 9.4F<
IFPA_TXD3 7.2H> 7.5B<> 9.4F<
IFPA_TXD3* 7.2H> 7.5B<> 9.4F<
IFPB_TXC 7.3H> 7.5B<> 9.4F<
IFPB_TXC* 7.2H> 7.5B<> 9.4F<
IFPB_TXD4 7.2H> 7.5B<> 9.3F<
IFPB_TXD4* 7.2H> 7.5B<> 9.3F<
IFPB_TXD5 7.2H> 7.5B<> 9.4F<
IFPB_TXD5* 7.2H> 7.5B<> 9.4F<
IFPB_TXD6 7.2H> 7.5B<> 9.4F<
IFPB_TXD6* 7.2H> 7.5B<> 9.4F<
IFPB_TXD7 7.2H> 7.5B<> 9.4F<
IFPB_TXD7* 7.2H> 7.5B<> 9.4F<
IFPC_HPD 9.2C> 10.3H<
IFPC_IOVDD 8.2C
IFPC_PLLVDD 8.2C
IFPC_RSET 8.2C
IFPE_HPD 9.2A> 10.3H<
IFPE_IOVDD 8.4C
IFPE_L0 8.4E 8.5B<>
IFPE_L0* 8.4E 8.5B<>
IFPE_L1 8.4E 8.5B<>
IFPE_L1* 8.4E 8.5B<>
IFPE_L2 8.4E 8.5B<>
IFPE_L2* 8.4E 8.5B<>
IFPE_L3 8.3E 8.5B<>
IFPE_L3* 8.3E 8.5B<>
IFPE_PLLVDD 8.3C
IFPE_RSET 8.3C
IFPE_TERM 8.4H
IFPE_TXC 8.3G 8.4F> 8.5B<>
9.2F<
IFPE_TXC* 8.3F> 8.3G 8.5B<>
9.2F<
IFPE_TXD0 8.4F> 8.4G 8.5B<>
9.2F<
IFPE_TXD0* 8.3G 8.4F> 8.5B<>
9.2F<
IFPE_TXD1 8.4F> 8.4G 8.5B<>
9.2F<
IFPE_TXD1* 8.4F> 8.4G 8.5B<>
9.2F<
IFPE_TXD2 8.4F> 8.4G 8.5B<>
9.2F<
IFPE_TXD2* 8.4F> 8.4G 8.5B<>
9.2F<
JTAG_TCLK 10.3C
JTAG_TDI 10.3C
JTAG_TDO 10.3C
JTAG_TMS 10.3C
JTAG_TRST 10.3C
MOBILE_AC_BATT 9.4B> 10.3E<
MOBILE_RUNPWROK 7.3A< 9.4A> 12.2A<
MOBILE_RUNPWROK_IN 9.4B
NVVDD 12.2F
NVVDD_CTL0 12.4C
NVVDD_CTL0_R 12.4C
NVVDD_CTL1 12.4C
NVVDD_CTL1_R 12.4C
NVVDD_SENSE 2.4G<> 12.3E<>
PEX_PLLVDD 2.4F
PEX_PRSNT2 2.5C
PEX_PRSNT2_R 2.5D> 14.4A<
PEX_PRSNT2_T 14.4B
PEX_REFCLK 2.2E
PEX_REFCLK* 2.2E
PEX_RST 2.2D
PEX_RX0 2.2E
PEX_RX0* 2.2E
PEX_RX1 2.2E
PEX_RX1* 2.2E
PEX_RX2 2.2E
PEX_RX2* 2.2E
PEX_RX3 2.3E
PEX_RX3* 2.3E
PEX_RX4 2.3E
PEX_RX4* 2.3E
PEX_RX5 2.3E
PEX_RX5* 2.3E
PEX_RX6 2.3E
PEX_RX6* 2.3E
PEX_RX7 2.3E
PEX_RX7* 2.3E
PEX_RX8 2.4E
PEX_RX8* 2.4E
PEX_RX9 2.4E
PEX_RX9* 2.4E
PEX_RX10 2.4E
PEX_RX10* 2.4E
PEX_RX11 2.4E
PEX_RX11* 2.4E
PEX_RX12 2.4E
PEX_RX12* 2.4E
PEX_RX13 2.5E
PEX_RX13* 2.5E
PEX_RX14 2.5E
PEX_RX14* 2.5E
PEX_RX15 2.5E
PEX_RX15* 2.5E
PEX_TCLK 2.5F
PEX_TCLK* 2.5F
PEX_TERMP 2.5F
PEX_TX0 2.2E
PEX_TX0* 2.2E
PEX_TX0_C 2.2C
PEX_TX0_C* 2.2C
PEX_TX1 2.2E
PEX_TX1* 2.2E
PEX_TX1_C 2.2C
PEX_TX1_C* 2.2C
PEX_TX2 2.2E
PEX_TX2* 2.2E
PEX_TX2_C 2.2C
PEX_TX2_C* 2.2C
PEX_TX3 2.2E
PEX_TX3* 2.2E
PEX_TX3_C 2.2C
PEX_TX3_C* 2.2C
PEX_TX4 2.3E
PEX_TX4* 2.3E
PEX_TX4_C 2.3C
PEX_TX4_C* 2.3C
PEX_TX5 2.3E
PEX_TX5* 2.3E
PEX_TX5_C 2.3C
PEX_TX5_C* 2.3C
PEX_TX6 2.3E
PEX_TX6* 2.3E
PEX_TX6_C 2.3C
PEX_TX6_C* 2.3C
PEX_TX7 2.3E
PEX_TX7* 2.3E
PEX_TX7_C 2.3C
PEX_TX7_C* 2.3C
PEX_TX8 2.3E
PEX_TX8* 2.3E
PEX_TX8_C 2.3C
PEX_TX8_C* 2.3C
PEX_TX9 2.4E
PEX_TX9* 2.4E
PEX_TX9_C 2.4C
PEX_TX9_C* 2.4C
PEX_TX10 2.4E
PEX_TX10* 2.4E
PEX_TX10_C 2.4C
PEX_TX10_C* 2.4C
PEX_TX11 2.4E
PEX_TX11* 2.4E
PEX_TX11_C 2.4C
PEX_TX11_C* 2.4C
PEX_TX12 2.4E
PEX_TX12* 2.4E
PEX_TX12_C 2.4C
PEX_TX12_C* 2.4C
PEX_TX13 2.4E
PEX_TX13* 2.4E
PEX_TX13_C 2.4C
PEX_TX13_C* 2.4C
PEX_TX14 2.5E
PEX_TX14* 2.5E
PEX_TX14_C 2.5C
PEX_TX14_C* 2.5C
PEX_TX15 2.5E
PEX_TX15* 2.5E
PEX_TX15_C 2.5C
PEX_TX15_C* 2.5C
PS_BOOT_FB1 13.3C
PS_BOOT_FBVDDQ 13.3C
PS_BOOT_NV1 12.2C
PS_BOOT_NVVDD 12.2C
PS_BOOT_PEX 13.2C
PS_CP_FB1 13.5B
PS_CP_FB2 13.4B
PS_CP_FB3 13.4E
PS_CP_NVVDD1 12.3B
PS_CP_NVVDD2 12.3B
PS_CP_NVVDD3 12.3D
PS_DR_FBFCCM 13.4B
PS_DR_NVFCCM 12.2B
PS_FB_FB 13.4C
PS_FB_NVVDD 12.4D
PS_FB_PEX 13.3C
PS_FS_FB 13.4B
PS_FS_NVVDD 12.3B
PS_ISEN_FBVDDQ 13.4C
PS_ISEN_NVVDD 12.2C
PS_LG_FBVDDQ 13.4C
PS_LG_NVVDD 12.2C
PS_LG_PEX 13.2C
PS_PGOOD_FB 7.1A< 13.2A> 13.4A>
PS_PGOOD_NV 10.2F< 12.2A> 13.2A<
13.4A<
PS_PHASE_FBVDDQ 13.4C
PS_PHASE_NVVDD 12.2C
PS_PHASE_PEX 13.2C
PS_RC_FB 13.4D
PS_RC_NVVDD 12.3E
PS_RC_PEX 13.2E
PS_UG_FBVDDQ 13.3C
PS_UG_NVVDD 12.2C
PS_VCC_FB 7.1A< 13.4A>
PS_VCC_NVVDD 12.2B
ROM_CS* 11.1C 11.1D
ROM_SCLK 11.1D< 11.1D< 14.3A>
ROM_SI 11.1D< 11.1D< 14.3A>
ROM_SO 11.1D< 11.1D< 14.3A>
SMB_CLK 9.4A> 10.4B<
SMB_DATA 9.4A<> 10.4B<>
SNN_A13_1 4.2B
SNN_A13_2 4.2E
SNN_A13_3 5.2A
SNN_A13_4 5.2E
SNN_A14_1 4.2B
SNN_A14_2 4.2E
SNN_A14_3 5.2A
SNN_A14_4 5.2E
SNN_A15_1 4.2B
SNN_A15_2 4.2E
SNN_A15_3 5.2A
SNN_A15_4 5.2E
SNN_BUFRST* 11.2C
SNN_CN1_200 9.3C
SNN_DACB_CSYNC 6.3D
SNN_DACC_BLUE 6.4D
SNN_DACC_GREEN 6.4D
SNN_DACC_HSYNC 6.4D
SNN_DACC_RED 6.4D
SNN_DACC_RSET 6.4C
SNN_DACC_VREF 6.4C
SNN_DACC_VSYNC 6.4D
SNN_DPB_165 9.3E
SNN_DPB_167 9.3E
SNN_DPB_177 9.3E
SNN_DPB_179 9.3E
SNN_DPB_183 9.3E
SNN_DPB_185 9.3E
SNN_DPB_195 9.3E
SNN_DPB_197 9.3E
SNN_FBA_CMD7 3.2E
SNN_FBA_CMND26 3.3E
SNN_FBA_CMND28 3.3E
SNN_FBA_NC1 4.2A
SNN_FBA_NC2 4.2A
SNN_FBA_NC3 4.2E
SNN_FBA_NC4 4.2E
SNN_FBA_NC5 5.2A
SNN_FBA_NC6 5.2A
SNN_FBA_NC7 5.2E
SNN_FBA_NC8 5.2E
SNN_FBA_RFU_1 3.3E
SNN_FBA_RFU_2 3.3E
SNN_GPIO7 10.3D
SNN_GPIO10 10.3D
SNN_GPIO11 10.3D
SNN_GPIO13 10.3D
SNN_GPIO14 10.3D
SNN_GPIO17_CEC_DET 10.3D
_C
SNN_GPIO18_MODE_E 10.4D
SNN_GPIO19_CEC_DET 10.4D
_E
SNN_I2CE_SCL 10.3D
SNN_I2CE_SDA 10.3D
SNN_IFPE_AUX 8.3E
SNN_IFPE_AUX* 8.3E
SNN_NC1 11.1H
SNN_NC2 11.1H
SNN_NC3 11.1H
SNN_NC4 11.1H
SNN_PEX_NC 13.2B
SNN_RFU_AE9 2.1E
SNN_RFU_AG9 2.5F
SNN_RFU_C15 11.2A
SNN_RFU_D15 11.2A
SNN_RFU_F6 11.2C
SNN_RFU_J5 11.2C
SPDIF 9.4B> 11.2A<
SPDIF_MXM 9.4C
SP_FOUT 11.5D
SP_REF 11.5D
SP_VDD 11.5C
STRAP0 11.1A< 14.1A>
STRAP1 11.1A< 14.1A> 14.4A>
STRAP1_R 14.4C
STRAP1_R_REF 14.4C
STRAP2 11.1A< 14.2A>
STRAP_REF_3V3 11.2A
STRAP_REF_MIOB 11.2A
THERM 10.3C
THERM* 10.2C
THERM_ALERT* 9.4A< 10.2G>
THERM_ALERTM* 10.2D
THERM_SCL 10.2C
THERM_SDA 10.2C
THERM_VDD 10.2D
XTALIN 11.4C
XTALOUT 11.4E
XTALOUT_BUF 11.4E
XTALOUT_BUF_R 11.5D
XTAL_PLLVDD 11.3C
XTAL_SSFOUT 11.4C
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
<edit here to insert page detail>
www.vinafix.vn
600-10621-0001-200 A
p621
Thorsten Freund
15 OF 16
11-DEC-2007
Page 16
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DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
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H F D G E B A C
Title: Cref Part
Report
Design: p621
Date: Dec 11
12:08:17 2007
C1 [11.4E]
C2 [2.1A]
C3 [2.1A]
C4 [8.2E]
C5 [11.2E]
C6 [8.2E]
C7 [11.4C]
C8 [7.2B]
C9 [12.2E]
C10 [12.2E]
C11 [12.2E]
C12 [11.5B]
C13 [11.1E]
C14 [11.5B]
C15 [8.2B]
C16 [8.3B]
C17 [11.3A]
C18 [8.2B]
C19 [11.5B]
C20 [11.5B]
C21 [6.1B]
C22 [8.2C]
C23 [6.1B]
C24 [12.2E]
C25 [6.1B]
C26 [8.2C]
C27 [6.1B]
C28 [2.1H]
C29 [2.2A]
C30 [2.1H]
C31 [2.1G]
C32 [2.1H]
C33 [2.4G]
C34 [2.4G]
C35 [2.4G]
C36 [2.4H]
C37 [2.4G]
C38 [12.2E]
C39 [12.2F]
C40 [12.2F] C548 [5.2G] C644 [8.4C]
C41 [3.5F]
C42 [13.3E]
C43 [3.5F]
C44 [13.3E]
C45 [2.3H]
C46 [12.2F]
C47 [3.5G]
C48 [2.3H]
C49 [2.3H]
C50 [5.3H]
C51 [4.5G]
C52 [13.1B]
C53 [4.2G]
C54 [3.1G]
C55 [13.2A]
C56 [13.4F]
C57 [4.2G]
C58 [13.4F]
C59 [5.2G]
C60 [9.4B]
C61 [13.4F]
C62 [4.2H]
C63 [5.1F]
C64 [5.4E]
C65 [3.1F]
C66 [13.1B]
C67 [5.2H]
C68 [4.5G]
C69 [4.4F]
C70 [4.3C]
C71 [4.5H]
C72 [4.4E]
C73 [5.3C]
C74 [4.1H]
C75 [4.5F]
C76 [4.1G]
C77 [5.2G]
C78 [13.4F]
C79 [4.1G]
C80 [4.3H]
C81 [5.2G]
C82 [4.2G]
C83 [5.4H]
C84 [4.1H]
C85 [5.2F]
C86 [13.2C]
C87 [13.2E]
C89 [13.2F]
C501 [13.4C]
C502 [4.2G]
C503 [5.2F]
C504 [3.1G]
C505 [5.2H]
C506 [4.2H]
C507 [4.2G]
C508 [3.1F]
C509 [4.1G]
C510 [4.1G]
C511 [4.4G]
C512 [4.2G]
C513 [4.4D]
C514 [4.1H]
C515 [5.3H]
C516 [5.3G]
C517 [5.3H]
C518 [4.1G]
C519 [3.1E]
C520 [4.2H]
C521 [4.1G]
C522 [5.2H]
C523 [13.4E]
C524 [13.5C]
C525 [4.4G]
C526 [13.4B]
C527 [4.4D]
C528 [5.3G]
C529 [5.3G]
C530 [4.4H]
C531 [2.2A]
C532 [13.3A]
C533 [4.4G]
C534 [3.1G]
C535 [2.1A]
C536 [2.3A]
C537 [2.1H]
C538 [5.3F]
C539 [4.4G]
C540 [13.3B]
C541 [2.5D]
C542 [13.3D]
C543 [5.4E]
C544 [5.2G]
C545 [2.5C]
C546 [5.3G]
C547 [4.4E]
C549 [2.5D]
C550 [13.4D]
C551 [4.2G]
C552 [13.4D]
C553 [2.5C]
C554 [5.4E]
C555 [5.1G]
C556 [4.1G]
C557 [2.4D]
C558 [2.4C]
C559 [2.4D]
C560 [2.4C]
C561 [2.4D]
C562 [2.4C]
C563 [2.4D]
C564 [2.4C]
C565 [2.4D]
C566 [2.4C]
C567 [2.3D]
C568 [2.3C]
C569 [2.3D]
C570 [2.3C]
C571 [3.1E]
C572 [12.2D]
C573 [2.3D]
C574 [3.1F]
C575 [2.3C]
C576 [12.4C]
C577 [12.4D]
C578 [2.3D]
C579 [2.3C]
C580 [3.1F]
C581 [2.3D]
C582 [3.1F]
C583 [3.1F]
C584 [3.1F]
C585 [3.1F]
C586 [3.1E]
C587 [2.3C]
C588 [3.1G]
C589 [2.2D]
C590 [3.5F]
C591 [3.1F]
C592 [2.2G]
C593 [2.2C]
C594 [2.2D]
C595 [3.1E]
C596 [2.2G]
C597 [2.3G]
C598 [2.2H]
C599 [12.4C]
C600 [2.3G]
C601 [2.2C]
C602 [2.2D]
C603 [3.1F]
C604 [3.1E]
C605 [3.1E]
C606 [2.1G]
C607 [2.2H]
C608 [3.5C]
C609 [2.2G]
C610 [2.2H]
C611 [2.2C]
C612 [2.2D]
C613 [2.2G]
C614 [2.2G]
C615 [9.4C]
C616 [2.2H]
C617 [3.1F]
C618 [2.2G]
C619 [2.1G]
C620 [2.4G]
C621 [2.4G]
C622 [2.2C]
C623 [12.2B]
C624 [2.3G]
C625 [2.2G]
C626 [2.1G]
C627 [2.2G]
C628 [2.3G]
C629 [2.1G]
C630 [8.3B]
C631 [2.2H]
C632 [2.1G]
C633 [6.3B]
C634 [2.1G]
C635 [8.3C]
C636 [12.3B]
C637 [12.3C]
C638 [8.3C]
C639 [11.3C]
C640 [2.1G]
C641 [7.2E]
C642 [7.2E]
C643 [8.2E]
C645 [7.2E]
C646 [8.2E]
C647 [12.3B]
C648 [11.3C]
C649 [7.2E]
C650 [8.2E]
C651 [7.2E]
C652 [6.3B]
C653 [12.2A]
C654 [7.2E]
C655 [12.2C]
C656 [8.2E]
C657 [7.2E]
C658 [7.2E]
C659 [8.2E]
C660 [12.2D]
C661 [8.2E]
C662 [8.2E]
C663 [8.2E]
C664 [8.3E]
C665 [8.4E]
C666 [8.4E]
C667 [8.4C]
C668 [7.2E]
C669 [11.3B]
C670 [11.3B]
C671 [8.4E]
C672 [8.4B]
C673 [8.4B]
C674 [8.3B]
C675 [7.2C]
C676 [6.3B]
C677 [8.4E]
C678 [6.3B]
C679 [8.3C]
C680 [10.2C]
C681 [8.4E]
C682 [8.4C]
C683 [8.3C]
C684 [8.3C]
C685 [8.3C]
C686 [8.4E]
C687 [8.4C]
C688 [8.4E]
C689 [8.3B]
C690 [10.2D]
C691 [8.2A]
C692 [7.1D]
C693 [8.4A]
CN1 [2.3B]
CN1 [9.3D]
D2 [10.3G]
D4 [10.4G]
D6 [6.4G]
D7 [6.4G]
D8 [6.3G]
D9 [13.4E]
D501 [6.4H]
D502 [6.4H]
D503 [6.3H]
G1 [2.3F]
G1 [3.3D]
G1 [6.3D 6.1D
6.4D]
G1 [7.4F 7.2G]
G1 [8.4D 8.2D]
G1 [10.3D]
G1 [11.3G 11.3D
11.2B]
L1 [12.2E]
L2 [13.2E]
L3 [12.2E]
L4 [13.4E]
LB1 [8.2B]
LB2 [6.1B]
LB3 [2.4H]
LB4 [3.4G]
LB501 [7.1E]
LB502 [8.3B]
LB503 [11.3B]
LB504 [7.3C]
LB505 [7.2D]
LB506 [6.2A]
LB507 [8.2A]
LB508 [8.4A]
M1 [4.2B 4.3E
4.3B]
M2 [5.3D 5.2B
5.3C]
M501 [4.3C 4.3D
4.2E]
M502 [5.3E 5.2E
5.3B]
MEC1 [14.5F 14.5F]
MEC2 [14.4D 14.5D
14.5D 14.5D]
Q1 [8.1E 8.1E]
Q2 [10.2E 10.2E]
Q3 [12.2D]
Q4 [12.2D]
Q5 [13.2C]
Q6 [13.2D]
Q7 [13.2D]
Q501 [13.4D]
Q502 [12.4C]
Q503 [13.3D]
Q504 [12.4C]
Q505 [7.3A]
Q506 [7.3B]
Q507 [14.4B]
Q508 [14.4B]
Q509 [7.2C]
Q510 [8.1F]
Q511 [10.2F]
Q513 [7.2B]
Q514 [7.2A]
Q515 [7.2D]
Q516 [7.2B]
Q518 [8.4H]
R1 [10.2G]
R2 [13.2E]
R3 [10.2H]
R4 [10.4F]
R5 [10.3G]
R6 [10.3H]
R7 [10.2G]
R8 [10.2H]
R9 [13.2E]
R11 [10.4F]
R12 [11.5D]
R13 [10.3H]
R14 [11.4C]
R16 [13.2E]
R17 [8.4G]
R18 [11.5C]
R19 [7.2B]
R20 [12.4C]
R21 [10.4F]
R22 [8.3G]
R23 [12.5B]
R24 [12.4B]
R25 [8.1F]
R26 [8.1F]
R27 [8.4G]
R29 [8.2G]
R30 [8.4G]
R31 [8.4G]
R32 [8.2G]
R33 [8.4G]
R34 [8.2G]
R35 [10.2G]
R36 [10.2G]
R37 [8.3G]
R38 [8.3G]
R39 [11.5A]
R40 [10.3E]
R41 [10.4E]
R43 [8.1G]
R44 [8.1F]
R45 [8.1F]
R46 [10.3E]
R47 [10.3E]
R48 [10.2E]
R49 [10.2E]
R50 [10.4G]
R51 [6.1C]
R52 [11.2D]
R53 [10.3E]
R54 [10.3E]
R55 [10.3B]
R56 [10.3B]
R57 [10.3B]
R58 [10.3B]
R59 [10.3B]
R60 [7.4F]
R61 [14.1B]
R62 [14.2B]
R63 [14.1C]
R64 [14.1B]
R65 [14.4C]
R66 [14.2B]
R67 [14.1B]
R68 [14.1B]
R69 [14.2B]
R70 [2.5H]
R71 [2.5G]
R72 [14.3B]
R73 [11.1D]
R74 [14.2B]
R75 [11.2A]
R76 [14.3B]
R77 [3.4E] R582 [10.4B]
R78 [12.3E]
R79 [3.4E]
R80 [3.4E]
R81 [11.2C]
R82 [13.4D]
R83 [2.5C]
R86 [9.4B]
R89 [4.3H]
R90 [4.3G]
R91 [4.3G]
R92 [4.3G]
R93 [5.3H]
R94 [5.4G]
R95 [5.4G]
R96 [5.4G]
R501 [4.3C]
R502 [5.2C]
R503 [13.4E]
R504 [13.5E]
R505 [4.2C]
R506 [5.3C]
R507 [13.4E]
R508 [13.4B]
R509 [13.4A]
R510 [13.4B]
R511 [13.4C]
R512 [13.3B]
R513 [13.3A]
R514 [13.3C]
R515 [3.3F]
R516 [3.3F]
R517 [12.3D]
R518 [12.3D]
R519 [12.3D]
R520 [12.4C]
R521 [3.4F]
R522 [12.4B]
R523 [12.4D]
R524 [12.4C]
R525 [12.4B]
R526 [14.3B]
R527 [14.2B]
R528 [12.5B]
R529 [14.2B]
R530 [3.5B]
R531 [3.5B]
R532 [12.2A]
R533 [12.2B]
R534 [7.3B]
R535 [12.2A]
R536 [11.2A]
R537 [12.2B]
R538 [6.3C]
R539 [12.3B]
R540 [8.3C]
R541 [11.4E]
R542 [6.3E]
R543 [11.2A]
R544 [6.3E]
R545 [7.2F]
R546 [8.2C]
R548 [6.3E]
R549 [6.4C]
R550 [12.3A]
R551 [7.4G]
R552 [12.2C]
R553 [6.2E]
R554 [6.2E]
R555 [6.2E]
R556 [14.5C]
R557 [14.5B]
R558 [12.2C]
R559 [14.4B]
R560 [14.4B]
R561 [14.4B]
R562 [8.1F]
R563 [7.2A]
R564 [10.2D]
R565 [10.2D]
R566 [10.2D]
R567 [10.4B]
R568 [10.2E]
R569 [10.2E]
R570 [10.2B]
R571 [11.2D]
R572 [10.4B]
R573 [10.4D]
R574 [10.2B]
R575 [7.2C]
R576 [7.1D]
R577 [11.2D]
R578 [10.4C]
R579 [10.4C]
R580 [10.4C]
R581 [10.4C]
R583 [11.4E]
TP1 [10.3B]
TP2 [10.3B]
TP3 [10.3B]
TP4 [10.3B]
TP5 [10.3B]
TP6 [2.4G]
U1 [11.2E]
U2 [11.5D]
U3 [11.1E]
U4 [13.2C]
U501 [13.4B]
U502 [12.2B]
U503 [10.2C]
Y1 [11.4D]
NB9M-GS G98M ?/400MHz, 256MB(64bit) GDDR2 32Mx16 84FBGA, LVDS + HDMI + SD/HD(TV_OUT) + VGA
<edit here to insert page detail>
www.vinafix.vn
600-10621-0001-200 A
p621
Thorsten Freund
16 OF 16
11-DEC-2007