MSI MS-V113 Schematic 2.0
A B C D E F G H
P409:MXM-III,G3-128,256/512MB,128-bit,8/16Mx32 DDR-3
1
LVDS,DVI_A, DVI_B,TV_OUT,VGA
1
Table of Contents
Page 1: Overview
Page 2: PCI EXPRESS Interface
Page 3: Frame Buffer A GPU
Page 4: Frame Buffer A Memories Rank0
Page 5: Frame Buffer A Memories Rank1
Page 6: Frame Buffer C GPU
Page 7: Frame Buffer C Memories Rank0
Page 8: Frame Buffer C Memories Rank1
Page 9: Frame Buffer Physical Constrains
2
3
4
Page 10: DACs, Clock-Generation
Page 11: LVDS / TMDS Interface GPU
Page 12: MXM Connector IO-Section
Page 13: GPIO Thermal Sensor Chip
Page 14: Spread Spectrum, BIOS/ HDCP ROM
Page 15: MIOA, MIOB
Page 16: NVVDD Supply
Page 17: FBVDDQ, PEX1V2, PLLVDD Supply
Page 18: Straps
HISTORY:
A03:
INITIAL VERSION
2
3
4
SKU
VARIANT ASSEMBLY
B
BASE
1
0501 NB8E-SE/G84-750 with HDCP Kit,512MB, 8pcs 16Mx32 GDDR3
2
0002
3
0003
4
0004 NB8E-SE/G84-750 with HDCP Kit, 512MB, 8pcs 16Mx32 GDDR3
5
<UNDEFINED>
6
7
<UNDEFINED>
8
<UNDEFINED>
9
<UNDEFINED>
10
<UNDEFINED>
5
11
<UNDEFINED>
12
<UNDEFINED>
13
<UNDEFINED>
14
<UNDEFINED> <UNDEFINED>
15
<UNDEFINED>
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
NVPN
600-10409-xxxx-300
600-50409-0501-300
600-10409-0002-300
600-10409-0003-300
600-10409-0004-300
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<UNDEFINED> <UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
NB8P-NVS2/G84-710 with HDCP Kit, 256MB,4pcs 16Mx32 GDDR3 (1Mb VBIOS ROM)
NB8E-SE/G84-750 with HDCP Kit, 512MB, 8pcs 16Mx32 GDDR3 (1Mb VBIOS ROM)
<UNDEFINED>
<UNDEFINED><UNDEFINED><UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED><UNDEFINED>
ASSEMBLY
PAGE DETAIL
C GE
PDF created with pdfFactory Pro trial version www.pdffactory.com
www.vinafix.vn
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
Overview
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10409-xxxx-300 A
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
5
PAGEID
DATE
16-MAR-2007
HFDBA
A B C D E F G H
MXM Connector
PEX_TX0_C
PEX_TX0_C*
PEX_TX1_C
PEX_TX1_C*
PEX_TX2_C
PEX_TX2_C*
PEX_TX3_C
PEX_TX3_C*
PEX_TX4_C
PEX_TX4_C*
PEX_TX5_C
PEX_TX5_C*
PEX_TX6_C
PEX_TX6_C*
PEX_TX7_C
PEX_TX7_C*
PEX_TX8_C
PEX_TX8_C*
PEX_TX9_C
PEX_TX9_C*
PEX_TX10_C
PEX_TX10_C*
PEX_TX11_C
PEX_TX11_C*
PEX_TX12_C
PEX_TX12_C*
PEX_TX13_C
PEX_TX13_C*
PEX_TX14_C
PEX_TX14_C*
PEX_TX15_C
PEX_TX15_C*
PEX Interface
PEX_TX0_C 100DIFF 1
PEX_TX0_C 100DIFF 1
100DIFF 1PEX_TX1_C
PEX_TX2_C 100DIFF 1
PEX_TX2_C 100DIFF 1
PEX_TX3_C 100DIFF 1
PEX_TX3_C 100DIFF 1
100DIFFPEX_TX4_C 1
PEX_TX4_C 1100DIFF
PEX_TX5_C 1100DIFF
PEX_TX5_C 1100DIFF
PEX_TX6_C 100DIFF 1
PEX_TX6_C 1100DIFF
PEX_TX7_C 1100DIFF
PEX_TX8_C 1100DIFF
PEX_TX9_C 100DIFF 1
100DIFFPEX_TX9_C 1
100DIFF 1PEX_TX10_C
PEX_TX10_C 100DIFF 1
PEX_TX11_C 100DIFF 1
PEX_TX11_C 100DIFF 1
PEX_TX12_C 100DIFF 1
PEX_TX12_C 1100DIFF
PEX_TX13_C 1100DIFF
PEX_TX13_C 100DIFF 1
100DIFF 1PEX_TX14_C
100DIFF 1PEX_TX14_C
PEX_RST
SNN_RFU1
SNN_RFU2
R572
200
COMMON
0402
5%
NV_CRITICALNV_IMPEDANCEDIFF_PAIRNET_NAME
C711 .1UF
C697 .1UF
1100DIFFPEX_TX1_C
C682
.1UF
0402
C677
.1UF
16V COMMON10%
C667 .1UF
C659
.1UF
10%
C648
.1UF
0402
C636
1100DIFFPEX_TX7_C
1100DIFFPEX_TX8_C
1100DIFFPEX_TX15_C
1100DIFFPEX_TX15_C
.1UF
0402 COMMONX7R
10%16V
C623
.1UF
10%
C617
.1UF
10%
C608
.1UF
16V COMMONX7R0402
10%
C605
.1UF
10% COMMONX7R16V0402
C601
.1UF
10%0402 COMMONX7R16V
C590
.1UF
10%
C587
.1UF
10%
C584
.1UF
10%
C703
X7R0402 16V COMMON10%
X7R16V0402 COMMON10%
X7R0402
.1UF
16V0402 10%
C686
.1UF
C680
0402
C669
0402 COMMONX7R16V
C662
C652
C639
C630
C619
C609
C606
C603
C597
C588
C585
C582
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
16V COMMONX7R0402
.1UF
.1UF
.1UF
.1UF
.1UF
COMMONX7R16V 10%
COMMONX7R16V0402 10%
COMMONX7R16V0402
COMMONX7R16V 10%
COMMONX7R16V0402
COMMONX7R16V0402
COMMONX7R16V0402
COMMONX7R16V0402
COMMONX7R16V0402
C GE
CN1A
(NPHY,NONPHY)-HE(_SLI)
CON_FINGER_MXMHE_212
2V5RUN_R
C565
.1UF
16V
10%
X7R
0402
COMMON
C566
.1UF
50V
10%
X7R
0603
COMMON
C64
.1UF
16V
10%
X7R
0402
COMMON
238
2
1
E1
234
18
17
20
41
44
47
50
53
56
59
62
65
68
71
74
77
80
83
86
89
92
95
98
101
104
107
110
113
116
119
122
125
128
131
138
142
146
150
154
158
164
176
182
188
194
199
200
205
206
211
212
218
223
229
235
236
241
E2
COMMON
1/2 PCI-Express, Power
3V3RUN
(1.5A)
1V8RUN
(3.5A)
PWR_SRC
PWR_SRC
(14A)
2V5RUN
(0.5A)
5VRUN
(0.5A)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CLK_REQ
PEX_RST
PEX_REFCLK
PEX_REFCLK
PEX_RX0
PEX_RX0
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX1
PEX_TX1
PEX_TX1
PEX_RX2
PEX_RX2
PEX_TX2
PEX_TX2
PEX_RX3
PEX_RX3
PEX_TX3
PEX_TX3
PEX_RX4
PEX_RX4
PEX_TX4
PEX_TX4
PEX_RX5
PEX_RX5
PEX_TX5
PEX_TX5
PEX_RX6
PEX_RX6
PEX_TX6
PEX_TX6
PEX_RX7
PEX_RX7
PEX_TX7
PEX_TX7
PEX_RX8
PEX_RX8
PEX_TX8
PEX_TX8
PEX_RX9
PEX_RX9
PEX_TX9
PEX_TX9
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX11
PEX_RX11
PEX_TX11
PEX_TX11
PEX_RX12
PEX_RX12
PEX_TX12
PEX_TX12
PEX_RX13
PEX_RX13
PEX_TX13
PEX_TX13
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX14
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX15
PRSNT1
PRSNT2
137
139
135
133
129
127
132
130
123
121
126
124
117
115
120
118
111
109
114
112
105
103
108
106
99
97
102
100
93
91
96
94
87
85
90
88
81
79
84
82
75
73
78
76
69
67
72
70
63
61
66
64
57
55
60
58
51
49
54
52
45
43
48
46
39
37
42
40
134
38
1
C1
C794
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C562
.1UF
50V
10%
2
Stuffed? Ra Rb
3
Non_SLI:
X7R
0603
COMMON
Ra
R2
0
5%
0402
COMMON
R6
0
04025%COMMON
Rb
C5
.1UF
16V
10%
X7R
0402
COMMON
No Yes
SLI:
Yes No
4
R112
1K
1%
0402
COMMON
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
NV_IMPEDANCE
NV_CRITICAL DIFF_PAIR NET_NAME
100DIFF 1 PEX_TCLK
1 PEX_TCLK100DIFF
1 PEX_RCLK100DIFF
100DIFF 1 PEX_TX0
100DIFF 1 PEX_TX0
COMMONX7R
1 PEX_RX0100DIFF
1100DIFF PEX_RX0
1 PEX_TX1100DIFF
1 PEX_TX1100DIFF
COMMON16V0402 10% X7R
100DIFF 1 PEX_TX2
COMMONX7R16V 10%
1 PEX_RX2100DIFF
10%
10%
10%
10%0402 X7R
10%
10%16V
10%
10%
10%
10%
10%
10%
10%
1100DIFF PEX_TX3
100DIFF PEX_RX31
100DIFF 1 PEX_TX4
COMMONX7R16V0402
100DIFF PEX_RX41
100DIFF PEX_RX41
100DIFF PEX_TX51
1100DIFF PEX_TX5
COMMONX7R16V0402
1100DIFF PEX_RX5
1100DIFF PEX_TX6
COMMON16V
1 PEX_RX6100DIFF
1100DIFF PEX_RX6
1100DIFF PEX_TX7
1100DIFF PEX_TX7
COMMON16V0402 X7R
100DIFF 1 PEX_RX7
100DIFF PEX_RX71
1 PEX_TX8100DIFF
1100DIFF PEX_TX8
COMMONX7R0402
100DIFF PEX_RX81
1 PEX_RX8100DIFF
1 PEX_TX9100DIFF
1 PEX_TX9100DIFF
COMMONX7R16V0402
100DIFF 1 PEX_RX9
1 PEX_RX9100DIFF
1100DIFF PEX_TX10
100DIFF PEX_TX101
100DIFF 1 PEX_TX11
1100DIFF PEX_TX11
COMMONX7R16V0402
100DIFF PEX_RX111
1100DIFF PEX_TX12
1 PEX_TX12100DIFF
COMMONX7R16V0402
1100DIFF PEX_RX12
1100DIFF PEX_TX13
1100DIFF PEX_TX13
COMMONX7R16V0402
1100DIFF PEX_TX14
1100DIFF PEX_TX14
COMMONX7R16V0402
100DIFF 1 PEX_TX15
1100DIFF PEX_TX15
COMMONX7R16V0402
ASSEMBLY
PAGE DETAIL
PEX_RCLK100DIFF 1
PEX_RX1100DIFF 1
PEX_RX1100DIFF 1
PEX_TX2100DIFF 1
PEX_RX2100DIFF 1
PEX_TX31100DIFF
PEX_RX3100DIFF 1
PEX_TX41100DIFF
PEX_RX51100DIFF
PEX_TX61100DIFF
PEX_RX10100DIFF 1
PEX_RX10100DIFF 1
PEX_RX111100DIFF
PEX_RX121100DIFF
PEX_RX13100DIFF 1
PEX_RX13100DIFF 1
PEX_RX14100DIFF 1
PEX_RX141100DIFF
PEX_RX15100DIFF 1
PEX_RX151100DIFF
PCI EXPRESS Interface
PEX_TSTCLK
PEX_TSTCLK*
REFCLK
REFCLK*
PEX_TX0
PEX_TX0*
PEX_RX0
PEX_RX0*
PEX_TX1
PEX_TX1*
PEX_RX1
PEX_RX1*
PEX_TX2
PEX_TX2*
PEX_RX2
PEX_RX2*
PEX_TX3
PEX_TX3*
PEX_RX3
PEX_RX3*
PEX_TX4
PEX_TX4*
PEX_RX4
PEX_RX4*
PEX_TX5
PEX_TX5*
PEX_RX5
PEX_RX5*
PEX_TX6
PEX_TX6*
PEX_RX6
PEX_RX6*
PEX_TX7
PEX_TX7*
PEX_RX7
PEX_RX7*
PEX_TX8
PEX_TX8*
PEX_RX8
PEX_RX8*
PEX_TX9
PEX_TX9*
PEX_RX9
PEX_RX9*
PEX_TX10
PEX_TX10*
PEX_RX10
PEX_RX10*
PEX_TX11
PEX_TX11*
PEX_RX11
PEX_RX11*
PEX_TX12
PEX_TX12*
PEX_RX12
PEX_RX12*
PEX_TX13
PEX_TX13*
PEX_RX13
PEX_RX13*
PEX_TX14
PEX_TX14*
PEX_RX14
PEX_RX14*
PEX_TX15
PEX_TX15*
PEX_RX15
PEX_RX15*
AH15
AG12
AH13
AM12
AM11
AH14
AJ14
AJ15
AK15
AK13
AK14
AH16
AG16
AM14
AM15
AG17
AH17
AL15
AL16
AG18
AH18
AK16
AK17
AK18
AJ18
AL17
AL18
AJ19
AH19
AM18
AM19
AG20
AH20
AK19
AK20
AG21
AH21
AL20
AL21
AK21
AJ21
AM21
AM22
AJ22
AH22
AK22
AK23
AG23
AH23
AL23
AL24
AK24
AJ24
AM24
AM25
AJ25
AH25
AK25
AK26
AH26
AG26
AL26
AL27
AK27
AJ27
AM27
AM28
AJ28
AH27
AL28
AL29
G1A
BGA_0820_P100_330X330_G3_128B
COMMON
1/14 PCI_EXPRESS
PEX_RST
RFU
RFU
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD_SENSE
GND_SENSE
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
SPDIF
AD23
C635
.022UF
16V
10%
X7R
0402
COMMON
C647
.022UF
16V
10%
X7R
0402
COMMON
PEX_PLLDVDD
12mil
C693
470PF
50V
10%
X7R
0402
COMMON
C738 .01UF
0402
25V
10%
X7R
COMMON
OUT
OUT
C678
470PF
50V
10%
X7R
0402
COMMON
C624
.022UF
16V
10%
X7R
0402
COMMON
C679
.022UF
16V
10%
X7R
0402
COMMON
C675
.1UF
6.3V
10%
X7R
0402
COMMON
C660
.1UF
6.3V
10%
X7R
0402
COMMON
C691
.1UF
6.3V
10%
X7R
0402
COMMON
C705
.1UF
6.3V
10%
X7R
0402
COMMON
C632
.1UF
6.3V
10%
X7R
0402
COMMON
C721
4700PF
25V
X7R
0402
COMMON
C715
4700PF
25V
X7R
0402
COMMON
16
16
10%
10%
AF23
AF24
AF25
AG24
AG25
AC16
AC17
AC21
AC22
AE18
AE21
AE22
AF12
AF18
AF21
AF22
K16
VDD
K17
VDD
N13
VDD
N14
VDD
N16
VDD
N17
VDD
N19
VDD
P13
VDD
P14
VDD
P16
VDD
P17
VDD
P19
VDD
R16
VDD
R17
VDD
T13
VDD
T14
VDD
T15
VDD
T18
VDD
T19
VDD
U13
VDD
U14
VDD
U15
VDD
U18
VDD
U19
VDD
V16
VDD
V17
VDD
W13
VDD
W14
VDD
W16
VDD
W17
VDD
W19
VDD
Y13
VDD
Y14
VDD
Y16
VDD
Y17
VDD
Y19
VDD
Y20
VDD
P20
T20
T23
U20
U23
W20
NVVDD_SENSE
N20
GND_SENSE
M21
AC11
AC12
AC24
AD24
AE11
AE12
H7
J7
K7
L10
L7
L8
M10
AF15
AE15
AE16
SPDIF
J6
C671
4700PF
25V
10%
X7R
0402
COMMON
C611
.1UF
16V
10%
X7R
0402
COMMON
C656
.022UF
16V
10%
X7R
0402
COMMON
C661
.1UF
16V
10%
X7R
0402
COMMON
C681
.1UF
16V
10%
X7R
0402
COMMON
C644
.1UF
16V
10%
X7R
0402
COMMON
C710
.1UF
16V
10%
X7R
0402
COMMON
C654
.1UF
16V
10%
X7R
0402
COMMON
C569
1UF
6.3V
10%
X7R
0603
COMMON
C634
.1UF
16V
10%
X7R
0402
COMMON
C685
.1UF
16V
10%
X7R
0402
COMMON
C676
.1UF
16V
10%
X7R
0402
COMMON
C643
.1UF
16V
10%
X7R
0402
COMMON
C709
.1UF
16V
10%
X7R
0402
COMMON
C665
.1UF
16V
10%
X7R
0402
COMMON
C649
1UF
6.3V
10%
X7R
0603
COMMON
C674
1UF
6.3V
10%
X7R
0603
COMMON
C672
1UF
6.3V
10%
X7R
0603
COMMON
C670
1UF
6.3V
10%
X7R
0603
COMMON
C712
1UF
6.3V
10%
X7R
0603
COMMON
C651
1UF
6.3V
10%
X7R
0603
COMMON
C664
.022UF
16V
10%
X7R
0402
COMMON
<<place on bottom
north of GPU
<<place on bottom
east of GPU
<<place on bottom
south of GPU
<<place on bottom
west of GPU
C694
.022UF
16V
10%
X7R
0402
COMMON
C640
.1UF
16V
10%
X7R
0402
COMMON
1
2
C615
.022UF
16V
10%
X7R
0402
COMMON
C653
.022UF
16V
10%
X7R
0402
COMMON
C688
.1UF
6.3V
10%
X7R
0402
COMMON
C690
.1UF
6.3V
10%
X7R
0402
COMMON
C666
.1UF
6.3V
10%
X7R
0402
COMMON
C696
.1UF
6.3V
10%
X7R
0402
COMMON
C642
.1UF
6.3V
10%
X7R
0402
COMMON
3
C739
.1UF
16V
10%
X7R
0402
COMMON
C706
4700PF
25V
X7R
0402
COMMON
C687
4.7UF
6.3V
10%
X5R
0603
COMMON
C789
1UF
10%
6.3V
X7R
0603
COMMON
C622
.1UF
10%
16V
10%
X7R
0402
COMMON
C668
4.7UF
6.3V
10%
X5R
0603
COMMON
LB502
IND_SMD_0603
180R@100MHz
COMMON
NV_CRITICALNV_IMPEDANCE
150OHM
12
IN
4
C720
.1UF
16V
10%
X7R
0402
COMMON
C733
.1UF
16V
10%
X7R
0402
COMMON
C684
4700PF
25V
10%
X7R
0402
COMMON
SPDIF_C
5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10409-xxxx-300 A
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PAGEID
DATE
16-MAR-2007
HFDBA
PDF created with pdfFactory Pro trial version www.pdffactory.com
www.vinafix.vn
A B C D E F G H
G1B
BGA_0820_P100_330X330_G3_128B
4,5,9
1
Frame Buffer A GPU
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
4,7,13 GPIO10_FBVREFCTL
IN
4,5,9
4,5,9
1G1D1S
D
Q9
SOT23
G
1
COMMON
S
FBAD[63..0]
BI
FBADQM[7..0]
BI
FBADQS_WP[7..0]
BI
FBADQS_RN[7..0]
4,5,9
IN
6
OUT
R88
511
1%
0402
COMMON
R86
R87
845
1.3K
1%
1%
0402
0402
COMMON
FB_VREF1CTL
3
2
60V
0.115A
7.5R
0.8A
0.2W
20V
COMMON
0
FBAD0
1
FBAD1
2
FBAD2
3
FBAD3
4
FBAD4
5
FBAD5
6
FBAD6
7
FBAD7
8
FBAD8
9
FBAD9
10
FBAD10
11
FBAD11
12
FBAD12
13
FBAD13
14
FBAD14
15
FBAD15
16
FBAD16
17
FBAD17
18
FBAD18
19
FBAD19
20
FBAD20
21
FBAD21
22
FBAD22
23
FBAD23
24
FBAD24
25
FBAD25
26
FBAD26
27
FBAD27
28
FBAD28
29
FBAD29
30
FBAD30
31
FBAD31
32
FBAD32
33
FBAD33
34
FBAD34
35
FBAD35
36
FBAD36
37
FBAD37
38
FBAD38
39
FBAD39
40
FBAD40
41
FBAD41
42
FBAD42
43
FBAD43
44
FBAD44
45
FBAD45
46
FBAD46
47
FBAD47
48
FBAD48
49
FBAD49
50
FBAD50
51
FBAD51
52
FBAD52
53
FBAD53
54
FBAD54
55
FBAD55
56
FBAD56
57
FBAD57
58
FBAD58
59
FBAD59
60
FBAD60
61
FBAD61
62
FBAD62
63
FB_VREF
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
C602
.1UF
16V
10%
X7R
0402
COMMON
FBAD63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
R1
R2
COMMON
2/14 FBA
N27
FBAD0
M27
FBAD1
N28
FBAD2
L29
FBAD3
K27
FBAD4
K28
FBAD5
J29
FBAD6
J28
FBAD7
P30
FBAD8
N31
FBAD9
N30
FBAD10
N32
FBAD11
L31
FBAD12
L30
FBAD13
J30
FBAD14
L32
FBAD15
H30
FBAD16
K30
FBAD17
H31
FBAD18
F30
FBAD19
H32
FBAD20
E31
FBAD21
D30
FBAD22
E30
FBAD23
H28
FBAD24
H29
FBAD25
E29
FBAD26
J27
FBAD27
F27
FBAD28
E27
FBAD29
E28
FBAD30
F28
FBAD31
AD29
FBAD32
AE29
FBAD33
AD28
FBAD34
AC28
FBAD35
AB29
FBAD36
AA30
FBAD37
Y28
FBAD38
AB30
FBAD39
AM30
FBAD40
AF30
FBAD41
AJ31
FBAD42
AJ30
FBAD43
AJ32
FBAD44
AK29
FBAD45
AM31
FBAD46
AL30
FBAD47
AE32
FBAD48
AE30
FBAD49
AE31
FBAD50
AD30
FBAD51
AC31
FBAD52
AC32
FBAD53
AB32
FBAD54
AB31
FBAD55
AG27
FBAD56
AF28
FBAD57
AH28
FBAD58
AG28
FBAD59
AG29
FBAD60
AD27
FBAD61
AF27
FBAD62
AE28
FBAD63
M29
FBADQM0
M30
FBADQM1
G30
FBADQM2
F29
FBADQM3
AA29
FBADQM4
AK30
FBADQM5
AC30
FBADQM6
AG30
FBADQM7
L28
FBADQS_WP0
K31
FBADQS_WP1
G32
FBADQS_WP2
G28
FBADQS_WP3
AB28
FBADQS_WP4
AL32
FBADQS_WP5
AF32
FBADQS_WP6
AH30
FBADQS_WP7
M28
FBADQS_RN0
K32
FBADQS_RN1
G31
FBADQS_RN2
G27
FBADQS_RN3
AA28
FBADQS_RN4
AL31
FBADQS_RN5
AF31
FBADQS_RN6
AH29
FBADQS_RN7
E32
12mil
FB_VREF1
C GE
ASSEMBLY
PAGE DETAIL
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_DEBUG
H_PLLAVDD
FBA_PLLAVDD
FBA_PLLGND
Frame Buffer A GPU
A12
A18
A21
A24
A27
A3
A30
A6
A9
AA32
AD32
AG32
AK32
C32
F32
J32
M32
R32
AA25
AA26
AB25
AB26
G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
H22
L25
L26
M25
M26
R25
R26
V25
V26
P32
U27
P31
U30
Y31
W32
W31
T32
V27
T28
T31
U32
W29
W30
T27
V28
V30
U31
R27
V29
T30
W28
R29
R30
P29
U28
Y32
Y30
V32
P28
R28
Y27
AA27
AC27
G23
G25
G24
SNN_FBA_NC1_D31
D31
NC1
SNN_FBA_NC2_D32
D32
NC2
NET_NAME
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DEBUG
FBA_PLLAVDD
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
SNN_FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
SNN_FBA_CMD26
FBA_CMD27
SNN_FBA_CMD28
OUT
OUT
OUT
OUT
C719
.1UF
6.3V
10%
X7R
0402
COMMON
C626
.1UF
6.3V
10%
X7R
0402
COMMON
C596
.1UF
6.3V
10%
X7R
0402
COMMON
C593
.1UF
6.3V
10%
X7R
0402
COMMON
C598
1UF
6.3V
10%
X7R
0603
COMMON
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
17
18
19
20
21
22
23
24
25
27
4,5,9FBA_CLK0
4,5,9
4,5,9
4,5,9
TP501
12mil
C701
.1UF
6.3V
10%
X7R
0402
COMMON
C625
.1UF
6.3V
10%
X7R
0402
COMMON
C645
.1UF
6.3V
10%
X7R
0402
COMMON
C591
.1UF
6.3V
10%
X7R
0402
COMMON
C48
1UF
6.3V
10%
X7R
0603
COMMON
FBA_CMD[27..0]
C570
470PF
50V
10%
X7R
0402
COMMON
C689
.1UF
6.3V
10%
X7R
0402
COMMON
C613
.1UF
6.3V
10%
X7R
0402
COMMON
C595
.1UF
6.3V
10%
X7R
0402
COMMON
C718
.1UF
6.3V
10%
X7R
0402
COMMON
C599
1UF
6.3V
10%
X7R
0603
COMMON
C621
.022UF
16V
10%
X7R
0402
COMMON
C657
.1UF
6.3V
10%
X7R
0402
COMMON
C629
.1UF
6.3V
10%
X7R
0402
COMMON
C736
.1UF
6.3V
10%
X7R
0402
COMMON
C618
.1UF
6.3V
10%
X7R
0402
COMMON
C35
1UF
6.3V
10%
X7R
0603
COMMON
C567
1UF
6.3V
10%
X7R
0603
COMMON
OUT
180R@100MHz
IND_SMD_0603
C699
C650
C658
.1UF
.1UF
6.3V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C683
C614
.1UF
.1UF
6.3V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C663
C655
.1UF
.1UF
6.3V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C633
C751
.1UF
.1UF
6.3V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C616
C673
1UF
1UF
6.3V
6.3V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
4,5,9
.1UF
16V
10%
X7R
0402
COMMON
C628
.1UF
16V
10%
X7R
0402
COMMON
C627
.1UF
16V
10%
X7R
0402
COMMON
C641
.1UF
16V
10%
X7R
0402
COMMON
C612
.1UF
16V
10%
X7R
0402
COMMON
C713
.1UF
16V
10%
X7R
0402
COMMON
1
2
3
4
LB501
COMMON
5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10409-xxxx-300 A
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PAGEID
DATE
16-MAR-2007
HFDBA
PDF created with pdfFactory Pro trial version www.pdffactory.com
www.vinafix.vn
A B C D E F G H
FB Partition A
1
2
3,5,9
R522
121
1%
0402
COMMON
FBA_CLK0_TERM FBA_CLK1_TERM
C529
R101
.01UF
121
25V
1%
0402
10%
COMMON
X7R
0402
COMMON
3,5,9
IN
3,5,9
IN
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
Stuff CKE Pull-down resistor only
FBA_CMD[27..0]
IN
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
1
FBA_CMD1
10
FBA_CMD10
11
FBA_CMD11
8
FBA_CMD8
19
FBA_CMD19
25
FBA_CMD25
22
24
FBA_CMD24
0
FBA_CMD0
2
FBA_CMD2
21
FBA_CMD21
16
FBA_CMD16
23
FBA_CMD23
20
FBA_CMD20
17
FBA_CMD17
9
FBA_CMD9
12
FBA_CMD12
3
FBA_CMD3
27
FBA_CMD27
18
FBA_CMD18
FBA_CLK0
FBA_CLK0*
SNN_FBA0_NC1 SNN_FBA1_NC1
7
FBA_CMD7 FBA_CMD7
15
FBA_CMD15 FBA_CMD15
R509
R527
10K
10K
5%
5%
0402
0402
COMMON
COMMON
R103
121
1%
0402
COMMON
GDDR3:
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
R507 10K
0402 COMMON
5%
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
9
OUT
FBA_ZQ0
R104
240
5%
0402
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
M3E
BGA_0136_P080_140X110
BGA136
COMMON
RAS BA2
CAS CS
WE CKE
CS CAS
A0 A4
A1 A5
A2 A6
A3 A9
A4 A0
A5 A1
A6 A2
A7 A11
A9 A3
A10 A8/AP
A11 A7
BA0
BA1 BA0
BA2 RAS
CKE WE
CLK
CLK
NC/RFU
NC/CS1 NC/CS1
SEN (GND)
NONMIRROR
RESET
MIRROR
ZQ
VDDA
VDDA
A10A8/AP
BA1
MIRROR
3
J1
VSSA
J12
VSSA
*CS1 is required 32Mx32 Memories
FBAD[63..0]
3,5,9
BI
M3A
BGA_0136_P080_140X110
BGA136
0
FBAD0
1
FBAD1
2
FBAD2
3
FBAD3
4
3,5,9 FBADQM[7..0]
4
BI
3,5,9 FBADQS_RN[7..0]
BI
3,5,9 FBADQS_WP[7..0]
BI
0
FBADQM0
1
FBADQM1
2
FBADQM2
3
FBADQM3
4
5
FBADQM5
6
FBADQM6
7
FBADQM7
0
FBADQS_RN0
1
FBADQS_RN1
2
FBADQS_RN2
3
FBADQS_RN3
4
FBADQS_RN4
5
FBADQS_RN5
6
FBADQS_RN6
7
FBADQS_RN7
0
FBADQS_WP0
1
FBADQS_WP1
2
FBADQS_WP2
3
FBADQS_WP3
4
FBADQS_WP4
5
FBADQS_WP5
6
FBADQS_WP6
7
FBADQS_WP7
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
FBAD4
5
FBAD5
6
FBAD6
7
FBAD7
FBADQM0
FBADQS_RN0
FBADQS_WP0
32
FBAD32
33
FBAD33
34
FBAD34
35
FBAD35
36
FBAD36
37
FBAD37
38
FBAD38
39
FBAD39
FBADQM4
FBADQS_RN4
FBADQS_WP4
C10
B10
B11
C11
F10
F11
E11
G10
E10
D10
D11
E2
F3
G3
F2
B2
C3
B3
C2
E3
D3
D2
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M4E
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
Topside memory
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
B4
VSSQ
D4
VSSQ
P4
VSSQ
T4
VSSQ
B9
VSSQ
D9
VSSQ
P9
VSSQ
T9
VSSQ
G11
VSSQ
L11
VSSQ
B12
VSSQ
D12
VSSQ
P12
VSSQ
T12
VSSQ
G1
VSS
L1
VSS
A3
VSS
V3
VSS
A10
VSS
V10
VSS
G12
VSS
L12
VSS
FBA_VREF0
H1
VREF
FBA_VREF2
H12
VREF
8
FBAD8
9
FBAD9
10
FBAD10
11
FBAD11
12
FBAD12
13
FBAD13
14
FBAD14
15
FBAD15
FBADQM1
FBADQS_RN1
FBADQS_WP1
40
FBAD40
41
FBAD41
42
FBAD42
43
FBAD43
44
FBAD44
45
FBAD45
46
FBAD46
47
FBAD47
FBADQM5
FBADQS_RN5
FBADQS_WP5
COMMON
COMMON
E2
B3
B2
C2
G3
F3
F2
C3
E3
D3
D2
T11
M11
L10
N11
M10
R10
R11
T10
N10
P10
P11
R111
511
R1
1%
0402
R110
1.3K
R2
1%
0402
M3B
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M4A
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
C GE
3,5,9
3,5,9
IN
IN
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
5,9
OUT
C120
.1UF
16V
10%
X7R
0402
COMMON
16
FBAD16
17
FBAD17
18
FBAD18
19
FBAD19
20
FBAD20
21
FBAD21
22
FBAD22
23
FBAD23
FBADQM2
FBADQS_RN2
FBADQS_WP2
48
FBAD48
49
FBAD49
50
FBAD50
51
FBAD51
52
FBAD52
53
FBAD53
54
FBAD54
55
FBAD55
FBADQM6
FBADQS_RN6
FBADQS_WP6
ASSEMBLY
PAGE DETAIL
R519
121
1%
0402
COMMON
R102
121
1%
0402
COMMON
COMMON
COMMON
R90
511
0402
R89
1.3K
0402
R1
1%
R2
1%
C534
R100
.01UF
121
25V
1%
0402
10%
COMMON
X7R
0402
COMMON
GDDR3:
OUT
C75
.1UF
16V
10%
X7R
0402
COMMON
M3C
BGA_0136_P080_140X110
BGA136
COMMON
N2
DQ0
M3
DQ1
L3
DQ2
R3
DQ3
M2
DQ4
T3
DQ5
R2
DQ6
T2
DQ7
N3
DQM
P3
RDQS
P2
WDQS
M4B
BGA_0136_P080_140X110
BGA136
COMMON
E11
DQ0
G10
DQ1
F11
DQ2
F10
DQ3
B10
DQ4
C10
DQ5
C11
DQ6
B11
DQ7
E10
DQM
D10
RDQS
D11
WDQS
Frame Buffer A Memories Rank0
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
5,9
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
9
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBADQM3FBADQM4
FBADQS_RN3
FBADQS_WP3
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM7
FBADQS_RN7
FBADQS_WP7
M4D
BGA_0136_P080_140X110
BGA136
FBA_ZQ1
R99
240
5%
0402
COMMON
M3D
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M4C
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
COMMON
RAS BA2
CAS CS
WE CKE
CS CAS
A0 A4
A1 A5
A2 A6
A3 A9
A4 A0
A5 A1
A6 A2
A11 A7
BA0
CKE WE
CLK
CLK
NC/RFU
NC/CS1 NC/CS1
SEN (GND)
NONMIRROR
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
*CS1 is required 32Mx32 Memories
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
A11A7
VDDQ
R1
A10A8/AP
VDDQ
V1
A3A9
VDDQ
C4
A8/APA10
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
BA1
VDDQ
C9
BA0BA1
VDDQ
E9
RASBA2
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
MIRROR
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
B4
VSSQ
D4
VSSQ
P4
VSSQ
T4
VSSQ
B9
VSSQ
D9
VSSQ
P9
VSSQ
T9
VSSQ
G11
VSSQ
L11
VSSQ
B12
VSSQ
D12
VSSQ
P12
VSSQ
T12
VSSQ
G1
VSS
L1
VSS
A3
VSS
V3
VSS
A10
VSS
V10
VSS
G12
VSS
L12
VSS
FBA_VREF1
H1
VREF
FBA_VREF3
H12
VREF
27
FBA_CMD27
8
FBA_CMD8
18
FBA_CMD18
10
FBA_CMD10
5
FBA_CMD5
13
FBA_CMD13
21
FBA_CMD21FBA_CMD22
20
FBA_CMD20
19
FBA_CMD19
25
FBA_CMD25
4
FBA_CMD4
9
FBA_CMD9
17
FBA_CMD17
6
FBA_CMD6
23
FBA_CMD23
16
FBA_CMD16
3
FBA_CMD3
12
FBA_CMD12
1
FBA_CMD1
11
FBA_CMD11
FBA_CLK1
FBA_CLK1*
7
15
OUT
M10
L10
R11
M11
N11
R10
T10
T11
N10
P10
P11
R3
R2
T2
T3
N2
M2
M3
L3
N3
P3
P2
Low Power VREF Switch
R92 845
VREF = FBVDDQ * R2/(R1 + R2)
Low Power:
High Perf:
R94
511
1%
0402
COMMON
R93
1.3K
1%
0402
COMMON
FBA_VREF1
FBA_VREF2
FBA_VREF0
FBA_VREF3
0.72V = 1.8V * (1.3K|464)/(511 + (1.3K|464))
1.29V = 1.8V * 1.3K/(511 + 1.3K)
R1
R2
VREF = 0.40 * FBVDDQ
VREF = 0.70 * FBVDDQ
C76
.1UF
16V
10%
X7R
0402
COMMON
1%
R91
0402
1%
60V
0.115A
7.5R
0.8A
0.2W
20V
R106
0402 COMMON
1%
R109
0402 COMMON
1%
60V
0.115A
7.5R
0.8A
0.2W
20V
5,9
OUT
COMMON0402
845
COMMON
845
845
SOT23
FBA_VREFCTL2
SOT23
Decoupling for FBA 0..31
C507
C557
C502
1UF
6.3V
10%
X7R
0603
COMMON
C533
1UF
6.3V
10%
X7R
0603
COMMON
C532
1UF
6.3V
10%
X7R
0603
COMMON
C559
1UF
6.3V
10%
X7R
0603
COMMON
C558
1UF
6.3V
10%
X7R
0603
COMMON
C503
1UF
6.3V
10%
X7R
0603
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C509
.1UF
6.3V
10%
X7R
0402
COMMON
C520
.1UF
6.3V
10%
X7R
0402
COMMON
C505
.1UF
6.3V
10%
X7R
0402
COMMON
C551
.1UF
6.3V
10%
X7R
0402
COMMON
C544
.1UF
6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C543
.1UF
6.3V
10%
X7R
0402
COMMON
C554
.1UF
6.3V
10%
X7R
0402
COMMON
C517
.1UF
6.3V
10%
X7R
0402
COMMON
C504
.1UF
6.3V
10%
X7R
0402
COMMON
C506
.1UF
6.3V
10%
X7R
0402
COMMON
C555
.1UF
6.3V
10%
X7R
0402
COMMON
C527
.1UF
6.3V
10%
X7R
0402
COMMON
C549
.1UF
6.3V
10%
X7R
0402
COMMON
C512
.1UF
6.3V
10%
X7R
0402
COMMON
C521
.1UF
6.3V
10%
X7R
0402
COMMON
C511
.1UF
6.3V
10%
X7R
0402
COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
FBA_VREFCTL1
3
D
Q502
COMMON
S
2
3
D
Q501
COMMON
S
2
R107
511
1%
0402
COMMON
R108
1.3K
1%
0402
COMMON
C552
.1UF
6.3V
10%
X7R
0402
COMMON
C548
.1UF
6.3V
10%
X7R
0402
COMMON
C524
.1UF
6.3V
10%
X7R
0402
COMMON
C510
.1UF
6.3V
10%
X7R
0402
COMMON
C553
.1UF
6.3V
10%
X7R
0402
COMMON
C539
.1UF
6.3V
10%
X7R
0402
COMMON
600-10409-xxxx-300 A
R548
10K
5%
0402
GPIO10_FBVREFCTL
COMMON
R545
10K
5%
0402
COMMON
3,7,13
IN
1G1D1S
G
1
1G1D1S
G
1
1
2
R1
R2
C119
.1UF
16V
10%
X7R
0402
COMMON
5,9
OUT
3
C516
.1UF
6.3V
10%
X7R
0402
COMMON
C513
.1UF
6.3V
10%
X7R
0402
COMMON
C550
.1UF
6.3V
10%
X7R
0402
COMMON
C111
.1UF
6.3V
10%
X7R
0402
COMMON
C526
.1UF
6.3V
10%
X7R
0402
COMMON
C508
.1UF
6.3V
10%
X7R
0402
COMMON
PAGEID
DATE
16-MAR-2007
HFDBA
4
5
PDF created with pdfFactory Pro trial version www.pdffactory.com
www.vinafix.vn
A B C D E F G H
FB Partition A
1
2
3,4,9
3,4,9
IN
3,4,9
IN
ZQ = 6x desired output GDDR3:
GDDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
FBA_CMD[27..0]
IN
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
27
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11> CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
CMD7 CS1*
9
OUT
FBA_CMD27
7
FBA_CMD7
18
FBA_CMD18
10
FBA_CMD10
0
FBA_CMD0
2
FBA_CMD2
21
FBA_CMD21
20
FBA_CMD20
19
FBA_CMD19
25
FBA_CMD25
22
9
FBA_CMD9
17
FBA_CMD17
24
FBA_CMD24
23
FBA_CMD23
16
FBA_CMD16
3
FBA_CMD3
12
FBA_CMD12
1
FBA_CMD1
11
FBA_CMD11
FBA_CLK0
FBA_CLK0*
SNN_FBA0_NC3 SNN_FBA1_NC2
SNN_FBA0_NC2
15
FBA_CMD15 FBA_CMD15
FBA_ZQ2
3
FBAD[63..0]
3,4,9
BI
0
FBAD0
1
FBAD1
2
FBAD2
3
FBAD3
4
3,4,9 FBADQM[7..0]
4
BI
3,4,9 FBADQS_RN[7..0]
BI
3,4,9 FBADQS_WP[7..0]
BI
0
FBADQM0
1
FBADQM1
2
FBADQM2
3
FBADQM3
4
5
FBADQM5
6
FBADQM6
7
FBADQM7
0
FBADQS_RN0
1
FBADQS_RN1
2
FBADQS_RN2
3
FBADQS_RN3
4
FBADQS_RN4
5
FBADQS_RN5
6
FBADQS_RN6
7
FBADQS_RN7
0
FBADQS_WP0
1
FBADQS_WP1
2
FBADQS_WP2
3
FBADQS_WP3
4
FBADQS_WP4
5
FBADQS_WP5
6
FBADQS_WP6
7
FBADQS_WP7
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
FBAD4
5
FBAD5
6
FBAD6
7
FBAD7
FBADQM0
FBADQS_RN0
FBADQS_WP0
32
FBAD32
33
FBAD33
34
FBAD34
35
FBAD35
36
FBAD36
37
FBAD37
38
FBAD38
39
FBAD39
FBADQM4
FBADQS_RN4
FBADQS_WP4
R535
240
5%
0402
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
M502E
BGA_0136_P080_140X110
BGA136
COMMON
RAS BA2
CAS CS
WE CKE
CS CAS
A0 A4
A2 A6
A3 A9
A4 A0
A7 A11
A8/AP A10
A10 A8/AP
A11 A7
BA0
BA1 BA0
CLK
CLK
NC/RFU
NC/CS1 NC/CS1
SEN (GND)
NONMIRROR
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
*CS1 is required 32Mx32 Memories
BOTTOM SIDE MEMORY
VDD
VDD
VDD
VDD
VDD
VDD
A5A1
VDD
VDD
VDDQ
A1A5
VDDQ
A2A6
VDDQ
VDDQ
VDDQ
A3A9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
BA1
VDDQ
VDDQ
RASBA2
VDDQ
VDDQ
WECKE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MIRROR
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
M502A
BGA_0136_P080_140X110
BGA136
C3
B3
B2
C2
F3
F2
E2
G3
E3
D3
D2
E11
F10
G10
F11
B11
C10
B10
C11
E10
D10
D11
COMMON
M501E
BGA_0136_P080_140X110
BGA136
COMMON
8
DQ0
9
DQ1
10
DQ2
11
DQ3
12
DQ4
13
DQ5
14
DQ6
15
DQ7
DQM
RDQS
WDQS
40
DQ0
41
DQ1
42
DQ2
43
DQ3
44
DQ4
45
DQ5
46
DQ6
47
DQ7
DQM
RDQS
WDQS
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
FBA_VREF0
H12
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBADQM1
FBADQS_RN1
FBADQS_WP1
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBADQM5
FBADQS_RN5
FBADQS_WP5
OUT
OUT
E11
B10
B11
C11
G10
F10
F11
C10
E10
D10
D11
T2
M2
L3
N2
M3
R3
R2
T3
N3
P3
P2
4,9FBA_VREF2
4,9
M502B
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M501A
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
C GE
FBA_ZQ3
R105
240
5%
0402
COMMON
M502D
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M501C
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
M501D
BGA_0136_P080_140X110
BGA136
COMMON
RAS BA2
CAS CS
WE CKE
CS CAS
A0 A4
A1 A5
A3 A9
A4 A0
A5 A1
BA0
CLK
CLK
NC/RFU
NC/CS1 NC/CS1
SEN (GND)
NONMIRROR
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
*CS1 is required 32Mx32 Memories
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
A6A2
VDD
A1
VDDQ
C1
VDDQ
E1
A2A6
VDDQ
N1
A11A7
VDDQ
R1
A10A8/AP
VDDQ
V1
A3A9
VDDQ
C4
A8/APA10
VDDQ
E4
A7A11
VDDQ
J4
VDDQ
N4
VDDQ
R4
BA1
VDDQ
C9
BA0BA1
VDDQ
E9
RASBA2
VDDQ
J9
VDDQ
N9
WECKE
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
MIRROR
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
B4
VSSQ
D4
VSSQ
P4
VSSQ
T4
VSSQ
B9
VSSQ
D9
VSSQ
P9
VSSQ
T9
VSSQ
G11
VSSQ
L11
VSSQ
B12
VSSQ
D12
VSSQ
P12
VSSQ
T12
VSSQ
G1
VSS
L1
VSS
A3
VSS
V3
VSS
A10
VSS
V10
VSS
G12
VSS
L12
VSS
H1
VREF
FBA_VREF1
H12
VREF
4,9FBA_VREF3
OUT
4,9
OUT
Decoupling for FBA 0..31
C44
1UF
6.3V
10%
X7R
0603
COMMON
C21
1UF
6.3V
10%
X7R
0603
COMMON
C51
1UF
6.3V
10%
X7R
0603
COMMON
C53
1UF
6.3V
10%
X7R
0603
COMMON
C70
1UF
6.3V
10%
X7R
0603
COMMON
C43
1UF
6.3V
10%
X7R
0603
COMMON
C89
.1UF
6.3V
10%
X7R
0402
COMMON
C85
.1UF
6.3V
10%
X7R
0402
COMMON
C114
.1UF
6.3V
10%
X7R
0402
COMMON
C547
.1UF
6.3V
10%
X7R
0402
COMMON
C50
.1UF
6.3V
10%
X7R
0402
COMMON
C25
.1UF
6.3V
10%
X7R
0402
COMMON
C72
.1UF
6.3V
10%
X7R
0402
COMMON
C28
.1UF
6.3V
10%
X7R
0402
COMMON
C60
.1UF
6.3V
10%
X7R
0402
COMMON
C30
.1UF
6.3V
10%
X7R
0402
COMMON
C98
.1UF
6.3V
10%
X7R
0402
COMMON
C94
.1UF
6.3V
10%
X7R
0402
COMMON
C66
.1UF
6.3V
10%
X7R
0402
COMMON
C726
.1UF
6.3V
10%
X7R
0402
COMMON
C62
.1UF
6.3V
10%
X7R
0402
COMMON
C87
.1UF
6.3V
10%
X7R
0402
COMMON
C59
.1UF
6.3V
10%
X7R
0402
COMMON
C108
.1UF
6.3V
10%
X7R
0402
COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C57
C24
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C68
C86
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C83
C71
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C116
C115
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C67
C29
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C37
C102
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
600-10409-xxxx-300 A
PAGEID
DATE
16-MAR-2007
HFDBA
1
2
3
4
5
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
1
CMD11 WE*
CMD8 CS0*
CMD27 BA2CMD27 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
M502C
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M501B
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
CMD7 CS1*
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
9
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBADQM3FBADQM4
FBADQS_RN3
FBADQS_WP3
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM7
FBADQS_RN7
FBADQS_WP7
3,4,9
IN
3,4,9
IN
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBADQM2
FBADQS_RN2
FBADQS_WP2
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBADQM6
FBADQS_RN6
FBADQS_WP6
ASSEMBLY
PAGE DETAIL
N11
M10
L10
R10
M11
T10
R11
T11
N10
P10
P11
E2
G3
F2
F3
B3
C3
C2
B2
E3
D3
D2
Frame Buffer A Memories Rank1
FBA_CMD1
10
FBA_CMD10
11
FBA_CMD11
7
FBA_CMD7
19
FBA_CMD19
25
FBA_CMD25
4
FBA_CMD4
6
FBA_CMD6
5
FBA_CMD5
13
FBA_CMD13
21
FBA_CMD21FBA_CMD22
16
FBA_CMD16
23
FBA_CMD23
20
FBA_CMD20
17
FBA_CMD17
9
FBA_CMD9
12
FBA_CMD12
3
FBA_CMD3
27
FBA_CMD27
18
FBA_CMD18
FBA_CLK1
FBA_CLK1*
SNN_FBA1_NC3
15
OUT
M3
L3
R2
M2
N2
R3
T3
T2
N3
P3
P2
R10
R11
T11
T10
N11
M11
M10
L10
N10
P10
P11
PDF created with pdfFactory Pro trial version www.pdffactory.com
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A B C D E F G H
7,8,9 FBCD[63..0]
BI
0
FBCD0
1
FBCD1
2
FBCD2
3
FBCD3
4
FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7
FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7
FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7
FBCD4
5
FBCD5
6
FBCD6
7
FBCD7
8
FBCD8
9
FBCD9
10
FBCD10
11
FBCD11
12
FBCD12
13
FBCD13
14
FBCD14
15
FBCD15
16
FBCD16
17
FBCD17
18
FBCD18
19
FBCD19
20
FBCD20
21
FBCD21
22
FBCD22
23
FBCD23
24
FBCD24
25
FBCD25
26
FBCD26
27
FBCD27
28
FBCD28
29
FBCD29
30
FBCD30
31
FBCD31
32
FBCD32
33
FBCD33
34
FBCD34
35
FBCD35
36
FBCD36
37
FBCD37
38
FBCD38
39
FBCD39
40
FBCD40
41
FBCD41
42
FBCD42
43
FBCD43
44
FBCD44
45
FBCD45
46
FBCD46
47
FBCD47
48
FBCD48
49
FBCD49
50
FBCD50
51
FBCD51
52
FBCD52
53
FBCD53
54
FBCD54
55
FBCD55
56
FBCD56
57
FBCD57
58
FBCD58
59
FBCD59
60
FBCD60
61
FBCD61
62
FBCD62
63
FBCD63
1
Frame Buffer C GPU
2
FBCDQM[7..0]
7,8,9
3
BI
7,8,9
BI
7,8,9
BI
FBCDQS_WP[7..0]
FBCDQS_RN[7..0]
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
G1C
BGA_0820_P100_330X330_G3_128B
COMMON
3/14 FBC
B7
FBCD0
A7
FBCD1
C7
FBCD2
A2
FBCD3
B2
FBCD4
C4
FBCD5
A5
FBCD6
B5
FBCD7
F9
FBCD8
F10
FBCD9
D12
FBCD10
D9
FBCD11
E12
FBCD12
D11
FBCD13
E8
FBCD14
D8
FBCD15
E7
FBCD16
F7
FBCD17
D6
FBCD18
D5
FBCD19
D3
FBCD20
E4
FBCD21
C3
FBCD22
B4
FBCD23
C10
FBCD24
B10
FBCD25
C8
FBCD26
A10
FBCD27
C11
FBCD28
C12
FBCD29
A11
FBCD30
B11
FBCD31
B28
FBCD32
C27
FBCD33
C26
FBCD34
B26
FBCD35
C30
FBCD36
B31
FBCD37
C29
FBCD38
A31
FBCD39
D28
FBCD40
D27
FBCD41
F26
FBCD42
D24
FBCD43
E23
FBCD44
E26
FBCD45
E24
FBCD46
F23
FBCD47
B23
FBCD48
A23
FBCD49
C25
FBCD50
C23
FBCD51
A22
FBCD52
C22
FBCD53
C21
FBCD54
B22
FBCD55
E22
FBCD56
D22
FBCD57
D21
FBCD58
E21
FBCD59
E18
FBCD60
D19
FBCD61
D18
FBCD62
E19
FBCD63
A4
FBCDQM0
E11
FBCDQM1
F5
FBCDQM2
C9
FBCDQM3
C28
FBCDQM4
F24
FBCDQM5
C24
FBCDQM6
E20
FBCDQM7
C5
FBCDQS_WP0
E10
FBCDQS_WP1
E5
FBCDQS_WP2
B8
FBCDQS_WP3
A29
FBCDQS_WP4
D25
FBCDQS_WP5
B25
FBCDQS_WP6
F20
FBCDQS_WP7
C6
FBCDQS_RN0
E9
FBCDQS_RN1
E6
FBCDQS_RN2
A8
FBCDQS_RN3
B29
FBCDQS_RN4
E25
FBCDQS_RN5
A25
FBCDQS_RN6
F21
FBCDQS_RN7
4
3 FB_VREF
IN
C594
.1UF
16V
10%
X7R
0402
COMMON
A28
FB_VREF2
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C GE
ASSEMBLY
PAGE DETAIL
FBCAL_TERM_GND
Frame Buffer C GPU
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
FBC_DEBUG
FBC_PLLVDD
FBC_PLLAVDD
FBC_PLLGND
FBCAL_PD_VDDQ
FBCAL_PU_GND
AA23
AB23
H16
H17
J10
J23
J24
J9
K11
K12
K21
K22
K24
K9
L23
M23
T25
U25
C13
A16
A13
B17
B20
A19
B19
B14
E16
A14
C15
B16
F17
C19
D15
C17
A17
C16
D14
F16
C14
C18
E14
B13
E15
F15
A20
C20
A15
E13
F13
F18
E17
F12
G8
G10
G9
K26
H26
J26
SNN_FBVTT_AA23
SNN_FBVTT_AB23
SNN_FBVTT_H16
SNN_FBVTT_H17
SNN_FBVTT_J10
SNN_FBVTT_J23
SNN_FBVTT_J24
SNN_FBVTT_J9
SNN_FBVTT_K11
SNN_FBVTT_K12
SNN_FBVTT_K21
SNN_FBVTT_K22
SNN_FBVTT_K24
SNN_FBVTT_K9
SNN_FBVTT_L23
SNN_FBVTT_M23
SNN_FBVTT_T25
SNN_FBVTT_U25
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
SNN_FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
SNN_FBC_CMD26
FBC_CMD27
SNN_FBC_CMD28
NET_NAME
FBC_CLK0
FBC_CLK1*
FBC_DEBUG
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
12mil
SNN_FBC_PLLVDD
FBC_PLLAVDD
12mil
TP503
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
17
18
19
20
21
22
23
24
25
27
7,8,9
OUT
7,8,9FBC_CLK0*
OUT
7,8,9FBC_CLK1
OUT
7,8,9
OUT
12mil
12mil
R547
04021%COMMON
C702
470PF
50V
10%
X7R
0402
COMMON
R562 30.1
40.2
R561 40.2
04021%COMMON
COMMON0402
1%
C727
.022UF
16V
10%
X7R
0402
COMMON
C695
1UF
6.3V
10%
X7R
0603
COMMON
1
2
7,8,9FBC_CMD[27..0]
OUT
3
LB503180R@100MHz
IND_SMD_0603COMMON
4
5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10409-xxxx-300 A
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PAGEID
DATE
16-MAR-2007
HFDBA
PDF created with pdfFactory Pro trial version www.pdffactory.com
www.vinafix.vn
A B C D E F G H
FB Partition C
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
6,8,9
IN
6,8,9
IN
Stuff CKE Pull-down resistor only
6,8,9
6,8,9 FBCDQM[7..0]
6,8,9 FBCDQS_RN[7..0]
6,8,9 FBCDQS_WP[7..0]
R568
121
1%
0402
COMMON
FBC_CLK0_TERM FBC_CLK1_TERM
R78
121
1%
0402
COMMON
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
FBCD[63..0]
BI
BI
BI
BI
C692
.01UF
25V
10%
X7R
0402
COMMON
6,8,9
IN
R77
121
1%
0402
COMMON
R566 10K
0402 COMMON
5%
GDDR3:
FBC_CMD[27..0]
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
9 FBC_ZQ0
OUT
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
0
FBCDQM0
1
FBCDQM1
2
FBCDQM2
3
FBCDQM3
4
5
FBCDQM5
6
FBCDQM6
7
FBCDQM7
0
FBCDQS_RN0
1
FBCDQS_RN1
2
FBCDQS_RN2
3
FBCDQS_RN3
4
FBCDQS_RN4
5
FBCDQS_RN5
6
FBCDQS_RN6
7
FBCDQS_RN7
0
FBCDQS_WP0
1
FBCDQS_WP1
2
FBCDQS_WP2
3
FBCDQS_WP3
4
FBCDQS_WP4
5
FBCDQS_WP5
6
FBCDQS_WP6
7
FBCDQS_WP7
M1E
BGA_0136_P080_140X110
BGA136
1
FBC_CMD1
10
FBC_CMD10
11
FBC_CMD11
8
FBC_CMD8
19
FBC_CMD19
25
FBC_CMD25
22
24
FBC_CMD24
0
FBC_CMD0
2
FBC_CMD2
21
FBC_CMD21
16
FBC_CMD16
23
FBC_CMD23
20
FBC_CMD20
17
FBC_CMD17
9
FBC_CMD9
12
FBC_CMD12
3
FBC_CMD3
27
FBC_CMD27
18
FBC_CMD18
FBC_CLK0
FBC_CLK0*
SNN_FBC0_NC1 SNN_FBC1_NC1
7
FBC_CMD7 FBC_CMD7
15
FBC_CMD15 FBC_CMD15
R565
R567
10K
10K
5%
5%
0402
0402
COMMON
COMMON
COMMON
H3
RAS BA2
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
R75
240
5%
0402
COMMON
K1
K12
J1
J12
0
FBCD0
1
FBCD1
2
FBCD2
3
FBCD3
4
FBCD4
5
FBCD5
6
FBCD6
7
FBCD7
FBCDQM0
FBCDQS_RN0
FBCDQS_WP0
32
FBCD32
33
FBCD33
34
FBCD34
35
FBCD35
36
FBCD36
37
FBCD37
38
FBCD38
39
FBCD39
FBCDQM4
FBCDQS_RN4
FBCDQS_WP4
CS CAS
A1 A5
A7 A11
A8/AP A10
A9 A3
BA0
BA2 RAS
CLK
CLK
NC/RFU
SEN (GND)
NONMIRROR
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
*CS1 is required 32Mx32 Memories
M1A
BGA_0136_P080_140X110
BGA136
COMMON
M2
M3
L3
R2
T2
R3
N2
T3
N3
P3
P2
M2E
BGA_0136_P080_140X110
BGA136
COMMON
N2
M2
L3
M3
T2
R3
R2
T3
N3
P3
P2
CSCAS
CKEWE
A4A0
A6A2
A9A3
A0A4
A1A5
A2A6
A8/APA10
A7A11
BA1
BA0BA1
WECKE
NC/CS1NC/CS1
MIRROR
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
B4
VSSQ
D4
VSSQ
P4
VSSQ
T4
VSSQ
B9
VSSQ
D9
VSSQ
P9
VSSQ
T9
VSSQ
G11
VSSQ
L11
VSSQ
B12
VSSQ
D12
VSSQ
P12
VSSQ
T12
VSSQ
G1
VSS
L1
VSS
A3
VSS
V3
VSS
A10
VSS
V10
VSS
G12
VSS
L12
VSS
FBC_VREF0
H1
VREF
FBC_VREF2
H12
VREF
8
FBCD8
9
FBCD9
10
FBCD10
11
FBCD11
12
FBCD12
13
FBCD13
14
FBCD14
15
FBCD15
FBCDQM1
FBCDQS_RN1
FBCDQS_WP1
40
FBCD40
41
FBCD41
42
FBCD42
43
FBCD43
44
FBCD44
45
FBCD45
46
FBCD46
47
FBCD47
FBCDQM5
FBCDQS_RN5
FBCDQS_WP5
COMMON
COMMON
F11
C11
C10
E11
B10
B11
G10
F10
E10
D10
D11
T10
R10
R11
M10
M11
N11
T11
L10
N10
P10
P11
Topside memory
R74
511
R1
1%
0402
R70
1.3K
R2
1%
0402
M1B
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M2A
BGA_0136_P080_140X110
BGA136
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
6,8,9
6,8,9
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
C GE
IN
IN
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
8,9
OUT
C36
.1UF
16V
10%
X7R
0402
COMMON
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCDQM2
FBCDQS_RN2
FBCDQS_WP2
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCDQM6
FBCDQS_RN6
FBCDQS_WP6
ASSEMBLY
PAGE DETAIL
R564
121
1%
0402
COMMON
R79
121
1%
0402
COMMON
COMMON
COMMON
R584
R585
511
0402
1.3K
0402
1%
1%
R1
R2
C646
.01UF
25V
10%
X7R
0402
COMMON
L10
M10
M11
N11
R10
T11
T10
R11
N10
P10
P11
G10
E11
F11
F10
B11
C10
C11
B10
E10
D10
D11
M1C
BGA_0136_P080_140X110
BGA136
COMMON
M2B
BGA_0136_P080_140X110
BGA136
COMMON
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
R80
121
CMD20 A<9>
1%
CMD17 A<10>
0402
CMD9 A<11>
COMMON
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
GDDR3:
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
8,9
OUT
C743
.1UF
16V
10%
X7R
0402
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
Frame Buffer C Memories Rank0
CMD-Addr
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCDQM3FBCDQM4
FBCDQS_RN3
FBCDQS_WP3
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63
FBCDQM7
FBCDQS_RN7
FBCDQS_WP7
27
FBC_CMD27
8
FBC_CMD8
18
FBC_CMD18
10
FBC_CMD10
5
FBC_CMD5
13
FBC_CMD13
21
FBC_CMD21FBC_CMD22
20
FBC_CMD20
19
FBC_CMD19
25
FBC_CMD25
4
FBC_CMD4
9
FBC_CMD9
17
FBC_CMD17
6
FBC_CMD6
23
FBC_CMD23
16
FBC_CMD16
3
FBC_CMD3
12
FBC_CMD12
1
FBC_CMD1
11
FBC_CMD11
FBC_CLK1
FBC_CLK1*
7
15
9 FBC_ZQ1
OUT
M1D
BGA_0136_P080_140X110
BGA136
COMMON
G3
DQ0
F3
DQ1
F2
DQ2
C3
DQ3
B3
DQ4
E2
DQ5
B2
DQ6
C2
DQ7
E3
DQM
D3
RDQS
D2
WDQS
M2C
BGA_0136_P080_140X110
BGA136
COMMON
F3
DQ0
F2
DQ1
E2
DQ2
G3
DQ3
C2
DQ4
B2
DQ5
B3
DQ6
C3
DQ7
E3
DQM
D3
RDQS
D2
WDQS
R81
240
5%
0402
COMMON
M2D
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
*CS1 is required 32Mx32 Memories
BGA_0136_P080_140X110
BGA136
COMMON
RAS BA2
CS CAS
A0 A4
A1 A5
BA0
CLK
CLK
NC/RFU
SEN (GND)
NONMIRROR
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
F1
VDD
CSCAS
CKEWE
A6A2
A9A3
A0A4
A1A5
A2A6
A11A7
A10A8/AP
A3A9
A8/APA10
A7A11
BA1
BA0BA1
RASBA2
WECKE
NC/CS1NC/CS1
MIRROR
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
B4
VSSQ
D4
VSSQ
P4
VSSQ
T4
VSSQ
B9
VSSQ
D9
VSSQ
P9
VSSQ
T9
VSSQ
G11
VSSQ
L11
VSSQ
B12
VSSQ
D12
VSSQ
P12
VSSQ
T12
VSSQ
G1
VSS
L1
VSS
A3
VSS
V3
VSS
A10
VSS
V10
VSS
G12
VSS
L12
VSS
FBC_VREF1
H1
VREF
FBC_VREF3
H12
VREF
Decoupling for FBC 0..31
C620
C698
.1UF
6.3V
10%
X7R
0402
COMMON
C755
.1UF
6.3V
10%
X7R
0402
COMMON
C757
.1UF
6.3V
10%
X7R
0402
COMMON
C764
.1UF
6.3V
10%
X7R
0402
COMMON
C700
.1UF
6.3V
10%
X7R
0402
COMMON
C581
.1UF
6.3V
10%
X7R
0402
COMMON
C571
.1UF
6.3V
10%
X7R
0402
COMMON
C604
.1UF
6.3V
10%
X7R
0402
COMMON
C758
.1UF
6.3V
10%
X7R
0402
COMMON
C600
.1UF
6.3V
10%
X7R
0402
COMMON
C583
.1UF
6.3V
10%
X7R
0402
COMMON
C574
.1UF
6.3V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X7R
0603
COMMON
C631
1UF
6.3V
10%
X7R
0603
COMMON
C765
1UF
6.3V
10%
X7R
0603
COMMON
C704
1UF
6.3V
10%
X7R
0603
COMMON
C708
1UF
6.3V
10%
X7R
0603
COMMON
C572
1UF
6.3V
10%
X7R
0603
COMMON
Low Power VREF Switch
FBC_VREF2
FBC_VREF1
FBC_VREF0
FBC_VREF3
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.40 * FBVDDQ
Low Power:
0.72V = 1.8V * (1.3K|464)/(511 + (1.3K|464))
VREF = 0.70 * FBVDDQ
High Perf:
1.29V = 1.8V * 1.3K/(511 + 1.3K)
R554
511
R1
1%
0402
COMMON
R555
1.3K
R2
1%
0402
COMMON
C578
C763
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C607
C754
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C732
C610
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C749
C735
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C637
C762
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C573
C750
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C589
.1UF
16V
10%
X7R
0402
COMMON
OUT
C586
.1UF
6.3V
10%
X7R
0402
COMMON
C575
.1UF
6.3V
10%
X7R
0402
COMMON
C638
.1UF
6.3V
10%
X7R
0402
COMMON
C576
.1UF
6.3V
10%
X7R
0402
COMMON
C761
.1UF
6.3V
10%
X7R
0402
COMMON
C740
.1UF
6.3V
10%
X7R
0402
COMMON
R586 845
1%
R556 845
1%
60V
0.115A
7.5R
0.8A
0.2W
20V
R67 845
1%
R5571%845
60V
0.115A
7.5R
0.8A
0.2W
20V
8,9
COMMON0402
COMMON0402
COMMON0402
COMMON0402
FBC_VREFCTL1
3
1G1D1S
D
Q8
SOT23
G
1
COMMON
S
2
FBC_VREFCTL2
3
1G1D1S
D
Q503
SOT23
G
GPIO10_FBVREFCTL
1
COMMON
S
2
R559
511
R1
1%
0402
COMMON
R558
1.3K
R2
1%
0402
COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10409-xxxx-300 A
NAMEIMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C592
.1UF
16V
10%
X7R
0402
COMMON
1
3,4,13
IN
2
8,9
OUT
3
4
5
PAGEID
DATE
16-MAR-2007
HFDBA
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