Page 1
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
ASSEMBLY NVPN VARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P401-A02 -- G84-400, 700/100MHz, 256MB 16Mx32 BGA136 GDDR3,
DVI-I-DL, DVI-I-DL, VIVO/TV-Out/Stereo
BASE
SKU0000
SKU0010
SKU9100
SKU9200
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10401-base-200
600-10401-0000-200
600-10401-0010-200
600-10401-9100-200
600-10401-9200-200
<UNDEFINED>
<UNDEFINED>
<UNDEFINED> <UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO
G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO FOR SAMSUNG MEMORY
G84-400 700/1000MHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+VIVO FOR HYNIX MEMORY
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
Table of Contents:
Page 1: Title Page
Page 2: PEX Interface, NVVDD Decaps, PEX Decaps
Page 3: FrameBuffer - GPU Partition A and FBVDDQ Decaps
Page 4: FrameBuffer - Partition A 16Mx32 BGA136 GDDR3
Page 5: FrameBuffer - Partition A Decaps
Page 6: FrameBuffer - GPU Partition C and FBVDDQ Decaps
Page 7: FrameBuffer - Partition C 16Mx32 BGA136 GDDR3
Page 8: FrameBuffer - Partition C Decaps
Page 9: DACA Interface
Page 10: DACC Interface
Page 11: IFP A/B Interface
Page 12: IFP C/D Interface
Page 13: MIOA & MIOB and SLI Connector
Page 14: Video Capture (Philips 7115)
Page 15: DACB, TV-Out, and Stereo Interface
Page 16: XTAL/PLLVDD and SPDIF Connector
Page 17: GPIO, JTAG, BIOS ROM, HDCP ROM, and 2-Pin/4-Pin Fan Control
Page 18: Strap Configuration and Mechnicals & Thermals
Page 19: PowerSupply I - 5V, DDC5V, TMDS_PLL, TMDS_IOVDD, and MIOA_2V5
Page 20: PowerSupply II - FBVDDQ and PEXVDD
Page 21: PowerSupply III - PEX12V & EXT12V and NVVDD VID Control
Page 22: PowerSupply IV - NVVDD
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
Title Page
www.vinafix.vn
600-10401-0000-200 B
p401_a02
APATEL
1 OF 22
16-JAN-2007
Page 2
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
1/14 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
VDD
VDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD_LP
VDD_LP
VDD_SENSE
GND_SENSE
VDD33
VDD33
PEX_PLLGND
PEX_PLLDVDD
PEX_PLLAVDD
SPDIF
PEX_RST
RFU
RFU
PEX_RX1
PEX_TX1
PEX_TX1
PEX_RX0
PEX_RX0
PEX_TX0
PEX_TX0
PEX_REFCLK
PEX_REFCLK
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_RX1
PEX_TX2
PEX_RX4
PEX_RX4
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_TX3
PEX_TX3
PEX_RX2
PEX_RX2
PEX_TX2
PEX_TX5
PEX_TX5
PEX_RX5
PEX_TX8
PEX_TX8
PEX_RX7
PEX_RX7
PEX_TX7
PEX_TX7
PEX_RX6
PEX_RX6
PEX_TX6
PEX_TX6
PEX_RX5
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX9
PEX_RX9
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX15
PEX_TX15
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX14
PEX_RX13
PEX_RX13
PEX_TX13
PEX_TX13
PEX_RX15
PEX_RX15
END OF X8
END OF X16
END OF X1
END OF X4
TCLK JTAG2
TMS JTAG5
TDO JTAG4
TDI JTAG3
WAKE
SMDAT
SMCLK
PERN0
PERP0
REFCLK
PERST
REFCLK
PETN1
PERP2
PETN0
PERP1
PERN1
PETP0
PETP1
PERN3
PETP3
PETN3
PETP2
PERP3
PETN2
PERN2
PERP4
PERN4
PETN4
PERP5
PETP4
PERN5
PETP5
PETP6
PERN6
PERP6
PETN5
PERP7
PETN6
PERN7
PETN8
PETP8
PERP8
PETN7
PETP7
PERN8
PERN9
PERP9
PERP10
PERN10
PETP10
PETP9
PETN9
PETN10
PETN11
PERP12
PERN12
PERP11
PERN11
PETP11
PETN12
PETP12
PETN13
PERP13
PERN13
PETP13
PERP14
PERN15
PETP15
PETN15
PERN14
PETN14
PETP14
PERP15
TRST* JTAG1 +12V
+12V/RSVD
+3V3AUX
+12V
+12V
+12V
+3V3
+3V3
+3V3
PRSNT2
PRSNT1
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
RSVD
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT2
GND
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
G1
G84-400-A1
BGA820
COMMON
AD23
AF23
AF24
AF25
AG24
AG25
AC16
AC17
AC21
AC22
AE18
AE21
AE22
AF12
AF18
AH15
AG12
AH13
AM12
AM11
AH14
AJ14
AJ15
AK15
AK13
AK14
AH16
AG16
AM14
AM15
AG17
AH17
AL15
AL16
AG18
AH18
AK16
AK17
AK18
AJ18
AL17
AL18
AJ19
AH19
AM18
AM19
AG20
AH20
AK19
AK20
AG21
AH21
AL20
AL21
AK21
AJ21
AM21
AM22
AJ22
AH22
AK22
AK23
AG23
AH23
AL23
AL24
AK24
AJ24
AM24
AM25
AJ25
AH25
AK25
AK26
AH26
AG26
AL26
AL27
AK27
AJ27
AM27
AM28
AJ28
AH27
AL28
AL29
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
PEX Interface, NVVDD Decaps, PEX Decaps
AF21
AF22
K16
K17
N13
N14
N16
N17
N19
P13
P14
P16
P17
P19
R16
R17
T13
T14
T15
T18
T19
U13
U14
U15
U18
U19
V16
V17
W13
W14
W16
W17
W19
Y13
Y14
Y16
Y17
Y19
Y20
P20
T20
T23
U20
U23
W20
N20
M21
AC11
AC12
AC24
AD24
AE11
AE12
H7
J7
K7
L10
L7
L8
M10
AF15
AE15
AE16
J6
F_SPDIFIN
www.vinafix.vn
NVVDD_SENSE
NVVDD_GND_SENSE
GND
Place near balls
C649
.022UF
16V
10%
X7R
0402
COMMON
C671
.022UF
16V
10%
X7R
0402
COMMON
Place near balls
C696
4700PF
10%
25V
X7R
0402
COMMON
C757
C745
C735
10%
C722
10%
C704
10%
C694
10%
C683
C672
C662
C651
10%
C635
10%
C624
10%
C619
10%
C615
C605
10%
C598
10%
1
17<
17<
17<
17<
17<
PEX_RST_GPU*
0
R628
COMMON
0402
5%
SNN_PEXCAPD_VDDQ
SNN_PEXCALPD_GND
200
R38
0402 COMMON
5%
PEX_TEST_PLLCLK_OUT
PEX_TEST_PLLCLK_OUT_N
PEX_TX0
PEX_TX0*
X7R COMMON
10%
PEX_TX1
PEX_TX1*
X7R
COMMON 10%
PEX_TX2
PEX_TX2*
X7R
COMMON
10%
PEX_TX3
PEX_TX3*
X7R COMMON
10%
PEX_TX4
PEX_TX4*
X7R
COMMON 10%
PEX_TX5
PEX_TX5*
X7R
COMMON
10%
PEX_TX6
PEX_TX6*
X7R COMMON
10%
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
X7R
COMMON 10%
PEX_TX9
PEX_TX9*
X7R
COMMON
10%
PEX_TX10
PEX_TX10*
X7R COMMON
10%
PEX_TX11
PEX_TX11*
X7R
COMMON 10%
PEX_TX12
PEX_TX12*
X7R
COMMON
10%
PEX_TX13
PEX_TX13*
X7R COMMON
10%
PEX_TX14
PEX_TX14*
X7R
COMMON 10%
PEX_TX15
PEX_TX15*
X7R COMMON
10%
0402 10%
0402 10%
0402
0402
0402
0402
0402 10%
0402 10% X7R COMMON
0402 10%
0402
0402
0402
0402
0402 10%
0402
0402
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
18<
C751
C741
0402
C728
0402
C713
0402
0402
C686
0402
C676
0402
C668
C658
C645
0402
C633
0402
C621
0402
C616
0402
C613
C603
0402
C595
0402
.1UF
16V 0402
.1UF
16V
.1UF
16V
.1UF
16V
.1UF C701
16V
.1UF
16V
.1UF
16V
.1UF
16V 0402 X7R 10% COMMON
.1UF
16V 0402
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V 0402
.1UF
16V
.1UF
16V
Page2: PEX Interface,.NVVDD Decaps, PEX Decaps
PEX3V3
C825
.01UF
16V
10%
X7R
3V3AUX
0402
COMMON
Place Close to fingers
C814
10UF
16V
20%
X5R
1206
COMMON
GND
PRSNT
SNN_PE_PRSNT2_A
SNN_PE_RSVD2
SNN_PE_PRSNT2_B
SNN_PE_RSVD3
SNN_PE_RSVD4
SNN_PE_RSVD5
SNN_PE_PRSNT2_C
SNN_PE_RSVD6
PRSNT
SNN_PE_RSVD7
SNN_PE_RSVD8
C29
.1UF
16V
10%
X5R
0402
COMMON
GND
C823
.1UF
16V
10%
X7R
0402
COMMON
PEX12V
GND
GND
GND
CN2
CON_X16
CON_PCIEXP_X16_EDGE
COMMON
B1
B2
A2
A3
B3
B8
A9
A10
B10
A1
B17
B12
B4
A4
B7
A12
B13
A15
B16
B18
A18
B31
A19
B30
A32
A20
B21
B22
A23
A24
B25
B26
A27
A28
B29
A31
B32
GND
B48
A33
A34
B35
B36
A37
A38
B39
B40
A41
A42
B43
B44
A45
A46
B47
B49
A49
B81
A50
B82
A51
B52
B53
A54
A55
B56
B57
A58
A59
B60
B61
A62
A63
B64
B65
A66
A67
B68
B69
A70
A71
B72
B73
A74
A75
B76
B77
A78
A79
B80
A82
NONPHY-X16
C23
.01UF
25V
10%
X7R
0402
COMMON
B9
A5
A6
A7
A8
B5
B6
A11
A13
A14
A16
A17
B14
B15
A21
A22
B19
B20
A25
A26
B23
B24
A29
A30
B27
B28
A35
A36
B33
B34
A39
A40
B37
B38
A43
A44
B41
B42
A47
A48
B45
B46
A52
A53
B50
B51
A56
A57
B54
B55
A60
A61
B58
B59
A64
A65
B62
B63
A68
A69
B66
B67
A72
A73
B70
B71
A76
A77
B74
B75
A80
A81
B78
B79
PEX_TRST*
PEX_TCLK
PEX_TDI
PEX_TDO
PEX_TMS
I2CS_SCL
I2CS_SDA
SNN_PEX_WAKE*B11
C25 C26
.1UF
16V
10%
X7R
0603
COMMON
PEX_REFCLK
PEX_REFCLK*
PEX_TXX0
PEX_TXX0*
PEX_RX0
PEX_RX0*
PEX_TXX1
PEX_TXX1*
PEX_RX1
PEX_RX1*
PEX_TXX2
PEX_TXX2*
PEX_RX2
PEX_RX2*
PEX_TXX3
PEX_TXX3*
PEX_RX3
PEX_RX3*
PEX_TXX4
PEX_TXX4*
PEX_RX4
PEX_RX4*
PEX_TXX5
PEX_TXX5*
PEX_RX5
PEX_RX5*
PEX_TXX6
PEX_TXX6*
PEX_RX6
PEX_RX6*
PEX_TXX7
PEX_TXX7*
PEX_RX7
PEX_RX7*
PEX_TXX8
PEX_TXX8*
PEX_RX8
PEX_RX8*
PEX_TXX9
PEX_TXX9*
PEX_RX9
PEX_RX9*
PEX_TXX10
PEX_TXX10*
PEX_RX10
PEX_RX10*
PEX_TXX11
PEX_TXX11*
PEX_RX11
PEX_RX11*
PEX_TXX12
PEX_TXX12*
PEX_RX12
PEX_RX12*
PEX_TXX13
PEX_TXX13*
PEX_RX13
PEX_RX13*
PEX_TXX14
PEX_TXX14*
PEX_RX14
PEX_RX14*
PEX_TXX15
PEX_TXX15*
PEX_RX15
PEX_RX15*
PEX_RST*
GND
R662
0
5%
0402
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
10UF
16V
20%
X5R
1206
COMMON
17<
17<>
X7R
X7R
X7R
X7R COMMON
X7R
X7R
X7R COMMON
X7R
X7R
X7R COMMON
X7R
X7R
X7R COMMON
X7R
X7R COMMON
VALUES TBD
C639
.022UF
16V
10%
X7R
0402
COMMON
VALUES TBD
Place near balls
C698
.022UF
16V
10%
X7R
0402
COMMON
Place near balls
C691
C692
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C684
C653
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C688
C703
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C680
C678
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
Place near balls
C710
.1UF
10V
10%
X5R
0402
C702
.1UF
10V
10%
0402
PEX_PLLVDD
C697
470PF
16V
10%
X7R
0402
COMMON
16> 16<
C661
.01UF
16V
10%
X7R
0402
COMMON
C673
.1UF
16V
10%
X7R
0402
COMMON
C706
.1UF .47UF .47UF
16V
10%
X7R
0402
COMMON
C689
.47UF
6.3V
10%
X5R
0402
COMMON
C656
1UF
6.3V
10%
X5R
0402
COMMON
22<
22<
C685
.1UF
10%
16V
X7R
0402
COMMON
C665
.01UF
16V
10%
X7R
0402
COMMON
C738
4700PF
25V
10%
X7R
0402
COMMON COMMON
C724
4700PF
25V
10%
X7R X5R
0402
COMMON COMMON
C675
.01UF
16V
10%
X7R
0402
COMMON
C654
.1UF
16V
10%
X7R
0402
COMMON
C670
6.3V
10%
X5R
0402
COMMON
C700
.47UF
6.3V
10%
X5R X5R
0402
COMMON
C667
10UF
6.3V
20%
X5R
0805
COMMON
C634
.022UF
16V
10%
X7R
0402
COMMON
C714
.022UF
16V
10%
X7R
0402
COMMON
C695
.01UF
16V
10%
X7R
0402
COMMON
Place Close to GPU
Place Close to GPU
C663
.1UF
16V
10%
X7R
0402
COMMON
C693
6.3V
10%
X5R
0402
COMMON
C642
.47UF
6.3V
10%
0402
COMMON
C709
10UF
6.3V
20%
X5R
0805
COMMON
C747
.022UF
16V
10%
X7R
0402
COMMON
C630
.022UF
16V
10%
X7R
0402
COMMON
GND
Place Near BGA
C682
4.7UF
6.3V
X5R
0603
COMMON
GND
PEXVDD
C606
4.7UF
10%
6.3V
X5R
0603
COMMON
PEXVDD
C655
22UF
20%
6.3V
X5R
0805
COMMON
GND
NVVDD
C669
C687
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C640
C643
.47UF .47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C679
C705
1UF
.47UF
6.3V
6.3V
10%
10%
X5R X5R
0402
0402
COMMON
COMMON
C677
10UF
6.3V
20%
X5R
0805
COMMON
PEX3V3
C764
1UF
6.3V
10%
X7R
0603
COMMON
GND
180R@100MHz
LB502
COMMON BEAD_0603
10%
C610
4.7UF
6.3V
X5R
0603
COMMON
C607
22UF
6.3V
X5R
0805
COMMON
PEX_REFCLK PEX_REFCLK
MIN_LINE_WIDTH
10MIL
30MIL
20MIL
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX2
PEX_TX2
PEX_TX3
PEX_TX3
PEX_TX4
PEX_TX4
PEX_TX5
PEX_TX5
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7 PEX_TX7*
PEX_TX8
PEX_TX8
PEX_TX9
PEX_TX9
PEX_TX10
PEX_TX10
PEX_TX11
PEX_TX11
PEX_TX12
PEX_TX12
PEX_TX13
PEX_TX13
PEX_TX14
PEX_TX14
PEX_TX15
PEX_TX15
PEX_TXX0
PEX_TXX0
PEX_TXX1
PEX_TXX1
PEX_TXX2
PEX_TXX2
PEX_TXX3
PEX_TXX3
PEX_TXX4
PEX_TXX4
PEX_TXX5
PEX_TXX5
PEX_TXX6
PEX_TXX6
PEX_TXX7
PEX_TXX7
PEX_TXX8
PEX_TXX8
PEX_TXX9
PEX_TXX9
PEX_TXX10
PEX_TXX10
PEX_TXX11
PEX_TXX11
PEX_TXX12
PEX_TXX12
PEX_TXX13
PEX_TXX13
PEX_TXX14
PEX_TXX14
PEX_TXX15
PEX_TXX15
PEX_RX0
PEX_RX0
PEX_RX1
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_RX5
PEX_RX5
PEX_RX6
PEX_RX6
PEX_RX7
PEX_RX7
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_RX15
PEX_RX15
VOLTAGE
1.2V
VOLTAGE MIN_LINE_WIDTH
12V
3.3V
PEX_REFCLK*
10%
GND
20%
GND
PEXVDD
C650
4.7UF
10%
6.3V
X5R
0603
COMMON
GND
PEX12V
PEX3V3
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*
PEX_TXX0
PEX_TXX0*
PEX_TXX1
PEX_TXX1*
PEX_TXX2
PEX_TXX2*
PEX_TXX3
PEX_TXX3*
PEX_TXX4
PEX_TXX4*
PEX_TXX5
PEX_TXX5*
PEX_TXX6
PEX_TXX6*
PEX_TXX7
PEX_TXX7*
PEX_TXX8
PEX_TXX8*
PEX_TXX9
PEX_TXX9*
PEX_TXX10
PEX_TXX10*
PEX_TXX11
PEX_TXX11*
PEX_TXX12
PEX_TXX12*
PEX_TXX13
PEX_TXX13*
PEX_TXX14
PEX_TXX14*
PEX_TXX15
PEX_TXX15*
PEX_RX0
PEX_RX0*
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*
NET
PEX_PLLVDD
PEX12V
PEX3V3
NET
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
NV_NET_MAX_CURRENT
NV_NET_MAX_CURRENT
5.5A
3A
0.200A
NV_CRITICAL NV_IMPEDANCE DIFFPAIR NET
1 100DIFF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 100DIFF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 100DIFF
1
1 100DIFF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 100DIFF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
600-10401-0000-200 B
p401_a02
APATEL
2 OF 22
16-JAN-2007
Page 3
Page3: FrameBuffer - GPU Partition A and FBVDDQ Decaps
2/14 FBA
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD0
FBA_CMD2
FBA_CMD3
FBVDDQ
FBA_CMD1
FBA_CMD4
FBA_CMD5
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD11
FBA_CMD13
FBA_CMD15
FBA_CMD16
FBA_CMD19
FBA_CMD21
FBA_CMD22
FBA_CMD24
FBA_CMD25
FBA_CMD20
FBA_CMD17
FBA_CMD14
FBA_CMD10
FBA_CMD6
FBA_CMD12
FBA_CMD18
FBA_CMD23
FBA_CMD26
FBA_DEBUG
FBA_CLK0
FBA_PLLAVDD
H_PLLAVDD
FBA_CLK1
FBA_CLK1
FBA_CLK0
FBA_CMD28
FBA_CMD27
NC1
NC2
FBA_PLLGND
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD44
FBAD47
FBAD49
FBAD51
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD45
FBAD46
FBAD48
FBAD50
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN7
FBADQS_RN6
FBADQS_RN5
FB_VREF1
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
2
4<>
Rtop
Rbot
FBVDDQ
634
R585 1.3K
R586
GND
4<>
4<>
4<>
NO STUFF
1%
0402
NO STUFF
1%
0402
DDR3:
FBAD<63..0>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
FBADQM<7..0>
FBADQS_WP<7..0>
FBADQS_RN<7..0>
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
C609
.1UF
16V
10%
X7R
0402
NO STUFF
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
VREF = 0.70 * FBVDDQ
1.33V = 1.9V * 1.3K/(549 + 1.3K)
FBAD<0>
FBAD<1>
FBAD<2>
FBAD<3>
FBAD<4>
FBAD<5>
FBAD<6>
FBAD<7>
FBAD<8>
FBAD<9>
FBAD<10>
FBAD<11>
FBAD<12>
FBAD<13>
FBAD<14>
FBAD<15>
FBAD<16>
FBAD<17>
FBAD<18>
FBAD<19>
FBAD<20>
FBAD<21>
FBAD<22>
FBAD<23>
FBAD<24>
FBAD<25>
FBAD<26>
FBAD<27>
FBAD<28>
FBAD<29>
FBAD<30> E28
FBAD<31>
FBAD<32>
FBAD<33>
FBAD<34>
FBAD<35>
FBAD<36>
FBAD<37>
FBAD<38>
FBAD<39>
FBAD<40> AM30
FBAD<41>
FBAD<42>
FBAD<43>
FBAD<44>
FBAD<45>
FBAD<46>
FBAD<47>
FBAD<48>
FBAD<49>
FBAD<50>
FBAD<51>
FBAD<52>
FBAD<53>
FBAD<54>
FBAD<55>
FBAD<56>
FBAD<57>
FBAD<58>
FBAD<59>
FBAD<61>
FBAD<62>
FBAD<63>
FBADQM<0>
FBADQM<1>
FBADQM<2>
FBADQM<3>
FBADQM<4>
FBADQM<5>
FBADQM<6>
FBADQM<7>
FBADQS_WP<0>
FBADQS_WP<1>
FBADQS_WP<2>
FBADQS_WP<3>
FBADQS_WP<4>
FBADQS_WP<5>
FBADQS_WP<6>
FBADQS_WP<7>
FBADQS_RN<0>
FBADQS_RN<1>
FBADQS_RN<2>
FBADQS_RN<3>
FBADQS_RN<4>
FBADQS_RN<5>
FBADQS_RN<6>
FBADQS_RN<7>
N27
M27
N28
L29
K27
K28
J29
J28
P30
N31
N30
N32
L31
L30
J30
L32
H30
K30
H31
F30
H32
E31
D30
E30
H28
H29
E29
J27
F27
E27
F28
AD29
AE29
AD28
AC28
AB29
AA30
Y28
AB30
AF30
AJ31
AJ30
AJ32
AK29
AM31
AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27
AF28
AH28
AG28
AG29FBAD<60>
AD27
AF27
AE28
M29
M30
G30
F29
AA29
AK30
AC30
AG30
L28
K31
G32
G28
AB28
AL32
AF32
AH30
M28
K32
G31
G27
AA28
AL31
AF31
AH29
E32FBA_VREF
G1
G84-400-A1
BGA820
COMMON
A12
A18
A21
A24
A27
A3
A30
A6
A9
AA32
AD32
AG32
AK32
C32
F32
J32
M32
R32
AA25
AA26
AB25
AB26
G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
H22
L25
L26
M25
M26
R25
R26
V25
V26
FBA_CMD<0>
P32
FBA_CMD<1>
U27
FBA_CMD<2>
P31
FBA_CMD<3>
U30
FBA_CMD<4>
Y31
FBA_CMD<5>
W32
FBA_CMD<6>
W31
FBA_CMD<7>
T32
FBA_CMD<8>
V27
FBA_CMD<9>
T28
FBA_CMD<10>
T31
FBA_CMD<11>
U32
FBA_CMD<12>
W29
FBA_CMD<13>
W30
SNN_FBA_CMD<14>
T27
FBA_CMD<15>
V28
FBA_CMD<16>
V30
FBA_CMD<17>
U31
FBA_CMD<18>
R27
FBA_CMD<19>
V29
FBA_CMD<20>
T30
FBA_CMD<21>
W28
FBA_CMD<22>
R29
FBA_CMD<23>
R30
FBA_CMD<24>
P29
FBA_CMD<25>
U28
SNN_FBA_CMD<26>
Y32
SNN_FBA_CMD<27>
Y30
SNN_FBA_CMD<28>
V32
FBA_CLK0
P28
FBA_CLK0*
R28
FBA_CLK1
Y27
FBA_CLK1*
AA27
FBA_DEBUG
AC27
G23
H_PLLVDD
G25
G24
GND
D31 SNN_GPU_NC1_D31
D32
SNN_GPU_NC2_D32
C600
.1UF
16V
10%
X7R
0402
COMMON
C699
.47UF
6.3V
10%
X5R
0402
COMMON
C622
6.3V
10%
X5R
0402
COMMON
C681
1UF
6.3V
10%
X7R
0603
COMMON
C631
4.7UF
6.3V
10%
X5R
0603
COMMON
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
17
18
19
20
21
22
23
24
25
TP100
PLACE BELOW GPU
C674
.1UF
16V
10%
X7R
COMMON
C627
.47UF
6.3V
10%
X5R
0402
COMMON
C768
.47UF .47UF .47UF .47UF
6.3V
10%
X5R
0402
COMMON
C625
1UF
6.3V 6.3V
10%
X7R
0603
COMMON
C611
4.7UF
6.3V
10%
0603 0603
FBA_CMD<26..0>
4<
4<
4<
4<
.1UF
16V
10%
X7R
0402 0402
COMMON
C641
.47UF
6.3V
10%
X5R
0402
COMMON
C727
6.3V
10%
X5R
0402
COMMON
C594
1UF
10%
X7R
0603
COMMON
C657
4.7UF
6.3V
10%
X5R X5R
COMMON COMMON
.1UF
16V
10%
X7R
0402
COMMON
C659
.47UF
6.3V
10%
X5R
0402
COMMON
C707
6.3V
10%
X5R
0402
COMMON
C725
1UF
6.3V
10%
X7R
0603
COMMON
4<> 4<
.1UF
16V
10%
X7R
0402
COMMON
C666
.47UF
6.3V
10%
X5R
0402
COMMON
C664
.47UF
6.3V
10%
X5R
0402
COMMON
C614
1UF
6.3V
10%
X7R
0603
COMMON
.1UF
16V
10%
X7R
0402
COMMON
C628
.47UF
6.3V
10%
X5R
0402
COMMON
C746
.47UF
6.3V
10%
X5R
0402
COMMON
.1UF
16V
10%
X7R
0402
COMMON
C690
C644
C597
C608
C636
PLACE close to balls
C648
.01UF
16V
10%
X7R
0402
COMMON
C647
.1UF
16V
10%
X7R
0402
COMMON
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
FrameBuffer - GPU Partition A and FBVDDQ Decaps
www.vinafix.vn
FBVDDQ
GND
C599
.1UF
16V
10%
X7R
0402
COMMON
240R@100MHz
LB501
C646
1UF
6.3V
10%
0402
COMMON
COMMON BEAD_0402
FBVDDQ
C583
10UF
6.3V
20%
X5R
COMMON
C586
10UF
6.3V
20%
X5R
0805 0805
COMMON
PLACE MIDWAY BETWEEN GPU AND MEMORY
PEXVDD
C652
4.7UF
6.3V
10%
X5R X5R
0603
COMMON
GND
C596
10UF
6.3V
20%
X5R
0805
COMMON
GND
C800
10UF
6.3V
20%
X5R
0805
COMMON
NET
H_PLLVDD
FBA_VREF
12MIL
12MIL
p401_a02
APATEL
1.2V
600-10401-0000-200 B
NV_NET_MAX_CURRENT MIN_LINE_WIDTH VOLTAGE
0.120A
3 OF 22
16-JAN-2007
Page 4
ININININBIBIBIBIBIBIBIBIBIBIBIBIBI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FBVDDQ
136BGA CMD Mapping
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4 K2
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
CMD
CMD1
CMD10
CMD11
CMD18
CMD15
CMD8
CMD19
CMD25
CMD22
CMD24
CMD0
CMD2
CMD4
CMD6
CMD5
CMD13
CMD21
CMD16
CMD23
CMD20
CMD17
CMD9
CMD12
CMD3
CMD7
GND
FBA_VREF0
FBA_VREF1
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQ
1.33V = 2.0V * 1.3K/(634 + 1.3K)
FBAD<0>
0
FBAD<1>
1
FBAD<2>
2
FBAD<3>
3
FBAD<4>
4
FBAD<5>
5
FBAD<6>
6
FBAD<7>
7
FBADQM<0>
FBADQS_RN<0>
FBADQS_WP<0>
FBAD<32>
32
FBAD<33>
33
FBAD<34>
34
FBAD<35>
35
FBAD<36>
36
FBAD<37>
37
FBAD<38>
38
FBAD<39>
39
FBADQM<4>
FBADQS_RN<4>
FBADQS_WP<4>
FBA Partition
ADDR
RAS*
CAS*
WE*
CKE
RESET
CS0*
A<0>
A<1>
A<2>
Low Sub-Partition
A<3>
A<4>
A<5>
A<2>
Hi Sub-Partition
A<3>
A<4>
A<5>
A<6>
A<7>
A<8>
A<9>
A<10
A<11>
BA0
BA1
BA2
FBVDDQ
R564
634
R1
1%
0402
COMMON
R565
1.3K
COMMON
R11
T11
R10
T10
N11
M11
L10
M10
N10
P10
P11
L3
M2
M3
N2
T3
R2
T2
R3
N3
P3
P2
0402
1%
GND
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
C580
.1UF
R2
16V
10%
X7R
0402
COMMON
COMMON
COMMON
R540
80.6
0402
121
0402
COMMON
FBVDDQ
1%
1%
FBA_CLK0_TERM
4<> 3>
C540 R547 R548
.01UF
6.3V
10%
X5R
0402
COMMON
GND
FBA_CMD<26..0>
Low Sub-Partition
121
1%
0402
COMMON
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
7
18
15
FBA_CMD<1>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<8>
CS0
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<22>
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<9>
FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<7>
FBA_CMD<18>
FBA_CLK0
FBA_CLK0*
FBA_CMD<15>
SNN_FBA0_NC1
SNN_FBA0_NC2
A-CS0-LOW-32bit
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
GND
V9
Page4: FrameBuffer - Partition A 16Mx32 BGA136 GDDR3
NO STUFF
4< 3>
4< 3>
A9
A4
ZQ = 6x desired output
DDR3:
Impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
DDR3: CKE DETERMINES THE ODT VALUE FOR CMD PINS
CKE = 0 --> ODT = ZQ/2
CKE = 1 --> ODT = ZQ
FBVDDQ
4<>
4<>
4<>
4<>
R559
10K
5%
0402
COMMON
GND
3<>
3<>
3<>
3>
GND
C538
.047UF
16V
10%
X7R
COMMON
R555
10K
5%
0402
COMMON
FBA_ZQ0
R557
243
1%
0402
COMMON
GND
K12
C581
.047UF
16V
10%
X7R
0402 0402
COMMON
J12
FBAD<63..0>
FBADQM<7..0>
FBADQS_RN<7..0>
FBADQS_WP<7..0>
K1
J1
DDR3:
FBADQM<0>
0
FBADQM<1>
1
FBADQM<2>
2
FBADQM<3>
3
FBADQM<4>
4
FBADQM<5>
5
FBADQM<6>
6
FBADQM<7>
7
FBADQS_RN<0>
0
FBADQS_RN<1>
1
FBADQS_RN<2>
2
FBADQS_RN<3>
3
FBADQS_RN<4>
4
FBADQS_RN<5>
5
FBADQS_RN<6>
6
FBADQS_RN<7>
7
FBADQS_WP<0>
0
FBADQS_WP<1>
1
FBADQS_WP<2>
2
FBADQS_WP<3>
3
FBADQS_WP<4>
4
FBADQS_WP<5>
5
FBADQS_WP<6>
6
FBADQS_WP<7>
7
FBVDDQ
R562
80.6
1%
0402
4<
3>
3>
4<
R41
634
0402
R42
1.3K
0402
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
NO STUFF
COMMON
FBVDDQ
1%
GND
FBA_CLK1_TERM
121
1%
0402
ZQ = 6x desired output
DDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
R1
C41
.1UF
R2
16V 1%
10%
X7R
0402
COMMON
FBAD<8>
FBAD<9>
FBAD<10>
FBAD<11>
FBAD<12>
FBAD<13>
FBAD<14>
FBAD<15>
FBADQS_RN<1>
FBADQS_WP<1>
FBAD<40>
FBAD<41>
FBAD<42> F10
FBAD<43>
FBAD<44>
FBAD<45>
FBAD<46>
FBAD<47>
FBADQM<5>
FBADQS_RN<5>
FBADQS_WP<5>
B10
G10
E11
F11
C10
C11
B11
E10
D10
D11
GND
T3
R2
R3
T2
M2
N2
L3
M3
N3FBADQM<1>
P3
P2
FBA_CMD<26..0>
Hi Sub-Partition
C570 R563
.01UF
6.3V
10%
X5R
0402
COMMON
FBVDDQ
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
R561
121
1%
0402
COMMON
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
7
CS0
8
18
10
5
13
21
20
19
25
4
9
17
6
23
16
3
12
1
11
15
FBVDDQ
C582
.047UF
16V
10%
X7R
0402
COMMON
GND
FBAD<16>
FBAD<17>
FBAD<18>
FBAD<19>
FBAD<20>
FBAD<21>
FBAD<22>
FBAD<23>
FBADQM<2>
FBADQS_RN<2>
FBADQS_WP<2>
FBAD<48>
FBAD<49>
FBAD<50>
FBAD<51>
FBAD<52>
FBAD<53>
FBAD<54>
FBAD<55>
FBADQM<6>
FBADQS_RN<6>
FBADQS_WP<6>
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<18>
FBA_CMD<10>
FBA_CMD<5>
FBA_CMD<13>
FBA_CMD<21>
FBA_CMD<20>
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<4>
FBA_CMD<9>
FBA_CMD<17>
FBA_CMD<6>
FBA_CMD<23>
FBA_CMD<16>
FBA_CMD<3>
FBA_CMD<12>
FBA_CMD<1>
FBA_CMD<11>
FBA_CLK1
FBA_CLK1*
SNN_FBA1_NC1
SNN_FBA1_NC2
FBA_CMD<15>
FBA_ZQ1
R550
243
1%
0402
COMMON
GND
R10
M11
R11
T11
N11
T10
M10
L10
N10
P10
P11
B2
E2
C2
B3
C3
F3
G3
F2
E3
D3
D2
C42
.047UF
16V
10%
X7R
0402
COMMON
A-CS0-HI-32bit
M4
DDR3BGA136
VERSION=BGA136
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
GND
V9
A9
A4
K1
K12
J1
J12
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
PACK_TYPE=BGA136
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
FBAD<24>
FBAD<25>
FBAD<26>
FBAD<27>
FBAD<28>
FBAD<29>
FBAD<30>
FBAD<31>
FBADQM<3>
FBADQS_RN<3>
FBADQS_WP<3>
FBAD<56>
FBAD<57>
FBAD<58>
FBAD<59>
FBAD<60>
FBAD<61>
FBAD<62>
FBAD<63>
FBADQM<7>
FBADQS_RN<7>
FBADQS_WP<7>
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
F11
F10
B11
B10
C11
E11
G10
C10
E10
D10
D11
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
GND
FBA_VREF2
FBA_VREF3
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQ DDR3:
1.33V = 2.0V * 1.3K/(634 + 1.3K)
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M4
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
B3
F3
C2
C3
F2
E2
B2
G3
E3
D3
D2
R44
634
0402
COMMON
R43
1.3K
0402
COMMON
FBVDDQ
1%
1%
GND
NET
3> 4<
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBAD<63..0>
FBADQM<7..0>
FBADQS_RN<7..0>
FBADQS_WP<7..0>
FBA_CMD<26..0>
FBA_VREF0
FBA_VREF1
FBA_VREF2
FBA_VREF3
4< 3>
4< 3>
4< 3>
3<>
4<>
3>
4<>
3<>
4<>
3<>
4<>
3>
4<
NET
FBA_VDDA0
FBA_VDDA1
FBA_VDDA2
FBA_VDDA3
DIFFPAIR
FBA_CLK0 80DIFF
MIN_LINE_WIDTH
12MIL
12MIL
12MIL
12MIL
MIN_LINE_WIDTH
12MIL 2.1V
12MIL
12MIL
NV_IMPEDANCE
80DIFFFBA_CLK0
80DIFFFBA_CLK1
80DIFFFBA_CLK1
40OHM
40OHM
40OHM
40OHM
40OHM
VOLTAGE
2.1V
2.1V
2.1V 12MIL
NV_CRITICAL_NET
1
1
1
1
1
1
1
1
1
NV_NET_MAX_CURRENT
0.020A
0.020A
0.020A
0.020A
R1
C43
.1UF
16V
R2
10%
X7R
0402
COMMON
FBVDDQ
R568
634
1%
0402
COMMON
R567
1.3K
1%
0402
COMMON
GND
FBA_CMD<26..0>
R1
C578
.1UF
R2
16V
10%
X7R
0402
COMMON
Termination for Sub-Partition and CLK
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
FBA_CMD<2>
2
0
24
22
13
4
5
6
FBA_CMD<0>
FBA_CMD<24>
FBA_CMD<22>
FBA_CMD<13>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
5%
5%
5%
5%
5%
5%
5%
5%
R546
0402
R553
0402
R558
0402
R554
0402
R549
0402
R552
0402
R551
0402
R556
0402
FBVDDQ
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
FrameBuffer - Partition A 16Mx32 BGA136 GDDR3
www.vinafix.vn
600-10401-0000-200 B
p401_a02
APATEL
4 OF 22
16-JAN-2007
Page 5
Page5: FrameBuffer - GPU Partition A Decaps
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
Decoupling for FBA 32..0
FBVDDQ
PLACE NEAR MEMORY FBVDD PINS
C562
.1UF
16V
10%
X7R
0402
COMMON
C573
.01UF
16V
10%
X7R
0402
COMMON
C552
.01UF
25V
10%
X7R
0402
COMMON
C544
4.7UF 4.7UF 4.7UF 4.7UF
6.3V
10%
X5R
0603
COMMON
C543
.1UF
16V
10%
X7R
0402 0402 0402
COMMON
C572
.01UF
25V
10%
X7R
0402
COMMON
C574
.01UF
25V
10%
X7R
0402
COMMON
C569
6.3V
10%
X5R
0603
COMMON COMMON
C550
.1UF
16V
10%
X7R
COMMON
C555
.01UF
25V
10%
X7R
0402
COMMON
C563
6.3V
10%
X5R
0603
C579
.1UF
16V
10%
X7R
COMMON
C545
.01UF
25V
10%
X7R
0402
COMMON
C564
6.3V
10%
X5R
0603
COMMON
C554
.1UF
16V
10%
X7R
0402
COMMON
C548
4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF
6.3V
10%
X5R
0603
COMMON COMMON
C566
6.3V
10%
X5R
0603
GND
Decoupling for FBA 63..32
FBVDDQ
PLACE NEAR MEMORY FBVDD PINS
C549
.1UF
16V
10%
X7R
0402
COMMON
C577
.01UF
16V
10%
X7R
0402
COMMON
C559
.01UF
25V
10%
X7R
0402
COMMON
C560
6.3V
10%
X5R
0603
COMMON
C568
.1UF
16V
10%
X7R
COMMON
C547
.01UF
25V
10%
X7R
0402
COMMON
C571
.01UF
25V
10%
X7R
0402
COMMON
C553
6.3V
10%
X5R
0603
COMMON
C556
.1UF
16V
10%
X7R
COMMON
C542
.01UF
25V
10%
X7R
0402
COMMON
C567
6.3V
10%
X5R
0603
COMMON COMMON
C546
.1UF
16V
10%
X7R
0402 0402 0402
COMMON
C576
.01UF
25V
10%
X7R
0402
COMMON
C584
6.3V
10%
X5R
0603
C575
.1UF
16V
10%
X7R
0402
COMMON
C561
6.3V
10%
X5R
0603
COMMON
C551
6.3V
10%
X5R
0603
COMMON
GND
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
FrameBuffer - Partition A Decaps
www.vinafix.vn
600-10401-0000-200 B
p401_a02
APATEL
5 OF 22
16-JAN-2007
Page 6
Page6: FrameBuffer - GPU Partition C and FBVDDQ Decaps
3/14 FBC
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBC_CMD0
FBC_CMD4
FBC_CMD3
FBC_CMD2
FBC_CMD1
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_PLLAVDD
FBC_PLLVDD
FBC_DEBUG
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBC_CLK0
FBC_CMD28
FBC_CMD27
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBC_PLLGND
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63
FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7
FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7
FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN7
FBCDQS_RN6
FBCDQS_RN5
FB_VREF2
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
NET
FBC_PLLVDD
FBC_PLLAVDD
FBC_VREF
12MIL
12MIL 2.1V
12MIL
2.1V
NV_NET_MAX_CURRENT VOLTAGE MIN_LINE_WIDTH
0.120A
0.120A
G1
G84-400-A1
BGA820
COMMON
3
AA23
AB23
H16
H17
J10
J23
J24
J9
K11
K12
K21
K22
K24
K9
L23
M23
T25
U25
C13
A16
A13
B17
B20
A19
B19
E16
A14
C15
B16
F17
C19
SNN_FBC_CMD<14>
D15
C17
A17
C16
D14
F16
C14
C18
E14
B13
E15
F15
A20
C20
E13
F13
F18
E17
F12
G8
G10
G9
K26
H26
J26
SNN_FBVTT_AA23
SNN_FBVTT_AB23
SNN_FBVTT_H16
SNN_FBVTT_H17
SNN_FBVTT_J10
SNN_FBVTT_J23
SNN_FBVTT_J24
SNN_FBVTT_J9
SNN_FBVTT_K11
SNN_FBVTT_K12
SNN_FBVTT_K21
SNN_FBVTT_K22
SNN_FBVTT_K24
SNN_FBVTT_K9
SNN_FBVTT_L23
SNN_FBVTT_M23
SNN_FBVTT_T25
SNN_FBVTT_U25
FBC_CMD<0>
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
FBC_CMD<7>B14
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
SNN_FBC_CMD<26>
SNN_FBC_CMD<27>
SNN_FBC_CMD<28>A15
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DEBUG
SNN_FBC_PLLVDD
FBC_PLLAVDD
GND
FBCAL_PD
FBCAL_PU
FBCAL_TERM
FBC_CMD<26..0>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
17
18
19
20
21
22
23
24
25
TP101
7<
7<
7<
7<
7<> 7<
PLACE close to balls
C717
.01UF
16V 16V 6.3V
10%
X7R
0402
COMMON
R600
0402
R601
0402
R599
0402
FBVDDQ
60.4
COMMON
1%
40.2
COMMON
1%
40.2
2
1
COMMON
1%
GND GND
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
FrameBuffer - GPU Partition C and FBVDDQ Decaps
www.vinafix.vn
C716
.1UF
10%
X7R
0402
COMMON
C715
1UF
10%
X5R
0402
COMMON
NO STUFF
634
1%
0402
R592
NO STUFF
1.3K
1%
0402
R591
FBCD<63..0>
FBCDQM<7..0>
FBCDQS_WP<7..0>
FBCDQS_RN<7..0>
C617
.1UF
16V
10%
X7R
0402
NO STUFF
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBCD<0>
FBCD<1>
FBCD<2>
FBCD<3>
FBCD<4>
FBCD<5>
FBCD<6>
FBCD<7>
FBCD<8>
FBCD<9>
FBCD<10>
FBCD<11>
FBCD<12>
FBCD<13>
FBCD<14>
FBCD<15>
FBCD<16>
FBCD<17>
FBCD<18>
FBCD<19>
FBCD<20>
FBCD<21>
FBCD<22>
FBCD<23>
FBCD<24>
FBCD<25>
FBCD<26>
FBCD<27>
FBCD<28>
FBCD<29>
FBCD<30>
FBCD<31>
FBCD<32>
FBCD<33>
FBCD<34>
FBCD<35>
FBCD<36>
FBCD<37>
FBCD<38>
FBCD<39> A31
FBCD<40>
FBCD<41>
FBCD<42>
FBCD<43>
FBCD<44>
FBCD<45>
FBCD<46>
FBCD<47>
FBCD<48>
FBCD<49>
FBCD<50>
FBCD<51>
FBCD<52>
FBCD<53>
FBCD<54>
FBCD<55>
FBCD<56>
FBCD<57>
FBCD<58>
FBCD<59>
FBCD<60>
FBCD<61>
FBCD<62>
FBCD<63>
FBCDQM<0>
FBCDQM<1>
FBCDQM<2>
FBCDQM<3>
FBCDQM<4>
FBCDQM<5>
FBCDQM<6>
FBCDQM<7>
FBCDQS_WP<0>
FBCDQS_WP<1>
FBCDQS_WP<2>
FBCDQS_WP<3>
FBCDQS_WP<4> A29
FBCDQS_WP<5>
FBCDQS_WP<6>
FBCDQS_WP<7>
FBCDQS_RN<0>
FBCDQS_RN<1>
FBCDQS_RN<2>
FBCDQS_RN<3>
FBCDQS_RN<4>
FBCDQS_RN<6>
FBCDQS_RN<7>
FBC_VREF A28
DDR3:
B7
A7
C7
A2
B2
C4
A5
B5
F9
F10
D12
D9
E12
D11
E8
D8
E7
F7
D6
D5
D3
E4
C3
B4
C10
B10
C8
A10
C11
C12
A11
B11
B28
C27
C26
B26
C30
B31
C29
D28
D27
F26
D24
E23
E26
E24
F23
B23
A23
C25
C23
A22
C22
C21
B22
E22
D22
D21
E21
E18
D19
D18
E19
A4
E11
F5
C9
C28
F24
C24
E20
C5
E10
E5
B8
D25
B25
F20
C6
E9
E6
A8
B29
E25FBCDQS_RN<5>
A25
F21
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
VREF = 0.70 * FBVDDQ
1.33V = 1.9V * 1.3K/(549 + 1.3K)
7<>
7<>
7<>
7<>
FBVDDQ
Rtop
Rbot
GND
240R@100MHz
LB503
PEXVDD
COMMON BEAD_0402
C719
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
600-10401-0000-200 B
p401_a02
APATEL
6 OF 22
16-JAN-2007
Page 7
Page7: FrameBuffer - Partion C 16Mx32 BGA136 GDD3
ININININBIBIBIBIBIBIBIBIBIBIBIBIBI
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
MIRROR
*CS1 is required 32Mx32 Memories
NONMIRROR
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
CKE
BA2
CAS
WE
CS0
RAS
BA0
BA1
A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4
NC/CS1
RAS
CAS
CS0
A0
WE
A5
A4
A3
A2
A1
A8/AP
A10
A11
BA0
BA1
A7
A6
A9
BA2
NC/CS1
CKE
CLK
CLK
NC/RFU
SEN (GND)
MIRROR
RESET
ZQ
VDDA
VDDA
VSSA
VSSA
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
7<
DDR3:
DDR3: CKE DETERMINES THE ODT VALUE FOR CMD PINS
FBVDDQ
R622
80.6
1%
0402
NO STUFF
121
1%
0402
COMMON
6>
6> 7<
ZQ = 6x desired output
Impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
CKE = 0 --> ODT = ZQ/2
CKE = 1 --> ODT = ZQ
7<> 6>
FBC_CLK0_TERM
GND
FBC_CMD<26..0>
Low Sub-Partition
C771 R619 R626
.01UF
6.3V
10%
X5R
0402
COMMON
121
1%
0402
COMMON
FBVDDQ
7<>
7<>
7<>
7<>
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
7
18
15
R603
10K
5%
0402
COMMON
GND
6<>
6>
6<>
6<>
C754
.047UF
16V
10%
X7R
0402
COMMON
FBC_CMD<1>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<8>
CS0
FBC_CMD<19>
FBC_CMD<25>
FBC_CMD<22>
FBC_CMD<24>
FBC_CMD<0>
FBC_CMD<2>
FBC_CMD<21>
FBC_CMD<16>
FBC_CMD<23>
FBC_CMD<20> V1 M9
FBC_CMD<17>
FBC_CMD<9>
FBC_CMD<12>
FBC_CMD<3>
FBC_CMD<7>
FBC_CMD<18>
FBC_CLK0
FBC_CLK0*
SNN_FBC0_NC1
SNN_FBC0_NC2
FBC_CMD<15>
R602
10K
5%
0402
COMMON
GND
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
GND
V9
A9
FBC_ZQ0
A4
R635
243
1%
0402
COMMON
GND
K1
K12
C758
.047UF
16V
10%
X7R
0402
COMMON
J1
J12
FBCD<63..0>
FBCDQM<7..0>
FBCDQS_RN<7..0>
FBCDQS_WP<7..0>
A-CS0-LOW-32bit
M1
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
FBCDQM<0>
0
FBCDQM<1>
1
FBCDQM<2>
2
FBCDQM<3>
3
FBCDQM<4>
4
FBCDQM<5>
5
FBCDQM<6>
6
FBCDQM<7>
7
FBCDQS_RN<0>
0
FBCDQS_RN<1>
1
FBCDQS_RN<2>
2
FBCDQS_RN<3>
3
FBCDQS_RN<4>
4
FBCDQS_RN<5>
5
FBCDQS_RN<6>
6
FBCDQS_RN<7>
7
FBCDQS_WP<0>
0
FBCDQS_WP<1>
1
FBCDQS_WP<2>
2
FBCDQS_WP<3>
3
FBCDQS_WP<4>
4
FBCDQS_WP<5>
5
FBCDQS_WP<6>
6
FBCDQS_WP<7>
7
FBA Partition
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
DDR3:
136BGA CMD Mapping
CMD
CMD1
CMD10
CMD11
CMD18
CMD15
CMD8
CMD19
CMD25
CMD22
CMD24
CMD0
CMD2
CMD4
CMD6
CMD5
CMD13
CMD21
CMD16
CMD23
CMD17
CMD9
CMD12
CMD3
CMD7
GND
FBC_VREF0
FBC_VREF1
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQ
1.33V = 2.0V * 1.3K/(634 + 1.3K)
FBCD<0>
0
FBCD<1>
1
FBCD<2>
2
FBCD<3>
3
FBCD<4>
4
FBCD<5>
5
FBCD<6>
6
FBCD<7>
7
FBCDQM<0>
FBCDQS_RN<0>
FBCDQS_WP<0>
FBCD<32>
32
FBCD<33>
33
FBCD<34>
34
FBCD<35>
35
FBCD<36>
36
FBCD<37>
37
FBCD<38>
38
FBCD<39>
39
FBCDQM<4>
FBCDQS_RN<4>
FBCDQS_WP<4>
ADDR
RAS*
CAS*
WE*
CKE
RESET
CS0*
A<0>
A<1>
A<2>
A<3>
A<4>
A<5>
A<2>
A<3>
A<4>
A<5>
A<6>
A<7>
A<8>
A<9> CMD20
A<10
A<11>
BA0
BA1
BA2
R631
COMMON
R627
1.3K
COMMON
B2
C2
E2
F2
G3
F3
C3
B3
E3
D3
D2
E11
F11
F10
G10
B11
C10
C11
B10
E10
D10
D11
634
0402
0402
FBVDDQ
1%
1%
Low Sub-Partition
Hi Sub-Partition
R1
R2
GND
M1
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M2
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
C766
.1UF
16V
10%
X7R
0402
COMMON
7<
6>
6> 7<
COMMON
1.3K
COMMON
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
R597
80.6
NO STUFF
R596
COMMON
FBVDDQ
R36
634
1%
0402
R37
1%
0402
GND
FBCD<8>
FBCD<9>
FBCD<10>
FBCD<11>
FBCD<12>
FBCD<13>
FBCD<14>
FBCD<15>
FBCDQM<1>
FBCDQS_RN<1>
FBCDQS_WP<1>
FBCD<40>
FBCD<41>
FBCD<42>
FBCD<43>
FBCD<44>
FBCD<45>
FBCD<46>
FBCD<47>
FBCDQM<5>
FBCDQS_RN<5>
FBCDQS_WP<5>
FBVDDQ
1%
0402
FBC_CLK1_TERM
121
1%
0402
ZQ = 6x desired output
DDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
R1
C36
.1UF
R2
16V
10%
X7R
0402
COMMON
M11
T10
R11
N11
T11
R10
L10
M10
N10
P10
P11
Hi Sub-Partition
C629
.01UF
6.3V
10%
X5R
0402
COMMON
GND
M1
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M2
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
E2
B2
B3
F3
F2
C3
C2
G3
E3
D3
D2
FBC_CMD<26..0>
R595
121
1%
0402
COMMON
FBVDDQ
FBVDDQ
16
17
18
19
20
21
22
23
FBCDQM<2>
FBCDQS_RN<2>
FBCDQS_WP<2>
48
49
50
51
52
53
54
55
FBCDQM<6>
FBCDQS_RN<6>
FBCDQS_WP<6>
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
FrameBuffer - Partition C 16MX32 BGA136 GDDR3
FBC_CMD<7>
7
FBC_CMD<8>
CS0
8
FBC_CMD<18>
18
FBC_CMD<10>
10
FBC_CMD<5>
5
FBC_CMD<13>
13
FBC_CMD<21>
21
FBC_CMD<20>
20
FBC_CMD<19>
19
FBC_CMD<25>
25
FBC_CMD<4>
4
FBC_CMD<9>
9
17
FBC_CMD<6> M9
6
FBC_CMD<23>
23
FBC_CMD<16>
16
FBC_CMD<3>
3
FBC_CMD<12>
12
FBC_CMD<1>
1
FBC_CMD<11>
11
FBC_CLK1
FBC_CLK1*
SNN_FBC1_NC1
SNN_FBC1_NC2
FBC_CMD<15>
15
FBC_ZQ1
R584
243
1%
0402
COMMON
GND
C618
.047UF
16V
10%
X7R
0402
COMMON
GND
FBCD<17>
FBCD<18>
FBCD<19>
FBCD<20>
FBCD<21>
FBCD<22>
FBCD<23>
FBCD<48>
FBCD<49>
FBCD<50>
FBCD<51>
FBCD<52>
FBCD<53>
FBCD<54>
FBCD<55>
www.vinafix.vn
T10
T11
M11
R11
N11
R10
L10
M10
N10
P10
P11
B10FBCD<16>
G10
F11
F10
C11
E11
B11
C10
E10
D10
D11
C37
.047UF
16V
10%
X7R
0402
COMMON
A-CS0-HI-32bit
M2
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11FBC_CMD<17>
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
GND
V9
A9
A4
K1
K12
J1
J12
M1
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M2
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
24
25
26
27
28
29
30
31
FBCDQM<3>
FBCDQS_RN<3>
FBCDQS_WP<3>
56
57
58
59
60
61
62
63
FBCD<24>
FBCD<25>
FBCD<26>
FBCD<27>
FBCD<28>
FBCD<29>
FBCD<30>
FBCD<31>
FBCD<56>
FBCD<57>
FBCD<58>
FBCD<59>
FBCD<60>
FBCD<61>
FBCD<62>
FBCD<63>
FBCDQM<7>
FBCDQS_RN<7>
FBCDQS_WP<7>
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
M2
N2
L3
M3
R2
R3
T2
T3
N3
P3
P2
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
GND
FBC_VREF2
FBC_VREF3
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQ DDR3:
1.33V = 2.0V * 1.3K/(634 + 1.3K)
M1
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
M2
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
N2
M2
L3
M3
R2
R3
T2
T3
N3
P3
P2
R40
634
0402
COMMON
R39
1.3K
0402
COMMON
FBVDDQ
1%
1%
GND
NET
7< 6>
7< 6>
7< 6>
6> 7<
6<>
7<>
6>
7<>
6<>
7<>
6<>
7<>
6> 7<
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBCD<63..0>
FBCDQM<7..0>
FBCDQS_RN<7..0>
FBCDQS_WP<7..0>
FBC_CMD<26..0>
FBC_VREF0
FBC_VREF1
FBC_VREF2
FBC_VREF3
NET
FBC_VDDA0
FBC_VDDA1
FBC_VDDA2
FBC_VDDA3
DIFFPAIR
FBC_CLK0 80DIFF
FBC_CLK0 80DIFF
FBC_CLK1 80DIFF
MIN_LINE_WIDTH
12MIL
12MIL
12MIL
12MIL
MIN_LINE_WIDTH
12MIL
12MIL
NV_IMPEDANCE
80DIFFFBC_CLK1
40OHM
40OHM
40OHM
40OHM
40OHM
VOLTAGE
2.1V 12MIL
2.1V
2.1V
2.1V 12MIL
NV_CRITICAL_NET
1
1
1
1
1
1
1
1
1
NV_NET_MAX_CURRENT
0.020A
0.020A
0.020A
0.020A
R1
C38
.1UF
16V
R2
10%
X7R
0402
COMMON
FBVDDQ
R588
634
1%
0402
COMMON
R587
1.3K
1%
0402
COMMON
GND
FBC_CMD<26..0>
R1
C612
.1UF
R2
16V
10%
X7R
0402
COMMON
Termination for Sub-Partition and CLK
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
FBC_CMD<2>
2
FBC_CMD<0>
0
FBC_CMD<24>
24
FBC_CMD<22>
22
FBC_CMD<13>
13
FBC_CMD<4>
4
FBC_CMD<5>
5
FBC_CMD<6>
6
120 R623
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
120
COMMON
FBVDDQ
0402
5%
R620
0402
5%
R611
0402
5%
R615
0402
5%
R590
0402
5%
R589
0402
5%
R593
0402
5%
R594
0402
5%
600-10401-0000-200 B
p401_a02
APATEL
7 OF 22
16-JAN-2007
Page 8
Page8: FrameBuffer - Partion C Decaps
14/14 _GND_
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
Decoupling for FBC 32..0
FBVDDQ
PLACE NEAR MEMORY FBVDD PINS
C742
.1UF
16V
10%
X7R
0402
COMMON
C726
.01UF
16V
10%
X7R
0402
COMMON
C781
.01UF
25V
10%
X7R
0402
COMMON
C796
4.7UF
6.3V
10%
X5R
0603
COMMON
C730
.1UF
16V
10%
X7R
0402
COMMON
C740
.01UF
25V
10%
X7R
0402
COMMON
C779
.01UF
25V
10%
X7R
0402
COMMON
C795
4.7UF
6.3V
10%
X5R
0603
COMMON
C787
.1UF
16V
10%
X7R
0402
COMMON
C790
.01UF
25V
10%
X7R
0402
COMMON
C708
4.7UF
6.3V
10%
X5R
0603
COMMON
C789
.1UF
16V
10%
X7R
0402
COMMON
C744
.01UF
25V
10%
X7R
0402
COMMON
C712
4.7UF
6.3V
10%
X5R
0603
COMMON
C734
.1UF
16V
10%
X7R
0402
COMMON
C780
4.7UF
6.3V
10%
X5R
0603
COMMON
C759
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
Decoupling for FBC 63..32
FBVDDQ
PLACE NEAR MEMORY FBVDD PINS
C620
.1UF
16V
10%
X7R
0402
COMMON
C601
.01UF
16V
10%
X7R
0402
COMMON
C632
.01UF
25V
10%
X7R
0402
COMMON
C638
4.7UF
6.3V
10%
X5R
COMMON
C590
.1UF
16V
10%
X7R
0402
COMMON
C589
.01UF
25V
10%
X7R
0402
COMMON
C592
.01UF
25V
10%
X7R
0402
COMMON
C660
4.7UF
6.3V
10%
X5R
0603 0603
COMMON
C637
.1UF
16V
10%
X7R
0402
COMMON
C602
.01UF
25V
10%
X7R
0402
COMMON
C587
4.7UF
6.3V
10%
X5R
0603
COMMON
C593
.1UF
16V
10%
COMMON
C623
.01UF
25V
10%
X7R
0402
COMMON
C588
4.7UF
6.3V
10%
X5R
0603
COMMON
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
FrameBuffer - Partition C Decaps
C626
.1UF
16V
10%
X7R X7R
0402 0402
COMMON
C591
4.7UF
6.3V
10%
X5R
0603
COMMON
www.vinafix.vn
C604
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
GND
AA12
AA2
AA21
AA31
AB27
AB6
AC10
AC23
AC29
AC4
AD16
AD17
AD2
AD31
AE17
AE27
AE6
AF11
AF26
AF29
AF4
AF7
AG10
AG11
AG14
AG15
AG19
AG2
AG22
AG31
AG8
AH24
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ26
AJ29
AJ4
AJ7
AK2
AK28
AK31
AL11
AL14
AL19
AL22
AL25
AL3
AL6
AL9
AM13
AM16
AM17
AM20
AM23
AM26
AM29
B12
B15
B18
B21
B24
B27
B30
C31
D10
D13
D16
D17
D20
D23
D26
D29
F11
F14
F19
F22
F25
F31
G26
G29
H27
J16
J17
J31
B3
B6
B9
C2
D4
D7
F2
F8
G4
G7
H6
J2
14
G1
G84-400-A1
BGA820
COMMON
600-10401-0000-200 B
p401_a02
APATEL
K10
K23
K29
K4
L27
L6
M12
M2
M31
N15
N18
N29
N4
P15
P18
P27
P6
R13
R14
R15
R18
R19
R2
R20
R31
T16
T17
T24
T29
T4
U16
U17
U24
U29
U8
V13
V14
V15
V18
V19
V2
V20
V31
W15
W18
W27
W6
Y15
Y18
Y29
Y4
AL10
AM10
AG13
GND
8 OF 22
16-JAN-2007
Page 9
Page9: DACA Interface
11
15
10
6
1
5
SDA
ID0
SCL
VSYNC
HSYNC
GND_B
GND-R
SHIELD
GND-G
R
G
SHIELD
GND
GND
B
5V
ID2
4/14 DACA
DACA_VSYNC
DACA_HSYNC
I2CA_SDA
I2CA_SCL
DACA_IDUMP
DACA_BLUE
DACA_GREEN
DACA_RED
DACA_RSET
DACA_VREF
DACA_VDD
ININININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
5V
L507
C879
0
CHANGED
0603
.1UF
16V 0603
10%
X7R
NO STUFF
DACA RGB-FILTER
I2CA_SDA_T
33
R693
COMMON
0402
5%
I2CA_PU_5V
I2CA_SCL_T
33 R691
COMMON
0402
5%
13
12
10
9
DACA_RED
DACA_GREEN
DACA_BLUE
5V
14
U510
74ACT08
DACA_VS_BUF
11
74ACT_SO
COMMON
7
5V
14
7
PLACE NEAR SYNC BUFFER
U510
74ACT08
DACA_HS_BUF
8
74ACT_SO
COMMON
R6
150
1%
0402
COMMON
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
DACA Interface
AD10
AH10
AH9
NV_NET_MAX_CURRENT VOLTAGE
TMDS_PLLVDD_REG
G1
G84-400-A1
BGA820
COMMON
4
Route DAC RGB with ~37.5ohm Impedence
0.100A 3.3V
MIN_LINE_WIDTH IMPEDANCE
19> 19< 10< 15<
I2CA_SCL
K2
I2CA_SDA
J3
DACA_HSYNC
AF10
DACA_VSYNC
AK10
AH11
AJ12
AH12
AG9
GND
R606
150
1%
0402
COMMON
R604
150
1%
0402
COMMON
R605
150
1%
0402
COMMON
www.vinafix.vn
10%
220R@100MHz
NO STUFF
DACA_VDD
DACA_VREF
DACA_RSET
R608
124
1%
0402
COMMON
GND
PEX3V3
LB508
180R@100MHz
COMMON BEAD_0603
C711
470PF
X7R
0402
COMMON
C773
4.7UF
6.3V
X5R
0603
COMMON
LB504
BEAD_0402
C718
.1UF
10V
10%
10% 50V
X5R
0402
COMMON
C723
4700PF
25V
10%
X7R
0402
COMMON
GND
MIN_LINE_WIDTHNET
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_PU_5V
12MIL
12MIL
12MIL
12MIL
5V
NV_CRITICAL_NET NET
DACA_RED
DACA_GREEN
DACA_BLUE
9> 11<
9> 11<
9> 11<
11< 9>
11< 9>
9> 11<
9> 11<
DACA_RED_C
DACA_GREEN_C
DACA_BLUE_C
DACA_HSYNC
DACA_HS_BUF
DACA_HS_BUF_R
DACA_HS_DVI
DACA_VSYNC
DACA_VS_BUF
DACA_VS_BUF_R
DACA_VS_DVI
I2CA_SDA
I2CA_SDA_T
I2CA_SDA_C
I2CA_SCL
I2CA_SCL_T
I2CA_SCL_C
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
R7
150
1%
0402
COMMON
R8
150
1%
0402
COMMON
R698
2.2K
5%
0402
COMMON
R695
2.2K
5%
0402
COMMON
DACA_VS_BUF_R
33
R699
COMMON
0402
5%
5V
33
COMMON
3
DACA_HS_BUF_R
3
C13
22PF
50V
5%
C0G
0402
COMMON
C14
22PF
50V
5%
C0G
0402
COMMON
C12
22PF
50V
5%
C0G
0402
COMMON
C862
.1UF
16V
10%
X5R
0402
COMMON
R694
0402
5%
LB522
LB523
0603
L510
5V
2
D521
BAV99
SOT23
100V
100MA
COMMON
1
L511
5V
2
D522
BAV99
SOT23
100V
100MA
COMMON
1
27nH
L5
COMMON
0603
27nH
L6
COMMON 0603
L4
COMMON
0603
27nH
COMMON 0603
COMMON
COMMON 0603
COMMON 0603
27nH
27nH
27nH
27nH
C6
10PF
50V
5%
C0G
0402
COMMON
C7
10PF
50V
5%
C0G
0402
COMMON
C5
10PF
50V
5%
C0G
0402
COMMON
C882
22PF
50V
5%
C0G
0402
COMMON
C887
22PF
50V
5%
C0G
0402
COMMON
C885
15PF
50V
5%
C0G
0603
COMMON
C886
15PF
50V
5%
C0G
0603
COMMON
DACA_GREEN_C
DACA_BLUE_C
DACA_RED_C
9<> 9>
I2CA_SDA_C
9<> 9>
I2CA_SCL_C
9> 9<>
DACA_VS_DVI
9<> 9>
DACA_HS_DVI
11<
9> 11<
11< 9>
SNN_A_MON_ID2
9<> 11<
11< 9<>
11< 9<>
11< 9<>
11< 9<> 11< 9>
11< 9<> 9>
11< 9<>
DDC_5V
SOUTH
J2
CON_DSUB15HD
VGA_SLIM
16
6
1
7
2
8
3
9
4
10
5
NO STUFF
11
12
13
14
15
SNN_A_MON_ID0
I2CA_SDA_C
DACA_HS_DVI
DACA_VS_DVI
I2CA_SCL_C
17
FOR ESD DIODES
5V
C873
4.7UF
6.3V
10%
X5R
0603
COMMON
Place in output filter section!
600-10401-0000-200 B
p401_a02
APATEL
9 OF 22
16-JAN-2007
Page 10
Page10: DACC Interface
11
15
10
6
1
5
SDA
ID0
SCL
VSYNC
HSYNC
GND_B
GND-R
SHIELD
GND-G
R
G
SHIELD
GND
GND
B
5V
ID2
6/14 DACC
DACC_VSYNC
DACC_HSYNC
I2CB_SDA
I2CB_SCL
DACC_IDUMP
DACC_BLUE
DACC_GREEN
DACC_RED
DACC_RSET
DACC_VREF
DACC_VDD
INININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
5V
0603
C880
0603
0
CHANGED
.1UF
16V
10%
X7R
NO STUFF
R692
0402
R701
0402
I2CB_SDA_T
33
COMMON
5%
I2CB_PU_5V
I2CB_SCL_T
33
COMMON
5%
R696
2.2K
5%
0402
COMMON
R700
2.2K
5%
0402
COMMON
L506
5V
14
4
5
U510
74ACT08
DACC_VS_BUF
6
74ACT_SO
COMMON
7
R682
0402
5%
33
COMMON
DACC_VS_BUF_R
5V
2
3
1
5V
14
U510
74ACT08
DACC_HS_BUF
3
74ACT_SO
COMMON
7
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
DACC Interface
R5
150
1%
0402
COMMON
R3
150
1%
0402
COMMON
R687
0402
R4
150
1%
0402
COMMON
5%
33
COMMON
DACC_HS_BUF_R
DACC_RED
R614
150
1%
0402
COMMON
1
2
G1
G84-400-A1
BGA820
COMMON
TMDS_PLLVDD_REG220R@100MHz
6
NV_NET_MAX_CURRENT
0.100A 3.3V
MIN_LINE_WIDTH IMPEDANCE
19> 19< 15< 9<
I2CB_SCL
H4
I2CB_SDA
J4
DACC_HSYNC
AG7
DACC_VSYNC
AG5
DACC_RED
AF6
DACC_GREEN
AG6
DACC_BLUE
AE5
AG4
GND
DACC_GREEN
R618
150
1%
0402
COMMON
R630
150
1%
0402
COMMON
DACC_BLUE
www.vinafix.vn
LB506
NO STUFF BEAD_0402
PEX3V3
R621
124
1%
0402
COMMON
AD7
AH4
AF5
GND
VOLTAGE
C765
.1UF
16V
10%
X5R
0402
COMMON
C772
4700PF 4.7UF
25V
X7R
0402
COMMON
DACC_VDD
DACC_VREF
DACC_RSET
10%
LB509
180R@100MHz
COMMON BEAD_0603
C750
470PF
50V
X7R
0402
COMMON
C783
6.3V
X5R
0603
COMMON
10%
10%
GND
MIN_LINE_WIDTHNET
DACC_VDD
DACC_VREF
DACC_RSET
12MIL
12MIL
12MIL
NV_CRITICAL_NET NET
DACC_RED
DACC_GREEN
DACC_BLUE
10> 12<
10>
12<
10> 12<
12< 10>
10> 12<
12< 10>
10> 12<
DACC_RED_C
DACC_GREEN_C
DACC_BLUE_C
DACC_HSYNC
DACC_HS_BUF
DACC_HS_BUF_R
DACC_HS_DVI
DACC_VSYNC
DACC_VS_BUF
DACC_VS_BUF_R
DACC_VS_DVI
I2CB_SDA
I2CB_SDA_T
I2CB_SDA_C
I2CB_SCL
I2CB_SCL_T
I2CB_SCL_C
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
3
C10
22PF
50V
5%
C0G
0402
COMMON
C11
22PF
50V
5%
C0G
0402
COMMON
C9
22PF
50V
5%
C0G
0402
COMMON
5V
2
1
L2
L3
L1
D518
BAV99
SOT23
100V
100mA
COMMON
D519
BAV99
SOT23
100V
100mA
COMMON
0603
0603
GND
GND
LB521
LB524
L508
L509
COMMON
GND
COMMON
COMMON 0603
27nH
27nH
27nH
DACC RGB-FILTER
10<> 12<
27nH
COMMON 0603
27nH
COMMON 0603
27nH
COMMON 0603
27nH
COMMON 0603
C2
10PF
50V
5%
C0G
0402
COMMON
C3
10PF
50V
5%
C0G
0402
COMMON
C1
10PF
50V
5%
C0G
0402
COMMON
C881
22PF
50V
5%
C0G
0402
COMMON
C888
22PF
50V
5%
C0G
0402
COMMON
C883
15PF
50V
5%
C0G
0603
COMMON
C884
15PF
50V
5%
C0G
0603
COMMON
DACC_RED_C
DACC_GREEN_C
DACC_BLUE_C
I2CB_SDA_C
10<> 12<
I2CB_SCL_C
10<> 12<
DACC_VS_DVI
10<> 12<
DACC_HS_DVI
12<
10<>
12<
10<>
12<
10<>
SNN_C_MON_ID2
MIDDLE
DDC_5V
J1
CON_DSUB15HD
VGA_SLIM
16
6
1
7
2
8
3
9
4
10
5
17
GND
FOR ESD DIODES
Place in output filter section!
NO STUFF
5V
C872
4.7UF
6.3V
10%
X5R
0603
COMMON
600-10401-0000-200 B
p401_a02
APATEL
SNN_C_MON_ID0
11
12
13
14
15
10 OF 22
16-JAN-2007
Page 11
Page11: IFP A/B Interface
1 9 17
8 16 24
C1
C5A
C2
C3
C5
C4
SHIELD3
SHIELD4
SHIELD1
SHIELD6
SHLD05
SHLD24
SHLD13
SHIELD5
SHIELD2
TX0-
TX2-
TX1+
TX1-
TX0+
TX2+
TX3ÂTX3+
TX4-
TX5ÂTX5+
TX4+
DDCC
GND
VDDC
SHLDC
TXC-
DDCD
HPD
R
VSYNC
TXC+
G
AGND2
AGND1
B
HSYNC
7/14 IFPAB
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
IFPAB_PLLGND
IFPAB_PLLVDD
IFPAB_RSET
IFPAB_VPROBE
IFPB_IOVDD
IFPA_IOVDD
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
IFPAB_PLLVDD
IFPAB_IOVDD
IFPAB_RSET
MIN_LINE_WIDTHNET
12MIL 0.035A 1.8V
12MIL
12MIL
VOLTAGE NV_NET_MAX_CURRENT
3.3V 0.145A
DDC_5V
C4
4700PF
25V
GND
I2CA_SCL_C
I2CA_SDA_C
DACA_VS_DVI
DVI_A_HPD_C
DACA_RED_C
DACA_GREEN_C
DACA_BLUE_C
DACA_HS_DVI
10%
X7R
0402
COMMON
C5A
25
26
29
17
18
9
10
1
2
3
11
19
12
13
4
5
20
21
6
7
14
15
22
24
23
8
16
C1
C2
C3
C5
J5
DVI-I
DVI_I_(SLIM_)SHLD
DVI_I
CHANGED
C4
30
27
28
7
G1
G84-400-A1
BGA820
COMMON
AJ9
AK9
AJ6
AH6
AH7
AH8
AK8
AJ8
AH5
AJ5
AK4
AM5
AM6
AL7
AM7
AK5
AK6
AL8
AK7
ATXC*
ATXC
ATXD0*
ATXD0
ATXD1*
ATXD1
ATXD2*
ATXD2
SNN_ATXD3*
SNN_ATXD3
SNN_BTXC*AL4
SNN_BTXC
BTXD4*
BTXD4
BTXD5*
BTXD5
BTXD6*
BTXD6
SNN_BTXD7*
SNN_BTXD7
C804
470PF
50V
10%
X7R
0402
COMMON
SNN_VPROBEAB
IFPAB_RSET
C774
470PF
50V
10%
X7R
0402
COMMON
TMDS_PLLVDD
C732
1000PF
16V
10%
X7R
0402
COMMON
IFPAB_PLLVDD
IFPAB_IOVDD
C731
4700PF
25V
10%
X7R
0402
COMMON
C784
4.7UF
6.3V
10%
X5R X7R
0603
COMMON
C767
4700PF
25V
10%
0402
COMMON
C770
4.7UF
6.3V
10%
X5R
0603
COMMON
LB507
180R@100MHz
COMMON BEAD_0603
COMMON BEAD_0603
C803
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
180R@100MHz
LB516
C805
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
TMDS_IOVDD
R612
1K
1%
0402
COMMON
AM4
AL5
AC9
AD9
AF9
AF8
GND
C753
4700PF
25V
10%
X7R
0402
COMMON
C739
470PF
50V
10%
X7R
0402
COMMON
GND
ATXC
ATXC
ATXD0
ATXD0
ATXD1
ATXD1
ATXD2
ATXD2
BTXD4
BTXD4
BTXD5
BTXD5
BTXD6
BTXD6
1
1
1
1
1
1
1
1
1
1
1
1
1
NV_IMPEDANCE NV_CRITICAL_NET DIFF PAIR NAME NETNAME
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF 1
100DIFF
9<>
9<>
9<>
9<>
9<>
9<>
9<> 9>
9>
9>
9>
9>
9>
9>
GND
Hotplug Detection
PEX3V3
17<
GPIO0_DVI_A_HPD
R703
10K
0402
COMMON
5%
3
R704
2
D520
BAV99
SOT23
100V
100MA
COMMON
1
DVI_A_HPD_R
1K
COMMON 0402
5%
GND
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
IFP A/B Interface
www.vinafix.vn
LB526
180R@100MHz
COMMON BEAD_0603
GND
C890
220PF
50V
5%
C0G
0402
COMMON
GND
600-10401-0000-200 B
p401_a02
APATEL
11 OF 22
16-JAN-2007
Page 12
Page12: IFP C/D Interface
1 9 17
8 16 24
C1
C5A
C2
C3
C5
C4
SHIELD3
SHIELD4
SHIELD1
SHIELD6
SHLD05
SHLD24
SHLD13
SHIELD5
SHIELD2
TX0-
TX2-
TX1+
TX1-
TX0+
TX2+
TX3ÂTX3+
TX4-
TX5ÂTX5+
TX4+
DDCC
GND
VDDC
SHLDC
TXC-
DDCD
HPD
R
VSYNC
TXC+
G
AGND2
AGND1
B
HSYNC
8/14 IFPCD
IFPC_TXC
IFPC_TXC
IFPC_TXD0
IFPC_TXD2
IFPC_TXD2
IFPC_TXD1
IFPC_TXD1
IFPC_TXD0
IFPD_TXC
IFPD_TXC
IFPD_TXD4
IFPD_TXD6
IFPD_TXD6
IFPD_TXD5
IFPD_TXD5
IFPD_TXD4
IFPCD_PLLGND
IFPCD_PLLVDD
IFPCD_RSET
IFPCD_VPROBE
IFPD_IOVDD
IFPC_IOVDD
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
IFPCD_PLLVDD
IFPCD_IOVDD
IFPCD_RSET
MIN_LINE_WIDTHNET
12MIL
12MIL
12MIL
VOLTAGE NV_NET_MAX_CURRENT
1.8V
3.3V
0.035A
0.145A
DDC_5V
8
G1
G84-400-A1
BGA820
COMMON
AM3
AM2
AE2
AF2
AF1
AH1
AG1
CTXC*
CTXC
CTXD0*AE1
CTXD0
CTXD1*
CTXD1
CTXD2*
CTXD2
R634
1K
1%
0402
COMMON
AK3
AH3
AA10
AB10
IFPCD_PLLVDD
SNN_VPROBECD
C721
470PF
50V
10%
X7R
0402
COMMON
IFPCD_RSET
TMDS_PLLVDD
C801
4.7UF
6.3V
10%
X5R
0603
COMMON
LB511
180R@100MHz
COMMON BEAD_0603
C786
4.7UF
6.3V
10%
X5R
0603
COMMON
C748
4700PF
25V
10%
X7R
0402
COMMON
CTXC
CTXC
CTXD0
CTXD0
CTXD1
CTXD1
CTXD2
CTXD2
1
1
1
1
1
1
1
GND
180R@100MHz
COMMON
GND
C743
4700PF
25V
10%
X7R
0402
COMMON
C793
4.7UF
6.3V
10%
X5R
COMMON
IFPCD_IOVDD
C763
4700PF
25V
10%
X7R
0402 0603
COMMON
C737
470PF
50V
10%
X7R
0402
COMMON
GND
C749
470PF
50V
10%
X7R
0402
COMMON
AD6
AE7
TMDS_IOVDD
LB514
BEAD_0603
C797
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
AG3
AJ1
AK1
AL1
AL2
AJ3
AJ2
SNN_DTXC*AH2
SNN_DTXC
DTXD4*
DTXD4
DTXD5*
DTXD5
DTXD6*
DTXD6
DTXD4
DTXD4
DTXD5
DTXD5
DTXD6
DTXD6
1
1
1
1
1
NV_IMPEDANCE NV_CRITICAL_NET DIFF PAIR NAME NETNAME
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF 1
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF 1
100DIFF
100DIFF
10<>
10<>
10<>
10<>
10<>
10<>
10<>
10>
10>
10>
10>
10>
10>
10>
GND
I2CB_SCL_C
I2CB_SDA_C
DACC_VS_DVI
DVI_C_HPD_C
DACC_RED_C
DACC_GREEN_C
DACC_BLUE_C
DACC_HS_DVI
C8
4700PF
25V
10%
X7R
0402
COMMON
C5A
25
26
29
17
18
9
10
1
2
3
11
19
12
13
4
5
20
21
6
7
14
15
22
24
23
8
16
C1
C2
C3
C5
J4
DVI-I
DVI_I_(SLIM_)SHLD
DVI_I
CHANGED
C4
30
27
28
GND
Hotplug Detection
17<
GPIO1_DVI_C_HPD
R697
10K
0402
COMMON
5%
www.vinafix.vn
PEX3V3
DVI_C_HPD_R
1K
R702
COMMON
0402
2
D517
BAV99
3
SOT23
100V
100MA
COMMON
1
5%
GND
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
IFP C/D Interface
LB525
180R@100MHz
COMMON BEAD_0603
GND
C889
220PF
50V
5%
C0G
0402
COMMON
GND
600-10401-0000-200 B
p401_a02
APATEL
12 OF 22
16-JAN-2007
Page 13
Page13: MIOA & MIOB Interface and SLI Connector
BIBIBIBIBIBIININININININBI
SLI - G80/NVIO
GND
GND
GND
GND
GND
GND
RASTER_SYNC
DR<0>
DR<9>
DR<8>
DR<2>
DR<1>
DR<3>
DR<5>
DR<4>
DR<6>
DR<7>
DR<10>
DR_CLK
DR_CMD
DR<14>
DR<13>
DR<12>
DR<11>
SWAP_RDY
EXT_REFCLK
MIO
DR
12/14 DRB/MIOB
MIOBD3
MIOBD1
MIOBD2
MIOBD0
MIOBD4
MIOBD7
MIOBD6
MIOBD5
MIOBD11
MIOBD10
MIOBD9
MIOBD8
RFU
RFU
DRB_D0
DRB_D7
DRB_D6
DRB_D2
DRB_D1
DRB_D8
DRB_D9
DRB_D10
DRB_D11
DRB_D5
DRB_D4
DRB_D3
RFU
RFU
RFU
RFU
RFU
RFU
MIOB_CTL3
MIOB_DE
MIOB_HSYNC
MIOB_VSYNC
MIOB_CLKOUT
MIOB_CLKIN
MIOB_CLKOUT
DRB_D13
DRB_D12
DRB_D14
DRB_CMD
DRB_CLK
NC
DR_REFCLK
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VREF
MIO DR
11/14 DRA/MIOA
MIOAD1
MIOAD3
MIOAD0
MIOAD2
MIOAD4
MIOAD10
MIOAD9
MIOAD11
MIOAD8
MIOAD7
MIOAD6
MIOAD5 DRA_D5
DRA_D2
DRA_D0
DRA_D3
DRA_D6
DRA_D7
DRA_D8
DRA_D1
DRA_D4
DRA_D10
DRA_D9
DRA_D11
MIOA_CTL3
RFU
MIOA_DE
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_VSYNC
MIOA_HSYNC
NC
DRA_CLK
DRA_CMD
DRA_D14
DRA_D12
DRA_D13
MIOACAL_PU_GND
MIOACAL_PD_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VREF
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
14<>
13<>
18>
13<> 14>
MIOBD<7..0>
VIPPCLK
2
2
50OHM
50OHM
NV_CRITICAL_NET NET
MIN_LINE_WIDTH IMPEDANCE
13<>
18>
G3 VIP/MIOB
PEX3V3
LB515
180R@100MHz
COMMON
BEAD_0603
C794
4.7UF
6.3V
10%
X5R
0603
PLACE CAPS CLOSE TO GPU PINS
C752
.1UF
16V
10%
X7R
0402
COMMON COMMON
C733
100PF
50V
5%
C0G
0402
COMMON
GND
GND
R31
49.9
1%
0402
COMMON
R26
49.9
1%
0402
COMMON
MIOB_VDDQ
R27
1K
1%
0402
COMMON
R32
1K
1%
0402
COMMON
GND
MIOB_VDDQ
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VREF
C34
.1UF
16V
10%
X7R
0402
COMMON
AA8
AB7
AB8
AC6
AC7
Y1
Y3
Y2
12
G1
G84-400-A1
BGA820
COMMON
AC3
MIOBD<0>
AC1
MIOBD<1>
AC2
MIOBD<2>
AB2
MIOBD<3>
AB1
MIOBD<4>
AA1
MIOBD<5>
AB3
MIOBD<6>
AA3
MIOBD<7>
AC5
MIOBD<8>
AB5
MIOBD<9>
AB4
SNN_MIOBD<10>
AA5
MIOBD<11>
W3
SNN_MIOBD<12>
V1
SNN_MIOBD<13>
Y5
SNN_MIOBD<14>
W1
SNN_MIOBD<15>
W4
SNN_VIPHAD<4>
W5
SNN_VIPHAD<5>
V5
SNN_VIPHAD<6>
Y6
SNN_VIPHAD<7>
AD3
MIOB_CTL3
AF3
SNN_MIOB_HSYNC
AE3
VIPPCLK
AD1
SNN_MIOB_DE
AD4
SNN_MIOB_CLKOUT
AD5
SNN_MIOB_CLKOUT*
AE4
SLI_EXT_REFCLK
0
1
2
3
4
5
6
7
8
9
11
MIOBD<11..0>
STRAP ONLY
18>
13<> 14>
18> 14<> 13<>
MIOB_VDDQ
MIOA_VDDQ
SLI_D<14..0>
SLI_DR_CMD
SLI_DR_CLK
SLI_EXT_REFCLK
NET
MIOB_VDDQ
MIOB_VREF
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOA_VDDQ
MIOA_VREF
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
2
2 50OHM
2
2
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
50OHM
50OHM
50OHM
VOLTAGE MIN_LINE_WIDTH
3.3V
3.3V
2.5V
2.5V
NV_NET_MAX_CURRENT
0.100A
0.100A
G3 MIOA
MIOA_2V5
LB512
180R@100MHz
COMMON
BEAD_0603
C791
4.7UF
6.3V
10%
X5R
0603
COMMON
C775
.1UF
16V
10%
X7R
0402
COMMON
C788
100PF
50V
5%
C0G
0402
COMMON
C782
100PF
50V
5%
C0G
0402
COMMON
GND
C769
1000PF
16V
10%
X7R
0402
COMMON
R33
49.9
1%
0402
COMMON
R28
49.9
1%
0402
COMMON
C720
1000PF
16V
10%
X7R
COMMON
PLACE CAPS & RES CLOSE TO GPU PINS
MIOA_VDDQ
R34
1K
1%
0402
COMMON
R35
1K
1%
0402
COMMON
GND
MIOA_VDDQ
C736
1000PF
16V
10%
X7R
0402 0402
COMMON
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
C35
.1UF
16V
10%
X7R
0402
COMMON
11
M7
M8
R8
T8
U9
L1
L3
L2MIOA_VREF
G1
G84-400-A1
BGA820
COMMON
P2
N2
N1
N3
M1
M3
P5
N6
N5
M4
L4
L5
P3
R3
R1
P1
R4
P4
M5
SLI_D<0>
SLI_D<1>
SLI_D<2>
SLI_D<3>
SLI_D<4>
SLI_D<5>
SLI_D<6>
SLI_D<7>
SLI_D<8>
SLI_D<9>
SLI_D<10>
SLI_D<11>
SLI_D<12>
SLI_D<13>
SLI_D<14>
SLI_DR_CMD
SLI_DR_CLK
SNN_MIOA_CLKOUT*
SNN_RFU_M5
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
MIOA & MIOB and SLI Connector
www.vinafix.vn
17<>
17>
SLI_D<14..0>
0
SLI_D<0>
1
SLI_D<1>
2
SLI_D<2>
3
SLI_D<3>
4
SLI_D<4>
5
SLI_D<5>
6
SLI_D<6>
7
SLI_D<7>
8
SLI_D<8>
9
SLI_D<9>
10
SLI_D<10>
11
SLI_D<11>
12
SLI_D<12>
13
SLI_D<13>
14
SLI_D<14>
GPIO11_SLI_SYNC0
SWAPRDY_A
SLI_EXT_REFCLK
CN1
CON_MIO_26_EDGE
NONPHY
COMMON
A2
B4
A4
A5
B6
A6
A8
B9
B10
A10
B12
A12
A13
B5
A9
B13
B8
A1
B1
B2
SLI Connector
18>
13<>
B3
B7
B11
A3
A7
A11
GND
600-10401-0000-200 B
p401_a02
APATEL
13 OF 22
16-JAN-2007
Page 14
Page14: Video Capture (Phillips 7115)
X-Port
VDD
D-GND
7114H,7115HL (QFP100)
Video In
I-Port
AGND
VSSA0
VSSA1
VSSA2
VDDA1
VDDA2
VDDA0
TDO
TMS
TRST
TDI
TCK
TEST5
TEST4
TEST0
TEST3
TEST2
TEST1
RTCO
XPD0
RTS1
LLC2
RTS0
LLC
XPD1
XPD5
XPD4
XPD3
XPD2
XPD6
XCLK
XPD7
XDQ
XRH
XTRI
XRV
XRDY
VDD_XTAL
VDDDE1
VDDDE2
VDDDI1
VDDDI2
VDDDI3
VDDDI4
VDDDI5
VDDDI6
VDDDE4
VDDDE3
VSS_XTAL
VSSDE1
VSSDE2
VSSDE3
VSSDI1
VSSDE4
VSSDI2
VSSDI3
AI1D
AI21
AI12
AOUT
AI11
AI22
ASCLK
AMCLK
AI24
AI23
AI2D
ALRCLK
SCL
RES (CE)
SDA
XTALI
XTALO
XTOUT
AMXCLK
RES_OUT
IPD4
IPD3
IPD2
IPD1
IPD0
IPD5
IPD6
IPD7
HPD1
HPD0
HPD6
HPD5
HPD4
HPD3
HPD2
IDQ
ICLK
HPD7
IGPH
ITRI
ITRDY
IGPV
IGP0
IGP1
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
7115_VDD
7115_VDD
7115_VDDA
7115_VDDE
7115_VDDX
NV_NET_MAX_CURRENT VOLTAGE
MIN_LINE_WIDTHNET
18MIL
16MIL
16MIL
16MIL
3.3V
3.3V
3.3V
3.3V
0.300A
0.090A
0.080A
0.010A
U509
SAA7115HL
15_QFP100
NO STUFF
SNN_7115_AOUT
.047UF
15>
15<>
To 4/5/12-Pin Tuner/Video header
15>
15<>
MINIDIN_Y_CVBSin
MINIDIN_Cin
C830
0402
C835
0402
16V
10%
X7R
NO STUFF
.047UF
16V
10%
X7R
NO STUFF
C833
.047UF
16V
10%
X7R
0402
C836
.047UF
16V
10%
X7R
0402
NO STUFF NO STUFF
C840
.047UF
16V
10%
X7R
0402
NO STUFF
7115_VDD
Y501
CER_SMD
C856
22PF
50V
5%
C0G
0402
NO STUFF
C24
.047UF
16V
10%
X7R
0402
XTAL_6X24500143
24.576MHZ
+/-30PPM
NO STUFF
C843
.047UF
16V
10%
X7R
0402
NO STUFF NO STUFF
PEX12V_IN
12VDROP_2
R525
1210
R518
1210
R511
1210
5%
5%
5%
3.6
NO STUFF
3.6
NO STUFF
3.6
NO STUFF
17<>
15<>
15<
17<
17>
13<>
18>
13<>
I2CC_SDA
I2CC_SCL
RESET_BUF*
MIOBD<7..0>
VIPPCLK
7115_VDD REGULATOR
12VDROP_1
C508
.1UF
16V
10%
X7R
0402
NO STUFF
3
GND
12VDROP_3
C510
10UF
16V
10%
X5R
1206
NO STUFF
GND
R650
0402
U3
AZ1117T-3.3
FIX3.3V
GOI,IGOI,TO263
TO263
NO STUFF
1
GND
5%
0
NO STUFF
2
4
GND
C51
.1UF
16V
10%
X7R
0402
NO STUFF
Stuff Pull-Up for 7115
Stuff 0ohm for 7114
C530
47UF
6.3V
20%
X5R
1206
NO STUFF
GND
GND
R655
0402
PEX3V3
C529
47UF
6.3V
20%
X5R
1206
NO STUFF
5%
LB4
180R@100MHz
NO STUFF
BEAD_0603
R656
10K
5%
0402
NO STUFF
0
NO STUFF
4.7K R651
NO STUFF
0402
5%
SAA7115 RESET (100US DELAY)
7115_VDD
C813
.047UF
16V
10%
X7R
0402
NO STUFF
7115_A11
7115_A12
7115_A1D
7115_A21
7115_A22
7115_A23
7115_A24
7115_A2D
C22
.047UF
16V
10%
X7R
SNN_7115_ALRCLK
0402
NO STUFF
SNN_7115_ASCLK 39
SNN_7115_24576
7115Xout
7115Xin
C850
22PF
50V
5%
C0G
0402
NO STUFF
RESET_7114
SNN_7115_RESOUT
MIOBD<0>
0
MIOBD<1>
1
MIOBD<2>
2
MIOBD<3>
3
MIOBD<4>
4
MIOBD<5>
5
MIOBD<6>
6
MIOBD<7>
7
SNN_7115_HPD0
SNN_7115_HPD1
SNN_7115_HPD2
SNN_7115_HPD3
SNN_7115_HPD4
SNN_7115_HPD5
SNN_7115_HPD6 65
SNN_7115_HPD7
VIPPCLK_R
SNN_7115_IDQ
SNN_7115_IGPH
SNN_7115_IGPV
SNN_7115_ITRDY
RESET_7115
SNN_7115_IGP0
SNN_7115_IGP1
www.vinafix.vn
22
20
18
19
16
14
12
10
13
37SNN_7115_AMCLK
40
41
4
6
7
32
31
27
30
62
61
60
59
57
56
55
54
72
71
70
69
67
66
64
45
46
53
52
42
47
48
49
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
Video Capture (Philips 7115)
23
17
11
21
24
15
9
2
99
3
97
98
44
73
74
77
78
79
36
34
35
28
29
90
89
87
86
85
84
82
81
94
95
92
91
96
80
8
1
25
51
75
33
43
58
68
83
93
5
26
50
76
100
38
63
88
SNN_7115_TDO
SNN_7115_TMS
SNN_7115_TDI
7115_TRST*
7115_TCK
SNN_7115_TEST0
SNN_7115_TEST1
SNN_7115_TEST2
SNN_7115_TEST3
SNN_7115_TEST4
SNN_7115_TEST5
7115_RTCO
SNN_7115_RTS0
SNN_7115_RTS1
SNN_7115_LLC
SNN_7115_LLC2
SNN_7115_XPD0
SNN_7115_XPD1
SNN_7115_XPD2
SNN_7115_XPD3
SNN_7115_XPD4
SNN_7115_XPD5
SNN_7115_XPD6
SNN_7115_XPD7
SNN_7115_XCLK
SNN_7115_XDQ
SNN_7115_XRH
SNN_7115_XRV
SNN_7115_XRDY
SNN_7115_XTRI
7115_VDDA
C834
2200PF
50V
10%
X7R
0402
NO STUFF
R681
0402
R680
0402
R657
1K
5%
0402
NO STUFF
C828
2200PF
50V
10%
X7R
0402
NO STUFF
5%
5%
1K
NO STUFF
1K
NO STUFF
C841
2200PF
50V
10%
X7R
0402
NO STUFF
JTAG disabled
C827
.1UF
16V
10%
X7R
0402
NO STUFF
SAA 7115
I2C ADDRESS 0X42
C846 C845
2200PF
50V
10%
X7R
0402
NO STUFF
C860
2200PF
50V
10%
X7R
0402
NO STUFF
C824
2200PF
50V
10%
X7R
0402
NO STUFF
2200PF
50V
10%
X7R
0402
NO STUFF
C815
2200PF
50V
10%
X7R
0402
NO STUFF
C816
2200PF
50V
10%
X7R
0402
NO STUFF
7115_VDDX
7115_VDDE
C847
2200PF
50V
10%
X7R
0402
NO STUFF
C822
2200PF
50V
10%
X7R
0402
NO STUFF
C857
2200PF
50V
10%
X7R
0402
NO STUFF
C853
2200PF
50V
10%
X7R
0402
NO STUFF
C821
4.7UF
6.3V
10%
X5R
0603
NO STUFF
C831
2200PF
50V
10%
X7R
0402
NO STUFF
C852
2200PF
50V
10%
X7R
0402
NO STUFF
LB518
C859
.1UF
16V
10%
X7R
0402
NO STUFF
C855
.1UF
16V
10%
X7R
0402
NO STUFF
600R@100MHZ
NO STUFF BEAD_0603
C819
.1UF
16V
10%
X7R
0402
NO STUFF
C854
.1UF
16V
10%
X7R
0402
NO STUFF
7115_VDD
C820
4.7UF
6.3V
10%
X5R
0603
NO STUFF
LB519
C838
4.7UF
6.3V
10%
X5R
0603
NO STUFF
LB520
C858
4.7UF
6.3V
10%
X5R
0603
NO STUFF
C817
.1UF
16V
10%
X7R
0402
NO STUFF
NO STUFF BEAD_0603
600R@100MHZ
NO STUFF BEAD_0603
600-10401-0000-200 B
p401_a02
APATEL
600R@100MHZ
C848
4.7UF
6.3V
10%
X5R
0603
NO STUFF
C851
4.7UF
6.3V
10%
X5R
0603
NO STUFF
7115_VDD
14 OF 22
16-JAN-2007
Page 15
Page15: DACB, TV-Out, and Stereo Interface
out
in
out
out
in
5V+
Y/CVBS
SDA
C
GND
C/Pr
Pb out
SCL
GND
Y/CVBS
5/14 DACB(TV)
DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
DACB_RSET
DACB_VREF
DACB_VDD
OUTINININOUTBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
STEREO GLASSES BUFFER
Place close to MiniDIN connector!
5V
0
NO STUFF
R10
10K
5%
0402
NO STUFF
STEREO_5V
17>
STEREO
0402
R1
5%
FOR DEBUG PURPOSES ONLY .. DEFAULT IS NO STUFF
For STEREO GLASSES 3pin MiniDIN only:
Stuff bead!
And replace 0 Ohm resistor with 220PF cap!
C866
0603
LB505
BEAD_0402
220R@100MHz
NO STUFF
PEX3V3
R607
124
1%
0402
COMMON
DACB_VDD
DACB_RSET
LB510
BEAD_0603
180R@100MHz
COMMON
GND
C785
4.7UF
6.3V
X5R
0603
COMMON
C778
4700PF
10%
25V
X7R
0402
COMMON
C761
470PF
50V
10%
X7R
0402
COMMON
C760
.1UF
16V
10%
10%
X5R
0402
COMMON
NET
DACB_VDD
DACB_VREF
DACB_RSET
MIN_LINE_WIDTH
12MIL
12MIL
12MIL
NET
DACB_C_OUT
DACB_CVBS_OUT
DACB_PB_OUT 1
MDIN_PBOUT_C
MDIN_COUT_C
MDIN_YOUT_C
15> 14<
15> 14<
MINIDIN_Y_CVBSIN
MDIN_YIN_C
MDIN_YIN_CLAMP
MDIN_CIN_C
MINIDIN_CIN
MDIN_CIN_CLAMP
1
1
1
1
1
1
1
1
1
1
1
VOLTAGE
3.3V 0.200A
IMPEDANCENV_CRITICAL_NET
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
NV_NET_MAX_CURRENT
TMDS_PLLVDD_REG
V8
R5DACB_VREF
R7
MIN_LINE_WIDTH
G1
G84-400-A1
BGA820
COMMON
5
19> 9< 10< 19<
R689
150
1%
0402
COMMON
R688
150
1%
0402
COMMON
U5
R6
T5
T6
SNN_DACB_CSYNC
DACB_C_OUT
DACB_CVBS_OUT
DACB_PB_OUT
DACB_C_OUT
R609
150
1%
0402
COMMON
R610
150
1%
0402
COMMON
V7
L504
C861
82PF
50V
5%
C0G
0402
COMMON
L501
C863
82PF
50V
5%
C0G
0402
COMMON
0603
0603
0603
C871
GND
15<>
14<
MINIDIN_Y_CVBSIN
R686
0402
R684
56
5%
0402
NO STUFF
5%
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
DACB, TV-Out, and Stereo Interface
18
NO STUFF
MDIN_YIN_CLAMP
PEX3V3
2
D515
BAV99
3
SOT23
100V
100MA
NO STUFF
1
L503
C865
330PF
50V
5%
C0G
0402
NO STUFF
www.vinafix.vn
0603
0603
8.2PF
50V
+/-0.5PF
NPO
COMMON
0.56uH
COMMON
8.2PF C869
50V
+/-0.5PF
NPO
COMMON
0.56uH
COMMON
22PF
50V
5%
C0G
NO STUFF
NO STUFF
5V
1.8uH
C20
.1UF
16V
10%
X7R
0402
NO STUFF
1
2
MDIN_PBOUT_C
MDIN_COUT_C
MDIN_YIN_C
5V
5
3
C874
82PF
50V
5%
C0G
0402
COMMON
C875
82PF
50V
5%
C0G
0402
COMMON
C877
270PF
50V
5%
C0G
0402
NO STUFF
U1
SN74LVC1G08
STEREO_BUF
4
SC70-5
NO STUFF
MINIDIN_GND1
keep stub short
MDIN_SCL_C_STEREO
7
9
8
5
1
R2
0
5%
0603
COMMON
DDC_5V
LB3
BEAD_0402
240R@100MHz
R11
0402
C15
220PF
50V
5%
C0G
0402
COMMON
J3
CON_MINIDIN_7
7P_SCART_IN
CHANGED
R12
0402
5%
NO STUFF
33
NO STUFF
5%
LB1
C18
1UF
10V
10%
X5R
0603
COMMON
13 12 11
0
NO STUFF
SCL_C_STEREO
180R@100MHz
COMMON BEAD_0603
DDC_5V
MDIN_SDA_C
10
C16
220PF
50V
5%
C0G
0402
COMMON
LB2
BEAD_0603
C867
0603
4
MDIN_YOUT_C
6
3
2
MINIDIN_GND2
MDIN_CIN_C
L505
C878
82PF
50V
5%
C0G
0402
COMMON
L502
C876
270PF
50V
5%
C0G
0402
NO STUFF
0603
C870
0603
0603
keep stub short from the pin
C17
0
10V
5%
X5R
0603
CHANGED
SCL_C_STEREO
180R@100MHz
COMMON
8.2PF
50V
+/-0.5PF
NPO
COMMON
0.56uH
COMMON
22PF
50V
5%
C0G
NO STUFF
1.8uH
NO STUFF
C868
82PF
50V
5%
C0G
0402
COMMON
C864
330PF
50V
5%
C0G
0402
NO STUFF
I2CC_SCL
0
R9
COMMON
0402
5%
I2CC_SDA
3
600-10401-0000-200 B
p401_a02
APATEL
R690
150
1%
0402
COMMON
PEX3V3
2
1
R685MDIN_CIN_CLAMP
D516
BAV99
SOT23
100V
100MA
NO STUFF
DACB_CVBS_OUT
0402
5%
18
NO STUFF
17< 14<
17<> 14<>
R613
150
1%
0402
COMMON
MINIDIN_CIN
R683
56
5%
0402
NO STUFF
15 OF 22
16-JAN-2007
14<
15<>
Page 16
Page16: XTAL/PLLVDD and SPDIF Connector
13/14 XTAL_PLL
XTALOUTBUFF
XTALOUT
PLLGND
VID_PLLVDD
PLLAVDD
XTALIN
XTALSSIN
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
NET
PLLAVDD
MIN_LINE_WIDTH
12MIL
VOLTAGE
NV_NET_MAX_CURRENT
0.140A 1.2V
NET
SPDIFIN
SPDIFIN_C
SPDIFIN_C2
SPDIFIN_COMP
SPDIFIN_COMP_R
SPDIFIN_COMP_R1
SPDIFIN_C3
SPDIFIN_COMP2
SPDIFIN_COMP2_Q
F_SPDIFIN
XTALIN
XTALOUT
XTALSSIN
XTALOUTBUFF
3
PEX3V3
2
1
D1
BAV99
SOT23
100V
100MA
NO STUFF
2<
IMPEDANCE
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
75OHM
50OHM
50OHM
50OHM
50OHM
NV_CRITICAL_NET
1
1
1
1
1
1
1
1
1
1
1
1
1
1
MIN_LINE_WIDTH
GND
.01UF
R639
76.8
1%
0402
NO STUFF
C30
0402
16V
10%
X7R
NO STUFF
F_SPDIFIN
2< 16<
1
0
GND
8
4
1%
2
GND
U503
AZ358
SO8
NO STUFF
7
7.15K
NO STUFF
SPDIFIN
SPDIFIN_COMP2
GND
PEX3V3
C1000
.01UF
16V
10%
X7R
0402
NO STUFF
R638
10K
5%
0402
NO STUFF
1G1D1S
1
SPDIFIN_COMP2_Q
3
Q516
RHK003N06
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.3A@25C
R_DS_ON=1.5R
MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C
V_BE_GS=+/-20V
R25
76.8
1%
0402
NO STUFF
GND
GND
J8
HDR_1X2
R629
7.15K
1%
0402
NO STUFF
SPDIFIN_C3
R624
1K
1%
0402
NO STUFF
MALE
2.54MM
NORM
NO STUFF
R637
0402
PEX3V3
6
5
SPDIF IN
7.15K
SPDIFIN_C2
R625
0402
2
3
PEX3V3
GND
1%
8
4
NO STUFF
U503
AZ358
SO8
NO STUFF
1
SPDIFIN_COMP
PEX3V3
R19
7.15K
1%
0402
NO STUFF
R617
1K
1%
0402
NO STUFF
GND
.01UF
C806
16V
0402
10%
X7R
NO STUFF
GND
R20
1K
1%
0402
NO STUFF
SPDIFIN_C
SOT23
R616
0402
31
1%
1N4148D513
NO STUFF
7.15K
NO STUFF
GND
SPDIFIN_COMP_R
C762
.01UF
16V
10%
X7R
0402
NO STUFF
PEX3V3
GND
SPDIFIN_COMP_R11K R636
NO STUFF 0402
1%
XTAL/PLLVDD
PEXVDD
C802
LB513
4.7UF
10% 6.3V
0603
COMMON
X5R
GND
240R@100MHz
COMMON BEAD_0402
C777
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C729
.1UF
X7R
0402
COMMON
C776
4700PF
10% 16V
X7R
0402
COMMON
10% 25V
PLLAVDD
GND
13
XTALSSIN
R30
10K
5%
0402
COMMON
G1
G84-400-A1
BGA820
COMMON
T9
T10
U10
GND
T1
U1
XTAL_4PIN_TXC
27 MHZ
XTALIN
C32
18PF
50V
5%
C0G
0402
COMMON
GND
Y1
H10SSMD
10 PPM 85C
COMMON
XTALOUT
T2
U2
XTALOUTBUFF
C33
18PF
50V
5%
C0G
0402
COMMON
GND
R29
330
5%
0402
COMMON
GND
www.vinafix.vn
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
XTAL/PLLVDD and SPDIF Connector
600-10401-0000-200 B
p401_a02
APATEL
16 OF 22
16-JAN-2007
Page 17
Page17: GPIO, JTAG, BIOS ROM, HDCP ROM, and 2-pin/4-pin Fan Control
VCC
GND
HOLD
WP
CS
SI
SCK
SO
VDD
THERM
ALERT
GND
D+
D-
SDA
SCL
VCC
VCC
GND
GND
SCL
SDA
NC
SDA
9/14 MISC1
CLAMP
GPIO1
GPIO0
I2CC_SDA
I2CC_SCL
I2CS_SDA
I2CS_SCL
GPIO2
GPIO9
GPIO8
GPIO7
GPIO3
GPIO4
GPIO5
GPIO6
GPIO13
GPIO12
DRA_SYNC/GPIO11
GPIO10
DRB_SYNC/GPIO14
JTAG_TCK
THERMALSENSOR_OBS
THERMDN
THERMDP
JTAG_TMS
JTAG_TRST
JTAG_TDO
JTAG_TDI
KEY
TRST*
TCK
GND
TMS
TDO
VCC
TDI
10/14 MISC2
ROMCS
I2CH_SDA
I2CH_SCL
ROM_SCLK
ROM_SO
ROM_SI
TESTMODE
TESTMEMCLK
SWAPRDY_A
STEREO
BUFRST
MEMSTRAPSEL0
MEMSTRAPSEL1
MEMSTRAPSEL2
MEMSTRAPSEL3
STRAP
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
GPIO & JTAG
THERM_DP
C31
2200PF
50V
10%
X7R
0402
COMMON
G1
G84-400-A1
AJ11
AK11
AK12
AL12
AL13
BGA820
COMMON
V6
J1
PEX3V3
PEX3V3
GND
1
3
5
7
C826
1UF
6.3V
10%
X5R
0402
COMMON
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*
J501
HDR_2F4
FEMALE
1.274MM
0
KEY6_JTAG_SMALL
NO STUFF
SNN_TH_BOS
THERM_DN
THERM_DP K1
2
4
8
R665
180
5%
0402
COMMON
R666
270
5%
0402
COMMON
10K
5%
0402
COMMON
R653
10K
5%
0402
COMMON
10K
5%
0402
COMMON
R658
R652
GND
9
GND
0
RP501
8
0402X4
RP501
0402X4
R654
0402
1
0.05R_MAX
3
0.05R_MAX
5%
NO STUFF
0
6
NO STUFF
0
NO STUFF
RP501
0402X4
RP501
0402X4
2
0.05R_MAX
4
0.05R_MAX
0
7
NO STUFF
0
5
NO STUFF
PEX_TRST*
PEX_TCLK
PEX_TDI
PEX_TDO
PEX_TMS
5V
C755 C756
.1UF .1UF
10V
10%
X5R
0402
NO STUFF
10V
10%
X5R
0402
NO STUFF
5V
17< 15< 14<
17<> 15<> 14<>
17<> 15<>
14<
15<
17<
14<>
5V
GND
R644
0402
R13
2.2K
2.2K
5%
5%
5%
0402
COMMON
R1001
10K
0402
COMMON
0402
COMMON
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
5%
GND
R645
R647
2.2K
2.2K
33
COMMON
33
COMMON
5%
0402
COMMON
R641
0402
R22
04025%COMMON
11>
12>
21<
21<
21>
COMMON
33
COMMON
5%
33
F6
C1
I2CS_SCL_G
I2CS_SDA_G
B1
I2CC_SCL_G
G2
I2CC_SDA_G
G1
GPIO0_DVI_A_HPD
K3
GPIO1_DVI_C_HPD
H1
SNN_GPIO2
K5
SNN_GPIO3
G5
GPIO4_NVFAN_TACH
E2
GPIO5_VSEL0
J5
GPIO6_VSEL1
G6
SNN_GPIO7
K6
GPIO8_THERM_ALERT*
E1
GPIO9_NVFAN_PWM
D2
SNN_GPIO10
H5
GPIO11_SLI_SYNC0
F4
GPIO12_EXT12V_PRSNT
E3
SNN_GPIO13
U3
SNN_GPIO14
U4
2>
2>
2>
2>
2>
R648
0402
R21
0402
5%
5%
THERM_DN
I2CC_SCL
2>
2<>
13<
2
3
8
7I2CC_SDA
U2
MAX6646MUA
SO8_122MIL
COMMON
R1000
10K
0402
COMMON
PEX3V3
5%
PEX3V3
HDCP ROM (serial)
PEX3V3
PEX3V3
HDCP_KEYROM_PROGD_V2
8
7
GND
4
1
PEX3V3
10
STRAP pins are only used for MAP/MEP packages
SNN_STRAP
SNN_MEMSTRAPSEL0
SNN_MEMSTRAPSEL1
SNN_LOFBVDDQSEL_
SNN_LOFBVDDSEL_
SNN_GPU_U3_RFU
SNN_GPU_V4_RFU
SNN_GPU_AM8_RFU
SNN_GPU_AM9_RFU
SNN_GPU_B32_RFU
SNN_GPU_U6_RFU
SNN_GPU_AC26_RFU
SNN_GPU_D16_RFU
AE26
AD26
AH31
AH32
AM8
AM9
B32
AC26
F1
V3
V4
U6
D1
G1
G84-400-A1
BGA820
COMMON
AA4
W2
AA6
AA7
G3
H3
F3
T3
M6
A26
H2
ROMCS*
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
RESET_BUF*
STEREO
SWAPRDY_A
TESTMEMCLK
TESTMODE
GND
COMMON
10K
0402
R632
17<>
18>
17<>
17<>
17<>
14<
15<
COMMON
10K
5%
5%
0402
R598
U506
COMMON
SO8
6
5
3
SNN_CRYPTO
2
COMMON
0402
5%
10K
R668
R670
10K
5%
0402
COMMON
GND
R18
10K
5%
0402
COMMON
13>
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
GPIO, JTAG, BIOS ROM, HDCP ROM, and 2-pin/4-pin Fan Control
www.vinafix.vn
BIOS ROM(serial)
17>
17>
18>
17>
17>
ROMCS*
ROM_SI
ROM_SO
ROM_SCLK
PEX3V3
THERM_PEX3V3_R
1
4
6
5
GND
R679
1K
5%
0402
COMMON
R678
0402
R649
200
5%
0402
COMMON
GND
GPIO8_THERM_ALERT_R
ALERT_NVVDD_EN
GPIO9_NVFAN_PWM_R
0
NO STUFF
5%
GND
PEX3V3
R664
10K
5%
0402
COMMON
C812
.1UF
10V
10%
X5R
0402
COMMON
R677
1K
5%
0402
NO STUFF
7
3
1
5
2
6
1G1D1S
U507
AT25F512AN
SO8
SO8
COMMON
1
COMMON
R23
0402
5%
3
Q520
BSS138
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
8
4
PEX3V3
R24
10K
5%
0402
0
COMMON
R676
1K
5%
0402
NO STUFF
GPIO8_THERM_ALERT*
PEX12V
GND
FAN_PWM_B
C829
.1UF
16V
10%
X7R
0402
COMMON
GND
C849
1UF
25V
10%
X7R
0805
NO STUFF
1G1D1S
18< 18< 17>
17>
22<
18>
PEX12V
1
J6
HDR_1M4
2
MALE
3
2MM
0
4
NORM
COMMON
GND
2-pin/4-pin Fan Control
1
J7
HDR_1M2_FAN
D514
1
BAT43
SOD323
40V
400MA
2
NO STUFF
FAN_PWM_C
3
Q519
IRLML2502
SOT23_1G1D1S
1
NO STUFF
2
MAX_VOLTAGE=20V
CONTINUOUS_CURRENT=3.4A
R_DS_ON=0.08R
MAX_CURRENT=20A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-12V
L7
SMD_4_5X4_0MM
22uH
NO STUFF
C837
1UF
16V
10%
X7R
0805
FAN_PWM_D
NO STUFF
GND
THERMDC
THERMDA
FAN_PWM_B
FAN_PWM_C
FAN_PWM_D
10MIL
10MIL
12MIL
12MIL
12MIL
600-10401-0000-200 B
p401_a02
APATEL
C832
10UF
16V
20%
X7R
1206
NO STUFF
2
MALE
2.5MM
0
NORM
NO STUFF
VOLTAGE MIN_LINE_WIDTH NETNAME
17 OF 22
16-JAN-2007
Page 18
Page18: Strap Configuration and Mechanicals & Thermals
2 connected mounting pins
BOARD STIFFENER
No connected mounting pins
SPECIAL MECHANIC
4 connected mounting pins
COOLING SOLUTION
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
Strap Configuration
13<>
14<>
13<>
17<>
13<>
17>
MIOBD<11..0>
MIOB_CTL3
SLI_D<14..0>
ROM_SI
GND
STUFF 2.0K
BOND OPTION 0 = DISCRETE
2K
R675
NO STUFF
0402
5%
2K
R672
NO STUFF
0402
5%
2K
R660
COMMON
0402
5%
2K
R16
COMMON
0402
5%
2K
R14
COMMON
0402
5%
2K
R17
COMMON
0402
5%
2K
R663
0402 COMMON
5%
2K
R646
COMMON
0402
5%
MIOBD<0>
MIOBD<1>
MIOBD<8>
MIOBD<9>
MIOBD<11>
MIOB_CTL3
SLI_D<0>
ROM_SI
SLI_D<13>
R674
0402
R673
0402
R661
0402
R669
0402
R671
0402
R667
0402
R15
0402
5%
5%
5%
5%
5%
5%
5%
2K
COMMON
2K
COMMON
2K
NO STUFF
2K
NO STUFF
2K
NO STUFF
2K
NO STUFF
2K
COMMON
REG: NV_PEXTDEV_BOOT_0
Bit Signal
PEX3V3
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
PCI_DEVID_EXT (4)
PEX_PLL_EN_TERM100
MIOA_2V5
MIOA_EN_3.3V
SLOT_CLK_CONFIG
VALUE_ID
RAM_CFG[3:0]
VALUEs
0000 RFU
0001 128-bit - QIMONDA 16Mx32
0010 128-bit - HYNIX 16Mx32
0011 128-bit - SAMSUNG 16Mx32
0100 RFU 1100 RFU
0001 128-bit - QIMONDA 8Mx32
0110 128-bit - HYNIX 8Mx32
0111 128-bit - SAMSUNG 8Mx32
1000 RFU
1001 64-bit - QIMONDA 16Mx32
1010 64-bit - HYNIX 16Mx32
1011 64-bit - SAMSUNG 16Mx32
1101 64-bit - QIMONDA 8Mx32
1110 64-bit - HYNIX 8Mx32
1111 64-bit - SAMSUNG 8Mx32
Thermal Protection
PEX3V3
10K
NO STUFF
10K
NO STUFF
THERMAL_N
R2001
2K
5%
0603
NO STUFF
R2004
0402
1B1C1E
C2002
1000PF
50V
10%
X7R
0603
NO STUFF
C2003
1000PF
50V
10%
X7R
0603
NO STUFF
2K
NO STUFF
5%
1
THERMAL_N_C
GND
3
Q2001
MMBT2222A
SOT23_1B1C1E
NO STUFF
2
GND
C2000
.47UF
6.3V
10%
X5R
0402
NO STUFF
GPIO8_THERM_ALERT*
1B1C1E
1
ALERT_NVVDD_EN
3
Q2002
MMBT2222A
SOT23_1B1C1E
NO STUFF
2
17>
17>
22<
R2000
2K
5%
0402
NO STUFF
2>
PEX_RST*
0402
5%
PEX_RST_P_C
0 R2006
NO STUFF
Q2000
MMBT4403
SOT23_1B1C1E
NO STUFF
THERMAL_NB
R2002
33K
5%
0402
NO STUFF
2
3
1B1C1E
1
R2003
THERMAL_P*
0402
5%
C2001
.1UF
16V
10%
X7R
0402
NO STUFF
R2005
0402
GND
5%
Mechanical & Thermals
BKT1
DVI3152_DVI1552_MDIN490_TEXT_1_2_TAB
ATX_1X_TOP
COMMON
1
GND
SCREW HEX JACK 4-40 x 12.1MM STANDARD
MEC1
HEX_JACK_SCREW
STD
COMMON
MEC2
HEX_JACK_SCREW
STD
COMMON
MEC3
HEX_JACK_SCREW
STD
COMMON
MEC4
HEX_JACK_SCREW
STD
COMMON
154-0003-007
MEC7
PH_4_40X.1875_SCREW
STD
COMMON
GND
1
GND
1
MEC10
MXM_MB_MH
X1
COMMON
1
MEC11
MXM_MB_MH
X1
COMMON
1
MEC12
MXM_MB_MH
X1
COMMON
1
MEC5
EDGE_STIFFENER_07375
2PIN
COMMON
2
MEC6
PEX_RET_BRKOFF
NOPIN
COMMON
MEC8
TM48
4PIN
COMMON
432
GND
GND
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
Strap Configuration and Mechanicals & Thermals
www.vinafix.vn
600-10401-0000-200 B
p401_a02
APATEL
18 OF 22
16-JAN-2007
Page 19
Page19: PowerSupply I - 5V, DDC5V, TMDS_PLL, TMDS_IOVDD, and MIOA_2V5
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
5V
5V
5V_REG_IN
DDC_5V
TMDS_PLLVDD
9<
10< 15<
19>
TMDS_IOVDD
MIOA_2V5
5V
U508
AZ7805DE1
PEX12V
GND
C839
.1UF
16V
10%
X7R
0603
COMMON
C842
10UF
16V
20%
X5R
1206
COMMON
GND
VR=5V
IGO,IGOI
COMBINED_IGO
COMMON
1
2
GND
3
C844
.1UF
16V
10%
X7R
4
0402
COMMON
C21
4.7UF
6.3V
10%
X5R
0805
COMMON
GND
DDC 5V
F1
5V
200mA
1206
COMMON
1
DDC_5V
2
C19
220PF
50V
5%
C0G
0603
COMMON
DDC_5V
5V_FUSED
TMDS_PLLVDD
TMDS_PLLVDD_REG
TMDS_IOVDD
TMDS_SEQ
TMDS_IOVDD_EN
MIOA_2V5
MIN_LINE_WIDTHNET
18MIL
20MIL
12MIL
10MIL
16MIL
10MIL
16MIL
10MIL
10MIL
16MIL
5V
5V
1.8V
3.3V
2.5V
NV_NET_MAX_CURRENT VOLTAGE
0.400A
0.100A
0.100A
0.200A
0.300A
TMDS_PLLVDD
PEX3V3 5V
R659
1K
5%
0402
COMMON
C27
4.7UF
6.3V
10%
X5R
0805
COMMON
GND GND
C818
.047UF
16V
10%
X7R
0402
COMMON
TMDS_PLLVDD_EN
6
SC431L
VR=1.240V
125
1G4D1S
U505
SOT23
SOT23
COMMON
4
TSOP6_1G4D1S
FDC637AN
COMMON
Q518
3
2
3
GND
V_BE_GS=+/-8V
R_DS_ON=0.024 at 4.5V
MAX_CURRENT=20A
MAX_WATTAGE=1.6W
MAX_VOLTAGE=20V
CONTINUOUS_CURRENT=6.2A
1
GND
FBVDDQ
LB517
220R@100MHz
NO STUFF
BEAD_0805
Rtop
R642
442
1%
0402
COMMON
TMDS_PLLVDD_REG
R643
1K
1%
0402
COMMON
Rbot
GND
C792
.047UF
16V
10%
X7R
0402
COMMON
GND
C807
4.7UF
6.3V
10%
X5R
0805
COMMON
10< 9<
TMDS_PLLVDD
C810
220UF
COMMON
2.5V
POSCAP
2.4A@45C
.035R
SMD_3528
GND
19<
15<
TMDS_IOVDD BACKDRIVE PREVENTION
PEXVDD
TMDS_SEQ
PEXVDD SELECTED FOR
EASE OF ROUTING
R633
10K
5%
0402
COMMON +/-20%
1B1C1E
1
TMDS_IOVDD_EN
3
Q515
MMBT2222A
SOT23_1B1C1E
COMMON
2
GND
1G1D1S
1
R640
10K
5%
0402
COMMON
PEX3V3
3
Q517
SI2305DS
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
TMDS_IOVDD
MIOA_2V5
PEX3V3
C808
10UF
6.3V
20%
X5R
0805
COMMON
GND
MIN RECOMMENDED CAP = .47UF
GND
C799
.47UF
6.3V
10%
X5R
0402
COMMON
U504
AZ2940D-2.5
FIXED 2.5V
IGO,IGOI
COMBINED_IGO
COMMON
1
C798
.047UF
10V
10%
X5R
0402
COMMON
GND
3
C28
10UF
6.3V
4
2
GND
20%
X5R
0805
COMMON
GND
MIOA_2V5
C811
C809
47UF
6.3V
20%
X5R
1206
COMMON
GND
47UF
6.3V
20%
X5R
1206
COMMON
GND
MIN ESR = 50mOHMS
FOR STABILITY
Vout = VRef * (1+Rtop/Rbot)
1.8V = 1.25V * (1+(442/1K))
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
PowerSupply I - 5V, DDC5V, TMDS_PLL, TMDS_IOVDD, and MIOA_2V5
www.vinafix.vn
600-10401-0000-200 B
p401_a02
APATEL
19 OF 22
16-JAN-2007
Page 20
Page20: PowerSupply II - FBVDDQ and PEXVDD
INININININININININININININININININININ
UGATE
VCC12
PVCC5
BOOT
PHASE
LGATE
SW_FB
COMP
LDO_FB
FS_DIS
LDO_DR
VCC5
GND
PGNDSD
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FBVDDQ
NET
FBVDDQ
FB_BOOT
FB_UGATE
FB_UGATE1
FB_PHASE
FB_LGATE
FB_LGATE1
FB_FDBACK
FB_COMP
FB_COMP1
FB_SNUB
FB_RC
5V_PVCC5
VCC5
ISL6549_FS_DIS
FBVDDQ_SEQ
FBVDDQ_EN
MIN_LINE_WIDTH
30MIL
25MIL
30MIL
30MIL
30MIL
30MIL
30MIL
12MIL
12MIL
12MIL
20MIL
12MIL
20MIL
20MIL
12MIL
12MIL
12MIL
2.1V
NV_NET_MAX_CURRENT VOLTAGE
12A
12A
PEXVDD
PEXVDD
FILT_FBVDDQ_PEXVDD
DRIVE3_PEXVDD
FB_PEXVDD
FB_PEXVDD_RC
30MIL
30MIL
20MIL
20MIL
20MIL
1.2V
2A
PEX12V_IN
ALTERNATES
0402
GND
C61
330UF
COMMON
20%
16V
ALE
6.1A@105C, 6.5A@85C
0.010R
COMBI_TH_D80_D100
GND
2.2
COMMON
5%
.1UF
C534
25V
0603
10%
X7R
COMMON
FB_LGATE1
C527
1000PF
16V
10%
X7R
0402
NO STUFF
FB_UGATE1
GND
LFPAK
C68
4.7UF
16V
10%
X7R
1206
COMMON
LFPAK
4
5
Q509
IRF7832
SO8_1G4D3S
4
CHANGED
1
2
3
GND
.1UF
C502
16V 0402 0402
10%
X7R
COMMON
PLACE CLOSE TO DRAIN OF UPPER FET
5
Q507
IRF7821
SO8_1G4D3S
CHANGED
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=13.6A
2
R_DS_ON=.0091R
MAX_CURRENT=100A
3
MAX_WATTAGE=2.5@25C
V_BE_GS=+/- 20V
FB_PHASE
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=20A
R_DS_ON=0.004R
MAX_CURRENT=160A
MAX_WATTAGE=2.5@25C
V_BE_GS=+/- 20V
1
2
GND
FB_COMP1
R505
1000PF
C507
50V
0402
10%
X7R
COMMON
D503
IR10MQ040N
SMA
40V
2.1A
COMMON
1%
2.1K
COMMON
FB_SNUB
GND
R536
2.2
5%
0805
COMMON
C533
2200PF
50V
10%
X7R
0402
COMMON
1UH
L8
SMD_420X400
COMMON
3.0mOhm MAX
18A
VOUT = REFIN * (1 + Rt/Rb)
2.096V = 0.8 * (1 + 1.62K/1K)
FBVDDQ - 2.1V@10.6A
FBVDDQ
ALTERNATES
C539
1UF
10UF
6.3V
6.3V
10%
20%
X7R
X5R
0603
0805
COMMON
C509
.022UF
16V
10%
X7R
0402
COMMON
COMMON
R513
33
5%
0402
R512
1.62K
Rt
1%
0402
COMMON
R504
1K
Rb
1%
0402
COMMON
COMMON
FB_RC
.1UF
16V
10%
X7R
0402
COMMON
GND
.01UF
16V
10%
X7R
0402
COMMON
C531
C532
C535
C53
1200UF
NO STUFF
+/-20%
4V
OSCON
5.44A@105C
0.012R
COMBI_7343D80D1001812
GND
GND
C52
1000UF
COMMON
+/-20%
4V
OSCON
5.04A@45C
0.012R
COMBI_TH_D80_D100
C511
0603
GND
4.7UF
6.3V
10%
X5R
COMMON
R507
0402
C65
82UF
NO STUFF
+/-20%
16V
OSCON
2.12A@105C
0.040R
SMD_D80
GND
0
COMMON
5%
R535
C67
10UF
16V
10%
X5R
FBVDDQ
1206
COMMON
30R@100MHz
LB5
COMMON
BEAD_0805
C55
.1UF
16V
10%
X7R
0402
COMMON
CONTINUOUS_CURRENT=6A
0
R45
NO STUFF
1206
N/A
MAX_WATTAGE=1/4W
D2
2
SMA
30V
2A
NO STUFF
ALTERNATES
C60
.01UF
16V
10%
X7R
0402
COMMON
GND
RSX201L-30
1
Rt
Rb
COMBI_MONO_1G2D1S
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=10A@25C
R_DS_ON=0.028@10V
MAX_CURRENT=30A
MAX_WATTAGE=60W@25C
V_BE_GS=+/-20V
R508
1.07K
1%
0402
COMMON
R510
2K
1%
0402
COMMON
FILT_FBVDDQ_PEXVDD
4
2
1G2D1S
Q2
AOD420
COMMON
3
C512
50V 0402
10%
X7R
COMMON
10
R514
COMMON
0402
C513
1UF
16V
10%
X5R
0603
COMMON
GND
1
R509
2.7K
5%
0402
COMMON
FB_PEXVDD_RC1000PF
DRIVE3_PEXVDD
FB_PEXVDD
ISL6549_FS_DIS
R506
47.5K
1%
0402
COMMON
9VCC5
5
6
2
12
7
5%
U501
RT9259PS
VR_SW=0.8V, VR_LD=0.8V
SO14
SO14
CHANGED
GND
C50
100UF
COMMON
+/-20%
10V
ALE
0.14A@85C
N/A
TH_D50P20
GND
ALTERNATES
PEXVDD
GND
PEXVDD = 1.2V @ 2A
GND
ALTERNATES
C63
100UF
COMMON
+/-20%
10V
ALE
0.14A@85C
N/A
TH_D50P20
C64
100UF
NO STUFF
20%
25V
ALE
0.280A@105C
0.34R
SMD_D60
C54
100UF
NO STUFF
20%
25V
ALE
0.3A
0.34R@105C
SMD_D60
GND
C58
100UF
6.3V
20%
X5R
1210
COMMON
VOUT = REFIN * (1 + Rt/Rb)
1.2V = 0.8V * (1 + 1.07k/2.0k)
C59
1UF
6.3V
10%
X7R
0603
COMMON
PEX12V_IN
8
10
FB_BOOT
1
FB_UGATE
14
FB_PHASE
13
FB_LGATE11
FB_FDBACK
4
FB_COMP
3
GND
GND
5V_PVCC5
C521
1UF
16V
10%
X7R
0805
COMMON
GND
FBVDDQ POWER SEQUENCING
PEX3V3
22>
NVVDD_PGOOD
R501
10K
5%
0402
COMMON
1G1D1S
PEX12V
R503
10K
1G1D1S
5%
0402
COMMON
3
Q501
BSS138
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
3
Q503
BSS138
SOT23_1G1D1S
1FBVDDQ_EN
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
www.vinafix.vn
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
PowerSupply II - FBVDDQ and PEXVDD
600-10401-0000-200 B
p401_a02
APATEL
20 OF 22
16-JAN-2007
Page 21
Page21: PowerSupply III - PEX12V & EXT12V Power and NVVDD VID Control
PRSNT*
GND
12V
12V
12V
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
INPUT FILTER FOR PEX12V
PEX12V
1uH
L12
COMMON 7_6x7_6
MAX_CURRENT=8.0A
DC_RESISTANCE=0.012R
GND
C69
100UF
NO STUFF
20%
25V
ALE
0.3A
0.34R@105C
SMD_D60
C70
47UF
COMMON
+/-20%
16V
ALE
0.099A@85C
7.06R
TH_D50P20
GND
PEX12V_IN
Input Selection for NVVDD
INPUT FILTER FOR EXT12V
EXT12V
1uH
PEX12V
EXT12V
D501
1 2
BAT54C
25V
200MA
SOT23
COMMON
3
EXT12V_PEX12V_SEL
J9
HDR_2M3
MALE
4.2MM
PCIEPWR
COMMON
90
6
3
EXT12V_PRSNT*
5
2
4
1
GND GND
EXT12V
C505
4.7UF
16V 16V
20%
X7R
1206
COMMON
GND
C501
.1UF
10%
X7R
0603
COMMON
R502
10K
5%
0402
COMMON
1G1D1S
1
R47
10K
5%
0402
COMMON
EN_EXT12V_PRSNT
3
Q502
BSS138
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
1G1D1S
R46
10K
5%
0402
COMMON
1G2D1S
PEX3V3
R48
10K
5%
0402
COMMON
3
Q3
BSS138
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
GND
PEX12V
8
7
Q1
IRF7328
SO8_DUAL_1G2D1S
2
COMMON
1
MAX_VOLTAGE=-30V
CONTINUOUS_CURRENT=-8A
R_DS_ON=0.021R
MAX_CURRENT=-32A
MAX_WATTAGE=1.3W@70C
V_BE_GS=+/-20V
GPIO12_EXT12V_PRSNT
12V_NVVDD_Q
EMERENCY MODE
(NO EXT_12V
and BRICK_12V)
17<
150W POWER MODE
EXT12V
IRF7328
SO8_DUAL_1G2D1S
COMMON
MAX_VOLTAGE=-30V
CONTINUOUS_CURRENT=-8A
R_DS_ON=0.021R
MAX_CURRENT=-32A
MAX_WATTAGE=1.3W@70C
V_BE_GS=+/-20V
GPIO12
0 = EXT12V PRSNT
1 = EXT12V NOT PRSNT
1
0
6
5
1G2D1S
Q1
4
3
NVVDD VID CONTROL
GND
C71
47UF
COMMON
+/-20%
16V
ALE
0.099A@85C
7.06R
TH_D50P20
R581
0402
1G1D1S
1
10K
COMMON
5%
1G1D1S
1
17>
17>
EXT12V
PEX12V_IN
EXT12V_IN
EXT12V 50MIL
PEX12V_IN
EXT12V_IN 50MIL
12V_NVVDD_Q
50MIL
24MIL
MIN_LINE_WIDTH NET
VOLTAGE
12V
12V
NV_NET_MAX_CURRENT
6.25A
5.5A 12V
6.25A 12V
3A
GPIO5_VSEL0
GPIO6_VSEL1
PEX3V3
R579
10K
5%
0402
COMMON
GATE_DEF
2 1
3
bridge diode
D512
BAT54A
30V
200MA
SOT23
COMMON
D505
BAT54A
30V
200MA
SOT23
COMMON
3
R560
0402
5%
R583
0402
SNN_GATE_NC
1
2
0
NO STUFF
10K
COMMON
5%
R566
0402
additional PD
1GATE_DEF_R
5%
C72
100UF
NO STUFF
20%
25V
ALE
0.3A
0.34R@105C
SMD_D60
GND
VOL_1
3
Q513
RHK003N06
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.3A@25C
R_DS_ON=1.5R
MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C
V_BE_GS=+/-20V
GND
VOL_2
3
Q514
RHK003N06
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.3A@25C
R_DS_ON=1.5R
MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C
V_BE_GS=+/-20V
GND D507
VOL_DEF
1G1D1S
3
Q512
RHK003N06
SOT23_1G1D1S
2
COMMON
10K
NO STUFF
GND
L11
COMMON 7_6x7_6
MAX_CURRENT=8.0A
DC_RESISTANCE=0.012R
D511
BAT54C
25V
200MA
SOT23
COMMON
3
D510
BAT54C
25V
200MA
SOT23
COMMON
3
D506
BAT54C
25V
200MA
SOT23
COMMON
3
D508
BAT54C
25V
200MA
SOT23
COMMON
3
BAT54C
25V
200MA
SOT23
COMMON
3
D509
BAT54C
25V
200MA
SOT23
COMMON
3
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.3A@25C
R_DS_ON=1.5R
MAX_CURRENT=1.2A
MAX_WATTAGE=0.2W@25C
V_BE_GS=+/-20V
Voltage1
VID1_VOL1
R582
2
R580
1
VID2_VOL1
VID3_VOL1
R576
2
R575
1
VID4_VOL1
Voltage2
VID1_VOL2
R572
2
R571
1
VID2_VOL2
VID3_VOL2
R577
2
R573
1
VID4_VOL2
Default
VID1_VOL_DEF
R569
2
R570
1
VID2_VOL_DEF
VID3_VOL_DEF
R578
2
R574
1
VID4_VOL_DEF
0
COMMON
0402
5%
0
COMMON
0402
5%
0
NO STUFF
0402
5%
0
COMMON
0402
5%
0
04025%NO STUFF
0
COMMON
0402
5%
0
NO STUFF
0402
5%
0
COMMON
0402
5%
0
COMMON
0402
5%
0
NO STUFF
0402
5%
0
NO STUFF
0402
5%
0
COMMON
0402
5%
Default selection for NVVDD_VID[4..1]
EXT12V_IN
NVVDD_VID1
NVVDD_VID2
NVVDD_VID3
NVVDD_VID4
22<>
22<>
22<>
22<>
NVVDD Voltage Select
NVVDD range 0.8V-1.55V
Regulator: ISL6568
Control via NV_GPIOs NV_VSEL[2..0] :
VID NVVDD
4 3 2 1 Vout
1 1 1 1 0.80V
1 1 1 0 0.85V
1 1 0 1 0.90V
1 1 0 0 0.95V
1 0 1 1 1.00V
1 0 1 0 1.05V
1 0 0 1 1.10V
1 0 0 0 1.15V
0 1 1 1 1.20V
0 1 1 0 1.25V
0 1 0 1 1.30V
0 1 0 0 1.35V
0 0 1 1 1.40V
0 0 1 0 1.45V
0 0 0 1 1.50V
0 0 0 0 1.55V
Note: ISL6568 Controller can support
AMD HAMMER VID codes and
Intel VRM9/10 VID codes
The above uses AMD Hammer VID codes
G84
=> Default
=> Voltage1
=> Voltage2
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
Power Supply III: PEX12V & EXT12V Power and NVVDD VID Control
www.vinafix.vn
600-10401-0000-200 B
p401_a02
APATEL
21 OF 22
16-JAN-2007
Page 22
Page22: PowerSupply IV - NVVDD
INININININININININININININININININININININININININININ
2 Phase PWM
PVCC
BOOT1
UGATE1
PHASE1
ISEN1
LGATE1
PHASE2
BOOT2
UGATE2
ISEN2
LGATE2
ISUM
ICOMP
VID12_5
VDIFF
FB
COMP
VCC
REF
FS
OFS
ENLL
PGOOD
VID4
VID2
VID1
VID3
VID0
OCSET
IREF
RGND
VSEN
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
NVVDD NET RULES
EXT12V_IN
C45
330UF
COMMON
20%
16V
ALE
5.05A/105C
0.014R
COMBI_TH_D80_D100
GND
ALTERNATES
Input Ripple = ~ 7.5A
C46
330UF
NO STUFF
+/-20%
16V
OSCON
4.72A@105C
0.016R
COMBI_7343_D80_D100
GND
C62
330UF
COMMON
20%
16V
ALE
5.05A/105C
0.014R
COMBI_TH_D80_D100
GND
ALTERNATES
*Note: SMD OSCONs are $0.06 extra per cap.
C66
1
330UF
NO STUFF
+/-20%
2
16V
OSCON
4.72A@105C
0.016R
COMBI_7343_D80_D100
GND
C503
10UF
16V
20%
1206
COMMON
*Default = No Stuff
GND GND
C514
10UF
16V
20%
X5R X5R
1206
COMMON
Compensation
C506
Place Compensation Components Close to IC
C517
0603
C516
Cc
C1
.047UF
50V
10%
X7R
COMMON
.01UF
25V 0603
10%
X7R
COMMON
NVVDD_COMP_RC
C3
C519
0603
NVVDD_FB_RC
Rfb
R520
0603
1000PF
50V
10%
X7R
COMMON
1%
For AMD Hammer Code
5K Res to +5V on VID12.5 Pin
Enable pin:
ENLL has a 0.66V
precision threshold
17>
18>
ALERT_NVVDD_EN
COMMON
Rtherm
0
5%
R544
0402
2>
2>
NVVDD_SENSE
NVVDD_GND_SENSE
0402
R523
0402
5%
5%
Rc
R516
0603
1%
Change C3 to 100pF if
1200uF OSCONs are stuffed
on output & C1/R3 NOSTUFF
R3
33.2
R517
COMMON
0603
1%
1K
COMMON
Vofs =
(0.5*Rfb)/Rofs
Open = No Offset
PEX3V3
R542
1K
5%
0402
COMMON
R543
1K
5%
0402
COMMON
GND
NVVDD
R527
0
5%
0402
NO STUFF
0 R524
COMMON
0
COMMON
R519
0
5%
0402
NO STUFF
GND
5.9K
COMMON
5V
GND
GND
R526
0
5%
0402
COMMON
R521
0603
GND
R522
R530
0603
C523
0603
1%
C528
1000PF
50V
10%
X7R
0603
NO STUFF
0402
1%
4.99K
COMMON
21>
21>
21>
21>
20<
DROOP
Switching Freq = 300KHz/channel
5V
R515
0
5%
0603
COMMON
NVVDD_VCC
C518
Cf1
1UF
16V
10%
X5R
0603
COMMON
GND
NVVDD_COMP
NVVDD_FB
NVVDD_VDIFF
Rofs
NVVDD_OFS
10K
NO STUFF
5%
NVVDD_FS
42.2K
COMMON
NVVDD_REF
.022UF
50V
10%
X7R
COMMON
NVVDD_VID12_5
NVVDD_VID0
NVVDD_VID1
NVVDD_VID2
NVVDD_VID3
NVVDD_VID4
NVVDD_PGOOD
NVVDD_ENLL
NVVDD_SENSE_ISL
NVVDD_GND_SENSE_ISL
NVVDD_OCSET
GND
R529
3.57K
1%
0402
COMMON
Place Rcomp, Ccomp, Rs
near thier respective pins
on the ISL6568
R528
0402
C524
0603
4
5
6
7
3
29
2
1
32
31
30
21
22
28
20
9
8
13
10
TP
Rcomp
1%
Ccomp
U502
ISL6568CRZ
DYNAMIC VID(0.8V..1.85V)
QFN32
QFN32
COMMON
66.5K
COMMON
.01UF
25V
10%
X7R
COMMON
GND
NVVDD_ICOMP
NVVDD_ISUM
Rs1
R533
0402
R534
Rs2
C526
.01UF
25V
10%
X7R
0603
COMMON
1%
1%
C537
4.7UF
16V
10%
X7R
1206
COMMON
15
NVVDD_BOOT1
24
NVVDD_UGATE1
25
NVVDD_PHASE1
23
NVVDD_ISEN1
26
NVVDD_LGATE1
27
NVVDD_BOOT2
18
NVVDD_UGATE2
17
NVVDD_PHASE2
19
NVVDD_ISEN2
16
NVVDD_LGATE2
14
12
11
82.5K
COMMON
82.5K
COMMON 0402
NVVDD_PVCC
NVVDD_PHASE1
NVVDD_PHASE2
NVVDD
0
R539
COMMON
0603
5%
.1UF
C541
25V
0603
10%
X7R
COMMON
2.2
R537
COMMON
0402
5%
1.8K
R532
COMMON
0603
5%
Place near ISEN1 Pin
Stuff cap to improve Cgs/Cgd ratio!
1.8K R538
COMMON
0603
5%
Place near ISEN2 Pin
22<
22<
4NVVDD_UG1_RG
4
2.2
COMMON
5
Q505
BSC119N03S
LFPAK
COMMON
1
2
3
5
Q504
BSC032N03S
LFPAK
NO STUFF
1
2
3
GND
NVVDD_UG2_RG
C515
1000PF
50V
10%
X7R
0402
COMMON
GND
C536
0603
R541
0402
LFPAK
LFPAK
.1UF
25V
10%
X7R
COMMON
5%
www.vinafix.vn
4.7UF
16V
20%
X7R
1206
COMMON
GND
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A
R_DS_ON=18mR@4.5V
MAX_CURRENT=120A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
D502
LFPAK
1
RSX201L-30
SMA
30V
2A
2
COMMON
GND
4
LFPAK
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
R_DS_ON=3.2mR
MAX_CURRENT=200A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
LFPAK
LFPAK
C520
1000PF
50V
10%
X7R
0402
COMMON
GND
G84-400 700/1000GHz 256MB 16Mx32 BGA136 GDDR3 DVI-I-DL+DVI-I-DL+HDTV-Out
Power Supply IV - NVVDD
5
Q506
BSC032N03S
LFPAK
4
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR
MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
EXT12V_IN
C522
4.7UF
16V
20%
X7R
1206
COMMON
GND
5
Q510
BSC119N03S
LFPAK
4
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A
2
R_DS_ON=18mR@4.5V
MAX_CURRENT=120A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
5
Q508
BSC032N03S
LFPAK
4
COMMON
1
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
3
R_DS_ON=3.2mR
MAX_CURRENT=200A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
GND
5
Q511
BSC032N03S
LFPAK
NO STUFF
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR
MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
CONTINUOUS_CURRENT=32A
DC_RESISTANCE=0.0015 MAX
L10
SMD_590x530
R531
2.2
5%
0805
COMMON
NVVDD_SNUB1
C525
1500PF
50V
10%
X7R
0603
COMMON
GND
Place near Low Side Mosfet
COMMON
1uH
1
2
6.3V
20%
X5R
1206
NO STUFF
GND
D504
RSX201L-30
SMA
30V
2A
COMMON
NVVDD = 1.0V..1.3V (30..45A)
C48 C504
47UF 47UF
6.3V
20%
X5R
1206
NO STUFF
CONTINUOUS_CURRENT=32A
DC_RESISTANCE=0.0015 MAX
L9
SMD_590x530
R545
2.2
5%
0805
COMMON
NVVDD_SNUB2
C557
1500PF
50V
10%
X7R
0603
COMMON
GND GND
Place near Low Side Mosfet
NET
NVVDD
22<
22<
C57
1200UF
NO STUFF
+/-20%
4V
OSCON
5.44A@105C
0.012R
COMBI_7343D80D1001812
GND
C56
1000UF
COMMON
+/-20%
4V
OSCON
5.04A@45C
0.012R
COMBI_TH_D80_D100
GND
NVVDD
NVVDD_PVCC
NVVDD_VCC
NVVDD_BOOT1
NVVDD_UGATE1
NVVDD_UG1_RG
NVVDD_PHASE1
NVVDD_LGATE1
NVVDD_LG1_AC
NVVDD_BOOT2
NVVDD_UGATE2
NVVDD_UG2_RG
NVVDD_PHASE2
NVVDD_LGATE2
NVVDD_LG2_AC
NVVDD_ISEN1
NVVDD_ISEN2
NVVDD_SNUB1
NVVDD_SNUB2
NVVDD_COMP
NVVDD_FB
NVVDD_COMP_RC
NVVDD_FB_RC
NVVDD_VDIFF
NVVDD_ISUM
NVVDD_ICOMP
NVVDD_OCSET
NVVDD_REF
Place in same location as SMD
1uH
COMMON
C565
47UF
6.3V
20%
X5R
1206
NO STUFF
Place on Bottom
*Default = No Stuff
GND
C558
47UF
6.3V
20%
X5R
1206
NO STUFF
1.3V 40A
12V
0.003A
0.02A 5V
20A
20A
C39
1200UF
NO STUFF
+/-20%
4V
OSCON
5.44A@105C
0.012R
COMBI_7343D80D1001812
GND
C40
1000UF
COMMON
+/-20%
4V
OSCON
5.04A@45C
0.012R
COMBI_TH_D80_D100
GND
C49 C585
47UF
6.3V
20%
X5R
1206
NO STUFF
Place on Bottom
47UF
6.3V
20%
X5R
1206
NO STUFF
p401_a02
APATEL
C44
1200UF
NO STUFF
+/-20%
4V
OSCON
5.44A@105C
0.012R
COMBI_7343D80D1001812
GND
C47
1000UF
COMMON
+/-20%
4V
OSCON
5.04A@45C
0.012R
COMBI_TH_D80_D100
GND
600-10401-0000-200 B
MIN_WIDTH MAX_CURRENT VOLTAGE
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
10MIL
NVVDD
ALTERNATES ALTERNATES ALTERNATES
22 OF 22
16-JAN-2007