Page 1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P419-A00: MXM-I, G86M, 256/128MB, 64-bit
32M16 or 16M16(4 pcs) DDR2
LVDS,DVI_A,TV_OUT,VGA, HDMI/HDCP
Table of Contents
Page 1: PAGE OVERVIEW
Page 2: PCI EXPRESS INTERFACE
Page 3: GPU MEMORY INTERFACE
Page 4: FRAME BUFFER PARTITION A
Page 5: MEMORY DECOUPLING CAPS
Page 6: DAC A/B/C
Page 7: LVDS(LINK A/B), TMDS(LINK C/D)
Page 8: MXM CONNECTOR
Page 9: GPIO. JTAG, TEMP SENSOR, SPDIF
Page 10: MIOB, VBIOS, HDCP ROM
Page 11: SPREAD SPECTURM, MIOA
Page 12: NVVDD POWER SUPPLY
Page 13: FBVDDQ POWER SUPPLY
Page 14: STRAPS
Page 15: FBVDDQ POWER SUPPLY
Page 16: STRAPS
BASE
SKU001
SKU002
SKU003
SKU004
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10419-0000-000
600-10419-0001-000
600-10419-0002-000
600-10419-0003-000
600-10419-0004-000
<UNDEFINED?
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
G86M ?/? 256MB(64bit) DDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
G86M ?/? 128MB(64bit) DDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
G86M ?/? 256MB(64bit) DDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
G86M ?/? 128MB(64bit) DDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
<UNDEFINED?
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE OVERVIEW
www.vinafix.vn
600-10419-0001-000
p419
Joe Kwon
1 OF 16
05-JUL-2006
Page 2
G1
G86
NV_PLLAVDD
G72
1/12 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
VDD
VDD
VDD
VDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD
PEX_PLLGND
PEX_PLLDVDD
PEX_PLLAVDD
PEX_TSTCLK_OUT
PEX_RX1
PEX_RST
PEX_RX0
PEX_TX1
PEX_TX1
PEX_REFCLK
PEX_REFCLK
PEX_RX0
PEX_TX0
PEX_TX0
PEX_TSTCLK_OUT
PEX_RX4
PEX_TX3
PEX_RX3
PEX_TX2
PEX_TX2
PEX_RX4
PEX_RX2
PEX_RX3
PEX_TX3
PEX_RX2
PEX_RX1
PEX_TX4
PEX_TX4
PEX_TX5
PEX_RX5
PEX_TX6
PEX_TX8
PEX_TX8
PEX_RX7
PEX_TX7
PEX_RX7
PEX_TX7
PEX_RX6
PEX_TX5
PEX_RX5
PEX_RX6
PEX_TX6
PEX_TX9
PEX_TX10
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX8
PEX_TX10
PEX_RX11
PEX_RX11
PEX_RX8
PEX_TX9
PEX_TX12
PEX_TX15
PEX_TX15
PEX_RX12
PEX_RX12
PEX_TX13
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX14
PEX_RX13
PEX_TX13
PEX_RX13
PEX_TX12
PEX_RX15
PEX_RX15
1/2 PCI-Express, Power
PEX_RST
CLK_REQ
PEX_REFCLK
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX1
PEX_TX1
PEX_RX1
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX0
PEX_REFCLK
PEX_RX0
PEX_TX2
PEX_RX6
PEX_TX5
PEX_TX5
PEX_RX6
PEX_TX4
PEX_TX4
PEX_RX5
PEX_RX5
PEX_TX3
PEX_RX4
PEX_RX4
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX6
PEX_TX6
PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX13
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_RX11
PEX_TX11
PEX_TX11
PEX_RX13
PRSNT2
PRSNT1
PEX_TX15
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX13
PEX_TX13
3V3RUN
(1.5A)
(3.5A)
1V8RUN
(0.5A)
2V5RUN
(4A)
PWR_SRC
(0.5A)
5VRUN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G86_TEST
AC6
AF13
AF14
AE3
AE4
AD5
AD6
AF1
AG2
AE6
AE7
AG3
AG4
AD7
AC7
AF4
AF5
AE9
AE10
AG6
AG7
AD10
AC10
AF7
AF8
AE12
AE13
AG9
AG10
AD13
AC13
AF10
AF11
AC15
AD15
AG12
AG13
AE15
AG15
AG16
AC18
AD18
AF16
AF17
AE18
AE19
AG18
AG19
AC21
AD21
AF19
AF20
AE21
AE22
AG21
AG22
AD22
AD23
AF22
AF23
AF25
AE25
AG24
AG25
AD24
AG26
AF27
BGA533
COMMON
GND
238
234
101
104
107
110
113
116
119
122
125
128
131
138
142
146
150
154
158
164
176
182
188
194
199
200
205
206
211
212
218
223
229
235
236
241
2
1
18
17
20
41
44
47
50
53
56
59
62
65
68
71
74
77
80
83
86
89
92
95
98
CN1
CON_MXM_X16_EDGE
(NPHY,NONPHY)-X16(_SLI)
NONPHY-X16
COMMON
137
139
135
133
129
127
132
130
123
121
126
124
117
115
120
118
111
109
114
112
105
103
108
106
99
97
102
100
93
91
96
94
87
85
90
88
81
84
82
75
73
78
76
69
67
72
70
63
61
66
64
55
60
58
51
49
54
52
45
43
48
46
37
42
40
134
38
PRSNT2_C
PEX_TX0_C
PEX_TX0_C*
PEX_TX1_C
PEX_TX1_C*
PEX_TX2_C
PEX_TX2_C*
PEX_TX3_C
PEX_TX3_C*
PEX_TX4_C
PEX_TX4_C*
PEX_TX5_C
PEX_TX5_C*
PEX_TX6_C
PEX_TX6_C*
PEX_TX7_C
PEX_TX7_C*
PEX_TX8_C
PEX_TX9_C
PEX_TX9_C*
PEX_TX10_C
PEX_TX10_C*
PEX_TX11_C
PEX_TX11_C*
PEX_TX12_C57
PEX_TX12_C*
PEX_TX13_C
PEX_TX13_C*
PEX_TX14_C
PEX_TX14_C*
PEX_TX15_C*
0402
5%
GND
0R43
COMMON
3V3RUN
C1
.1UF
X5R
0402
COMMON
1V8RUN
PWR_SRC
C519
.1UF
25V
10%
X7R
0603
COMMON
GND
5VRUN
C524
.1UF
10V
10%
X5R
0402
COMMON
GND
C2
.1UF
10V10V
10%10%
X5R
0402
COMMON
GND
C27
.1UF
10V
10%
X5R
0402
COMMON
GND
2V5RUN
GND
C653
.1UF
10V
10%
X5R
0402
COMMON
PAGE 2) PCI-EXPRESS
PEX_RST
200
R35
COMMON
C592
0402
C584
0402
C577
0402
C571
0402
C566
0402
C561
0402
C559
0402
C557
0402
C553
0402 10V
C551
0402
C548
0402
C546
0402
C544
0402
C542
0402
C538
0402
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UFC536
10V0402
10%
X5R
COMMON
0402
NV_CRITICAL_NET
DIFF_PAIRNET_NAME
PEX_TX0_C
PEX_TX0_C
PEX_TX1_C
PEX_TX1_C
PEX_TX2_C
PEX_TX2_C
PEX_TX3_C
PEX_TX3_C
PEX_TX4_C
PEX_TX4_C
PEX_TX5_C
PEX_TX5_C
PEX_TX6_C
PEX_TX6_C
PEX_TX7_C
PEX_TX7_C
PEX_TX8_C
PEX_TX8_CPEX_TX8_C*79
PEX_TX9_C
PEX_TX9_C
PEX_TX10_C
PEX_TX10_C
PEX_TX11_C
PEX_TX11_C
PEX_TX12_C
PEX_TX12_C
PEX_TX13_C
PEX_TX13_C
PEX_TX14_C
PEX_TX14_C
PEX_TX15_CPEX_TX15_C39
PEX_TX15_C
GND
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NV_IMPEDANCE
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
PEX_TCLK
1
PEX_TCLK
1
PEX_RCLK
1
PEX_RCLK
1
PEX_TX0
1
PEX_TX0
1
PEX_RX0
1
PEX_RX0
1
PEX_TX1
1
PEX_TX1
1
PEX_RX1
1
PEX_RX1
1
PEX_TX2
1
PEX_TX2
1
PEX_RX2
1
PEX_RX2
1
PEX_TX3
1
PEX_TX3
1
PEX_RX3
1
PEX_RX3
1
PEX_TX4
1
PEX_TX4
1
PEX_RX4
1
PEX_RX4
1
PEX_TX5
1
PEX_TX5
1
PEX_RX5
1
PEX_RX5
1
PEX_TX6
1
PEX_TX6
1
PEX_RX6
1
PEX_RX6
1
PEX_TX7
1
PEX_TX7
1
PEX_RX7
1
PEX_RX7
1
PEX_TX8
1
PEX_TX8 PEX_TX8* AE16
1
PEX_RX8
1
PEX_RX8
1
PEX_TX9
1
PEX_TX9
1
PEX_RX9
1
PEX_RX9
1
PEX_TX10
1
PEX_TX10
1
PEX_RX10
1
PEX_RX10
1
PEX_TX11
1
PEX_TX11
1
PEX_RX11
1
PEX_RX11
1
PEX_TX12
1
PEX_TX12
1
PEX_RX12
1
PEX_RX12
1
PEX_TX13
1
PEX_TX13
1
PEX_RX13
1
PEX_RX13
1
PEX_TX14
1
PEX_TX14
1
PEX_RX14
1
PEX_RX14
1
PEX_TX15 PEX_TX15 AE24
1
PEX_TX15
1
PEX_RX15
1
PEX_RX15
1
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PCI EXPRESS INTERFACE
C588
0402
C580
C572
C569
C562
C560
C558
C554
C549
C547
C545
C543
C540
C537
C531
0402 10V
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402 10V
0402
0402
.1UF
10V
10%
X5R
COMMON
.1UF
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UFC552
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
.1UF
10V
10%
X5R
COMMON
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
NET_NAMEDIFF_PAIRNV_CRITICAL_NETNV_IMPEDANCE
PEX_TSTCLK
PEX_TSTCLK*
REFCLK
REFCLK*
PEX_TX0
PEX_TX0*
PEX_RX0
PEX_RX0*
PEX_TX1
PEX_TX1*
PEX_RX1
PEX_RX1*
PEX_TX2
PEX_TX2*
PEX_RX2
PEX_RX2*
PEX_TX3
PEX_TX3*
PEX_RX3
PEX_RX3*
PEX_TX4
PEX_TX4*
PEX_RX4
PEX_RX4*
PEX_TX5
PEX_TX5*
PEX_RX5
PEX_RX5*
PEX_TX6
PEX_TX6*
PEX_RX6
PEX_RX6*
PEX_TX7
PEX_TX7*
PEX_RX7
PEX_RX7*
PEX_TX8
PEX_RX8
PEX_RX8*
PEX_TX9
PEX_TX9*
PEX_RX9
PEX_RX9*
PEX_TX10
PEX_TX10*
PEX_RX10
PEX_RX10*
PEX_TX11
PEX_TX11*
PEX_RX11
PEX_RX11*
PEX_TX12
PEX_TX12*
PEX_RX12
PEX_RX12*
PEX_TX13
PEX_TX13*
PEX_RX13
PEX_RX13*
PEX_TX14
PEX_TX14*
PEX_RX14
PEX_RX14*
PEX_TX15*
PEX_RX15
PEX_RX15*
www.vinafix.vn
AB10
AB11
AB14
AB15
W17
W18
AB20
AB21
AA4
AB5
AB6
AB7
AB8
AB9
AC9
AC11
AB12
AC12
AB13
AB16
AC16
AB17
AC17
AB18
AB19
AC19
AC20
J9
M9
R9
T9
J10
J11
M11
N11
R11
T11
L12
M12
T12
U12
L13
M13
T13
U13
W13
M14
T14
L15
M15
T15
U15
W15
L16
M16
T16
U16
W16
M17
N17
R17
T17
W9
W10
W11
W12
J12
F13
J13
F14
J15
J16
N9 NVVDD
Y6
AA5
AA6
NVVDD
PEX_PLL_DVDD
GND
C607
.1UF
16V
10%
X7R
0402
COMMON
C582
.1UF
10V
10%
X5R
0402
COMMON
C602
.1UF
6.3V
10%
X7R
0402
COMMON
C567
.1UF
6.3V
10%
X7R
0402
COMMON
C608
.1UF
6.3V
10%
X7R
0402
COMMON
C578
.1UF
16V
10%
X7R
0402
COMMON
PLACE UNDER GPU
C586
.1UF
6.3V
10%
X7R
0402
COMMON
PLACE UNDER GPU
C599
4700PF
25V
10%
X7R
0402
COMMON
PLACE UNDER GPU
C595
.1UF
16V
10%
X7R
0402
COMMON
C585
16V
10%
X7R
0402
COMMON
PLACE UNDER GPU
PLACE UNDER GPU
C600
.1UF
6.3V
10%
X7R
0402
COMMON
C575
.1UF
16V
10%
X7R
0402
COMMON
C594
.1UF
16V
10%
X7R
0402
COMMON
3V3RUN
C587
.1UF
6.3V
10%
X7R
COMMON
C611
1UF
6.3V
10%
X5R
04020402
COMMON
GND
C605
.01UF
16V
10%
X7R
0402
COMMON
C635
1UF
6.3V
10%
X5R
COMMON
PEX1V2
C604
1UF
6.3V
10%
X5R
COMMON
C591
1UF
6.3V
10%
X5R
04020402
COMMON
C556
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
PEX1V2
C596
1UF.1UF 1UF 4.7UF 10UF
6.3V
10%
X5R
0402
COMMON
6.3V
10%
X5R
0402
COMMON
C565C573
6.3V
10%
X5R
0603
COMMON
GND
NVVDD
C593
.1UF
6.3V
10%
X7R
0402
COMMON
C597
.1UF
6.3V
10%
X7R
0402
COMMON
C570
.1UF
6.3V
10%
X7R
0402
COMMON
C601
.1UF
6.3V
10%
X7R
0402
COMMON
GND
LB506
0603
C645
C640
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
04020402
COMMON
COMMON
600-10419-0001-000
p419
Joe Kwon
C633
4.7UF
6.3V
10%
X5R
0603
COMMON
C37
6.3V
20%
X5R
0805
COMMON
C576
1UF
6.3V
10%
X7R
0603
COMMON
C568
1UF
6.3V
10%
X7R
0603
COMMON
C603
1UF
6.3V
10%
X7R
0603
COMMON
10nH
COMMON
GND
2 OF 16
05-JUL-2006
GND
GND
GND
PEX1V2
C643
4.7UF
6.3V
10%
X5R
0603
COMMON
Page 3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
G86G72
FB_PLLAVDD
FB_PLLGND
2/12 FRAME_BUFFER
NC
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VTT
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_VDDQ
FB_CMD3
FB_CMD2
FB_CMD6
FB_CMD4
FB_CMD1
FB_CMD0
FB_CMD5
FB_CMD7
FB_CMD25
FB_CMD26
FB_CMD23
FB_CMD22
FB_CMD21
FB_CMD19
FB_CMD8
FB_CMD11
FB_CMD9
FB_CMD10
FB_CMD12
FB_CMD13
FB_CMD14
FB_CMD15
FB_CMD16
FB_CMD17
FB_CMD18
FB_CMD20
FB_CMD27
FB_CMD24
FB_CMD28
FB_CLK1
FB_CLK1
FB_CLK0
FB_CLK0
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
FB_DEBUG
FB_PLLAVDD
FB_PLLGND
H_PLLVDD
FB_DQ1
FB_DQ2
FB_DQ10
FB_DQ9
FB_DQ8
FB_DQ7
FB_DQ6
FB_DQ5
FB_DQ4
FB_DQ16
FB_DQ17
FB_DQ15
FB_DQ14
FB_DQ13
FB_DQ12
FB_DQ11
FB_DQ3
FB_DQ0
FB_DQ18
FB_DQ37
FB_DQ32
FB_DQ30
FB_DQ29
FB_DQ27
FB_DQ38
FB_DQ36
FB_DQ35
FB_DQ34
FB_DQ33
FB_DQ31
FB_DQ28
FB_DQ26
FB_DQ21
FB_DQ19
FB_DQ20
FB_DQ25
FB_DQ24
FB_DQ23
FB_DQ22
FB_DQ52
FB_DQ51
FB_DQ50
FB_DQ49
FB_DQ47
FB_DQ46
FB_DQ45
FB_DQ44
FB_DQ48
FB_DQ43
FB_DQ41
FB_DQ40
FB_DQ42
FB_DQ39
FB_DQ53
FB_DQ54
FB_DQ55
FB_DQ56
FB_DQ57
FB_DQ58
FB_DQ59
FB_DQM0
FB_DQS_WP3
FB_DQS_WP2
FB_DQS_WP1
FB_DQS_WP0
FB_DQM7
FB_DQM6
FB_DQM5
FB_DQM4
FB_DQM3
FB_DQM2
FB_DQM1
FB_DQ62
FB_DQ63
FB_DQ60
FB_DQ61
FB_DQS_RN7
FB_DQS_WP7
FB_DQS_RN3
FB_DQS_RN4
FB_DQS_RN1
FB_DQS_RN0
FB_DQS_WP6
FB_DQS_RN6
FB_DQS_RN5
FB_DQS_RN2
FB_DQS_WP4
FB_DQS_WP5
FB_VREF
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 3) FBA INTERFACE
FBAD<63..0>
4<>
FBAD<0>
0
FBAD<1>
1
FBAD<2>
2
FBAD<3>
3
FBAD<4>
4
FBAD<5>
5
FBAD<6>
6
FBAD<7>
7
FBAD<8>
8
FBAD<9>
9
FBAD<10>
10
FBAD<11>
11
FBAD<12>
12
FBAD<13>
13
FBAD<14>
14
FBAD<15>
15
FBAD<16>
16
FBAD<17>
17
FBAD<18>
18
FBAD<19>
19
FBAD<20>
20
FBAD<21>
21
FBAD<22>
22
FBAD<23>
23
FBAD<24>
24
FBAD<25>
25
FBAD<26>
26
FBAD<27>
27
FBAD<28>
28
FBAD<29>
29
FBAD<30>
30
FBAD<31>
31
FBAD<32>
32
FBAD<33>
33
FBAD<34>
34
FBAD<35>
35
FBAD<36>
36
FBAD<37>
37
FBAD<38>
38
FBAD<39>
39
FBAD<40>
40
FBAD<41>
41
FBAD<42>
42
FBAD<43>
43
FBAD<44>
44
FBAD<45>
45
FBAD<46>
46
FBAD<47>
47
FBAD<48>
48
FBAD<49>
49
FBAD<50>
50
FBAD<51>
51
FBAD<52>
52
FBAD<53>
53
FBAD<54>
54
FBAD<55>
55
FBAD<56>
56
FBAD<57>
57
FBAD<58>
58
FBAD<59>
59
FBAD<60>
60
FBAD<61>
61
FBAD<62>
62
FBAD<63>
4<>
4<>
4<>
4<>
4<>
4<>
4<>
4<>
SNN_FB_VREF
63
0
1
2
3
4
5
6
7
FBADQS0*
FBADQS1*
FBADQS2*
FBADQS3*
FBADQS4*
FBADQS5*
FBADQS6*
FBADQS7*
FBADQM<0>
FBADQM<1>
FBADQM<2>
FBADQM<3>
FBADQM<4>
FBADQM<5>
FBADQM<6>
FBADQM<7>
FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7
4<>
FBADQM<7..0>
4<>
4<>
4<>
4<>
4<>
4<>
4<>
4<>
A26
C24
B24
A24
C22
A25
B25
D23
G22
J23
E24
F23
J24
F24
G23
H24
D16
E16
D17
F18
E19
E18
D20
D19
A18
B18
A19
B19
D18
C19
C16
C18
N26
N25
R25
R26
R27
T25
T27
T26
AB23
Y24
AB24
AB22
AC24
AC22
AA23
AA22
T24
T23
R24
R23
R22
T22
N23
P24
AA24
AA27
AA26
AB25
AB26
AB27
AA25
W25
D21
F22
F20
A21
V27
W22
V22
V24
B22
D22
E21
C21
V25
W24
U24
W26
A22
E22
F21
B21
V26
W23
V23
W27
A16
G1
G86_TEST
BGA533
COMMON
E15
F15
F16
J17
J18
L19
N19
R19
U19
W19
F17
F19
J19
M19
T19
J22
L22
P22
U22
Y22
FBB_A<5..2>
3
4
5
2
R533
0402
R537
0402
R528
0402
3
0
2
1
12
11
10
8
9
6
5
7
4
1%
1%
1%
FBA_A<12..0>
60.4
COMMON
40.2
COMMON
40.2
COMMON
R526
0402
G27
D25
F26
F25
G25
J25
J27
M26
C27
C25
D24
N27
G24
J26
M27
C26
M25
D26
D27
K26
K25
K24
F27
K27
G26
B27
N24
M23
M24
L24
K23
M22
N22
D15
E13
H22
K22
FBA_A<3>
FBA_A<0>
FBA_A<2>
FBA_A<1>
FBB_A<3>
FBB_A<4>
FBB_A<5>
FBA_BA2
FBA_CS0*
FBA_WE*
FBA_BA0
FBA_CKE
FBA_ODT_GPU
FBB_A<2>
FBA_A<12>
FBA_RAS*
FBA_A<11>
FBA_A<10>
FBA_BA1
FBA_A<8>
FBA_A<9>
FBA_A<6>
FBA_A<5>
FBA_A<7>
FBA_A<4>
FBA_CAS*
SNN_FBA_A13
SNN_FBA_A14
SNN_FBA_A15
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBCAL_PD
FBCAL_PU
FBCAL_TERM
FBA_DEBUG
D14
FB_PLLAVDD
D13
C15
GND
FBVTT=FBVDDQ FOR UNTERMINATED MEMORIES
4<
4<
4<
4<
4<
0
R47
COMMON
0402
5%
4<
4<
4<
4<
4<
4<
4<
5%
GND
0
COMMON
FBVDDQ
GND
PLACE NEAR BALLS
GND
FBVDDQ
C530
.022UF
16V
10%
X7R
0402
COMMON
C504
.1UF
6.3V
10%
X7R
0402
COMMON
C30
4700PF
16V
10%
X7R
0402
COMMON
C507
.022UF
16V
10%
X7R
0402
COMMON
C41
.1UF
6.3V
10%
X7R
0402
COMMON
C26
4700PF
16V
10%
X7R
0402
COMMON
.022UF .1UF.022UF.1UF 1UF
6.3V
10%
X7R
0402
COMMON
C23
.1UF
6.3V
10%
X7R
0402
COMMON
C535
4700PF 4700PF
16V
10%
X7R
0402
COMMON
16V
10%
X7R
0402
COMMON
C509
.1UF
6.3V
X7R
0402
COMMON
C36
16V
10%
X7R
0402
COMMON
16V
10%
X7R
0402
COMMON
C40
.1UF
6.3V
10%10%
X7R
0402
COMMON
C43
4700PF
25V
10%
X7R
0402
COMMON
C20C42C517C32
6.3V
10%
X7R
0603
COMMON
C19
1UF
6.3V
10%
X7R
0603
COMMON
GND
C46
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X7R
0402
COMMON
GND
C49C48C47
.1UF.1UF.1UF
6.3V
10%
X7R
0402
COMMON
GND
4<
4<
C589
.01UF
16V
10%
X7R
0402
COMMON
FBA_ODT
PLACE NEAR GPU
C581
1UF
6.3V
10%
X5R
0402
COMMON
GND
GND
LB501
C579
4.7UF
6.3V
10%
X5R
0603
COMMON
220R@100MHz
COMMONBEAD_0402
FBA_CLK0
FBA_CLK1
Place the differential termination resistor at the end of the transmission line.
PEX1V2
R510
0402
0402
60.4
COMMON
1%
60.4R44
COMMON
1%
FBACLK_C0
FBACLK_C1
FBVDDQ
GND
FBVDDQ
GND
R45
0
5%
0402
NO STUFF
C29
.01UF
16V
10%
X7R
0402
NO STUFF
R512
0
5%
0402
NO STUFF
R508
C513
.01UF
16V
10%
X7R
0402
NO STUFF
R46
0402
0402
60.4
COMMON
1%
60.4
COMMON
1%
FBA_CLK0*
FBA_CLK1*
GPU MEMORY INTERFACE
www.vinafix.vn
600-10419-0001-000
p419
Joe Kwon
3 OF 16
05-JUL-2006
Page 4
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
INBIBIININININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIININBIININININININININBIININBIININ
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
IN
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
INININININ
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3>
A<4>
A<2>
A<1>
CS
RAS
WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10>
A<12>
NC/A<14>
A<6>
A<7>
A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE
CLK
CLK
ODT
NC
NC
INININININININ
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0>
DQ<1>
DQ<2>
DQ<7>
DQM
DQS
DQS
BI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 4) MEMORY PARTITION A
M501
16MX16DDR2-2.5
BGA84
COMMON
K7
0
1
2
3
4
5
6
7
8
9
10
11
12
SNN_R8_M1
SNN_R3_M1
SNN_R7_M1
FBA_BA0
FBA_BA1
FBA_BA2
FBA_CKE
FBA_CLK0
FBA_CLK0*
SNN_E2_M1
FBA_RAS*
FBA_CAS*
FBA_WE*
FBA_CS0*
FBA_A<0>
FBA_A<1>
FBA_A<2>
FBA_A<3>
FBA_A<4>
FBA_A<5>
FBA_A<6>
FBA_A<7>
FBA_A<8>
FBA_A<9>
FBA_A<10>
FBA_A<11>
FBA_A<12>
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2SNN_A2_M1
E2
3>
4<
3>
4<
3>
4<
3>
4<
FBA_A<13..0>
3> 4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
FBA_ODT
R527
10K
1%
0402
COMMON
GND
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
FBA_A<13..0>
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
GND
FBAVREF1
R503
0402
COMMON
R501
0402
COMMON
FBVDDQ
1K
1%
1K
1%
R1
C502
.1UF
16V
R2
10%
X5R
0402
COMMON
FBA_RAS*
FBA_CAS*
FBA_WE*
FBA_CS0*
FBA_A<0>
0
FBA_A<1>
1
FBA_A<2>
2
FBA_A<3>
3
FBA_A<4>
4
FBA_A<5>
5
FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M2
SNN_R3_M2
SNN_R7_M2
FBA_BA0
FBA_BA1
FBA_BA2
FBA_CKE
FBA_CLK0
FBA_CLK0*
FBA_ODT
SNN_A2_M2
SNN_E2_M2
GND
M1
16MX16DDR2-2.5
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3FBA_A<9>
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
FBVDDQ
2
3
4
5
FBA_BA0
FBA_BA1
FBA_BA2
FBA_CKE
FBA_CLK1
FBA_CLK1*
FBA_ODT
FBA_RAS*
FBA_CAS*
FBA_WE*
FBA_CS0*
FBA_A<0>
0
FBA_A<1>
1
FBB_A<2>
FBB_A<3>
FBB_A<4>
FBB_A<5>
FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
FBA_A<9>
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M3
SNN_R3_M3
SNN_R7_M3
SNN_A2_M3
SNN_E2_M3
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9M2
4< 3>
FBA_A<13..0>
FBB_A<5..2>
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
FBAVREF3
GND
R41
0402
COMMON
R40
0402
COMMON
4<
FBVDDQ
1K
1%
1K
1%
3> 4<
3>
R1
C22
.1UF
16V
R2
10%
X5R
0402
COMMON
GND
M2
16MX16DDR2-2.5
BGA84
COMMON
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
VREF = FBVDDQ * R2/(R1 + R2)
FBAVREF2
FBVDDQ
GND
R48
0402
COMMON
R49
0402
COMMON
FBVDDQ
1K
1%
1K
1%
GND
M502
16MX16DDR2-2.5
BGA84
COMMON
FBA_CKE
FBA_ODT
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
FBA_RAS*
FBA_CAS*
FBA_WE*
FBA_CS0*
2
3
4
5
FBA_A<0>
0
FBA_A<1>
1
FBB_A<2>
FBB_A<3>
FBB_A<4>
FBB_A<5>
FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
FBA_A<9>
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M4
SNN_R3_M4
SNN_R7_M4
FBA_BA0
FBA_BA1
FBA_BA2
FBA_CLK1
FBA_CLK1*
FBA_A<13..0>
FBB_A<5..2>
R1
3>
4<
FBVDDQ
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1P2
G3
G7
G9
J1
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
GND
J7
C44
R2
.1UF
16V
10%
X5R
0402
COMMON
FBA_CKE
SNN_A2_M4
SNN_E2_M4
GND
R502
10K
5%
0402
COMMON
A2
E2
J2
FBAVREF4
R519
1K
0402
COMMON
FBVDDQ
R520
1K
1%
0402
COMMON
C539
1%
GND
.1UF
16V
10%
X5R
0402
COMMON
3<> 4<>
4<> 3>
FBAD<63..0>
FBADQM<7..0>
M1
16MX16DDR2-2.5
BGA84
COMMON
C8
B9
D3
D9
B1
D7
D1
C2
B3
B7
A8
F9
G2
H3
G8
H1
F1
H7
H9
F3
F7
E8
M502
16MX16DDR2-2.5
BGA84
COMMON
FBAD<24>
24
FBAD<25>
25
FBAD<26>
26
FBAD<27>
27
FBAD<28>
28
FBAD<29>
29
FBAD<30>
30
FBAD<31>
31
FBADQM<3>
FBADQS3
FBADQS3*
FBAD<56>
56
FBAD<57>
57
FBAD<58>
58
FBAD<59>
59
FBAD<60>
60
FBAD<61>
61
FBAD<62>
62
FBAD<63>
63
FBADQM<7>
FBADQS7
FBADQS7*
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
FRAME BUFFER PARTITION A
H1
H3
F9
G2
H7
F1
G8
H9
F3
F7
E8
M502
16MX16DDR2-2.5
BGA84
COMMON
C8
D1
D3
B9
B1
D9
C2
D7
B3
B7
A8
M501
16MX16DDR2-2.5
BGA84
COMMON
FBAD<16>
16
FBAD<17>
17
FBAD<18>
18
FBAD<19>
19
FBAD<20>
20
FBAD<21>
21
FBAD<22>
22
FBAD<23>
23
FBADQM<2>
FBADQS2
FBADQS2*
FBAD<48>
48
FBAD<49>
49
FBAD<50>
50
FBAD<51>
51
FBAD<52>
52
FBAD<53>
53
FBAD<54>
54
FBAD<55>
55
FBADQM<6>
FBADQS6
FBADQS6*
M1
16MX16DDR2-2.5
BGA84
COMMON
FBAD<0>
0
FBAD<1>
1
FBAD<2>
2
FBAD<3>
3
FBAD<4>
4
FBAD<5>
5
FBAD<6>
6
FBAD<7>
7
FBADQM<0>
FBADQS0*
FBAD<32>
32
FBAD<33>
33
FBAD<34>
34
FBAD<35>
35
FBAD<36>
36
FBAD<37>
37
FBAD<38>
38
FBAD<39>
39
FBADQM<4>
FBADQS4
FBADQS4*
F9
H7
G8
F1
H9
G2
H1
H3
F3
F7FBADQS0
E8
M2
16MX16DDR2-2.5
BGA84
COMMON
H3
H1
H9
H7
G2
G8
F1
F9
F3
F7
E8
FBAD<8>
8
FBAD<9>
9
FBAD<10>
10
FBAD<11>
11
FBAD<12>
12
FBAD<13>
13
FBAD<14>
14
FBAD<15>
15
FBADQM<1>
FBADQS1
FBADQS1*
FBAD<40>
40
FBAD<41>
41
FBAD<42>
42
FBAD<43>
43
FBAD<44>
44
FBAD<45>
45
FBAD<46>
46
FBAD<47>
47
FBADQM<5>
FBADQS5
FBADQS5*
M501
16MX16DDR2-2.5
BGA84
COMMON
D9
D7
C2
C8
D3
B9
D1
B1
B3
B7
A8
M2
16MX16DDR2-2.5
BGA84
COMMON
D3
B9
D9
D1
B1
C2
C8
D7
B3
B7
A8
www.vinafix.vn
MIN_LINE_WIDTHNET
FBAVREF1
FBAVREF2
3>
4<
3>
4<
3>
4<
3>
4<
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3<>
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3<>
4<>
3>
4<>
3>
4<
3>
4<
3>
4<
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBADQS0
FBADQS0*
FBADQS1
FBADQS1*
FBADQS2
FBADQS2*
FBADQS3
FBADQS3*
FBADQS4
FBADQS4*
FBADQS5
FBADQS5*
FBADQS6
FBADQS6*
FBADQS7
FBADQS7*
FBA_A<12..0>
FBB_A<5..2>
FBA_BA0
FBA_BA1
FBA_CKE
FBA_BA2
FBA_RAS*
FBA_CAS*
FBA_WE*
FBA_CS0*
FBA_CS1*
FBAD<63..0>
FBADQM<7..0>
FBA_DEBUG
FBA_ODT
FBA_ODT_GPU
DIFFPAIRNET
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBADQS0
FBADQS0
FBADQS1
FBADQS1
FBADQS2
FBADQS2
FBADQS3
FBADQS3
FBADQS4
FBADQS4
FBADQS5
FBADQS5
FBADQS6
FBADQS6
FBADQS7
FBADQS7
16.00
16.00
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
VOLTAGE
0.9V
0.9V
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
50OHM
IMPEDANCECRITICAL
600-10419-0001-000
p419
Joe Kwon
4 OF 16
05-JUL-2006
Page 5
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 5) Memory Decoupling Caps
FBVDDQ
C35
.022UF
16V
10%
X7R
0402
COMMON
C515
.022UF
16V
10%
X7R
0402
COMMON
C39
.1UF
10V
10%
X5R
0402
COMMON
C533
.1UF
10V
10%
X5R
0402
COMMON
C522
.1UF
10V
10%
X5R
0402
COMMON
GND
C541
4.7UF
6.3V
10%
X5R
0603
COMMON
FBVDDQ
C574
.022UF
16V
10%
X7R
0402
COMMON
C528
.022UF
16V
10%
X7R
0402
COMMON
C512
.1UF
10V
10%
X5R X5R
0402
COMMON
C564
.1UF
10V
10%
0402
COMMON
C525
.1UF
10V
10%
X5R
0402
COMMON
C501
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
FBVDDQ
C33
.022UF
16V
10%
X7R
0402
COMMON
C508
.022UF
16V
10%
X7R
0402
COMMON
C24 C529
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMONCOMMON
C506
.1UF
10V
10%
X5R
0402
COMMON
C45
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
FBVDDQ
C521
.022UF
16V
10%
X7R
0402
COMMON
C25
.022UF
16V
10%
X7R
0402
COMMON
.1UF
10V
10%
X5R X5R
0402
COMMON
.1UF
10V
10%
0402
COMMON
C511C505 C503C28
.1UF
10V
10%
X5R
0402
COMMON
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
MEMORY DECOUPLING CAPS
www.vinafix.vn
600-10419-0001-000
p419
Joe Kwon
5 OF 16
05-JUL-2006
Page 6
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIOUT
OUT
OUT
OUT
3/12 DAC_A
DAC_A_VSYNC
DAC_A_HSYNC
I2CA_SCL
I2CA_SDA
DAC_A_IDUMP
DAC_A_BLUE
DAC_A_GREEN
DAC_A_RED
DAC_A_RSET
DAC_A_VREF
DAC_A_VDD
4/12 DAC_B
DAC_B_VSYNC
DAC_B_HSYNC
I2CB_SDA
I2CB_SCL
DAC_B_CSYNC
DAC_B_IDUMP
DAC_B_BLUE
DAC_B_GREEN
DAC_B_RED
DAC_B_RSET
DAC_B_VREF
DAC_B_VDD
10/12 XTAL_PLL
XTAL_OUT_BUF
XTAL_OUT
PLLGND
PLLVDD
XTAL_IN
XTAL_SS_IN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 6) DAC_A, DAC_B, DAC_C
G1
G86_TEST
BGA533
3V3RUN
LB502
BEAD_0603
180R@100MHz
COMMON
4.7UF 4700PF
6.3V
X5R
0603
COMMON
C621C628
25V
10%
X7R
0402
COMMON
12mil
10%
C620
470PF
50V
X7R
0402
COMMON
16V
10%
X7R
0402
COMMON
DACA_VDD
DACA_VREF
DACA_RSET
R560C629
124.01UF
1%10%
0402
COMMON
AE2
AB4
AD3
COMMON
D10
E10
AD4
AC4
AE1
AD1
AD2
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
R547
0402
33
R544
COMMON
0402
33
5%
COMMON
5%
3V3RUN
R553
4.7K
5%
0402
COMMON
3V3RUN
R546
4.7K
5%
0402
COMMON
I2CA_SCL_R
I2CA_SDA_R
8<
8<>
8<
NV_IMPEDANCENV_CRITICAL
1
1
1
50OHM
50OHM
50OHM
8<
8<
8<
8<
U9
R25
R26R27
1%
0402
COMMON
150
1%
0402
COMMON
GND
Place close to GPU
GND
124 ohm is good for G86M ?
GND
150 150
1%
0402
COMMON
GND
GND
3V3RUN3V3RUN
3V3RUN
LB507
BEAD_0603
180R@100MHz
COMMON
DACB_VREF
C644
4.7UF
X5R
0603
COMMON
GND
C636
4700PF
25V10%6.3V
X7R
0402
COMMON
C598
470PF
10%
50V 10%
X7R
0402
COMMON
C606
.01UF
16V
X7R
0402
COMMON
10%
DACB_VDD
12mil
DACB_RSET
GND
R549
124
1%
0402
COMMON
124 ohm is good for G86M ?
F8
E7
D6
G1
G86_TEST
BGA533
COMMON
F9
F10
E6
F5
F7
F4
E4
L9
I2CB_SCL
I2CB_SDA
SNN_DACB_HSYNC
SNN_DACB_VSYNC
SNN_DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUED5
GND
50OHM
50OHM
50OHM
R583
0402
R555
150
1%
0402
COMMON
33
COMMON
5%
R551
150
1%
0402
COMMON
5%
1
1
1
R558
150
1%
0402
COMMON
33
R582
COMMON
0402
R589
4.7K
5%
0402
COMMON
R574
4.7K
5%
0402
COMMON
I2CB_SCL_R
8<
8<
8<
I2CB_SDA_R
8<
8<>
GND
G1
G86_TEST
GND
H4
H5
C1
B1
NV_IMPEDANCENV_CRITIC
50OHM
BGA533
COMMON
BXTALOUT
C3
XTALOUT
C2
Y1
H10SSMD
XTAL_4PIN_HOSONIC
27 MHZ
+/-10 PPM
COMMON
NV_CRITIC NV_IMPEDANCE
1 50OHM
C654
22PF
50V
5%
C0G
0402
COMMON
GND
DAC A/B
www.vinafix.vn
R30
10K
5%
0402
COMMON
INTERNAL SS : STUFF
EXTERNAL SS : NO STUFF
GND
PEX1V2
C642
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
LB503
180R@100MHz
COMMONBEAD_0603
C641
1UF
10V
X5R
0603
COMMON
C630
4700PF
25V
10%
10%
X7R
0402
COMMON
11>
12mil
C624
470PF
50V
X7R
0402
COMMON
PLLVDD
10%
GND
SSFOUT
XTALIN
C652
22PF
50V
5%
C0G
0402
COMMON
1
R23
0402
5%
GND
22
COMMON
GND
XTALOUTBUFF
11<
600-10419-0001-000
p419
Joe Kwon 05-JUL-2006
6 OF 16
Page 7
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
S
D
G
A
A
B
B
CLOCK
DATA
5/12 IFP_AB
IFP_A_TXD1
IFP_A_TXD0
IFP_A_TXD0
IFP_A_TXD1
IFP_A_TXD2
IFP_A_TXD3
IFP_A_TXD3
IFP_A_TXD2
IFP_B_TXD4
IFP_B_TXD4
IFP_B_TXD5
IFP_B_TXD6
IFP_B_TXD6
IFP_B_TXD5
IFP_B_TXD7
IFP_B_TXD7
IFP_A_TXC
IFP_A_TXC
IFP_B_TXC
IFP_B_TXC
IFP_AB_VPROBE
IFP_AB_PLL_VDD
IFP_AB_PLL_GND
IFP_AB_RSET
IFP_A_IO_VDD
IFP_B_IO_VDD
DATA
CLOCK
12/12 IFPC
IFPC_TXD2
IFPC_TXD1
IFPC_TXD2
IFPC_TXD1
IFPC_TXD0
IFPC_TXD0
IFPC_TXC
IFPC_TXC
IFPC_VPROBE
IFPC_RSET
IFPC_PLL_VDD
IFPC_IO_VDD
IFPC_PLL_GND
D
SGS
D
G
S
DGD
S
G
INININ
D
SGS
D
G
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 7)LVDS / TMDS Interface
Loading options for IFPAB outputs
Option #1) IFPAB outputs to LVDS only.
Option #2) IFPAB outputs to DVI-C only.
Option #3) Controlled with GPIO9, IFPAB dynamically outputs to LVDS or DVI-C.
GPIO9_LVDS_SYS*
3V3RUN
FB_VCC
FB_PWRGOOD
R568
10K
0402
COMMON
1G1D1S
1
3V3RUN
5%
1G1D1S
1
3
Q510
SI2305DS
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
3
Q508
RTR040N03
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
GND
TMDSIOVDD_AB_EN*
1G1D1S
12
1V8RUN
Load for
option #3.
LVDSIOVDD_ISOL
3
Q511
RTR040N03
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
1G1D1S
R4
C650
10K
.1UF
5%
16V
0402
10%
COMMON
X7R
0402
COMMON
GND
G1
R545
1K
1%
0402
COMMON
N6
V5
U6
V6
W4
Y4
G86_TEST
BGA533
COMMON
R6
10K
5%
0402
COMMON
1V8RUN
GND
C649
4.7UF
6.3V
10%
X5R
0603
COMMON
180R@100MHz
COMMONBEAD_0603
C639
.1UF
16V
10%
X7R
0402
COMMON
C638
4.7UF
6.3V
10%
X5R X7R X7R
0603
COMMON
GND
C634
.022UF
16V
10%
X7R
0402
COMMON
LB504
C646
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
GND
Delay to
control
inrush
current on
IFPA_IOVDD.
180R@100MHz
COMMON
C9
.1UF
16V
10%
X7R
0402
COMMON
Load for
option
#1.
R1
0
5%
0402
NO STUFF
TMDS_LVDS_IOVDD
3
Q2
SI2305DS
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
Load for
options
#1 and #3.
RTR040N03
SOT23_1G1D1S
COMMON
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
C3
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
3
Q1
2
LVDS
Sequencing
Circuit
1G1D1S
1
LB509
BEAD_0603
12mil
16mil
TP502
IFPABVPROBE
IFPABPLLVDD
C623
4700PF
25V
10%
COMMON
IFPAIOVDD
C632
4700PF
25V
10%
X7R
0402
COMMON
IFPABRSET
C617
470PF
50V
10%
04020402
COMMON
C627
470PF
50V
10%
X7R
0402
COMMON
13>
13>
9>
Load for option #2.
180R@100MHz
LB1
NO STUFF
BEAD_0603
12mil
C626
4700PF
25V
X7R
0402
COMMON
IFPCVPROBE
IFPCPLLVDD
C619
470PF
50V
10%
X7R
0402
COMMON
IFPCBRSET
R29
1K
1%
0402
COMMON
1V8RUN
GND
C651
4.7UF
6.3V
10%
X5R
0603
COMMON
LB505
180R@100MHz
COMMONBEAD_0603
C637
4.7UF
6.3V
10% 10%
X5R
0603
COMMON
GND
TP501
3V3RUN
1G1D1S
11< 8> 12< 13<
1G1D1S
RUNPWROK 1
3
Q509
RTR040N03
SOT23_1G1D1S
COMMON
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C
R_DS_ON=0.066R@2.5V
MAX_CURRENT=16A
MAX_WATTAGE=1W@25C
V_BE_GS=12V
GND
TMDSIOVDD_C_EN*
R572
10K
5%
0402
COMMON
3
Q507
SI2305DS
SOT23_1G1D1S
1
COMMON
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
12milTMDSIOVDD_C
GND
C656
4.7UF
6.3V
10%
X5R
0603
COMMON
LB508
180R@100MHz
COMMONBEAD_0603
GND
C631
C648
.1UF
4.7UF
16V
6.3V
10%
10%
X7R
X5R
0402
0603
COMMON
COMMON
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
LVDS(LINK A/B), TMDS(LINK C/D)
www.vinafix.vn
12mil
C625
4700PF
25V
10%
X7R
0402
COMMON
C618
470PF
50V
10%
X7R
0402
COMMON
M5
M4
J3
M6
L4IFPC_IOVDD
G1
G86_TEST
BGA533
COMMON
LVDS
TMDS(SINGLE)
N5
N4
R4
R5
T6
T5
P6
R6
W2
W3
AA3
AA2
AA1
AB1
AB2
AB3
U4
T4
W6
W5
NV_CRITICAL_NET
NET NAME
IFPATXC*
IFPATXD0*
IFPATXD0
IFPATXD1*
IFPATXD1
IFPATXD2*
IFPATXD2
IFPATXD3*
IFPATXD3
IFPBTXD4*
IFPBTXD4
IFPBTXD5*
IFPBTXD5
IFPBTXD6*
IFPBTXD6
IFPBTXD7*
IFPBTXD7
IFPATXC
IFPATXCIFPATXC
IFPATXD0
IFPATXD0
IFPATXD1
IFPATXD1
IFPATXD2
IFPATXD2
IFPATXD3
IFPATXD3
IFPBTXCIFPBTXC*
IFPBTXCIFPBTXC
IFPBTXD4
IFPBTXD4
IFPBTXD5
IFPBTXD5
IFPBTXD6
IFPBTXD6
IFPBTXD7
IFPBTXD7
NV_IMPEDANCEDIFFPAIR
1 100DIFF
1 100DIFF
1 100DIFF
1 100DIFF
1 100DIFF
1 100DIFF
1 100DIFF
100DIFF1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF
1
100DIFF1
100DIFF1
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
8<
NV_CRITICAL_NET
NET NAME
R1
T1
T2
T3
V3
V2
W1
V1
IFPCTXD0*
IFPCTXD0
IFPCTXD1*
IFPCTXD1
IFPCTXD2*
IFPCTXD2
IFPCTXC*
IFPCTXC
IFPCTXD0
IFPCTXD0
IFPCTXD1
IFPCTXD1
IFPCTXD2
IFPCTXD2
IFPCTXC
IFPCTXC
NV_IMPEDANCEDIFFPAIR
1 100DIFF
1 100DIFF
100DIFF1
100DIFF1
100DIFF1
100DIFF1
100DIFF1
100DIFF1
8<
8<
8<
8<
8<
8<
8<
8<
600-10419-0001-000
p419
Joe Kwon
7 OF 16
05-JUL-2006
Page 8
ININININININININOUTININININININININININININININININININININININININ
DVI-BIGP
2/2 IO - LVDS,DVI,VGA,TV
HDTVSDTV
DVI_A_CLK
DVI_A_TX2
DVI_A_TX1
DVI_A_TX1
DVI_A_TX0
DVI_A_TX0
DVI_A_CLK
DVI_A_TX2
DVI_B_TX2
DVI_B_TX2IGP_LTX2
IGP_LTX2
DVI_B_TX0
DVI_B_CLK
DVI_B_CLK
DVI_B_TX1
DVI_B_TX0
DVI_B_TX1
IGP_RSVD
IGP_RSVD
IGP_RSVD
IGP_RSVD
IGP_RSVD
IGP_LTX1
IGP_RSVD
IGP_RSVD
IGP_RSVD
IGP_LTX0
IGP_LTX1
IGP_LCLK
IGP_LCLK
IGP_LTX0
IGP_RSVD
IGP_RSVD
IGP_RSVD
RSVD
RSVD
LVDS_UTX1
LVDS_UTX1
LVDS_UTX0
LVDS_UTX3
LVDS_UTX2
LVDS_UTX2
LVDS_UTX0
RSVD
GND
IGP_RSVD
RSVD
IGP_RSVD
IGP_RSVD
IGP_RSVD
LVDS_LTX0
LVDS_UCLK
LVDS_UCLK
LVDS_UTX3
LVDS_LTX0
LVDS_LTX1
LVDS_LTX3
LVDS_LCLK
LVDS_LTX2
LVDS_LTX3
LVDS_LTX2
LVDS_LTX1
LVDS_LCLK
DDCB_SCLK
DVI_A_HPD
DVI_B_HPD
DDCB_SDATA
HDTV_Y
HDTV_Pb
HDTV_PrTV_C
TV_CVBS
TV_Y
VGA_BLU
VSYNC
HSYNC
VGA_RED
VGA_GRN
DDCA_SCLK
DDCA_SDATA
LVDS_PPEN
DDCC_SDATA
LVDS_BLEN
DDCC_SCLK
LVDS_BL_BRGHT
RUNPWROK
THERM
SMB_CLK
SMB_DAT
AC/BATT*
SPDIF
OUTBIIN
OUTININININ
OUT
OUTININININBIININININBIINBI
OUTINOUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 8) MXM CONNECTOR
13<
CN1
CON_MXM_X16_EDGE
(N,NON)PHY(-X16,-HE)
NONPHY-X16
COMMON
219
9<
6>
6<>
9<
6>
6>
6>
6>
6>
6>
6>
6>
6>
6<>
9>
9>
9>
9< 9>
11<
9<>
11<>
9<>
9<
9>
7< 11<
12<
RUNPWROK
GND
R515
0402
C520
220PF
50V
5%
C0G
0402
COMMON
RUNPWROK_IN
1K
COMMON
1%
MOSFET GatesESD Protection for
DVI_A_HPD
I2CB_SCL_R
I2CB_SDA_R
DVI_B_HPD
DACB_GREEN
DACB_RED
DACB_BLUE
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL_R
I2CA_SDA_R
GPIO3_PPEN
GPIO4_BLEN
GPIO2_BL_PWM
I2CC_SCL_R
I2CC_SDA_R
SMB_DAT
SMB_CLK
THERM_ALERT*
9<
9>
AC_BATT*
SPDIF
R34
0402
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=2
49.9
COMMON
1%
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=2
SPDIF_MXM
217
232
230
193
140
136
144
153
151
148
152
156
155
157
224
228
226
222
220
145
147
149
169
170
16
221
237
239
231
233
225
227
201
203
207
209
213
215
189
191
171
185
161
159
195
197
181
179
177
175
173
187
167
165
143
141
163
186
184
180
178
174
172
168
166
162
160
216
214
210
208
204
202
198
196
192
190
SNN_DVI_B_TX2*
SNN_DVI_B_TX2
SNN_DVI_B_TX1*
SNN_DVI_B_TX1
SNN_DVI_B_TX0*
SNN_DVI_B_TX0
SNN_DVI_B_CLK*
SNN_DVI_B_CLK
SNN_IGP185
SNN_MXM_183183
SNN_IGP159
SNN_IGP195
SNN_IGP197
SNN_IGP1
SNN_IGP_LVDS_UTX1*
SNN_IGP_LVDS_UTX1
SNN_IGP2
SNN_RSVD1
SNN_RSVD2
SNN_RSVD3
IFPCTXC*
IFPCTXC
IFPCTXD0*
IFPCTXD0
IFPCTXD1*
IFPCTXD1
IFPCTXD2*
IFPCTXD2
JTAG_TDI_C
JTAG_TRST_C
JTAG_TCLK_C
JTAG_TMS_C
JTAG_TDO_C
Pin 187 on MXM connector should be GND when not SLI
GND
IFPBTXD4
IFPBTXD4*
IFPBTXD5
IFPBTXD5*
IFPBTXD6
IFPBTXD6*
IFPBTXD7
IFPBTXD7*
IFPBTXC
IFPBTXC*
IFPATXD0
IFPATXD0*
IFPATXD1
IFPATXD1*
IFPATXD2
IFPATXD2*
IFPATXD3
IFPATXD3*
IFPATXC
IFPATXC*
7>
7>
7>
7>
7>
7>
7>
7>
9<
9<
9<
9<
9>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
7>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
MXM CONNECTOR
www.vinafix.vn
600-10419-0001-000
p419
Joe Kwon
8 OF 16
05-JUL-2006
Page 9
OUTININBIOUTINOUT
OUT
OUT
OUT
OUT
OUT
IN
S
D
G
S
DGS
D
G
VDD
THERM
ALERT
GND
D+
D-
SDA
SCL
INBIOUT
6/12 MISC1
G72G86
GPIO0
GPIO1
5V_CLAMP
I2CC_SDA
I2CC_SCL
GPIO2
GPIO9
GPIO8
GPIO7
GPIO3
GPIO4
GPIO5
GPIO6
GPIO14
GPIO13
GPIO12
GPIO10
GPIO11
JTAG_TCK
THERMDN
THERMDP
JTAG_TMS
I2CS_SDA GND
I2CS_SCL NC
JTAG_TRST
JTAG_TDO
JTAG_TDI
SPDIF
INBIIN
OUTININ
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 9) GPIO, JTAG, TEMP SENSOR, SPDIF
3V3RUN
R573
200
5%
0402
12mil
R581
0402
COMMON
THERM_VDD
5%
D11
E9
D8
A9
D9
A10
B10
C10
C12
B12
A12
A13
B13
B15
A15
B16
C13
E12
C647
.1UF
16V
10%
X7R
0603
COMMON
GND
0
COMMON
R569
SNN_5V_CLAMP
I2CC_SCL
I2CC_SDA
GPIO0_DVI_A_HPD
GPIO1_DVI_B_HPD
GPIO2_BL_PWM
GPIO3_PPEN_GPU
GPIO4_BLEN_GPU
GPIO5_NVVDDCTL0
GPIO6_NVVDDCTL1
SNN_GPIO7
GPIO8_THERM_ALERT*
GPIO9_LVDS_SYS*
SNN_GPIO10
SNN_GPIO11
GPIO12_AC_DET
SNN_GPIO13
SNN_GPIO14
0402
R567
10k
5%
0402
COMMON
R578
0402
0402
3V3RUN
R575
2.2K
5%
0402
COMMON
THERM_ALERT*
NV_PWRGOOD
1G1D1S
4
V_BE_GS=8V
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
R565
10K
5%
0402
COMMON
3
2
Q505
COMMON
FDC6301N
MAX_VOLTAGE=25V
SOT23_6D_1G1D1S
R37
10K
5%
0402
COMMON
MAX_WATTAGE=1W@25C
MAX_CURRENT=16A
V_BE_GS=12V
R_DS_ON=5R
V_BE_GS=8V
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
CONTINUOUS_CURRENT=0.22A
1
1G1D1S
5
6
Q505
COMMON
FDC6301N
MAX_VOLTAGE=25V
SOT23_6D_1G1D1S
CONTINUOUS_CURRENT=0.22A
33
COMMON
5%
0R36
COMMON
5%
R33
10K
5%
0402
COMMON
1
SOT23_1G1D1S
RTR040N03
COMMON
MAX_VOLTAGE=30V
R_DS_ON=0.066R@2.5V
CONTINUOUS_CURRENT=4A@25C
2
1G1D1S
3
R561
10K
5%
0402
COMMON
Q506
GPIO3_PPEN
GPIO4_BLEN
AC_BATT*
13< 12>
10K
R570
COMMON
0402
8<
8<
8<
12<
12<
7<
8>
D501
BAV99
SOT23
215MA
COMMON
3V3RUN
2
70V
1
GND
5%
3
R532
100K
5%
0402
COMMON
3V3RUN
R577
2.2K
5%
0402
COMMON
0402 COMMON
5%
3V3RUN
2
D502
BAV99
3
SOT23
70V
215MA
COMMON
1
GND
R538
100K
5%
0402
COMMON
8<
R576
2.2K
5%
0402
COMMON
I2CC_SCL_R
I2CC_SDA_R
10KR559
DVI_A_HPD
DVI_B_HPD
9< 11<
8<
9<> 11<>
8<>
8>
8>
3V3RUN
0
COMMON
5%
33
R579
COMMON
0402
5%
I2C ADDRESS: 0x98H
NOSTUFF for internal sensor
U2
MAX6649MUA
SO8_122MIL
COMMON
THERM_SCL 8
THERM_SDA 7
C9
B9
AE27
AD26
AD27
AE26
AD25
D12
F12
F11
I2CS_SDA
2
3
G1
G86_TEST
BGA533
COMMON
10MIL
10V
10%
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
SPDIF
I2CS_SCL
10MIL
THERM*
THERM
Stuff for
8< 9> 11<
8<> 9<> 11<>
I2CC_SCL_R
8<
8<
8>
8<
8<
connecting ExtThermalSensor to DDCC
R586
0402I2CC_SDA_R
5%
JTAG_TCLK_C
JTAG_TMS_C
JTAG_TDI_C
JTAG_TDO_C
JTAG_TRST_C
RP501
RP501
RP501
RP501
R552
NO STUFF COMPLIANT
TESTING ONLY. NO ICT.
0
COMMON
0.05R_MAX
0402
4
2
3
1
0402X4
5%
R585
0402
0
5
0
7
0
6
0
8
0
COMMON
0
COMMON
5%
3V3RUN
3V3RUN3V3RUN
R563
R39
R564
180
5%
0402
COMMON
R566
270
5%
0402
COMMON
GNDGND
10K
5%
0402
COMMON
R556
10K
5%
0402
COMMON
10K
5%
0402
COMMON
8>
3V3RUN
2200PF
0402
X5R
COMMON
C4
3V3RUN
1
M_THERM_ALERT*
4
M_GPIO8_SLOWDOWN*
6
5
GND
GND
0
R590
DNI
0402
5%
0
R591
DNI0402
5%
NOSTUFF,
except to
8>
8<>
connect
SMBus to
external
sensor.
SMB_CLK
SMB_DAT
ONLY for IntThermalSensor
tied to SMBus
R593
47K
5%
0402
COMMON
R584
R587
47K
5%
0402
COMMON
0
R594
COMMON
0402
0
5%
COMMON0402
5%
ONLY FOR IntThermalSensor
NOT connected
R592
47K
5%
0402
COMMON
R595
47K
5%
0402
COMMON
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
GPIO. JTAG, TEMP SENSOR, SPDIF
www.vinafix.vn
GND
GND
GND
GND
GND
600-10419-0001-000
p419
Joe Kwon
9 OF 16
05-JUL-2006
Page 10
11/12 _GND_
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
OUT
OUT
OUT
OUT
OUT
OUT
VCC
GND
HOLD
WP
CS
SI
SCK
SO
VCC
VCC
GND
GND
SCL
SDA
NC
SDA
9/12 MIO_B
MIO_B_D0
MIO_B_D1
MIO_B_D2
MIO_B_D3
MIO_B_D4
MIO_B_D5
MIO_B_D6
MIO_B_D7
MIO_B_D8
MIO_B_D9
MIO_B_D10
MIO_B_D11
MIO_B_VSYNC
MIO_B_HSYNC
MIO_B_DE
MIO_B_CLKIN
MIO_B_CLKOUT
MIO_B_CLKOUT
MIO_B_CTL3
MIO_B_VDDQ
MIO_B_VDDQ
MIO_B_VDDQ
MIO_B_VREF
MIO_B_CAL_PD_VDDQ
MIO_B_CAL_PU_GND
7/12 MISC2
ROM_SCLK
I2CH_SCL
I2CH_SDA
ROM_SI
ROM_SO
ROM_CS
GND
TESTMODE
SWAPRDY
BUFRST
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 10) MIOB, VBIOS, HDCP BIOS
3V3RUN
G1
G86_TEST
BGA533
C613
.1UF
6.3V
10%
X7R
0402
COMMON
PLACE CLOSE TO BALLS
SNN_MIOB_CAL_PD_VDDQ
SNN_MIOB_CAL_PU_VDDQ
SNN_MIOB_VREF
COMMON
K5
K6
L6
J5
M3
J4
G1
G86_TEST
BGA533
COMMON
MIOB
F3
D3
D2
C7
B7
A6
A7
D7
AC8
ROMCS*D1
ROM_SO
ROM_SI
ROM_SCLK
I2CH_SCL
I2CH_SDA
SNN_BUFRST*
SWAPRDY_A
TESTMODE
G2
G3
J2
J1
K4
K1
M2
M1
N1
N2
N3
R3
F1
G4
G1
F2
K2
K3
R2
GNDGND
RAMCFG0
RAMCFG1
SNN_MIOBD<2>
SNN_MIOBD<3>
SNN_MIOBD<4>
SNN_MIOBD<5>
SNN_MIOBD<6>
SNN_MOBILE_BIT
RAMCFG2
RAMCFG3
SNN_ROM_TYPE_0
PCI_DEVID3
SNN_MIOB_VSYNC
SNN_MIOB_HSYNC
SNN_MIOB_DE
PCI_DEVID4
SNN_MIOB_CLKOUT
SNN_MIOB_CLKOUT*
MIOB_CLKIN
R14
10K
5%
0402
COMMON
R571
10K
5%
0402
COMMON
3V3RUN
GND
2.2K
0402
COMMON
R7
10K
5%
0402
COMMON
3V3RUN
R5
5%
14>
14>
14>
14>
14>
14>
3V3RUN
R21
10K
5%
0402
COMMON
R10
10K
5%
0402
COMMON
GND
U3
HDCP_KEYROM_PROGD
SO8
COMMON
6
5
3
2SNN_HDCP_ROM
3V3RUN
8
7
4
1
GND
C657
.1UF
10V
10%
X5R
0402
COMMON
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
MIOB, VBIOS, HDCP ROM
www.vinafix.vn
ROMCS*
ROM_SO
ROM_SI
3V3RUN
7
3
1
5
2
6ROM_SCLK
U1
AT25F512AN
SO8
SO8
COMMON
3V3RUN
8
4
G1
G86_TEST
BGA533
COMMON
B2
E2
H2
L2
P2
U2
Y2
AC2
AF2
AF3
B5
E5
L5
P5
U5
Y5
AC5
H6
AF6
B8
E8
AD8
K9
P9
V9
AD9
AF9
B11
E11
L11
P11
U11
AD11
N12
P12
R12
AD12
AF12
N13
P13
R13
B14
E14
J14
L14
N14
P14
R14
U14
W14
AC14
AD14
N15
P15
R15
AF15
N16
P16
R16
AD16
B17
E17
L17
C8
.1UF
10V
10%
X5R
0402
COMMON
GND
P17
U17
AD17
AF18
K19
P19
V19
AD19
B20
E20
AD20
AF21
B23
E23
H23
L23
P23
U23
Y23
AC23
AF24
B26
E26
H26
L26
P26
U26
Y26
AC26
AF26
GND
600-10419-0001-000
p419
Joe Kwon
10 OF 16
05-JUL-2006
Page 11
OUTININ
8/12 MIO_A
MIO_A_D10
MIO_A_D7
MIO_A_D6
MIO_A_D0
MIO_A_D1
MIO_A_D2
MIO_A_D3
MIO_A_D4
MIO_A_D5
MIO_A_D8
MIO_A_D9
MIO_A_HSYNC
MIO_A_VDDQ
MIO_A_VDDQ
MIO_A_VDDQ
VDD
FS_IN0
CLKOUT/
REFOUT/
FS_IN1
GND
CLKIN
PD
SDATA
SCLK
ININBI
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 11) SPREAD SPECTRUM, MIOA
3V3RUN
R580
10K
5%
2
4
5
3
SS_OUT
SS_REF
0402
COMMON
CLK_VDD
R3
10K
5%
0402
COMMON
U4
ICS91730BM
SO8
COMMON
13<
7< 8> 12<
6>
9< 8<
9>
8<> 9<>
I2C ADDRESS: 0xD4H
RUNPWROK
XTALOUTBUFF
I2CC_SCL_R
I2CC_SDA_R
8
1
7
6
3V3RUN
C612
.1UF
10V
10%
X5R
0402
COMMON
GND
Place close to ICS91720
G1
G86_TEST
BGA533
COMMON
F6
G6
J6
C660
4.7UF
6.3V
10%
X5R
0603
COMMON
0402
12mil
22
R2
COMMON
5%
C655
4.7UF
6.3V
10%
X5R
0603
COMMON
3.3V
MIOA
SSFOUT
C659
.1UF
10V
10%
X5R
0402
COMMON
6<
3V3RUN
4.7
R588
COMMON
0402
5%
C658
470PF
50V
10%
X7R
0402
COMMON
GND
A2
B3
A3
D4
A4
B4
B6
P4
C6
G5
V4
PEX_PLL_EN
SNN_MIOAD<1>
SNN_MIOAD<2>
SNN_MIOAD<3>
SNN_MIOAD<4>
SNN_MIOAD<5>
SNN_MIOAD<6>
SNN_MIOAD<7>
SNN_MIOAD<8>
SNN_MIOAD<9>
SNN_MIOAD<10>
14>
C4
14>
PEX_CLK_CFG
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
www.vinafix.vn
SPREAD SPECTURM, MIOA
600-10419-0001-000
p419
Joe Kwon
11 OF 16
05-JUL-2006
Page 12
S
D
G
S
D
G
S
D
G
OUT
IN
S
D
G
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO
FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
IN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 12: NVVDD
5VRUN
4
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
R_DS_ON=3.2mR
MAX_CURRENT=200A
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
GND
PWR_SRC
5
Q3
BSC119N03S
LFPAK
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A
2
R_DS_ON=18mR@4.5V
MAX_CURRENT=120A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
11A
Rtop
R525
3.01K
1%
0402
COMMON
RbotRbot0
R524
4.42K
1%
0402
COMMON
11< 8> 7< 13<
13< 9<
G86M
1.1V
1.0V
GND
NV_PWRGOOD
RUNPWROK
RTop
3.01K
6269: No Stuff
6269A: Stuff
R534
0402
5%
C616
1UF
6.3V
10%
X5R
0402
COMMON
9>
9>
4.42K || 17.8K
4.42K3.01K
0
NO STUFF
550Khz
R550
30K
5%
0402
COMMON
GND
GPIO6_NVVDDCTL1
GPIO5_NVVDDCTL0
RBot
NV_VCC
R539
10K
5%
0402
COMMON
U502
ISL6269CRZ
VR_SW=0.6V
MLFP16
MLFP16
COMMON
12
2
R541
0
DEM_DIS
5%
C590
0402
1UF
NO STUFF
6.3V
10%
X5R
0402
COMMON
GND
NV_FCCM
R535
0
DEM_EN
5%
0402
COMMON
3
16
4
TP
R543
NV_COMP
0402
7
5
68K
COMMON
5%
C609
0402
NV_FSET
C614
.01UF
16V
10%
X5R
0402
COMMON
3V3RUN
47PF
50V
5%
C0G
CHANGED
1
LFPAK
NV_BOOT
R554
0402
NV_DH
20MIL
R562
0402
NV_PHASE
16MIL
5%
NV_DL
20MIL
5%
0
5.6K
COMMON
C615
1000PF
16V
10%
X7R
0402
COMMON
C622.1UFNV_BOOTC
25V 0603COMMON
10%
COMMON
X7R
LFPAK
5
Q4
BSC032N03S
LFPAK
4
COMMON
1
2
3
14
13
15
9
11
10
NV_ISEN
8
6
GND
.01UF
C610NV_COMP1
16V
0402
10%
X5R
COMMON
10MIL
NV_FB
Rbot1
1G1D1S
R530
17.8K
0402
COMMON
NVCTL0_R
1%
3
Q504
RHU002N06
SOT323_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
GND
High
Low
R521
2.2K
5%
0402
COMMON
R529
8.87K
1%
1G1D1S
.1UF
16V
10%
X7R
COMMON
0402
COMMON
NVCTL1_R
1NVVDDCTL1
3
Q502
RHU002N06
SOT323_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
GND
C583
0402
.1UF
16V
10%
X7R
COMMON
NVVDDCTL0 1
R542
2.2K
5%
0402
COMMON
GPIO6GPIO5
R523
10K
COMMON
0402
5%
R522
10K
5%
0402
COMMON
GND
GND
0402
R536
10K
5%
0402
COMMON
R540
5%
C550
10K
COMMON
0402
1.Vout = ((Rt +Rb)/Rb) x 0.6
www.vinafix.vn
Input Ripple approx 5.4A
SMD_420X400
C14
2200PF
50V
10%
X7R
0402
COMMON
C7
4.7UF
25V
10%
X5R
1206
COMMON
GND
L3
SMD_6X6 COMMON
L1
SMD_6X6
L2
16MIL
GND
GND
C11
4.7UF
10%
X5R
1206
COMMON
NV_SNUBBER
R38
2.21
1%
1206
COMMON
C5
4.7UF
C555
.1UF
25V
10%
X5R
0603
COMMON
GND
D1
1
IR10MQ040N
SMA
40V
2.1A
2
COMMON
GND
R531
10
1%
0402
NO STUFF
NV_COMP2
C563
.047UF
16V
10%
X7R
0402
NO STUFF
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
NVVDD POWER SUPPLY
25V 25V
10%
X5R
1206
COMMON
GND
2.2UH
2.2UH
COMMON
1uH
NO STUFF
VOLTAGE NODE PROPERTIES
MIN
SOURCE
POWER
WIDTH
NETVOLTAGE
12.00
TRUE
GND
3.3V
1.8V
2.5V
5.0V
22V
1.2V
1.2V
1.8V
TRUE
TRUE
TRUE
TRUE
16.00
12.00
12.00
30.00
16.00
12.00
12.00
12.00
3V3RUN
1V8RUN
2V5RUN
5VRUN
PWR_SRC
NVVDD NVVDD
PEX1V2
FBVDDQ
C6
4.7UF
25V
10%
X5R
1206
COMMON
GND
MAX CURRENTLINE
1.5A
3.5A
0.5A
0.5A
4A
11A
2A
6A
3V3RUN
1V8RUN
2V5RUN
5VRUN
PWR_SRC
PEX1V2
FBVDDQ
GND
NVVDD=1.0V ~ 1.2V
NVVDD
NVVDD
C18
220UF
COMMON
+/-20%
2.5V
POSCAP
3.1A
0.015R
SMD_7343
GND
C15
220UF
COMMON
+/-20%
2.5V
POSCAP
3.1A
0.015R
SMD_7343
GND
11A
C21
4.7UF
6.3V
10%
X5R
0805
COMMON
GND
600-10419-0001-000
p419
Joe Kwon
12 OF 16
05-JUL-2006
Page 13
S
D
G
S
DGVOUT
VOUT
FB
VCNTL
GND
VIN
VIN
EN
POK
IN
OUT
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO
FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
OUT
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 13) FBVDD, PEX1V2
5VRUN
1V8RUN
12<
8> 7<
11<
C12
1UF
10V
10%
X5R
0603
COMMON
FB_PWRGOOD
GND
R31
0402
5%
0
NO STUFF
Vout = Vref * (1 + Rtop / Rbot)
RUNPWROK
R32
1K
5%
0402
COMMON
6
5
8
7
U5
APL5913
SOP8
COMMON
GND
PEX1V2
3
49
PEX1V2_FB2
1
C10
470PF
16V
10%
X7R
0402
COMMON
Rtop
R19
511
1%
0402
COMMON
Rbot
R18
1.02K
1%
0402
COMMON
C13
10UF
6.3V
20%
X5R
0805
COMMON
GND
1.2V = 0.8V * (1 + 511 /1.02k)
GND
PEX1V2 LINEAR SUPPLY
5VRUN
5%
GND
0
R518
NO STUFF
0402
5%
R507
33K
5%
0402
COMMON
GND
C526
1UF
6.3V
10%
X5R
0402
COMMON
GND
7<
12> 9<
7<
FB_PWRGOOD
NV_PWRGOOD
FB_VCC
0
R516
NO STUFF
0402
FBVDDQ SWITCHER
U501
ISL6269CRZ
VR_SW=0.6V
MLFP16
MLFP16
COMMON
12
FB_FSET
C514
1000PF
16V
10%
X7R
0402
COMMON
C527
1UF
6.3V
10%
X5R
0402
COMMON
NO STUFF
R514
DEM_DIS
0
5%
0402
NO STUFF
FB_FCCM
R513
DEM_EN
0
5%
0402
COMMON
FB_COMP
2
3
16
4
7
TP
5
R509
0402 COMMON
5%
62K
C516
0402
47PF
50V
5%
C0G
COMMON
C518FB_COMP1
0402
PWR_SRC
1
LFPAK
FB_DH14
20MIL
FB_BOOT13
15
FB_ISEN
9
11
R517
0402
FB_PHASE
16MIL
FB_DL
20MIL
5%
R511
0402
0
COMMON
1%
3.32K
COMMON
10
C532
.1UFFB_BOOTC
0603
25V
10%
COMMON
X7R
LFPAK
C523
1000PF
16V
10%
X7R
0402
COMMON
8
6
4700PF
16V
10%
X7R
COMMON
FB_FB
5
Q503
BSC119N03S
LFPAK
4
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A
2
R_DS_ON=18mR@4.5V
MAX_CURRENT=120A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
5
Q501
BSC032N03S
LFPAK
4
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR
MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W
V_BE_GS=+/-20V
GND
6.0A
16MIL
GND
C534
2200PF
50V
10%
X7R
0402
COMMON
FB_SNUBBER
R42
2.21
1%
1206
COMMON
1
2
GND
Vout = Vref * (1 + Rtop / Rbot)
1.8V = 0.6V * (1 + 3.09k/1.54k)
For detailed voltage calculation see P473_Voltage_calculator.xls
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
FBVDDQ POWER SUPPLY
www.vinafix.vn
GND
17.0mOhm MAX
L4
SMD_6X6
D2
BAT43
SOD323
40V
400MA
COMMON
C16
4.7UF
25V
10%
X5R
1206
COMMON
COMMON
1UH
FBVDDQ=1.8V
Approx. 5A @ 600MHz
Input Ripple approx 2.2A
C17
4.7UF
25V
10%
X5R
1206
COMMON
GND
FBVDDQ
GNDGNDGND
C31
100UF
COMMON
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
600-10419-0001-000
p419
Joe Kwon
13 OF 16
05-JUL-2006
GND
Rtop
R504
3.09K
1%
0402
COMMON
Rbot
R506
1.54K
1%
0402
COMMON
C510
.047UF
16V
10%
X7R
0402
NO STUFF
NO STUFF
FB_COMP2
R505
22
5%
0402
NO STUFF
NO STUFF
C38
100UF
COMMON
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
C34
100UF
COMMON
+/-20%
4.0V
POSCAP
1.4A
0.035R
SMD_3528
Page 14
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PAGE 14) STRAPS
STRAP BIT LOGIC 0
LOGIC 1
REG: NV_STRAP_0
3V3RUN
0
1
10>
10>
10>
10>
RAMCFG0
RAMCFG1
RAMCFG2
RAMCFG3
2
3
4
5
10
R16
0402
R20
0402
R13
0402
R17
0402
5%
5%
5%
5%
10K
NO STUFF
10K
NO STUFF
10K
COMMON
10K
COMMON
RAMCFG0
RAMCFG1
RAMCFG2
RAMCFG3
R12
0402
5%
R24
0402
5%
R8 10K
0402
5%
R22
0402
5%
10K
COMMON
10K
COMMON
NO STUFF
10K
NO STUFF
11
10>
10>
11<
PCI_DEVID3
PCI_DEVID4
PEX_PLL_EN
12
13
28
17
R9
10K
04025%COMMON
PCI_DEVID3
PCI_DEVID4
PEX_PLL_EN
R11
0402
R28
0402
R15
0402
MIOBD<11>
2K
COMMON
5%
MIOB_CTL3
2K
COMMON
5%
2K
COMMON
5%
PCI_AD_SWAP
SUB_VENDOR
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
PCI_DEVID_4(USED FOR G9X)
PEX_PLL_EN_TERM100
0: REVERSED
1: NORMAL
DEFAULT
0: SYSTEM BIOS
1: ADAPTER BIOS DEFAULT
RAM_CFG[3:0] Config Definitions
0000 16Mx16 DDR2 Elpida
0001 16Mx16 DDR2 Samsung
0010 16Mx16 DDR2 Infineon
0011 16Mx16 DDR2 Hynix
0100 Reserved
0101 32Mx16 DDR2 Samsung
0110 32Mx16 DDR2 Infineon
0111 32Mx16 DDR2 Hynix
REG: NV_STRAP_1
11<
PEX_CLK_CFG
15
R557
04025%COMMON
GND
10K
PEX_CLK_CFG
GND
MEC2
1
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
2
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
3
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
4
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
1
MEC1
MXM_I_MOUNTING_HOLES
X2
COMMON
2
MEC1
MXM_I_MOUNTING_HOLES
X2
COMMON
R548
0402
2K
COMMON
5%
SLOT_CLOCK_CFG
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
STRAPS
www.vinafix.vn
600-10419-0001-000
p419
Joe Kwon
14 OF 16
05-JUL-2006
Page 15
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Title: Basenet Report
Design: p419
Date: Jul 21 11:21:19 2006
Base nets and synonyms for
p419_lib.P419(@p419_lib.p419(sch_1))
Base Signal Location([Zone][dir])
AC_BATT* 8.4B> 9.3F<
BXTALOUT 6.4D
CLK_VDD 11.2C
DACA_BLUE 6.2H> 8.3A<
DACA_GREEN 6.1H> 8.3A<
DACA_HSYNC 6.1H> 8.3A<
DACA_RED 6.1H> 8.3A<
DACA_RSET 6.1C
DACA_VDD 6.1C
DACA_VREF 6.1C
DACA_VSYNC 6.1H> 8.3A<
DACB_BLUE 6.3F> 8.3A<
DACB_GREEN 6.3F> 8.2A<
DACB_RED 6.3F> 8.3A<
DACB_RSET 6.3C
DACB_VDD 6.3C
DACB_VREF 6.3C
DVI_A_HPD 8.2A> 9.3H<
DVI_B_HPD 8.2A> 9.3H<
FBACLK0 3.3G
FBACLK0* 3.3H
FBACLK1 3.4G
FBACLK1* 3.4H
FBACLK_C0 3.3G
FBACLK_C1 3.4G
FBAD<0> 3.1C 4.4B
FBAD<63..0> 3.1B<> 4.4A<> 4.5F<>
FBAD<1> 3.1C 4.4B
FBAD<2> 3.1C 4.4B
FBAD<3> 3.1C 4.4B
FBAD<4> 3.1C 4.4B
FBAD<5> 3.1C 4.4B
FBAD<6> 3.1C 4.4B
FBAD<7> 3.1C 4.4B
FBAD<8> 3.1C 4.4C
FBAD<9> 3.1C 4.4C
FBAD<10> 3.1C 4.4C
FBAD<11> 3.1C 4.4C
FBAD<13> 3.1C 4.4C
FBAD<14> 3.1C 4.4C
FBAD<15> 3.1C 4.4C
FBAD<16> 3.1C 4.4D
FBAD<17> 3.1C 4.4D
FBAD<18> 3.1C 4.4D
FBAD<19> 3.2C 4.4D
FBAD<20> 3.2C 4.4D
FBAD<21> 3.2C 4.4D
FBAD<22> 3.2C 4.4D
FBAD<23> 3.2C 4.4D
FBAD<24> 3.2C 4.4D
FBAD<25> 3.2C 4.4D
FBAD<26> 3.2C 4.4D
FBAD<27> 3.2C 4.4D
FBAD<28> 3.2C 4.4D
FBAD<29> 3.2C 4.4D
FBAD<30> 3.2C 4.4D
FBAD<31> 3.2C 4.4D
FBAD<32> 3.2C 4.4B
FBAD<33> 3.2C 4.4B
FBAD<34> 3.2C 4.4B
FBAD<35> 3.2C 4.5B
FBAD<36> 3.2C 4.5B
FBAD<37> 3.2C 4.5B
FBAD<38> 3.2C 4.5B
FBAD<39> 3.2C 4.5B
FBAD<40> 3.2C 4.4C
FBAD<41> 3.2C 4.4C
FBAD<42> 3.2C 4.4C
FBAD<43> 3.2C 4.5C
FBAD<44> 3.2C 4.5C
FBAD<45> 3.2C 4.5C
FBAD<46> 3.2C 4.5C
FBAD<47> 3.2C 4.5C
FBAD<48> 3.2C 4.4D
FBAD<49> 3.3C 4.4D
FBAD<50> 3.3C 4.4D
FBAD<51> 3.3C 4.5D
FBAD<52> 3.3C 4.5D
FBAD<53> 3.3C 4.5D
FBAD<54> 3.3C 4.5D
FBAD<55> 3.3C 4.5D
FBAD<56> 3.3C 4.4D
FBAD<57> 3.3C 4.4D
FBAD<58> 3.3C 4.4D
FBAD<59> 3.3C 4.5D
FBAD<60> 3.3C 4.5D
FBAD<61> 3.3C 4.5D
FBAD<62> 3.3C 4.5D
FBAD<63> 3.3C 4.5D
FBADQM<0> 3.3C 4.4B
FBADQM<7..0> 3.3B> 4.4A<> 4.5F<>
FBADQM<1> 3.3C 4.4C
FBADQM<2> 3.3C 4.4D
FBADQM<3> 3.3C 4.4D
FBADQM<4> 3.3C 4.5B
FBADQM<5> 3.3C 4.5C
FBADQM<6> 3.3C 4.5D
FBADQM<7> 3.3C 4.5D
FBADQS0 3.3C<> 4.4B 4.4F<>
FBADQS0* 3.4C<> 4.4B 4.4F<>
FBADQS1 3.3C<> 4.4C 4.4F<>
FBADQS1* 3.4C<> 4.4C 4.4F<>
FBADQS2 3.4C<> 4.4D 4.4F<>
FBADQS2* 3.4C<> 4.4D 4.4F<>
FBADQS3 3.4C<> 4.4D 4.4F<>
FBADQS3* 3.4C<> 4.4D 4.4F<>
FBADQS4 3.4C<> 4.4F<> 4.5B
FBADQS4* 3.4C<> 4.4F<> 4.5B
FBADQS5 3.4C<> 4.4F<> 4.5C
FBADQS5* 3.4C<> 4.4F<> 4.5C
FBADQS6 3.4C<> 4.4F<> 4.5D
FBADQS6* 3.4C<> 4.4F<> 4.5D
FBADQS7 3.4C<> 4.4F<> 4.5D
FBADQS7* 3.4C<> 4.4F<> 4.5D
FBAVREF1 4.2B 4.3F<>
FBAVREF2 4.2F 4.3F<>
FBAVREF3 4.2D
FBAVREF4 4.3H
FBA_A<0> 3.3D 4.1A 4.1C 4.1E
4.1G
FBA_A<12..0> 3.3E> 4.4F<
4.1A< 4.1C 4.1E 4.1G
FBA_A<13..0> 4.1A< 4.1C 4.1E 4.1G
FBA_A<1> 3.3D 4.1A 4.1C 4.1E
4.1G
FBA_A<2> 3.3D 4.1A 4.1C
FBA_A<3> 3.3D 4.1A 4.1C
FBA_A<4> 3.3D 4.1A 4.1C
FBA_A<5> 3.3D 4.1A 4.1C
FBA_A<6> 3.3D 4.1A 4.1C 4.1E
4.1G
FBA_A<7> 3.3D 4.1A 4.1C 4.1E
4.1G
FBA_A<8> 3.3D 4.1A 4.1C 4.1E FBAD<12> 3.1C 4.4C
4.1G
FBA_A<9> 3.3D 4.1A 4.1C 4.1E
4.1G
FBA_A<10> 3.3D 4.1A 4.1C 4.1E
4.2G
FBA_A<11> 3.3D 4.1A 4.1C 4.1E
4.2G
FBA_A<12> 3.3D 4.1A 4.1C 4.1E
4.2G
FBA_BA0 3.3E> 4.2A< 4.2C 4.2E
4.2G 4.4F<
FBA_BA1 3.3E> 4.2A< 4.2C 4.2E
4.2G 4.4F<
FBA_BA2 3.3E> 4.2A< 4.2C 4.2E
4.2G 4.4F<
FBA_CAS* 3.3E> 4.1A< 4.1C 4.1E
4.1G 4.5F<
FBA_CKE 3.3E> 4.2A< 4.2C 4.2E
4.2G 4.3G 4.4F<
FBA_CLK0 3.4E> 4.2A< 4.2C
4.4F<
FBA_CLK0* 3.4E> 4.2A< 4.2C
4.4F<
FBA_CLK1 3.4E> 4.2E< 4.2G
4.4F<
FBA_CLK1* 3.4E> 4.2E< 4.2G
4.4F<
FBA_CS0* 3.3E> 4.1A< 4.1C 4.1E
4.1G 4.5F<
FBA_CS1* 4.5F<
FBA_DEBUG 3.4D
FBA_ODT 3.3E> 4.2A< 4.2C 4.2E
4.2G< 4.5F<
FBA_RAS* 3.3E> 4.1A< 4.1C 4.1E
4.1G 4.5F<
FBA_WE* 3.3E> 4.1A< 4.1C 4.1E
4.1G 4.5F<
FBB_A<2> 3.3D 4.1E 4.1G
FBB_A<5..2> 3.3E> 4.1E< 4.1G
4.4F<
FBB_A<3> 3.3D 4.1E 4.1G
FBB_A<4> 3.3D 4.1E 4.1G
FBB_A<5> 3.3D 4.1E 4.1G
FBCAL_PD 3.4D
FBCAL_PU 3.4D
FBCAL_TERM 3.4D
FB_BOOT 13.4C
FB_BOOTC 13.4D
FB_COMP 13.5C
FB_COMP1 13.4C
FB_COMP2 13.4F
FB_DH 13.3D
FB_DL 13.4D
FB_FB 13.4D
FB_FCCM 13.4C
FB_FSET 13.4B
FB_ISEN 13.4C
FB_PHASE 13.4D
FB_PLLAVDD 3.4D
FB_PWRGOOD 7.2A< 13.4A>
FB_SNUBBER 13.4E
FB_VCC 7.1A< 13.4B>
GPIO0_DVI_A_HPD 9.3D
GPIO1_DVI_B_HPD 9.3D
GPIO2_BL_PWM 8.4A< 9.3F>
GPIO3_PPEN 8.3A< 9.3F>
GPIO3_PPEN_GPU 9.3D
GPIO4_BLEN 8.3A< 9.3F>
GPIO4_BLEN_GPU 9.3D
GPIO5_NVVDDCTL0 9.3F> 12.4A<
GPIO6_NVVDDCTL1 9.3F> 12.4A<
GPIO8_THERM_ALERT* 9.3D
GPIO9_LVDS_SYS* 7.2A< 9.3F>
GPIO12_AC_DET 9.3D
I2CA_SCL 6.1D
I2CA_SCL_R 6.1H> 8.3A<
I2CA_SDA 6.1D
I2CA_SDA_R 6.1H<> 8.3A<>
I2CB_SCL 6.3D
I2CB_SCL_R 6.3H> 8.2A<
I2CB_SDA 6.3D
I2CB_SDA_R 6.3H<> 8.2A<>
I2CC_SCL 9.3D
I2CC_SCL_R 8.4A< 9.2A< 9.3H>
11.2B<
I2CC_SDA 9.3D
I2CC_SDA_R 8.4A<> 9.2A<> 9.3H<>
11.2B<>
I2CH_SCL 10.4C
I2CH_SDA 10.4C
I2CS_SCL 9.4C
I2CS_SDA 9.4C
IFPABPLLVDD 7.2E
IFPABRSET 7.2E
IFPABVPROBE 7.2E
IFPAIOVDD 7.2E
IFPATXC 7.2H> 8.4G<
IFPATXC* 7.2H> 8.4G<
IFPATXD0 7.2H> 8.4G<
IFPATXD0* 7.2H> 8.4G<
IFPATXD1 7.2H> 8.4G<
IFPATXD1* 7.2H> 8.4G<
IFPATXD2 7.2H> 8.4G<
IFPATXD2* 7.2H> 8.4G<
IFPATXD3 7.2H> 8.4G<
IFPATXD3* 7.2H> 8.4G<
IFPBTXC 7.2H> 8.4G<
IFPBTXC* 7.2H> 8.4G<
IFPBTXD4 7.3H> 8.3G<
IFPBTXD4* 7.2H> 8.3G<
IFPBTXD5 7.3H> 8.4G<
IFPBTXD5* 7.3H> 8.4G<
IFPBTXD6 7.3H> 8.4G<
IFPBTXD6* 7.3H> 8.4G<
IFPBTXD7 7.3H> 8.4G<
IFPBTXD7* 7.3H> 8.4G<
IFPCBRSET 7.4E
IFPCPLLVDD 7.4E
IFPCTXC 7.4H> 8.2G<
IFPCTXC* 7.4H> 8.2G<
IFPCTXD0 7.3H> 8.2G<
IFPCTXD0* 7.3H> 8.2G<
IFPCTXD1 7.4H> 8.2G<
IFPCTXD1* 7.4H> 8.2G<
IFPCTXD2 7.4H> 8.2G<
IFPCTXD2* 7.4H> 8.2G<
IFPCVPROBE 7.3E
IFPC_IOVDD 7.4E
JTAG_TCLK 9.3C
JTAG_TCLK_C 8.3G< 9.3A<
JTAG_TDI 9.3C
JTAG_TDI_C 8.3G> 9.3A<
JTAG_TDO 9.3C
JTAG_TDO_C 8.3G< 9.3A>
JTAG_TMS 9.3C
JTAG_TMS_C 8.3G< 9.3A<
JTAG_TRST 9.3C
JTAG_TRST_C 8.3G< 9.3A<
LVDSIOVDD_ISOL 7.2B
MIOB_CLKIN 10.2C
M_GPIO8_SLOWDOWN* 9.2D
M_THERM_ALERT* 9.2D
NVCTL0_R 12.4C
NVCTL1_R 12.4C
NVVDD 2.4F 12.2F
NVVDDCTL0 12.4C
NVVDDCTL1 12.4C
NV_BOOT 12.2C
NV_BOOTC 12.2C
NV_COMP 12.3B
NV_COMP1 12.3B
NV_COMP2 12.3D
NV_DH 12.2C
NV_DL 12.2C
NV_FB 12.4D
NV_FCCM 12.2B
NV_FSET 12.3B
NV_ISEN 12.2C
NV_PHASE 12.2C
NV_PWRGOOD 9.2F< 12.2A> 13.4A<
NV_SNUBBER 12.3E
NV_VCC 12.2B
PCI_DEVID3 10.1D> 14.2A> 14.2C
PCI_DEVID4 10.2D> 14.2A> 14.3C
PEX1V2_FB 13.2C
PEX_CLK_CFG 11.4E< 14.3A> 14.3C
PEX_PLL_DVDD 2.4G
PEX_PLL_EN 11.3E< 14.3A> 14.3C
PEX_RST 2.2D
PEX_RX0 2.2E
PEX_RX0* 2.2E
PEX_RX1 2.2E
PEX_RX1* 2.2E
PEX_RX2 2.2E
PEX_RX2* 2.2E
PEX_RX3 2.3E
PEX_RX3* 2.3E
PEX_RX4 2.3E
PEX_RX4* 2.3E
PEX_RX5 2.3E
PEX_RX5* 2.3E
PEX_RX6 2.3E
PEX_RX6* 2.3E
PEX_RX7 2.3E
PEX_RX7* 2.3E
PEX_RX8 2.4E
PEX_RX8* 2.4E
PEX_RX9 2.4E
PEX_RX9* 2.4E
PEX_RX10 2.4E
PEX_RX10* 2.4E
PEX_RX11 2.4E
PEX_RX11* 2.4E
PEX_RX12 2.4E
PEX_RX12* 2.4E
PEX_RX13 2.5E
PEX_RX13* 2.5E
PEX_RX14 2.5E
PEX_RX14* 2.5E
PEX_RX15 2.5E
PEX_RX15* 2.5E
PEX_TSTCLK 2.2E
PEX_TSTCLK* 2.2E
PEX_TX0 2.2E
PEX_TX0* 2.2E
PEX_TX0_C 2.2C
PEX_TX0_C* 2.2C
PEX_TX1 2.2E
PEX_TX1* 2.2E
PEX_TX1_C 2.2C
PEX_TX1_C* 2.2C
PEX_TX2 2.2E
PEX_TX2* 2.2E
PEX_TX2_C 2.2C
PEX_TX2_C* 2.2C
PEX_TX3 2.2E
PEX_TX3* 2.2E
PEX_TX3_C 2.2C
PEX_TX3_C* 2.2C
PEX_TX4 2.3E
PEX_TX4* 2.3E
PEX_TX4_C 2.3C
PEX_TX4_C* 2.3C
PEX_TX5 2.3E
PEX_TX5* 2.3E
PEX_TX5_C 2.3C
PEX_TX5_C* 2.3C
PEX_TX6 2.3E
PEX_TX6* 2.3E
PEX_TX6_C 2.3C
PEX_TX6_C* 2.3C
PEX_TX7 2.3E
PEX_TX7* 2.3E
PEX_TX7_C 2.3C
PEX_TX7_C* 2.3C
PEX_TX8 2.3E
PEX_TX8* 2.3E
PEX_TX8_C 2.3C
PEX_TX8_C* 2.3C
PEX_TX9 2.4E
PEX_TX9* 2.4E
PEX_TX9_C 2.4C
PEX_TX9_C* 2.4C
PEX_TX10 2.4E
PEX_TX10* 2.4E
PEX_TX10_C 2.4C
PEX_TX10_C* 2.4C
PEX_TX11 2.4E
PEX_TX11* 2.4E
PEX_TX11_C 2.4C
PEX_TX11_C* 2.4C
PEX_TX12 2.4E
PEX_TX12* 2.4E
PEX_TX12_C 2.4C
PEX_TX12_C* 2.4C
PEX_TX13 2.4E
PEX_TX13* 2.4E
PEX_TX13_C 2.4C
PEX_TX13_C* 2.4C
PEX_TX14 2.5E
PEX_TX14* 2.5E
PEX_TX14_C 2.5C
PEX_TX14_C* 2.5C
PEX_TX15 2.5E
PEX_TX15* 2.5E
PEX_TX15_C 2.5C
PEX_TX15_C* 2.5C
PLLVDD 6.4C
PRSNT2_C 2.5B
RAMCFG0 10.1D> 14.1C 14.2A>
RAMCFG1 10.1D> 14.2A> 14.2C
RAMCFG2 10.1D> 14.2A> 14.2C
RAMCFG3 10.1D> 14.2A> 14.2C
REFCLK 2.2E
REFCLK* 2.2E
ROMCS* 10.3C 10.3E
ROM_SCLK 10.4C 10.4E
ROM_SI 10.4C 10.4E
ROM_SO 10.4C 10.4E
RUNPWROK 7.5A< 8.4A> 11.2B<
12.3A< 13.2B<
RUNPWROK_IN 8.4B
SMB_CLK 8.4A> 9.4B<
SMB_DAT 8.4A<> 9.4B<>
SNN_5V_CLAMP 9.3D
SNN_A2_M1 4.2A
SNN_A2_M2 4.2C
SNN_A2_M3 4.2E
SNN_A2_M4 4.2G
SNN_BUFRST* 10.4C
SNN_DACB_CSYNC 6.3D
SNN_DACB_HSYNC 6.3D
SNN_DACB_VSYNC 6.3D
SNN_DVI_B_CLK 8.3E
SNN_DVI_B_CLK* 8.3E
SNN_DVI_B_TX0 8.2E
SNN_DVI_B_TX0* 8.2E
SNN_DVI_B_TX1 8.2E
SNN_DVI_B_TX1* 8.2E
SNN_DVI_B_TX2 8.2E
SNN_DVI_B_TX2* 8.2E
SNN_E2_M1 4.2A
SNN_E2_M2 4.2C
SNN_E2_M3 4.2E
SNN_E2_M4 4.2G
SNN_FBA_A13 3.3D
SNN_FBA_A14 3.4D
SNN_FBA_A15 3.4D
SNN_FB_VREF 3.5C
SNN_GPIO7 9.3D
SNN_GPIO10 9.3D
SNN_GPIO11 9.3D
SNN_GPIO13 9.3D
SNN_GPIO14 9.4D
SNN_HDCP_ROM 10.4D
SNN_IGP1 8.3E
SNN_IGP2 8.3E
SNN_IGP159 8.3E
SNN_IGP185 8.3E
SNN_IGP195 8.3E
SNN_IGP197 8.3E
SNN_IGP_LVDS_UTX1 8.3E
SNN_IGP_LVDS_UTX1* 8.3E
SNN_MIOAD<1> 11.3E
SNN_MIOAD<2> 11.3E
SNN_MIOAD<3> 11.3E
SNN_MIOAD<4> 11.3E
SNN_MIOAD<5> 11.3E
SNN_MIOAD<6> 11.4E
SNN_MIOAD<7> 11.4E
SNN_MIOAD<8> 11.4E
SNN_MIOAD<9> 11.4E
SNN_MIOAD<10> 11.4E
SNN_MIOBD<2> 10.1C
SNN_MIOBD<3> 10.1C
SNN_MIOBD<4> 10.1C
SNN_MIOBD<5> 10.1C
SNN_MIOBD<6> 10.1C
SNN_MIOB_CAL_PD_VD 10.2A
DQ
SNN_MIOB_CAL_PU_VD 10.2A
DQ
SNN_MIOB_CLKOUT 10.2C
SNN_MIOB_CLKOUT* 10.2C
SNN_MIOB_DE 10.2C
SNN_MIOB_HSYNC 10.2C
SNN_MIOB_VREF 10.2A
SNN_MIOB_VSYNC 10.2C
SNN_MOBILE_BIT 10.1C
SNN_MXM_183 8.3E
SNN_POK 13.2B
SNN_R3_M1 4.2A
SNN_R3_M2 4.2C
SNN_R3_M3 4.2E
SNN_R3_M4 4.2G
SNN_R7_M1 4.2A
SNN_R7_M2 4.2C
SNN_R7_M3 4.2E
SNN_R7_M4 4.2G
SNN_R8_M1 4.2A
SNN_R8_M2 4.2C
SNN_R8_M3 4.2E
SNN_R8_M4 4.2G
SNN_ROM_TYPE_0 10.1C
SNN_RSVD1 8.3E
SNN_RSVD2 8.3E
SNN_RSVD3 8.3E
SPDIF 8.4B> 9.3B>
SPDIF_MXM 8.4C
SSFOUT 6.4C< 11.2D>
SS_OUT 11.2C
SS_REF 11.2C
SWAPRDY_A 10.4C
TESTMODE 10.4C
THERM 9.3C
THERM* 9.3C
THERM_ALERT* 8.4A< 9.2H>
THERM_SCL 9.2C
THERM_SDA 9.2C
THERM_VDD 9.2D
TMDSIOVDD_C 7.5C
TMDSIOVDD_C_EN* 7.4B
TMDS_LVDS_IOVDD 7.2C
XTALIN 6.4C
XTALOUT 6.4D
XTALOUTBUFF 6.4F> 11.2B<
BASE LEVEL GENERIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
www.vinafix.vn
600-f0419-0001-000
p419
Joe Kwon
15 OF 16
dd-mon-year
Page 16
2
3
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5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Title: Cref Part
Report
Design: p419
Date: Jul 21
11:21:19 2006
C1 [2.4G]
C2 [2.1A]
C3 [2.1A]
C4 [2.1G]
C5 [7.3B]
C6 [10.4F]
C7 [7.2D]
C8 [2.2G]
C9 [9.2C]
C10 [2.3A]
C11 [9.2D]
C12 [12.2F]
C13 [2.2G]
C14 [2.3G]
C15 [2.3G]
C16 [3.4G]
C17 [2.4G]
C18 [3.3G]
C19 [2.1G]
C20 [13.2B]
C21 [13.2C]
C22 [13.2D]
C23 [2.1G]
C24 [2.2G]
C25 [2.2G]
C26 [2.3G]
C27 [2.2C]
C28 [2.4H]
C29 [2.4G]
C30 [2.4G]
C32 [2.2D]
C34 [2.1G]
C35 [12.2F]
C36 [13.4F]
C37 [13.5C]
C38 [13.4B]
C39 [2.2D]
C40 [2.4G]
C41 [2.1H]
C43 [13.4G]
C44 [2.3A]
C45 [13.4G]
C46 [2.1A]
C47 [4.3E]
C48 [12.2F]
C49 [13.4D]
C50 [2.2H]
C51 [12.2E]
C52 [13.3F]
C53 [13.4E]
C54 [12.3B]
C55 [2.2H]
C56 [12.2E]
C57 [13.3E]
C58 [2.3H]
C59 [12.2E]
C60 [2.3H]
C61 [2.1H]
C62 [2.1H]
C63 [4.2F]
C64 [2.1H]
C65 [2.1H]
C66 [2.2H]
C67 [12.2E]
C68 [2.2H]
C69 [12.2E]
C70 [2.3H]
C71 [4.3H]
C73 [3.1E]
C74 [3.2E]
C75 [3.2E]
C76 [10.1A]
C77 [3.1F]
C78 [3.2F]
C79 [3.2F]
C80 [3.2F]
C81 [3.2F]
C82 [3.1F]
C83 [3.2F]
C84 [3.2F]
C85 [3.1F]
C86 [3.2F]
C87 [3.2F]
C88 [3.1F]
C89 [3.1G]
C90 [3.2G]
C91 [2.4G]
C92 [2.1G]
C93 [2.1G]
C94 [2.4H]
C95 [2.4H]
C143 [6.3B]
C144 [6.4B]
C145 [6.3B]
C146 [6.1B]
C147 [6.3B]
C148 [6.1B]
C149 [6.4B]
C150 [6.3B]
C151 [6.1C]
C152 [6.4C]
C153 [6.1C]
C154 [6.4C]
C155 [6.5C]
C156 [6.5E]
C158 [13.4F]
C501 [4.3C]
C502 [5.3E]
C503 [5.4E]
C504 [5.4D]
C505 [5.4E]
C506 [5.3D]
C507 [5.3E]
C508 [5.3E]
C509 [12.2B]
C511 [5.4E]
C512 [12.2D]
C513 [12.3B]
C514 [12.3C]
C515 [2.2A]
C516 [12.3D]
C518 [12.2A]
C519 [12.2D]
C520 [13.4B]
C521 [8.4B]
C522 [13.4D]
C523 [5.4D]
C524 [5.4E]
C525 [5.3D]
C527 [5.3E]
C528 [12.4C]
C529 [12.4C]
C530 [13.4B]
C531 [13.4C]
C533 [2.5C]
C534 [12.2C]
C535 [2.5D]
C537 [2.5C]
C540 [2.4D]
C542 [2.4C]
C543 [5.2E]
C544 [2.4D]
C548 [5.2E]
C549 [2.4C]
C550 [2.4D]
C551 [2.4C]
C552 [2.4D]
C553 [5.2D]
C554 [5.2E]
C555 [2.4C]
C556 [2.4D]
C557 [2.4C]
C558 [2.3D]
C559 [2.3C]
C561 [2.3D]
C563 [2.3C]
C564 [2.3D]
C571 [2.3C]
C575 [2.3D]
C579 [2.3C]
C582 [2.3D]
C586 [5.2D]
C587 [5.2D]
C592 [2.3C]
C595 [3.5F]
C597 [3.5F]
C600 [3.5E]
C601 [2.2C]
C603 [2.2D]
C620 [2.2C]
C622 [2.2D]
C627 [2.2C]
C643 [5.3E]
C648 [5.3E]
C675 [11.4C]
C678 [5.3D]
C679 [5.3D]
C680 [5.3E]
C685 [5.3E]
C691 [11.2C]
C692 [11.2D]
C693 [11.2D]
C695 [11.2D]
C697 [10.4D]
C732 [7.2E]
C733 [7.2E]
C736 [7.4E]
C744 [7.3E]
C751 [7.3E]
C752 [7.3E]
C757 [7.4E]
C758 [7.4E]
C760 [7.3D]
C761 [7.4D]
C766 [7.4E]
C779 [7.4D]
C781 [7.4D]
C782 [7.3D]
C783 [7.2E]
C785 [7.4D]
C787 [7.4C]
C790 [7.3C]
C791 [7.2D]
CN1 [2.3B]
CN1 [8.3D]
D1 [12.2D]
D2 [13.4E]
D3 [9.3G]
D501 [9.3H]
G1 [2.3F]
G1 [3.3D]
G1 [6.4D 6.3D
6.1D]
G1 [7.4F 7.2F]
G1 [9.3D]
G1 [10.2B 10.4B
10.3G]
G1 [11.4D]
L1 [12.2E]
L2 [13.4F]
LB1 [6.3A]
LB2 [7.3D]
LB3 [6.1B]
LB4 [6.4B]
LB501 [3.4F]
LB505 [2.4H]
LB508 [7.4D]
LB511 [7.4D]
LB512 [7.2D]
LB513 [7.2D] C532 [2.5D] C42 [2.1H]
M3 [4.4D 4.2D
4.4B]
M4 [4.5E 4.5B
4.2F]
M501 [4.2B 4.4E
4.4C]
M502 [4.2H 4.5D
4.5C]
MEC1 [14.5C 14.5C]
MEC2 [14.4C 14.4C
14.4C 14.4C]
Q1 [7.2B]
Q3 [9.2E 9.2E]
Q4 [9.2F]
Q5 [7.2B]
Q6 [7.3C]
Q8 [7.3A]
Q501 [13.4E]
Q502 [12.2D]
Q503 [13.3E]
Q505 [12.4C]
Q506 [12.2D]
Q511 [7.2C]
Q512 [7.4C]
Q513 [7.4B]
Q555 [12.4C]
R1 [11.2C]
R2 [11.2D]
R3 [6.3F]
R4 [3.4E]
R5 [6.1F]
R6 [7.2A]
R7 [3.4E]
R8 [9.3B]
R9 [6.2F]
R10 [9.2B]
R11 [13.4D]
R12 [9.4B]
R13 [9.2B]
R14 [11.2C]
R15 [9.2D]
R16 [7.3B]
R17 [9.3B]
R18 [9.4B]
R19 [9.4B]
R20 [7.2C]
R21 [10.3E]
R22 [9.3B]
R23 [10.2C]
R24 [14.2C]
R25 [14.2D]
R26 [13.4C]
R27 [9.3B]
R28 [14.3D]
R29 [6.1F]
R30 [13.2C]
R31 [14.3D]
R32 [2.2D]
R33 [6.2F]
R34 [6.2F]
R35 [13.2C]
R36 [13.4F]
R37 [2.5C]
R38 [13.4F]
R39 [13.5F]
R40 [3.3G]
R41 [4.3E]
R42 [4.2E]
R43 [3.4G]
R44 [12.3E]
R45 [12.3A]
R46 [9.4C]
R47 [3.4G]
R48 [4.2F]
R49 [4.2F]
R50 [9.3B]
R51 [9.3B]
R52 [9.4C]
R53 [9.4C]
R54 [14.3C]
R55 [14.3C]
R56 [6.3C]
R57 [6.1C]
R58 [6.4E]
R59 [6.1E]
R60 [6.3E]
R61 [6.1E]
R62 [6.2E]
R63 [6.3F]
R64 [6.4F]
R65 [6.3F]
R66 [6.2F]
R67 [6.3F]
R68 [12.4B]
R69 [9.2D]
R70 [9.2D]
R71 [12.4B]
R72 [3.3G]
R73 [3.4G]
R74 [3.3H]
R76 [9.4C]
R78 [3.4E]
R79 [9.4C]
R81 [9.3E]
R82 [9.2E]
R83 [9.3E]
R84 [9.3E]
R85 [9.2E]
R86 [9.4E]
R87 [9.4E]
R88 [9.4E]
R90 [9.4F]
R91 [9.4G]
R92 [9.3G]
R94 [9.3H]
R96 [9.3H]
R501 [4.2C]
R503 [12.2A]
R504 [4.3C]
R505 [12.2B]
R506 [12.2B]
R507 [12.2B]
R508 [12.3B]
R509 [13.4D]
R510 [13.4E]
R511 [12.3D]
R512 [12.2C]
R513 [12.2C]
R514 [8.4B]
R515 [12.4C]
R516 [12.4D]
R517 [12.4D]
R518 [13.4C]
R520 [4.3H]
R521 [13.3B]
R522 [12.3D]
R523 [12.4C]
R524 [13.4C]
R526 [4.3H]
R527 [7.2D]
R528 [12.4B]
R529 [13.4B]
R530 [12.5B]
R533 [4.2A]
R535 [4.3G]
R558 [12.5B]
R559 [14.2D]
R561 [8.4C]
R566 [7.4E]
R568 [7.2E]
R570 [9.4G]
R571 [9.3H]
R574 [10.4C]
R583 [11.2E]
R586 [10.4C]
R589 [10.4D]
R590 [14.2D]
R592 [14.2C]
R593 [14.2C]
R594 [10.4C]
R596 [14.2C]
R598 [14.2D]
R599 [14.2D]
R608 [7.5C]
R626 [14.3D]
RP1 [9.3B 9.3B 9.3B
9.3B]
TP1 [3.4E]
TP2 [7.3E]
TP4 [7.2E]
U1 [9.2C]
U2 [10.4D]
U4 [11.2C]
U5 [10.4E]
U6 [13.1C]
U501 [12.2B]
U502 [13.4C]
Y1 [6.5D]
BASE LEVEL GENERIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
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