MSI MS-V083 Schematic 0A

2
3
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5
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HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
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A
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HFD GEBA C
ASSEMBLYNVPNVARIANT
B 1 2
SKU
3 4 5 6
12 13 14
7 8
9 10 11
15
P410: G3-128, 128/256MB, 128-bit, 8/16Mx32 DDR2
LVDS,TV_OUT,VGA
Table of Contents Page 1: Overview
HISTORY:
A00: INITIAL VERSION
Page 3: Frame Buffer A GPU Page 4: Frame Buffer A Memories Page 5: Frame Buffer C GPU Page 6: Frame Buffer C Memories Page 7: Frame Buffer Physical Constrains Page 8: DACs, Clock-Generation Page 9: LVDS / TMDS Interface GPU Page 10: LVDS I/O Page 11: GPIO Thermal Sensor Chip Page 12: Spread Spectrum, BIOS Page 13: MIOA, MIOB Page 14: NVVDD Supply Page 15: FBVDDQ, PEX1V2, PLLVDD Supply Page 16: Straps
BASE <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
600-10410-base-000 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
PRELIMINARY
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL Overview
www.vinafix.vn
600-10410-base-000 A
p410 1 OF 16 P410-A01
12-SEP-2006
AH15
OUT
OUTINOUT
1/14 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
VDD VDD
PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
VDD
VDD VDD
VDD
VDD
VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD
VDD
VDD VDD
VDD VDD
VDD VDD
VDD
VDD
VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD_LP VDD_LP VDD_LP VDD_LP
VDD33 VDD33
VDD33
VDD33
VDD33
VDD33
VDD33 VDD33 VDD33 VDD33
VDD33
VDD_LP VDD_LP
VDD_SENSE GND_SENSE
VDD33
VDD33
PEX_PLLGND
PEX_PLLDVDD
PEX_PLLAVDD
SPDIF
PEX_RST
RFU
RFU
PEX_RX1
PEX_TX1
PEX_TX1
PEX_RX0
PEX_RX0
PEX_TX0
PEX_TX0
PEX_REFCLK
PEX_REFCLK
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_RX1 PEX_TX2
PEX_RX4 PEX_RX4
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_TX3
PEX_TX3
PEX_RX2
PEX_RX2
PEX_TX2
PEX_TX5 PEX_TX5
PEX_RX5
PEX_TX8
PEX_TX8
PEX_RX7
PEX_RX7
PEX_TX7
PEX_TX7
PEX_RX6
PEX_RX6
PEX_TX6
PEX_TX6
PEX_RX5
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX9
PEX_RX9
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX15
PEX_TX15
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX14
PEX_RX13
PEX_RX13
PEX_TX13
PEX_TX13
PEX_RX15
PEX_RX15
OUTININININININININBIOUTINBIININ
OUT
IN
QTS1100A-1021
PWR_SRC PWR_SRC PWR_SRC
PWR_SRC
PWR_SRC PWR_SRC PWR_SRC
NV_PWRGOOD
PWR_SRC PWR_SRC
PWR_SRC PWR_SRC
PEX_RST
BIA_PWM
3VRUN
3VRUN
3VRUN
3VRUN
3VRUN
PWR_SRC
PEX_REFCLK
PEX_TX0
PEX_TX1 PEX_RX1
PEX_RX1
PEX_TX2
AC_DETECT
PEX_TX2
PEX_TX1
PEX_RX0
PEX_RX0
PEX_TX0
PEX_REFCLK
PEX_RX2 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_RX2
PEX_TX3
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11
PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX11
PEX_RX12
PEX_TX15
PEX_RX15 PEX_RX15
PEX_TX15
PEX_RX12 PEX_TX13
PEX_TX13 PEX_RX13
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX14
PEX_RX13
5VRUN 5VALW
15V
3VSUS 2V5RUN
PWR_SRC
PWR_SRC
HSYNC VGA_RED
RUNPWROK VSYNC
VGA_BLU CLK_DDC2 DAT_DDC2
VGA_GRN
PWR_SRC PWR_SRC PWR_SRC PWR_SRC
TV_C TV_CVBS
DVI_TX0 DVI_TX1
TV_Y
DVI_TX1 DVI_TX2
DVI_TX2 DVI_CLK
DVI_TX0
SMB_DAT
SMB_CLK
YPRPB_DET
THERM_ALRT
DVI_CLK
DVI_SCLK
DVI2_CLK DVI2_CLK
DVI2_TX2
DVI2_TX1
DVI2_TX1
DVI2_TX0
DVI2_TX2
GND GND
GND
GND GND
BLOFF GND
DVI_SDAT DVI_DET
DVI2_TX0
GND GND
GND
GND GND GND GND
GND
GND GND
GND
GND
GND GND GND
GND
GND GND
GND
GND GND GND
GND GND GND GND
GND
GND
GND
GND
GND
GND
GND GND
GND GND
GND GND
GND
GND GND GND
GND
GND GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND
GND
GND
GND GND
GND GND
GND GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
AG12SNN_RFU1 AH13
AM12 AM11
AH14 AJ14
AJ15 AK15
AK13 AK14
AH16 AG16
AM14 AM15
AG17 AH17
AL15 AL16
AG18 AH18
AK16 AK17
AK18 AJ18
AL17 AL18
AJ19 AH19
AM18 AM19
AG20 AH20
AK19 AK20
AG21 AH21
AL20 AL21
AK21PEX_TX8 AJ21PEX_TX8 PEX_TX8*1
AM21 AM22
AJ22 AH22
AK22 AK23
AG23 AH23
AL23 AL24
AK24 AJ24PEX_TX11*
AM24 AM25
AJ25 AH25
AK25 AK26
AH26 AG26
AL26 AL27
AK27 AJ27
AM27 AM28
AJ28PEX_TX15PEX_TX151 AH27
AL28 AL29
G1
G84-600-A1 BGA820 COMMON
MOTHERBOARD CONNECTOR
15V 5VRUN
GND
ON MOTHERBOARD
FBVDDQ
C11
4.7UF
6.3V 10% X5R 0603 COMMON
GND
PLATFORM POWER
VDDM 2V5RUN 3V3RUN
3VSUS 5VALW 5VRUN
15V
PWR_SRC
VDDM 2V5RUN 3V3RUN
3VSUS 5VALW 5VRUN
15V
PWR_SRC
BEAD_0603
LB1
BEAD_0603
C14 .1UF
16V25V 10% X7R 0402 COMMON
30R@100MHzLB2
COMMON
30R@100MHz
COMMON
C8 .1UF
10% X7R 0603 COMMON
SMB SIGNALS HAVE PULLUPS
NET RULES
NET
VDDM
2V5RUN
3V3RUN
3VSUS
5VALW
5VRUN
15V
PWR_SRC
NET
NV_NET_MAX_CURRENT
VDDM
2V5RUN
3V3RUN
3VSUS
5VALW
5VRUN
15V
PWR_SRC
J501
CON_B2B_200
VDDM
171 170
153 175
157 159 161 163 165 167
173
168
172
103 104 109 110 115 116 121 122 127 128 133 134 139 140 145 146 151 152 155 158 169 177 179 181 183 185 187 189 191 193 195 197 199 200 201 202 203 204
M08 COMMON
6
26 28 40 36 32 44 46
4 14 22 18
8 10
15 17
21 23SNN_DVI4
27SNN_DVI5 29
33 35
50 52 48
39 41 45 47 51 53
9 11
1
2 12 13 16 19 20 24 25 30 31 34 37 38 42 43 49 55 56 61 62 67 68 73 74 79 80 85 86 91 92 97 98
M08
174 176 178 180 182 184 186 188 190 192 194 196
3 5 7 160 162
164 166 54 198 58
60 64
66 57
59 70
72 63
65 76
78 69
71 82
84 75
77 88
90 81
83 94
96 87
89 100
102 93
95 106
108 99
101 112
114 105
107 118
120 111
113 124
126 117
119 130
132 123
125 136
138 129
131 142
144 135
137 148
150 141
143 154
156 147
149
5VALW 3VSUS 2V5RUN
C7
C15
.1UF
.1UF
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
12<
1.8V
2.5V
3.3V
3.3V
5V
5V 15V
20V
VDDM
GND
8> 8<> 11<
8>
11<>
11>
14< 15<
8> 8> 8> 8> 8>
GPIO11_YPRPB_DET_PLAT
8> 8> 10< 11<
10<>
11>
C5 .1UF
16V 10% X7R 0402 COMMON
10<
MIN_LINE_WIDTHVOLTAGE
10
10
16
10
10
10
10
16
NV_SOURCE_POWER_NET
3.0A
0.5A TRUE
2.5A TRUE
0.5A
0.5A
0.5A
0.1A TRUE
2.5A TRUE
C4 .1UF
16V16V 10% X7R 0402 COMMON
GPIO4_BLEN
TRUE
TRUE TRUE TRUE
15V 5VRUN 5VALW 3VSUS
2V5RUN
RUNPWROK
DACA_VSYNC DACA_HSYNC DACA_RED DACA_GREEN DACA_BLUE I2CA_SCL_C I2CA_SDA_C
DACB_GREEN DACB_RED DACB_BLUE
SMB_CLK SMB_DAT
THERM_ALERT*
SNN_DVI1 SNN_DVI2
SNN_DVI3
SNN_DVI6
SNN_DVI7 SNN_DVI8
SNN_DVI9 SNN_DVI10 LCD_TST
SNN_DVI12 SNN_DVI13 SNN_DVI14 SNN_DVI15 SNN_DVI16 SNN_DVI17 SNN_DVI18 SNN_DVI19
GND
PRELIMINARY
GR_PGOOD
LCD_VCC_TEST_EN
AC_BATT*
PEX_TX0_C PEX_TX0_C*
PEX_TX1_C PEX_TX1_C*
PEX_TX2_C PEX_TX2_C*
PEX_TX3_C PEX_TX3_C*
PEX_TX4_C PEX_TX4_C*
PEX_TX5_C PEX_TX5_C*
PEX_TX6_C PEX_TX6_C*
PEX_TX7_C PEX_TX7_C*
PEX_TX8_C PEX_TX8_C*
PEX_TX9_C PEX_TX9_C*
PEX_TX10_C PEX_TX10_C*
PEX_TX11_C PEX_TX11_C*
PEX_TX12_C PEX_TX12_C*
PEX_TX13_C PEX_TX13_C*
PEX_TX14_C PEX_TX14_C*
PEX_TX15_C PEX_TX15_C*
PWR_SRC
3V3RUN
15>
10<
11<
100DIFF
PEX_TX0_C
100DIFF
PEX_TX0_C
100DIFFPEX_TX1_C 100DIFF
PEX_TX1_C
100DIFF
PEX_TX2_C
100DIFF
PEX_TX2_C
100DIFF
PEX_TX3_C
100DIFF
PEX_TX3_C
100DIFF
PEX_TX4_C
100DIFF
PEX_TX4_C
100DIFF
PEX_TX5_C
100DIFF
PEX_TX5_C
100DIFF
PEX_TX6_C
100DIFF
PEX_TX6_C
100DIFF
PEX_TX7_C
100DIFF
PEX_TX7_C
100DIFFPEX_TX8_C
PEX_TX8_C 1100DIFF
100DIFF
PEX_TX9_C
100DIFF
PEX_TX9_C
100DIFF
PEX_TX10_C
100DIFF
PEX_TX10_C
100DIFF
PEX_TX11_C
100DIFFPEX_TX11_C
100DIFF
PEX_TX12_C
100DIFF
PEX_TX12_C
100DIFF
PEX_TX13_C
100DIFF
PEX_TX13_C
100DIFF
PEX_TX14_C
100DIFFPEX_TX14_C
PEX_TX15_C 100DIFF 1 C714 PEX_TX15_C 100DIFF 1
C12 .1UF
25V 10% X7R 0603 COMMON
C10 .1UF
16V 10% X7R 0402 COMMON
NV_CRITICALNV_IMPEDANCEDIFF_PAIRNET_NAME
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 1
0402
1
0402 16V
1
0402
1
0402
1
0402
1
0402
1
0402
1
0402
0402
1
1
0402
1
0402
1
0402
1
0402 16V
1
0402
PEX Interface
C13 .1UF
25V 10% X7R 0603 COMMON
GND
PEX_RST
NET_NAMEDIFF_PAIRNV_CRITICAL PEX_TSTCLK
PEX_TCLK
1 1
1 1
1 PEX_TX0
100DIFF
1 PEX_TX0
100DIFF
COMMON
X7R
1 1
1 PEX_TX1
100DIFF
100DIFF
COMMON
X7R
1 1
100DIFF
100DIFF.1UF
COMMON
X7R
1 1
100DIFF
100DIFF
X7R
100DIFF
X7R
100DIFF
X7R
100DIFF
X7R
100DIFF.1UF
X7R
X7R
100DIFF
X7R
100DIFF
X7R
100DIFF
X7R
100DIFF
X7R
100DIFF
100DIFF.1UF
X7R
100DIFF
1
COMMON 1 1
1 PEX_TX4
100DIFF
COMMON 1 1
100DIFF
1 PEX_TX5
COMMON 1 1
1 PEX_TX6
100DIFF
1 PEX_TX6
COMMON 1 1
1 PEX_TX7
100DIFF
1
COMMON 1 1
100DIFF
COMMON 1 1
1 PEX_TX9
100DIFF
1 PEX_TX9
COMMON 1 1
100DIFF
1 PEX_TX10
COMMON 1 1
1 PEX_TX11
100DIFF
COMMON 1 1
1 PEX_TX12
100DIFF
1 PEX_TX12
COMMON 1 1
100DIFF
COMMON 1 1
1 PEX_TX14
100DIFF
COMMON 1 1
100DIFF
1 PEX_TX15
COMMON 1 1
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL PCI EXPRESS Interface
PEX_TCLK
PEX_RCLK PEX_RCLK
PEX_RX0 PEX_RX0
PEX_TX11
PEX_RX1
PEX_TX21
PEX_TX21
PEX_RX2 PEX_RX2
PEX_TX31
PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX41
PEX_RX4 PEX_RX4
PEX_TX51
PEX_RX5
PEX_RX6 PEX_RX6
PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX81
PEX_RX8
PEX_RX9 PEX_RX9
PEX_TX101
PEX_RX10 PEX_RX10
PEX_TX111
PEX_RX11 PEX_RX11
PEX_RX12
PEX_TX131
PEX_TX131
PEX_RX13 PEX_RX13
PEX_TX141
PEX_RX14 PEX_RX14
PEX_RX15 PEX_RX15
PEX_TSTCLK*
REFCLK REFCLK*
PEX_TX0 PEX_TX0*
PEX_RX0 PEX_RX0*
PEX_TX1 PEX_TX1*
PEX_RX1 PEX_RX1*PEX_RX1
PEX_TX2 PEX_TX2*
PEX_RX2 PEX_RX2*
PEX_TX3 PEX_TX3*
PEX_RX3 PEX_RX3*
PEX_TX4 PEX_TX4*
PEX_RX4 PEX_RX4*
PEX_TX5 PEX_TX5*
PEX_RX5PEX_RX5 PEX_RX5*
PEX_TX6 PEX_TX6*
PEX_RX6 PEX_RX6*
PEX_TX7 PEX_TX7*
PEX_RX7 PEX_RX7*
PEX_RX8PEX_RX8 PEX_RX8*
PEX_TX9 PEX_TX9*
PEX_RX9 PEX_RX9*
PEX_TX10 PEX_TX10*
PEX_RX10 PEX_RX10*
PEX_TX11
PEX_RX11 PEX_RX11*
PEX_TX12 PEX_TX12*
PEX_RX12PEX_RX12 PEX_RX12*
PEX_TX13 PEX_TX13*
PEX_RX13 PEX_RX13*
PEX_TX14 PEX_TX14*
PEX_RX14 PEX_RX14*
PEX_TX15*
PEX_RX15 PEX_RX15*
C699
C693
C695
C682
C701
C680
C703
C691
C708
C684
C705
C710
C686
C712
C688
C16 .1UF
16V 10% X7R 0402 COMMON
GND
R21
0402
5%
.1UF
COMMONX7R
10%
16V
.1UF
X7R
COMMON
10%
.1UF
X7R COMMON
10%
16V
.1UF
COMMON
X7R
10%
16V
.1UF
COMMON
X7R
10%
16V
.1UF
COMMON
X7R
10%16V
.1UF
COMMON
X7R
10%
16V
.1UF
X7R COMMON
10%
16V
.1UF
COMMON
X7R
10%
16V
.1UF
COMMON
X7R
10%
16V0402
.1UF
COMMON
X7R
10%
16V
.1UF
COMMON
X7R
10%
16V
.1UF
COMMONX7R
10%16V
.1UF
X7R COMMON
10%
.1UF
X7R COMMON
10%
16V0402
.1UF
X7R COMMON
10%
16V
200 COMMON
100DIFF 100DIFF
C700 0402
100DIFF 100DIFF
C694
100DIFF 100DIFF
C696 0402
100DIFF 100DIFF
C683 0402
100DIFF 100DIFF
C702 0402
100DIFF 100DIFF
C681 0402
100DIFF 100DIFF
C704 0402
100DIFF 100DIFF
C692 0402
100DIFF 100DIFF
0402
100DIFF 100DIFF
C685 0402
100DIFF 100DIFF
C706 0402
100DIFF 100DIFF
C711 0402
100DIFF 100DIFF
C687 0402
100DIFF 100DIFF
C713 0402
100DIFF 100DIFF
C689 0402
100DIFF 100DIFF
C707 0402
100DIFF 100DIFF
NV_IMPEDANCE 100DIFF 100DIFF
.1UF
10%
16V
.1UF
10%0402
16V
10%16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
10%16V
.1UF 100DIFFC709
10%16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10% X7R16V
10%16V
.1UF
10% X7R
16V
www.vinafix.vn
SNN_RFU2
AD23 AF23 AF24 AF25 AG24 AG25
AC16 AC17 AC21 AC22 AE18 AE21 AE22 AF12 AF18 AF21 AF22
K16 K17 N13 N14 N16 N17 N19 P13 P14 P16 P17 P19 R16 R17 T13 T14 T15 T18 T19 U13
U14 U15 U18 U19 V16 V17 W13 W14 W16 W17 W19 Y13 Y14 Y16 Y17 Y19 Y20
P20 T20 T23 U20 U23 W20
NVVDD_SENSE
N20
SNN_GND_SENSE
M21
AC11 AC12 AC24 AD24 AE11 AE12 H7 J7 K7 L10 L7 L8 M10
AF15 AE15 AE16
GND
PEX_PLLDVDD_C
J6 SNN_SPDIF
C658 .1UF 16V 10% X7R 0402 COMMON
C657 .1UF 16V 10% X7R 0402 COMMON
GND
12mil
PEX_PLLDVDD
LB4 120R@100MHz COMMON Bead_0402
C21 4700PF
10%
25V X7R 0402 COMMON
C655 C669 .1UF 16V 10% X7R 0402 COMMON
C641 .1UF 16V 10% X7R 0402 COMMON
C596 .1UF 16V 10% X7R 0402 COMMON
C608 .1UF 16V 10% X7R 0402 COMMON
C629 .1UF 16V 10% X7R X7R 0402 COMMON
C615 .1UF 16V 10% X7R 0402 COMMON
C605 .1UF 16V 10% X7R 0402 COMMON
14<
C665 .022UF 16V X7R 0402 COMMON
C640 .022UF 16V X7R 0402 COMMON
1UF
6.3V 10% X5R 0402 COMMON
C638 1UF
6.3V 10% X5R 0402 COMMON
C616 .1UF 16V 10% X7R 0402 COMMON
C598 .1UF 16V 10% X7R 0402 COMMON
C622 .1UF 16V 10%
0402 COMMON
C626 .1UF
16V 10% X7R 0402 COMMON
C628 .1UF 16V 10% X7R 0402 COMMON
10%
10%
C645 470PF 50V 10% X7R 0402 COMMON
GND
C579 .1UF 16V 10% X7R 0402 COMMON
C582 .022UF 16V X7R 0402 COMMON
C637
4.7UF
6.3V 10% X5R 0603 COMMON
GND
C647
4.7UF
6.3V 10% X5R 0603 COMMON
C597 .1UF 16V 10% X7R 0402 COMMON
C636 .1UF 16V 10% X7R 0402 COMMON
C606 .1UF 16V 10% X7R X7R 0402 COMMON
C611 .1UF 16V 10% X7R 0402 COMMON
C614 .1UF 16V 10% X7R 0402 COMMON
3V3RUN
10%
GND
C18
4.7UF
6.3V 10% X5R 0603 COMMON
C656 1UF
6.3V 10% X5R 0402 COMMON
C648 1UF
6.3V 10% X7R 0603 COMMON
C627 .1UF 16V 10% X7R 0402 COMMON
C592 .1UF 16V 10% X7R 0402 COMMON
C632 .1UF 16V 10% X7R 0402 COMMON
C617 .1UF 16V 10% X7R 0402 COMMON
C607 .1UF 16V 10% X7R 0402 COMMON
C646 .1UF 16V 10% X7R 0402 COMMON
C664 .1UF 16V 10% X7R 0402 COMMON
12mil
C659 4700PF 25V 10% X7R 0402 COMMON
GND
C653
4.7UF
6.3V 10% X5R 0603 COMMON
NVVDD
C630 1UF
<<place on bottom
6.3V
north of GPU
10% X7R 0603 COMMON
C601
C541 .1UF
16V 10% X7R 0402 COMMON
C644 .1UF 16V 10% X7R 0402 COMMON
1UF
6.3V 10% X7R 0603 COMMON
C618 1UF
6.3V 10%
0603 COMMON
GND
GND
C19 470PF 50V 10% X7R 0402 COMMON
GND
GND
<<place on bottom
east of GPU
GND
<<place on bottom
south of GPU
GND
<<place on bottom
west of GPU
GND
GND
C589 1UF
10%
6.3V X7R 0603 COMMON
LB510
BEAD_0603
C660 4700PF 25V 10% X7R 0402 COMMON
GND
180R@100MHz
COMMON
PEX1V2
C642
4.7UF
6.3V 10% X5R 0603 COMMON
GND
600-10410-base-000 A
p410 P410-A01
PEX1V2
GND
2 OF 16
12-SEP-2006
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2/14 FBA
FBVDD FBVDD FBVDD FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD
FBVDDQ FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBA_CMD0 FBA_CMD2
FBA_CMD3
FBVDDQ
FBA_CMD1
FBA_CMD4 FBA_CMD5
FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD11 FBA_CMD13 FBA_CMD15
FBA_CMD16
FBA_CMD19 FBA_CMD21
FBA_CMD22 FBA_CMD24
FBA_CMD25
FBA_CMD20
FBA_CMD17
FBA_CMD14
FBA_CMD10
FBA_CMD6
FBA_CMD12
FBA_CMD18
FBA_CMD23
FBA_CMD26
FBA_DEBUG
FBA_CLK0
FBA_PLLAVDD
H_PLLAVDD
FBA_CLK1
FBA_CLK1
FBA_CLK0
FBA_CMD28
FBA_CMD27
NC1 NC2
FBA_PLLGND
FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9
FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36
FBAD44
FBAD47 FBAD49 FBAD51
FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43
FBAD45 FBAD46
FBAD48 FBAD50 FBAD52
FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4
FBADQS_RN7
FBADQS_RN6
FBADQS_RN5
FB_VREF1
BI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Frame Buffer A GPU
4<>
7<>
4<> 7<>
FBAD<63..0>
FBADQM<7..0>
FBVDDQ
GND
R574 10K 5% 0402 COMMON
R577 10K 5% 0402 COMMON
FBAD<0>
0
FBAD<1>
1
FBAD<2>
2
FBAD<3>
3
FBAD<4>
4
FBAD<5>
5
FBAD<6>
6
FBAD<7>
7
FBAD<8>
8
FBAD<9>
9
FBAD<10>
10
FBAD<11>
11
FBAD<12>
12
FBAD<13>
13
FBAD<14>
14
FBAD<15>
15
FBAD<16>
16
FBAD<17>
17 18
FBAD<19>
19
FBAD<20>
20
FBAD<21>
21
FBAD<22>
22
FBAD<23>
23
FBAD<24>
24
FBAD<25>
25
FBAD<26>
26
FBAD<27>
27
FBAD<28>
28
FBAD<29>
29
FBAD<30>
30
FBAD<31>
31
FBAD<32>
32
FBAD<33>
33
FBAD<34>
34
FBAD<35>
35
FBAD<36>
36
FBAD<37>
37
FBAD<38>
38
FBAD<39> AB30
39
FBAD<40>
40
FBAD<41>
41
FBAD<42>
42
FBAD<43>
43
FBAD<44>
44
FBAD<45>
45
FBAD<46>
46
FBAD<47>
47
FBAD<48>
48
FBAD<49>
49
FBAD<50>
50
FBAD<51>
51
FBAD<52>
52
FBAD<53>
53
FBAD<54>
54
FBAD<55>
55
FBAD<56>
56
FBAD<57>
57
FBAD<58>
58 59
FBAD<60>
60
FBAD<61>
61
FBAD<62>
62
FBAD<63>
63
FBADQM<0>
0
FBADQM<1>
1
FBADQM<2>
2
FBADQM<3>
3
FBADQM<4>
4
FBADQM<5>
5
FBADQM<6>
6
FBADQM<7>
7
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<> 7<> 4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
4<>
7<>
12mil
C568 .022UF 16V 10% X7R 0402 COMMON
FBADQS0 FBADQS1 FBADQS2 FBADQS3 FBADQS4 AB28 FBADQS5 FBADQS6 FBADQS7
FBADQS0* FBADQS1* FBADQS2* FBADQS3* FBADQS4* FBADQS5* FBADQS6* FBADQS7*
N27 M27 N28 L29 K27 K28 J29 J28 P30 N31 N30 N32 L31 L30 J30 L32 H30 K30 H31FBAD<18> F30 H32 E31 D30 E30 H28 H29 E29 J27 F27 E27 E28
F28 AD29 AE29 AD28 AC28 AB29 AA30
Y28 AM30
AF30 AJ31 AJ30 AJ32 AK29 AM31 AL30 AE32 AE30 AE31 AD30 AC31 AC32 AB32 AB31 AG27 AF28 AH28 AG28FBAD<59> AG29 AD27 AF27 AE28
M29
M30
G30
F29 AA29 AK30 AC30 AG30
L28
K31
G32
G28 AL32
AF32 AH30
M28
K32
G31
G27 AA28 AL31 AF31 AH29
E32FB_VREF1
G1
G84-600-A1 BGA820 COMMON
A12 A18 A21 A24 A27 A3 A30 A6 A9 AA32 AD32 AG32 AK32 C32 F32 J32 M32 R32
AA25 AA26 AB25 AB26 G11 G12 G15 G18 G21 G22 H11 H12 H15 H18 H21 H22 L25 L26 M25 M26 R25 R26 V25 V26
FBA_A<3>
P32
FBA_A<0>
U27
FBA_A<2>
P31
FBA_A<1>
U30
FBB_A<3>
Y31
FBB_A<4>
W32
FBB_A<5>
W31
SNN_FBA_CMD7
T32
FBA_CS0*
V27
FBA_WE*
T28
FBA_BA0
T31
FBA_CKE
U32
SNN_FBA_ODT_CMD12
W29
FBB_A<2>
W30
FBA_A<12>
T27
FBA_RAS*
V28
FBA_A<11>
V30
FBA_A<10>
U31
FBA_BA1
R27
FBA_A<8>
V29
FBA_A<9>
T30
FBA_A<6>
W28
FBA_A<5>
R29
FBA_A<7>
R30
FBA_A<4>
P29
FBA_CAS*
U28 Y32 Y30 V32
FBA_CLK0
P28
FBA_CLK0*
R28
FBA_CLK1
Y27
FBA_CLK1*
AA27
FBA_ODT
AC27
H_PLLVDD
G23 G25 G24
GND
SNN_FBA_NC1
D31
SNN_FBA_NC2
D32
SNN_FBA_CMD26 FBA_BA2 SNN_FBA_CMD28
3 4 5
2
C584 .1UF 16V 10% X7R 0402 COMMON
C530 .1UF 16V 10% X7R 0402 COMMON
C588 1UF
6.3V 10% X7R 0603 COMMON
FBB_A<5..2>
FBA_A<12..0>
3 0 2 1
12 11
10
8 9 6 5 7 4
7<
4<
7<
4<
7<
4<
7<
4<
GND
C575 .1UF 16V 10% X7R 0402 COMMON
C540 .1UF 16V 10% X7R 0402 COMMON
C563 .1UF 16V 10% X7R 0402 COMMON
C577 .1UF 16V 10% X7R 0402 COMMON
C569 .1UF
16V 10%
0402 COMMON
4< 7< 4< 7< 4< 7< 4< 7<
4< 7<
FBVDDQ
GND
220R@100MHz
COMMON
C573 .1UF 16V 10% X7R 0402 COMMON
C590 .1UF 16V 10% X7R 0402 COMMON
C587 .1UF 16V 10% X7R 0402 COMMON
C578 .1UF 16V 10% X7R 0402 COMMON
C567 .1UF 16V 10% X7R 0402 COMMON
C576 .1UF 16V 10% X7R 0402 COMMON
C571 .1UF 16V 10% X7R 0402 COMMON
4<
GND
GND
GND
GND
7<
PLLVDD
C585 .1UF 16V 10% X7R 0402 COMMON
C556 .1UF 16V 10% X7R 0402 COMMON
C561 .1UF 16V 10% X7R 0402 COMMON
C581 .1UF 16V 10% X7R 0402 COMMON
C574 1UF
6.3V 10% X7R 0603 COMMON
7<4<
7<4<
7<4<
C543 1UF
6.3V 10% X7RX7R 0603 COMMON
GND
C580 .022UF 16V 10% X7R 0402 COMMON
GND
C623 .1UF 16V 10% X7R 0402 COMMON
C564 .1UF 16V 10% X7R 0402 COMMON
C635 .1UF 16V 10% X7R 0402 COMMON
C586 .1UF 16V 10% X7R 0402 COMMON
C583 .1UF 16V 10% X7R 0402 COMMON
7<
4<
7<
4<
FBA_ODT
LB504
BEAD_0603
C542 1UF
6.3V 10% X7R 0603 COMMON
GND
C602 1UF
6.3V 10% X7R 0603 COMMON
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PRELIMINARY
www.vinafix.vn
Frame Buffer A GPU
600-10410-base-000 A
p410 P410-A01
3 OF 16
12-SEP-2006
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININININININININININININININ
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININ
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIBI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIBIBIINININININININININININININININININ
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININ
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIBI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIBIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
7< 4< 3> 7< 4< 3>
4<
7<
4<
7<
4<
7<
4<
7<
FBA_A<13..0> FBB_A<5..2>
3> 3> 3> 3>
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
GND
J7
FBAVREF3
J2
C34 .1UF
16V 10% X7R 0402 COMMON
R30
0402
COMMON
R29
0402
COMMON
7< 7< 7<
7< 7< 7<
7<
FBVDDQ
1K
1%
1K
1%
3>
4<
3> 4< 3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
FBA_CKE FBA_CLK1 FBA_CLK1*
FBA_ODT
R1
R2
GND
2 3 4 5
FBA_BA0 FBA_BA1 FBA_BA2
FBA_CLK1 FBA_CLK1*
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0>
0
FBA_A<1>
1
FBB_A<2> FBB_A<3> FBB_A<4> FBB_A<5> FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
FBA_A<9>
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M3 SNN_R3_M3 SNN_R7_M3
SNN_A2_M3 SNN_E2_M3
R608
0402
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
60.4
COMMON
1%
M1
16MX16DDR2-2.5 BGA84 COMMON
FBA_C1
VREF = FBVDDQ * R2/(R1 + R2)
FBVDDQ
R603 470
5% 0402 COMMON
R611
0402
C672 .01UF
16V 10% X7R 0402 COMMON
60.4
COMMON
1%
GND
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
4< 3>
7<
4< 3>
7<
7< 4< 7< 4< 7< 4<
4< 7<
FBA_A<13..0> FBB_A<5..2>
3> 3> 3> 3>
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBAVREF2
GND
R23
0402
COMMON
R22
0402
COMMON
FBVDDQ
1K
1%
1K
1%
R1
C29
R2
.1UF
16V 10% X7R 0402 COMMON
7< 4< 7< 4<
7<
7< 4<
3>
4< 7<
3> 3>
3>
4< 7<
3>
4< 7<
3>
4<
3>
2 3 4 5
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0>
0
FBA_A<1>
1
FBB_A<2> FBB_A<3> FBB_A<4> FBB_A<5> FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
FBA_A<9>
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M4 SNN_R3_M4 SNN_R7_M4
FBA_BA0 FBA_BA1
FBA_BA2
FBA_CKE FBA_CLK1 FBA_CLK1*
FBA_ODT
SNN_A2_M4
M504
16MX16DDR2-2.5 BGA84 COMMON
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 G3 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2SNN_E2_M4
GND
FBA_CKE
R593 10K
5% 0402 COMMON
GND
7< 7< 7<
4< 3>
7<
4< 3>
7<
4< 3>
7<
7< 4< 3>
7< 4< 3>
4< 3> 7<
3>
4<
3>
4<
3>
4<
FBA_A<13..0>
3> 4< 7<
3> 4< 7<
C552 .1UF
16V 10% X7R 0402 COMMON
0 1 2 3 4 5 6 7 8 9 10 11 12
SNN_R8_M2 SNN_R3_M2 SNN_R7_M2
SNN_A2_M2 SNN_E2_M2
PAGE 4) MEMORY PARTITION A
M2
16MX16DDR2-2.5 BGA84 COMMON
K7
FBA_RAS*
L7
FBA_CAS*
K3FBA_WE* L8
FBA_CS0*
M8
FBA_A<0>
M3
FBA_A<1>
M7
FBA_A<2>
N2
FBA_A<3>
N8
FBA_A<4>
N3
FBA_A<5>
N7
FBA_A<6>
P2
FBA_A<7>
P8FBA_A<8> P3
FBA_A<9>
M2
FBA_A<10>
P7
FBA_A<11>
R2
FBA_A<12>
R8 R3 R7
L2
FBA_BA0
L3
FBA_BA1
L1
FBA_BA2
K2
FBA_CKE
J8
FBA_CLK0
K8
FBA_CLK0*
K9
FBA_ODT
A2 E2
M503
16MX16DDR2-2.5 BGA84 COMMON
K7
0 1 2 3 4 5 6 7 8 9 10 11 12
SNN_R8_M1 SNN_R3_M1 SNN_R7_M1
FBA_BA0 FBA_BA1 FBA_BA2
FBA_CKE FBA_CLK0 FBA_CLK0*
SNN_A2_M1 SNN_E2_M1
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0> FBA_A<1> FBA_A<2> FBA_A<3> FBA_A<4> FBA_A<5> FBA_A<6> FBA_A<7> FBA_A<8> FBA_A<9> FBA_A<10> FBA_A<11> FBA_A<12>
L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
3>
4< 7<
3>
4< 7<
3>
4< 7<
3>
4< 7<
4< 3> 7<
FBA_A<13..0>
3>
7< 4<
3>
7< 4<
3>
7< 4<
3>
7< 4<
3>
7< 4<
3>
7< 4<
4< 3> 7<
FBA_ODT
R597 10K
1% 0402 COMMON
FBVDDQ
GND
FBA_CLK0
FBA_CLK0*
R45
0402
FBA_C0
60.4
COMMON
1%
R47 470
5% 0402 COMMON
R46
0402
C67 .01UF
16V 10% X7R 0402 COMMON
60.4
COMMON
1%
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
4< 3> 7<
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
GND
FBAVREF1
R564
0402
COMMON
R563
0402
COMMON
FBVDDQ
1K
1%
1K
1%
R1
R2
GND
GND
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1
G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
GND
J7
J2
C650 .1UF
16V 10% X7R 0402 COMMON
FBAVREF4
R607
0402
COMMON
R606
0402
COMMON
FBVDDQ
1K
1%
1K
1%
GND
3<> 7<>
7<> 3<>
FBAD<63..0>
M2
16MX16DDR2-2.5 BGA84 COMMON
D3 D1 C2 B9 B1 D7 D9 C8
B3 B7 A8
F9 F1 G2 H1 H3 G8 H7 H9
F3 F7 E8
M504
16MX16DDR2-2.5 BGA84 COMMON
7<> 7<>
FBAD<24>
24
FBAD<25>
25
FBAD<26>
26
FBAD<27>
27
FBAD<28>
28
FBAD<29>
29
FBAD<30>
30
FBAD<31>
31
FBADQM<3>
FBADQS3 FBADQS3*
FBAD<56>
56
FBAD<57>
57
FBAD<58>
58
FBAD<59>
59
FBAD<60>
60
FBAD<61>
61
FBAD<62>
62
FBAD<63>
63
FBADQM<7> FBADQS7 FBADQS7*
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL Frame Buffer A Memories
3<> 3<>
7<> 3<>
3<> 7<>
H1 H7 G8 H9 F1 H3 G2 F9
F3 F7 E8
M504
16MX16DDR2-2.5 BGA84 COMMON
D9 D1 C2 D3 B1 B9 D7 C8
B3 B7 A8FBADQS5*
M503
16MX16DDR2-2.5 BGA84 COMMON
7<>
FBAD<16>
16
FBAD<17>
17
FBAD<18>
18
FBAD<19>
19
FBAD<20>
20
FBAD<21>
21
FBAD<22>
22
FBAD<23>
23
FBADQM<2>
3<>
7<>
3<> 7<>
3<> 7<>
3<>
FBADQS2 FBADQS2*
FBAD<48>
48
FBAD<49>
49
FBAD<50>
50
FBAD<51>
51
FBAD<52>
52
FBAD<53>
53
FBAD<54>
54
FBAD<55>
55
FBADQM<6> FBADQS6 FBADQS6*
FBADQM<7..0>
M2
16MX16DDR2-2.5 BGA84 COMMON
FBAD<0>
0
FBAD<1>
1
FBAD<2>
2
FBAD<3>
3
FBAD<4>
4
FBAD<5>
5
FBAD<6>
6
FBAD<7>
7
FBADQM<0>
3<> 7<> 3<> 7<>
32 33 34 35 36 37 38 39
3<>
7<>
3<>
7<>
FBADQS0 FBADQS0*
FBAD<32> FBAD<33> FBAD<34> FBAD<35> FBAD<36> FBAD<37> FBAD<38> FBAD<39>
FBADQM<4> FBADQS4 FBADQS4*
H9 H7 H3 G8 H1 G2 F1 F9
F3 F7 E8
M1
16MX16DDR2-2.5 BGA84 COMMON
F9 G2 F1 G8 H9 H3 H1 H7
F3 F7 E8
3<> 7<>
3<> 7<>
FBAD<8>
8
FBAD<9>
9
FBAD<10>
10
FBAD<11>
11
FBAD<12>
12
FBAD<13>
13
FBAD<14>
14
FBAD<15>
15
FBADQM<1>
3<> 7<> 3<> 7<>
FBADQS1
FBADQS1*
FBAD<40>
40
FBAD<41>
41
FBAD<42>
42
FBAD<43>
43
FBAD<44>
44
FBAD<45>
45
FBAD<46>
46
FBAD<47>
47
FBADQM<5> FBADQS5
PRELIMINARY
M503
16MX16DDR2-2.5 BGA84 COMMON
C8 B9 D3 D9 D7 B1 D1 C2
B3 B7 A8
M1
16MX16DDR2-2.5 BGA84 COMMON
D1 C8 C2 D3 D9 B1 D7 B9
B3 B7 A8
www.vinafix.vn
FBVDDQ
FBVDDQ
Decoupling for FBA 0..31
C634
C679
C631
C674
C36
1UF
6.3V 10% X7R 0603 COMMON
C566
1UF
6.3V 10% X7R 0603 COMMON
C22
1UF
6.3V 10% X7R 0603 COMMON
C23
1UF
6.3V 10% X7R 0603 COMMON
C548
1UF
10% X7R 0603 COMMON
C538
6.3V 10% X7R 0603 COMMON
C643
1UF
6.3V 10% X7R 0603 COMMON
GND
.1UF
16V 10% X7R 0402 COMMON
C690
.1UF
16V 10% X7R 0402 COMMON
.1UF
16V 16V6.3V 10% X7R 0402 COMMON
C595
.1UF1UF
16V 10% X7R 0402 COMMON
C697
1UF
6.3V 10% X7R 0603 COMMON
.1UF
16V 10% X7R 0402 COMMON
C25
.1UF
16V 10% X7R 0402 COMMON
C549C33
.1UF
10% X7R 0402 COMMON
C565
.1UF
16V 10% X7R 0402 COMMON
.022UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C668
C26
.022UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C31C613
.022UF
.1UF
16V 16V 16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C35
C30
.022UF
.1UF
16V
16V
10%
10%
X7R
X7R
04020402 COMMON
COMMON
600-10410-base-000 A
p410 P410-A01
C24
.022UF
16V 10% X7R 0402 COMMON
C28
.022UF
16V 10% X7R 0402 COMMON
C37
.022UF
10% X7R 0402 COMMON
C612
.022UF
16V 10% X7R 0402 COMMON
GND
GND
GND
GND
4 OF 16
12-SEP-2006
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
3/14 FBC
FBVTT FBVTT FBVTT FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT
FBC_CMD0
FBC_CMD4
FBC_CMD3
FBC_CMD2
FBC_CMD1
FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26
FBC_PLLAVDD
FBC_PLLVDD
FBC_DEBUG
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBC_CLK0
FBC_CMD28
FBC_CMD27
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBC_PLLGND
FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15
FBCD0 FBCD1 FBCD2 FBCD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9
FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5 FBCDQM6 FBCDQM7
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2 FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2 FBCDQS_RN3 FBCDQS_RN4
FBCDQS_RN7
FBCDQS_RN6
FBCDQS_RN5
FB_VREF2
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Frame Buffer C GPU
FBVDDQ
GND
R561 10K
5% 0402 COMMON
R566 10K
5% 0402 COMMON
FBCD<63..0>
0 1 2 3 4 5 6 7
7<> 7<> 7<> 7<> 7<> 7<> 7<> 7<>
7<> 7<> 7<> 7<> 7<> 7<> 7<> 7<>
6<> 6<> 6<> 6<> 6<> 6<> 6<> 6<>
FBCDQM<0> FBCDQM<1> FBCDQM<2> FBCDQM<3> FBCDQM<4> FBCDQM<5> FBCDQM<6> FBCDQM<7>
6<> 6<> 6<> 6<> 6<> 6<> 6<> 6<>
C554 .022UF
16V 10% X7R 0402 DNI
FBCD<0>
0
FBCD<1>
1
FBCD<2>
2
FBCD<3>
3
FBCD<4>
4
FBCD<5>
5
FBCD<6>
6
FBCD<7>
7
FBCD<8>
8
FBCD<9>
9
FBCD<10>
10
FBCD<11>
11
FBCD<12>
12
FBCD<13>
13
FBCD<14>
14
FBCD<15>
15
FBCD<16>
16
FBCD<17>
17
FBCD<18>
18
FBCD<19>
19
FBCD<20>
20
FBCD<21>
21
FBCD<22>
22
FBCD<23>
23
FBCD<24>
24
FBCD<25>
25
FBCD<26>
26
FBCD<27>
27
FBCD<28>
28
FBCD<29>
29
FBCD<30>
30
FBCD<31>
31
FBCD<32>
32
FBCD<33> C27
33 34
FBCD<35>
35
FBCD<36>
36
FBCD<37>
37
FBCD<38>
38
FBCD<39>
39
FBCD<40>
40
FBCD<41>
41 42
FBCD<42> FBCD<43>
43
FBCD<44>
44
FBCD<45>
45
FBCD<46>
46
FBCD<47>
47
FBCD<48>
48
FBCD<49>
49
FBCD<50>
50
FBCD<51>
51
FBCD<52>
52
FBCD<53>
53 54
FBCD<55>
55
FBCD<56>
56
FBCD<57>
57
FBCD<58>
58
FBCD<59>
59
FBCD<60>
60
FBCD<61>
61
FBCD<62>
62
FBCD<63>
63
FBCDQS0 FBCDQS1 FBCDQS2 FBCDQS3 FBCDQS4 FBCDQS5 FBCDQS6 FBCDQS7
FBCDQS0* FBCDQS1* FBCDQS2* FBCDQS3* FBCDQS4* FBCDQS5* FBCDQS6* FBCDQS7*
12mil
F10 D12
E12 D11
C10 B10
A10 C11 C12 A11 B11 B28
C26FBCD<34> B26 C30 B31 C29 A31 D28 D27 F26 D24 E23 E26 E24 F23 B23 A23 C25 C23 A22 C22 C21FBCD<54> B22 E22 D22 D21 E21 E18 D19 D18 E19
E11
C28 F24 C24 E20
E10
A29 D25 B25 F20
B29 E25 A25 F21
A28FB_VREF2
B7 A7 C7 A2 B2 C4 A5 B5 F9
D9
E8 D8 E7 F7 D6 D5 D3 E4 C3 B4
C8
A4 F5
C9
C5 E5
B8
C6 E9 E6 A8
G1
G84-600-A1 BGA820 COMMON
SNN_FBVTT1
AA23
SNN_FBVTT2
AB23
SNN_FBVTT3
H16
SNN_FBVTT4
H17
SNN_FBVTT5
J10
SNN_FBVTT6
J23
SNN_FBVTT7
J24
SNN_FBVTT8
J9
SNN_FBVTT9
K11
SNN_FBVTT10
K12
SNN_FBVTT11
K21
SNN_FBVTT12
K22
SNN_FBVTT13
K24 K9
SNN_FBVTT14 SNN_FBVTT15
L23
SNN_FBVTT16
M23
SNN_FBVTT17
T25
SNN_FBVTT18U25
C13 A13
B17 B20 A19 B19 B14 E16 A14 C15 B16 F17 C19 D15 C17 A17 C16 D14 F16 C14 C18
B13 E15 F15 A20 C20 A15
FBC_CLK0
E13
FBC_CLK0*
F13
FBC_CLK1
F18
FBC_CLK1*
E17 F12
G8 G10 G9
GND
FBCAL_PD_VDDQ
K26
FBCAL_PU_GND
H26
SNN_FBCAL_TERM_GND
J26
FBC_A<3> FBC_A<0>A16 FBC_A<2> FBC_A<1> FBD_A<3> FBD_A<4> FBD_A<5> SNN_FBC_CMD7 FBC_CS0* FBC_WE* FBC_BA0 FBC_CKE SNN_FBC_ODT_CMD12 FBD_A<2> FBC_A<12> FBC_RAS* FBC_A<11> FBC_A<10> FBC_BA1 FBC_A<8> FBC_A<9> FBC_A<6> FBC_A<5>E14 FBC_A<7> FBC_A<4> FBC_CAS* SNN_FBC_CMD26 FBC_BA2 SNN_FBC_CMD28
NET_NAME
FBC_ODT
SNN_FBC_PLLVDD
FBC_PLLAVDD 12mil
GND
3 4 5
2
C673 1UF
6.3V 10% X7R 0603 COMMON
FBD_A<5..2>
FBC_A<12..0>
3 0 2 1
12 11
10
8 9 6 5 7 4
6< 7<
12mil
GND
12mil
R587
7<6< 7<6< 7<6<
0402
GND
470PF
50V 10% X7R 0402 COMMON
1%
R591
0402
C663 1UF
6.3V 10% X7R 0603 COMMON
GND
40.2
COMMON
6< 6< 6< 6<
7<
6<
6<
6<
6<
6<
C572C570 .022UF
16V 10% X7R 0402 COMMON
1%
7< 7< 7<
7<
7<
7<
7<
7<
40.2
COMMON
GND
GND
C698 1UF
6.3V 10% X7R 0603 COMMON
7<6<
7<6<
GND
C555 1UF
6.3V 10% X7R 0603 COMMON
FBVDDQ
GND
C562 1UF
6.3V 10% X7R 0603 COMMON
FBVDDQ
GND
C560 1UF
6.3V 10% X7R 0603 COMMON
GND
C559 1UF
6.3V 10% X7R 0603 COMMON
LB505180R@100MHz
BEAD_0603COMMON
PLLVDD
6<> 7<>
6<> 7<>
FBCDQM<7..0>
PRELIMINARY
www.vinafix.vn
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL Frame Buffer C GPU
600-10410-base-000 A
p410 P410-A01
5 OF 16
12-SEP-2006
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININININININININININININININ
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININ
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIBI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIINININININININININININININININ
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININ
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BI
BI
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
BIBIBIBIBI
BI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PAGE 5) MEMORY PARTITION C
R540
0402
M4
16MX16DDR2-2.5 BGA84 COMMON
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
1%
60.4
COMMON
M501
16MX16DDR2-2.5 BGA84 COMMON
FBC_A<10> FBC_A<11> FBC_A<12>
K7FBC_RAS* L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
FBC_CLK0
FBC_CLK0*
0402
R539
1%
60.4
COMMON
FBC_C0
5> 6< 7<
7< 6< 5>
5>
7< 6<
5>
7< 6<
FBC_A<13..0>
5>
7<
6<
5>
7<
6<
5>
6< 7<
5>
6< 7<
5>
6< 7<
5>
6< 7<
5> 7< 6<
FBC_BA0 FBC_BA1 FBC_BA2
FBC_CKE FBC_CLK0 FBC_CLK0*
FBC_ODT
R543 10K
1% 0402 COMMON
FBC_CAS* FBC_WE* FBC_CS0*
FBC_A<0>
0
FBC_A<1>
1
FBC_A<2>
2
FBC_A<3>
3
FBC_A<4>
4
FBC_A<5>
5
FBC_A<6>
6
FBC_A<7>
7
FBC_A<8>
8
FBC_A<9>
9 10 11 12
SNN_R8_M5 SNN_R3_M5 SNN_R7_M5
SNN_A2_M5 SNN_E2_M5
GND
7<> 5<>
5<>
7<>
FBCDQM<7..0>
FBCD<63..0>
7<> 7<>
FBCD<0>
0
FBCD<1>
1
FBCD<2>
2
FBCD<3>
3
FBCD<4>
4
FBCD<5>
5
FBCD<6>
6
FBCD<7>
7
FBCDQM<0>
5<> 5<>
FBCDQS0 FBCDQS0*
FBCD<32>
32
FBCD<33>
33
FBCD<34>
7<> 7<>
PRELIMINARY
34
FBCD<35>
35
FBCD<36>
36
FBCD<37>
37
FBCD<38>
38
FBCD<39>
39
FBCDQM<4>
5<> 5<>
FBCDQS4 FBCDQS4*
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBVDDQ
R537 470
5% 0402 COMMON
GND
B9 D7 D9 D1 B1 C2 D3 C8
B3 B7 A8
C8 B9 D9 D7 D1 B1 D3 C2
B3 B7 A8
FBVDDQ
GND
FBCVREF1
R538
0402
1%
C527 .01UF
16V 10% X7R 0402 COMMON
M501
16MX16DDR2-2.5 BGA84 COMMON
M4
16MX16DDR2-2.5 BGA84 COMMON
60.4
COMMON
FBC_RAS* FBC_CAS*
FBC_CS0*
FBC_A<0>
0
FBC_A<1>
1
FBC_A<2>
2
FBC_A<3>
3
FBC_A<4>
4
FBC_A<5>
5
FBC_A<6>
6
FBC_A<7>
7
FBC_A<8>
8
FBC_A<9>
9
FBC_A<10>
10
FBC_A<11>
11
FBC_A<12>
12
SNN_R8_M6 SNN_R3_M6 SNN_R7_M6
FBC_BA0
FBC_BA2
FBC_CKE FBC_CLK0 FBC_CLK0*
7< 6< 5>
7< 6< 7< 6< 7< 6< 5>
7< 6< 5> 7< 6< 7< 6< 5>
5> 5>
5> 7< 6<
FBC_A<13..0>
5>
5>
6< 7<
5>
6< 7<
5>
6< 7<
FBVDDQ
5> 7< 6<
R536
1K
R1
1%
0402
COMMON
R542
0402
COMMON
C528
1K
R2
1%
.1UF
16V 10% X7R 0402 COMMON
SNN_A2_M6 SNN_E2_M6
GND
M3
16MX16DDR2-2.5 BGA84 COMMON
FBCD<8>
8
FBCD<9>
9
FBCD<10>
10
FBCD<11>
11
FBCD<12>
12
FBCD<13>
13
FBCD<14>
14
FBCD<15>
15
FBCDQM<1>
7<> 5<> 7<> 5<>
5<>
7<>
5<>
7<>
FBCDQS1
FBCD<40>
40
FBCD<41>
41
FBCD<42>
42
FBCD<43>
43
FBCD<44>
44
FBCD<45>
45
FBCD<46>
46
FBCD<47>
47
FBCDQM<5> FBCDQS5 FBCDQS5*
H1 G8 H7 G2 H9 H3 F9 F1
F3 F7 E8FBCDQS1*
M502
16MX16DDR2-2.5 BGA84 COMMON
C8 D7 B9 C2 B1 D3 D9 D1
B3 B7 A8
M3
16MX16DDR2-2.5 BGA84 COMMON
K7 L7 K3FBC_WE* L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 G3 P3 M2 P7 R2 R8 R3 R7
L2 L3FBC_BA1 L1
K2 J8 K8
K9FBC_ODT
A2 E2
FBCDQS2*
D1 C2 B1 D3 D9 B9 C8 D7
B3 B7FBCDQS2 A8
G2 F9 F1 H3 H9 G8 H1 H7
F3 F7 E8
FBCD<16>
16
FBCD<17>
17
FBCD<18>
18
FBCD<19>
19
FBCD<20>
20
FBCD<21>
21
FBCD<22>
22
FBCD<23>
23
FBCDQM<2>
5<>
7<>
5<>
7<>
FBCD<48>
48
FBCD<49>
49
FBCD<50>
50
FBCD<51>
51
FBCD<52>
52
FBCD<53>
53
FBCD<54>
54
FBCD<55>
55
7<> 5<>
5<> 7<>
FBCDQM<6> FBCDQS6 FBCDQS6*
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A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1
G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
GND
M3
16MX16DDR2-2.5 BGA84 COMMON
M4
16MX16DDR2-2.5 BGA84 COMMON
FBVDDQ
C39 .1UF
16V 10% X7R 0402 COMMON
5<>
7<>
5<>
7<>
0
1 2 3 4 5
6
7
8
9
10
11
12
SNN_R8_M7
SNN_R3_M7
SNN_R7_M7
FBC_BA0 FBC_BA1 FBC_BA2
FBC_CKE FBC_CLK1 FBC_CLK1*
FBC_ODT
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0*
FBC_A<0> FBC_A<1> FBD_A<2> FBD_A<3> FBD_A<4> FBD_A<5> FBC_A<6> FBC_A<7> FBC_A<8> FBC_A<9> FBC_A<10> FBC_A<11> FBC_A<12>
SNN_A2_M7 SNN_E2_M7
GND
7< 6< 7< 6<
5> 5>
7< 6< 5> 7< 6< 5> 7< 6< 5>
7< 6< 5> 7< 6< 5> 7< 6< 5>
7< 6< 5>
6<
7<
6<
7<
6<
7<
6<
7<
FBC_A<13..0> FBD_A<5..2>
5> 5> 5> 5>
FBVDDQ
R34
1K
R1
1%
0402
FBCVREF3
COMMON
R32
0402
COMMON
1K
R2
1%
FBC_CLK1
FBC_CLK1*
GND
M501
16MX16DDR2-2.5 BGA84 COMMON
FBCDQS3 FBCDQS3*
F9 G2 F1 G8 H9 H1 H7 H3
F3 F7 E8
F9 G2 G8 F1 H1 H9 H7 H3
F3 F7 E8
M502
16MX16DDR2-2.5 BGA84 COMMON
FBCD<24>
24
FBCD<25>
25
FBCD<26>
26
FBCD<27>
27
FBCD<28>
28
FBCD<29>
29
FBCD<30>
30
FBCD<31>
31
FBCDQM<3>
5<>
7<>
5<>
7<>
FBCD<56>
56
FBCD<57>
57
FBCD<58>
58
FBCD<59>
59
FBCD<60>
60
FBCD<61>
61
FBCD<62>
62
FBCD<63>
63
FBCDQM<7> FBCDQS7 FBCDQS7*
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL Frame Buffer C Memories
FBC_C1
FBVDDQ
GND
FBVDDQ
FBVDDQ
R535 470
5% 0402 COMMON
R541
0402
C526 .01UF
16V 10% X7R 0402 COMMON
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
7< 6< 7< 6<
5> 5>
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
GND
FBVDDQ
R35
1K
R1
1%
0402
COMMON
FBCVREF2J2
R36
1K
R2
1%
0402
COMMON
C48 .1UF
16V 10% X7R 0402 COMMON
7< 7< 7< 7<
7< 6< 7< 6< 7< 6<
7< 7<
7< 6<
5>
6<
5>
6<
5>
6<
5>
6<
FBC_A<13..0> FBD_A<5..2>
5> 5> 5>
5>
6<
5>
6<
5>
5>
6< 7<
2 3 4 5
0 1
6 7 8 9 10 11 12
SNN_R8_M8 SNN_R3_M8 SNN_R7_M8
FBC_BA0 FBC_BA1 FBC_BA2
FBC_CKE FBC_CLK1
FBC_CLK1*
FBC_ODT
SNN_A2_M8 SNN_E2_M8
K7
FBC_RAS*
L7
FBC_CAS*
K3
FBC_WE*
L8
FBC_CS0*
M8
FBC_A<0>
M3
FBC_A<1>
M7
FBD_A<2>
N2
FBD_A<3>
N8
FBD_A<4>
N3 C9
FBD_A<5>
N7
FBC_A<6>
P2
FBC_A<7>
P8
FBC_A<8>
P3
FBC_A<9>
M2
FBC_A<10>
P7
FBC_A<11>
R2
FBC_A<12>
R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
GND
VREF = FBVDDQ * R2/(R1 + R2)
60.4
COMMON
1%
FBC_CKE
Decoupling for FBC 0..31
C539
C537
C547
GND
C551
1UF
6.3V 10% X7R 0603 COMMON
C533
1UF
6.3V 10% X7R 0603 COMMON
C42 1UF
6.3V 10% X7R 0603 COMMON
C544
1UF
6.3V 10% X7R 0603 COMMON
C523
1UF
10% X7R 0603 COMMON
C553
1UF
6.3V 10% X7R 0603 COMMON
.1UF
16V 10% X7R 0402 COMMON
C43
.1UF
16V 10% X7R 0402 COMMON
C529
.1UF
10% X7R 0402 COMMON
C531
.1UF
16V 10% X7R
COMMON
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C47
C45
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C535
C49
.1UF
.1UF
16V16V6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C40
C46
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
04020402
COMMON
COMMON
M502
16MX16DDR2-2.5 BGA84 COMMON
A1 E1 J9 M9 R1
A9 C1 C3 C7
E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBCVREF4
R567 10K
5% 0402 COMMON
GND
C38
C545
.022UF
.022UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C534
C41
.022UF
.022UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C532
C546
.022UF
.022UF
16V 16V16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C44
C536
.022UF
.022UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
600-10410-base-000 A
p410 P410-A01
C550 .1UF
16V 10% X7R 0402 COMMON
FBVDDQ
GND
GND
GND
GND
GND
6 OF 16
FBVDDQ
R556
1K
1%
0402
COMMON
R559
1K
1%
0402
COMMON
GND
12-SEP-2006
R1
R2
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
INBIBIINININININININININININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIINININININBIBIINININININININININININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIINININBI
IN
FrameBuffer Net Rules
NET RULES for FrameBuffer A
NET DIFFPAIR
3> 4<
4<
3>
4<
3>
4<
3>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<> 3<> 4<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<>
3<>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<
3>
4<>
3<>
4<>
3<>
3> 4<
FBA_CLK0 FBA_CLK0* FBA_CLK1 FBA_CLK1* FBADQS0 FBADQS0* FBADQS1 FBADQS1* FBADQS2 FBADQS2* FBADQS3 FBADQS3* FBADQS4 FBADQS4* FBADQS5 FBADQS5* FBADQS6 FBADQS6* FBADQS7 FBADQS7*
FBA_A<12..0> FBB_A<5..2>
FBA_BA0 FBA_BA1 FBA_CKE
FBA_BA2
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0* FBA_CS1*
FBAD<63..0> FBADQM<7..0>
FBA_ODT
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1 FBADQS0 FBADQS0 FBADQS1 FBADQS1 FBADQS2 FBADQS2 FBADQS3 FBADQS3 FBADQS4 FBADQS4 FBADQS5 FBADQS5 FBADQS6 FBADQS6 FBADQS7 FBADQS7
CRITICAL IMPEDANCE NET
1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
2 2
2 2 2 2
2 2 2 2 2
2 2
2 50OHM
100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF1 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF
50OHM 50OHM
50OHM 50OHM 50OHM 50OHM
50OHM 50OHM 50OHM 50OHM 50OHM
50OHM 50OHM
NET RULES for FrameBuffer C
5> 6<
6<
5>
6<
5>
6<
5>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
6<>
5<>
5>6< 5>6<
5>6< 5>6< 5>6< 5>6<
5>6<
6<
5>
6<
5>
6< 5>
6<>
5<>
6<>
5<>
5>6<
FBC_CLK0 FBC_CLK0* FBC_CLK1
FBC_CLK1* FBCDQS0 FBCDQS0* FBCDQS1 FBCDQS1* FBCDQS2 FBCDQS2* FBCDQS3 FBCDQS3* FBCDQS4 FBCDQS4* FBCDQS5 FBCDQS5* FBCDQS6 FBCDQS6* FBCDQS7 FBCDQS7*
FBC_A<12..0> FBD_A<5..2>
FBC_BA0 FBC_BA1 FBC_CKE
FBC_BA2
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0* FBC_CS1*
FBCD<63..0> FBCDQM<7..0>
FBC_ODT
DIFFPAIR CRITICAL IMPEDANCE
FBC_CLK0 FBC_CLK0 FBC_CLK1 FBC_CLK1 FBCDQS0 FBCDQS0 FBCDQS1 FBCDQS1 FBCDQS2 FBCDQS2 FBCDQS3 FBCDQS3 FBCDQS4 FBCDQS4 FBCDQS5 FBCDQS5 FBCDQS6 FBCDQS6 FBCDQS7 FBCDQS7
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2
2 2 2 2
2 50OHM 2 2 2 2
2 2
2
100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF
50OHM 50OHM
50OHM 50OHM 50OHM 50OHM
50OHM 50OHM 50OHM 50OHM
50OHM 50OHM
50OHM
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PRELIMINARY
www.vinafix.vn
Frame Buffer Physical Constrains
600-10410-base-000 A
p410 P410-A01
7 OF 16
12-SEP-2006
OUTBIOUT
OUT
S
D
G
OUT
OUT
OUT
OUT
OUT
OUT
S
D
G
OUT
4/14 DACA
DACA_VSYNC
DACA_HSYNC
I2CA_SDA
I2CA_SCL
DACA_IDUMP
DACA_BLUE
DACA_GREEN
DACA_RED
DACA_RSET
DACA_VREF
DACA_VDD
5/14 DACB(TV)
DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
DACB_RSET
DACB_VREF
DACB_VDD
6/14 DACC
DACC_VSYNC
DACC_HSYNC
I2CB_SDA
I2CB_SCL
DACC_IDUMP
DACC_BLUE
DACC_GREEN
DACC_RED
DACC_RSET
DACC_VREF
DACC_VDD
13/14 XTAL_PLL
XTALOUTBUFF
XTALOUT
PLLGND
VID_PLLVDD
PLLAVDD
XTALIN
XTALSSIN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
DACs, Clockgeneration
PLLVDD
100
R621
COMMON
0402
C649 25V
X7R 0402 COMMON
5%
12mil
10%
C651 470PF 50V X7R 0402 COMMON
10%
DACA_VDD
DACA_VREF
DACA_RSET
.01UF 124 16V X7R 0402 COMMON
R618C671 1%10%
0402 COMMON
3V3RUN
LB509
BEAD_0603
180R@100MHz
COMMON
C662
4.7UF 4700PF 10%
6.3V
X5R 0603 COMMON
AD10 AH10
AH9
G1
G84-600-A1 BGA820 COMMON
I2CA_SCL
K2
I2CA_SDA
J3
DACA_HSYNC
AF10
DACA_VSYNC
AK10
DACA_RED
AH11
DACA_GREEN
AJ12
DACA_BLUE
AH12
R601 0402
5VRUN
I2CA_SCL_C
I2CA_SDA_C
3
Q503
BSS138 SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=50V CONTINUOUS_CURRENT=0.22A@31C R_DS_ON=3.5R MAX_CURRENT=0.88A MAX_WATTAGE=0.36W@25C V_BE_GS=+/-20V
NV_IMPEDANCE
50OHM
50OHM
50OHM
1
3
Q502
BSS138 SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=50V CONTINUOUS_CURRENT=0.22A@31C R_DS_ON=3.5R MAX_CURRENT=0.88A MAX_WATTAGE=0.36W@25C V_BE_GS=+/-20V
NV_CRITICAL
1
1
1
5VRUN
1G1D1S
1
3V3RUN
3V3RUN
R596
R602
10K
10K
5%
5%
0402
0402
COMMON
COMMON
33
R594
COMMON
0402
33
5%
COMMON
5%
I2CA_SCL_R I2CA_SDA_R
1G1D1S
2<
2<>
2< 2<
2<
2<
2<
AG9
R613
R616
R617 150 150 1% 0402 COMMON
GND
R599 150 1% 0402 COMMON
GND
R598 150 1% 0402 COMMON
U5
T5 T6
V7
GND
SNN_DACB_CSYNC
DACB_REDR6
DACB_GREEN
DACB_BLUE
GND
GND
PLLVDD
3V3RUN
LB507
BEAD_0603
180R@100MHz
COMMON
C624
4.7UF
6.3V X5R 0603 COMMON
GND
C619 4700PF
10%
25V
10%
X7R 0402 COMMON
R595
0402
5%
C620 470PF 50V X7R 0402
100
COMMON
10%
C621 .01UF 16V X7R 0402 COMMONCOMMON
DACB_VDD
DACB_VREF
10%
12mil
DACB_RSET
R592 124 1% 0402 COMMON
GND
V8 R5 R7
G1
G84-600-A1 BGA820 COMMON
1% 0402 COMMON
GND
150 1% 0402 COMMON
R600 150 1% 0402 COMMON
Place close to GPU
Place close to GPU
NV_CRITICAL
1
1
1
NV_IMPEDANCE
50OHM
50OHM
50OHM
2<
2<
2<
G1
G84-600-A1 BGA820 COMMON
SNN_I2CB_SCL
1K
R610
COMMON
0402
5%
GND
DACC_VDD
SNN_DACC_VREF
SNN_DACC_RSET
AD7 AH4 AF5
H4 J4
AG7 AG5
AF6 AG6 AE5
SNN_I2CB_SDA
DACC_HSYNC DACC_VSYNC
SNN_DACC_RED
SNN_DACC_GREEN
SNN_DACC_BLUE
TP5 TP2
AG4
GND
G1
G84-600-A1 BGA820
PLLVDD
GND
PRELIMINARY
C609
4.7UF
6.3V 10% X5R 0603 COMMON
LB506
BEAD_0603
180R@100MHz
COMMON
C604 1UF
X7R 0603 COMMON
12mil
50OHM
C603 470PF 50V X7R 0402 COMMON
C610 4700PF 25V
10%6.3V
10% X7R 0402 COMMON
12>
PLL_VDD
10%
1SSFOUT
XTALIN
1
C32 22PF 50V 5% C0G 0402 COMMON
GND
COMMON
T9
T10 U10
GND
T1
U1
NV_IMPEDANCENV_CRITIC 50OHM
H10SSMD
XTAL_4PIN
Y1
3
27 MHZ
1
10 PPM 85C COMMON
NV_CRITIC NV_IMPEDANCE
T2
BXTALOUT
U2
XTALOUT
50OHM1
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL DACs, Clock-Generation
GND
50OHM
C27 18PF 50V 5% C0G 0402 COMMON
1
R580 10K 5% 0402 COMMON
GND
www.vinafix.vn
GND
GNDGND
50OHM
R579 0402
22 COMMON
5%
1XTALOUTBUFF
12<
600-10410-base-000 A
p410 P410-A01 12-SEP-2006
8 OF 16
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
7/14 IFPAB
IFPA_TXC IFPA_TXC
IFPA_TXD0 IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC IFPB_TXC
IFPB_TXD4 IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
IFPAB_PLLGND
IFPAB_PLLVDD
IFPAB_RSET
IFPAB_VPROBE
IFPB_IOVDD
IFPA_IOVDD
8/14 IFPCD
IFPC_TXC IFPC_TXC
IFPC_TXD0
IFPC_TXD2
IFPC_TXD2
IFPC_TXD1
IFPC_TXD1
IFPC_TXD0
IFPD_TXC IFPD_TXC
IFPD_TXD4
IFPD_TXD6
IFPD_TXD6
IFPD_TXD5
IFPD_TXD5
IFPD_TXD4
IFPCD_PLLGND
IFPCD_PLLVDD
IFPCD_RSET
IFPCD_VPROBE
IFPD_IOVDD
IFPC_IOVDD
S
D
G
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
LVDS / TMDS Interface
VDDM
COMMON
LVDSIOVDD
GND
LVDSIOVDD
GND
U2 SN74AHCT1G08
PPEN
4
SC70-5 COMMON
30R@100MHz
C652
4.7UF
6.3V 10% X5R 0603 COMMON
LB3
C9
4.7UF
6.3V 10% X5R 0603 COMMON
1G1D1S
1
180R@100MHz
COMMONBEAD_0603
3
Q1
RTR040N03 SOT23_1G1D1S
COMMON
2
16MIL
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=4A@25C R_DS_ON=0.066R@2.5V MAX_CURRENT=16A MAX_WATTAGE=1W@25C V_BE_GS=12V
LB508
BEAD_0603
GND
C17
4.7UF
6.3V 10% X5R 0603 COMMON
COMMON
LVDSIOVDD
180R@100MHz
C678 .1UF 16V 10% X7R 0402 COMMON
VDDM
12mil
GND
GND
C677 .022UF 16V 10% X7R 0402 COMMON
R620 0402
C661
4.7UF
6.3V 10% X5R 0603 COMMON
LB511
BEAD_0603
C6 .1UF 16V 10% X7R 0402 COMMON
5VRUN
5
1 2
GND
11> 10<
GPIO3_PPEN
3
12mil
TP4
1K COMMON
1%
C639 4700PF 25V 10% X7R 0402 COMMON
C667 4700PF 25V 10% X7R 0402 COMMON
G1
G84-600-A1 BGA820 COMMON
C633 470PF 50V 10% X7R 0402 COMMON
C666 470PF 50V 10% X7R 0402 COMMON
AM4
AL5
AC9
AD9
AF9 AF8
IFPABVPROBE
IFPABRSET
IFPABPLLVDD
IFPAIOVDD
AJ9 AK9
AJ6 AH6
AH7 AH8
AK8 AJ8
AH5 AJ5
AL4 AK4
AM5 AM6
AL7 AM7
AK5 AK6
AL8 AK7
IFPATXC* IFPATXC
IFPATXD0* IFPATXD0
IFPATXD1* IFPATXD1
IFPATXD2* IFPATXD2
SNN_IFPATXD3* SNN_IFPATXD3
IFPBTXC* IFPBTXC
IFPBTXD4* IFPBTXD4
IFPBTXD5* IFPBTXD5
IFPBTXD6* IFPBTXD6
SNN_IFPBTXD7* SNN_IFPBTXD7
IFPATXC IFPATXC
IFPATXD0 IFPATXD0
IFPATXD1 IFPATXD1
IFPATXD2 IFPATXD2
NV_IMPEDANCEDIFFPAIRNET NAME
1 1
1 1
1 1
1 1
1IFPBTXC 1IFPBTXC
1IFPBTXD4 1IFPBTXD4
1IFPBTXD5 1IFPBTXD5
1IFPBTXD6 1IFPBTXD6
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
AK3
AH3
AA10
AB10
AD6 AE7
G1
G84-600-A1 BGA820 COMMON
AM2
AE1 AE2
AF2 AF1
AH1 AG1
AH2 AG3
AJ1 AK1
AL1 AL2
AJ3 AJ2
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL LVDS / TMDS Interface GPU
LVDS Backdrive protection
GND
3V3RUN
PRELIMINARY
R605 10 5% 0402 COMMON
LVDSIOVDD
R609 10
5% 0402 COMMON
GND
12mil
12mil
C654 .1UF 16V 10% X7R 0402 COMMON
GND
GND
TP3
R615 0402
C625 .1UF
16V 10% X7R 0402 COMMON
IFPC_IOVDD
IFPCVPROBE
IFPCBRSET
1K COMMON
1%
IFPCPLLVDD
www.vinafix.vn
SNN_IFPCTXC*AM3 SNN_IFPCTXC
SNN_IFPCTXD0* SNN_IFPCTXD0
SNN_IFPCTXD1* SNN_IFPCTXD1
SNN_IFPCTXD2* SNN_IFPCTXD2
SNN_IFPDTXC* SNN_IFPDTXC
SNN_IFPDTXD4* SNN_IFPDTXD4
SNN_IFPDTXD5* SNN_IFPDTXD5
SNN_IFPDTXD6* SNN_IFPDTXD6
600-10410-base-000 A
p410 P410-A01
9 OF 16
12-SEP-2006
R13
INININBIINBIIN
TWINAX CON
5VALW
BL_STAT
FPBACK
LCDVCC2
LCDVCC1
FPDIAG
VEDID
GND9
GND10
MGND4
GND14 MGND1
GND13
MGND3 MGND5
MGND2
GND11 GND12
MGND6 MGND7 MGND8
MGND11
MGND10
MGND9
PBAT_SMBCLK
INV_PWRSRC2
PBAT_SMBDAT
INV_PWRSRC1 INV_PWRSRC3
GND1
DDC_DATA
DDC_CLK
TXLOUT0 GND2
TXLCLKOUT
TXLOUT2
TXLOUT2
TXLOUT1
TXLOUT1
TXLOUT0
GND4
GND3
TXLCLKOUT
TXUOUT0
TXUOUT0
GND5
GND6 TXUOUT1 TXUOUT1 GND7
TXUCLKOUT
GND8
TXUOUT2 TXUOUT2
TXUCLKOUT
EMI CLIP
GND
EMI CLIP
GND
EMI CLIP
GND
EMI CLIP
GND
INININININININININININININININ
IN
S
D
G
S
D
G
S
D
G
S
D
G
IN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
0402
R14
0402
5%
5%
GPIO10_FPDIAG
0
COMMON
0
COMMON
LCD_TST
PWR_SRC
11>
2>
MEC1
P410_MOUNTING_HOLES X28 COMMON
1
MEC1
P410_MOUNTING_HOLES X28 COMMON
2
MEC1
P410_MOUNTING_HOLES X28 COMMON
3
MEC1
P410_MOUNTING_HOLES X28 COMMON
4
GND
MEC1
P410_MOUNTING_HOLES X28 COMMON
5
MEC1
P410_MOUNTING_HOLES X28 COMMON
6
MEC1
P410_MOUNTING_HOLES X28 COMMON
7
MEC1
P410_MOUNTING_HOLES X28 COMMON
8
GND
MEC1
P410_MOUNTING_HOLES X28 COMMON
9
MEC1
P410_MOUNTING_HOLES X28 COMMON
10
MEC1
P410_MOUNTING_HOLES X28 COMMON
11
MEC1
P410_MOUNTING_HOLES X28 COMMON
12
GND
GND
MEC1
P410_MOUNTING_HOLES X28 COMMON
13
MEC1
P410_MOUNTING_HOLES X28 COMMON
14
MEC1
P410_MOUNTING_HOLES X28 COMMON
15
MEC1
P410_MOUNTING_HOLES X28 COMMON
16
MEC1
P410_MOUNTING_HOLES X28 COMMON
17
MEC1
P410_MOUNTING_HOLES X28 COMMON
18
MEC1
P410_MOUNTING_HOLES X28 COMMON
19
MEC1
P410_MOUNTING_HOLES X28 COMMON
20
GND
MEC1
P410_MOUNTING_HOLES X28 COMMON
21
MEC1
P410_MOUNTING_HOLES X28 COMMON
22
MEC1
P410_MOUNTING_HOLES X28 COMMON
23
MEC1
P410_MOUNTING_HOLES X28 COMMON
24
GND
MEC1
P410_MOUNTING_HOLES X28 COMMON
25
MEC1
P410_MOUNTING_HOLES X28 COMMON
26
MEC1
P410_MOUNTING_HOLES X28 COMMON
27
MEC1
P410_MOUNTING_HOLES X28 COMMON
28
GND
2 SNN_BLSTAT 3
6 5 8 13
10 11 12 14
LCD_VCC 15 17 1 4 7 9 16 18 45 46 47 48 49 50 51 52 53 54 55
GND
I2CC_SCL_R
I2CC_SDA_R
SMB_CLK SMB_DAT GPIO2_BL_PWM_R FPDIAG
3V3RUN
GND
C522 .1UF
16V 10% X7R 0402 COMMON
5VALW
GND
11> 12<
11<
12<>
11<>
2< 11<
11<> 11>
C520 .01UF
Place cap close to connector pins.
25V 10% X7R 0402 COMMON
IFPSCL
IFPSDA
C524 220PF
50V 5% C0G 0402 COMMON
GND
20 19
21
9> 9>
9> 9>
9> 9>
9> 9>
9> 9>
9> 9>
9> 9>
9> 9>
IFPATXD0
IFPATXD0*
IFPATXD1
IFPATXD1*
IFPATXD2
IFPATXD2*
IFPATXC
IFPATXC*
IFPBTXD4
IFPBTXD4*
IFPBTXD5
IFPBTXD5*
IFPBTXD6
IFPBTXD6*
IFPBTXC
IFPBTXC*
22 23 24 25 26 27 28 29 30 31 32 33
34 35 36 37 38 39 40 41 42 43 44
GND
J1
CON_TWINAX44 SMD COMMON
LB501
BEAD_0603
LB502
BEAD_0603
C521 220PF
50V 5% C0G 0402 COMMON
180R@100MHz
COMMON
180R@100MHz
COMMON
GND
15V
R527 100K
5% 0402
1
COMMON
LCD_VCC_OFF
3
Q14
BSS138 SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=50V CONTINUOUS_CURRENT=0.22A@31C R_DS_ON=3.5R MAX_CURRENT=0.88A MAX_WATTAGE=0.36W@25C V_BE_GS=+/-20V
1G1D1S
D1
BAT54C
30V
11> 9<
200MA SOT23
R39
0402
COMMON
2
3
1
0
COMMON
5%
LCD_VCC_ON
2>
LCD_VCC_TEST_EN
GPIO3_PPEN
R40 100K
5% 0402 COMMON
1G1D1S
1
R528 100K
5% 0402 COMMON
3
Q10
BSS138 SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=50V CONTINUOUS_CURRENT=0.22A@31C R_DS_ON=3.5R MAX_CURRENT=0.88A MAX_WATTAGE=0.36W@25C V_BE_GS=+/-20V
LCDVCC_G
GND
C519 .01UF
25V 10% X7R 0402 COMMON
1G4D3S
4
3V3RUN
8 7 6 5
Q8
FDS4410 SO8_1G4D3S COMMON
1 2 3
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=10A@25C,8A@70C R_DS_ON=0.0135R MAX_CURRENT=50A MAX_WATTAGE=2.5W@25C V_BE_GS=+/-20V
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PRELIMINARY
LVDS I/O
www.vinafix.vn
1G1D1S
R38 C53 470
5% 0402 COMMON
LCD_VCC_LOADSW
3
Q9
BSS138 SOT23_1G1D1S
1LCD_VCC_OFF
COMMON
2
MAX_VOLTAGE=50V CONTINUOUS_CURRENT=0.22A@31C R_DS_ON=3.5R MAX_CURRENT=0.88A MAX_WATTAGE=0.36W@25C V_BE_GS=+/-20V
GND
LCD_VCC
.1UF
16V 10% X7R 0402 COMMON
MEC2
MEC_SPRING_P157 SMD COMMON
4.0MM
1
MEC4
MEC_SPRING_P157 SMD COMMON
4.0MM
1
MEC5
MEC_SPRING_P157 SMD COMMON
4.0MM
1
MEC3
MEC_SPRING_P157 SMD COMMON
4.0MM
1
GND
600-10410-base-000 A
p410 P410-A01
10 OF 16
12-SEP-2006
OUTBIOUTINOUT
OUT
OUT
OUT
OUT
OUT
VDD
THERM ALERT
GND
D+ D-
SDA
SCL
C
E
B
S
DGS
DGS
D
G
VDD
THERM ALERT
GND
D+ D-
SDA
SCL
IN
BI
9/14 MISC1
CLAMP
GPIO1
GPIO0
I2CC_SDA
I2CC_SCL
I2CS_SDA
I2CS_SCL
GPIO2
GPIO9
GPIO8
GPIO7
GPIO3 GPIO4 GPIO5 GPIO6
GPIO13
GPIO12
DRA_SYNC/GPIO11
GPIO10
DRB_SYNC/GPIO14
JTAG_TCK
THERMALSENSOR_OBS
THERMDN THERMDP
JTAG_TMS
JTAG_TRST
JTAG_TDO
JTAG_TDI
S
D
G
IN
S
D
G
ININBI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GPIO Thermal Alert
I2C ADDRESS: 0x98H
U504 MAX6649MUA SO8_122MIL COMMON
THERM_SCL THERM_SDA
2 3
8 7
12<> 11<> 10<>
12< 11> 10<
I2CC_SDA_R
I2CC_SCL_R
R547 0402 R550 0402
0 COMMON
5%
0 COMMON
5%
10MIL 10MIL
3V3RUN
1 4
6 5
12mil
R560 200 5% 0402 COMMON
THERM_VDD
M_THERM_ALERT* M_SLOWDOWN*
1B1C1E
1
C557 .1UF 16V 10% X7R 0603 COMMON
GND
NOSTUFF for internal sensor
R558
0402
0
COMMON
5%
R551
0402
3V3RUN
5%
R557 10K 5% 0402 COMMON
0
COMMON
Q5
MMBT2222A SOT23_1B1C1E COMMON
SMB_CLK_ISO
SMB_DAT_ISO
3
2
R532
R534
M_SLOWDOWN_R
0402
0402
5%
5%
C50 2200PF
16V 10% X7R 0402 COMMON
0
COMMON
0
COMMON
3V3RUN
R552 10k 5% 0402 COMMON
MEMTEMP_DIODE_P MEMTEMP_DIODE_N MEMTEMP_SCL
MEMTEMP_SDA
U503
MAX6649MUA SO8_122MIL COMMON
2 3
8 7
NV_PWRGOOD
3V3RUN
R531 200
5% 0402 COMMON
MEMTEMP_VDD
1
GND
MEMTEMP_THERM
4
SNN_MEMTEMP_ALERT
6 5
GND
15< 14>
C525 .1UF
16V 10% X7R 0402 COMMON
R533
0402
0
COMMON
5%
THERM_ALERT*
2<
SMB_CLK_ISO
SMB_DAT_ISO
2>
2>
AC_BATT*
GPIO11_YPRPB_DET_PLAT
3V3RUN
R549 0402
5% R548 0 0402
5%
R573 0402
5%
R629
0402
0 COMMON
COMMON
3V3RUN
0 COMMON
5%
R625 180 5% 0402 COMMON
10K
COMMON
GND
C558
2200PF
16V
0402
X7R
10%
R628 10K 5% 0402 COMMON
GND
R568 10K 5% 0402 COMMON
GPIO11_YPRPB_DET
COMMON
SNN_THERMALSENSOR_OBS
JTAG_TCLK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST
R622 270 5% 0402 COMMON
GND
R627 10K 5% 0402 COMMON
THERM*
3V3RUN
3V3RUN
R624 10K 5% 0402 COMMON
TP1
GND
AJ11 AK11 AK12 AL12 AL13
V6
J1 K1THERM
G1
G84-600-A1 BGA820 COMMON
3V3RUN
R630 470K
5% 0402 COMMON
3V3RUN
F6
C1
G2 G1
K3 H1 K5 G5 E2 J5 G6 K6 E1 D2 H5 F4 E3 U3
I2CSMB_CLK I2CSMB_DATB1
I2CC_SCL I2CC_SDA
SNN_GPIO0 SNN_GPIO1 GPIO2_BL_PWM GPIO3_PPEN_GPU GPIO4_BLEN_GPU GPIO5_NVVDDCTL0 GPIO6_NVVDDCTL1 SNN_GPIO7 GPIO8_SLOWDOWN* GPIO9_THERM_T3 GPIO10_FPDIAG GPIO11_YPRPB_DET GPIO12_AC_BATT* SNN_GPIO13 SNN_GPIO14U4
R546
0402
R545
0402
R571 0402
SMB_CLK_ISO
0
COMMON
5%
SMB_DAT_ISO
0
COMMON
5%
33 COMMON
5%
R586
0402
33
R544
COMMON
0402
5%
0
COMMON
5%
3V3RUN
1G1D1S
6
R584 10K 5% 0402 COMMON
Q2
1
5
COMMON
R_DS_ON=5R
FDC6301N
MAX_VOLTAGE=25V
MAX_CURRENT=0.5A
SOT23_6D_1G1D1S
CONTINUOUS_CURRENT=0.22A
R562 10K 5% 0402 COMMON
GND
1G1D1S
4
Q2
V_BE_GS=8V
FDC6301N
MAX_WATTAGE=0.7W@125C
SOT23_6D_1G1D1S
3
2
COMMON
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
3V3RUN
1G1D1S
3
V_BE_GS=8V
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
R588 10K 5% 0402 COMMON
1
2
Q3
COMMON
BSS138
SOT23_1G1D1S
R_DS_ON=3.5R
V_BE_GS=+/-20V
MAX_VOLTAGE=50V
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
CONTINUOUS_CURRENT=0.22A@31C
GPIO2_BL_PWM_R
GPIO3_PPEN GPIO4_BLEN
R565 10K 5% 0402 COMMON
GND
3V3RUN
R530
R529
2.2K
2.2K 5%
5%
0402
0402
COMMON
COMMON
I2CC_SCL_R I2CC_SDA_R
10<
10< 9< 2< 14< 14<
0R33
COMMON
0402
10<
5%
12< 11<
10<
12<> 11<>
10<>
1
1G1D1S
2
3
Q501
BSS138
COMMON
R_DS_ON=3.5R
V_BE_GS=+/-20V
10<>
2<
10<
2<>
SMB_CLK
SMB_DAT
PRELIMINARY
MAX_VOLTAGE=50V
SOT23_1G1D1S
CONTINUOUS_CURRENT=0.22A@31C
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
1G1D1S
3
Q4
1
2
COMMON
BSS138
MAX_VOLTAGE=50V
SOT23_1G1D1S
R_DS_ON=3.5R
V_BE_GS=+/-20V
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
CONTINUOUS_CURRENT=0.22A@31C
SMB_CLK_ISO
SMB_DAT_ISO
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL GPIO Thermal Sensor Chip
www.vinafix.vn
600-10410-base-000 A
p410 P410-A01
11 OF 16
12-SEP-2006
14/14 _GND_
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND GND
GND
GND GND GND GND GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND
GND
GND GND GND
GND GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND GND
GND
GND GND GND GND GND GND
GND GND
GND
GND
GND GND GND GND GND GND
GND GND GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND
GND
GND
GND
GND
GND GND GND GND GND GND GND
OUT
VCC
GND
HOLD WP CS
SI SCK
SO
VDD
FS_IN0
CLKOUT/
REFOUT/
FS_IN1
GND
CLKIN
PD
SDATA
SCLK
ININBI
IN
10/14 MISC2
ROMCS
I2CH_SDA
I2CH_SCL
ROM_SCLK
ROM_SO
ROM_SI
TESTMODE
TESTMEMCLK
SWAPRDY_A
STEREO
BUFRST
MEMSTRAPSEL0 MEMSTRAPSEL1 MEMSTRAPSEL2 MEMSTRAPSEL3
STRAP
RFU
RFU RFU
RFU
RFU
RFU
RFU
RFU
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
SPREAD SPECTRUM CLOCK
15< 14<
11> 11<
11<>
3V3RUN
R572 10K 5%
2 4 5 3
SS_OUT
SS_REF
0402 COMMON
CLK_VDD
R582 10K 5% 0402 COMMON
U5 ICS91730BM SO8 COMMON
2>
8>
10<
10<>
RUNPWROK
XTALOUTBUFF
I2CC_SCL_R I2CC_SDA_R
8 1
7 6
Place close to ICS91720
C599
4.7UF
6.3V 10% X5R 0603 COMMON
0402
12mil
22R583 COMMON
5%
C600
4.7UF
6.3V 10% X5R 0603 COMMON
I2C ADDRESS: 0xD4H
PRELIMINARY
SNN_MSTRAPSEL0 SNN_MSTRAPSEL1 SNN_MSTRAPSEL2 SNN_MSTRAPSEL3
SNN_G3_RFU9 SNN_G3_RFU10 SNN_G3_RFU11 SNN_G3_RFU12 SNN_G3_RFU13 SNN_G3_RFU14 SNN_G3_RFU15
ROM Interface
G1
G84-600-A1 BGA820 COMMON
SNN_STRAP
AE26 AD26 AH31 AH32
AM8 AM9 B32
AC26
F1
V3 V4
U6 D1SNN_G3_RFU16
AA4 W2
AA6 AA7
G3 H3
F3 T3 M6 A26
H2
ROMCS*
ROM_SI ROM_SO ROM_SCLK
SNN_I2CH_SCL I2CH_SDA
SNN_BUFRST*
SNN_STEREO
SWAPRDY_A
TESTMCLK TESTMODE
R553
0402
5%
R576 10K 5% 0402 COMMON
10K
COMMON
COMMON
R590
0402
3V3RUN
10K
5%
R31 10K 5% 0402 COMMON
GNDGND
www.vinafix.vn
3.3V
SSFOUT
C594 .1UF 16V 10% X7R 0402 COMMON
8<
3V3RUN
4.7
R581
COMMON
0402
5%
C591 470PF 50V 10% X7R 0402 COMMON
GND
3V3RUN
R612 10K 5% 0402 COMMON
ROM_SI ROM_SO ROM_SCLK
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL Spread Spectrum, BIOS
3V3RUN
7 3 1ROMCS*
5 2 6
U4 AT25F512AN SO8 SO8 COMMON
3V3RUN
8
4
G1
G84-600-A1 BGA820 COMMON
AA12
AA2 AA21 AA31 AB27
AB6 AC10 AC23 AC29
AC4 AD16 AD17
AD2 AD31 AE17 AE27
AE6 AF11 AF26 AF29
AF4
AF7 AG10 AG11 AG14 AG15 AG19
AG2 AG22 AG31
AG8 AH24 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ26 AJ29
AJ4
AJ7
AK2 AK28 AK31 AL11 AL14 AL19 AL22 AL25
AL3
AL6
AL9 AM13 AM16 AM17 AM20 AM23 AM26 AM29
B12
B15
B18
C670 .1UF 16V 10% X7R 0402 COMMON
GND
B21
B24
B27
B3
B30
B6 B9
C2 C31 D10 D13 D16 D17 D20 D23 D26 D29
D4
D7 F11 F14 F19
F2 F22 F25 F31
F8 G26 G29
G4
G7 H27
H6 J16 J17
J2 J31
GND
K10 K23 K29 K4 L27 L6 M12 M2 M31 N15 N18 N29 N4 P15 P18 P27 P6 R13 R14 R15
R18 R19 R2 R20 R31 T16 T17 T24 T29 T4 U16 U17 U24 U29 U8 V13 V14 V15 V18 V19
V2 V20 V31 W15 W18 W27 W6 Y15 Y18 Y29 Y4 AL10 AM10 AG13
GND
600-10410-base-000 A
p410 P410-A01
12 OF 16
12-SEP-2006
IN
IN
MIO
DR
12/14 DRB/MIOB
MIOBD3
MIOBD1 MIOBD2
MIOBD0
MIOBD4
MIOBD7
MIOBD6
MIOBD5
MIOBD11
MIOBD10
MIOBD9
MIOBD8
RFU
RFU
DRB_D0
DRB_D7
DRB_D6
DRB_D2
DRB_D1
DRB_D8
DRB_D9 DRB_D10 DRB_D11
DRB_D5
DRB_D4
DRB_D3
RFU
RFU RFU
RFU
RFU
RFU
MIOB_CTL3
MIOB_DE
MIOB_HSYNC MIOB_VSYNC
MIOB_CLKOUT
MIOB_CLKIN
MIOB_CLKOUT
DRB_D13
DRB_D12 DRB_D14
DRB_CMD
DRB_CLK
NC
DR_REFCLK
MIOBCAL_PD_VDDQ MIOBCAL_PU_GND
MIOB_VDDQ MIOB_VDDQ MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VREF
MIODR
11/14 DRA/MIOA
MIOAD1 MIOAD3
MIOAD0 MIOAD2 MIOAD4
MIOAD10
MIOAD9
MIOAD11
MIOAD8
MIOAD7
MIOAD6
MIOAD5DRA_D5
DRA_D2
DRA_D0
DRA_D3
DRA_D6
DRA_D7
DRA_D8
DRA_D1
DRA_D4
DRA_D10
DRA_D9 DRA_D11
MIOA_CTL3
RFU
MIOA_DE
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_VSYNC
MIOA_HSYNC
NC
DRA_CLK
DRA_CMD
DRA_D14
DRA_D12 DRA_D13
MIOACAL_PU_GND
MIOACAL_PD_VDDQ
MIOA_VDDQ MIOA_VDDQ MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VREF
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
MIOA
G1
G84-600-A1 BGA820
3V3RUN
C675 .1UF 16V 10% X7R 0402 COMMON
GND
SNN_MIOACAL_PD_VDDQ
SNN_MIOACAL_PU_GND
SNN_MIOA_VREF
COMMON
M7 M8 R8 T8 U9
L1 L3
L2
P2 N2 N1 N3 M1 M3 P5 N6 N5 M4 L4 L5
SNN_MIOA_HSYNC
P3
SNN_MIOA_VSYNC
R3
SNN_MIOA_DE
R1
SNN_MIOA_CTL3
P1
SNN_MIOACLKOUTR
R4
SNN_MIOACLKOUTR*
P4
SNN_RFU3
M5
MIOAD<0> MIOAD<1> SNN_MIOAD<2> SNN_MIOAD<3> SNN_MIOAD<4> SNN_MIOAD<5> MIOAD<6> SNN_MIOAD<7> MIOAD<8> MIOAD<9> SNN_MIOAD<10> SNN_MIOAD<11>
MIOAD<11..0>
0 1
6
8 9
16>
MIOB
G1
G84-600-A1 BGA820
AA8 AB7 AB8 AC6 AC7
COMMON
Y1 Y3
Y2SNN_MIOB_VREF
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL MIOA, MIOB
3V3RUN
C676 .1UF 16V 10% X7R 0402 COMMON
GND
SNN_MIOBCAL_PD_VDDQ
PRELIMINARY
SNN_MIOBCAL_PU_GND
www.vinafix.vn
AC3 AC1 AC2 AB2 AB1 AA1 AB3 AA3 AC5 AB5 AB4 AA5 W3 V1 Y5 W1
W4 W5 V5 Y6
AD3 AF3 AE3 AD1
AD4 AD5 AE4
MIOBD<0> MIOBD<1> SNN_MIOBD<2> MIOBD<3> MIOBD<4> MIOBD<5> SNN_MIOBD<6> SNN_MIOBD<7> MIOBD<8> MIOBD<9> MIOBD<10> MIOBD<11> SNN_G3_RFU1 SNN_G3_RFU2 SNN_G3_RFU3 SNN_G3_RFU4
SNN_G3_RFU5 SNN_G3_RFU6 SNN_G3_RFU7 SNN_G3_RFU8
SNN_MIOB_VSYNC SNN_MIOB_HSYNC SNN_MIOB_DE SNN_MIOB_CTL3
SNN_MIOB_CLKOUT SNN_MIOB_CLKOUT* MIOB_CLKIN
MIOBD<11..0>
0 1
3 4 5
8
9 10 11
R614 10K 5% 0402 COMMON
GND
16>
600-10410-base-000 A
p410 P410-A01
13 OF 16
12-SEP-2006
IN
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
IN
OUT
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
IN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
NET
VOLTAGEMIN_LINE_WIDTH
NVVDD SUPPLY
4
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A R_DS_ON=3.2mR MAX_CURRENT=200A MAX_WATTAGE=2.8W V_BE_GS=+/-20V
GND
PWR_SRC
5
Q11 BSC059N03S LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=5.5mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
Rtop
R513
3.01K 1% 0402 COMMON
RbotRbot0Rbot1
R514
4.42K 1% 0402 COMMON
C517 .1UF
25V 10% X7R 0603 COMMON
GND
LFPAK
5
Q15 BSC032N03S LFPAK
4
COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
GND
C62
4.7UF 25V 10% X5R 1206 COMMON
GND
Stuff for Type III compensation
U502 ISL6269CRZ
15< 12<
5VRUN
Stuff for ISL6269A
R525 0
COMMON
0402
5%
C506 1UF
6.3V 10% X7R 0603 COMMON
GND
11<2>15<
NV_PWRGOOD
RUNPWROK
R511 33K 5% 0402 COMMON
GND
For voltage calculation see P410_Voltage_calculator.xls
RTop
NVVDD
1.2V
1.1V
1.1V
1.0V
11>
11>
3.01K
3.01K
3.01K
3.01K
4.42k:18.2k:18.2K
4.42k:18.2K
4.42k|18.2K
4.42k
NV_VCC
R526 10K 5% 0402 COMMON
GND
NV_FSET
RBot
GPIO6_NVVDDCTL1
GPIO5_NVVDDCTL0
C507 .01UF 16V 10% X7R 0402 COMMON
C518 1UF
6.3V 10% X7R 0603 COMMON
GPIO6
High Low
Low
R42 10K 5% 0402
R524 0
DEM_DIS
5% 0402 COMMON
NV_FCCM
R523 0
DEM_EN
5% 0402 COMMON
12
16
TP
NV_COMP
GPIO5
High LowHigh High Low
R569 10K 5% 0402 COMMONCOMMON
2
3
4
7
5
R515 0402
VR_SW=0.6V MLFP16 MLFP16 COMMON
75K
COMMON
5%
R43
0402
5%
R41
0402
5%
C514 0402
10K
COMMON
10K
COMMON
NV_COMP1
22PF 50V 5% C0G COMMON
NVVDDCTL1
NVVDDCTL0
C512 0402
1
LFPAK
14
15
NV_ISEN
9
11
10
NV_DH 20MIL
NV_BOOT13
R512 0402
NV_PHASE 16MIL
R508
0402
NV_DL 20MIL
NV_BOOTC
0
COMMON
5%
4.7K
COMMON
5%
COMMON
C503 1000PF 16V 10% X7R 0402 COMMON
.1UF
C509
060316V 10% X7R
LFPAK
5
Q16 BSC032N03S LFPAK
4
COMMON
1 2 3
8 6
.01UF 16V 10% X7R COMMON
R520
0402
1%
GND
NV_FB
4
Q17
FDC6301N SOT23_6D_1G1D1S COMMON
2
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
V_BE_GS=8V
1G1D1S
GND
R517
18.2K 0402
COMMON
NVCTL1_R
1
C65 .01UF 16V 10% X7R 0402 COMMON
1%
6
Q17 FDC6301N SOT23_6D_1G1D1S COMMON
5
MAX_VOLTAGE=25V CONTINUOUS_CURRENT=0.22A R_DS_ON=5R MAX_CURRENT=0.5A MAX_WATTAGE=0.7W@125C V_BE_GS=8V
GND
10MIL
18.2k
COMMON
NVCTL0_R
1G1D1S
3
C57 .01UF 16V 10% X7R 0402 COMMON
GND
Default for lowest NVVDD
GNDGND
PRELIMINARY
www.vinafix.vn
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL NVVDD Supply
20A
R518 10 1% 0402 COMMON
NV_COMP2
C511 .047UF 16V 10% X7R 0402 COMMON
1
2
GND
C63
4.7UF 25V 10% X5R 1206 COMMON
GND
D2 RSX201L-30 SMA 30V 2A COMMON
GND
GND
C59
4.7UF 25V 10% X5R 1206 COMMON
SMD_590X530
C504 470PF 16V 10% X7R 0402 COMMON
NV_SNUBBER R504
1 5% 1206 COMMON
FBVDDQ
NVVDD
FBVDDQ NVVDD
12MIL 1.8V 12MIL 1.2V
C64
4.7UF
NVVDD=1.1V
25V 10%
Approx. 18A @ 500MHz
X5R 1206 COMMON
Input Ripple approx 5A (PWRSRC=18V)
GND
NVVDD
1.0uH
L2
COMMON
GND
R519 470
5% 0402 COMMON
NVVDD
C51
330UF COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM SMD_7343 SMD_7343SMD_7343
Feedback loop in case no GPU is stuffed NVVDD will be 2.16V max
C54
330UF COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM
GND
NVVDD_SENSE
C55
330UF COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM
2>
20A
C58
4.7UF
6.3V 10% X5R 0805 COMMON
C56
4.7UF
6.3V 10% X5R 0805 COMMON
GNDGNDGND
600-10410-base-000 A
p410 P410-A01
14 OF 16
12-SEP-2006
VOUT
VOUT
FB
VCNTL
GND
VIN VIN
EN POK
S
D
G
S
D
G
OUT
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
S
D
G
S
D
G
OUT ADJ
GND
IN EN
IN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PLLVDD SUPPLY
PEX1V2 SUPPLY
PEX1V2
LB503
BEAD_0603
Iside ->
1 3
U3 SC553 ADJ_VR1.25 SOT23-5 SOT23-5 COMMON
12< 2>14<
RUNPWROK
3V3RUN
2
In case regulator is adjustable:
Vout = Vref * (1 + Rtop / Rbot) In case Rside is stuffed, subtract following term from Vout:
(3V3RUN - Vref) * Rtop / Rside
GND
R626
0402
1%
Rside
5 4
TMDSPLLVDD_ADJ 10MIL
3.48K
COMMON
30R@100MHz
COMMON
Rtop R623 100 1% 0402 COMMON
Rbot R619 10K 1% 0402 COMMON
GND
PLLVDD
GND
C20 1UF
6.3V 10% X7R 0603 COMMON
6.3V
0603
COMMON
VDDM
C2
1UF 10%
X7R
GND
FBVDDQ SWITCHER
PWR_SRC
U501 ISL6269CRZ VR_SW=0.6V
R507 0 5% 0402 COMMON
FB_FCCM
R505 0 5% 0402 COMMON
FB_COMP
1
MLFP16 MLFP16 COMMON
12
2
3
16
4
7
TP
5
R503 0402
5%
3
Q7
2N7002 SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=0.115A R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W V_BE_GS=20V
GND
DEM_DIS
DEM_EN
75K COMMON
5VRUN
FB_COMP1
C505 0402
R37 10K
5% 0402 COMMON
FB_PWRGOOD*
22PF 50V 5% C0G COMMON
1
FB_BOOT
FB_ISEN
FB_DH 20MIL
R521 0402
FB_PHASE 16MIL
FB_DL 20MIL
5%
R510
0402
0 COMMON
5%
FB_BOOTC
8.2K
COMMON
COMMON
.1UF
C516
060316V 10% X7R
LFPAK
14
13
15
9
11
10
8 6
4700PF
C501 0402
16V 10% X7R COMMON
FB_FB
Vout = Vref * (1 + Rtop / Rbot)
1.8V = 0.6V * (1 + 3.09k/1.54k)
For detailed voltage calculation see P410_Voltage_calculator.xls
GR_PGOOD
1G1D1S
1
3
Q6
2N7002 SOT23_1G1D1S COMMON
2
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=0.115A R_DS_ON=7.5R MAX_CURRENT=0.8A MAX_WATTAGE=0.2W V_BE_GS=20V
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL FBVDDQ, PEX1V2, PLLVDD Supply
2<
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LFPAK
4
5
Q12 BSC059N03S LFPAK
4
COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=5.5mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
5
Q13 BSC059N03S LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=5.5mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
GND
7.5A
5VRUN
Stuff for ISL6269A
R44 33K 5% 0402 COMMON
FB_VCC
R516 10K 5% 0402 COMMON
GND
FB_PWRGOOD
FB_FSET
C66 .01UF 16V 10% X7R 0402 COMMON
C508 1UF
6.3V 10% X7R 0603 COMMON
0
R509
COMMON
0402
5%
C513 1UF
14> 11<
6.3V 10% X7R 0603 COMMON
GND
NV_PWRGOOD
GND
1G1D1S
PRELIMINARY
5VRUN
U1
APL5913 SOP8 COMMON
6 5 9
RUNPWROK SNN_POK
8 7
Vout = Vref * (1 + Rtop / Rbot)
1.2V = 0.8V * (1 + 511 /1.02k)
C61
GND
GND
C515 470PF
16V 10% X7R 0402 COMMON
FB_SNUBBER
R522 1
5% 1206 COMMON
4.7UF 25V 10% X5R 1206 COMMON
25V 10% X5R 1206 COMMON
GND
1UH
L1
COMMON
7_6X7_6
D501
1
BAT43 SOD323 40V 400MA
2
COMMON
GND
PEX1V2
2.0A
Rtop
R1 511
1% 0402 COMMON
Rbot
R2
1.02K
1% 0402 COMMON
GND
C1
4.7UF
6.3V 10% X5R 0603 COMMON
GND
GND
3 4
PEX1V2_FB2
1
C3 470PF
16V 10% X7R 0402 COMMON
FBVDDQ=1.8V
Approx. 5A @ 600MHz
C510C60 .1UF4.7UF
25V 10% X7R 0603 COMMON
GND
Rtop
R506
3.09K
1% 0402 COMMON
Rbot
R501
1.54K
1% 0402 COMMON
GND
Input Ripple approx 2.2A
7.5A
C502 .047UF
16V 10% X7R 0402 COMMON
FB_COMP2
R502 22
5% 0402 COMMON
Stuff for Type III compensation
FBVDDQ
C52 330UF
COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM SMD_7343
GND
600-10410-base-000 A
p410 P410-A01
15 OF 16
12-SEP-2006
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
OUT
OUT
13<
MIOBD<11..0>
13<
MIOAD<11..0>
STRAP BIT LOGIC 0
1
2
3
4
5
0402
0402
0402
0402
R6
5%
R19
5%
R8
5%
R10
5%
6 7 8 9
R17
10 11 12 13
0402
0402
0402
0402
10K COMMON
5%
R15
10K COMMON
5%
R3
10K COMMON
5%
R11
10K COMMON
5%
22 23
10K COMMON
10K COMMON
10K COMMON
10K COMMON
MIOAD<1>
MIOBD<0>
MIOBD<1>
MIOBD<8>
MIOBD<9>
MIOBD<4>
MIOBD<5>
MIOBD<3>
MIOBD<11>
MIOBD<10>
LOGIC 1
R28
0402
5%
R5
0402
5%
R20
0402
5%
R7
0402
5%
R9
0402
5%
R18
0402
5%
R16
0402
5%
R4
0402
5%
R12
0402
5%
R604 0402
5%
10K
COMMON
10K
COMMON
10K
COMMON
10K
COMMON
10K
COMMON
10K COMMON
10K COMMON
10K COMMON
10K COMMON
10K COMMON
3V3RUN
REG: NV_STRAP_0
SUB_VENDOR
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3 CRYSTAL_0 TV_MODE_0 TV_MODE_1 TV_MODE_2
PCI_DEVID_0 PCI_DEVID_1 PCI_DEVID_2 PCI_DEVID_3
ROM_TYPE_0 ROM_TYPE_1
0: SYSTEM BIOS 1: ADAPTER BIOS
DEFAULT
RAM_CFG[3:0] MS_0001: MS_0011: MS_0011: MS_0101: MS_0111: MS_0111: MS_1xxx: same as above 64 Bit wide 0: 27MHz
1: RESERVED
MS_001: NTSC_J
DEFAULT
DEFAULT
MS_0100:
MS_00: PARALLEL MS_01: SERIAL AT25F MS_10: SERIAL SST45VF MS_11: RESERVED
DEFAULT
R27
17
18 19 20
0402
0402
R570 0402
R555 0402
2K COMMON
5%
R24
10K COMMON
5%
10K COMMON
5%
10K COMMON
5%
21
29
MIOAD<0>
MIOAD<6>
MIOAD<8>
MIOAD<9>
0402
0402
R589 0402
R554 0402
R26
2K
COMMON
5%
R25
10K
COMMON
5%
10K
COMMON
5%
10K
COMMON
5%
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADR[0] 3GIO_PADCFG_LUT_ADR[1] 3GIO_PADCFG_LUT_ADR[2] 3GIO_PADCFG_LUT_ADR[3]
REG: NV_STRAP_1
0: 100 Ohm termination disabled 1: Enabled
30
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PRELIMINARY
www.vinafix.vn
Straps
600-10410-base-000 A
p410 P410-A01
16 OF 16
12-SEP-2006
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