<XR_
PAGE_TITLE
HGFEDCBA
REV HISTORY
V075 0A : G78, DDR2 MEMORY 32Mx16
1
Page 1: P383 Overview
Page 2: PCI Express Interface
Page 3: Frame Buffer Interface
Page 4: Memory 1st bank 0..31
Page 5: Memory 1st bank 32..63
Page 6: DACA
Page 7: DACB
2
Page 8: TMDS-A,D A C- A
Page 9: TMDS-C,D AC - B
Page 10: MIOA, MIOB Inter fa c e
Page 11: STRAPS, Mechanical Parts
Page 12: XTAL, GPIO, BIOS , F AN , JT AG , T HE RMA L
Page 13: PowerSupplyI: NVV D D , 5V
Page 14: PowerSupplyII: 5V_CL A MP , F 3V 3
Page 15: PowerSupplyIII: FBVDDQ, FB V T T , P LL VD D
3
VARIANT ASSEMBLY
SKU
B
BASE
1
SKU0000
2
SKU0001
3
SKU0002
4
SKU0003
5
<UNDEFINED>
6
<UNDEFINED>
7
<UNDEFINED>
8
9
<UNDEFINED>
10
<UNDEFINED>
11
<UNDEFINED> <UNDEFINED>
12
<UNDEFINED>
13
4
14
15
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
NVPN
600-10383-xxxx-100
600-10383-0000-100
600-50383-0000-100
600-10383-0001-100
600-50383-0001-100
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED><UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D B O M N O T F IN A L
P383: G72, 450/333, 128MB/64bit, 16Mx16 DDR2, DMS-59 , D e sk t op
P383: NV44NVS, 275/266, 128MB/64bit, 16Mx16 DDR2, DMS-59, Wo r ks t at io n
P383: G72, 450/333, 64MB/32bit, 16Mx16 DDR2, DMS-59, De s k to p
P383: G72NVS, 275/266, 128MB/64bit, 16Mx16 DDR2, DMS-59, Wor k s ta ti on
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
1
A01
2
3
4
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T HE R WI SE, AND EXPR ESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
www.vinafix.vn
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D B O M N O T F IN A L
P383 Overv iew
E GC
NVIDIA CORPORATION
2701 SAN TOMAS EX PRES SWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
U2A
BGA_0533_P080_230X230_G3_064B
GPU_F12
GPU_F11
E GC
AF13
AF14
AE10
AD10
AC10
AE12
AE13
AG10
AD13
AC13
AF10
AF11
AC15
AD15
AG12
AG13
AE15
AE16
AG15
AG16
AC18
AD18
AF16
AF17
AE18
AE19
AG18
AG19
AC21
AD21
AF19
AF20
AE21
AE22
AG21
AG22
AD22
AD23
AF22
AF23
AF25
AE25
AG24
AG25
AE24
AD24
AG26
AF27
AC6
AE3
AE4
AD5
AD6
AF1
AG2
AE6
AE7
AG3
AG4
AD7
AC7
AF4
AF5
AE9
AG6
AG7
AF7
AF8
AG9
COMMON
1/12 PCI_EXPRESS
PEX_RST
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_REFC LK
PEX_REFC LK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
NV46
NV_PLLAVDD
G72/73 NV4x
PEX_IOVD D
PEX_IOVD D
PEX_IOVD D
PEX_IOVD D
PEX_IOVD D
PEX_IOVD D
PEX_IOVD D
PEX_IOVD D
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
PEX_IOVDD Q
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
NV44
PEX_PLLAVDD
PEX_PLLDV D D
PEX_PLLGND
SPDIF NC
AB10
AB11
AB14
AB15
W17
W18
AB20
AB21
C586
.022UF
16V
10%
X7R
0402
COMMON
C569
.022UF
16V
10%
X7R
0402
COMMON
PLACE NEAR BALLS
AA4
AB5
AB6
AB7
AB8
AB9
AC9
AC11
AB12
AC12
AB13
AB16
AC16
AB17
AC17
AB18
AB19
AC19
AC20
J9
VDD
M9
VDD
R9
VDD
T9
VDD
J10
VDD
J11
VDD
M11
VDD
N11
VDD
R11
VDD
T11
VDD
L12
VDD
M12
VDD
T12
VDD
U12
VDD
L13
VDD
M13
VDD
T13
VDD
U13
VDD
W13
VDD
M14
VDD
T14
VDD
L15
VDD
M15
VDD
T15
VDD
U15
VDD
W15
VDD
L16
VDD
M16
VDD
T16
VDD
U16
VDD
W16
VDD
M17
VDD
N17
VDD
R17
VDD
T17
VDD
W9
W10
W11
W12
J12
F13
J13
F14
J15
J16
N9
VDD
Y6
AA5
AA6
D12
E12
NC
F12
NC
C13
NC
PLACE NEAR BALLS
PLACE NEAR BALLS
PLACE NEAR BALLS
NV_PLLAVDD
PEX_PLL_DVDD
PLACE NEAR BA LL S
SNN_NC1
SNN_NC2
GPU_F12
SNN_NC4
C614
4700PF
25V
10%
X7R
0402
COMMON
C557
.022UF
16V
10%
X7R
0402
COMMON
C551
100PF
50V
5%
C0G
0402
COMMON
C564
220PF
50V
5%
C0G
0402
COMMON
C571
.1UF
10V
10%
X5R
0402
COMMON
For G78-LE
GPU_F12
C596
.1UF
10V
10%
X5R
0402
COMMON
C597
.022UF
16V
10%
X7R
0402
COMMON
C598
.01UF
25V
10%
X7R
0402
COMMON
C565
100PF
50V
5%
C0G
0402
COMMON
C594
.01UF
25V
10%
X7R
0402
COMMON
C585
220PF
50V
5%
C0G
0402
COMMON
C572
4700PF
25V
10%
X7R
0402
COMMON
C660
.01UF
25V
10%
X7R
0402
COMMON
PEX-Interface
3V3
PLACE NEAR FINGERS
C36
C665
.1UF
10V
10%
X5R
0402
COMMON
C37
.01UF
25V
10%
X7R
0402
COMMON
CRITICAL
1PEX_TX0 100DIFF
1PEX_TX0 100DIFF
1PEX_TX2 100DIFF
1PEX_TX3 100DIFF
1PEX_TX4 100DIFF
1PEX_TX5 100DIFF
1PEX_TXX15 100DIFF
1PEX_RX1 100DIFF
1 100DIFFPEX_RX7
1UF
1
10V
10%
X5R
0603
COMMON
GND
Net Name
PEX_TSTCLK
IN
PEX_TSTCLK*
IN
PEX_TX0
IN
2
3
4
5
PEX_TX0*
IN
PEX_TX1
IN
PEX_TX1*
IN
PEX_TX2
IN
PEX_TX2*
IN
PEX_TX3
IN
PEX_TX3*
IN
PEX_TX4
IN
PEX_TX4*
IN
PEX_TX5
IN
PEX_TX5*
IN
PEX_TX6
IN
PEX_TX6*
IN
PEX_TX7
IN
PEX_TX7*
IN
PEX_TX8
IN
PEX_TX8*
IN
PEX_TX9
IN
PEX_TX9*
IN
PEX_TX10
IN
PEX_TX10*
IN
PEX_TX11
IN
PEX_TX11*
IN
PEX_TX12
IN
PEX_TX12*
IN
PEX_TX13
IN
PEX_TX13*
IN
PEX_TX14
IN
PEX_TX14*
IN
PEX_TX15
IN
PEX_TX15*
IN
PEX_TXX0
IN
PEX_TXX0*
IN
PEX_TXX1
IN
PEX_TXX1*
IN
PEX_TXX2
IN
PEX_TXX2*
IN
PEX_TXX3
IN
PEX_TXX3*
IN
PEX_TXX4
IN
PEX_TXX4*
IN
PEX_TXX5
IN
PEX_TXX5*
IN
PEX_TXX6
IN
PEX_TXX6*
IN
PEX_TXX7
IN
PEX_TXX7*
IN
PEX_TXX8
IN
PEX_TXX8*
IN
PEX_TXX9
IN
IN
PEX_TXX10
IN
PEX_TXX10*
IN
PEX_TXX11
IN
PEX_TXX11*
IN
PEX_TXX12
IN
PEX_TXX12*
IN
PEX_TXX13
IN
PEX_TXX13*
IN
PEX_TXX14
IN
PEX_TXX14*
IN
PEX_TXX15
IN
PEX_TXX15*
IN
PEX_RX0
IN
PEX_RX0*
IN
PEX_RX1
IN
PEX_RX1*
IN
PEX_RX2
IN
PEX_RX2*
IN
PEX_RX3
IN
PEX_RX3*
IN
PEX_RX4
IN
PEX_RX4*
IN
PEX_RX5
IN
PEX_RX5*
IN
PEX_RX6
IN
PEX_RX6*
IN
PEX_RX7
IN
PEX_RX7*
IN
PEX_RX8
IN
PEX_RX8*
IN
PEX_RX9
IN
PEX_RX9*
IN
PEX_RX10
IN
PEX_RX10*
IN
PEX_RX11
IN
PEX_RX11*
IN
PEX_RX12
IN
PEX_RX12*
IN
PEX_RX13
IN
PEX_RX13*
IN
PEX_RX14
IN
PEX_RX14*
IN
PEX_RX15
IN
PEX_RX15*
IN
PEX_REFCLK
IN
PEX_REFCLK*
IN
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
DIFF_PAIR
PEX_TX1 1 100DIFF
PEX_TXX15 100DIFF1
A B D F H
IMPEDANCE
100DIFFPEX_TST 1
100DIFFPEX_TST 1
100DIFF1PEX_TX1
100DIFF1PEX_TX2
100DIFF1PEX_TX3
100DIFF1PEX_TX4
100DIFF1PEX_TX5
100DIFFPEX_TX6 1
100DIFF1PEX_TX6
100DIFF1PEX_TX7
100DIFF1PEX_TX7
100DIFF1PEX_TX8
100DIFF1PEX_TX8
100DIFF1PEX_TX9
100DIFF1PEX_TX9
100DIFF1PEX_TX10
100DIFF1PEX_TX10
100DIFF1PEX_TX11
100DIFF1PEX_TX11
100DIFFPEX_TX12 1
100DIFF1PEX_TX12
100DIFF1PEX_TX13
100DIFF1PEX_TX13
100DIFF1PEX_TX14
100DIFF1PEX_TX14
100DIFF1PEX_TX15
100DIFF1PEX_TX15
100DIFF1PEX_TXX0
100DIFF1PEX_TXX0
100DIFF1PEX_TXX1
100DIFF1PEX_TXX1
100DIFF1PEX_TXX2
100DIFF1PEX_TXX2
100DIFF1PEX_TXX3
100DIFF1PEX_TXX3
100DIFF1PEX_TXX4
100DIFF1PEX_TXX4
100DIFF1PEX_TXX5
100DIFF1PEX_TXX5
100DIFFPEX_TXX6 1
100DIFF1PEX_TXX6
100DIFF1PEX_TXX7
100DIFF1PEX_TXX7
100DIFF1PEX_TXX8
100DIFF1PEX_TXX8
100DIFFPEX_TXX9 1
100DIFF1PEX_TXX9
100DIFF1PEX_TXX10
100DIFF1PEX_TXX10
100DIFF1PEX_TXX11
100DIFF1PEX_TXX11
100DIFF1PEX_TXX12
100DIFF1PEX_TXX12
100DIFF1PEX_TXX13
100DIFF1PEX_TXX13
100DIFF1PEX_TXX14
100DIFF1PEX_TXX14
100DIFF1PEX_RX0
100DIFF1PEX_RX0
100DIFF1PEX_RX1
100DIFF1PEX_RX2
100DIFF1PEX_RX2
100DIFF1PEX_RX3
100DIFF1PEX_RX3
100DIFF1PEX_RX4
100DIFF1PEX_RX4
100DIFF1PEX_RX5
100DIFF1PEX_RX5
100DIFF1PEX_RX6
100DIFF1PEX_RX6
100DIFF1PEX_RX7
100DIFF1PEX_RX8
100DIFF1PEX_RX8
100DIFF1PEX_RX9
100DIFF1PEX_RX9
100DIFFPEX_RX10 1
100DIFF1PEX_RX10
100DIFF1PEX_RX11
100DIFF1PEX_RX11
100DIFF1PEX_RX12
100DIFF1PEX_RX12
100DIFF1PEX_RX13
100DIFF1PEX_RX13
100DIFF1PEX_RX14
100DIFF1PEX_RX14
100DIFF1PEX_RX15
100DIFF1PEX_RX15
100DIFF1PEX_REFCLK
100DIFF1PEX_REFCLK
12V
C31
C668
4.7UF
25V
10%
X5R
1206
COMMON
C666
.01UF
25V
10%
X7R
0402
COMMON
3V3
SNN_3V3AUX
PRSNT
SNN_PE_PRSNT2_A
SNN_PE_RSVD2
SNN_PE_PRSNT2_B
SNN_PE_RSVD3
SNN_PE_RSVD4
SNN_PE_RSVD5
SNN_PE_PRSNT2_C
SNN_PE_RSVD6
SNN_PE_RSVD7
SNN_PE_RSVD8
3.30000
4.7UF
25V
10%
X5R
1206
COMMON
GND
CN1
CON_FINGE R_PEX_164
CON_X16
COMMON
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B17
PRSNT2
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
TRST* JTAG1
TCLK JTAG2
TDI JTAG3
TDO JTAG4
TMS JTAG5
GND
END OF X1
B31
PRSNT2
A19
RSVD
B30
RSVD
A32
RSVD
A20
GND
B21
GND
B22
GND
A23
GND
A24
GND
B25
GND
B26
GND
A27
GND
A28
GND
B29
GND
A31
GND
B32
GND
GND
GND
END OF X4
B48
PRSNT2
A33
RSVD
A34
GND
B35
GND
B36
GND
A37
GND
A38
GND
B39
GND
B40
GND
A41
GND
A42
GND
B43
GND
B44
GND
A45
GND
A46
GND
B47
GND
B49
GND
A49
GND
END OF X8
B81
PRSNT2
A50
RSVD
B82
RSVD
A51
GND
B52
GND
B53
GND
A54
GND
A55
GND
B56
GND
B57
GND
A58
GND
A59
GND
B60
GND
B61
GND
A62
GND
A63
GND
B64
GND
B65
GND
A66
GND
A67
GND
B68
GND
B69
GND
A70
GND
A71
GND
B72
GND
B73
GND
A74
GND
A75
GND
B76
GND
B77
GND
A78
GND
A79
GND
B80
GND
A82
GND
GND
END OF X16
SMCLK
SMDAT
PERST
REFCLK
REFCLK
PERP0
PERN0
PETP0
PETN0
PERP1
PERN1
PETP1
PETN1
PERP2
PERN2
PETP2
PETN2
PERP3
PERN3
PETP3
PETN3
PERP4
PERN4
PETP4
PETN4
PERP5
PERN5
PETP5
PETN5
PERP6
PERN6
PETP6
PETN6
PERP7
PERN7
PETP7
PETN7
PERP8
PERN8
PETP8
PETN8
PERP9
PERN9
PETP9
PETN9
PERP10
PERN10
PETP10
PETN10
PERP11
PERN11
PETP11
PETN11
PERP12
PERN12
PETP12
PETN12
PERP13
PERN13
PETP13
PETN13
PERP14
PERN14
PETP14
PETN14
PERP15
PERN15
PETP15
PETN15
SNN_JTAGE_TRST*
B9
SNN_JTAGE_TCLK
A5
JTAGE_TDI/O
A6
A7
SNN_JTAGE_TMS
A8
MAKE CUTTABLE TRACE
For G78-LE
F3V3 F3V3
R104
R103
47K
47K
5%
5%
0603
SNN_PEX_SMCLK
B5
SNN_PEX_SMDAT
B6
SNN_PEX_WAKE*
B11
WAKE
PEX_PWRGD*
A11
PEX_REFCLK
A13
PEX_REFCLK*
A14
PEX_TXX0
A16
PEX_TXX0*
A17
PEX_RX0
B14
PEX_RX0*
B15
PEX_TXX1
A21
PEX_TXX1*
A22
PEX_RX1
B19
PEX_RX1*
B20
PEX_TXX2
A25
COMMON X5R 10%
PEX_TXX2*
A26
PEX_RX2
B23
PEX_RX2*
B24
PEX_TXX3
A29
PEX_TXX3*
A30
PEX_RX3
B27
PEX_RX3*
B28
PEX_TXX4
A35
PEX_TXX4*
A36
PEX_RX4
B33
PEX_RX4*
B34
PEX_TXX5
A39
COMMON X5R 10% 10V 0402
PEX_TXX5*
A40
PEX_RX5
B37
PEX_RX5*
B38
PEX_TXX6
A43
COMMON X5R 10% 10V 0402
PEX_TXX6*
A44
PEX_RX6
B41
PEX_RX6*
B42
PEX_TXX7
A47
COMMON 10% 10V 0402
PEX_TXX7*
A48
PEX_RX7
B45
PEX_RX7*
B46
PEX_TXX8
A52
PEX_TXX8*
A53
PEX_RX8
B50
PEX_RX8*
B51
PEX_TXX9PEX_TXX9*
A56
COMMON X5R 10% 10V 0402
PEX_TXX9*
A57
PEX_RX9
B54
PEX_RX9*
B55
PEX_TXX10
A60
COMMON 10V 040210%X5R
PEX_TXX10*
A61
PEX_RX10
B58
PEX_RX10*
B59
PEX_TXX11
A64
COMMON 10V
PEX_TXX11*
A65
PEX_RX11
B62
PEX_RX11*
B63
PEX_TXX12
A68
PEX_TXX12*
A69
PEX_RX12
B66
PEX_RX12*
B67
PEX_TXX13
A72
PEX_TXX13*
A73
PEX_RX13
B70
PEX_RX13*
B71
PEX_TXX14
A76
PEX_TXX14*
A77
PEX_RX14
B74
PEX_RX14*
B75
PEX_TXX15
A80
PEX_TXX15*
A81
PEX_RX15
B78
PEX_RX15*
B79
SNN_PEX_SMCLK
SNN_PEX_SMDAT
C653 .1UF
10VX5R 0402COMMON 10%
C648
.1UF
10%X5R
COMMON 040210V10%X5R
C636
.1UF
C625
.1UF
10VCOMMON 10% 0402
X5R
COMMON
C616 .1UF
10V10%X5R 0402COMMON
COMMON
C611
.1UF
COMMON X5R
C602
.1UF
COMMON X5R 10% 10V 0402
C593
.1UF
X5R
COMMON X5R 10% 10V
C587
.1UF
10%X5R
C573
.1UF
COMMON
C563
.1UF
C554
.1UF
COMMON X5R
C542
.1UF
10%COMMON
10V 0402X5R
COMMON X5R 10V
C539 .1UF
C536 .1UF
C528 .1UF
ASSEMBLY
PAGE DETAI L
X5R 10% 10VCOMMON
040210VCOMMON
040210V
10% 10VX5R 0402
10% 10V 0402
040210VCOMMON
X5R 10% 10V 0402
X5RCOMMON 10%
0402X5R 10%
040210V10%X5RCOMMON
X5R 040210V10%COMMON
040210VX5RCOMMON 10%
040210VCOMMON X5R 10%
0603
COMMON
COMMON
R1015%0
0402 COMMON
R1025%0
0402 COMMON
C650
.1UF
0402
C641
.1UF
C630
.1UF
10VCOMMON
040210%X5R
C620
.1UF
040210V10%X5R
C612
.1UF
C609
.1UF
C599
.1UF
C589
.1UF
0402
C577
.1UF
0402
10V10%X5RCOMMON
C568
.1UF
C556
.1UF
10V 0402
C545
.1UF
10V10% 0402
C541
.1UF
040210%
C538 .1UF
C532 .1UF
040210V10%X5RCOMMON
C527 .1UF
040210V10%X5RCOMMON
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
PCI Express Interface
R535 200
0402
5%
COMMON
GPU_F12
GPU_F11
PEX_TSTCLK
PEX_TSTCLK*
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*
C559
.022UF
16V
10%
X7R
0402
COMMON
C576
1UF
6.3V
10%
X5R
0402
COMMON
PLACE NEAR GPU
PEX1V2
C588
C570
C590
.01UF
25V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
.01UF
25V
10%
X7R
0402
COMMON
GND
C581
C558
C591
100PF
.01UF
25V
10%
X7R
0402
COMMON
C595
220PF
50V
5%
C0G
0402
COMMON
C592
220PF
50V
5%
C0G
0402
COMMON
C584
.01UF
25V
10%
X7R
0402
COMMON
50V
5%
C0G
0402
COMMON
C580
100PF
50V
5%
C0G
0402
COMMON
C637
10UF
6.3V
20%
X5R
0805
COMMON
.01UF
25V
10%
X7R
0402
COMMON
C550
1UF
6.3V
10%
X5R
0402
COMMON
C661
10UF
6.3V
20%
X5R
0805
COMMON
C50
10UF
6.3V
20%
X5R
0805
COMMON
F3V3
C583
C58
.022UF
1UF
16V
10V
10%
10%
X5R
X7R
0402
0603
COMMON
C658
1UF
6.3V
10%
X5R
0402
COMMON
C633
.01UF
25V
10%
X7R
0402
COMMON
COMMON
GND
C628
1UF
6.3V
10%
X5R
0402
COMMON
C638
1UF
6.3V
10%
X5R
0402
COMMON
LB510
LB516
IND_SMD_0402COMMON
IND_SMD_0402COMMON
LB506
PLACE NEAR GPU
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
C652
22UF
6.3V
20%
X5R
0805
COMMON
NVVDD
GND
GND
GND
GND
GND
IND_SMD_0603COMMON
HGFEDCBA
120R@100MHz
120R@100MHz
30R@100MHz
GND
DATE
PEX1V2
GND
NVVDD
PEX1V2
C645
4.7UF
6.3V
10%
X5R
0805
COMMON
PEX1V2
5-OCT-2005
1
2
3
For G78-LE
4
For G72
5
www.vinafix.vn
<XR_PAGE_TITLE>
GPU: FB-Interface
HGFEDCBA
U2B
BGA_0533_P080_230X230_G3_064B
1
2
3
4
FBAD[31..0]
4,4,5
BI
FBAD[63..32]
4,4,5
BI
4,4,5
4,4,5,5
4,4,5,5
FBADQM[7..0]
OUT
FBADQS[7..0]
BI
FBADQSN[7..0]
BI
0
FBAD0
FBAD1
1
2
FBAD2
3
FBAD3
4
FBAD4
5
FBAD5
6
FBAD6
7
FBAD7
8
FBAD8
9
FBAD9
FBAD10
10
FBAD11
11
FBAD12
12
FBAD13
13
FBAD14
14
FBAD15
15
FBAD16
16
FBAD17
17
FBAD18
18
FBAD19
19
FBAD20
20
FBAD21
21
FBAD22
22
FBAD23
23
FBAD24
24
FBAD25
25
FBAD26
26
FBAD27
27
FBAD28
28
FBAD29
29
FBAD30
30
FBAD31
31
32
FBAD32
33
FBAD33
34
FBAD34
35
FBAD35
36
FBAD36
37
FBAD37
38
FBAD38
39
FBAD39
40
FBAD40
41
FBAD41
42
FBAD42
43
FBAD43
44
FBAD44
45
FBAD45
46
FBAD46
47
FBAD47
48
FBAD48
49
FBAD49
50
FBAD50
51
FBAD51
52
FBAD52
53
FBAD53
54
FBAD54
55
FBAD55
56
FBAD56
57
FBAD57
58
FBAD58
59
FBAD59
60
FBAD60
61
FBAD61
62
FBAD62
63
FBAD63
0
FBADQM0
1
FBADQM1
2
FBADQM2
3
FBADQM3
4
FBADQM4
5
FBADQM5
6
FBADQM6
7
FBADQM7
0
FBADQS0
1
FBADQS1
2
FBADQS2
3
FBADQS3
4
FBADQS4
5
FBADQS5
6
FBADQS6
7
FBADQS7
0
FBADQSN0
1
FBADQSN1
2
FBADQSN2
3
FBADQSN3
4
FBADQSN4
5
FBADQSN5
6
FBADQSN6
7
FBADQSN7
FBVDDQ
R54
1K
Rt
1%
0402
COMMON
R55
1K
Rb
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
1%
0402
COMMON
GND
FBVREF = FBVDDQ * Rb/(Rt + Rb)
VREF = 0.5 * FBVDDQ
DDR2: 1.00V = 2.0V * 1K/(1K + 1K)
A B D F H
C59
.1UF
10V
10%
X5R
0402
COMMON
FBVREF
A26
C24
B24
A24
C22
A25
B25
D23
G22
J23
E24
F23
J24
F24
G23
H24
D16
E16
D17
F18
E19
E18
D20
D19
A18
B18
A19
B19
D18
C19
C16
C18
N26
N25
R25
R26
R27
T25
T27
T26
AB23
Y24
AB24
AB22
AC24
AC22
AA23
AA22
T24
T23
R24
R23
R22
T22
N23
P24
AA24
AA27
AA26
AB25
AB26
AB27
AA25
W25
D21
F22
F20
A21
V27
W22
V22
V24
B22
D22
E21
C21
V25
W24
U24
W26
A22
E22
F21
B21
V26
W23
V23
W27
A16
COMMON
2/12 FRAME_BUFF ER
FB_DQ0
FB_DQ1
FB_DQ2
FB_DQ3
FB_DQ4
FB_DQ5
FB_DQ6
FB_DQ7
FB_DQ8
FB_DQ9
FB_DQ10
FB_DQ11
FB_DQ12
FB_DQ13
FB_DQ14
FB_DQ15
FB_DQ16
FB_DQ17
FB_DQ18
FB_DQ19
FB_DQ20
FB_DQ21
FB_DQ22
FB_DQ23
FB_DQ24
FB_DQ25
FB_DQ26
FB_DQ27
FB_DQ28
FB_DQ29
FB_DQ30
FB_DQ31
FB_DQ32
FB_DQ33
FB_DQ34
FB_DQ35
FB_DQ36
FB_DQ37
FB_DQ38
FB_DQ39
FB_DQ40
FB_DQ41
FB_DQ42
FB_DQ43
FB_DQ44
FB_DQ45
FB_DQ46
FB_DQ47
FB_DQ48
FB_DQ49
FB_DQ50
FB_DQ51
FB_DQ52
FB_DQ53
FB_DQ54
FB_DQ55
FB_DQ56
FB_DQ57
FB_DQ58
FB_DQ59
FB_DQ60
FB_DQ61
FB_DQ62
FB_DQ63
FB_DQM0
FB_DQM1
FB_DQM2
FB_DQM3
FB_DQM4
FB_DQM5
FB_DQM6
FB_DQM7
FB_DQS_WP0
FB_DQS_WP1
FB_DQS_WP2
FB_DQS_WP3
FB_DQS_WP4
FB_DQS_WP5
FB_DQS_WP6
FB_DQS_WP7
FB_DQS_RN0
FB_DQS_RN1
FB_DQS_RN2
FB_DQS_RN3
FB_DQS_RN4
FB_DQS_RN5
FB_DQS_RN6
FB_DQS_RN7
FB_VREF
FB_PLLAVDD
FB_PLLGND
E15
FB_VTT
F15
FB_VTT
F16
FB_VTT
J17
FB_VTT
J18
FB_VTT
L19
FB_VTT
N19
FB_VTT
R19
FB_VTT
U19
FB_VTT
W19
FB_VTT
F17
FB_VDDQ
F19
FB_VDDQ
J19
FB_VDDQ
M19
FB_VDDQ
T19
FB_VDDQ
J22
FB_VDDQ
L22
FB_VDDQ
P22
FB_VDDQ
U22
FB_VDDQ
Y22
FB_VDDQ
G27
FB_CMD0
D25
FB_CMD1
F26
FB_CMD2
F25
FB_CMD3
G25
FB_CMD4
J25
FB_CMD5
J27
FB_CMD6
M26
FB_CMD7
C27
FB_CMD8
C25
FB_CMD9
D24
FB_CMD10
N27
FB_CMD11
G24
FB_CMD12
J26
FB_CMD13
M27
FB_CMD14
C26
FB_CMD15
M25
FB_CMD16
D26
FB_CMD17
D27
FB_CMD18
K26
FB_CMD19
K25
FB_CMD20
K24
FB_CMD21
F27
FB_CMD22
K27
FB_CMD23
G26
FB_CMD24
B27
FB_CMD25
N24
FB_CMD26
L24
FB_CLK0
K23
FB_CLK0
M22
FB_CLK1
N22
FB_CLK1
FB_CAL_PU_GND
FB_DEBUG
FB_REFCLK
FB_REFCLK
NV44
FB_PLLVDD
FB_PLLAVDD
FB_PLLGND
D15
E13
H22
FBA_DEBUG_ODT
K22
M23
M24
D14
FBA_PLLAVDD
D13
C15
FB_CAL_PD_VDDQ
FB_CAL_TERM_GND
NV46
NC
GND
PLACE NEAR BGA
C548
C561
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
FBVTT connected for DDR2 ram
can be remov e ?
FBACMD[25..0]
R515 40.2
04021%COMMON
R135
0
5%
0402
COMMON
For G78-LE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
4,4,4,4
OUT
4,4,4,4
OUT
5,5,5,5
OUT
5,5,5,5
OUT
For G78-LE
GND
C575
.01UF
25V
10%
X7R
0402
COMMON
PLACE NEAR BALLS
PD REQUIRED FOR INITIALIZATION
CKE
PLACE NEAR GPU
R137
10K
5%
0402
COMMON
GND
FBACMD0
FBACMD1
FBACMD2
FBACMD3
FBACMD4
FBACMD5
FBACMD6
FBACMD7
FBACMD8
FBACMD9
FBACMD10
FBACMD11 FBACMD11
FBACMD12
FBACMD13
FBACMD14
FBACMD15
FBACMD16
FBACMD17
FBACMD18
FBACMD19
FBACMD20
FBACMD21
FBACMD22
FBACMD23
FBACMD24
FBACMD25
SNN_FBA_CMD26
FBACLK0
FBACLK0*
FBACLK1
FBACLK1*
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
SNN_FBA_REFCLK
SNN_FBA_REFCLK*
COMMON
R136
10K
5%
0402
C546
.1UF
10V
10%
X5R
0402
COMMON
4,4,5
OUT
R501
10K
5%
0402
COMMON
GND
FBVDDQ
FBVDDQ
C574
1UF
6.3V
10%
X5R
0402
COMMON
PLACE NEAR GPU
R517
49.9
1%
0402
COMMON
GND
R518
49.9
1%
0402
COMMON
ASSEMBLY
PAGE DETAI L
C547
.1UF
10V
10%
X5R
0402
COMMON
FOR G72
R517=40.2 OHM
R518=30.1 OHM
FBVDDQ
C57
4.7UF
6.3V
10%
X5R
0603
COMMON
C579
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
PLACE BELOW GPU
C540
4700PF
25V
10%
X7R
0402
COMMON
C560
4700PF
25V
10%
X7R
0402
COMMON
C544
4700PF
25V
10%
X7R
0402
COMMON
C535
.022UF
16V
10%
X7R
0402
COMMON
C530
.022UF
16V
10%
X7R
0402
COMMON
C533
.1UF
10V
10%
X5R
0402
COMMON
C529
.1UF
10V
10%
X5R
0402
COMMON
LABTESTPOINTS
FBA_DEBUG_ODT
TP501
C567
.01UF
25V
10%
X7R
0402
COMMON
LB502
IND_SMD_0402COMMON
C578
4.7UF
6.3V
10%
X5R
0805
COMMON
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
Frame Buffer Interface
220R@100MHz
C566
1UF
6.3V
10%
X5R
0402
COMMON
C562
4.7UF
6.3V
10%
X5R
0805
COMMON
PEX1V2
GND
E GC
C552
4700PF
25V
10%
X7R
0402
COMMON
C553
4700PF
25V
10%
X7R
0402
COMMON
Rmoved two 0.022uf, and two 0.1uf
LB501
220R@100MHz
COMMON
IND_SMD_0402
C549
.1UF
10V
10%
X5R
0402
COMMON
C534
.022UF
16V
10%
X7R
0402
COMMON
F3V3
RESET
For G78-LE
FBA_DEBUG_ODT
C531
.1UF
10V
10%
X5R
0402
COMMON
GND
FBACMD12
FBVDDQ
GND
GND
NV44
FBA CMD/ADDR TERMINATIONS:
FBACMD0
FBACMD1
FBACMD4
C543
1UF
6.3V
10%
X5R
0402
COMMON
FBACMD5
FBACMD9
FBACMD10
GND
C555
1UF
6.3V
10%
X5R
0402
COMMON
COMMON
COMMON
NV46
NV44
R57
0
0402
5%
R58
0
0402
5%
FBACMD15
FBACMD16
FBACMD19
FBACMD20
FBACMD23
FBACMD24
FBA_ODT
FBVDDQ
150
COMMON
COMMON
150
COMMON
150
COMMONRPAK_PAR_4_2010
150
COMMON
150
COMMON
150
COMMON
COMMONRPAK_PAR_4_2010
FBVDDQ
FBACMD2
FBACMD3
GND
FBACMD6
1 8
RPAK_PAR_4_2010
2 7
FBACMD8
2 7
1 8
RPAK_PAR_4_2010COMMON
GND
RP8D
4 5
RPAK_PAR_4_2010
+/-5%
RP8C
3 6
RPAK_PAR_4_2010
+/-5%
RP3B
2 7
RPAK_PAR_4_2010
+/-5%
RP3A 150
1 8
+/-5%
RP12A
1 8
RPAK_PAR_4_2010
+/-5%
RP12B 150
2 7
RPAK_PAR_4_2010
+/-5%
RP11C
3 6
RPAK_PAR_4_2010
+/-5%
RP11D
4 5
+/-5%
FBVDDQ
RP7A
150
FBACMD13
1 8
RPAK_PAR_4_2010COMMON
+/-5%
RP7B
150
2 7
RPAK_PAR_4_2010
COMMON
+/-5%
RP6B
150
2 7
RPAK_PAR_4_2010COMMON
+/-5%
RP6A
150
1 8
COMMONRPAK_PAR_4_2010
+/-5%
1 8
RPAK_PAR_4_2010
2 7
RPAK_PAR_4_2010
RP12C
FBACMD14
3 6
RP12D
4 5
GND
FBVDDQ
RP7D
4 5
+/-5%
RP7C
3 6
RPAK_PAR_4_2010
+/-5%
RP11B
2 7
+/-5%
RP11A 150
1 8
+/-5%
150
COMMONRPAK_PAR_4_2010
150
COMMON
150
COMMONRPAK_PAR_4_2010
COMMONRPAK_PAR_4_2010
RP1A
FBACMD17
1 8
RPAK_PAR_4_2010COMMON
RP1B
2 7
FBACMD18
RP10C
3 6
RP10D
4 5
RPAK_PAR_4_2010
GND
FBVDDQ
RP3D
4 5
RPAK_PAR_4_2010
+/-5%
RP3C
3 6
RPAK_PAR_4_2010COMMON
+/-5%
RP5C
3 6
RPAK_PAR_4_2010
+/-5%
RP5D
4 5
RPAK_PAR_4_2010
+/-5%
RP1D
150
4 5
COMMONRPAK_PAR_4_2010
+/-5%
RP1C
150
3 6
COMMONRPAK_PAR_4_2010
+/-5%
RP2B
150
2 7
COMMONRPAK_PAR_4_2010
+/-5%
RP2A
150
1 8
RPAK_PAR_4_2010COMMON
+/-5%
150
COMMON
150
150
COMMON
150
COMMON
FBVDDQ
GND
For G78-LE
COMMON
FBACMD21
FBACMD22
GND
FBACMD25
FBACMD7
R60
10K
5%
0402
RP4D
4 5
RPAK_PAR_4_2010COMMON
RP4C
3 6
RPAK_PAR_4_2010
RP2C
3 6
RP2D
4 5
RP10A
1 8
RP10B
2 7
RP6D
4 5
RP6C 150
3 6
FBVDDQ
R61
10K
5%
0402
NS
PD REQUIRED FOR INITIALIZATION OF DDR2
GND
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
RP9D
4 5
RPAK_PAR_4_2010COMMON
+/-5%
RP9C
3 6
RPAK_PAR_4_2010
+/-5%
RP9B
2 7
RPAK_PAR_4_2010
+/-5%
RP9A
1 8
+/-5%
RP5A
150
COMMON
+/-5%
RP5B
150
COMMONRPAK_PAR_4_2010
+/-5%
RP8B
150
COMMONRPAK_PAR_4_2010
+/-5%
RP8A 150
+/-5%
RP4A
150
COMMON
+/-5%
RP4B
150
COMMON
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
FBVDDQ
150
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMON
+/-5%
FBVDDQ
150
+/-5%
150
COMMON
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
150
COMMONRPAK_PAR_4_2010
+/-5%
COMMONRPAK_PAR_4_2010
+/-5%
150
150
COMMON
150
COMMON
150
COMMONRPAK_PAR_4_2010
FBVDDQ
FBVDDQ
FBVDDQ
GND
GND
FBVDDQ
GND
GND
GND
DATE
1
GND
2
3
4
4,4,5
OUT
5
5-OCT-2005
www.vinafix.vn
<XR_PAGE_TITLE>
Memory Bit 0..31
PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE TO MEMORY
1
3,4,5
2
3
4
FBACMD[25..0]
IN
USED ONLY FOR 1GB DEVICES ---->
3,4,4,4
3,4,4,4
3,3,4,5
BI
3,4,5
IN
3,4,5,5
IN
3,4,5,5
IN
U3C
BGA_0084_P080_140X120
15
FBACMD15 FBACMD15
25
FBACMD25 FBACMD25
9
FBACMD9 FBACMD9
8
FBACMD8 FBACMD8
1
FBACMD1 FBACMD1
3
FBACMD3 FBACMD3
2
FBACMD2 FBACMD2
0
FBACMD0 FBACMD0
24
FBACMD24 FBACMD24
22
FBACMD22 FBACMD22
21
FBACMD21 FBACMD21
23
FBACMD23 FBACMD23
19
FBACMD19 FBACMD19
20
FBACMD20 FBACMD20
17
FBACMD17 FBACMD17
16
FBACMD16 FBACMD16
14
FBACMD14 FBACMD14
SNN_FBA1_NC_R8
SNN_FBA1_NC_R3
SNN_FBA1_NC_R7
10
FBACMD10 FBACMD10
18
FBACMD18 FBACMD18
7
FBACMD7 FBACMD7
11
FBACLK0 FBACLK0
IN
FBACLK0* FBACLK0*
IN
3,4,5
FBAD[63..0]
FBADQM[7..0]
FBADQS[7..0]
FBADQSN[7..0]
FBACMD11 FBACMD11
FBA_ODT FBA_ODT
IN
SNN_FBA1_NC_A2
SNN_FBA1_NC_E2
0
FBADQM0
1
FBADQM1
2
FBADQM2
3
FBADQM3
0
FBADQS0 FBADQS0
1
FBADQS1
2
FBADQS2
3
FBADQS3
0
FBADQSN0
1
FBADQSN1
2
FBADQSN2
3
FBADQSN3
COMMON
K7
1/2
RAS
L7
CAS
K3
WE
L8
CS
M8
A<0>
M3
A<1>
M7
A<2>
N2
A<3>
N8
A<4>
N3
A<5>
N7
A<6>
P2
A<7>
P8
A<8>
P3
A<9>
M2
A<10>
P7
A<11>
R2
A<12>
R8
NC/A<13>
R3
NC/A<14>
R7
NC/A<15>
L2
BA<0>
L3
BA<1>
L1
NC/BA<2>
K2
CKE
J8
CLK
K8
CLK
K9
ODT
A2
NC
E2
NC
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBADQM0
FBADQSN0
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBADQM1
FBADQS1
FBADQSN1
HGFEDCBA
C526
4.7UF
6.3V
10%
X5R
0603
COMMON
C84
4.7UF
6.3V
10%
X5R
0603
COMMON
NV_CRITICAL_NET
1100DIFFFBACLK0
1100DIFFFBACLK0
250OHM
1100DIFFFBADQS0
1100DIFFFBADQS0
1100DIFFFBADQS2
1100DIFFFBADQS3
1FBADQS3 100DIFF
250OHM
256OHM
256OHM
1
2
3
4
DIFFPAIRNET NV_IMPEDANCE
FBACLK0
3,4,4,4
IN
FBACLK0*
3,4,4,4
IN
FBAD[63..0]
3,3,4,5
IN
0
3,4,5,5
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
D1
D3
C2
D7
B9
B1
D9
C8
B3
B7
A8
F9
G8
H3
G2
H1
F1
H9
H7
F3
F7
E8
U501B
BGA_0084_P080_140X120
COMMON
RAS
CAS
WE
CS
A<0>
A<1>
A<2>
A<3>
A<4>
A<5>
A<6>
A<7>
A<8>
A<9>
A<10>
A<11>
A<12>
NC/A<13>
NC/A<14>
NC/A<15>
BA<0>
BA<1>
NC/BA<2>
CKE
CLK
CLK
ODT
NC
NC
U501A
BGA_0084_P080_140X120
COMMON
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
U3B
BGA_0084_P080_140X120
COMMON
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
FBVDDQ
1/2
2/2
2/2
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VDDQ
J1
VDDL
A3
VSS
E3
VSS
J3
VSS
GND
N1
VSS
P9
VSS
A7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSQ
F2
VSSQ
F8
VSSQ
H2
VSSQ
H8
VSSQ
J7
VSSL
J2
Vref
C508
.047UF
16V
10%
X7R
0402
COMMON
GND
FBVDDQ
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VDDQ
J1
VDDL
A3
VSS
E3
VSS
J3
VSS
N1
VSS
GND
P9
VSS
A7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSQ
F2
VSSQ
F8
VSSQ
H2
VSSQ
H8
VSSQ
J7
VSSL
VREF_B
J2
Vref
D1
D3
C8
D7
D9
B1
C2
B9
B3
B7
A8
G8
H9
F1
H3
H7
G2
H1
F9
F3
F7
E8
C510
.047UF
16V
10%
X7R
0402
COMMON
GND
U3A
BGA_0084_P080_140X120
COMMON
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
U501C
BGA_0084_P080_140X120
COMMON
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
FBVDDQ
USED ONLY FOR 1GB DEVICES ---->
3,4,4,4
IN
3,4,4,4
IN
R505
1K
1%
0402
COMMON
R502
1K
1%
0402
COMMON
GND
2/2
2/2
15
25
9
8
1
3
2
0
24
22
21
23
19
20
17
16
14
10
18
7
11
SNN_FBA2_NC_R8
SNN_FBA2_NC_R3
SNN_FBA2_NC_R7
SNN_FBA2_NC_A2
SNN_FBA2_NC_E2
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBADQM2
FBADQS2
FBADQSN2
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBADQM3
FBADQS3
FBADQSN3
FBADQS[7..0]
IN
FBADQSN[7..0]
3,4,5,5
IN
FBVDDQ
C507
1UF
6.3V
10%
X5R
0402
COMMON
GND
FBVDDQ
C69
.022UF
16V
10%
X7R
0402
COMMON
GND
FBVDDQ
C63
1UF
6.3V
10%
X5R
0402
COMMON
GND
FBVDDQ
GND
FBADQS0
FBADQSN0
0
FBADQS1
1
FBADQSN1
1
FBADQS2
2
FBADQSN2
2
FBADQS3
3
FBADQSN3
3
FBADQM[7..0]
3,4,5
IN
FBACMD[25..0]
3,4,5
IN
FBA_ODT
3,4,5
IN
C62
C61
1UF
6.3V
10%
X5R
0402
COMMON
C511
1UF
6.3V
10%
X5R
0402
COMMON
C522
1UF
6.3V
10%
X5R
0402
COMMON
C66
4700PF
25V
10%
X7R
0402
COMMON
C512
1UF
6.3V
10%
X5R
0402
COMMON
C73
4700PF
25V
10%
X7R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
C64
4700PF
25V
10%
X7R
0402
COMMON
C68
1UF
6.3V
10%
X5R
0402
COMMON
C81
4700PF
25V
10%
X7R
0402
COMMON
C514
.022UF
16V
10%
X7R
0402
COMMON
C77
.022UF
16V
10%
X7R
0402
COMMON
C501
.022UF
16V
10%
X7R
0402
COMMON
C83
1UF
6.3V
10%
X5R
0402
COMMON
C71
4700PF
25V
10%
X7R
0402
COMMON
C519
1UF
6.3V
10%
X5R
0402
COMMON
100DIFF 1FBADQS1
100DIFF 1FBADQS1
100DIFF 1FBADQS2
C515
1UF
6.3V
10%
X5R
0402
COMMON
C517
4700PF
25V
10%
X7R
0402
COMMON
C505
1UF
6.3V
10%
X5R
0402
COMMON
For G78-LE
FBACLK0*
IN
3,4,4,4
3,4,4,4
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
IN
FBACLK0
R108
121
5%
0402
COMMON
R106 243
0402 COMMON
5%
R107 243
0402 COMMON
5%
FBVDDQ
R105
0
5%
0402
COMMON
C101
.01UF
25V
10%
X7R
0402
COMMON
GND
ASSEMBLY
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
Memory 1st bank 0. .3 1
E GC
www.vinafix.vn
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
NET
DIFFPAIR NV_CRITICAL_NETNV_IMPEDANCE
FBACLK1
3,5,5,5
IN
FBACLK1*
Memory Bit 32..63
PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE TO MEMORY
FBACMD[25..0]
3,4,4
1
IN
15
FBACMD15 FBACMD15
25
FBACMD25 FBACMD25
9
FBACMD9 FBACMD9
8
FBACMD8 FBACMD8
1
FBACMD1 FBACMD1
3
13
4
SUBPARTITION BITS ---->
2
USED ONLY FOR 1GB DEVICES ----> USED ONLY FOR 1GB DEVICES ---->
3,5,5,5
3,5,5,5
5
6
FBACLK1 FBACLK1
IN
FBACLK1* FBACLK1*
IN
3,4,4
3
FBACMD3 FBACMD3
FBACMD13 FBACMD13
FBACMD4 FBACMD4
FBACMD5 FBACMD5
FBACMD6 FBACMD6
21
FBACMD21 FBACMD21
23
FBACMD23 FBACMD23
19
FBACMD19 FBACMD19
20
FBACMD20 FBACMD20
17
FBACMD17 FBACMD17
16
FBACMD16 FBACMD16
14
FBACMD14 FBACMD14
SNN_FBA3_NC_R8
SNN_FBA3_NC_R3
SNN_FBA3_NC_R7
10
FBACMD10 FBACMD10
18
FBACMD18 FBACMD18
7
FBACMD7 FBACMD7
11
FBACMD11 FBACMD11
FBA_ODT
IN
SNN_FBA3_NC_A2
SNN_FBA3_NC_E2
3,3,4,4
3,4,4
3,4,4,5
FBAD[63..0]
BI
IN
FBADQS[7..0]
IN
4
3,4,4,5
FBADQSN[7..0]
IN
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
K7
L7
K3
L8
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K2
J8
K8
K9
A2
E2
4
5
6
7
4
5
6
7
4
5
6
7
U4C
BGA_0084_P080_140X120
COMMON
1/2
RAS
CAS
WE
CS
A<0>
A<1>
A<2>
A<3>
A<4>
A<5>
A<6>
A<7>
A<8>
A<9>
A<10>
A<11>
A<12>
NC/A<13>
NC/A<14>
NC/A<15>
BA<0>
BA<1>
NC/BA<2>
CKE
CLK
CLK
ODT
NC
NC
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS4
FBADQS5
FBADQS6
FBADQS7
FBADQSN4
FBADQSN5
FBADQSN6
FBADQSN7
U502A
FBVDDQ
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VDDQ
J1
VDDL
A3
VSS
E3
VSS
J3
VSS
GND
N1
VSS
P9
VSS
A7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSQ
F2
VSSQ
F8
VSSQ
H2
VSSQ
H8
VSSQ
J7
VSSL
VREF_A
J2
Vref
GND
32
FBAD32
33
FBAD33
34
FBAD34
35
FBAD35
36
FBAD36
37
FBAD37
38
FBAD38
39
FBAD39
FBADQM4
FBADQS4
FBADQSN4
40
FBAD40
41
FBAD41
42
FBAD42
43
FBAD43
44
FBAD44
45
FBAD45
46
FBAD46
47
FBAD47
FBADQM5
FBADQS5
FBADQSN5
FBVDDQ
C78
.047UF
16V
10%
X7R
0402
COMMON
R59
1K
1%
0402
COMMON
GND
SUBPARTITION BITS ---->
R62
1K
1%
0402
COMMON
U4A
BGA_0084_P080_140X120
COMMON
D9
D7
C8
B9
B1
C2
D3
D1
B3
B7
A8
U502C
BGA_0084_P080_140X120
COMMON
C8
D1
B9
B1
D7
D9
D3
C2
B3
B7
A8
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
3,5,5,5
IN
3,5,5,5
IN
2/2
2/2
3,5,5,5
3,5,5,5
15
25
9
8
1
3
13
4
5
6
21
23
19
20
17
16
14
SNN_FBA4_NC_R8
SNN_FBA4_NC_R3
SNN_FBA4_NC_R7
10
18
7
11
FBA_ODT
SNN_FBA4_NC_A2
SNN_FBA4_NC_E2
For G78-LE
FBACLK1*
IN
IN
FBACLK1
ASSEMBLY
PAGE DETAI L
R112
121
5%
0402
COMMON
BGA_0084_P080_140X120
COMMON
K7
1/2
RAS
L7
CAS
K3
WE
L8
CS
M8
A<0>
M3
A<1>
M7
A<2>
N2
A<3>
N8
A<4>
N3
A<5>
N7
A<6>
P2
A<7>
P8
A<8>
P3
A<9>
M2
A<10>
P7
A<11>
R2
A<12>
R8
NC/A<13>
R3
NC/A<14>
R7
NC/A<15>
L2
BA<0>
L3
BA<1>
L1
NC/BA<2>
K2
CKE
J8
CLK
K8
CLK
K9
ODT
A2
NC
E2
NC
U502B
BGA_0084_P080_140X120
R109
0
5%
0402
COMMON
C102
.01UF
25V
10%
X7R
0402
COMMON
G8
F9
G2
F1
H7
H9
H1
H3
F3
F7
E8
F1
H7
H9
H3
H1
G2
G8
F9
F3
F7
E8
COMMON
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
U4B
BGA_0084_P080_140X120
COMMON
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQM
DQS
DQS
48
FBAD48
49
FBAD49
50
FBAD50
51
FBAD51
52
FBAD52
53
FBAD53
54
FBAD54
55
FBAD55
FBADQM6FBADQM[7..0]
FBADQS6
FBADQSN6
56
FBAD56
57
FBAD57
58
FBAD58
59
FBAD59
60
FBAD60
61
FBAD61
62
FBAD62
63
FBAD63
FBADQM7
FBADQS7
FBADQSN7
FBVDDQ
R110 243
0402 COMMON
5%
R111 243
0402 COMMON
5%
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
Memory 1 st bank 32..63
FBVDDQ
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VDDQ
J1
VDDL
A3
VSS
E3
VSS
J3
VSS
GND
N1
VSS
P9
VSS
A7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSQ
F2
VSSQ
F8
VSSQ
H2
VSSQ
H8
VSSQ
J7
VSSL
J2
Vref
2/2
2/2
C79
.047UF
16V
10%
X7R
0402
COMMON
GND
E GC
3,4,4,5
3,4,4,5
3,5,5,5
IN
4
C67
.022UF
16V
10%
X7R
0402
COMMON
C520
.022UF
16V
10%
X7R
0402
COMMON
C518
1UF
6.3V
10%
X5R
0402
COMMON
C506
1UF
6.3V
10%
X5R
0402
COMMON
FBADQS4
4
5
5
6
6
7
7
C72
1UF
6.3V
10%
X5R
0402
COMMON
C70
4700PF
25V
10%
X7R
0402
COMMON
C509
1UF
6.3V
10%
X5R
0402
COMMON
C504
4700PF
25V
10%
X7R
0402
COMMON
FBADQS4 100DIFF 1
FBADQSN4
FBADQS4 100DIFF 1
FBADQS5
FBADQSN5
FBADQS6
FBADQSN6
FBADQS6 1100DIFF
FBADQS7
FBADQSN7
FBADQS7 100DIFF 1
C65
1UF
6.3V
10%
X5R
0402
COMMON
C74
.022UF
16V
10%
X7R
0402
COMMON
C513
1UF
6.3V
10%
X5R
0402
COMMON
C502
.022UF
16V
10%
X7R
0402
COMMON
FBADQS[7..0]
IN
FBADQSN[7..0]
IN
FBVDDQ
GND
FBVDDQ
GND
FBVDDQ
GND
FBVDDQ
GND
FBACLK1 100DIFF 1
100DIFF 1FBADQS5
100DIFFFBADQS7 1
C75
C523
1UF
6.3V
10%
X5R
0402
COMMON
C521
1UF
6.3V
10%
X5R
0402
COMMON
C76
4700PF
25V
10%
X7R
0402
COMMON
C82
1UF
6.3V
10%
X5R
0402
COMMON
C524
1UF
6.3V
10%
X5R
0402
COMMON
1UF
6.3V
10%
X5R
0402
COMMON
C80
.022UF
16V
10%
X7R
0402
COMMON
C516
1UF
6.3V
10%
X5R
0402
COMMON
C503
4700PF
25V
10%
X7R
0402
COMMON
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
HGFEDCBA
1FBACLK1 100DIFF
1FBADQS5 100DIFF
1FBADQS6 100DIFF
C85
4.7UF
6.3V
10%
X5R
0603
COMMON
1
2
3
C525
4.7UF
6.3V
10%
X5R
0603
COMMON
4
5
5-OCT-2005
DATE
www.vinafix.vn
<XR_PAGE_TITLE>
HGFEDCBA
DAC-A
1
R529
33
COMMON
0402
DACA_HSYNC
IN
DACA_VSYNC
IN
DACA_HSYNC_M
IN
DACA_VSYNC_M
IN
6,8
2
6,8
6,8
DACA_HSYNC_C
IN
DACA_VSYNC_C
IN
DAC_A_RED_L
IN
DAC_A_GREEN_L
IN
DAC_A_BLUE_L
IN
DACA_RED_C
IN
DACA_GREEN_C
IN
DACA_BLUE_C
IN
CRITICAL_NETNet Name
2 50OHM
2 50OHM
2 50OHM
1 75OHM
IMPEDANCE
50OHM2
50OHM2
50OHM2
75OHM1
75OHM1
75OHM1
75OHM1
75OHM1
5V
C17
.1UF
16V
10%
X7R
0603
COMMON
CAP for Sync Buffer
GND
3
5%
R530 33
0402 COMMON
5%
10
9
13
12
5V
U505C
8
SO14_I335X150
COMMON
7 14
GND
5V
U505D
11
SO14_I335X150
COMMON
7 14
5V
R574
0402 COMMON
AHB
R565
0402
AVB
R7
2.2K
5%
0402
COMMON
R10
2.2K
5%
0402
COMMON
15
5%
R579
33
0402 COMMON
5%
15
COMMON
5%
R569
33
04025%COMMON
GND
For G78-LE
R44
C106
150
10PF
50V
1%
0402
5%
COMMON
C0G
0402
COMMON
GND
GND
F3V3
4
5
GND
LB505
240R@100MHz
COMMON
IND_SMD_0402
C624
1UF
6.3V
10%
X5R
0402
COMMON
C626
1UF
6.3V
10%
X5R
0402
COMMON
C56
0.1UF FOR G72
DAC_A_VDD
C623
4700PF
25V
10%
X7R
0402
COMMON
C619
470PF
16V
10%
X7R
0402
COMMON
C56
1UF
6.3V
10%
X5R
0402
COMMON
12.0
FOR G72
R528 124OHM
DACA_VREF
DACA_RSET
R528
130
1%
0402
COMMON
U2C
BGA_0533_P080_230X230_G3_064B
COMMON
3/12 DAC_A
AE2
DAC_A_VDD
AB4
DAC_A_VREF
AD3
DAC_A_RSET
DACA
I2CA_SCL
I2CA_SDA
DAC_A_HSYNC
DAC_A_VSYNC
DAC_A_RED
DAC_A_GREEN
DAC_A_BLUE
DAC_A_IDUMP
R43
C107
150
10PF
50V
1%
0402
5%
COMMON
I2CA_SCL
D10
I2CA_SDA
E10
DACA_HSYNC
AD4
DACA_VSYNC
AC4
DAC_A_RED_L
AE1
DAC_A_GREEN_L
AD1
DAC_A_BLUE_L
AD2
U9
GND
C0G
0402
COMMON
GND
GND
R42
C108
150
10PF
50V
1%
0402
5%
COMMON
C0G
0402
COMMON
GND
GND
R601
150
1%
0402
COMMON
GND
R602
150
1%
0402
COMMON
GND
R600
150
1%
0402
COMMON
GND
GND
GND
GND
R70
C90
22PF
50V
5%
C0G
0402
COMMON
R71
C91
22PF
50V
5%
C0G
0402
COMMON
R72 0
0402 COMMON
C92
22PF
50V
5%
C0G
0402
COMMON
5V
D4
SOT23
3
100V
100MA
COMMON
1 2
GND
5V
D8
SOT23
3
100V
100MA
COMMON
1 2
GND
DACA_HSYNC_M
5V
D1
SOT23
3
100V
100MA
COMMON
1 2
GND
DACA_VSYNC_M
5V
D5
SOT23
3
100V
100MA
COMMON
1 2
GND
L507
COMMON
IND_SMD_0603
0
COMMON
5%
C700
0402
4.7PF
50V
5%
C0G
0402
COMMON
GND
L508
COMMON
IND_SMD_0603
0
COMMON0402
5%
C701
4.7PF
50V
5%
C0G
0402
COMMON
GND
L506
COMMON
5%
IND_SMD_0603
C699
4.7PF
50V
5%
C0G
0402
COMMON
GND
C10
220PF
50V
5%
GND
C0G
0402
COMMON
GND
I2CA_SDA_C
C11
220PF
50V
5%
C0G
0402
COMMON
GND
L2
27nH
COMMON
IND_SMD_0603
DACA_RED_C
DACA_GREEN_C
DACA_BLUE_C
GND
DACA_VSYNC_C
GND
L1 27nH
IND_SMD_0603COMMON
30nH
C710
4.7PF
50V
5%
C0G
0402
COMMON
GND
30nH
C711
4.7PF
50V
5%
C0G
0402
COMMON
GND
30nH
C709
4.7PF
50V
5%
C0G
0402
COMMON
GND
DACA_HSYNC_C
C5
12PF
50V
5%
C0G
0402
COMMON
C4
12PF
50V
5%
C0G
0402
COMMON
I2CA_SCL_C
OUT
8
OUT
8
6,8
OUT
6,8
OUT
6,8
OUT
6,8
OUT
6,8
OUT
1
2
3
4
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
DACA
E GC
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NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5-OCT-2005
DATE
<XR_PAGE_TITLE>
R532
DACB_RED
R605
150
1%
0402
COMMON
R604
150
1%
0402
COMMON
R572
150
1%
0402
COMMON
0402 COMMON
5%
R531
0402
5%
4
5
1
2
33
33
GND
GND
COMMON
9
OUT
9
OUT
7,9
OUT
7,9
OUT
7,9
OUT
7,9
OUT
7,9
OUT
L504
C696
4.7PF
50V
5%
C0G
0402
COMMON
C698
4.7PF
50V
5%
C0G
0402
COMMON
L503
L505
IND_SMD_0603COMMON
IND_SMD_0603COMMON
IND_SMD_0603COMMON
5V
GND
GND
GND
DACB_VSYNC_C
GND
DACB_RED_C
DACB_BLUE_C
C689
220PF
50V
5%
C0G
0402
COMMON
C12
220PF
50V
5%
C0G
0402
COMMON
DACB_HSYNC_C
C7
12PF
50V
5%
C0G
0402
COMMON
C6
12PF
50V
5%
C0G
0402
COMMON
D504
SOT23
3
100V
100MA
COMMON
1 2
GND
5V
D7
SOT23
3
100V
100MA
COMMON
1 2
GND
L4
IND_SMD_0603
COMMON
27nH
5V
D2
SOT23
3
100V
100MA
COMMON
1 2
GND
L3 27nH
IND_SMD_0603COMMON
5V
D6
SOT23
3
100V
100MA
COMMON
1 2
GND
30nH
C707
4.7PF
50V
5%
C0G
0402
COMMON
GND
30nH
C706
4.7PF
50V
5%
C0G
0402
COMMON
GND
30nH
C708
4.7PF
50V
5%
C0G
0402
COMMON
GND
R586
2.2K
5%
0402
COMMON
5V
R9
2.2K
5%
0402
COMMON
R570
15
0402
COMMON
U505B
6
SO14_I335X150
COMMON
U505A
3
SO14_I335X150
COMMON
5%
R575
33
BHB
0402
COMMON
5%
R567
15
COMMON
0402
5%
R568
33
BVB
COMMON0402
5%
R584
C93
22PF
50V
5%
C0G
0402
COMMON
GND
R593
C94
22PF
50V
5%
C0G
0402
COMMON
GND
R581 0
0402 COMMON
C95
22PF
50V
5%
C0G
0402
COMMON
GND
DACB_HSYNC_M
DACB_VSYNC_M
0
DACB_RED_M
COMMON
5%
5%
C697
0402
4.7PF
50V
5%
C0G
0402
COMMON
GND
0
DACB_GREEN_M DACB_GREEN_C
COMMON0402
GND
DACB_BLUE_M
5%
GND
5V
7 14
5V
7 14
DAC-B
I2CB_SCL I2CB_SCL_C
1
I2CB_SDA I2CB_SDA_C
DACB_HSYNC
2
C606
4700PF
25V
10%
X7R
0402
COMMON
IN
C600
0.1UF FOR G72
DAC_B_VDD
C607
470PF
16V
10%
X7R
0402
COMMON
SEL_2ND_DEV
C600
1UF
6.3V
10%
X5R
0402
COMMON
FOR G72
R523 124OHM
R524 Q501 NO STUFF
DACB_VSYNC
U2D
DACB
BGA_0533_P080_230X230_G3_064B
COMMON
DACB_VREF
D
S
Q501
SOT23
COMMON
3
2
20V
3.2A@70C
0.063@2.5V
15A
0.9W@70C
8V
DACB_SW
R524
133
1%
0402
COMMON
F8
E7
D6
4/12 DAC_B
DAC_B_VDD
DAC_B_VREF
DAC_B_RSET
I2CB_SCL
I2CB_SDA
DAC_B_HSYNC
DAC_B_VSYNC
DAC_B_RED
DAC_B_GREEN
DAC_B_BLUE
DAC_B_IDUMP
F9
F10
E6
F5
F4
E4
D5
L9
For G78-LE
C109
10PF
R527
150
50V
5%
1%
C0G
0402
0402
COMMON
COMMON
GND
GND
GND
C110
10PF
50V
5%
C0G
0402
COMMON
GND
GND
R526
150
1%
0402
COMMON
GND
GND
12.0
DACB_RSET
R523
127
1%
0402
COMMON
1G1D1S
G
1
F3V3
LB503
240R@100MHz
COMMON
IND_SMD_0402
C605
C604
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
3
COMMON
GND
12
GND
C111
R525
10PF
4
150
50V
1%
0402
5%
COMMON
C0G
0402
COMMON
GND
GND
GND
HGFEDCBA
1
2
3
4
MIN_LINE_WIDTH
DACB_RED
IN
DACB_GREEN
IN
DACB_BLUE
IN
DACB_RED_M
IN
DACB_GREEN_M
IN
DACB_BLUE_M
IN
DACB_VREF
IN
DACB_RSET
IN
DACB_HSYNC
IN
DACB_VSYNC
IN
DACB_HSYNC_C
7,9
5
IN
DACB_VSYNC_C
7,9
IN
DACB_HSLYNC_M
IN
DACB_VSYNC_M
IN
DACB_R ED_C
7,9
IN
DACB_GREEN_C
7,9
IN
DACB_BLUE_C
7,9
IN
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
CRITICAL_NETNet Name
1 75OHM
1 75OHM
1 75OHM
12MIL
12MIL
1 75OHM
2 50OHM
IMPEDANCE
75OHM1
75OHM1
50OHM2
50OHM2
50OHM2
50OHM2
50OHM2
75OHM1
75OHM1
75OHM1
ASSEMBLY
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
DACB
E GC
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ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
Internal TMDS-A, DAC-A
1
F3V3
For G78-LE
R113
10K
5%
0402
COMMON
1G1D1S
G
1
IFP_EN
3
D
Q9
SOT23
COMMON
S
2
60V
0.115A
7.5R
0.8A
0.2W
20V
GND
NV44 - 3.3V supply
NV46 - 2.5V supply
FBVDDQ
2
GND
For G78-LE
FBVDDQ
LB509
IND_SMD_0402
C663
4.7UF
6.3V
10%
X5R
0805
COMMON
3
GND
COMMON
220R@100MHz
GND
1G1D1S
R17 10K
0402 COMMON
5%
9
IFP_PLLVDD
C657
1UF
6.3V
10%
X5R
0402
COMMON
G
1
LB514
220R@100MHz
COMMON
IND_SMD_0402
HGFEDCBA
ATXC
IN
ATXC*
IN
ATXD0
IN
ATXD0*
IN
ATXD1
IN
ATXD1*
IN
ATXD2
IN
ATXD2*
IN
C_MUX
7,9
IN
CVBS_Y_MUX
7,8
IN
CVBS_OUT
IN
Net Name
IFP_ABPLLVDD
IN
R16
0
5%
0603 COMMON
3
D
Q10
SOT23
COMMON
S
-20V
2
-3.5A@70C
73mR
-25A
0.9W@70C
+/-20V
TMDS_IOVDD
OUT
C655
1UF
6.3V
10%
X5R
0402
COMMON
C656
4700PF
25V
10%
X7R
0402
COMMON
GND
LB508
IND_SMD_0603COMMON
C662
4.7UF
6.3V
10%
X5R
0805
COMMON
C615
220PF
50V
5%
C0G
0402
COMMON
180R@100MHz
C654
GND
U2E
BGA_0533_P080_230X230_G3_064B
COMMON
5/12 IFP_AB
N6
IFP_AB_VPROBE
V5
IFP_AB_PLL_VDD
U6
IFP_AB_RSET
V6
IFP_AB_PLL_GND
.01UF
25V
10%
X7R
0402
COMMON
C659
4.7UF
6.3V
10%
X5R
0805
COMMON
GND
IFPABVPROBE
TP2
IFP_ABPLLVDD
IFPABRSET
R519
1K
1%
0402
COMMON
GND
C627
C622
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C618
4700PF
25V
10%
X7R
0402
COMMON
IFP_AB_VDD
C603
220PF
50V
5%
C0G
0402
COMMON
For G78-LE
by pass
R41
0
5%
0402
COMMON
GND_U6
W4
Y4
IFP_A_IO_VD D
IFP_B_IO_VD D
PLACE NEAR GPU
C643
.01UF
25V
10%
X7R
0402
COMMON
GND
A
DATA
B
A
CLOCK
B
C642
.01UF
25V
10%
X7R
0402
COMMON
IFP_A_TXD 0
IFP_A_TXD 0
IFP_A_TXD 1
IFP_A_TXD 1
IFP_A_TXD 2
IFP_A_TXD 2
IFP_A_TXD 3
IFP_A_TXD 3
IFP_B_TXD 4
IFP_B_TXD 4
IFP_B_TXD 5
IFP_B_TXD 5
IFP_B_TXD 6
IFP_B_TXD 6
IFP_B_TXD 7
IFP_B_TXD 7
IFP_A_TXC
IFP_A_TXC
IFP_B_TXC
IFP_B_TXC
C644
.01UF
25V
10%
X7R
0402
COMMON
NV44_DVI
R539
R540
R541
R536
R537
R534
R538
49.9
49.9
49.9
1%
0402
COMMON
1%
0402
COMMON
49.9
1%
0402
COMMON
49.9
1%
1%
0402
0402
COMMON
COMMON
ATXD0*
N5
ATXD0
N4
R4
ATXD1*
ATXD1
R5
ATXD2*
T6
ATXD2
T5
SNN_ATXD3*
P6
SNN_ATXD3
R6
SNN_BTXD4*
W2
SNN_BTXD4
W3
SNN_BTXD5*
AA3
SNN_BTXD5
AA2
SNN_BTXD6*
AA1
SNN_BTXD6
AB1
SNN_BTXD7*
AB2
SNN_BTXD7
AB3
ATXC*
U4
ATXC
T4
SNN_BTXC*
W6
SNN_BTXC
W5
49.9
1%
0402
COMMON
49.9
1%
0402
COMMON
R533
49.9
1%
0402
COMMON
IFP_AB_VDD
IN
For G78-LEFor G78-LE
R121
160ohm
?
0402
NS
R122
160ohm
?
0402
NS
R123
160ohm
?
0402
NS
R124
160ohm
?
0402
NS
CRITICAL Voltage
1 100DIFFATXD0
1 100DIFFATXD2
1 75OHM
1 75OHM
16MIL 3.3V
16MIL 3.3V
GND_V_M
9
BI
GND
IMPEDANCEDiffNet Name
100DIFFATXC 1
100DIFFATXC 1
100DIFF1ATXD0
100DIFF1ATXD1
100DIFF1ATXD1
100DIFFATXD2 1
75OHM1
1
VoltageMIN_LINE_WID T H
DDC_5V
BI
R607
0
5%
0402
COMMON
IN
IN
IN
IN
IN
IN
SNN_DMS_NC24
SNN_DMS_NC37
SNN_DMS_NC58
I2CA_SCL_C
I2CA_SDA_C
DACA_HSYNC_C
DACA_VSYNC_C
DACA_RED_C
DACA_GREEN_C
DACA_BLUE_C
6
6
6,6
6,6
6,6
6,6
6,6
HPD
GND
C705
4700PF
25V
10%
X7R
0402
COMMON
5
6
7
56
55
2
59
3
36
30
29
28
27
26
25
32
31
1
60
4
24
37
38
53
58
33
34
35
54
57
J1A
CON_DSUB_060_TH_RA_F_PI050
COMMON
1/2
+5V
RGB_SCL
RGB_SDA
HSYNC
VSYNC
RED
GREEN
BLUE
DP_HPD
DP_TX0ÂDP_TX0+
DP_TX1ÂDP_TX1+
DP_TX2ÂDP_TX2+
DP_TXCÂDP_TXC+
REDRTN
GRNRTN
BLURTN
NC24
NC37
NC38
NC53
NC58
GND33
GND34
GND35
GND54
GND57
2
LFH
CONNECTOR
3
MOUNT1
MOUNT2
61
62
4
12
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
TMDS-A,DA C-A
DVI_HPD DVI_HPD_R
OUT
R590
10K
5%
0402
COMMON
GND
E GC
R596
04021KCOMMON
5%
F3V3
3
1 2
GND
D505
SOT23
100V
100MA
COMMON
F3V3
GND
C680
.1UF
16V
10%
X7R
0603
COMMON
LB513
180R@100MHz
IND_SMD_0603COMMON
Hotplug Detectio n
C695
220PF
50V
5%
C0G
0402
COMMON
GND
www.vinafix.vn
GND
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
4
GND
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
HGFEDCBA
1
2
NV44 - 3.3V supply
NV46 - 2.5V supply
3
4
Internal TMDS-C, DAC-B
IN
LB515
220R@100MHz
COMMON
IND_SMD_0402
C649
1UF
6.3V
10%
X5R
0402
COMMON
GND
TMDS_IOVDD
C634
1UF
6.3V
10%
X5R
0402
COMMON
C640
4700PF
25V
10%
X7R
0402
COMMON
GND
For G78-LE
FBVDDQ
LB507 220R@100MHz
C651
4.7UF
6.3V
10%
X5R
0805
COMMON
GND GND
8
For G78-LE
IFP_PLLVDD
COMMONIND_SMD_0402
C647
1UF
6.3V
10%
X5R
0402
COMMON
C629
1UF
6.3V
10%
X5R
0402
COMMON
C48
4.7UF
6.3V
10%
X5R
0805
COMMON
LB3
IND_SMD_0603
C635
220PF
50V
5%
C0G
0402
COMMON
180R@100MHz
COMMON
C639
4700PF
25V
10%
X7R
0402
COMMON
CTXC
IN
CTXC*
IN
CTXD0
IN
CTXD0*
IN
CTXD1
IN
CTXD1*
IN
CTXD2
IN
CTXD2*
IN
COUT
IN
CRITICALNet Name
CTXC 100DIFF1
CTXD0 1 100DIFF
CTXD1 1 100DIFF
CTXD2 1 100DIFF
CTXD2 1 100DIFF
1 100DIFFCTXD0
1 100DIFFCTXD1
1 75OHM
IMPEDANCE VoltageDiff
100DIFF1CTXC
1
MIN_LINE_WID T H VoltageNet Name
IFPC_PLLVDD
IN
IFP_C_VDD
IN
PLACE NEAR GPU
IFP_C_VDD
C51
4.7UF
6.3V
10%
X5R
0805
COMMON
GND
IFPCVPROBE
TP1
IFPC_PLLVDD
IFPC_RSET
R19
1K
5%
0402
COMMON
GND
U2F
BGA_0533_P080_230X230_G3_064B
COMMON
12/12 IFPC
M5
IFPC_VPROBE
M4
IFPC_PLL_VDD
J3
IFPC_RSET
M6
IFPC_PLL_GND
C53
.01UF
25V
10%
X7R
0402
COMMON
GND
L4
C646
220PF
50V
5%
C0G
0402
COMMON
IFPC_IO_VDD
DATA
CLOCK
C54
.01UF
25V
10%
X7R
0402
COMMON
C52
C55
.01UF
.01UF
R37
R38
R26
R27
R39
R40
R29
25V
10%
X7R
0402
COMMON
25V
10%
X7R
0402
COMMON
49.9
1%
0402
COMMON
49.9
1%
0402
COMMON
49.9
1%
0402
COMMON
49.9
1%
0402
COMMON
49.9
1%
0402
COMMON
GND
CTXD0*
R1
IFPC_TXD0
IFPC_TXD0
CTXD1*
IFPC_TXD1
IFPC_TXD1
IFPC_TXD2
IFPC_TXD2
IFPC_TXC
IFPC_TXC
CTXD0
T1
T2
CTXD1
T3
CTXD2*
V3
CTXD2
V2
CTXC*
W1
CTXC
V1
49.9
1%
0402
COMMON
49.9
1%
0402
COMMON
R28
49.9
1%
0402
COMMON
For G78-LE
R125
160ohm
?
0402
NS
R126
160ohm
?
0402
NS
R127
160ohm
?
0402
NS
R128
160ohm
?
0402
NS
7
7
7,7
7,7
7,7
7,7
7,7
8
BI
GND_V_M
IN
BI
IN
IN
IN
IN
IN
HPD2
SNN_DMS_NC23
SNN_DMS_NC48
DDC_5V
I2CB_SCL_C
I2CB_SDA_C
DACB_HSYNC_C
DACB_VSYNC_C
DACB_RED_C
DACB_GREEN_C
DACB_BLUE_C
GND
C704
4700PF
25V
10%
X7R
0402
COMMON
11
10
9
50
51
14
47
13
40
17
16
19
18
21
20
44
45
15
46
12
22
23
39
48
8
41
42
43
49
52
3.3V16MIL
3.3V16MIL
J1B
CON_DSUB_060_TH_RA_F_PI050
COMMON
2/2
+5V
RGB_SCL
RGB_SDA
HSYNC
VSYNC
RED
GREEN
BLUE
DP_HPD
DP_TX0ÂDP_TX0+
DP_TX1ÂDP_TX1+
DP_TX2ÂDP_TX2+
DP_TXCÂDP_TXC+
REDRTN
GRNRTN
BLURTN
NC22
NC23
NC39
NC48
GND8
GND41
GND42
GND43
GND49
GND52
2
LFH
CONNECTOR
3
MOUNT1
MOUNT2
61
62
GND
4
12
OUT
5
R6
10K
5%
0402
COMMON
GND
R5 1 K
COMMON0402
5%
F3V3
3
1 2
D3
SOT23
100V
100MA
COMMON
F3V3
GND GND
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
LB1
DVI_HPD2_RDVI_HPD2
C15
.1UF
16V
10%
X7R
0603
COMMON
COMMONIND_SMD_0603
180R@100MHz
C3
220PF
50V
5%
C0G
0402
COMMON
GND
Hotplug Detectio n
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
TMDS-C,D AC-B
E GC
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NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
MIOA, MIOB Interface
HGFEDCBA
GPU_F11
R138
0
5%
0402
COMMON
U2I
BGA_0533_P080_230X230_G3_064B
COMMON
11/12 _GND_
B2
GND
E2
GND
H2
GND
L2
GND
P2
GND
U2
GND
Y2
GND
AC2
GND
AF2
GND
AF3
GND
B5
GND
E5
GND
L5
GND
P5
GND
U5
GND
Y5
GND
AC5
GND
H6
GND
AF6
GND
B8
GND
E8
GND
AD8
GND
K9
GND
P9
GND
V9
GND
AD9
GND
AF9
GND
B11
GND
E11
GND
F11
GND
L11
GND
P11
GND
U11
GND
AD11
GND
N12
GND
P12
GND
R12
GND
AD12
GND
AF12
GND
N13
GND
P13
GND
R13
GND
B14
GND
E14
GND
J14
GND
L14
GND
N14
GND
P14
GND
R14
GND
U14
GND
W14
GND
AC14
GND
AD14
GND
N15
GND
P15
GND
R15
GND
AF15
GND
N16
GND
P16
GND
R16
GND
AD16
GND
B17
GND
E17
GND
L17
GND
P17
GND
U17
GND
AD17
GND
AF18
GND
K19
GND
P19
GND
V19
GND
AD19
GND
B20
GND
E20
GND
AD20
GND
AF21
GND
B23
GND
E23
GND
H23
GND
L23
GND
P23
GND
U23
GND
Y23
GND
AC23
GND
AF24
GND
B26
GND
E26
GND
H26
GND
L26
GND
P26
GND
U26
GND
Y26
GND
AC26
GND
AF26
GND
1
U2G
BGA_0533_P080_230X230_G3_064B
F3V3
C601
.1UF
10V
10%
X5R
0402
COMMON
2
GND
SNN_MIOB_CAL_PD_VDDQ
SNN_MIOB_CAL_PU_GND
SNN_MIOB_VREF SNN_MIOB_VSYNC
COMMON
9/12 MIO_B
K5
MIO_B_VDDQ
K6
MIO_B_VDDQ
L6
MIO_B_VDDQ
J5
MIO_B_ CAL_PD_VDDQ
M3
MIO_B_CAL_PU_GN D
J4
MIO_B_VREF
MIO_B_D0
MIO_B_D1
MIO_B_D2
MIO_B_D3
MIO_B_D4
MIO_B_D5
MIO_B_D6
MIO_B_D7
MIO_B_D8
MIO_B_D9
MIO_B_D10
MIO_B_D11
MIO_B_VSYNC
MIO_B_HSYNC
MIO_B_DE
MIO_B_CTL3
MIO_B_CLKOUT
MIO_B_CLKOUT
MIO_B_CLKIN
MIOB_D0
G2
MIOB_D1
G3
SNN_MIOB_D<2>
J2
MIOB_D3
J1
MIOB_D4
K4
MIOB_D5
K1
SNN_MIOB_D<6>
M2
SNN_MIOB_D<7>
M1
MIOB_D8
N1
MIOB_D9
N2
SNN_MIOB_D<10>
N3
MIOB_D11
R3
F1
SNN_MIOB_HSYNC
G4
SNN_MIOB_DE
G1
MIOB_CTL3
F2
SNN_MIOB_CLKOUT
K2
SNN_MIOB_CLKOUT*
K3
MIOB_CLKIN
R2
MIOB_D[11..0]
0
1
3
4
5
8
9
11
MIOB_CTL3
R25
10K
5%
0402
COMMON
11
BI
For G78-LE
GPU_F11
GND
GND
3
U2H
BGA_0533_P080_230X230_G3_064B
F3V3
C608
.1UF
10V
10%
X5R
0402
COMMON
F6
G6
J6
COMMON
8/12 MIO_A
MIO_A_ VDDQ
MIO_A_ VDDQ
MIO_A_ VDDQ
MIO_A_D0
MIO_A_D1
MIO_A_D2
MIO_A_D3
MIO_A_D4
MIO_A_D5
MIO_A_D6
MIO_A_D7
MIO_A_D8
MIO_A_D9
MIO_A_D10
MIOA_D0
A2
MIOA_D1
B3
MIOA_D2
A3
SNN_MIOA_D<3>
D4
SNN_MIOA_D<4>
A4
SNN_MIOA_D<5>
B4
SNN_MIOA_D<6>
B6
SNN_MIOA_D<7>
P4
SNN_MIOA_D<8>
C6
SNN_MIOA_D<9>
G5
SNN_MIOA_D<10>
V4
MIOA_D[11..0]
0
1
2
11
BI
GND
4
MIO_A_HSYNC
MIOA_HSYNC
C4
11
OUT
1
2
3
4
GND
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
MIOA, MIOB Interface
E GC
www.vinafix.vn
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
STRAPS, Mechanical Parts
HGFEDCBA
F3V3
2K
2K
2K
2K
2K
2K
COMMON
COMMON0402
COMMON0402
COMMON
COMMON0402
COMMON0402
COMMON0402
COMMON
Bit Signal
00:
PCI_AD_SWAP
01: SUB_VENDOR
02:
RAM_CFG_0
03:
RAM_CFG_1
RAM_CFG_204:
RAM_CFG_3
05:
06:
CRYSTAL_0
22:
CRYSTAL_1
07:
TV_MODE_0
TV_MODE_1
08:
09:
AGP_30_8x
10: AGP_SBA 0 SBA ENABLED
11:
AGP_FASTWR
12: PCI_DEVID_0
13:
PCI_DEVID_1
20: PCI_DEVID_2
21:
PCI_DEVID_3
PCI_DEVID_4
14:
BUS_TYPE
FP_IFACE
15:
FB_023:
24: FB_1
BR25:
BR_128M
26:
27:
BR_AGP
28:
BR_IO
ROM_TYPE_0
29:
ROM_TYPE_1
30:
16:
USER_0
USER_1
17:
USER_2
18:
USER_3
19:
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADDR[0]
3GIO_PADCFG_LUT_ADDR[1]
host2xv_slot_clock_configuration
1
10
10
MIOA_D[11..0]
IN
MIOB_D[11..0]
IN
NV44/NV46 STRAPS
R46
2K
0402
COMMON
5%
R32
2K
04025%COMMON
R33 2K
COMMON
0402
5%
R35
2K
COMMON
0402
5%
R23 2K
COMMON0402
5%
MIOA_D1
MIOB_D0
MIOB_D1
MIOB_D8
MIOB_D9
R30 2K
0402
5%
R31
04025%COMMON
R24
5%
R18
5%
2
MIOB_D4
MIOB_D5
MIOB_D3
MIOA_HSYNC
10
IN
MIOB_CTL3
MIOB_D11
MIOB_CTL3
R34 2K
0402
5%
R22 2K
0402 COMMON
5%
R20 2K
0402 COMMON
5%
R36 2K
5%
R114
5%
For G78-LE
3
R48
2K
MIOA_D2
COMMON0402
5%
R50
5%
4
MIOA_D0
R47
0402
5%
For G78-LE
NV46
R51 2K
04025%COMMON
MIOA_HSYNC
Values
0 REVERSED
1 NORMAL
0 NO_BIOS
1 READ FROM BIOS
0000 8MX16DDR2,64bit
0001 16MX16DDR2,64bit SAMSUNG
0010 16MX16DDR2,64bit INFINEON
0011 16MX16DDR2,64bit HYNIX
0100 RFU
0101 RFU
0110 32MX8 DDR2,64bit INFINEON
0111 32MX16DDR2,64bit HYNIX
00 13.500 MHz
01 14.31818 MHz
10 27.000 MHz
11 UNKNOWN
00 SECAM
01 NTSC
10 PAL
11 CRT
0 AGP8x ENABLED
1 AGP8x DISABLED
0 SBA DISABLED
0 FW ENABLED
0 FW DISABLED
0101 (0x0165 NV44)
0001 (0x01D1 G72)
0 PCI
1 AGP
0 24Bit
1 12Bit (DEFAULT)
00 64M
01 128M
10 256M (DEFAULT)
11 512M
0 BRIDGE DISABLED
1 BRIDGE ENABLED
BR BITS IGNORED IF BRIDGE IS DISABLED
00 PARALLEL
01 SERIAL_AT25F
10 SERIAL_SST45VF
11 LPC
0000 (DEFAULT)
1000 8MX16DDR2,32bit
1001 16MX16DDR2,32bit SAMSUNG
1010 16MX16DDR2,32bit INFINEON
1011 16MX16DDR2,32bit HYNIX
1100 RFU
1101 RFU
1110 RFU
1111 32MX16DDR2,32bit
MEC4
HSP_GPU_G_T_AL_1_3443X2000
COMMON
HEATSINK USE NVPN 110-0006-200
HEATSINK
BKT1
BRKT_LP_1TAB_1_DMS
COMMON
FM1
SW_FB
1
NS
FM4
SW_FB
1
NS
1
MECH. MOUNTING
TOP
GND
1
NS
1
NS
MEC5
HSA_GPU_TM31-1LP_T_AL_1_V1
COMMON
FANSINK
FM2
SW_FB
1
NS
FM5
SW_FB
1
NS
1
MEC3
MEC_SCREW_PH1
COMMON
MEC1
MEC_SCREW_HEX_JACK
COMMON
MEC2
MEC_SCREW_HEX_JACK
COMMON
2
3
PCB
PCB
V058-0A
FM3
SW_FB
FM6
SW_FB
4
5
GND
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
STRAPS, Mechanical Parts
E GC
www.vinafix.vn
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
XTAL, GPIO, BIOS, FAN, JTAG, THERMAL
1
GND
C9
B9
AE27
AD26
AD27
AE26
AD25
H4
H5
C1
B1
U2L
BGA_0533_P080_230X230_G3_064B
COMMON
6/12 MISC1
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
U2K
BGA_0533_P080_230X230_G3_064B
COMMON
7/12 MISC2
U2J
BGA_0533_P080_230X230_G3_064B
COMMON
10/12 XTAL_P LL
PLLVDD
PLLGND
XTAL_SS_ IN
XTAL_IN
F3V3
R511
R512
R514
180
10K
5%
5%
0402
0402
COMMON
2
COMMON
R509
270
5%
0402
COMMON
GND
10K
5%
0402
COMMON
R513
10K
5%
0402
COMMON
THERMDC
TP3
THERMDA
TP4
JTAG_TDI
R510
10K
5%
0402
COMMON
GND
JTAG Header
J501
F3V3
FEMALE
1.274MM
0
CON_HDR_002X004
GND
For G72
IFP_PLLVDD
COMMON
TMS TRST*
1 2
TDI GND
3 4
VCC
5
TDO TCK
7 8
C60
1UF
10V
10%
X5R
0603
COMMON
LB517
220R@100MHz
COMMON
IND_SMD_0402
C617
1UF
6.3V
10%
X5R
0402
COMMON
KEY
JTAG_TCLK
GND
C613
.1UF
10V
10%
X5R
0402
COMMON
C610
4700PF
25V
10%
X7R
0402
COMMON
PLL_VDD
C621
1UF
6.3V
10%
X5R
0402
COMMON
3
JTAG_TMS JTAG_TRST*
JTAG_TDO
For G78-LE
PEX1V2
4
LB504
IND_SMD_0402
COMMON
220R@100MHz
GND
5V_CLAMP
I2CC_SCL
I2CC_SDA
GPIO10
GPIO11
GPIO12
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
BUFRST
STEREO
SWAPRDY
TESTMODE
XTAL_OUT_BU F
XTAL_OUT
HGFEDCBA
COMMON
C40
1UF
25V
10%
X7R
0805
COMMON
R21
10K
0402
LINE_WIDTH
12MIL 3.3V
CRITICAL_NET
1 50OHM
1 50OHM
12
12V
F3V3
5%
8
VCC
7
VCC
4
GND
12
GND
1 3
7 8
3
1
5
2
6
D11
SOT23
75V
200MA
COMMON
FAN_PWM_C
R14
0
5%
0603
COMMON
U1
SO08_I190X150
SO8
COMMON
HOLD VCC
WP
CS
SI
SO
SCK
F3V3
GND
GND
C41
.1UF
25V
10%
X7R
0603
COMMON
GND
For G78-LE
GND
F3V3
4
GND
C537
.1UF
10V
10%
X5R
0402
COMMON
C103
.1UF
25V
10%
X7R
0603
COMMON
C49
.1UF
10V
10%
X5R
0402
COMMON
Voltage
5.0000016MIL
IMPEDANCE
1
FAN
J2
+12V
1
GND
2
MALE
2.5MM
0
CON_HDR_001X002
COMMON
2
3
4
Net Name
5V_CLAMP
PLACE NEAR GPU
5V_CLAMP
C582
.1UF
10V
10%
X5R
0402
COMMON
F3V3 F3V3
GND
D11
I2CCG_SCL
E9
I2CCG_SDA
D8
DVI_HPD2
A9
GPIO0
DVI_HPD
D9
GPIO1
A10
GPIO2
B10
GPIO3
SNN_GPIO4
C10
GPIO4
SNN_GPIO5
C12
GPIO5
SNN_GPIO6
B12
GPIO6
SEL_2ND_DEV
A12
GPIO7
SNN_THERM_ALERT*
A13
GPIO8
FAN_ON
B13
GPIO9
LOAD_TEST
B15
SNN_SEL_HDTV_SDTV
A15
SNN_GPIO12
B16
IN
IN
For G78-LE
OUT
IN
R521
R522
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
9
8
7
7
FAN CONNECTOR
F3V3
R13
1K
5%
0603
COMMON
R15
1K
5%
0603
COMMON
GND
1G1D1S
5V_CLAMP
PLL_VDD
IN
XTALIN
IN
XTALOUT
IN
GND
3
D
Q8
SOT23
G
1
COMMON
S
2
20V
3.2A@70C
0.063@2.5V
15A
0.9W@70C
8V
GND
BIOS
ROM_CS*
D1
F3
D3
D2
I2CH_SCL
C7
I2CH_SDA
B7
SNN_BUFRST*
A6
SNN_STEREO
F7
SWAPRDY_A
A7
TESTMODE
D7
AC8
GND
GND
R520
10K
5%
0402
COMMON
GND
F3V3
R52
10K
5%
0402
COMMON
HDCP_ROM
R516
10K
5%
0402
COMMON
F3V3
R56
10K
5%
0402
COMMON
SNN_HDCP_2
GND
XTALOUTBUFFXTALSSIN
C3
6
5
3
ROM_SI
ROM_SO
ROM_SCLK
U503
SO08_I190X150
COMMON
SCL
SDA
SDA
NC
C2
XTALIN
R45
C631
10K
18PF
50V
5%
0402
5%
COMMON
C0G
0402
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
GND
COMMON
GND GND
Y501 27 MHZ
10 PPM 85C
XTAL_SMD_4_060X035
COMMON
XTALOUT
C632
18PF
50V
5%
C0G
0402
COMMON
R49
330
5%
0402
COMMON
GND
ASSEMBLY
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
XTAL, GPIO, BIOS, FAN, JTAG, THERMAL
E GC
www.vinafix.vn
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
HGFEDCBA
PowerSupplyI: NVVDD, 5V
12V
12V
12V_F
12V_F
NVVDD
NVVDD
PEX1V2
L9
CHK_BC4417B_1R3S_M1
L11
COMMON
COMMON
PEX1V2
SC2621A Only
1.6 uH
0.75uH
C44
1200UF
COMMON
+/-20%
4V
OSCON
5.44A@105C
0.012R
MULTI_CAP_SMD_083X083
GND
GND GND
1
Power Sequence
SW12V_EN*
R587
2.2K
5%
0402
COMMON
0.028@10V
60W@25C
COMMON
12V
4
1G2D1S
2
D
Q1
G
1
S
3
30V
10A@25C
30A
+/-20V
C712
4.7UF
10V
10%
X5R
0805
COMMON
GND
SW12V_EN C*
C9
.1UF
16V
10%
X7R
0603
COMMON
F1
200mA
1206
COMMON
1 2
POLYSWITCH
F3V3
R594
15K
5%
0402
COMMON
3V3_TH_EN
R599
C693
10K
.1UF
10V
5%
0402
10%
COMMON
X5R
0402
COMMON
GND
5V
C2
330U
COMMON
+/-20%
16V
ALE
0.3A@85C
0.8R@120HZ
CAP_TH_D080P035
3
1B1C1E
C
Q506
B
1
SOT23
COMMON
E
2
GND
C1
10UF
16V
20%
X7R
1206
COMMON
GND
MULTI_STD_SOT223_DPAK
C8
470UF
COMMON
+/-20%
16V
ALE
0.6A@105C
0.16
CAP_SMD_083X083
GND
2
3
DDC_5V
4
GND
12V
R582
10K
0402
COMMON
5%
1B1C1E
2
E
Q504
B
1
SOT23
COMMON
C
3
Inductor Bypass
R555
0
5%
0805
COMMON
C25
330UF
COMMON
20%
16V
ALE
6.1A@105C, 6.5A@85C
0.010R
MULTI_CAP_TH_D080P035_D100P050
GND
R556
0
5%
0805
COMMON
R557
0
5%
0805
COMMON
ISL6549(SC2621A)
U504
VR_SW=0.8V, VR_LD=0.8V
XSOP16_PI025_049X040
16.0
SW12V_C
16.0
R15%0
0402 COMMON
R5641%5.36K
0402 COMMON
Rtop
100K for 300KHz (ISL)
47K for 600KHz (ISL)
Rbot
R562 2.2
0402 COMMON
LDO_GLDO_GR
16.0
R558 2.7K
04025%COMMON
R559
1.02K
1%
0402
COMMON
GND
SW12V
5%
16.0
GND
LDO_COMP
C676
16.0
0402
COMMON
LDO_FB
16.0
FS_DIS
16.0
GND
1000PF
50V
10%
X5R
R549
47K
5%
0603
COMMON
C675
1UF
16V
10%
X5R
0603
COMMON
QSOP16
COMMON
9
VCC12
VCC12
LDO_DR
LDO_FB
FS_DIS
PGND
AGND
DGND
UGATE
PVCC5
PHASE
LGATE
SW_FB
COMP
VCC5
BOOT
10
5
6
2
14
7
8
GND
5V
Vout = VRef * (1+Rtop/Rbot)
5V = 0.8V * (1+(5.36K/1.02K)) (ISL6549)
5.038V = 0.5V * (1+(9.53K/1.05K)) (SC2621A)
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
12V
C21
330U
COMMON
+/-20%
16V
L5
L6
3.5 uH
1uH
COMMON
COMMON
IND_NONRKO_TH_060X011
IND_NONRKO_SMD_076X076
10.2mr
10A
GND
11
16.0
12
16
1
15
13
4
3
0.0099
5.39A
C27
180UF
COMMON
+/-20%
16V
OSCON
3.64A@105C
0.020R
MULTI_CAP_SMD_083X083
C673
1UF
VCC5
10V
0603
R552
10%
X5R
10
COMMON
5%
0402
COMMON
PVCC5_DRV
16.0
NV_UG NV_UGR
16.0
NV_BOOT
16.0
C667
.1UF
25V
10%
X7R
0603
COMMON
NV_BG
16.0
NV_FB
16.0
R550
4.02K
NV_RC_FB
COMMON
0603
1%
10.0
C669 1000PF
NV_COMP
0603 50V
10.0
10%
X7R
COMMON
NV_PHASE
16.0
R548
0603
ALE
0.3A@85C
0.8R@120HZ
CAP_TH_D080P035
GND
GND
C670
1UF
10V
10%
X5R
0603
LFPAK
.047UF
10%
X7R
COMMON
16.0
Rbot
LFPAK
C26
1000PF
16V
10%
X5R
0402
COMMON
4
4
G
G
R553
4.02K
1%
0402
COMMON
D
S
D
S
Lower FE T:FOR G72,I RF7832
R554
COMMON
0
COMMON
5%
C671
0603 16V
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
PowerSupplyI: NVVDD, 5V
E GC
5
Q6
MULTI_SMD_SOT669_LFPAK
COMMON
30V
1
30A
6.7mR
2
120A
15W@25C
3
+/- 15V
5
Q7
MULTI_SMD_SOT669_LFPAK
COMMON
30V
1
55A
4mR
2
220A
30W@25C
3
+/- 15V
GND
22.1
COMMON
0603
1%
C22
470UF
COMMON
+/-20%
16V
ALE
0.6A@105C
0.16
CAP_SMD_083X083
GND
12V_F
C24
1UF
16V
10%
X7R
0805
COMMON
GND
UPPER FET:FOR G72, IRF 7811A
For G78-LE
FOR NV44, FDS4410
C104
.1UF
16V
10%
X5R
0402
COMMON
GND
4.2 mOhm MAX 15A
R12
1.8
12
+/-5%
0805
COMMON
NV_SNUBBER
10.0
C30
1000PF
50V
10%
X7R
0603
COMMON
GND GND
FOR NV44, FDS4410
C679
.01UF
0603
25V
10%
X7R
COMMON
NVVDD
Vout = VRef * (1+Rtop/Rbot)
1.1V = 0.8V * (1+(1.54k/4.02k)) (ISL6549)
1.2V = 0.8V * (1+(1.54k/3.09k)) (ISL6549)
1.26V = 0.8V * (1+(1.54k/2.67k)) (ISL6549)
1.2V = 0.5V * (1+(14.7k/10.5k)) (SC2621A)
Rtop
R560
06031%COMMON
NV_RC_IN
10.0
1.54K
IND_NONRKO_SMD_125X125
D10
DIODE_SMD_SMA
30V
2A
COMMON
LINE_WIDTH
NV_BOOT
G78-LE@450MHz: 15A
NV44@350MHz: 11. 5A
NV46@500MHz: 13. 6A
PEX Current: 1.4A
C42
1500UF
COMMON
+/- 20%
6.3V
ALE
1.96A@105C
0.016
MULTI_CAP_TH_D080P035_D100P050
36MIL 124
36MIL 12.00003
36MIL 1.2000015
16MIL 1.200001.5
D502
SOT23COMMON
13
PVCC5_DRV
C45
470UF
COMMON
20%
6.3V
ALE
2.09A@105C
0.025R
MULTI_CAP_SMD_083X083
R5475%470K
0603 COMMON
GND
C43
1500UF
COMMON
+/- 20%
6.3V
ALE
1.96A@105C
0.016
MULTI_CAP_TH_D080P035_D100P050
VoltageCurrentNet Name
FS_DIS
NVVDD
L12
LB511
1uH
220R@100MHz
COMMON
COMMON
IND_SMD_0805
IND_NONRKO_SMD_076X076
C46
470UF
COMMON
+/-20%
6.3V
ALE
0.56A@105C
N/A
CAP_TH_D080P035
GND
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
GND
C47
470UF
COMMON
+/-20%
16V
ALE
0.6A@105C
0.16
CAP_SMD_083X083
1
2
3
4
PEX1V2
5
5-OCT-2005
DATE
www.vinafix.vn
<XR_PAGE_TITLE>
PowerSupplyII: 5V_CLAMP, F3V3
Net Name VoltageCurrentLINE_WIDTH
5V
5V
DDC_5V
DDC_5V
HGFEDCBA
120MIL 5.00000
0.220MIL 5.00000
3V3
3V3
F3V3
R545
100
5%
0402
COMMON
C664
4.7UF
10V
10%
X5R
0805
COMMON
F3V3
R546
22K
0402 COMMON
5%
1B1C1E
2
E
Q503
B
R544
CLAMP* CLAMPC*
1
SOT23
COMMON
C
3
2.2K
0402
COMMON
5%
1B1C1E
3
C
Q502
B
1
SOT23
COMMON
E
2
GND
1
2
F3V3
LB512
220R@100MHz
IND_SMD_0805
C29
100UF
COMMON
20%
25V
ALE
0.3A
0.34R@105C
CAP_SMD_066X066
L10
IND_NONRKO_SMD_076X076COMMON
COMMON
1uH
C34
100UF
COMMON
+/-20%
10V
ALE
0.14A@85C
N/A
CAP_TH_D050P020
C35
100UF
COMMON
20%
25V
ALE
0.3A
0.34R@105C
CAP_SMD_066X066
3V3
3
C28
100UF
COMMON
+/-20%
10V
ALE
0.14A@85C
N/A
CAP_TH_D050P020
GND GND GND GND
F3V3
5V_CLAMP
F3V3
5V
1
2
3
SOT23
D501
COMMON
25V
5V_CLAMP
200MA
5V_CLAMP CLAMP
GND
F3V3
R542
2.7K
5%
0402
COMMON
R543
1K
5%
0402
COMMON
336MIL 3.3
336MIL 3.3
1
2
3
4
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
PowerSupplyII: 5V_CLAMP , F 3V3
E GC
www.vinafix.vn
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
4
5
5-OCT-2005
DATE
<XR_PAGE_TITLE>
Memory@400MHz: 4A
PowerSupplyIII: FBVDDQ, FBVTT, PLLVDD
1
2
Power Sequence
NVVDD
R3
04025%COMMON
1B1C1E
SW12V_ENL*
B
1
R2
2.2K
R8
1K
5%
0402
COMMON
NVVDD_TH_EN
R4
3K
5%
0402
COMMON
SW12V_ENFBVDD*
1B1C1E
3
C
Q2
B
1
SOT23
COMMON
E
2
5%
0402
COMMON
GND
HGFEDCBA
LINE_WIDTHNet Name
FBVDDQ
12V
10K
2
E
Q3
SOT23
COMMON
C
3
PLLVDD
FBVDDQ
GND
PLLVDD
GND
12MIL 2.00000
Voltage
2.5V16MIL
0.00000016MIL
1
2
GND
12V_F
3V3
C18
330UF
COMMON
20%
16V
ALE
6.1A@105C, 6.5A@85C
0.010R
MULTI_CAP_TH_D080P035_D100P050
GND GND
C19
180UF
COMMON
+/-20%
16V
OSCON
3.64A@105C
0.020R
MULTI_CAP_SMD_083X083
C23
1UF
16V
10%
X7R
0805
COMMON
GND
SC2621A Only
FB_BOOT
D503
13
SOT23COMMON
PVCC5_FB_DRV
R589
470K
FS_DIS_FB
0603
COMMON
5%
ISL6549 (SC2621A)
U506
0402 50V
FS_DIS_FB
GND
R578
47K
5%
0603
COMMON
1000PF
10%
X5R
VR_SW=0.8V, VR_LD=0.8V
XSOP16_PI025_049X040
QSOP16
COMMON
9
VCC12
10
VCC12
C677
1UF
16V
10%
X5R
0603
COMMON
5
LDO_DR
6
LDO_FB
2
FS_DIS
16.0
14
PGND
7
AGND
8
DGND
PVCC5
UGATE
PHASE
LGATE
SW_FB
COMP
11
VCC5
12
16
1
BOOT
15
13
4
3
GND
C674
1UF
0603
10V
R563
10%
10
X5R
COMMON
5%
0402
COMMON
PVCC5_FB_DRV
16.0
R561
FB_UG FB_UGR
16.0 16.0
FB_BOOT
16.0
FB_BG
16.0
FB_FB
16.0
R588 2.21K
FB_COMP
10.0
06035%COMMON
C684
.1UF
25V
10%
X7R
0603
COMMON
FB_RC_FB
COMMON0603
1%
10.0
C688
1000PF
50V
0603
10%
X7R
COMMON
C678
1UF
10V
10%
X5R
0603
COMMON
2.2
FB_PHASE
16.0
C692 .047UF
0603 16V
10%
X7R
COMMON
GND
For G78-LE
8
1G2D1S
7
D
Q5A
SO08_I190X150
G
2
COMMON
S
1G2D1S
D
Q5B
SO08_I190X150
G
4
COMMON
S
C20
100PF
50V
5%
C0G
0402
COMMON
GND
R598
1.18K
1%
Rbot
0402
COMMON
1
30V
6.9A@25C, 5.8A@70C
0.028R
30A
2W@25C, 1.44W@70C
+/-20V
6
5
3
30V
6.9A@25C, 5.8A@70C
0.028R
30A
2W@25C, 1.44W@70C
+/-20V
R5951%10
C105
.1UF
16V
10%
X5R
0402
COMMON
GND
D9
12
DIODE_SMD_SMA
30V
2A
COMMON
GND
C694
FB_RC_IN
COMMON0603
10.0
Rtop
R597
1.47K
COMMON
0402
1%
GND
ASSEMBLY
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
PowerSupplyIII: FBVDDQ, FBVTT, PLLVD D
E GC
C14
3
IFP_PLLVDD F3V3
LB2
220R@100MHz
COMMON
IND_SMD_0603
C16
47UF
COMMON
20%
6.3V
ALE
0.15A@105C
4
0.76R
CAP_SMD_053X053
GND
IFP_PLLVDD
Vout = VRef * (1+Rtop/Rbot)
C13
4.7UF
6.3V
10%
X5R
0805
COMMON
GND
SOT23
COMMON
0.3A@25C
0.2W@25C
1UF
16V
SW12V_CF
10%
X7R
0805
COMMON
GND
1G1D1S
3
D
Q4
G
R11
1
S
2
60V
1.5R
1.2A
+/-20V
C682
.047UF
16V
10%
X7R
0402
COMMON
0402 COMMON
5%
R577 1.47K
0402 COMMON
GND
R566
2.2
16.0
0
R583
0402
1%
Rtop
Rbot
SW12V_FB VCC5_FB
0402 COMMON
5%
16.0 16.0
LDOFB_GLDOFB_GR
16.016.0
LDOFB_COMP
C685
2.7K
16.0
COMMON
R585
1.18K
1%
0402
COMMON
5%
LDOFB_FB
16.0
R583 &C685 STUFF RES 0 OHM
FOR NV44
COMMON
GND
GND
1.7966V = 0.8V * (1+(1.47K/1.18K)) (ISL6549)
2.49V = 0.8V * (1+(2.43K/1.15K)) (ISL6549 FOR NV46)
2.5095V = 0.5V * (1+(4.22K/1.05K)) (SC2621A FOR NV46)
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS. NAME
A B D F H
FBVDDQ:
Vout = VRef * (1+Rtop/Rbot)
1.7966V = 0.8V * (1+(1.47K/1.18K)) (ISL6549)
1.8057V = 0.5V * (1+(3.16K/1.21K)) (SC2621A)
2.01V = 0.8V * (1+(1.54K/1.02K)) (ISL6549)
2.01V = 0.5V * (1+(14.7K/4.87K)) (SC2621A)
L7
3.5 uH
IND_NONRKO_TH_060X011COMMON
L8
4.7uH
COMMON
IND_NONRKO_SMD_076X076
R551
2.2
5%
0805
COMMON
FB_SNUBBER
10.0
C672
1500PF
50V
10%
X7R
0603
COMMON
GND
.022UF
50V0603
10%
X7R
COMMON
Memory@400MHz : 4A
C33
4.7UF
6.3V
10%
X5R
0603
COMMON
GND GND GND
C32
4.7UF
6.3V
10%
X5R
0603
COMMON
4
FBVDDQ
C39
1000UF
COMMON
20%
6.3V
ALE
1.34A@105C
0.021
MULTI_CAP_TH_D080P035_D100P050
NVIDIA CORPORATION
2701 SAN TOMAS E XPR ESSWAY
SANTA CL ARA, CA 95050, USA
NV_PN
ID PAGE
C38
470UF
COMMON
20%
6.3V
ALE
2.09A@105C
0.025R
MULTI_CAP_SMD_083X083
GND
600-10383-xxxx-100
3
4
5
5-OCT-2005
DATE
www.vinafix.vn
HGFEDCBA
Title: Cref Pa rt Report
Design: p383_00
Date: Sep 23 14:15:13 2005
BKT1 BRACKET_LOW_1X_TOP_A [11.2F]
1
LT
C1 C_1 206 [13.3B]
C2 C_POL_TH_D80P35 [13.4B]
C3 C_0402 [9.4F]
C4 C_0402 [6.3G]
C5 C_0402 [6.3G]
C6 C_0402 [7.3G]
C7 C_0402 [7.2G]
C8 C_POL_SMD_D80 [13.4B]
C9 C_0 603 [13.4A]
C10 C_0402 [6.1F]
C11 C_0402 [6.2F]
C12 C_0402 [7.1G]
C13 C_0 805 [15.4B]
C14 C_0 805 [15.3B]
C15 C_0603 [9.4F]
C16 C_POL_SMD_D50 [15.4A]
C17 C_0603 [6.2C]
2
C18 C_POL_COMBI_TH_D80_D [15.2D]
100
C19 C_POL_COMBI_7343_D80 [15.2E]
_D100
C20 C_0 402 [15.4E]
C21 C_POL_TH_D80P35 [13.2E]
C22 C_POL_SMD_D80 [13.2E]
C23 C_0 805 [15.2E]
C24 C_0 805 [13.2E]
C25 C_POL_COMBI_TH_D80_D [13.2C]
100
C26 C_0 402 [13.4E]
C27 C_POL_COMBI_7343_D80 [13.2D]
_D100
C28 C_POL_TH_D50P20 [14.3B]
C29 C_POL_SMD_D60 [14.3B]
C30 C_0 603 [13.4E]
C31 C_1 206 [2.1B]
3
C32 C_0 603 [15.4G]
C33 C_0603 [15.4F ]
C34 C_POL_TH_D50P20 [14.3C]
C35 C_POL_SMD_D60 [14.3C]
C36 C_0 603 [2.1A]
C37 C_0 402 [2.1A]
C38 C_POL_COMBI_7343_D80 [15.4H]
_D100
C39 C_POL_COMBI_TH_D80_D [15.4G]
100
C40 C_0805 [12.2F ]
C41 C_0 603 [12.2G]
C42 C_POL_COMBI_TH_D80_D [13.4F]
100
C43 C_POL_COMBI_TH_D80_D [13.4G]
100
C44 C_POL_COMBI_7343_D80 [13.4F]
_D100
4
C45 C_POL_COMBI_7343_D80 [13.4G]
_D100
C46 C_POL_TH_D80P35 [13.5G]
C47 C_POL_SMD_D80 [13.5H]
C48 C_0 805 [9.2B]
C49 C_0 402 [12.3G]
C50 C_0805 [2.3H]
C51 C_0805 [9.2C]
C52 C_0402 [9.2D]
C53 C_0402 [9.2C]
C54 C_0402 [9.2D]
C55 C_0402 [9.2D]
C56 C_0 402 [6.4B]
C57 C_0603 [3.1D]
C58 C_0603 [2.4G]
C59 C_0 402 [3.5A]
C60 C_0 603 [12.3A]
C61 C_0402 [4.2G]
C62 C_0402 [4.2G]
5
C63 C_0402 [4.3F]
C64 C_0402 [4.2G]
C65 C_0402 [5.2G]
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMENTS OR INFORMAT ION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERI ALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, I MP LIE D, ST ATU TO R Y OR O TH ERW ISE WI TH RES PEC T T O TH E MA TE RI ALS OR OT HE RW ISE, AND EXPRESSL Y DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RS E O F D EA L IN G , T R AD E U SA G E, T R AD E P RA C TI C E, OR INDUSTRY STANDARDS. NAME
AB D F H
C66 C_0402 [4.2G]
C67 C_0402 [5.2F]
C68 C_0402 [4.3G]
C69 C_0402 [4.2F]
C70 C_0402 [5.2G]
C71 C_0402 [4.3G]
C72 C_0402 [5.2G]
C73 C_0402 [4.3G]
C74 C_0402 [5.2G]
C75 C_0402 [5.2G]
C76 C_0402 [5.2H]
C77 C_0402 [4.3G]
C78 C_0402 [5.3C]
C79 C_0402 [5.3E]
C80 C_0402 [5.2G]
C81 C_0402 [4.3G]
C82 C_0402 [5.2H]
C83 C_0402 [4.3G]
C84 C_0603 [4.3H]
C85 C_0603 [5.2H]
C501 C_0402 [4.2 G]
C502 C_0402 [5.4 G]
C503 C_0402 [5.4 G]
C504 C_0402 [5.4 G]
C505 C_0402 [4.3H ]
C506 C_0402 [5.3F ]
C507 C_0402 [4.2F ]
C508 C_0402 [4.3E]
C509 C_0402 [5.3 G]
C510 C_0402 [4.3C ]
C511 C_0402 [4.3 G]
C512 C_0402 [4.3 G]
C513 C_0402 [5.3 G]
C514 C_0402 [4.2 G]
C515 C_0402 [4.2H ]
C516 C_0402 [5.3 G]
C517 C_0402 [4.2H ]
C518 C_0402 [5.2F ]
C519 C_0402 [4.2 G]
C520 C_0402 [5.4F ]
C521 C_0402 [5.3H ]
C522 C_0402 [4.2 G]
C523 C_0402 [5.2H ]
C524 C_0402 [5.3H ]
C525 C_0603 [5.3H ]
C526 C_0603 [4.2H ]
C527 C_0402 [2.5D ]
C528 C_0402 [2.5D ]
C529 C_0402 [3.2E]
C530 C_0402 [3.3E]
C531 C_0402 [3.2F ]
C532 C_0402 [2.5D ]
C533 C_0402 [3.2E]
C534 C_0402 [3.2F ]
C535 C_0402 [3.2E]
C536 C_0402 [2.5D ]
C537 C_0402 [12.4G]
C538 C_0402 [2.5D ]
C539 C_0402 [2.5D ]
C540 C_0402 [3.2E]
C541 C_0402 [2.4D ]
C542 C_0402 [2.4D ]
C543 C_0402 [3.2F ]
C544 C_0402 [3.3E]
C545 C_0402 [2.4D ]
C546 C_0402 [3.1D ]
C547 C_0402 [3.1D ]
C548 C_0402 [3.1C ]
C549 C_0402 [3.2F ]
C550 C_0402 [2.2H ]
C551 C_0402 [2.2 G]
C552 C_0402 [3.2E]
C553 C_0402 [3.2E]
C554 C_0402 [2.4D ]
C555 C_0402 [3.3F ]
C556 C_0402 [2.4D ]
C557 C_0402 [2.1 G]
C558 C_0402 [2.2 G]
C559 C_0402 [2.1 G]
C560 C_0402 [3.2E]
C561 C_0402 [3.1D ]
C562 C_0805 [3.4E]
ASSEMBLY
PAGE DET AIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _ ST U F F ASSEM BLY NOTES AND BO M NOT F INAL
<edit here to insert page detail>
E GC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5-OCT-2005
1
2
3
4
5
www.vinafix.vn
HGFEDCBA
C563 C_0402 [2.4D ]
C564 C_0402 [2.3 G]
C565 C_0402 [2.2 G]
C566 C_0402 [3.4E]
C567 C_0402 [3.4D ]
C568 C_0402 [2.4D ]
1
C569 C_0402 [2.1 G]
C570 C_0402 [2.1 G]
C571 C_0402 [2.4 G]
C572 C_0402 [2.4 G]
C573 C_0402 [2.4D ]
C574 C_0402 [3.5D ]
C575 C_0402 [3.5C ]
C576 C_0402 [2.1 G]
C577 C_0402 [2.4D ]
C578 C_0805 [3.5D ]
C579 C_0603 [3.1E]
C580 C_0402 [2.2 G]
C581 C_0402 [2.2 G]
C582 C_0402 [12.1D]
C583 C_0402 [2.4 G]
C584 C_0402 [2.3 G]
C585 C_0402 [2.3 G]
C586 C_0402 [2.1 G]
2
C587 C_0402 [2.4D ]
C588 C_0402 [2.1 G]
C589 C_0402 [2.3D ]
C590 C_0402 [2.1H ]
C591 C_0402 [2.2H ]
C592 C_0402 [2.3 G]
C593 C_0402 [2.3D ]
C594 C_0402 [2.3 G]
C595 C_0402 [2.2 G]
C596 C_0402 [2.5 G]
C597 C_0402 [2.1 G]
C598 C_0402 [2.2 G]
C599 C_0402 [2.3D ]
C600 C_0402 [7.3B]
C601 C_0402 [10.2B]
C602 C_0402 [2.3D ]
C603 C_0402 [8.3B]
C604 C_0402 [7.3A]
3
C605 C_0402 [7.3A]
C606 C_0402 [7.3A]
C607 C_0402 [7.3A]
C608 C_0402 [10.4B]
C609 C_0402 [2.3D ]
C610 C_0402 [12.4B]
C611 C_0402 [2.3D ]
C612 C_0402 [2.3D ]
C613 C_0402 [12.4B]
C614 C_0402 [2.5 G]
C615 C_0402 [8.3B]
C616 C_0402 [2.3D ]
C617 C_0402 [12.4A]
C618 C_0402 [8.3B]
C619 C_0402 [6.4A]
C620 C_0402 [2.3D ]
C621 C_0402 [12.4B]
C622 C_0402 [8.3B]
4
C623 C_0402 [6.4A]
C624 C_0402 [6.4A]
C625 C_0402 [2.3D ]
C626 C_0402 [6.4A]
C627 C_0402 [8.3B]
C628 C_0402 [2.5 G]
C629 C_0402 [9.3B]
C630 C_0402 [2.2D ]
C631 C_0402 [12.5B]
C632 C_0402 [12.5D]
C633 C_0402 [2.5 G]
C634 C_0402 [9.3B]
C635 C_0402 [9.3B]
C636 C_0402 [2.2D ]
C637 C_0805 [2.3 G]
C638 C_0402 [2.5H ]
C639 C_0402 [9.3B]
C640 C_0402 [9.3B]
C641 C_0402 [2.2D ]
5
C642 C_0402 [8.2D ]
C643 C_0402 [8.2D ]
C644 C_0402 [8.2D ]
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMENTS OR INFORMAT ION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERI ALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, I MP LIE D, ST ATU TO R Y OR O TH ERW ISE WI TH RES PEC T T O TH E MA TE RI ALS OR OT HE RW ISE, AND EXPRESSL Y DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RS E O F D EA L IN G , T R AD E U SA G E, T R AD E P RA C TI C E, OR INDUSTRY STANDARDS. NAME
AB D F H
C645 C_0805 [2.1H ]
C646 C_0402 [9.3B]
C647 C_0402 [9.3A]
C648 C_0402 [2.2D ]
C649 C_0402 [9.3B]
C650 C_0402 [2.2D ]
C651 C_0805 [9.3A]
C652 C_0805 [2.1H ]
C653 C_0402 [2.2D ]
C654 C_0402 [8.2C ]
C655 C_0402 [8.3B]
C656 C_0402 [8.3B]
C657 C_0402 [8.3A]
C658 C_0402 [2.4 G]
C659 C_0805 [8.2C ]
C660 C_0402 [2.4 G]
C661 C_0805 [2.3H ]
C662 C_0805 [8.2B]
C663 C_0805 [8.3A]
C664 C_0805 [14. 3F ]
C665 C_0402 [2.1A]
C666 C_0402 [2.1B]
C667 C_0603 [13. 3D ]
C668 C_1206 [2.1B]
C669 C_0603 [13.4E]
C670 C_0603 [13.3E]
C671 C_0603 [13.4E]
C672 C_0603 [15. 4F ]
C673 C_0603 [13. 3D ]
C674 C_0603 [15. 3D ]
C675 C_0603 [13. 3D ]
C676 C_0402 [13. 3C ]
C677 C_0603 [15. 3C ]
C678 C_0603 [15.3E]
C679 C_0603 [13. 4F ]
C680 C_0603 [8.5F ]
C681 C_0402 [7.4C ]
C682 C_0402 [15.4B]
C683 C_0402 [7.4B]
C684 C_0603 [15. 4D ]
C685 C_0402 [15. 4C ]
C686 C_0603 [8.4D ]
C687 C_0603 [9.3E]
C688 C_0603 [15. 5D ]
C689 C_0402 [7.1 G]
C690 C_0603 [8.4E]
C691 C_0603 [9.3E]
C692 C_0603 [15.4E]
C693 C_0402 [13.2B]
C694 C_0603 [15. 4F ]
C695 C_0402 [8.5F ]
C696 C_0402 [7.4E]
C697 C_0402 [7.3E]
C698 C_0402 [7.5E]
C699 C_0402 [6.5F ]
C700 C_0402 [6.4F ]
C701 C_0402 [6.4F ]
C702 C_0603 [8.4E]
C703 C_0603 [9.3F ]
C704 C_0402 [9.4 G]
C705 C_0402 [8.4 G]
C706 C_0402 [7.4F ]
C707 C_0402 [7.3F ]
C708 C_0402 [7.5F ]
C709 C_0402 [6.5F ]
C710 C_0402 [6.4F ]
C711 C_0402 [6.4F ]
C712 C_0805 [13.4B]
CN1 CON_PCI_EXPRESS_NONP [2.3C]
HY- X16
D1 D_3PIN_AC_SOT23 [6.3F]
D2 D_3PIN_AC_SOT23 [7.2F]
D3 D_3PIN_AC_SOT23 [9.4E]
D4 D_3PIN_AC_SOT23 [6.2F]
D5 D_3PIN_AC_SOT23 [6.3F]
D6 D_3PIN_AC_SOT23 [7.3F]
D7 D_3PIN_AC_SOT23 [7.1F]
D8 D_3PIN_AC_SOT23 [6.2F]
D9 D_SCHOTTKY_SMA [15.4E]
D10 D_SCHOTTKY_SMA [13.4F]
D11 D_S OT23 [12.2G]
D501 D_3PIN_CC_S O T2 3 [ 14 .3 F ]
ASSEMBLY
PAGE DET AIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _ ST U F F ASSEM BLY NOTES AND BO M NOT F INAL
<edit here to insert page detail>
E GC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5-OCT-2005
1
2
3
4
5
www.vinafix.vn
HGFEDCBA
D502 D_SOT23 [ 13 .2 G ]
D503 D_SOT23 [1 5. 2F ]
D504 D_3PIN_AC_ SO T 23 [7 .1 F]
D505 D_3PIN_A C_ SO T 23 [8 . 5E]
F1 F_POLYSW_1206 [13.3A]
J1 CON_ LFH_DMS59 [8.3H]
1
J1 CON_ LFH_DMS59 [9.3H]
J2 HDR_1X 2_NORM [12.2G]
J501 HDR_2X4_KEY6 [12.3A]
L1 L_0603 [6.3F]
L2 L_0603 [6.2F]
L3 L_0603 [7.2F]
L4 L_0603 [7.2F]
L5 L_T H [13.2D]
L6 L_7_6X7_6 [13.2D]
L7 L_T H [15.3F]
L8 L_7_6X7_6 [15.4F]
L9 L_T H [13.3F]
L10 L_7_6X7_6 [14.3C]
L11 L_SMD _12X5 [13.3F]
L12 L_7_6X7_6 [13.4G]
L501 L_0603 [8.4E]
L502 L_0603 [9.3E]
L503 L_0603 [7.4F]
2
L504 L_0603 [7.3F]
L505 L_0603 [7.5F]
L506 L_0603 [6.5F]
L507 L_0603 [6.3F]
L508 L_0603 [6.4F]
LB1 L_BEAD_0603 [9.4F]
LB2 L_BEAD_0603 [15.3A]
LB3 L_BEAD_0603 [9.2B]
LB501 L_BEAD_0402 [3.4F]
LB502 L_BEAD_0402 [3.5E]
LB503 L_BEAD_0402 [7.2A]
LB504 L_BEAD_0402 [12.4A]
LB505 L_BEAD_0402 [6.4A]
LB506 L_BEAD_0603 [2.5H]
LB507 L_BEAD_0402 [9.3A]
LB508 L_BEAD_0603 [8.2B]
LB509 L_BEAD_0402 [8.3A]
LB510 L_Bead_0402 [2.4G]
3
LB511 L_BEAD_0805 [13.4H]
LB512 L_BEAD_0805 [14.3C]
LB513 L_BEAD_0603 [8.5F]
MEC1 MEC_SCREW_STD [11.3G]
MEC2 MEC_SCREW_STD [11.3G]
MEC3 MEC_SCREW_STD [11.2G]
MEC4 HEATSINK_GPU [11.3F]
MEC5 HEATSINK_GPU [11.3G]
Q1 Q_FET_N_ENH_COMBI_MO [13.3B]
NO_ 1G2D1S
Q2 Q_NPN_SOT23_1B1C1E [15.2B]
Q3 Q_PNP_SOT23_1B1C1E [15.1C]
Q4 Q_FET_N_ENH_SOT23_1G [15.3B]
1D1 S
Q5 Q_FET_N_ENH_SO8_DUAL [15.3E 15.4E]
_1G 2D1S
Q6 Q_FET_N_ENH_LFPAK [13.3E]
Q7 Q_FET_N_ENH_LFPAK [13.4E]
4
Q8 Q_FET_N_ENH_SOT23_1G [12.2F]
1D1 S
Q9 Q_FET_N_ENH_SOT23_1G [8.2A]
1D1 S
Q10 Q_FET_P_ENH_SOT23_1G [8.2B]
1D1 S
Q501 Q_FET_N_ENH_SOT23_1G [7.4B]
1D1 S
Q502 Q_NPN_SOT23_1B1C1E [14.3G]
Q503 Q_PNP_SOT23_1B1C1E [14.3F]
Q504 Q_PNP_SOT23_1B1C1E [13.2C]
Q505 U_SW_ANA_3257_XSOP16 [7.3E 7.5E 7.4E 7.4E 7.4B]
_SE CT
Q506 Q_NPN_SOT23_1B1C1E [13.2B]
R1 R_0402 [13.3C]
R2 R_0 402 [15.1B]
R3 R_0402 [15.1C]
R4 R_0 402 [15.2B]
R5 R_0402 [9.4E]
5
R6 R_0402 [9.4E]
R7 R_0402 [6.1E]
R8 R_0 402 [15.2B]
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMENTS OR INFORMAT ION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERI ALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, I MP LIE D, ST ATU TO R Y OR O TH ERW ISE WI TH RES PEC T T O TH E MA TE RI ALS OR OT HE RW ISE, AND EXPRESSL Y DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RS E O F D EA L IN G , T R AD E U SA G E, T R AD E P RA C TI C E, OR INDUSTRY STANDARDS. NAME
AB D F H
R9 R_0402 [7.1E]
R10 R_0402 [6.2E]
R11 R_0402 [15.3C ]
R12 R_0 805 [13.4E]
R13 R_0 603 [12.2E]
R14 R_0 603 [12.2G]
R15 R_0603 [12.2F ]
R16 R_0603 [8.1B]
R17 R_0402 [8.2A]
R18 R_0402 [11.2C ]
R19 R_0402 [9.3C]
R20 R_0402 [11.3C ]
R21 R_0402 [12.3F ]
R22 R_0402 [11.2C ]
R23 R_0 402 [11.2B]
R24 R_0402 [11.1C ]
R25 R_0402 [10.3D ]
R26 R_0402 [9.2E]
R27 R_0402 [9.2E]
R28 R_0402 [9.2F]
R29 R_0402 [9.2F]
R30 R_0402 [11.1C ]
R31 R_0402 [11.1C ]
R32 R_0 402 [11.1B]
R33 R_0 402 [11.1B]
R34 R_0402 [11.2C ]
R35 R_0 402 [11.1B]
R36 R_0402 [11.3C ]
R37 R_0402 [9.2D]
R38 R_0402 [9.2E]
R39 R_0402 [9.2E]
R40 R_0402 [9.2F]
R41 R_0402 [8.4C]
R42 R_0402 [6.5D]
R43 R_0402 [6.4D]
R44 R_0402 [6.4D]
R45 R_0 402 [12.5B]
R46 R_0 402 [11.1B]
R47 R_0402 [11.4C ]
R48 R_0 402 [11.4B]
R49 R_0402 [12.5D ]
R50 R_0402 [11.4C ]
R51 R_0 402 [11.5B]
R52 R_0 402 [12.3E]
R53 R_0402 [7.4C]
R54 R_0402 [3.5A]
R55 R_0402 [3.5A]
R56 R_0402 [12.4F ]
R57 R_0402 [3.5F]
R58 R_0402 [3.5F]
R59 R_0402 [5.2C]
R60 R_0402 [3.5H]
R61 R_0402 [3.5H]
R62 R_0402 [5.3C]
R63 R_0402 [4.5B]
R64 R_0402 [4.5B]
R65 R_0603 [4.5B]
R66 R_0402 [4.5B]
R67 R_0402 [4.5B]
R501 R_0402 [3.3D ]
R502 R_0402 [4.3C ]
R503 R_0402 [5.5E]
R504 R_0402 [5.5E]
R505 R_0402 [4.3C ]
R506 R_0603 [5.5D ]
R507 R_0402 [5.5D ]
R508 R_0402 [5.5D ]
R509 R_0402 [12.2A]
R510 R_0402 [12.2B]
R511 R_0402 [12.2A]
R512 R_0402 [12.2A]
R513 R_0402 [12.2B]
R514 R_0402 [12.2B]
R515 R_0402 [3.4C ]
R516 R_0402 [12. 4F ]
R517 R_0402 [3.4D ]
R518 R_0402 [3.4D ]
R519 R_0402 [8.3C ]
R520 R_0402 [12. 4D ]
R521 R_0402 [12. 2D ]
R522 R_0402 [12.2E]
R523 R_0402 [7.3B]
ASSEMBLY
PAGE DET AIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _ ST U F F ASSEM BLY NOTES AND BO M NOT F INAL
<edit here to insert page detail>
E GC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
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DATE
5-OCT-2005
1
2
3
4
5
www.vinafix.vn
HGFEDCBA
R524 R_0402 [7.3B]
R525 R_0402 [7.5D ]
R526 R_0402 [7.4D ]
R527 R_0402 [7.3D ]
R528 R_0402 [6.5B]
R529 R_0402 [6.1D ]
1
R530 R_0402 [6.2D ]
R531 R_0402 [7.1D ]
R532 R_0402 [7.1D ]
R533 R_0402 [8.2F ]
R534 R_0402 [8.2F ]
R535 R_0402 [2.2E]
R536 R_0402 [8.2E]
R537 R_0402 [8.2F ]
R538 R_0402 [8.2D ]
R539 R_0402 [8.2E]
R540 R_0402 [8.2E]
R541 R_0402 [8.2E]
R542 R_0402 [14.3G]
R543 R_0402 [14.3G]
R544 R_0402 [14.3G]
R545 R_0402 [14.3F]
R546 R_0402 [14.3G]
R547 R_0603 [13.2G]
2
R548 R_0402 [13.3E]
R549 R_0603 [13.4C]
R550 R_0603 [13.4D]
R551 R_0805 [15.4F]
R552 R_0402 [13.3D]
R553 R_0402 [13.5E]
R554 R_0603 [13.4E]
R555 R_0805 [13.2C]
R556 R_0805 [13.2D]
R557 R_0805 [13.2D]
R558 R_0402 [13.3C]
R559 R_0402 [13.4C]
R560 R_0603 [13.5E]
R561 R_0402 [15.3E]
R562 R_0402 [13.3C]
R563 R_0402 [15.3D]
R564 R_0402 [13.3C]
R565 R_0402 [6.3E]
3
R566 R_0402 [15.3C]
R567 R_0402 [7.2E]
R568 R_0402 [7.2E]
R569 R_0402 [6.3E]
R570 R_0402 [7.2E]
R571 R_0402 [7.4E]
R572 R_0402 [7.5D ]
R573 R_0402 [7.4E]
R574 R_0402 [6.2E]
R575 R_0402 [7.2E]
R576 R_0402 [7.4E]
R577 R_0402 [15.4C]
R578 R_0603 [15.4C]
R579 R_0402 [6.2E]
R580 R_0402 [7.5E]
R581 R_0402 [7.5E]
R582 R_0402 [13.1C]
R583 R_0402 [15.4C]
4
R584 R_0402 [7.3E]
R585 R_0402 [15.4C]
R586 R_0402 [7.1E]
R587 R_0402 [13.2B]
R588 R_0603 [15.4D]
R589 R_0603 [15.2G]
R590 R_0402 [8.5E]
R591 R_0402 [7.3E]
R592 R_0402 [7.4E]
R593 R_0402 [7.3E]
R594 R_0402 [13.2A]
R595 R_0603 [15.4E]
R596 R_0402 [8.5E]
R597 R_0402 [15.5E]
R598 R_0402 [15.5E]
R599 R_0402 [13.2A]
R600 R_0402 [6.5E]
R601 R_0402 [6.4E]
R602 R_0402 [6.4E]
5
R603 R_0402 [7.4A]
R604 R_0402 [7.4D ]
R605 R_0402 [7.3D ]
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMENTS OR INFORMAT ION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERI ALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, I MP LIE D, ST ATU TO R Y OR O TH ERW ISE WI TH RES PEC T T O TH E MA TE RI ALS OR OT HE RW ISE, AND EXPRESSL Y DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RS E O F D EA L IN G , T R AD E U SA G E, T R AD E P RA C TI C E, OR INDUSTRY STANDARDS. NAME
AB D F H
R606 R_0402 [7.4A]
R607 R_0402 [8.4 G]
RP1 R_PAK_0402X4 [3.3H 3.4G 3.3H 3.4G]
RP2 R_PAK_0402X4 [3.4G 3.3H 3.4G 3.4H]
RP3 R_PAK_0402X4 [3.1G 3.3G 3.1G 3.3G]
RP4 R_PAK_0402X4 [3.3H 3.2H 3.3H 3.2H]
RP5 R_PAK_0402X4 [3.3G 3.2H 3.2H 3.4G]
RP6 R_PAK_0402X4 [3.2G 3.2G 3.4H 3.4H]
RP7 R_PAK_0402X4 [3.2G 3.3G 3.2G 3.3G]
RP8 R_PAK_0402X4 [3.1G 3.2H 3.2H 3.1G]
RP9 R_PAK_0402X4 [3.1H 3.1H 3.1H 3.1H]
RP10 R_PAK_0402X4 [3.3H 3.3H 3.4H 3.4H]
RP11 R_PAK_0402X4 [3.3G 3.2G 3.2G 3.3G]
RP12 R_PAK_0402X4 [3.2H 3.2H 3.2G 3.2G]
TP1 LABTESTPOINT_PIN [9.2B]
TP2 LABTESTPOINT_PIN [8.2B]
TP3 LABTESTPOINT_PIN [12.2B]
TP4 LABTESTPOINT_PIN [12.2B]
TP501 LABTEST PO I NT _P IN [3 . 4E]
U1 U_MEM_FL_SER_128KX8_ [12.3G]
SO8
U2 U_GPU_G3_64_BGA533 [2.3F]
U2 U_GPU_G3_64_BGA533 [3.3B]
U2 U_GPU_G3_64_BGA533 [6.5C]
U2 U_GPU_G3_64_BGA533 [7.3C]
U2 U_GPU_G3_64_BGA533 [8.3C]
U2 U_GPU_G3_64_BGA533 [9.3C]
U2 U_GPU_G3_64_BGA533 [10.3H 10.2C 10.4C]
U2 U_GPU_G3_64_BGA533 [12.3C 12.4C 12.2C]
U3 U_MEM_SD_DDR2_X16_BG [4.3C 4.2B 4.4E]
A84
U4 U_MEM_SD_DDR2_X16_BG [5.2B 5.3C 5.4E]
A84
U501 U_MEM_SD_DDR2_X16_BG [4.3E 4.2E 4.4C]
A84
U502 U_MEM_SD_DDR2_X16_BG [5.2E 5.4C 5.3E]
A84
U503 U_MEM_EE_CRYPT_8X128 [12.4F]
_SO 8
U504 U_SWREG_ISL6549_QSOP [13.3D]
16
U505 U_AND_2IN_74ACT_SO [6.2D 6.3D]
U505 U_AND_2IN_74ACT_SO [7.2D 7.2D]
U506 U_SWREG_ISL6549_QSOP [15.4D]
16
Y501 XTAL_4PIN_H10SSMD [12.5C]
ASSEMBLY
PAGE DET AIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _ ST U F F ASSEM BLY NOTES AND BO M NOT F INAL
<edit here to insert page detail>
E GC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
600-10383-xxxx-100
ID PAGE
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5-OCT-2005
1
2
3
4
5
www.vinafix.vn
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