MSI MS-V066 Schematic 100

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

ASSEMBLYNVPNVARIANT

B
1
2

SKU

3
4
5
6

12
13
14

7
8

9
10
11

15

P455-A01 DT SKU2

P455-A01, G71-A02, 256MB 8Mx32 GDDR3 (700Mhz),
DVI-I-DL, DVI-I-DL, HDTV-Out for Dell HMGA

Table of Contents:

Page 1: Overview
Page 2: PCI Express 1.0
Page 3: MEMORY: GPU Partition A/B
Page 4: MEMORY: GPU Partition C/D
Page 5: FBA Partition
Page 6: FBB Partition
Page 7: FBC Partition
Page 8: FBD Partition
Page 9: FrameBuffer Net Properties
Page 10: DACA Interface
Page 11: DACC Interface
Page 12: IFP A/B and C/D Interface
Page 13: DACB and Stereo Interface
Page 14: Video Capture (Philips SAA7115)
Page 15: Multi-use IO(MIO) Interface
Page 16: GPIO, I2C, ROM, HDMI, and XTAL
Page 17: Strapping Configuration
Page 18: Power/GND and Decoupling
Page 19: Power Supply I: A2V5, DDC5V, SAA7115, TMDS Supplies
Page 20: Power Supply II: PEX Input Filters, External 12V Power, NVVDD VID Control
Page 21: Power Supply III: FBVDDQ and PEX1V2
Page 22: Power Supply IV: NVVDD
Page 23: Thermal Diode, Fan Control
Page 24: Mechanical: Bracket/Thermal Solution

REVISION HISTORY:

X1

RevA: Initial Release

BASE
SKU0000
SKU0002
SKU0500
SKU0501
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
Overview

www.vinafix.vn

<UNDEFINED>

600-10455-base-001
600-10455-0000-001
600-10455-0002-001
600-50455-0500-001
600-50455-0501-001
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>

P455 - BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
G71-GT - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz
G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
G71GL-U - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + STEREO, 450/700 MHz
G71GL-Std - 256MB 8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 375/600 MHz
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>

600-10455-0002-001

design
LFarasati

1 OF 24

9-FEB-2006

J501

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

23/24 JTAG

JTAG_TRST

JTAG_TDO

JTAG_TMS

JTAG_TCLK
JTAG_TDI

KEY

TRST*

GND

TCK

TMS
TDI
VCC
TDO

1/24 PCI EXPRESS

PEX_IOVDD

PEX_IOVDD

PEX_IOVDD
PEX_IOVDD

PEX_IOVDD
PEX_IOVDD

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_IOVDDQ

PEX_PLLAVDD

RFU
RFU

PEX_PLLDGND

PEX_PLLDVDD

PEX_PLLAGND

PEX_TEST_PLL_CLK_OUT
PEX_TEST_PLL_CLK_OUT

PEX_TX0

PEX_RST

PEX_REFCLK
PEX_REFCLK

PEX_TX0

PEX_TX2

PEX_RX2

PEX_TX3

PEX_RX1

PEX_RX0

PEX_TX1
PEX_RX1

PEX_TX2

PEX_RX2

PEX_RX0

PEX_TX1

PEX_RX3

PEX_RX3

PEX_TX3

PEX_TX7

PEX_RX6

PEX_TX4

PEX_RX6

PEX_TX6

PEX_RX5

PEX_TX5

PEX_TX5

PEX_RX4

PEX_RX5

PEX_TX6

PEX_RX4

PEX_TX4

PEX_TX7
PEX_RX7

PEX_TX9

PEX_TX10

PEX_RX8

PEX_TX9
PEX_RX9

PEX_TX8

PEX_RX10

PEX_RX8

PEX_RX9
PEX_TX10

PEX_TX8

PEX_RX7

PEX_TX11

PEX_RX13
PEX_RX13

PEX_RX11
PEX_TX12

PEX_RX10

PEX_TX11
PEX_RX11

PEX_TX12
PEX_RX12

PEX_RX12
PEX_TX13

PEX_TX13

PEX_TX14

PEX_RX15

PEX_TX14
PEX_RX14

PEX_RX14

PEX_RX15

PEX_TX15

PEX_TX15

END OF X8

END OF X16

END OF X1

END OF X4

TCLK JTAG2

TMS JTAG5

TDO JTAG4

TDI JTAG3

WAKE

SMDAT

SMCLK

PERN0

PERP0

REFCLK

PERST

REFCLK

PETN1
PERP2

PETN0
PERP1

PERN1

PETP0

PETP1

PERN3
PETP3

PETN3

PETP2

PERP3

PETN2

PERN2

PERP4
PERN4

PETN4
PERP5

PETP4

PERN5
PETP5

PETP6

PERN6

PERP6

PETN5

PERP7

PETN6

PERN7

PETN8

PETP8

PERP8

PETN7

PETP7

PERN8

PERN9

PERP9

PERP10
PERN10

PETP10

PETP9
PETN9

PETN10

PETN11
PERP12

PERN12

PERP11
PERN11

PETP11

PETN12

PETP12

PETN13

PERP13
PERN13

PETP13

PERP14

PERN15
PETP15

PETN15

PERN14

PETN14

PETP14

PERP15

TRST* JTAG1+12V

+12V/RSVD

+3V3AUX

+12V

+12V
+12V

+3V3
+3V3
+3V3

PRSNT2

PRSNT1

RSVD
GND

GND
GND

GND

GND

GND
GND

GND
GND

PRSNT2
RSVD
RSVD
RSVD

GND
GND
GND
GND
GND

GND

GND
GND

GND

GND

GND

GND

PRSNT2
RSVD

GND

GND
GND

GND
GND

GND
GND

GND

GND

GND

GND
GND

GND

GND

GND

PRSNT2

GND

RSVD

RSVD

GND
GND

GND

GND

GND

GND

GND

GND

GND
GND

GND

GND

GND

GND
GND
GND
GND
GND
GND

GND

GND

GND

GND

GND
GND
GND
GND
GND
GND
GND
GND

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

HDR_2F4

FEMALE

PEX_TRST*

B9

PEX_TCLK

A5

PEX_TDI

A6

PEX_TDO

A7

PEX_TMS

A8

B5
B6

B11

A11

A13
A14

A16
A17

B14
B15

A21
A22

B19
B20

A25
A26

B23
B24

A29
A30

B27
B28

A35
A36

B33
B34

A39
A40

B37
B38

A43
A44

B41
B42

A47
A48

B45
B46

A52
A53

B50
B51

A56
A57

B54
B55

A60
A61

B58
B59

A64
A65

B62
B63

A68
A69

B66
B67

A72
A73

B70
B71

A76
A77

B74
B75

A80
A81

B78
B79

SNN_PEX_SMCLK
SNN_PEX_SMDAT

SNN_PEX_WAKE*

PEX_RST*

PEX_REFCLK
PEX_REFCLK*

PEX_TXX0
PEX_TXX0*

PEX_RX0
PEX_RX0*

PEX_TXX1
PEX_TXX1*

PEX_RX1
PEX_RX1*

PEX_TXX2
PEX_TXX2*

PEX_RX2
PEX_RX2*

PEX_TXX3
PEX_TXX3*

PEX_RX3
PEX_RX3*

PEX_TXX4
PEX_TXX4*

PEX_RX4
PEX_RX4*

PEX_TXX5
PEX_TXX5*

PEX_RX5
PEX_RX5*

PEX_TXX6
PEX_TXX6*

PEX_RX6
PEX_RX6*

PEX_TXX7
PEX_TXX7*

PEX_RX7
PEX_RX7*

PEX_TXX8
PEX_TXX8*

PEX_RX8
PEX_RX8*

PEX_TXX9
PEX_TXX9*

PEX_RX9
PEX_RX9*

PEX_TXX10
PEX_TXX10*

PEX_RX10
PEX_RX10*

PEX_TXX11
PEX_TXX11*

PEX_RX11
PEX_RX11*

PEX_TXX12
PEX_TXX12*

PEX_RX12
PEX_RX12*

PEX_TXX13
PEX_TXX13*

PEX_RX13
PEX_RX13*

PEX_TXX14
PEX_TXX14*

PEX_RX14
PEX_RX14*

PEX_TXX15
PEX_TXX15*

PEX_RX15
PEX_RX15*

R692
0

5%
0402
COMMON

C838

0402

COMMON

X5R

C828

0402 10V .1UFC817

COMMON

X5R

C800

0402

COMMON

X5R

C773

0402

COMMON

X5R

C747

0402

COMMON

X5R

C716

0402

COMMON

X5R

C701

0402

COMMON

X5R

C673

0402

COMMON

X5R

0402

COMMON

X5R

C645

0402

COMMON

X5R

C637

0402

COMMON

X5R

C631

0402

COMMON

X5R X5R

C626

0402

COMMON

X5R

C621

0402

COMMON

X5R

C615

0402

COMMON

X5R

C611

0402

COMMON

X5R

.1UF

10V
10%

.1UF

10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UFC657

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

.1UF

10V
10%

C835

0402

0402

C794

0402

C766

0402

C743

0402

C713

0402

C696

0402

0402

C652

0402

C642

0402

C635

0402

C629

0402

0402

0402

C614

0402

C608

0402

.1UF

10V

10V

.1UF

10V

.1UF

10V

.1UF

10V

.1UF

10V

.1UF

10V

.1UFC667

10V

.1UF

10V

.1UF

10V

.1UF

10V

.1UF

10V

.1UFC625

10V

.1UFC620

10V

.1UF

10V

.1UF

10V

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%
X5R

10%

10%
X5R

10%
X5R

10%
X5R

10%
X5R

R670

0402

5%

0402

5%

R691

0402

5%

R693

0402

5%

R688

0402

5%

PEX_TX0
PEX_TX0*

COMMON

PEX_TX1
PEX_TX1* AN11

COMMON

PEX_TX2
PEX_TX2*

COMMON

PEX_TX3
PEX_TX3*

COMMON

PEX_TX4
PEX_TX4*

COMMON

PEX_TX5
PEX_TX5*

COMMON

PEX_TX6
PEX_TX6*

COMMON

PEX_TX7
PEX_TX7*

COMMON

PEX_TX8 AM16
PEX_TX8*

COMMON

PEX_TX9
PEX_TX9*

COMMON

PEX_TX10
PEX_TX10*

COMMON

PEX_TX11
PEX_TX11*

COMMON

PEX_TX12
PEX_TX12*

COMMON

PEX_TX13
PEX_TX13*

COMMON

PEX_TX14
PEX_TX14*

COMMON

PEX_TX15
PEX_TX15*

COMMON

0

NO STUFF

0R674

NO STUFF

0

NO STUFF

0

NO STUFF

0

NO STUFF

AR9

AK10
AL10

AM11
AM10

AP9

AP10
AN10

AR10
AR11

AN12
AM12

AT11
AT12

AL12
AK12

AP12
AP13

AM14
AM13

AR13
AR14

AN13
AN14

AT14
AT15

AN15
AM15

AP15
AP16

AL15
AK15

AR16
AR17

AN16
AT17

AT18
AN17

AN18
AP18

AP19
AM18

AM17
AR19

AR20
AL18

AK18
AT20

AT21
AM19

AN19
AP21

AP22
AN20

AN21
AR22

AR23
AM21

AM20
AT23

AT24
AL21

AK21
AR24

AR25

JTAG_TRST*

JTAG_TCLK

JTAG_TDI

JTAG_TDO

JTAG_TMS

U8
G71-N-A2

BGA1148
CHANGED

www.vinafix.vn

C860

4.7UF

16V
20%
X7R
1206
COMMON

C856

4.7UF

6.3V
10%
X5R
0603
COMMON

C892

4.7UF

16V
20%
X7R
1206
COMMON

C857
.1UF

16V
10%
X7R
0402
COMMON

SNN_PE_PRSNT2_A

SNN_PE_RSVD2

PRSNT*

C868
.1UF

16V
10%
X7R
0402
COMMON

SNN_3V3AUX

CN2

CON_X16
COMMON

CON_PCIEXP_X16_EDGE

B1
B2
A2
A3
B3

B8
A9

A10
B10

A1

B17

B12

B4
A4

B7
A12
B13
A15
B16
B18
A18

Page2: PCI Express 1.0

12V

GND

3V3

GND

SNN_PE_PRSNT2_B
SNN_PE_RSVD3
SNN_PE_RSVD4
SNN_PE_RSVD5

SNN_PE_PRSNT2_C
SNN_PE_RSVD6

PRSNT*
SNN_PE_RSVD7
SNN_PE_RSVD8

GND

B31
A19
B30
A32

A20
B21
B22
A23
A24
B25
B26
A27
A28
B29
A31
B32

B48

GND

A33
A34

B35
B36
A37
A38
B39
B40
A41
A42
B43
B44
A45
A46
B47
B49
A49

GND

B81
A50
B82

A51
B52
B53
A54
A55
B56
B57
A58
A59
B60
B61
A62
A63
B64
B65
A66
A67
B68
B69
A70
A71
B72
B73
A74
A75
B76
B77
A78
A79
B80
A82

GND

3V3

1
3
5
7

1.274MM
0
KEY6_JTAG_SMALL
NO STUFF

2
4

8

Place near balls

AH21
AJ21
AH22
AJ22
AH23
AJ23

AH16
AF17
AH17
AF18
AH18

AF19
AH19
AE20
AF20
AH20

AJ20

Matching Rule of Thumb
4 inch from Top of Gold Fingers to GPU

*2 inch Lane to Lane Skew

*No real Skew rule, but reducing the skew will minimize latency

PEX_PLL_CLK_OUT

AM9

PEX_PLL_CLK_OUT*

AN9

SNN_GPU_AK19

AK19

SNN_GPU_AK20

AK20

AE15

AF15
AE17

AE16

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
PCI Express 1.0

3V3

R672

R689

R690
10K

5%
0402
COMMON

GND

C739
.01UF

16V
10%
X5R
0402
COMMON

C693
.1UF

10V
10%
X5R
0402
COMMON

C729
.1UF.1UF

10V
10%
X5R
0402
COMMON

C742
.1UF

16V
10%
X5R
0603
COMMON

C702
.1UF

10V
10%
X5R
0402
COMMON

C714

10V
10%
X5R
0402
COMMON

PEX_TEST_PLL_CLK_OUT Termination = 200ohm

AVDD & DVDD route separate first from the balls
then join at the first cap

PEX_PLLVDD

10K

5%
0402
COMMON

R671
10K

5%
0402
COMMON

R628
200

5%
0402
COMMON

C695
1UF

10V
10%
X5R
0603
COMMON

C715
1UF

10V
10%
X5R
0603
COMMON

C89
1UF

10V
10%
X5R
0603
COMMON

GND

180

5%
0402
COMMON

JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*

R673
270

5%
0402
COMMON

C92

4.7UF

6.3V
10%
X5R
0603
COMMON

C680
1UF

10V
10%
X5R
0603

C704
1UF 4.7UF

10V
10%
X5R
0603

GND

LB23

JTAG

U8
G71-N-A2

BGA1148
CHANGED

AK6
AL8
AL7
AK7
AL9

220R@100MHz

COMMONBEAD_0603

C681

4.7UF

6.3V
10%
X5R
0603
COMMONCOMMON

C678

6.3V
10%
X5R
0603
COMMONCOMMON

PEX NET RULES

NET NV_CRITICAL

100DIFF
100DIFF

100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF

100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF

100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF

100DIFF
100DIFF
50OHM

PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT

C689
10UF

6.3V
20%
X5R
0805
COMMON

C91
10UF

6.3V
20%
X5R
0805
COMMON

PEX_REFCLK 1
PEX_REFCLK*

PEX_TXX0
PEX_TXX0*
PEX_TXX1
PEX_TXX1*
PEX_TXX2
PEX_TXX2*
PEX_TXX3
PEX_TXX3*
PEX_TXX4
PEX_TXX4*
PEX_TXX5
PEX_TXX5*
PEX_TXX6
PEX_TXX6*
PEX_TXX7
PEX_TXX7*
PEX_TXX8
PEX_TXX8*

PEX_VDD

PEX_VDD

GND

GND

PEX_TXX9
PEX_TXX9*
PEX_TXX10
PEX_TXX10*
PEX_TXX11
PEX_TXX11*
PEX_TXX12
PEX_TXX12*
PEX_TXX13
PEX_TXX13*
PEX_TXX14
PEX_TXX14*
PEX_TXX15
PEX_TXX15*

PEX_RX0
PEX_RX0*
PEX_RX1

PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*

PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5

PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*

PEX_PLL_CLK_OUT*
PEX_RST*
PRSNT*
PEX_TRST*
PEX_TCLK
PEX_TDI
PEX_TDO
PEX_TMS

JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*

1

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

1
1
1
1PEX_RX1*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

1
1
1
1
1
1
1
1
1
1
1
1PEX_TX5*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

1PEX_PLL_CLK_OUT
1
1

PEX_VDD

NV_SOURCE_POWER_NET

12V

C90

4.7UF

6.3V
10%
X5R
0603
COMMON

GND

3V3

GND

12V
3V3

GND

PEX_PLLVDD

NV_SOURCE_POWER_NET

12V

3.3VNV_SOURCE_POWER_NET
0V

1.2V

5.5A

3.0A

8.5A

0.16A

600-10455-0002-001

design
LFarasati

DIFFPAIRNV_IMPEDANCE

PEX_REFCLK
PEX_REFCLK

PEX_TXX0
PEX_TXX0
PEX_TXX1
PEX_TXX1
PEX_TXX2
PEX_TXX2
PEX_TXX3
PEX_TXX3
PEX_TXX4
PEX_TXX4
PEX_TXX5
PEX_TXX5
PEX_TXX6
PEX_TXX6
PEX_TXX7
PEX_TXX7
PEX_TXX8
PEX_TXX8
PEX_TXX9
PEX_TXX9
PEX_TXX10
PEX_TXX10
PEX_TXX11
PEX_TXX11
PEX_TXX12
PEX_TXX12
PEX_TXX13
PEX_TXX13
PEX_TXX14
PEX_TXX14
PEX_TXX15
PEX_TXX15

PEX_RX0
PEX_RX0
PEX_RX1
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_RX5
PEX_RX5
PEX_RX6
PEX_RX6
PEX_RX7
PEX_RX7
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_RX15
PEX_RX15

PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX2
PEX_TX2
PEX_TX3
PEX_TX3
PEX_TX4
PEX_TX4
PEX_TX5
PEX_TX5
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7
PEX_TX8
PEX_TX8
PEX_TX9
PEX_TX9
PEX_TX10
PEX_TX10
PEX_TX11
PEX_TX11
PEX_TX12
PEX_TX12
PEX_TX13
PEX_TX13
PEX_TX14
PEX_TX14
PEX_TX15
PEX_TX15

MIN_WIDTHVOLTAGE MAX_CURRENTNET

24MIL
20MIL

16MIL

12MIL

2 OF 24

9-FEB-2006

Page3: MEMORY: GPU Partition A/B

OUT

OUT

OUT

OUT

OUTBIBIBIBIBIBI

3/24 MEM_B

FBB_CMD6

FBB_CMD4
FBB_CMD5

FBB_CMD3

FBB_CMD1
FBB_CMD2

FBB_CMD0

FBB_CMD7

FBB_CMD26

FBB_CMD24
FBB_CMD25

FBB_CMD23

FBB_CMD21
FBB_CMD22

FBB_CMD19
FBB_CMD20

FBB_CMD18

FBB_CMD17

FBB_CMD16

FBB_CMD14
FBB_CMD15

FBB_CMD13

FBB_CMD12

FBB_CMD11

FBB_CMD9

FBB_CMD10

FBB_CMD8

FBB_CLK1

FBB_CLK0
FBB_CLK0
FBB_CLK1

RFU
RFU

FBB_DEBUG

FBB_REFCLK

FBCAL1_PD_VDDQ

FBB_REFCLK

FBCAL1_TERM_GND

FBCAL1_PU_GND

FBB_PLLAVDD

FBB_PLLVDD

FBB_PLLGND

FBBD6

FBBD4
FBBD5

FBBD3

FBBD2

FBBD1

FBBD0

FBBD7

FBBD27

FBBD26

FBBD25

FBBD24

FBBD23

FBBD22

FBBD21

FBBD19
FBBD20

FBBD17

FBBD16

FBBD15

FBBD13

FBBD12

FBBD11

FBBD9
FBBD10

FBBD8

FBBD14

FBBD18

FBBD47

FBBD46

FBBD45

FBBD44

FBBD42
FBBD43

FBBD41

FBBD40

FBBD39

FBBD37
FBBD38

FBBD36

FBBD35

FBBD34

FBBD32
FBBD33

FBBD31

FBBD30

FBBD29

FBBD28

FBBD48

FBBDQM2

FBBDQM1

FBBDQM0

FBBD62
FBBD63

FBBD60
FBBD61

FBBD59

FBBD57
FBBD58

FBBD55
FBBD56

FBBD54

FBBD53

FBBD52

FBBD50
FBBD51

FBBD49

FBBDQS_WP2

FBBDQS_WP1

FBBDQS_WP0

FBBDQS_RN7

FBBDQS_RN4
FBBDQS_RN5
FBBDQS_RN6

FBBDQS_RN3

FBBDQS_RN2

FBBDQS_RN1

FBBDQS_RN0

FBBDQM7

FBBDQM6

FBBDQM4
FBBDQM5

FBBDQM3

FBBDQS_WP3

FB_VREF2

FBBDQS_WP7

FBBDQS_WP6

FBBDQS_WP5

FBBDQS_WP4

BI

OUT

OUT

OUT

OUT

OUT

OUTINOUTBIBIBIBIBIBI

BI

2/24 MEM_A

FBA_CMD0
FBA_CMD2

FBA_CMD1
FBA_CMD3
FBA_CMD5

FBA_CMD4
FBA_CMD6

FBA_CMD7
FBA_CMD8

FBA_CMD10

FBA_CMD9

FBA_CMD11
FBA_CMD12
FBA_CMD13

FBA_CMD15

FBA_CMD14
FBA_CMD16

FBA_CMD17
FBA_CMD18

FBA_CMD20

FBA_CMD19

FBA_CMD22

FBA_CMD21
FBA_CMD23
FBA_CMD25

FBA_CMD24
FBA_CMD26

FBA_CLK1

FBA_CLK1

FBA_CLK0

FBA_CLK0

RFU
RFU

FBA_DEBUG

FBA_REFCLK

FBA_PLLAVDD

FBA_REFCLK

FBA_PLLVDD

FBCAL0_TERM_GND

FBCAL0_PU_GND

FBCAL0_PD_VDDQ

FBA_PLLGND

FBAD0
FBAD1
FBAD2
FBAD3

FBAD5

FBAD4
FBAD6

FBAD7
FBAD8

FBAD10

FBAD9
FBAD11
FBAD13

FBAD12
FBAD14

FBAD15
FBAD16
FBAD17
FBAD18

FBAD20

FBAD19
FBAD21

FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27

FBAD40

FBAD46
FBAD47

FBAD28
FBAD29
FBAD30
FBAD31

FBAD33

FBAD32
FBAD34

FBAD35
FBAD36

FBAD38

FBAD37
FBAD39
FBAD41
FBAD43

FBAD42
FBAD44

FBAD45

FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54

FBAD56

FBAD55
FBAD57

FBAD58

FBAD61
FBAD63

FBAD62

FBADQM0
FBADQM1
FBADQM2

FBAD60

FBAD59

FBADQM3
FBADQM5

FBADQM4
FBADQM6

FBADQM7

FBADQS_RN1

FBADQS_RN0
FBADQS_RN2

FBADQS_RN3

FBADQS_RN6

FBADQS_RN5

FBADQS_RN4

FBADQS_RN7

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4

FBADQS_WP6

FBADQS_WP5
FBADQS_WP7

FB_VREF1

OUTINOUT

BI

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

U8
G71-N-A2

BGA1148

AH35
AH36
AH34
AJ34
AK36
AJ36
AK34
AL34
AH32
AK33
AJ33
AH33
AL33
AN32
AN33
AN31
AE32
AF30
AF32
AE30
AE31
AC30
AC32
AD30
AG36
AG34

AF36
AD36
AD34
AD35
AE34
AP36
AN35
AM34
AP35
AP34
AP33
AT34
AR34
AM22
AM25
AN26
AN24
AK24
AL22
AK23
AM23
AT32
AT33
AR33
AP31
AR30
AT30
AP30
AT29
AP26
AP27
AT25
AP25
AR28
AP28
AT28
AP29

AK35
AF33

AF34
AN34
AM24
AP32
AR27

AL35
AK32
AG33
AE36
AM36
AN22
AR31
AT27

AL36
AL32
AG32
AE35
AN36
AN23
AT31
AT26

J29FB_VREF1

CHANGED

CALIBRATION PIN

FB_CALx_PD_VDDQ

FB_CALx_PU_GND

FB_CALx_TERM_GND

VREF RATIO

DDR3

60

40

40

0.7 FBVDDQ

FBA_CMD<0>

AK28

FBA_CMD<1>

AK29

FBA_CMD<2>

AN30

FBA_CMD<3>

AM27

FBA_CMD<4>

AN28

FBA_CMD<5>

AL29
AM30

FBA_CMD<6>
FBA_CMD<7>

AJ31

FBA_CMD<8>

AK31

FBA_CMD<9>

AH31

FBA_CMD<10>AK25
FBA_CMD<11>

AM26

FBA_CMD<12>

AL31

FBA_CMD<13>

AN29

SNN_FBA_CMD14

AK27

FBA_CMD<15>

AK26

FBA_CMD<16>

AN27

FBA_CMD<17>

AL25

FBA_CMD<18>

AJ30

FBA_CMD<19>

AM31

FBA_CMD<20>

AH30

FBA_CMD<21>

AL30

FBA_CMD<22>

AH29

FBA_CMD<23>

AL28

FBA_CMD<24>

AH28

FBA_CMD<25>

AM28

SNN_FBA_CMD_26AG30
FBA_CLK0

AH26

FBA_CLK0*

AH27

FBA_CLK1

AJ29

FBA_CLK1*

AJ28

SNN_GPU_AJ24

AJ24

SNN_GPU_AH24AH24
FBA_DEBUG

AH25

SNN_FBA_REFCLK

AF28

SNN_FBA_REFCLK*

AG28

FBCAL0_PD_VDDQ

J28

FBCAL0_PU_GND

H28

FBCAL0_TERM_GND

H29

AF29 IS NC FOR G71

FBAB_PLLVDD

AF29

FBAB_PLLAVDD

AD29
AE29

GND

GND

C634
.1UF

10V
10%
X5R
0402
NO STUFF

GND

FBAD<63..0>

FBADQM<7..0>

FBADQS_RN<7..0>

FBADQS_WP<7..0>

FBVDDQ

R598
511

1%
0402
NO STUFF

R597

1.18K

1%
0402
NO STUFF

GND

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

FBAD<0>
FBAD<1>
FBAD<2>
FBAD<3>
FBAD<4>
FBAD<5>
FBAD<6>
FBAD<7>
FBAD<8>
FBAD<9>
FBAD<10>
FBAD<11>
FBAD<12>
FBAD<13>
FBAD<14>
FBAD<15>
FBAD<16>
FBAD<17>
FBAD<18>
FBAD<19>
FBAD<20>
FBAD<21>
FBAD<22>
FBAD<23>
FBAD<24>
FBAD<25>
FBAD<26> AG35
FBAD<27>
FBAD<28>
FBAD<29>
FBAD<30>
FBAD<31>
FBAD<32>
FBAD<33>
FBAD<34>
FBAD<35>
FBAD<36>
FBAD<37>
FBAD<38>
FBAD<39>
FBAD<40>
FBAD<41>
FBAD<42>
FBAD<43>
FBAD<44>
FBAD<45>
FBAD<46>
FBAD<47>
FBAD<48>
FBAD<49>
FBAD<50>
FBAD<51>
FBAD<52>
FBAD<53>
FBAD<54>
FBAD<55>
FBAD<56>
FBAD<57>
FBAD<58>
FBAD<59>
FBAD<60>
FBAD<61>
FBAD<62>
FBAD<63>

FBADQM<0>
FBADQM<1> AM33
FBADQM<2>
FBADQM<3>
FBADQM<4>
FBADQM<5>
FBADQM<6>
FBADQM<7>

FBADQS_RN<0>
FBADQS_RN<1>
FBADQS_RN<2>
FBADQS_RN<3>
FBADQS_RN<4>
FBADQS_RN<5>
FBADQS_RN<6>
FBADQS_RN<7>

FBADQS_WP<0>
FBADQS_WP<1>
FBADQS_WP<2>
FBADQS_WP<3>
FBADQS_WP<4>
FBADQS_WP<5>
FBADQS_WP<6>
FBADQS_WP<7>

PIN IS NC IN G71

9<> 5<>

9> 5<>

9< 5<>

5<>

9>

NO STUFF FOR G71

9<>

DDR3: VREF = 0.7 * FBVDDQ, FBVDDQ = 1.8V

1.26V = 1.8V * 1.18K / (511 + 1.18K)

FBA_CMD<26..0>

0
1
2
3
4
5
6
7
8

9
10
11
12
13

15
16
17
18
19
20
21
22
23
24
25

9>

5<

9>

5<

9>

5<

9>

5<

9<>

TP7

NO STUFF

9<> 3<>

NO STUFF FOR G71

C654 C661 C648
.01UF

16V
10%
X7R
0402
NO STUFF

GND

C655
.01UF

16V
10%
X7R
0402
COMMON

GND

.1UF

10V
10%
X5R
0402
NO STUFF

C660
.1UF

10V
10%
X5R
0402
COMMON

www.vinafix.vn

136BGA CMD Mapping

CMD
CMD0
CMD1 RAS*
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11 WE*
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23

CMD25
CMD26

R603

0402

1%

R600

04021%COMMON

R599

0402

1%

180R@100MHz

LB503

NO STUFF

BEAD_0603

4.7UF

6.3V
10%
X5R
0603
NO STUFF

GND

180R@100MHz

LB502

COMMON

BEAD_0603

C633

4.7UF

6.3V
10%
X5R
0603
COMMON

6<> 9<>

ADDR
A<4>

A<5>
BA1
A<2>
A<4>
A<3>
BA2
CS0*
A<11>
CAS*

BA0
A<5>
A<12>
RST
A<7>
A<10>
CKE
A<0>
A<9>
A<6>
A<2>
A<8>
A<3>CMD24
A<1>
A<13>

9> 5<

9> 6<>

9<>
9<>
9<>

60.4

COMMON

40.2

40.2

COMMON

GND

F3V3

C632

4.7UF

6.3V
10%
X5R
0603
NO STUFF

GND

PEX_VDD

C630

4.7UF

6.3V
10%
X5R
0603
COMMON

GNDGNDGND

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
MEMORY: GPU Partition A/B

FBVDDQ

6<>
9<

6<>

9>

NO STUFF FOR G71

9<>

FBBD<63..0>

FBBDQM<7..0>

FBBDQS_RN<7..0>

FBBDQS_WP<7..0>

C662
.1UF

10V
10%
X5R
0402
NO STUFF

GND

FBVDDQ

GND

R608
511

1%
0402
NO STUFF

R607

1.18K

1%
0402
NO STUFF

U8
G71-N-A2

BGA1148
CHANGED

FBBD<0>

0

FBBD<1>

1

FBBD<2>

2

FBBD<3>

3

FBBD<4>

4

FBBD<5>

5

FBBD<6>

6

FBBD<7>

7

FBBD<8>

8

FBBD<9>

9

FBBD<10>

10

FBBD<11>

11

FBBD<12>

12

FBBD<13>

13

FBBD<14>

14

FBBD<15>

15

FBBD<16>

16

FBBD<17>

17

FBBD<18>

18

FBBD<19>

19

FBBD<20>

20

FBBD<21>

21

FBBD<22>

22

FBBD<23>

23

FBBD<24>

24

FBBD<25>

25

FBBD<26>

26

FBBD<27>

27

FBBD<28>

28

FBBD<29>

29

FBBD<30>

30

FBBD<31>

31

FBBD<32>

32

FBBD<33>

33

FBBD<34>

34

FBBD<35>

35

FBBD<36>

36

FBBD<37>

37

FBBD<38>

38

FBBD<39>

39

FBBD<40>

40

FBBD<41>

41

FBBD<42>

42

FBBD<43>

43

FBBD<44>

44

FBBD<45>

45

FBBD<46>

46

FBBD<47>

47

FBBD<48>

48

FBBD<49>

49

FBBD<50>

50

FBBD<51>

51

FBBD<52>

52

FBBD<53>

53

FBBD<54>

54

FBBD<55>

55

FBBD<56>

56

FBBD<57>

57

FBBD<58>

58

FBBD<59>

59

FBBD<60>

60

FBBD<61>

61

FBBD<62>

62

FBBD<63>

63

FBBDQM<0>

0

FBBDQM<1>

1

FBBDQM<2>

2

FBBDQM<3>

3

FBBDQM<4>

4

FBBDQM<5>

5

FBBDQM<6>

6

FBBDQM<7>

7

FBBDQS_RN<0>

0

FBBDQS_RN<1>

1

FBBDQS_RN<2>

2

FBBDQS_RN<3>

3

FBBDQS_RN<4>

4

FBBDQS_RN<5>

5

FBBDQS_RN<6>

6

FBBDQS_RN<7>

7

FBBDQS_WP<0>

0

FBBDQS_WP<1>

1

FBBDQS_WP<2>

2

FBBDQS_WP<3>

3

FBBDQS_WP<4>

4

FBBDQS_WP<5>

5

FBBDQS_WP<6>

6

FBBDQS_WP<7>

7

FB_VREF2

PIN IS NC IN G71

DDR3: VREF = 0.7 * FBVDDQ, FBVDDQ = 1.8V

1.26V = 1.8V * 1.18K / (511 + 1.18K)

G36
G35
H36
H34
J35
J34
K34 T30
K35
J31
K32
J30
H30
L32
K30
M31
L30
G31
J32
J33
F33
H31
E33
F31
F32
F35
G34
F36
F34
C35
D34
C36
D35
N35
M34
L34
N36
P36
P34
R36
R34

AC33

Y33

Y30
AB30
AA32
AD32
AD33
AA33

T36

R35

T34

U36

W35

U34

V34

W36
AC36
AA36
AC34
AB34
AA35

Y34

Y36

W34

J36

M32

H33

E34

N34

Y32

T35
AA34

L36

K33

G32

E36

M36
AB32

V35
AB35

K36

L33

G33

D36

M35
AB31

V36
AB36

J27

FBB_CMD<0>

P33

FBB_CMD<1>

N33

FBB_CMD<2>

R31

FBB_CMD<3>

U33

FBB_CMD<4>

V30

FBB_CMD<5>

T33

FBB_CMD<6>
FBB_CMD<7>

N32

FBB_CMD<8>

R32

FBB_CMD<9>

P32

FBB_CMD<10>

U32

FBB_CMD<11>

U30

FBB_CMD<12>

P30

FBB_CMD<13>

V31

SNN_FBB_CMD14

T28

FBB_CMD<15>

W30

FBB_CMD<16>

V32

FBB_CMD<17>

T32

FBB_CMD<18>

N30

FBB_CMD<19>

P28

FBB_CMD<20>

P29

FBB_CMD<21>

U29

FBB_CMD<22>

N28

FBB_CMD<23>

R30

FBB_CMD<24>

M30

FBB_CMD<25>

T29

SNN_FBB_CMD26

N29

FBB_CLK0

M28

FBB_CLK0*

L28

FBB_CLK1

W31

FBB_CLK1*

W32

SNN_GPU_R28

R28

SNN_GPU_K29

K29

FBB_DEBUG

C34

SNN_FBB_REFCLK

AA30

SNN_FBB_REFCLK*

Y29

FBCAL1_PD_VDDQ

H27

FBCAL1_PU_GND

H26

FBCAL1_TERM_GND

J26

AB28 IS NC FOR G71

FBAB_PLLVDD

AB28

FBAB_PLLAVDD

AC29
AC28

GND

0
1
2
3
4
5
6
7
8

9
10
11
12
13

15
16
17
18
19
20
21
22
23
24
25

FBB_CMD<26..0>

9>

6<

9>

6<

9>

6<

9>

6<

6< 9>

9<>

TP8

NO STUFF

3<>
3<>

9<>
9<>

3<>

R609

0402

R612

0402

R613

0402

9<>

1%

1%

1%

9<>
9<>
9<>

60.4

NO STUFF

40.2

NO STUFF

40.2

NO STUFF

600-10455-0002-001

design
LFarasati

GND

3 OF 24

9-FEB-2006

FBVDDQ

Page4: MEMORY: GPU Partition C/D

OUT

OUT

OUT

OUT

OUTBIBI

BI

5/24 MEM_D

FBD_CMD6

FBD_CMD4
FBD_CMD5

FBD_CMD3

FBD_CMD2

FBD_CMD1

FBD_CMD0

FBD_CMD7

FBD_CMD26

FBD_CMD24
FBD_CMD25

FBD_CMD21
FBD_CMD22
FBD_CMD23

FBD_CMD20

FBD_CMD19

FBD_CMD18

FBD_CMD17

FBD_CMD16

FBD_CMD15

FBD_CMD14

FBD_CMD13

FBD_CMD12

FBD_CMD11

FBD_CMD9

FBD_CMD10

FBD_CMD8

FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1

RFU
RFU

FBD_REFCLK

FBD_DEBUG

FBD_PLLVDD

FBD_PLLAVDD

FBD_REFCLK

FBD_PLLGND

FBDD6

FBDD5

FBDD4

FBDD3

FBDD2

FBDD1

FBDD0

FBDD7

FBDD27

FBDD26

FBDD24

FBDD23

FBDD22

FBDD19
FBDD20

FBDD18

FBDD17

FBDD16

FBDD14
FBDD15

FBDD13

FBDD12

FBDD11

FBDD9
FBDD10

FBDD8

FBDD25

FBDD21

FBDD47

FBDD46

FBDD45

FBDD44

FBDD43

FBDD42

FBDD39
FBDD41

FBDD40

FBDD37
FBDD38

FBDD35
FBDD36

FBDD34

FBDD32
FBDD33

FBDD31

FBDD30

FBDD29

FBDD28

FBDD48

FBDDQM2

FBDDQM1

FBDDQM0

FBDD63

FBDD62

FBDD60
FBDD61

FBDD59

FBDD58

FBDD57

FBDD55
FBDD56

FBDD54

FBDD53

FBDD52

FBDD51

FBDD50

FBDD49

FBDDQS_WP2

FBDDQS_WP1

FBDDQS_WP0

FBDDQS_RN7

FBDDQS_RN4
FBDDQS_RN5
FBDDQS_RN6

FBDDQS_RN3

FBDDQS_RN2

FBDDQS_RN1

FBDDQS_RN0

FBDDQM7

FBDDQM6

FBDDQM4
FBDDQM5

FBDDQM3

FBDDQS_WP3

FBDDQS_WP7

FBDDQS_WP6

FBDDQS_WP5

FBDDQS_WP4

BI

OUT

OUT

OUT

OUT

OUT

OUTINOUTBIBI

BI

4/24 MEM_C

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20

FBC_CMD23

FBC_CMD22

FBC_CMD21

FBC_CMD25

FBC_CMD24
FBC_CMD26

FBC_CLK1

FBC_CLK0

FBC_CLK1

FBC_CLK0

RFU
RFU

FBC_DEBUG

FBC_REFCLK
FBC_REFCLK

FBC_PLLAVDD

FBC_PLLVDD

FBC_PLLGND

FBCD0
FBCD2
FBCD4
FBCD6

FBCD1
FBCD3
FBCD5
FBCD7

FBCD10
FBCD11

FBCD18

FBCD21

FBCD24

FBCD12

FBCD17

FBCD15

FBCD14

FBCD8
FBCD9

FBCD13

FBCD20

FBCD23

FBCD22

FBCD25
FBCD26
FBCD27

FBCD19

FBCD16

FBCD31

FBCD34
FBCD36
FBCD38

FBCD28
FBCD30

FBCD29

FBCD32

FBCD37

FBCD40
FBCD41

FBCD39

FBCD42
FBCD43
FBCD44

FBCD46

FBCD45
FBCD47

FBCD35

FBCD33

FBCD48

FBCD52

FBCD49
FBCD50
FBCD51

FBCD54

FBCD53

FBCD56

FBCD55

FBCD59

FBCD58

FBCD57

FBCD60
FBCD61

FBCD63

FBCD62

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3

FBCDQM5

FBCDQM4
FBCDQM6

FBCDQM7

FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3

FBCDQS_RN6

FBCDQS_RN5

FBCDQS_RN4

FBCDQS_RN7

FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7

OUTINOUT

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

U8
G71-N-A2

BGA1148

C18
C17
A17
B16
C14
A16
C15
A14
A18
A19
B19
B18
B21
C19
B22
C21
E15
D16
D17
G16
E16
E14
G13
D13
A22
C22

A23
A24
C24
C25
B24
C28
B27
C27
B28
C29
A29
B30
A30
E31
E28
D28
F29
F30
D33
D32
D31
G27
F25
G26
D26
G29
G28
E27
F28
A34
C32
B34
C33
C31
B31
A31
C30

C16
G14

C26
A28
D29
D27
B33

B15
A21
D14
B25
A27
E30
E25
A33

A15
A20
E13
A25
A26
D30
E26
A32

CHANGED

FBC_CMD<0>

F18

FBC_CMD<1>

H20

FBC_CMD<2>

E18

FBC_CMD<3>

E20

FBC_CMD<4>

D23

FBC_CMD<5>

G24
D24

FBC_CMD<6>
FBC_CMD<7>

G23

FBC_CMD<8>

D20

FBC_CMD<9>

E22

FBC_CMD<10>

J21

FBC_CMD<11>

E21

FBC_CMD<12>

G20

FBC_CMD<13>

F22

SNN_FBC_CMD14

H21

FBC_CMD<15>

E17

FBC_CMD<16>

E19

FBC_CMD<17>

D21

FBC_CMD<18>

E23

FBC_CMD<19>

F19

FBC_CMD<20>

E24

FBC_CMD<21>

G21

FBC_CMD<22>

G19

FBC_CMD<23>

G25

FBC_CMD<24>

G18

FBC_CMD<25>

G22

SNN_FBC_CMD_26G17
FBC_CLK0H17

FBC_CLK0*

J16

FBC_CLK1

J24

FBC_CLK1*

H23

SNN_GPU_H24

H24

SNN_GPU_J25J25
FBC_DEBUG

H16

SNN_FBC_REFCLK

F15

SNN_FBC_REFCLK*G15

H13 IS NC FOR G71

FBCD_PLLVDD

H13

FBCD_PLLAVDD

J12
J13

GND

FBCD<63..0>

FBCDQM<7..0>

FBCDQS_RN<7..0>

FBCDQS_WP<7..0>

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

FBCD<0>
FBCD<1>
FBCD<2>
FBCD<3>
FBCD<4>
FBCD<5>
FBCD<6>
FBCD<7>
FBCD<8>
FBCD<9>
FBCD<10>
FBCD<11>
FBCD<12>
FBCD<13>
FBCD<14>
FBCD<15>
FBCD<16>
FBCD<17>
FBCD<18>
FBCD<19>
FBCD<20>
FBCD<21>
FBCD<22>
FBCD<23>
FBCD<24>
FBCD<25>
FBCD<26> C23
FBCD<27>
FBCD<28>
FBCD<29>
FBCD<30>
FBCD<31>
FBCD<32>
FBCD<33>
FBCD<34>
FBCD<35>
FBCD<36>
FBCD<37>
FBCD<38>
FBCD<39>
FBCD<40>
FBCD<41>
FBCD<42>
FBCD<43>
FBCD<44>
FBCD<45>
FBCD<46>
FBCD<47>
FBCD<48>
FBCD<49>
FBCD<50>
FBCD<51>
FBCD<52>
FBCD<53>
FBCD<54>
FBCD<55>
FBCD<56>
FBCD<57>
FBCD<58>
FBCD<59>
FBCD<60>
FBCD<61>
FBCD<62>
FBCD<63>

FBCDQM<0>
FBCDQM<1> C20
FBCDQM<2>
FBCDQM<3>
FBCDQM<4>
FBCDQM<5>
FBCDQM<6>
FBCDQM<7>

FBCDQS_RN<0>
FBCDQS_RN<1>
FBCDQS_RN<2>
FBCDQS_RN<3>
FBCDQS_RN<4>
FBCDQS_RN<5>
FBCDQS_RN<6>
FBCDQS_RN<7>

FBCDQS_WP<0>
FBCDQS_WP<1>
FBCDQS_WP<2>
FBCDQS_WP<3>
FBCDQS_WP<4>
FBCDQS_WP<5>
FBCDQS_WP<6>
FBCDQS_WP<7>

7<> 9<>

7<> 9>

7<> 9<

7<> 9>

FBC_CMD<26..0>

0
1
2
3
4
5
6
7
8

9
10
11
12
13

15
16
17
18
19
20
21
22
23
24
25

9>

7<

9>

7<

9>

7<

9>

7<

9<>

TP6

NO STUFF

9<> 4<>

NO STUFF FOR G71

C760 C761 C765
.01UF

16V
10%
X7R
0402
NO STUFF

GND

C762
.01UF

16V
10%
X7R
0402
COMMON

GND

.1UF

10V
10%
X5R
0402
NO STUFF

GND

C775
.1UF

10V
10%
X5R
0402
COMMON

GND GND

www.vinafix.vn

136BGA CMD Mapping

ADDR

CMD

A<4>CMD0
RAS*CMD1
A<5>

CMD2

BA1

CMD3

A<2>

CMD4

A<4>

CMD5

A<3>

CMD6

BA2

CMD7

CS0*

CMD8

A<11>

CMD9

CAS*

CMD10
CMD11 WE*

BA0

CMD12

A<5>

CMD13

A<12>

CMD14

RST

CMD15

A<7>

CMD16

A<10>

CMD17

CKE

CMD18

A<0>

CMD19

A<9>

CMD20

A<6>

CMD21

A<2>

CMD22

A<8>

CMD23

A<3>

CMD24

A<1>

CMD25

A<13>

CMD26

180R@100MHz

LB504

NO STUFF

BEAD_0603

4.7UF

6.3V
10%
X5R
0603
NO STUFF

GND

180R@100MHz

LB18

CHANGED

BEAD_0603

C781

4.7UF

6.3V
10%
X5R
0603
COMMON

9> 7<

8<> 9<>

8<> 9>

8<>

9<

8<>

9>

F3V3

C780

4.7UF

6.3V
10%
X5R
0603
NO STUFF

GND

PEX_VDD

C62

4.7UF

6.3V
10%
X5R
0603
COMMON

GND

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
MEMORY: GPU Partition C/D

FBDD<63..0>

FBDDQM<7..0>

FBDDQS_RN<7..0>

FBDDQS_WP<7..0>

U8
G71-N-A2

BGA1148
CHANGED

FBD_CMD<0>

FBDD<0>

0

FBDD<1>

1

FBDD<2>

2

FBDD<3>

3

FBDD<4>

4

FBDD<5>

5

FBDD<6>

6

FBDD<7>

7

FBDD<8>

8

FBDD<9>

9

FBDD<10>

10

FBDD<11>

11

FBDD<12>

12

FBDD<13>

13

FBDD<14>

14

FBDD<15>

15

FBDD<16>

16

FBDD<17>

17

FBDD<18>

18

FBDD<19>

19

FBDD<20>

20

FBDD<21>

21

FBDD<22>

22

FBDD<23>

23

FBDD<24>

24

FBDD<25>

25

FBDD<26>

26

FBDD<27>

27

FBDD<28>

28

FBDD<29>

29

FBDD<30>

30

FBDD<31>

31

FBDD<32>

32

FBDD<33>

33

FBDD<34>

34

FBDD<35>

35

FBDD<36>

36

FBDD<37>

37

FBDD<38>

38

FBDD<39>

39

FBDD<40>

40

FBDD<41>

41

FBDD<42>

42

FBDD<43>

43

FBDD<44>

44

FBDD<45>

45

FBDD<46>

46

FBDD<47>

47

FBDD<48>

48

FBDD<49>

49

FBDD<50>

50

FBDD<51>

51

FBDD<52>

52

FBDD<53>

53

FBDD<54>

54

FBDD<55>

55

FBDD<56>

56

FBDD<57>

57

FBDD<58>

58

FBDD<59>

59

FBDD<60>

60

FBDD<61>

61

FBDD<62>

62

FBDD<63>

63

FBDDQM<0>

0

FBDDQM<1>

1

FBDDQM<2>

2

FBDDQM<3>

3

FBDDQM<4>

4

FBDDQM<5>

5

FBDDQM<6>

6

FBDDQM<7>

7

FBDDQS_RN<0>

0

FBDDQS_RN<1>

1

FBDDQS_RN<2>

2

FBDDQS_RN<3>

3

FBDDQS_RN<4>

4

FBDDQS_RN<5>

5

FBDDQS_RN<6>

6

FBDDQS_RN<7>

7

FBDDQS_WP<0>

0

FBDDQS_WP<1>

1

FBDDQS_WP<2>

2

FBDDQS_WP<3>

3

FBDDQS_WP<4>

4

FBDDQS_WP<5>

5

FBDDQS_WP<6>

6

FBDDQS_WP<7>

7

H3
J3
J1
J2
M3
K3
L3 F8
M1
H1
G3
G1
G2
F3
E1
D1
D2
P4
N7
M7
N5
P5
R7
T7
P7
C1
C5
C2
B4
A3
B3
C4
C3
A8
C6
C7
A7
C8
C9
A9
B9

E12

E9

F9
G10
D10
G12
F12
D11

F4

E4

D4

D5

D8

E7

D7

D9
B13
C11
A13
C13
A11
A10
B10
C10

K2

E3

N4

D3

B7
G11

F5
C12

K1

F2

R6

A4

B6
E10

E6
A12

L1

F1

R5

A5

A6
E11

D6
B12

M6

FBD_CMD<1>

G5

FBD_CMD<2>

L7

FBD_CMD<3>

K5

FBD_CMD<4>

J10

FBD_CMD<5>

G8

FBD_CMD<6>
FBD_CMD<7>

G6

FBD_CMD<8>

H6

FBD_CMD<9>

F6

FBD_CMD<10>

K8

FBD_CMD<11>

L5

FBD_CMD<12>

H4

FBD_CMD<13>

G4

SNN_FBD_CMD14

K9

FBD_CMD<15>

L4

FBD_CMD<16>

K4

FBD_CMD<17>

K7

FBD_CMD<18>

G7

FBD_CMD<19>

J4

FBD_CMD<20>

F7

FBD_CMD<21>

J5

FBD_CMD<22>

J6

FBD_CMD<23>

H7

FBD_CMD<24>

L8

FBD_CMD<25>

J7

SNN_FBD_CMD_26

M5

FBD_CLK0

L9

FBD_CLK0*

M9

FBD_CLK1

J9

FBD_CLK1*

J8

SNN_GPU_H10

H10

SNN_GPU_L11

L11

FBD_DEBUG

N8

SNN_FBD_REFCLK

G9

SNN_FBD_REFCLK*

H9

H11 IS NC FOR G71

FBCD_PLLVDD

H11

FBCD_PLLAVDD

J11
H12

GND

0
1
2
3
4
5
6
7
8

9
10
11
12
13

15
16
17
18
19
20
21
22
23
24
25

FBD_CMD<26..0>

8<
8<
8<
8<

9<>

TP5

NO STUFF

4<>
4<>

9>
9>
9>
9>

9<>
9<>

4<> 9<>

9> 8<

600-10455-0002-001

design
LFarasati

4 OF 24

9-FEB-2006

Page5: FBA Partition

OUT

OUTINININOUTININ

OUT

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

OUT

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

ININOUTININININ

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

BIBIBI

BI

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

STUFF CAP FOR G71, 0R FOR G70

3> 9>

FBVDDQ

R566
0

5%
0402
NO STUFF

C578
.01UF

25V
10%
X7R
0402
COMMON

FBA_CLK0_TERM

R563

R562

40.2

40.2

GND

0402

COMMON

3> 9>
3>

9>

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

1%

1%

0402

COMMON

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

FBVDDQ

0LB27

CHANGED

0603

0LB32

CHANGED

0603

9<

9>

3<> 9<>

3> 9>

3<

3>

FBAD<63..0>

FBADQM<7..0>

FBADQS_RN<7..0>

FBADQS_WP<7..0>

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

9<>

9<>
9<>

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

FBA_CMD<26..0>

FBADQM<0>
FBADQM<1>
FBADQM<2>
FBADQM<3>
FBADQM<4>
FBADQM<5>
FBADQM<6>
FBADQM<7>

FBADQS_RN<0>
FBADQS_RN<1>
FBADQS_RN<2>
FBADQS_RN<3>
FBADQS_RN<4>
FBADQS_RN<5>
FBADQS_RN<6>
FBADQS_RN<7>

FBADQS_WP<0>
FBADQS_WP<1>
FBADQS_WP<2>
FBADQS_WP<3>
FBADQS_WP<4>
FBADQS_WP<5>
FBADQS_WP<6>
FBADQS_WP<7>

U11

DDR3BGA136

PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H11
K10

K11

H10

J11
J10

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9

FBA_CMD<22>
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>

GND

FBA_CMD<1>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<8>

FBA_CMD<19>
FBA_CMD<25>

FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<9>

FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<7>

FBA_CMD<18>
FBA_CLK0
FBA_CLK0*

SNN_FBA0_NC1
SNN_FBA0_NC2

FBA_CMD<15>

1
10
11
8

19
25
22
24
0
2
21
16
23
20
17
9

12
3
7

18

15

A9
A4

FBA_ZQ0

GND

R583
10K

5%
0402
COMMON

GND

FBA_VDDA0
FBA_VDDA1

C113
.047UF

16V
10%
X7R
0402
COMMON

R557
10K

5%
0402
COMMON

GND

GND

C102
.047UF

16V
10%
X7R
0402
COMMON

R85
240

5%
0603
COMMON

K12

J12

K1

J1

GND

U11

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

0
1
2
3
4
5
6
7

32
33
34
35
36
37
38
39

FBAD<0>
FBAD<1>
FBAD<2>
FBAD<3>
FBAD<4>
FBAD<5>
FBAD<6>
FBAD<7>

FBADQM<0>
FBADQS_RN<0>

FBAD<32>
FBAD<33>
FBAD<34>
FBAD<35>
FBAD<36>
FBAD<37>
FBAD<38>
FBAD<39>

FBADQM<4>
FBADQS_RN<4>
FBADQS_WP<4>

L10
T10
M10
R11
T11
R10
N11
M11

N10
P10
P11FBADQS_WP<0>

U12

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

L3
R3
T3
M3
M2
N2
T2
R2

N3
P3
P2

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

8
9
10
11
12
13
14
15

40
41
42
43
44
45
46
47

GND

GND

FBA_VREF0
FBA_VREF2

VREF = FBVDDQ * R2/(R1 + R2)

VREF = 0.70 * FBVDDQDDR3:

1.26V = 1.8V * 1.18K/(511 + 1.18K)

FBAD<8>
FBAD<9>
FBAD<10>
FBAD<11>
FBAD<12>
FBAD<13>
FBAD<14>
FBAD<15>

FBADQM<1>
FBADQS_RN<1>
FBADQS_WP<1>

FBAD<40>
FBAD<41>
FBAD<42>
FBAD<43>
FBAD<44>
FBAD<45> G10
FBAD<46>
FBAD<47>

FBADQM<5>
FBADQS_RN<5>
FBADQS_WP<5>

STUFF CAP FOR G71, 0R FOR G70

9>

GND

9>
9>

FBVDDQ

R81
511

R1

1%

0402

COMMON

R79

1.3K

R2

1%

0402

COMMON

GND

U11

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

R3
T2
R2
N2
T3
M3
M2
L3

N3
P3
P2

U12

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

B10
E11
F11
C10
C11

F10
B11

E10
D10
D11

FBVDDQ

R567
0

5%
0402
NO STUFF

C579
.01UF

25V
10%
X7R
0402
COMMON

FBA_CLK1_TERM

R579

R578

40.2

40.2

0402

COMMON

3>
3>

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

C101
.1UF

10V
10%
X5R
0402
COMMON

1%

1%

0402

COMMON

9<>

FBVDDQ

FBVDDQ

R90
511

R1

1%

0402

COMMON

R93

1.3K

R2

1%

0402

COMMON

GND

FBAD<16>

16

FBAD<17>

17

FBAD<18>

18

FBAD<19>

19

FBAD<20>

20

FBAD<21>

21

FBAD<22>

22

FBAD<23>

23

FBADQM<2>
FBADQS_RN<2>

FBAD<48>

48
49

FBAD<50>

50

FBAD<51>

51

FBAD<52>

52

FBAD<53> E2

53

FBAD<54>

54

FBAD<55>

55

FBADQM<6>
FBADQS_RN<6>
FBADQS_WP<6>

F2
G3
F3
C2
E2
C3
B3
B2

E3
D3
D2FBADQS_WP<2>

B3
C3FBAD<49>
F3
C2
F2

B2
G3

E3
D3
D2

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

LB501

LB28

0

CHANGED0603

0

CHANGED0603

9<>

C112
.1UF

10V
10%
X5R
0402
COMMON

U11

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U12

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

9<>
9<>

24
25
26
27
28
29
30
31

56
57
58
59
60
61
62
63

FBVDDQ

9<>

FBAD<24>
FBAD<25>
FBAD<26>
FBAD<27>
FBAD<28>
FBAD<29>
FBAD<30>
FBAD<31>

FBADQM<3>
FBADQS_RN<3>
FBADQS_WP<3>

FBAD<56>
FBAD<57>
FBAD<58>
FBAD<59>
FBAD<60>
FBAD<61>
FBAD<62>
FBAD<63>

FBADQM<7>
FBADQS_RN<7>
FBADQS_WP<7>

U12

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H11
K10

K11

H10

J11
J10

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9

7
8
18
10

5
13
21
20
19
25
4
9
17
6
23
16

3
12
1

11

GND

15

FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<18>
FBA_CMD<10>

FBA_CMD<5>
FBA_CMD<13>

FBA_CMD<21>
FBA_CMD<20>
FBA_CMD<19>
FBA_CMD<25>

FBA_CMD<4>

FBA_CMD<9>
FBA_CMD<17>

FBA_CMD<6>

FBA_CMD<23>
FBA_CMD<16>

FBA_CMD<3>
FBA_CMD<12>
FBA_CMD<1>

FBA_CMD<11>
FBA_CLK1
FBA_CLK1*

SNN_FBA1_NC1
SNN_FBA1_NC2

FBA_CMD<15>

A9

FBA_ZQ1 A4

R86
240

5%
0603
COMMON

GND

C557
.047UF

16V
10%
X7R
0402
COMMON

K12

J12

K1

J1

FBA_VDDA2
FBA_VDDA3

C103
.047UF

16V
10%
X7R
0402
COMMON

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

FBA_VREF1
FBA_VREF3

FBVDDQ

GND

GND

FBA_CMD<4>

FBA_CMD<6>

FBA_CMD<5>

FBA_CMD<13>

FBA_CMD<22>

FBA_CMD<24>

FBA_CMD<0>

FBA_CMD<2>

VREF = FBVDDQ * R2/(R1 + R2)

VREF = 0.70 * FBVDDQ

DDR3:

1.26V = 1.8V * 1.18K/(511 + 1.18K)

FBVDDQ

R89
511

R1

1%

0402

COMMON

R92

1.3K

R2

1%

COMMON

GND

C111
.1UF

10V
X5R

0402
COMMON

9<>

R574

0402

R575

0402

R565

0402

R556

0402

R576

0402

R571

0402

R564

0402

R552

0402

FBVDDQ

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

FBVDDQ

R82
511

R1

1%

0402

COMMON

9<>

R80

1.3K

04020402

COMMON

R2

1%

C104
.1UF

10V
10%10%
X5R
0402
COMMON

GND

GND

Decoupling for FBA 0..31

FBVDDQ

C604

4.7UF

6.3V
10%
X5R
0805
COMMON

C599

4.7UF

6.3V
10%
X5R
0805
COMMON

C551

4.7UF

6.3V
10%
X5R
0805
COMMON

C545

4.7UF

6.3V
10%
X5R
0805
COMMON

C550

.1UF

10V
10%
X5R
0402
COMMON

C589

.1UF

10V
10%
X5R
0402
COMMON

C596

.1UF

10V
10%
X5R
0402
COMMON

C587

4.7UF

6.3V
10%
X5R
0805
COMMON

C554

.1UF

10V
10%

0402
COMMON

C562

.1UF

10V
10%
X5R
0402
COMMON

C585

.022UF

16V
10%
X7R
0402
COMMON

C574

4.7UF

6.3V
10%
X5R
0805
COMMON

GND

C594

4.7UF

6.3V
10%
X5RX5R
0805
COMMON

C553

.1UF

10V
10%
X5R
0402
COMMON

C566

4.7UF

6.3V
10%
X5R
0805
COMMON

C573

.1UF

10V
10%
X5R
0402
COMMON

C556

.022UF

16V
10%
X7R
0402
COMMON

C576

.022UF

16V
10%
X7R
0402
COMMON

C590

.022UF

16V
10%
X7R
0402
COMMON

C572

.022UF

16V
10%
X7R
0402
COMMON

C564

.022UF

16V
10%
X7R
0402
COMMON

C593

.01UF

25V
10%
X7R
0402
COMMON

C544

4.7UF

6.3V
10%
X5R
0805
COMMON

C558

.022UF

16V
10%
X7R
0402
COMMON

C588

.1UF

10V
10%
X5R X5R
0402
COMMON

C559

.1UF

10V
10%
X5R
0402
COMMON

C549

4.7UF

6.3V
10%
X5R
0805
COMMON

C552

4.7UF

6.3V
10%

0805
COMMON

C583

4.7UF

6.3V
10%
X5R
0805
COMMON

C586

.01UF

25V
10%
X7R
0402
COMMON

C591

.01UF

25V
10%
X7R
0402
COMMON

C584

.01UF

25V
10%
X7R
0402
COMMON

C595

4.7UF

6.3V
10%
X5R
0805
COMMON

C561

.022UF

16V
10%
X7R
0402
COMMON

C560

.1UF

10V
10%
X5R
0402
COMMON

C605

4.7UF

6.3V
10%
X5R
0805
COMMON

GND

GND

GND

E11
B11
F11
G10
C10
C11
B10
F10

E10
D10
D11

M11
N11
M10
L10
T10
R11
T11
R10

N10
P10
P11

U11

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U12

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

www.vinafix.vn

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
FBA Partition

600-10455-0002-001

design
LFarasati

5 OF 24

9-FEB-2006

OUT

OUTINININOUTININ

OUT

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

OUT

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

ININININOUTININ

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

BIBIBI

BI

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

Page6: FBB Partition

STUFF CAP FOR G71, 0R FOR G70

FBVDDQ

9>

C616
.01UF

25V
10%
X7R

FBB_CLK0_TERM

0402
COMMON

R591

40.2

9>
9>

GND

1%

0402

COMMON

3>
3>

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

R593

40.2

0402

COMMON

R595
0

5%
0402
NO STUFF

1%

3> 9>

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

FBB_CMD<26..0>

9<>

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

FBVDDQ

9<>
9<>

0LB26

CHANGED

0603

CHANGED

0603

FBBD<63..0>

FBBDQM<7..0>

FBBDQS_RN<7..0>

FBBDQS_WP<7..0>

0

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

9<>

LB29

3<>

3> 9>

3< 9<

3> 9>

U10

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H11
K10

K11

H10

J11
J10

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9

1
10
11
8

19
25
22
24
0
2
21
16
23
20
17
9

12
3
7

18

15

FBB_CMD<1>
FBB_CMD<10>
FBB_CMD<11>
FBB_CMD<8>

FBB_CMD<19>

FBB_CMD<25>
FBB_CMD<22>
FBB_CMD<24>
FBB_CMD<0>
FBB_CMD<2>

FBB_CMD<21>

FBB_CMD<16>

FBB_CMD<23>

FBB_CMD<20>

FBB_CMD<17>

FBB_CMD<9>

FBB_CMD<12>

FBB_CMD<3>

FBB_CMD<7>

FBB_CMD<18>

FBB_CLK0

FBB_CLK0*

SNN_FBB0_NC1
SNN_FBB0_NC2

GND

FBB_CMD<15>

A9
A4FBB_ZQ0

GND

GND

C98
.047UF

16V
10%
X7R
0402
COMMON

R74
240

5%
0603
COMMON

K12

J12

K1

J1

R590
10K

5%
0402
COMMON

GNDGND

FBB_VDDA0
FBB_VDDA1

C100
.047UF

16V
10%
X7R
0402
COMMON

R587
10K

5%
0402
COMMON

GND

L10
R10
M10
R11
T11
T10
M11
N11

N10
P10
P11

L3
R3
T3
M2FBBD<35>

T2
R2
N2

N3
P3
P2

FBBDQM<0>
FBBDQM<1>
FBBDQM<2>
FBBDQM<3>
FBBDQM<4>
FBBDQM<5>
FBBDQM<6>
FBBDQM<7>

FBBDQS_RN<0>
FBBDQS_RN<1>
FBBDQS_RN<2>
FBBDQS_RN<3>
FBBDQS_RN<4>
FBBDQS_RN<5>
FBBDQS_RN<6>
FBBDQS_RN<7>

FBBDQS_WP<0>
FBBDQS_WP<1>
FBBDQS_WP<2>
FBBDQS_WP<3>
FBBDQS_WP<4>
FBBDQS_WP<5>
FBBDQS_WP<6>
FBBDQS_WP<7>

FBBD<0>

0

FBBD<1>

1

FBBD<2>

2

FBBD<3>

3

FBBD<4>

4

FBBD<5>

5

FBBD<6>

6

FBBD<7>

7

FBBDQM<0>
FBBDQS_RN<0>
FBBDQS_WP<0>

FBBD<32>

32

FBBD<33>

33

FBBD<34>

34
35

FBBD<36> M3

36

FBBD<37>

37

FBBD<38>

38

FBBD<39>

39

FBBDQM<4>
FBBDQS_RN<4>
FBBDQS_WP<4>

U10

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U13

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

VREF = FBVDDQ * R2/(R1 + R2)

8
9
10
11
12
13
14
15

40
41
42
43
44
45
46
47

GND

GND

FBB_VREF0
FBB_VREF2

VREF = 0.70 * FBVDDQ

DDR3:

1.26V = 1.8V * 1.18K/(511 + 1.18K)

FBBD<8>
FBBD<9>
FBBD<10>
FBBD<11>
FBBD<12>
FBBD<13>
FBBD<14>
FBBD<15>

FBBDQM<1>
FBBDQS_RN<1>
FBBDQS_WP<1>

FBBD<40>
FBBD<41>
FBBD<42>

FBBD<44>

FBBD<46>
FBBD<47>

FBBDQM<5>
FBBDQS_RN<5>
FBBDQS_WP<5>

STUFF CAP FOR G71, 0R FOR G70

FBVDDQ

9>

C571
.01UF

25V
10%
X7R

FBB_CLK1_TERM

0402
COMMON

GND

3>

9>

3>

9>

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

R577

40.2

1%
0402
COMMON

FBVDDQ

R75
511

R1

1%

0402

COMMON

R76

1.3K

R2

1% 10V

0402

COMMON

C97
.1UF

10%
X5R
0402
COMMON

GND

U10

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

M2
T3
R2
N2
R3
T2
M3
L3

N3
P3
P2

U13

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

F10
E11
F11
B10FBBD<43>
B11
C10FBBD<45>
G10
C11

E10
D10
D11

16
17
18
19
20
21
22
23

48
49
50
51
52
53
54
55

FBBD<16>
FBBD<17>
FBBD<18>
FBBD<19>
FBBD<20>
FBBD<21>
FBBD<22>
FBBD<23>

FBBDQM<2>
FBBDQS_RN<2>
FBBDQS_WP<2>

FBBD<48>
FBBD<49>
FBBD<50>
FBBD<51>
FBBD<52>
FBBD<53>
FBBD<54>
FBBD<55>

FBBDQM<6>
FBBDQS_RN<6>
FBBDQS_WP<6>

9<>

R561
0

5%
0402
NO STUFF

R77
511

0402

COMMON

R78

1.3K

0402

COMMON

FBVDDQ

1%

1%

GND

R573

40.2

1%
0402
COMMON

FBVDDQ

R1

R2

R11
R10
T10
N11
M10
T11
M11
L10

N10
P10
P11

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

LB30

U10

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

G3
C3
B3
E2
F3
C2
B2
F2

E3
D3
D2

U13

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

FBVDDQ

9<>

ZQ = 6x desired outputDDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

9<>
9<>

0LB31

CHANGED

0603

0

CHANGED

0603

9<>

C99
.1UF

10V
10%
X5R
0402
COMMON

24
25
26
27
28
29
30
31

56
57
58
59
60
61
62
63

GND

FBBD<24>
FBBD<25>
FBBD<26>
FBBD<27>
FBBD<28>
FBBD<29>
FBBD<30>
FBBD<31>

FBBDQM<3>
FBBDQS_RN<3>
FBBDQS_WP<3>

FBBD<56>
FBBD<57>
FBBD<58>
FBBD<59>
FBBD<60>
FBBD<61>
FBBD<62>
FBBD<63>

FBBDQM<7>
FBBDQS_RN<7>
FBBDQS_WP<7>

7
8
18
10

5
13
21
20
19
25
4
9
17
6
23
16

3
12
1

11

GND

15

FBB_CMD<7>
FBB_CMD<8>
FBB_CMD<18>
FBB_CMD<10>

FBB_CMD<5>
FBB_CMD<13>

FBB_CMD<21>
FBB_CMD<20>
FBB_CMD<19>
FBB_CMD<25>

FBB_CMD<4>

FBB_CMD<9>
FBB_CMD<17>

FBB_CMD<6>

FBB_CMD<23>
FBB_CMD<16>

FBB_CMD<3>
FBB_CMD<12>
FBB_CMD<1>

FBB_CMD<11>
FBB_CLK1
FBB_CLK1*

SNN_FBB1_NC1
SNN_FBB1_NC2

FBB_CMD<15>

FBB_VDDA2
FBB_VDDA3

C105
.047UF

16V
10%
X7R
0402
COMMON

E11
B11
F11
C11
B10
C10
G10
F10

E10
D10
D11

E2
C2
G3
F2
B3
F3
B2
C3

E3
D3
D2

H11
K10

K11

H10

J11
J10

FBB_ZQ1

R91
240

5%
0603
COMMON

GND

K12

C109
.047UF

16V
10%
X7R
0402
COMMON

J12

U10

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U13

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U13

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9
A9
A4

K1

J1

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

GND

VREF = FBVDDQ * R2/(R1 + R2)

VREF = 0.70 * FBVDDQ

DDR3:

1.26V = 1.8V * 1.18K/(511 + 1.18K)

FBVDDQ

R88
511

R1

1%

0402

COMMON

FBB_CMD<4>

FBB_CMD<6>

FBB_CMD<5>

FBB_CMD<13>

FBB_CMD<22>

FBB_CMD<24>

FBB_CMD<0>

FBB_CMD<2>

R584

0402

R582

0402

R568

0402

R560

0402

R596

0402

R592

0402

R594

0402

R589

0402

COMMON

R84
511

0402

1%

1%

1%

1%

1%

1%

1%

1%

FBVDDQ

1%

121

COMMON

121

COMMON

121

COMMON

121

COMMON

121

COMMON

121

COMMON

121

COMMON

121

COMMON

R1

FBVDDQ

9<>

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

FBB_VREF1
FBB_VREF3

GND

R87

1.3K

0402

COMMON

GND

C110

R2

.1UF

10%
X5R
0402
COMMON

R83

1.3K

R2

1%1% 10V 10V

0402

COMMON

GND

C106
.1UF

10%
X5R
0402
COMMON

Decoupling for FBB 0..31

FBVDDQ

C624

C568

C581

C575

C602

C592

C563

C598

4.7UF

6.3V
10%
X5R
0805
COMMON

C627

4.7UF

6.3V
10%
X5R
0805
COMMON

C567

4.7UF

6.3V
10%
X5R
0805
COMMON

C603

4.7UF

6.3V
10%
X5R
0805
COMMON

C548

.022UF

16V
10%
X7R
0402
COMMON

C555

.1UF

10V
10%
X5R
0402
COMMON

C612

.1UF

10V
10%
X5R
0402
COMMON

C597

.1UF

10V
10%
X5R
0402
COMMON

.1UF

10V
10%
X5R
0402
COMMON

C540

.1UF

10V
10%
X5R
0402
COMMON

C607

.022UF

16V
10%
X7R
0402
COMMON

C622

4.7UF

6.3V
10%
X5R
0805
COMMON

.01UF

16V
10% 10%
X7R
0402
COMMON

C582

4.7UF

6.3V
10%
X5R
0805
COMMON

C610

4.7UF

6.3V
10%
X5R
0805
COMMON

GND

4.7UF

6.3V
X5R

0805
COMMON

C570

.022UF

16V
10%
X7R
0402
COMMON

C601

.022UF

16V
10%
X7R
0402
COMMON

.022UF

16V
10%
X7R
0402
COMMON

C609

.01UF

16V
10%
X7R
0402
COMMON

C613

.022UF

16V
10%
X7R
0402
COMMON

.1UF

10V
10%
X5R
0402
COMMON

C577

.1UF

10V
10%
X5R
0402
COMMON

C628

4.7UF

6.3V
10%
X5R
0805
COMMON

.022UF

16V
10%
X7R
0402
COMMON

C580

4.7UF

6.3V
10%
X5R
0805
COMMON

C600

4.7UF

6.3V
10%
X5R
0805
COMMON

.01UF

25V
10%
X7R
0402
COMMON

C618

.022UF

16V
10%
X7R
0402
COMMON

C606

.1UF

10V
10%
X5R
0402
COMMON

9<>

C569

.01UF

25V
10%
X7R
0402
COMMON

C565

4.7UF

6.3V
10%
X5R
0805
COMMON

C619

.1UF

10V
10%
X5R
0402
COMMON

C543

4.7UF

6.3V
10%
X5R
0805
COMMON

C617

4.7UF

6.3V
10%
X5R
0805
COMMON

C623

.1UF

10V
10%
X5R
0402
COMMON

GND

GND

GND

www.vinafix.vn

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
FBB Partition

600-10455-0002-001

design
LFarasati

6 OF 24

9-FEB-2006

OUT

OUTINININOUTININ

OUT

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

OUT

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

ININININOUTININ

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

BIBIBI

BI

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

Page7: FBC Partition

STUFF CAP FOR G71, OR FOR G70

9>

GND

4>

9>

4>

9>

FBVDDQ

R648
0

5%
0402
NO STUFF

C806
.01UF

25V
10%
X7R
0402
COMMON

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

R647

40.2

0402

COMMON

FBC_CLK0_TERM

1%

R637

40.2

0402

COMMON

1%

4> 9>

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

FBC_CMD<26..0>

9<>

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

9<>

9>

9<

9>

4<>

4>

4<

4>

FBVDDQ

LB22
LB21

0

CHANGED0603

0

CHANGED0603

FBCD<63..0>

FBCDQM<7..0>

FBCDQS_RN<7..0>

FBCDQS_WP<7..0>

9<>
9<>

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

U7

DDR3BGA136

PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H11
K10

K11

H10

J11
J10

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9

1
10
11
8

19
25
22
24
0
2
21
16
23
20
17
9

12
3
7

18

15

FBC_CMD<1>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<8>

FBC_CMD<19>

FBC_CMD<25>
FBC_CMD<22>
FBC_CMD<24>
FBC_CMD<0>
FBC_CMD<2>

FBC_CMD<21>

FBC_CMD<16>

FBC_CMD<23>

FBC_CMD<20>

FBC_CMD<17>

FBC_CMD<9>

FBC_CMD<12>

FBC_CMD<3>

FBC_CMD<7>

FBC_CMD<18>

FBC_CLK0

FBC_CLK0*

SNN_FBC0_NC1
SNN_FBC0_NC2

GND

FBC_CMD<15>

A9
A4

FBC_ZQ0

GND

R614
10K

5%
0402
COMMON

GND

FBC_VDDA0
FBC_VDDA1

C87
.047UF

16V
10%
X7R
0402
COMMON

R618
10K

5%
0402
COMMON

GND

GND

C88
.047UF

16V
10%
X7R
0402
COMMON

R64
240

5%
0603
COMMON

K12

J12

K1

J1

GND

FBCD<0>

0

FBCD<1>

1

FBCD<2>

2

FBCD<3>

3

FBCD<4>

4

FBCDQM<0>
FBCDQM<1>
FBCDQM<2>
FBCDQM<3>
FBCDQM<4>
FBCDQM<5>
FBCDQM<6>
FBCDQM<7>

FBCDQS_RN<0>
FBCDQS_RN<1>
FBCDQS_RN<2>
FBCDQS_RN<3>
FBCDQS_RN<4>
FBCDQS_RN<5>
FBCDQS_RN<6>
FBCDQS_RN<7>

FBCDQS_WP<0>
FBCDQS_WP<1>
FBCDQS_WP<2>
FBCDQS_WP<3>
FBCDQS_WP<4>
FBCDQS_WP<5>
FBCDQS_WP<6>
FBCDQS_WP<7>

5
6
7

32
33
34
35
36
37
38
39

FBCD<5>
FBCD<6>
FBCD<7>

FBCDQM<0>
FBCDQS_RN<0>
FBCDQS_WP<0>

FBCD<32>
FBCD<33>
FBCD<34>
FBCD<35>
FBCD<36>
FBCD<37>
FBCD<38>
FBCD<39>

FBCDQM<4>
FBCDQS_RN<4>
FBCDQS_WP<4>

U7

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

B11
C11
F11
G10
C10
E11
F10
B10

E10
D10
D11

U9

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

M2
R3
T3
M3
L3
N2
R2
T2

N3
P3
P2

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

VREF = FBVDDQ * R2/(R1 + R2)

8
9
10
11
12
13
14
15

40
41
42
43
44
45
46
47

GND

GND

FBC_VREF0
FBC_VREF2

VREF = 0.70 * FBVDDQDDR3:

1.26V = 1.8V * 1.18K/(511K + 1.18K)

FBCD<8>
FBCD<9>
FBCD<10>
FBCD<11>
FBCD<12>
FBCD<13>
FBCD<14>
FBCD<15>

FBCDQM<1>
FBCDQS_RN<1>
FBCDQS_WP<1>

FBCD<40>
FBCD<41>
FBCD<42>
FBCD<43>
FBCD<44>
FBCD<45> G10
FBCD<46>
FBCD<47>

FBCDQM<5>
FBCDQS_RN<5>
FBCDQS_WP<5>

STUFF CAP FOR G71, OR FOR G70

FBVDDQ

9>

C656
.01UF

25V
10%
X7R

FBC_CLK1_TERM

0402
COMMON

R601

GND

4>

9>

4> 9>

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

40.2

1%
0402
COMMON

FBVDDQ

R66
511

R1

1%

0402

COMMON

R68

1.3K

0402

COMMON

R2

1%

C86
.1UF

10V
10%
X5R
0402
COMMON

GND

U7

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

M2
T2
R2
N2
R3
T3
L3
M3

N3
P3
P2

U9

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

B10
E11
F11
C11
B11

F10
C10

E10
D10
D11

16
17
18
19
20
21
22
23

48
49
50
51
52
53
54
55

FBCD<16>
FBCD<17>
FBCD<18>
FBCD<19>
FBCD<20>
FBCD<21>
FBCD<22>
FBCD<23>

FBCDQM<2>
FBCDQS_RN<2>
FBCDQS_WP<2>

FBCD<48>
FBCD<49>
FBCD<50>
FBCD<51>

FBCD<53>
FBCD<54>
FBCD<55>

FBCDQM<6>
FBCDQS_RN<6>

R602
0

5%
0402
NO STUFF

9<>

COMMON

1.3K

COMMON

FBVDDQ

R65
511

1%

0402

R67

1%

0402

R605

40.2

1%
0402
COMMON

GND

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

FBVDDQ

LB25
LB24

R1

C85

U7

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

C2
G3
F3
E2
F2
B2
B3
C3

E3
D3
D2

U9

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

L10
M11
R11
T11
R10FBCD<52>
M10
N11
T10

N10
P10
P11FBCDQS_WP<6>

.1UF

10V
10%
X5R
0402
COMMON

R2

U9

DDR3BGA136

PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H11
K10

K11

H10

J11
J10

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9

FBVDDQ

7
8
18
10

5
13
21
20
19
25
4
9
17
6
23
16

3
12
1

11

GND

15

FBC_CMD<7>
FBC_CMD<8>
FBC_CMD<18>
FBC_CMD<10>

FBC_CMD<5>
FBC_CMD<13>

FBC_CMD<21>
FBC_CMD<20>
FBC_CMD<19>
FBC_CMD<25>

FBC_CMD<4>

FBC_CMD<9>
FBC_CMD<17>

FBC_CMD<6>

FBC_CMD<23>
FBC_CMD<16>

FBC_CMD<3>
FBC_CMD<12>
FBC_CMD<1>

FBC_CMD<11>
FBC_CLK1
FBC_CLK1*

SNN_FBC1_NC1
SNN_FBC1_NC2

FBC_CMD<15>

A9

FBC_VDDA2
FBC_VDDA3

FBC_ZQ1 A4

R73
240

5%
0603
COMMON

GND

C93
.047UF

16V
10%
X7R
0402
COMMON

K12

J12

K1

J1

9<>

9<>
9<>

0

CHANGED0603

0

CHANGED0603

C94
.047UF

16V
10%
X7R
0402
COMMON

9<>

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

FBC_VREF1
FBC_VREF3

GND

GND

R72
511

0402

COMMON

R70

1.3K

COMMON

FBVDDQ

1%

1%

GND

FBC_CMD<4>

FBC_CMD<6>

FBC_CMD<5>

FBC_CMD<13>

FBC_CMD<22>

FBC_CMD<24>

FBC_CMD<0>

FBC_CMD<2>

R1

R611

0402

R610

0402

R604

0402

R606

0402

R635

0402

R629

0402

R631

0402

R639

0402

VREF = FBVDDQ * R2/(R1 + R2)

DDR3:

R71
511

0402

COMMON

9<>

C96

R2

.1UF

10V
X5R

0402
COMMON

R69

1.3K

04020402

COMMON

FBVDDQ

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

VREF = 0.70 * FBVDDQ

1.26V = 1.8V * 1.18K/(511K + 1.18K)

FBVDDQ

R1

1%

C95

R2

1%

.1UF

10V
10%10%
X5R
0402
COMMON

GND

9<>

GND

Decoupling for FBC 0..31

FBVDDQ

C697

4.7UF

6.3V
10%
X5R
0805
COMMON

C831

4.7UF

6.3V
10%
X5R
0805
COMMON

C779

4.7UF

6.3V
10%
X5R
0805
COMMON

C694

4.7UF

6.3V
10%
X5R
0805
COMMON

C640

.01UF

25V
10%
X7R
0402
COMMON

C644

.022UF

16V
10%
X7R
0402
COMMON

C833

.1UF

10V
10%
X5R
0402
COMMON

C818

.1UF

10V
10%
X5R
0402
COMMON

C687

.1UF

10V
10%
X5R X7R
0402
COMMON

C650

.1UF

10V
10%
X5R
0402
COMMON

C842

4.7UF

6.3V
10%
X5R
0805
COMMON

C814

.1UF

10V
10%
X5R
0402
COMMON

GND

C674

.01UF

25V
10%

0402
COMMON

C639

.1UF

10V
10%
X5R
0402
COMMON

C815

.022UF

16V
10%
X7R
0402
COMMON

C646

.022UF

16V
10%
X7R
0402
COMMON

C651

4.7UF

6.3V
10%
X5R
0805
COMMON

C836

4.7UF

6.3V
10%
X5R
0805
COMMON

C643

.022UF

16V
10%
X7R
0402
COMMON

C647

4.7UF

6.3V
10%
X5R
0805
COMMON

C758

4.7UF

6.3V
10%
X5R
0805
COMMON

C638

4.7UF

6.3V
10%
X5R
0805
COMMON

C778

.01UF

25V
10%
X7R
0402
COMMON

C791

.1UF

10V
10%
X5R
0402
COMMON

C703

.022UF

16V
10%
X7R X5R
0402
COMMON

C636

4.7UF

6.3V
10%
X5R
0805
COMMON

C686

4.7UF

6.3V
10%
X5R
0805
COMMON

C649

.1UF

10V
10%

0402
COMMON

C770

.1UF

10V
10%
X5R
0402
COMMON

C789

.022UF

16V
10%
X7R
0402
COMMON

C641

.1UF

10V
10%

0402
COMMON

C777

.022UF

16V
10%
X7R
0402
COMMON

C782

.022UF

16V
10%
X7R
0402
COMMON

C830

.01UF

25V
10%
X7RX5R
0402
COMMON

C822

4.7UF

6.3V
10%
X5R
0805
COMMON

C785

4.7UF

6.3V
10%
X5R
0805
COMMON

GND

GND

GND

24
25
26
27
28
29
30
31

56
57
58
59
60
61
62
63

FBCD<24>
FBCD<25>
FBCD<26>
FBCD<27>
FBCD<28>
FBCD<29>
FBCD<30>
FBCD<31>

FBCDQM<3>
FBCDQS_RN<3>
FBCDQS_WP<3>

FBCD<56>
FBCD<57>
FBCD<58>
FBCD<59>
FBCD<60>
FBCD<61>
FBCD<62>
FBCD<63>

FBCDQM<7>
FBCDQS_RN<7>
FBCDQS_WP<7>

L10
M10
N11
R10
T11
R11
M11
T10

N10
P10
P11

E2
B2
G3
C2
C3
F2
B3
F3

E3
D3
D2

U7

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U9

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

www.vinafix.vn

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
FBC Partition

600-10455-0002-001

design
LFarasati

7 OF 24

9-FEB-2006

OUT

OUTINININOUTININ

OUT

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

OUT

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

ININININOUTININ

MIRRORNONMIRROR

VDD

VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ

VDDQ

VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS

VSS

VSS

VSS

VSS
VSS

VSSQ

VSS

VREF

VREF

VSS

CKE

BA2

CAS

WE

CS

RAS

BA0

BA1

A7

A8/AP

A3

A11

A2

A1

A0

A9

A6

A5

A4

A10

RAS
CAS

A0

CS

WE

A5

A4

A3

A2

A1

A8/AP
A10

A11

BA0
BA1

A7

A6

A9

BA2
CKE

CLK
CLK

NC/RFU
NC/RFU
NC/RFU

MIRROR

RESET

ZQ

VDDA

VDDA

VSSA

VSSA

RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM
RDQS
WDQS

DQ0

DQ4

DQ3

DQ2

DQ1

DQ5
DQ6
DQ7

DQM

BIBIBI

BI

1

5

4

3

2

F G H

PAGE
DATE

SANTA CLARA, CA 95050, USA

2701 SAN TOMAS EXPRESSWAY

NVIDIA CORPORATION

NV_PN

ID
NAME

ED

ASSEMBLY
PAGE DETAIL

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

B C

2

A

1

3

4

5

E GD F HCA B

Page8: FBD Partition

STUFF CAP FOR G71, 0R FOR G70

9>

9>

GND

4>
4> 9>

FBVDDQ

R719
0

5%
0402
NO STUFF

C897
.01UF

25V
10%
X7R
0402
COMMON

FBD_CLK0_TERM

R720

R723

40.2

40.2

0402

COMMON

1%

1%

0402

COMMON

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

9> 4>

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

FBD_CMD<26..0>

9<>

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

9<>

9>

9<

9>

4<>

4>

4<

4>

FBVDDQ

LB16
LB12

CHANGED

0603

CHANGED

0603

FBDD<63..0>

FBDDQM<7..0>

FBDDQS_RN<7..0>

FBDDQS_WP<7..0>

0
0

9<>
9<>

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

0
1
2
3
4
5
6
7

U2

DDR3BGA136

PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H11
K10

K11

H10

J11
J10

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9

1
10
11
8

19
25
22
24
0
2
21
16
23
20
17
9

12
3
7

18

15

FBD_CMD<1>
FBD_CMD<10>
FBD_CMD<11>
FBD_CMD<8>

FBD_CMD<19>

FBD_CMD<25>
FBD_CMD<22>
FBD_CMD<24>
FBD_CMD<0>
FBD_CMD<2>

FBD_CMD<21>

FBD_CMD<16>

FBD_CMD<23>

FBD_CMD<20>

FBD_CMD<17>

FBD_CMD<9>

FBD_CMD<12>

FBD_CMD<3>

FBD_CMD<7>

FBD_CMD<18>

FBD_CLK0

FBD_CLK0*

SNN_FBD0_NC1
SNN_FBD0_NC2

GND

FBD_CMD<15>

A9

FBD_ZQ0 A4

GND

R710
10K

5%
0402
COMMON

GND

FBD_VDDA0
FBD_VDDA1

C29
.047UF

16V
10%
X7R
0402
COMMON

R711
10K

5%
0402
COMMON

GNDGND

C51
.047UF

16V
10%
X7R
0402
COMMON

R21
240

5%
0603
COMMON

K12

J12

K1

J1

GND

C11FBDD<0>
E11
F11
G10
B11
F10
C10
B10

E10
D10
D11

L10
R10
T10
N11
T11

M11
R11

N10
P10
P11

FBDDQM<0>
FBDDQM<1>
FBDDQM<2>
FBDDQM<3>
FBDDQM<4>
FBDDQM<5>
FBDDQM<6>
FBDDQM<7>

FBDDQS_RN<0>
FBDDQS_RN<1>
FBDDQS_RN<2>
FBDDQS_RN<3>
FBDDQS_RN<4>
FBDDQS_RN<5>
FBDDQS_RN<6>
FBDDQS_RN<7>

FBDDQS_WP<0>
FBDDQS_WP<1>
FBDDQS_WP<2>
FBDDQS_WP<3>
FBDDQS_WP<4>
FBDDQS_WP<5>
FBDDQS_WP<6>
FBDDQS_WP<7>

0

FBDD<1>

1

FBDD<2>

2

FBDD<3>

3

FBDD<4>

4

FBDD<5>

5

FBDD<6>

6

FBDD<7>

7

FBDDQM<0>
FBDDQS_RN<0>
FBDDQS_WP<0>

FBDD<32>

32

FBDD<33>

33

FBDD<34>

34

FBDD<35>

35

FBDD<36>

36

FBDD<37> M10

37

FBDD<38>

38

FBDD<39>

39

FBDDQM<4>
FBDDQS_RN<4>
FBDDQS_WP<4>

U2

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U4

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

8
9
10
11
12
13
14
15

40
41
42
43
44
45
46
47

GND

GND

FBD_VREF0
FBD_VREF2

VREF = FBVDDQ * R2/(R1 + R2)

VREF = 0.70 * FBVDDQ

DDR3:

1.26V = 1.8V * 1.18K/(511 + 1.18K)

FBDD<8>
FBDD<9>
FBDD<10>
FBDD<11>
FBDD<12>
FBDD<13>
FBDD<14>
FBDD<15>

FBDDQM<1>
FBDDQS_RN<1>
FBDDQS_WP<1>

FBDD<40>
FBDD<41>
FBDD<42>
FBDD<43>
FBDD<44>
FBDD<45>
FBDD<46>
FBDD<47>

FBDDQM<5>
FBDDQS_RN<5>
FBDDQS_WP<5>

STUFF CAP FOR G71, 0R FOR G70

FBVDDQ

R702
0

5%
0402

9>

C866
.01UF

25V
10%
X7R
0402
COMMON

GND

4>

9>

4>

9>

MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!

Minimize the stub length!!

NO STUFF

FBD_CLK1_TERM

R700

40.2

1%
0402
COMMON

FBVDDQ

R24
511

R1

1%

0402

COMMON

R26

1.3K

0402

COMMON

R2

1%

C50
.1UF

10V
10%
X5R
0402
COMMON

GND

U2

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

N2
T2
R2
R3
T3
M2
L3
M3

N3
P3
P2

U4

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

C10
F11
E11
B11
C11
G10
F10
B10

E10
D10
D11

16
17
18
19
20
21
22
23

48
49
50
51
52
53
54
55

FBDD<16>
FBDD<17>
FBDD<18>
FBDD<19>
FBDD<20>
FBDD<21>
FBDD<22>
FBDD<23>

FBDDQM<2>
FBDDQS_RN<2>
FBDDQS_WP<2>

FBDD<48>
FBDD<49>
FBDD<50>
FBDD<51>
FBDD<52>
FBDD<53>
FBDD<54>
FBDD<55>

FBDDQM<6>
FBDDQS_RN<6>
FBDDQS_WP<6>

9<>

R697

40.2

1%
0402
COMMON

R18
511

0402

COMMON

R20

1.3K

0402

COMMON

FBVDDQ

1%

1%

GND

CMD-Addr Mapping
144 136 ADDR

CMD15 CMD1 RAS*
CMD25 CMD10 CAS*
CMD9 CMD11 WE*
CMD8 CMD8 CS0*
CMD7 CMD7 BA2
CMD1 CMD19 A<0>
CMD3 CMD25 A<1>
CMD2 CMD22 0A<2>
CMD0 CMD24 0A<3>
CMD24 CMD0 0A<4>
CMD22 CMD2 0A<5>
CMD13 CMD4 1A<2>
CMD4 CMD6 1A<3>
CMD5 CMD5 1A<4>
CMD6 CMD13 1A<5>
CMD21 CMD21 A<6>
CMD23 CMD16 A<7>
CMD19 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD16 CMD9 A<11>
CMD10 CMD12 BA0
CMD18 CMD3 BA1
CMD11 CMD18 CKE
CMD12 CMD15 RST

ZQ = 6x desired output

DDR3:

impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm

FBVDDQ

LB17

0603

LB19

0603

R1

C23

U2

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

E2
F3
C3
F2
G3
B2
B3
C2

E3
D3
D2

U4

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

R3
T3
R2
T2
N2
L3
M3
M2

N3
P3
P2

.1UF

10V
10%
X5R
0402
COMMON

R2

0

CHANGED

0

CHANGED

9<>

9<>
9<>

24
25
26
27
28
29
30
31

56
57
58
59
60
61
62
63

FBVDDQ

9<>

FBDD<24>
FBDD<25>
FBDD<26>
FBDD<27>
FBDD<28>
FBDD<29>
FBDD<30>
FBDD<31>

FBDDQM<3>
FBDDQS_RN<3>
FBDDQS_WP<3>

FBDD<56>
FBDD<57>
FBDD<58>
FBDD<59>
FBDD<60>
FBDD<61>
FBDD<62>
FBDD<63>

FBDDQM<7>
FBDDQS_RN<7>
FBDDQS_WP<7>

GND

7
8
18
10

5
13
21
20
19
25
4
9
17
6
23
16

3
12
1

11

GND

15

FBD_CMD<7>
FBD_CMD<8>
FBD_CMD<18>
FBD_CMD<10>

FBD_CMD<5>
FBD_CMD<13>

FBD_CMD<21>
FBD_CMD<20>
FBD_CMD<19>
FBD_CMD<25>

FBD_CMD<4>

FBD_CMD<9>
FBD_CMD<17>

FBD_CMD<6>

FBD_CMD<23>
FBD_CMD<16>

FBD_CMD<3>
FBD_CMD<12>
FBD_CMD<1>

FBD_CMD<11>
FBD_CLK1
FBD_CLK1*

SNN_FBD1_NC1
SNN_FBD1_NC2

FBD_CMD<15>

FBD_VDDA2
FBD_VDDA3

C64
.047UF

16V
10%
X7R
0402
COMMON

M10
T10
L10
M11
T11
R11
N11
R10

N10
P10
P11

B2
C3
C2
B3
E2
G3
F2
F3

E3
D3
D2

H11
K10

K11

H10

J11
J10

FBD_ZQ1 A4

R40
240

5%
0603
COMMON

GND

K12

C55
.047UF

16V
10%
X7R
0402
COMMON

J12

U2

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U4

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

U4

DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
CHANGED

H3
F4
H9
F9

K4
H2
K3
M4
K9

L9
M9

K2
L4

G4
G9

H4

J2
J3
V4

V9
A9

K1

J1

FBVDDQ

F1
M1
A2
V2
A11
V11
F12
M12

A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12

B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12

GND

R31
511

0402

COMMON

FBVDDQ

1%

VREF = FBVDDQ * R2/(R1 + R2)

DDR3:

R1

FBD_CMD<4>

FBD_CMD<6>

FBD_CMD<5>

FBD_CMD<13>

FBD_CMD<22>

FBD_CMD<24>

FBD_CMD<0>

FBD_CMD<2>

VREF = 0.70 * FBVDDQ

1.26V = 1.8V * 1.18K/(511 + 1.18K)

R701

0402

R703

0402

R706

0402

R709

0402

R717

0402

R715

0402

R716

0402

R721

0402

FBVDDQ

R44
511

1%

0402

COMMON

FBVDDQ

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

121

COMMON

1%

R1

9<>

G1
L1
A3
V3
A10
V10
G12
L12

H1
H12

FBD_VREF1
FBD_VREF3

GND

R30

1.3K

R2

1%

0402 0402

COMMON

C56
.1UF

10V
10% 10%
X5R
0402
COMMON

GND

R43

1.3K

COMMON

R2

1%

GND

C71
.1UF

10V
X5R

0402
COMMON

Decoupling for FBD 0..31

FBVDDQ

C864

C855

C854

C863

C874

C867

C859

C876

4.7UF

6.3V
10%
X5R X5R
0805
COMMON

C888

4.7UF

6.3V
10%
X5R
0805
COMMON

C891

4.7UF

6.3V
10%
X5R
0805
COMMON

C871

4.7UF

6.3V
10%
X5R
0805
COMMON

C862

.1UF

10V
10%

0402
COMMON

C869

.022UF

16V
10%
X7R
0402
COMMON

C908

4.7UF

6.3V
10%
X5R
0805
COMMON

C896

.022UF

16V
10%
X7R
0402
COMMON

.1UF

10V
10%
X5R
0402
COMMON

C870

.1UF

10V
10%
X5R
0402
COMMON

C907

.1UF

10V
10%
X5R
0402
COMMON

C884

4.7UF

6.3V
10%
X5R
0805
COMMON

GND

.01UF

25V
10%
X7R
0402
COMMON

C872

.1UF

10V
10%
X5R
0402
COMMON

C883

.022UF

16V
10%
X7R
0402
COMMON

.022UF

16V
10%
X7R
0402
COMMON

C858

4.7UF

6.3V
10%
X5R
0805
COMMON

C865

4.7UF

6.3V
10%
X5R
0805
COMMON

.022UF

16V
10%
X7R X5R
0402
COMMON

C878

.01UF

25V
10%
X7R
0402
COMMON

C873

4.7UF

6.3V
10%
X5R
0805
COMMON

4.7UF

6.3V
10%

0805
COMMON

C851

4.7UF

6.3V
10%
X5R
0805
COMMON

C880

4.7UF

6.3V
10%
X5R
0805
COMMON

.022UF

16V
10%
X7R
0402
COMMON

C890

.1UF

10V
10%
X5R
0402
COMMON

C879

.022UF

16V
10%
X7R
0402
COMMON

.1UF

10V
10%
X5R
0402
COMMON

C903

4.7UF

6.3V
10%
X5R
0805
COMMON

C902

.1UF

10V
10%
X5R
0402
COMMON

9<>

C894

.01UF

25V
10%
X7R
0402
COMMON

C905

4.7UF

6.3V
10%
X5R
0805
COMMON

C901

.1UF

10V
10%
X5R
0402
COMMON

C853

.01UF

25V
10%
X7R
0402
COMMON

C904

.022UF

16V
10%
X7R
0402
COMMON

C887

.1UF

10V
10%
X5R
0402
COMMON

GND

GND

GND

www.vinafix.vn

G71-GS - 256MB-8Mx32 GDDR3, DVI-I-DL + DVI-I-DL + HDTV, 450/700 MHz for Dell HMGA
FBD Partition

600-10455-0002-001

design
LFarasati

8 OF 24

9-FEB-2006