MSI MS-V040 Schematic 10

5

4

3

2

1

MEMORY CHANNEL A

D D

POWER
REGULATION

From +12V

VDDC, MVDD

From +12V LINEAR:

+5V, +5V_VESA,

C C

+5V_VESA2, RageTheater

From +12V DIRECT:

FAN

From +3.3V LINEAR:

VDDC_CT, MPVDD, PVDD,
TPVDD, T2PVDD, TXVDDR,
T2XVDDR, AVDD, A2VDD,
VDD1DI, VDD2DI,
PCIE, VDDR3, VDDR4,
VDDR5, VDDRH

MVDD

DDR2 16M/32Mx16

Straps

BIOS

FAN

MEM A MEM B

DAC2

GPIO

H/V2Sync

DDC2

ROM

XTALIN/OUT

RV530

DAC1

CRT

TVO

XTAL

MPP
VIP

CRT

H/VSync

DDC1

POWER DELIVERY

+PCIE_SOURCE

B B

3.3V_BUS
delayed circuit

+12V_BUS+3.3V

Dual-Link TMDS
Dual-Link LVTM

PCI-Express

HPD1

GPIO14

Resistor
Selecting
Options

MEMORY CHANNEL B

DDR2 16M/32Mx16

Oscillator

TMDS matching

RBG Filters

TVO Filters

XTALIN/OUT

CLKOUT

RageTheater

RBG Filters

TVO/VIVO

HPD

VGA
CONN

CONN

DVI-I

&

Slim-VGA

CONN

SMPS Enable
Circuit

+3.3V_BUS
+12V_BUS

A A

PCI-Express Bus

RV530 DDR2 FH 4-Layer

Micro-Star International Co., LTD.

MS-V040 RV530/DDRII

Size Document Number Rev

C

Friday, September 09, 2005

5

4

3

2

Date:

Sheet of

1

00A

1

19

www.vinafix.vn

8

+12V_BUS

MC1

C1

470uF

10uF

+12V_BUS

+12V_BUS

C2

C3

150nF_16V

D D

+3.3V

+3.3V +3.3V

C C

B B

150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

C4
470uF

C5

C6

1uF_6.3V

1uF_6.3V

LF CAP CER 1UF 10% 6.3V X5R (0402)

Place these caps last,
ideally as close to the bus
connector as possible

7

6

5

4

3

2

1

PCI-EXPRESS EDGE CONNECTOR

+12V_BUS+3.3V +12V_BUS

+3.3V

x16 PCIe

B1

+12V#B1

B2

+12V#B2

B3

DNI

R6 0R

TESTEN(4)

A_HSYNC_DAC1(4,8,15)

PETp10_GFXRp10(3)
PETn10_GFXRn10(3)

PETp11_GFXRp11(3)
PETn11_GFXRn11(3)

PETp12_GFXRp12(3)
PETn12_GFXRn12(3)

PETp13_GFXRp13(3)
PETn13_GFXRn13(3)

PETp14_GFXRp14(3)
PETn14_GFXRn14(3)

PETp15_GFXRp15(3)
PETn15_GFXRn15(3)

R5 0R
R4 0R

PETp0_GFXRp0(3)
PETn0_GFXRn0(3)

PETp1_GFXRp1(3)
PETn1_GFXRn1(3)

PETp2_GFXRp2(3)
PETn2_GFXRn2(3)

PETp3_GFXRp3(3)
PETn3_GFXRn3(3)

PETp4_GFXRp4(3)
PETn4_GFXRn4(3)

PETp5_GFXRp5(3)
PETn5_GFXRn5(3)

PETp6_GFXRp6(3)
PETn6_GFXRn6(3)

PETp7_GFXRp7(3)
PETn7_GFXRn7(3)

PETp8_GFXRp8(3)
PETn8_GFXRn8(3)

PETp9_GFXRp9(3)
PETn9_GFXRn9(3)

PRESENCE

TESTEN_GND
JTAG_TRST#

B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

Mechanical Key

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

MPCIE1

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

PRESENCE

JTAG_TDI
JTAG_TDO

DNI

PERST#

C7

C8

100nF

100nF

CAP, CER 100NF 10% 10V X5R EIA(0402)

C9

C10

100nF

100nF

C11
100nF

C12
100nF

C13

C14

100nF

100nF

C15
100nF

C16
100nF

C17

C18

100nF

100nF

C19
100nF

C20
100nF

C21
100nF

C22
100nF

C23
100nF

C24
100nF

C25

C26

100nF

100nF

C27
100nF

C28
100nF

C29

C30

100nF

100nF

C31
100nF

C32
100nF

C33
100nF

C34
100nF

C35

C36

100nF

100nF

C37
100nF

C38
100nF

R2

0R

R1 0R

PCIE_REFCLKP (3)
PCIE_REFCLKN (3)

GFXTp0_PERp0 (3)
GFXTn0_PERn0 (3)

GFXTp1_PERp1 (3)
GFXTn1_PERn1 (3)

GFXTp2_PERp2 (3)
GFXTn2_PERn2 (3)

GFXTp3_PERp3 (3)
GFXTn3_PERn3 (3)

GFXTp4_PERp4 (3)
GFXTn4_PERn4 (3)

GFXTp5_PERp5 (3)
GFXTn5_PERn5 (3)

GFXTp6_PERp6 (3)
GFXTn6_PERn6 (3)

GFXTp7_PERp7 (3)
GFXTn7_PERn7 (3)

GFXTp8_PERp8 (3)
GFXTn8_PERn8 (3)

GFXTp9_PERp9 (3)
GFXTn9_PERn9 (3)

GFXTp10_PERp10 (3)
GFXTn10_PERn10 (3)

GFXTp11_PERp11 (3)
GFXTn11_PERn11 (3)

GFXTp12_PERp12 (3)
GFXTn12_PERn12 (3)

GFXTp13_PERp13 (3)
GFXTn13_PERn13 (3)

GFXTp14_PERp14 (3)
GFXTn14_PERn14 (3)

GFXTp15_PERp15 (3)
GFXTn15_PERn15 (3)

+3.3V

CAP, CERAMIC 100NF 10% 10V X5R EIA(0402)

C39
100nF

53

1

4

2

U5
TC7SZ08FU

R_RST

R3 0R

Place R_RST in U_RST

PERST#_buf (3,17)

Power Sequence Circuit to ensure SMPS_EN is rele a sed after
+12V_BUS and +3.3V_BUS are both in r egulation.
Pull-up may or may not be required on SMPS_EN signal depending
on SMPS design.

Node 1

When +12V ramps above min Vbe, SMPS_EN w ill be helt low
When +3.3V gets close to regulation, one of the two

A A

8

7

6

Node 2

conditions of releasing SMPS_EN is a c t ive
Target ~ 900mV when +3.3 at min regulation (worse case)

Typical trigger when +3.3V ramps above 2.2V (650mV)
When +12V gets close to regulation, one of the two

Node 3

conditions of releasing SMPS_EN is a c t ive
Target ~ 1.25V when +12 at min regulation (worse case)

Typical trigger when +12V ramps above 10V (1.1V)

5

Micro-Star International Co., LTD.

MS-V040 RV530/DDRII

Size Document Number Rev

C

Friday, September 09, 2005

4

3

Date:

2

SYMBOL LEGEND

DO NOT

DNI

INSTALL
ACTIVE

#

LOW
DIGITAL

GROUND
ANALOG

GROUND

Sheet of

1

0A

2

19

www.vinafix.vn

5

D D

4

3

2

1

NOTE: some of the PCIE testpoints will
be available trought via on traces.

PETp0_GFXRp0(2)
PETn0_GFXRn0(2)

PETp1_GFXRp1(2)
PETn1_GFXRn1(2)

PETp2_GFXRp2(2)
PETn2_GFXRn2(2)

PETp3_GFXRp3(2)
PETn3_GFXRn3(2)

PETp4_GFXRp4(2)
PETn4_GFXRn4(2)

PETp5_GFXRp5(2)
PETn5_GFXRn5(2)

PETp6_GFXRp6(2)

C C

B B

PETn6_GFXRn6(2)

PETp7_GFXRp7(2)
PETn7_GFXRn7(2)

PETp8_GFXRp8(2)
PETn8_GFXRn8(2)

PETp9_GFXRp9(2)
PETn9_GFXRn9(2)

PETp10_GFXRp10(2)
PETn10_GFXRn10(2)

PETp11_GFXRp11(2)
PETn11_GFXRn11(2)

PETp12_GFXRp12(2)

PETp13_GFXRp13(2)
PETn13_GFXRn13(2)

PETp14_GFXRp14(2)
PETn14_GFXRn14(2)

PETp15_GFXRp15(2)
PETn15_GFXRn15(2)

PCIE_REFCLKP(2)
PCIE_REFCLKN(2)

DNIDNI

PERST#_buf(2,17)

R14

R13

51R

51R

402

402

For Tektronix LA only

Place close
to ASIC

TP11

TP12

TP13

TP14

TP19

TP20

TP21

TP22

TP27

TP28

R11

4.7K

402

TP7

TP8

TP9

TP10

TP15

TP16

TP17

TP18

TP23

TP24

TP25

TP26

+3.3V

DNI

AH31

AH30
AG30

AG32
AF32

AF31
AE31

AE30
AD30

AD32
AC32

AC31
AB31

AB30
AA30

AA32

AK28

AG24
AA24

AF24

AJ31

Y32

Y31

W31

W30

V30

V32
U32

U31
T31

T30
R30

R32
P32

P31
N31

AL28

U1A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

Clock

PCIE_REFCLKP
PCIE_REFCLKN

PERSTB
PCIE_TEST

NC

RV530 unfused A11

PART 1 OF 7

P
C
I

­E
X
P
R
E
S
S

I
N
T
E
R
F
A
C
E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Calibration

PCIE_CALRN
PCIE_CALRP

PCIE_CALI

AK27
AJ27

AJ25
AH25

AH28
AG28

AG27
AF27

AF25
AE25

AE28
AD28

AD27
AC27

AC25
AB25

AB28
AA28

AA27
Y27

Y25
W25

W28
V28

V27
U27

U25
T25

T28
R28

R27
P27

AE24
AD24

AB24

GFXTp0_PERp0 (2)
GFXTn0_PERn0 (2)

GFXTp1_PERp1 (2)
GFXTn1_PERn1 (2)

GFXTp2_PERp2 (2)
GFXTn2_PERn2 (2)

GFXTp3_PERp3 (2)
GFXTn3_PERn3 (2)

GFXTp4_PERp4 (2)
GFXTn4_PERn4 (2)

GFXTp5_PERp5 (2)
GFXTn5_PERn5 (2)

GFXTp6_PERp6 (2)
GFXTn6_PERn6 (2)

GFXTp7_PERp7 (2)
GFXTn7_PERn7 (2)

GFXTp8_PERp8 (2)
GFXTn8_PERn8 (2)

GFXTp9_PERp9 (2)
GFXTn9_PERn9 (2)

GFXTp10_PERp10 (2)
GFXTn10_PERn10 (2)

GFXTp11_PERp11 (2)
GFXTn11_PERn11 (2)

GFXTp12_PERp12 (2)
GFXTn12_PERn12 (2)PETn12_GFXRn12(2)

GFXTp13_PERp13 (2)
GFXTn13_PERn13 (2)

GFXTp14_PERp14 (2)
GFXTn14_PERn14 (2)

GFXTp15_PERp15 (2)
GFXTn15_PERn15 (2)

+PCIE

402

R82.0K

402

R9562R

402

R101.47K

A A

Micro-Star International Co., LTD.

MS-V040 RV530/DDRII

Size Document Number Rev

C

Friday, September 09, 2005

5

4

3

2

Date:

Sheet of

1

00A

3

22

www.vinafix.vn

5

4

3

2

1

D D

+T2PVDD

C226

C227

1uF_6.3V

1uF_6.3V

R33

4.7K

402

+3.3V

+3.3V

1uF_6.3V

GND_T2PVSS

C222

C223

1uF_6.3V

CRT1DDCDATA(15)

R34

CRT2DDCDATA(16)

4.7K

402

MR24 10K
R24 10K

Overlap Footprints

R25 499R
R26 499R

CRT1DDCCLK(15)

CRT2DDCCLK(16)

1uF_6.3V

C221

HPD1(15)

TP30

TESTEN

VREFG

XTALIN
XTALOUT

NS15NS_VIA

1 2

NS19NS_VIA

1 2

GND_T2XVSSR

ADDRESS
x100 1100

+T2XVDDR

C225
10uF

TESTEN(2)

C224

1uF_6.3V

402

+3.3V

C C

I2C DEVICE ADDRESS' ON DDC3

DEVICE
LM63

B B

AL18

AM18
AK19

AL19
AL20

AM20

AL21

AM21
AK18

AJ18

AH18
AG18

AJ20

AK20
AE19

AE18
AF20

AE20
AF19
AC21
AC22
AD22
AE21
AD21
AE22

AF22
AF17
AF21
AK17

AJ19
AF18
AH17
AG17
AG19
AH19

AH22
AH23

AH13
AG13

AE12
AF12

AF11

AE13
AF13

AG12
AH12

AG14
AG22

AL26
AM26

AC8

U1B

T2XCM
T2XCP

T2X0M
T2X0P

T2X1M
T2X1P

T2X2M
T2X2P

T2X3M
T2X3P

T2X4M
T2X4P

T2X5M
T2X5P

T2PVDD

T2PVSS
T2XVDDR_1

T2XVDDR_2
T2XVDDR_3
T2XVDDR_4
T2XVDDR_5
T2XVDDR_6
T2XVDDR_7
T2XVDDR_8
T2XVDDR_9

T2XVSSR_1
T2XVSSR_2
T2XVSSR_3
T2XVSSR_4
T2XVSSR_5
T2XVSSR_6
T2XVSSR_7
T2XVSSR_8
T2XVSSR_9
T2XVSSR_10

DDC1DATA
DDC1CLK

DDC2DATA
DDC2CLK

DDC3DATA
DDC3CLK

HPD1

SDA
SCL

DPLUS
DMINUS

PLLTEST
TESTEN

VREFG

XTALIN
XTALOUT

RV530 unfused A11

Integrated
TMDS2

Monitor
Interface

MMI2C

Thermal
Diode

Test

XTAL

PART 2 OF 7

V
I
D
E
O

&

M
U
L
T
I
M
E
D
I
A

Integrated
TMDS

TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4

TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5

DAC / CRT

DAC2 (TV/CRT2)

A2VSSN_1
A2VSSN_2

NC_A2VDDQ

TXCM
TXCP

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TX3M

TX3P

TX4M

TX4P

TX5M

TX5P
TPVDD
TPVSS

HSYNC
VSYNC

RSET

AVDD_1
AVDD_2

AVSSQ

AVSSN_1
AVSSN_2

VDD1DI
VSS1DI

H2SYNC
V2SYNC

COMP

R2SET

A2VDD_1
A2VDD_2

A2VSSQ

VDD2DI
VSS2DI

NS14 NS_VIA

GND_TPVSS

NS13 NS_VIA

GND_TXVSSR

10%

NS8 NS_VIA

NS9 NS_VIA

NS10 NS_VIA

Place close to ASIC

12

12

NS5 NS_VIA

GND_AVSSQ

NS6 NS_VIA

GND_AVSSN

NS7 NS_VIA

GND_VSS1DI

GND_A2VSSN

GND_A2VSSQ

GND_VSS2DI

LF RESISTOR 324R 1% 1/16W EIA(0402)

12

12

12

12

12

12

AL9
AM9

AK10
AL10

AL11
AM11

AL12
AM12

AK9
AJ9

AK11
AJ11

AK12
AJ12

AM8
AL8
AJ6

AK6
AL6
AM6

AJ7
AK7
AL7
AM7
AK8

AK24

R

AM24

G

AL24

B

AJ23
AJ22

AL22
AL25

AM25
AK23

AK25
AJ24

AM23
AL23

AK15

R2

AM15

G2

AL15

B2

AF15
AG15

AJ15

Y

AJ13

C

AH15
AK14
AM16

AL16
AM17

AL17

AK13
AJ16
AJ17

AL14

RSET

+AVDD

GND_AVSSQ

+VDD1DI

R2SET

+A2VDD

C56
10nF

+VDD2DI

C59
10nF

C246

C247

1uF_6.3V

1uF_6.3V

C249

C250

1uF_6.3V

1uF_6.3V

A_R_DAC1 (15)
A_G_DAC1 (15)
A_B_DAC1 (15)

A_HSYNC_DAC1 (2,8,15)
A_VSYNC_DAC1 (8,15)

R31 499R

RESISTOR, 499R 1% 1/16W EIA(0402)

C62
10nF

10V 6.3V

C53
10nF

A_R_DAC2 (16)
A_G_DAC2 (16)
A_B_DAC2 (16)

A_HSYNC_DAC2 (8,16)
A_VSYNC_DAC2 (8,16)

DAC2_Y (16)
DAC2_C (16)
DAC2_COMP (16)

R32 715R

RES EIA(0402) 715R 1% 1/16W

C57
100nF

C60
1uF_6.3V

GND_AVSSQ

C63
100nF

X7R X5R10V
10%402

C54
100nF

GND_A2VSSQ

C58
1uF_6.3V

+TXVDDR

X5R
10%402

C251
10uF

+TPVDD

C64
1uF_6.3V

402

C55
1uF_6.3V

R136 324R

R132 324R

R133 324R

R134 324R

R135 324R

R131 324R

R130 324R

TjXCM (15)
TjXCP (15)

TjX0M (15)
TjX0P (15)

TjX1M (15)
TjX1P (15)

TjX2M (15)
TjX2P (15)

TjX3M (15)
TjX3P (15)

TjX4M (15)
TjX4P (15)

TjX5M (15)
TjX5P (15)

RTCLK(17)

A A

EC82 15PF

EY82
27_MHZ

2 1

EC83 15PF

Change to 10ppm/10ppm p/n 5028270000G

5

4

XTALIN_S

XTALOUT_S

3

MR81 82R

R_RTCLK

R85 0R
MR85 0R

R84

1.0M
MR86 0R
R86 330R

Place R_RTCLK close to XTAL so the
main clock line has shortest stub

XTALIN

XTALOUT

RTXTALIN (17)

RTXTALOUT (17)

R82

51.1R

2

Micro-Star International Co., LTD.

MS-V040 RV530/DDRII

Size Document Number Rev

Date:

Custom

Friday, September 09, 2005

1

4

Sheet of

00A
22

www.vinafix.vn

5

+MVDDQ

C301
1uF_6.3V

C311

D D

C C

B B

1uF_6.3V

C321
1uF_6.3V

C341
10uF

LF CAP CER 10UF 10% 6.3V X5R (0805)

Replace with 4213010600G
CAP CER 10UF 10% 6.3V X5R

(0805)1.4MM MAX THICK
ECN 81137

C302
1uF_6.3V

C312
1uF_6.3V

C322
1uF_6.3V

C342
10uF

C303
1uF_6.3V

C313
1uF_6.3V

C326
1uF_6.3V

C343
10uF

+MVDDQ

NS12 NS_VIA

1 2

GND_PVSS

C305

C304

1uF_6.3V

1uF_6.3V

C315

C314

1uF_6.3V

1uF_6.3V

C328

C327

1uF_6.3V

1uF_6.3V

C345

C344

10uF

10uF

Replace with 5050004800
120R, 300MA EIA(0402)

B54 0R
B55 0R

NS16 NS_VIA

12

GND_VSSRH0

+3.3V

C241
1uF_6.3V

+3.3V

C236
1uF_6.3V

C306
1uF_6.3V

C316
1uF_6.3V

C329
1uF_6.3V

+PVDD

C231
1uF_6.3V

C242
1uF_6.3V

C237
1uF_6.3V

C69
10nF

C307
1uF_6.3V

C317
1uF_6.3V

C330
1uF_6.3V

C308
1uF_6.3V

C318
1uF_6.3V

C232
1uF_6.3V

NS17 NS_VIA

12

GND_VSSRH1

C243
1uF_6.3V

C238
1uF_6.3V

C70
100nF

4

C244
1uF_6.3V

C239
1uF_6.3V

C71
1uF_6.3V

C309
1uF_6.3V

C319
1uF_6.3V

C233
1uF_6.3V

C310
1uF_6.3V

C320
1uF_6.3V

C245
10uF

C234
1uF_6.3V

+PVDD

GND_PVSS

AB10
AC19

AD18
AC20
AD19
AD20

AH14

C1

J1
M1
R1

V1

AA1

A3

P9

J10

N9

P10

A9

Y10

P8
R9

Y9

J11
A21
M10
N10

Y8

J18
J19
K21
A12
H13
A15
J20
J13
K11
K19
A18
L23
K20
K24
L24
H19
A24
K13
J32
A30
C32
F32
L32

A27

F1

A28

E1

AB9
AA9

AJ5

AM5

AL5

AK5
AE2

AE3
AE4
AE5

AJ14

U1E

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_45
VDDR1_46

VDDRH0
VDDRH1

VSSRH0
VSSRH1

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8

VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4

VDDR5_1
VDDR5_2
VDDR5_3
VDDR5_4

PVDD

PVSS

RV530 unfused A11

Clock

Memory I/O

I/O

PART 5 OF 7

Memory

Selected PLL's

3

PCIE_PVSS

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23

BBP_4
BBP_3
BBP_2
BBP_1

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_6
VDDCI_7
VDDCI_8

VDD25_1
VDD25_2
VDD25_3
VDD25_4
VDD25_5
VDD25_6

MPVDD

MPVSS

VDDPLL

V23
N23
P23
U23

W23

N29
N28
N27
N26
N25

AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27

AC11
AC12
P14
U15
W14
W15
R17
R15
V15
V16
T16
U16
T17
U17
V14
R18
T18
V18
P18
P19
R19
W19
AD11

AC14
M23
V10
K18

W10
T14
W17
P16
T23
K14
U19

AC13
AC16
AC18
L10
K22
AA10

A6

A5

AC15

+VDDC

+MPVDD

GND_MPVSS

+VDDPLL

C214
1uF_6.3V

C201
1uF_6.3V

C191
1uF_6.3V

C161
1uF_6.3V

C171
1uF_6.3V

B56 0R

C215
1uF_6.3V

1uF_6.3V

C202
1uF_6.3V

C192
1uF_6.3V

C162
1uF_6.3V

C172
1uF_6.3V

C211
1uF_6.3V

C206
1uF_6.3V

C67

Replace with 5050004800
120R, 300MA EIA(0402)

PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4

PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5

PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8

PCIE_VDDR_12_9
PCIE_VDDR_12_10
PCIE_VDDR_12_11
PCIE_VDDR_12_12
PCIE_VDDR_12_13
PCIE_VDDR_12_14

PCI-Express

P
O
W

Core

E
R

I/0

I/O Internal

100nF

C203
1uF_6.3V

C193
1uF_6.3V

C163
1uF_6.3V

C173
1uF_6.3V

C66

C212
1uF_6.3V

C207
1uF_6.3V

+PCIE

2

+PCIE

C204
1uF_6.3V

GND_PCIE_PVSS

C194
1uF_6.3V

C164
1uF_6.3V

C174
1uF_6.3V

+VDDC

C208
1uF_6.3V

C65

10nF

C213
10uF

22uF_16V

NS18 NS_VIA

C195
1uF_6.3V

C165
1uF_6.3V

C175
1uF_6.3V

C209
1uF_6.3V

+MPVDD

C68

12

C196
1uF_6.3V

C166
1uF_6.3V

C177
1uF_6.3V

C197
1uF_6.3V

C167
1uF_6.3V

C178
1uF_6.3V

+VDDC_CT

C210
10uF

NS11NS_VIA

GND_MPVSS

1

+PCIE

C169
1uF_6.3V

C180
1uF_6.3V

C199
10uF

C170
1uF_6.3V

C200
10uF

C181
10uF

C182
10uF

C183
10uF

C184
10uF

+VDDC

C185
10uF

C198
1uF_6.3V

C168
1uF_6.3V

C179
1uF_6.3V

12

A A

Micro-Star International Co., LTD.

MS-V040 RV530/DDRII

Size Document Number Rev

C

Friday, September 09, 2005

5

4

3

2

Date:

Sheet of

1

00A

5

22

www.vinafix.vn

5

4

3

2

1

RV530 MEMORY CHANNELS A and B

D D

M_MDA[63..0](13)

C C

+MVDDQ

R161
100R

1%

B B

R162
100R

1%

MVREF_0

C351
100nF

M_MDA0
M_MDA1
M_MDA2
M_MDA3
M_MDA4
M_MDA5
M_MDA6
M_MDA7
M_MDA8

M_MDA9
M_MDA10
M_MDA11
M_MDA12
M_MDA13
M_MDA14
M_MDA15
M_MDA16
M_MDA17
M_MDA18
M_MDA19
M_MDA20
M_MDA21
M_MDA22
M_MDA23
M_MDA24
M_MDA25
M_MDA26
M_MDA27
M_MDA28
M_MDA29
M_MDA30
M_MDA31
M_MDA32
M_MDA33
M_MDA34
M_MDA35
M_MDA36
M_MDA37
M_MDA38
M_MDA39
M_MDA40
M_MDA41
M_MDA42
M_MDA43
M_MDA44
M_MDA45
M_MDA46
M_MDA47
M_MDA48
M_MDA49
M_MDA50
M_MDA51
M_MDA52
M_MDA53
M_MDA54
M_MDA55
M_MDA56
M_MDA57
M_MDA58
M_MDA59
M_MDA60
M_MDA61
M_MDA62
M_MDA63

C352
10nF

U1C

M31

DQA_0

M30

DQA_1

L31

DQA_2

L30

DQA_3

H30

DQA_4

G31

DQA_5

G30

DQA_6

F31

DQA_7

M27

DQA_8

M29

DQA_9

L28

DQA_10

L27

DQA_11

J27

DQA_12

H29

DQA_13

G29

DQA_14

G27

DQA_15

M26

DQA_16

L26

DQA_17

M25

DQA_18

L25

DQA_19

J25

DQA_20

G28

DQA_21

H27

DQA_22

H26

DQA_23

F26

DQA_24

G26

DQA_25

H25

DQA_26

H24

DQA_27

H23

DQA_28

H22

DQA_29

J23

DQA_30

J22

DQA_31

E23

DQA_32

D22

DQA_33

D23

DQA_34

E22

DQA_35

E20

DQA_36

F20

DQA_37

D19

DQA_38

D18

DQA_39

B19

DQA_40

B18

DQA_41

C17

DQA_42

B17

DQA_43

C14

DQA_44

B14

DQA_45

C13

DQA_46

B13

DQA_47

D17

DQA_48

E18

DQA_49

E17

DQA_50

F17

DQA_51

E15

DQA_52

E14

DQA_53

F14

DQA_54

D13

DQA_55

H18

DQA_56

H17

DQA_57

G18

DQA_58

G17

DQA_59

G15

DQA_60

G14

DQA_61

H14

DQA_62

J14

DQA_63

C31

MVREFD_0

C30

MVREFS_0

RV530 unfused A11

Channel A

Part 3 of 7

DDR1 DDR2 DDR3

Not usedbidir. strobe

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

MEMORY INTERFACE

A

QSA_0

QSA_1

QSA_2

QSA_3

QSA_4

QSA_5

QSA_6

QSA_7

QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B

bidir. differential strobe

QSA_7B

write stroberead strobe

ODTA0

For DDR2

ODTA1

CLKA0
CLKA0b

CKEA0
RASA0b
CASA0b

WEA0b

CSA0b_0
CSA0b_1

CLKA1
CLKA1b

CKEA1
RASA1b
CASA1b

WEA1b

CSA1b_0
CSA1b_1

D26
F28
D28
D25
E24
E26
D27
F25
C26
B26
D29
B27
E27
E29
B25
C25

H31
J29
J26
G23
E21
B15
D14
J17

J31
K29
K25
F23
D20
B16
D16
H15

K31
K28
K26
G24
D21
C16
D15
J15

F29
D24

D31
E31

B30
B28
C29
B31
B29

C28

B20
C19

C22
B24
B22
B21
B23

C23

M_MAA0
M_MAA1
M_MAA2
M_MAA3
M_MAA4
M_MAA5
M_MAA6
M_MAA7
M_MAA8
M_MAA9
M_MAA10
M_MAA11
M_MAA12

M_MAA14
M_MAA15

M_DQMA#0
M_DQMA#1
M_DQMA#2
M_DQMA#3
M_DQMA#4
M_DQMA#5
M_DQMA#6
M_DQMA#7

M_QSA0
M_QSA1
M_QSA2
M_QSA3
M_QSA4
M_QSA5
M_QSA6
M_QSA7

ODTA0 (13)

CLKA0 (13)
CLKA#0 (13)

CKEA0 (13)
RASA#0 (13)
CASA#0 (13)
WEA#0 (13)
CSA#0_0 (13)

CLKA1 (13)
CLKA#1 (13)

CKEA1 (13)
RASA#1 (13)
CASA#1 (13)
WEA#1 (13)
CSA#1_0 (13)

M_MAA[12..0] (13)

M_MAA[15..14] (13)

M_DQMA#[7..0] (13)

M_QSA[7..0] (13)

+MVDDQ

R165
100R

1%

R166
100R

1%

MVREF_1

C355
100nF

C356
10nF

M_MDB[63..0](14)

R172

R171

4.7K

4.7K

RESISTOR, 4.7K 5% 1/16W EIA(0402)

M_MDB0
M_MDB1
M_MDB2
M_MDB3
M_MDB4
M_MDB5
M_MDB6
M_MDB7
M_MDB8

M_MDB9
M_MDB10
M_MDB11
M_MDB12
M_MDB13
M_MDB14
M_MDB15
M_MDB16
M_MDB17
M_MDB18
M_MDB19
M_MDB20
M_MDB21
M_MDB22

M_MDB24
M_MDB25
M_MDB26
M_MDB27
M_MDB28
M_MDB29
M_MDB30
M_MDB31
M_MDB32
M_MDB33
M_MDB34
M_MDB35
M_MDB36
M_MDB37
M_MDB38
M_MDB39
M_MDB40
M_MDB41
M_MDB42
M_MDB43
M_MDB44
M_MDB45
M_MDB46
M_MDB47
M_MDB48
M_MDB49
M_MDB50
M_MDB51
M_MDB52
M_MDB53
M_MDB54
M_MDB55
M_MDB56
M_MDB57
M_MDB58
M_MDB59
M_MDB60
M_MDB61
M_MDB62
M_MDB63

R169

R170

243R

4.7K

LF RES EIA(0402) 243R 1% 1/16W

U1D

B12

DQB_0

C12

DQB_1

B11

DQB_2

C11

DQB_3

C8

DQB_4

B7

DQB_5

C7

DQB_6

B6

DQB_7

F12

DQB_8

D12

DQB_9

E11

DQB_10

F11

DQB_11

F9

DQB_12

D8

DQB_13

D7

DQB_14

F7

DQB_15

G12

DQB_16

G11

DQB_17

H12

DQB_18

H11

DQB_19

H9

DQB_20

E7

DQB_21

F8

DQB_22

G8

DQB_23

G6

DQB_24

G7

DQB_25

H8

DQB_26

J8

DQB_27

K8

DQB_28

L8

DQB_29

K9

DQB_30

L9

DQB_31

K5

DQB_32

L4

DQB_33

K4

DQB_34

L5

DQB_35

N5

DQB_36

N6

DQB_37

P4

DQB_38

R4

DQB_39

P2

DQB_40

R2

DQB_41

T3

DQB_42

T2

DQB_43

W3

DQB_44

W2

DQB_45

Y3

DQB_46

Y2

DQB_47

T4

DQB_48

R5

DQB_49

T5

DQB_50

T6

DQB_51

V5

DQB_52

W5

DQB_53

W6

DQB_54

Y4

DQB_55

R8

DQB_56

T8

DQB_57

R7

DQB_58

T7

DQB_59

V7

DQB_60

W7

DQB_61

W8

DQB_62

W9

DQB_63

B3

MVREFD_1

C3

MVREFS_1

AA3

DRAM_RST

AA5

TEST_MCLK

AA2

TEST_YCLK

AA7

MEMTEST

RV530 unfused A11

Channel B

Part 4 of 7

MEMORY INTERFACE

B

DDR1 DDR2 DDR3

Not used bidir. strobe

bidir. differential strobe

For DDR2

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8

MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15

DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

QSB_0

QSB_1

QSB_2

QSB_3

QSB_4

QSB_5

QSB_6

QSB_7

QSB_0B
QSB_1B
QSB_2B

read strobe

QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B

write strobe

ODTB0

ODTB1

CLKB0
CLKB0b

CKEB0
RASB0b
CASB0b

WEB0b

CSB0b_0
CSB0b_1

CLKB1
CLKB1b

CKEB1
RASB1b
CASB1b

WEB1b

CSB1b_0
CSB1b_1

G4
E6
E4
H4
J5
G5
F4
H6
G3
G2
D4
F2
F5
D5
H2
H3

B8
D9
G9
K7
M5
V2
W4
T9

B9
D10
H10
K6
N4
U2
U4
V8

B10
E10
G10
J7
M4
U3
V4
V9

D6
J4

B4
B5

C2
E2
D3
B2
D2

E3

N2
P3

L3
J2
L2
M2
K2

K3

M_MAB0
M_MAB1
M_MAB2
M_MAB3
M_MAB4
M_MAB5
M_MAB6
M_MAB7
M_MAB8
M_MAB9
M_MAB10
M_MAB11
M_MAB12

M_MAB14
M_MAB15

M_DQMB#0
M_DQMB#1
M_DQMB#2
M_DQMB#3
M_DQMB#4
M_DQMB#5M_MDB23
M_DQMB#6
M_DQMB#7

M_QSB0
M_QSB1
M_QSB2
M_QSB3
M_QSB4
M_QSB5
M_QSB6
M_QSB7

ODTB0 (14)

CLKB0 (14)
CLKB#0 (14)

CKEB0 (14)
RASB#0 (14)
CASB#0 (14)
WEB#0 (14)
CSB#0_0 (14)

CLKB1 (14)
CLKB#1 (14)

CKEB1 (14)
RASB#1 (14)
CASB#1 (14)
WEB#1 (14)
CSB#1_0 (14)

M_MAB[12..0] (14)

M_MAB[15..14] (14)

M_DQMB#[7..0] (14)

M_QSB[7..0] (14)

A A

Micro-Star International Co., LTD.

MS-V040 RV530/DDRII

Size Document Number Rev

C

Friday, September 09, 2005

5

4

3

2

Date:

Sheet of

1

00A

6

22

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