MSI MS-V023 Schematic 10

P216-A02 DESIGN -- NV43, 128 MB DDR3, VGA, DVI-I, SD/HDTV, VIVO
HGFEDCBA
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PAGE SUMMARY:
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VARIANT ASSEMBLY
BASE
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001 002
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<UNDEFINED>
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<UNDEFINED>
6
<UNDEFINED>
7
<UNDEFINED>
8
<UNDEFINED>
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<UNDEFINED>
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<UNDEFINED>
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<UNDEFINED>
NVPN
600-10216-base-sch 602-10216-0000-200 602-10216-0001-200 602-10216-0002-200 602-10216-0003-200 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
X01
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL TABLE OF CONTENTS & REVISION HISTORY
E GC
www.vinafix.vn
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL NV43-U 500/500MHz 128MB DDR3 8MX32 DVI+VGA+HDTVOUT NV43-U 500/500MHZ 128MB DDR3 8MX32 DVI+VGA+HD/VIVO NV43-U 350/350MHZ 128MB DDR3 8MX32 DVI+VGA+HDTVOUT NV43-U 400/400MHZ 128MB DDR3 8MX32 DVI+VGA+HDTVOUT <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
1
1
1
Sheet of
Sheet of
Sheet of
4
5
00A
00A
00A
22
22
22
3V3
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
3V3AUX
C949
C949 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
GND
C94
C94 .100UF
.100UF
25V
25V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
Place Close to fingers
C95
C95
C916
C916 .1UF
.1UF
10UF
10UF
16V
16V
10V
10V
20%
20%
10%
10%
X5R
X5R
X5R
X5R 0402
0402
1206
1206
COMMON
COMMON
COMMON
COMMON
CN2
CN2
CON_3GIO_164_FINGER
CON_3GIO_164_FINGER
COMMON
12V
3V3
3V3AUX
PRSNT
NTP_PE_PRSNT2_A
NTP_PE_RSVD2
GND
COMMON
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B17
PRSNT2
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
GND
NTP_PE_PRSNT2_B NTP_PE_RSVD3 NTP_PE_RSVD4 NTP_PE_RSVD5
NTP_PE_PRSNT2_C NTP_PE_RSVD6
NTP_PE_RSVD7 NTP_PE_RSVD8
B31
PRSNT2
A19
RSVD
B30
RSVD
A32
RSVD
A20
GND
B21
GND
B22
GND
A23
GND
A24
GND
B25
GND
B26
GND
A27
GND
A28
GND
B29
GND
A31
GND
B32
GND
GND
B48
PRSNT2
A33
RSVD
A34
GND
B35
GND
B36
GND
A37
GND
A38
GND
B39
GND
B40
GND
A41
GND
A42
GND
B43
GND
B44
GND
A45
GND
A46
GND
B47
GND
B49
GND
A49
GND
GND
B81
PRSNT2
A50
RSVD
B82
RSVD
A51
GND
B52
GND
B53
GND
A54
GND
A55
GND
B56
GND
B57
GND
A58
GND
A59
GND
B60
GND
B61
GND
A62
GND
A63
GND
B64
GND
B65
GND
A66
GND
A67
GND
B68
GND
B69
GND
A70
GND
A71
GND
B72
GND
B73
GND
A74
GND
A75
GND
B76
GND
B77
GND
A78
GND
A79
GND
B80
GND
A82
GND
GND
AB D F H
END OF X1
END OF X1
END OF X4
END OF X4
END OF X8
END OF X8
END OF X16
END OF X16
12V
C950
C950 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
TRST* JTAG1
TCLK JTAG2
TDI JTAG3 TDO JTAG4 TMS JTAG5
SMCLK SMDAT
PERST
REFCLK REFCLK
PERP0 PERN0
PETP0 PETN0
PERP1 PERN1
PETP1 PETN1
PERP2 PERN2
PETP2 PETN2
PERP3 PERN3
PETP3 PETN3
PERP4 PERN4
PETP4 PETN4
PERP5 PERN5
PETP5 PETN5
PERP6 PERN6
PETP6 PETN6
PERP7 PERN7
PETP7 PETN7
PERP8 PERN8
PETP8 PETN8
PERP9 PERN9
PETP9 PETN9
PERP10 PERN10
PETP10 PETN10
PERP11 PERN11
PETP11 PETN11
PERP12 PERN12
PETP12 PETN12
PERP13 PERN13
PETP13 PETN13
PERP14 PERN14
PETP14 PETN14
PERP15 PERN15
PETP15 PETN15
C915
C915
C93
C93
.1UF
.1UF
10UF
10UF
16V
16V
16V
16V
10%
10%
20%
20%
X7R
X7R
X5R
X5R
0603
0603
1206
1206 COMMON
COMMON
COMMON
COMMON
GND
NTP_JTAG_TRST*
B9
NTP_JTAG_TCLK
A5
JTAG_TDI_TDO
A6 A7
NTP_JTAG_TMS
A8
this resistor stradles the TDI/TDO pair
NTP_PEX_SMCLK
B5
NTP_PEX_SMDAT
B6
NTP_PEX_WAKE*
B11
WAKE
PEX_PWRGD*
A11
PEX_REFCLK
A13
PEX_REFCLK*
A14
PEX_TXX0
A16
PEX_TXX0*
A17
PEX_RX0
B14
PEX_RX0*
B15
PEX_TXX1
A21
PEX_TXX1*
A22
PEX_RX1
B19
PEX_RX1*
B20
PEX_TXX2
A25
PEX_TXX2*
A26
PEX_RX2
B23
PEX_RX2*
B24
PEX_TXX3
A29
PEX_TXX3*
A30
PEX_RX3
B27
PEX_RX3*
B28
PEX_TXX4
A35
PEX_TXX4*
A36
PEX_RX4
B33
PEX_RX4*
B34
PEX_TXX5
A39
PEX_TXX5*
A40
PEX_RX5
B37
PEX_RX5*
B38
PEX_TXX6
A43
PEX_TXX6*
A44
PEX_RX6
B41
PEX_RX6*
B42
PEX_TXX7
A47
PEX_TXX7*
A48
PEX_RX7
B45
PEX_RX7*
B46
PEX_TXX8
A52
PEX_TXX8*
A53
PEX_RX8
B50
PEX_RX8*
B51
PEX_TXX9
A56
PEX_TXX9*
A57
PEX_RX9
B54
PEX_RX9*
B55
PEX_TXX10
A60
PEX_TXX10*
A61
PEX_RX10
B58
PEX_RX10*
B59
PEX_TXX11
A64
PEX_TXX11*
A65
PEX_RX11
B62
PEX_RX11*
B63
PEX_TXX12
A68
PEX_TXX12*
A69
PEX_RX12
B66
PEX_RX12*
B67
PEX_TXX13
A72
PEX_TXX13*
A73
PEX_RX13
B70
PEX_RX13*
B71
PEX_TXX14
A76
PEX_TXX14*
A77
PEX_RX14
B74
PEX_RX14*
B75
PEX_TXX15
A80
PEX_TXX15*
A81
PEX_RX15
B78
PEX_RX15*
B79
C97
C97 1UF
1UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
R704
R704 0
0
5%
5% 0402
0402 NS
NS
3.5MIL
R7041
R7041
3.5MIL
3.5MIL
0402
0402
0
0
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
COMMON
3.5MIL
3.5MIL
3V3
5
1
2
3
GND
0402
0402
0
0
R7042
R7042
C948
.1UF
C948
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C946
.1UF
C946
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C944
.1UF
C944
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C942
.1UF
C942
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C940
.1UF
C940
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C938
.1UF
C938
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C936
.1UF
C936
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C934
.1UF
C934
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C932
.1UF
C932
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C930
.1UF
C930
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C928
.1UF
C928
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C926
.1UF
C926
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C924
.1UF
C924
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C922
.1UF
C922
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C920
.1UF
C920
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
C918
.1UF
C918
.1UF
0402X5R 10% 10V
0402X5R 10% 10V
16X PCIe Interface
short duration contention possible
3.3V^2/100 = 108mW
U14
U14
UNNAMED_2_R_I543_1
R110
100
R110
100
4
0402
0402
COMMON
COMMON
5%
5%
SC70-5
SC70-5 COMMON
COMMON
1/16W
1/16W
R83 0
R83 0
0402 COMMON
0402 COMMON
5%
5%
BYPASS
TP_PEXCAPD_VDDQ TP_PEXCALPD_GND
R102
04025%COMMON
04025%COMMON
PEX_TEST_PLLCLK_OUT PEX_TEST_PLLCLK_OUT_N
GPU_PEX_REFCLK
GPU_PEX_REFCLK*
C947
.1UF
C947
.1UF
3.5MIL
3.5MIL
0402 10% X5R10V
0402 10% X5R10V
C945.1UF
C945.1UF
0402 10%10V X5R COMMON
0402 10%10V X5R COMMON
C943.1UF
C943.1UF
0402 10%10V X5R COMMON
0402 10%10V X5R COMMON
C941
C941
0402 X5R10%10V
0402 X5R10%10V
C939
C939
0402 X5R10%10V
0402 X5R10%10V
C937
C937
0402 X5R10%10V
0402 X5R10%10V
C935
C935
0402 X5R10%10V
0402 X5R10%10V
C933
C933
0402 X5R10%10V
0402 X5R10%10V
C931
C931
0402 X5R10%10V
0402 X5R10%10V
C929
C929
0402 X5R10%10V
0402 X5R10%10V
C927
C927
0402 X5R10%10V
0402 X5R10%10V
C925
C925
0402 X5R10%10V
0402 X5R10%10V
C923
C923
0402 X5R10%10V
0402 X5R10%10V
C921
C921
0402 X5R10%10V
0402 X5R10%10V
C919
C919
0402 X5R10%10V
0402 X5R10%10V
C917
C917
0402 X5R10%10V
0402 X5R10%10V
COMMON
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
.1UF
.1UF
3.5MIL
3.5MIL
COMMON
COMMON
200R102
200
PEX_TX0 PEX_TX0*
PEX_TX1 PEX_TX1*
PEX_TX2 PEX_TX2*
PEX_TX3 PEX_TX3*
PEX_TX4 PEX_TX4*
PEX_TX5 PEX_TX5*
PEX_TX6 PEX_TX6*
PEX_TX7 PEX_TX7*
PEX_TX8 PEX_TX8*
PEX_TX9 PEX_TX9*
PEX_TX10 PEX_TX10*
PEX_TX11 PEX_TX11*
PEX_TX12 PEX_TX12*
PEX_TX13 PEX_TX13*
PEX_TX14 PEX_TX14*
PEX_TX15 PEX_TX15*
R111
R111 10K
10K
5%
5% 0402
0402 COMMON
COMMON
GND
PEX_PWRGD_BUF*
AH15
AG12 AH13
AM12 AM11
AH14 AJ14
AJ15 AK15
AK13 AK14
AH16 AG16
AM14 AM15
AG17 AH17
AL15 AL16
AG18 AH18
AK16 AK17
AK18 AJ18
AL17 AL18
AJ19 AH19
AM18 AM19
AG20 AH20
AK19 AK20
AG21 AH21
AL20 AL21
AK21 AJ21
AM21 AM22
AJ22 AH22
AK22 AK23
AG23 AH23
AL23 AL24
AK24 AJ24
AM24 AM25
AJ25 AH25
AK25 AK26
AH26 AG26
AL26 AL27
AK27 AJ27
AM27 AM28
AJ28 AH27
AL28 AL29
U11A
U11A
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
1/14 PCI_EXPRESS
1/14 PCI_EXPRESS
PEX_RST
RFU RFU
PEX_TSTCLK_OUT PEX_TSTCLK_OUT
PEX_REFCLK PEX_REFCLK
PEX_TX0 PEX_TX0
PEX_RX0 PEX_RX0
PEX_TX1 PEX_TX1
PEX_RX1 PEX_RX1
PEX_TX2 PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX3 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_TX14
PEX_RX14 PEX_RX14
PEX_TX15 PEX_TX15
PEX_RX15 PEX_RX15
ASSEMBLY PAGE DETAIL
Place near balls
600mA
PEX_IO_VDD
C846
C846 .022UF
.022UF
16V
NVVDD_SENSE GND_SENSE
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
PEX_IO_VDDQ
C849
C849 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
R6295%0
R6295%0
VDD33
PEX_PLL_VDD
VALUES TBD
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
VDD_LP VDD_LP VDD_LP VDD_LP VDD_LP VDD_LP
VDD_SENSE GND_SENSE
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
PEX_PLLAVDD PEX_PLLDVDD
PEX_PLLGND
AD23 AF23 AF24 AF25 AG24 AG25
AC16 AC17 AC21 AC22 AE18 AE21 AE22 AF12 AF18 AF21 AF22
K16
VDD
K17
VDD
N13
VDD
N14
VDD
N16
VDD
N17
VDD
N19
VDD
P13
VDD
P14
VDD
P16
VDD
P17
VDD
P19
VDD
R16
VDD
R17
VDD
T13
VDD
T14
VDD
T15
VDD
T18
VDD
T19
VDD
U13
VDD
U14
VDD
U15
VDD
U18
VDD
U19
VDD
V16
VDD
V17
VDD
W13
VDD
W14
VDD
W16
VDD
W17
VDD
W19
VDD
Y13
VDD
Y14
VDD
Y16
VDD
Y17
VDD
Y19
VDD
Y20
VDD
P20 T20 T23 U20 U23 W20
N20 M21
AC11 AC12 AC24 AD24 AE11 AE12 H7 J7 K7 L10 L7 L8 M10
AF15 AE15 AE16
GND
NTP_GPU_AM10_NC
AM8
NC
NTP_GPU_AM8_NC
AM9
NC
NTP_GPU_AM9_NC
B32
NC
NTP_GPU_B32_NC
J6
NC
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL PCI EXPRESS 16X, NVVDD DECOUPLING CAPS,PEX_IOVDD/Q DECOUPLING CAPS
E GC
VALUES TBD
C747
C747
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C675
C675 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C804
C804
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C773
C773
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
COMMON0402
COMMON0402
C845
C845 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
VALUES TBD
Place near balls
C857
C857 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C780
C780 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C781
C781 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C756
C756 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C796
C796 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C751
C751 .001UF
.001UF
50V
50V 10%
10% X7R
X7R 0402
0402
GND
180mA
Place near balls
20mA
C842
C842 4700PF
4700PF
25V
25V X7R
X7R 0402
0402 COMMON
COMMON
C847
C847 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
Place near balls
COMMON
COMMON
OUT
Place near balls
C826
C826 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C853
C853 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
Place near balls
C833
C833 .1UF
.1UF
10V 10%
10V 10% X5R
X5R 0402
0402 COMMON
COMMON
10%
10%
C786
C786
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C801
C801
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C798
C798 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C762
C762 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C738
C738 4700PF
4700PF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C745
C745 4700PF
4700PF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C831
C831 470PF
470PF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
Place Close to GPU
C848
C848 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C799
C799 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C758
C758
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C746
C746
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
22.2G< 2.5G<>
C825
C825 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C744
C744
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
220R@100MHz
220R@100MHz
LB530
LB530
0805 COMMON
0805 COMMON
C883
C883
4.7UF
4.7UF
6.3V
6.3V X5R
X5R 0603
0603 COMMON
COMMON
C850
C850 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C844
C844 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C854
C854 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
0.02R3A
0.02R3A
10%
10%
Place Close to GPU
C794
C794
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C777
C777 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C727
C727
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C790
C790 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
3V3
LB531
LB531 120R@100MHz
120R@100MHz
NS
NS 0603
0603
C721
C721 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C843
C843 .022UF
.022UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
Place Near BGA
Place Near BGA
220R@100MHz
220R@100MHz
3A
3A
LB9
LB9
0805
0805
C96
C96
4.7UF
4.7UF
6.3V
6.3V X5R
X5R 0603
0603 COMMON
COMMON
150-220R@100MHz
150-220R@100MHz
LB524
LB524
C828
C828
4.7UF
4.7UF
10%6.3V
10%6.3V
X5R
X5R 0603
0603 COMMON
COMMON
PEX1V2
C894
C894
4.7UF
4.7UF
6.3V
6.3V X5R
X5R 0603
0603 COMMON
COMMON
0.02R
0.02R
COMMON
COMMON
10%
10%
GND
C757
C757 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C784
C784 10UF
10UF
6.3V
6.3V 20%
20% X5R
X5R 0805
0805 COMMON
COMMON
C742
C742 10UF
10UF
6.3V
6.3V 20%
20% X5R
X5R 0805
0805 COMMON
COMMON
C797
C797
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
A3V3
LB532
LB532 120R@100MHz
120R@100MHz
COMMON
COMMON 0603
0603
C734
C734 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
GND
GND
0603 COMMON
0603 COMMON
22.2G< 2.3F>
HGFEDCBA
10%
10%
GND
PEX1V2
C908
C908
21.3B< 2.2C>
10UF
10UF
20%
20%
6.3V
6.3V X5R
X5R 0805
0805
21.3G> 2.2C<
COMMON
COMMON
NVVDD
C783
C783 10UF
10UF
6.3V
6.3V 20%
20% X5R
X5R 0805
0805 COMMON
COMMON
C659
C659 .1UF
.1UF
GND
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C769
C769 .1UF
.1UF
GND
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
GND
GND
PEX1V2
GND
C812
C812
4.7UF
4.7UF
6.3V 10%
6.3V 10% X5R
X5R 0603
0603 COMMON
COMMON
NET2A
PEX_REFCLK PEX_REFCLK*
BI
GPU_PEX_REFCLK
BI
GPU_PEX_REFCLK*
BI BI
PEX_TX0
BI
PEX_TX0*
BI
PEX_TX1
BI
PEX_TX1*
BI
PEX_TX2
BI
PEX_TX2*
BI
PEX_TX3
BI
PEX_TX3*
BI
PEX_TX4
BI
PEX_TX4*
BI
PEX_TX5
BI
PEX_TX5*
BI
PEX_TX6
BI
PEX_TX6*
BI
PEX_TX7
BI
PEX_TX7*
BI
PEX_TX8
BI
PEX_TX8*
BI
PEX_TX9
BI
PEX_TX9*
BI
PEX_TX10
BI
PEX_TX10*
BI
PEX_TX11
BI
PEX_TX11*
BI
PEX_TX12
BI
PEX_TX12*
BI
PEX_TX13
BI
PEX_TX13*
BI
PEX_TX14
BI
PEX_TX14*
BI
PEX_TX15
BI
PEX_TX15*
BI
PEX_TXX0 PEX_TXX0*
BI
PEX_TXX1
BI
PEX_TXX1*
BI
PEX_TXX2
BI
PEX_TXX2*
BI
PEX_TXX3
BI
PEX_TXX3*
BI
PEX_TXX4
BI
PEX_TXX4*
BI
PEX_TXX5
BI
PEX_TXX5*
BI
PEX_TXX6
BI
PEX_TXX6*
BI
PEX_TXX7
BI
PEX_TXX7*
BI
PEX_TXX8
BI
PEX_TXX8*
BI
PEX_TXX9
BI
PEX_TXX9*
BI
PEX_TXX10
BI
PEX_TXX10*
BI
PEX_TXX11
BI
PEX_TXX11*
BI
PEX_TXX12
BI
PEX_TXX12*
BI
PEX_TXX13
BI
PEX_TXX13*
BI
PEX_TXX14
BI
PEX_TXX14*
BI
PEX_TXX15
BI
PEX_TXX15*
BI BI
PEX_RX0
BI
PEX_RX0*
BI
PEX_RX1
BI
PEX_RX1*
BI
PEX_RX2
BI
PEX_RX2*
BI
PEX_RX3
BI
PEX_RX3*
BI
PEX_RX4
BI
PEX_RX4*
BI
PEX_RX5
BI
PEX_RX5*
BI
PEX_RX6
BI
PEX_RX6*
BI
PEX_RX7
BI
PEX_RX7*
BI
PEX_RX8
BI
PEX_RX8*
BI
PEX_RX9
BI
PEX_RX9*
BI
PEX_RX10
BI
PEX_RX10*
BI
PEX_RX11
BI
PEX_RX11*
BI
PEX_RX12
BI
PEX_RX12*
BI
PEX_RX13
BI
PEX_RX13*
BI
PEX_RX14
BI
PEX_RX14*
BI
PEX_RX15
BI
PEX_RX15*
BI
NVVDD_SENSE
BI
GND_SENSE
BI
BI
GND
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
DIFFPAIR
NET_SPACING_RULE
20MIL_G2G_30MIL_USER_DIFFPEX_REFCLK
GPU_PEX_REFCLK 20MIL_G2G_30MIL_USER_DIFF GPU_PEX_REFCLK 20MIL_G2G_30MIL_USER_DIFF
PEX_TX0 20MIL_G2G_30MIL_USER_DIFF PEX_TX0 20MIL_G2G_30MIL_USER_DIFF
PEX_TX5 20MIL_G2G_30MIL_USER_DIFF
PEX_TX7 20MIL_G2G_30MIL_USER_DIFF
PEX_TX8 20MIL_G2G_30MIL_USER_DIFF PEX_TX9 20MIL_G2G_30MIL_USER_DIFF
PEX_TX13 20MIL_G2G_30MIL_USER_DIFF
PEX_TXX7 20MIL_G2G_30MIL_USER_DIFF PEX_TXX7 20MIL_G2G_30MIL_USER_DIFF
PEX_TXX8 20MIL_G2G_30MIL_USER_DIFF PEX_TXX9 20MIL_G2G_30MIL_USER_DIFF
PEX_TXX10 20MIL_G2G_30MIL_USER_DIFF
PEX_TXX11 20MIL_G2G_30MIL_USER_DIFF
PEX_TXX12 20MIL_G2G_30MIL_USER_DIFF PEX_TXX13 20MIL_G2G_30MIL_USER_DIFF
PEX_TXX14 20MIL_G2G_30MIL_USER_DIFF PEX_TXX14 20MIL_G2G_30MIL_USER_DIFF
PEX_RX0 20MIL_G2G_30MIL_USER_DIFF
PEX_RX8 20MIL_G2G_30MIL_USER_DIFF PEX_RX9 20MIL_G2G_30MIL_USER_DIFF PEX_RX9 20MIL_G2G_30MIL_USER_DIFF PEX_RX10 20MIL_G2G_30MIL_USER_DIFF PEX_RX10 20MIL_G2G_30MIL_USER_DIFF
PEX_RX15 20MIL_G2G_30MIL_USER_DIFF PEX_RX15 20MIL_G2G_30MIL_USER_DIFF
PEX_PLL_VDD
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
20MIL_G2G_30MIL_USER_DIFFPEX_REFCLK
20MIL_G2G_30MIL_USER_DIFFPEX_TX1 20MIL_G2G_30MIL_USER_DIFFPEX_TX1 20MIL_G2G_30MIL_USER_DIFFPEX_TX2 20MIL_G2G_30MIL_USER_DIFFPEX_TX2 20MIL_G2G_30MIL_USER_DIFFPEX_TX3 20MIL_G2G_30MIL_USER_DIFFPEX_TX3 20MIL_G2G_30MIL_USER_DIFFPEX_TX4 20MIL_G2G_30MIL_USER_DIFFPEX_TX4
20MIL_G2G_30MIL_USER_DIFFPEX_TX5 20MIL_G2G_30MIL_USER_DIFFPEX_TX6 20MIL_G2G_30MIL_USER_DIFFPEX_TX6 20MIL_G2G_30MIL_USER_DIFFPEX_TX7
20MIL_G2G_30MIL_USER_DIFFPEX_TX8
20MIL_G2G_30MIL_USER_DIFFPEX_TX9 20MIL_G2G_30MIL_USER_DIFFPEX_TX10 20MIL_G2G_30MIL_USER_DIFFPEX_TX10 20MIL_G2G_30MIL_USER_DIFFPEX_TX11 20MIL_G2G_30MIL_USER_DIFFPEX_TX11 20MIL_G2G_30MIL_USER_DIFFPEX_TX12 20MIL_G2G_30MIL_USER_DIFFPEX_TX12
20MIL_G2G_30MIL_USER_DIFFPEX_TX13 20MIL_G2G_30MIL_USER_DIFFPEX_TX14 20MIL_G2G_30MIL_USER_DIFFPEX_TX14 20MIL_G2G_30MIL_USER_DIFFPEX_TX15 20MIL_G2G_30MIL_USER_DIFFPEX_TX15
20MIL_G2G_30MIL_USER_DIFFPEX_TXX0 20MIL_G2G_30MIL_USER_DIFFPEX_TXX0 20MIL_G2G_30MIL_USER_DIFFPEX_TXX1 20MIL_G2G_30MIL_USER_DIFFPEX_TXX1 20MIL_G2G_30MIL_USER_DIFFPEX_TXX2 20MIL_G2G_30MIL_USER_DIFFPEX_TXX2 20MIL_G2G_30MIL_USER_DIFFPEX_TXX3 20MIL_G2G_30MIL_USER_DIFFPEX_TXX3 20MIL_G2G_30MIL_USER_DIFFPEX_TXX4 20MIL_G2G_30MIL_USER_DIFFPEX_TXX4 20MIL_G2G_30MIL_USER_DIFFPEX_TXX5 20MIL_G2G_30MIL_USER_DIFFPEX_TXX5 20MIL_G2G_30MIL_USER_DIFFPEX_TXX6 20MIL_G2G_30MIL_USER_DIFFPEX_TXX6
20MIL_G2G_30MIL_USER_DIFFPEX_TXX8
20MIL_G2G_30MIL_USER_DIFFPEX_TXX9
20MIL_G2G_30MIL_USER_DIFFPEX_TXX10 20MIL_G2G_30MIL_USER_DIFFPEX_TXX11
20MIL_G2G_30MIL_USER_DIFFPEX_TXX12
20MIL_G2G_30MIL_USER_DIFFPEX_TXX13
20MIL_G2G_30MIL_USER_DIFFPEX_TXX15 20MIL_G2G_30MIL_USER_DIFFPEX_TXX15
20MIL_G2G_30MIL_USER_DIFFPEX_RX0 20MIL_G2G_30MIL_USER_DIFFPEX_RX1 20MIL_G2G_30MIL_USER_DIFFPEX_RX1 20MIL_G2G_30MIL_USER_DIFFPEX_RX2 20MIL_G2G_30MIL_USER_DIFFPEX_RX2 20MIL_G2G_30MIL_USER_DIFFPEX_RX3 20MIL_G2G_30MIL_USER_DIFFPEX_RX3 20MIL_G2G_30MIL_USER_DIFFPEX_RX4 20MIL_G2G_30MIL_USER_DIFFPEX_RX4 20MIL_G2G_30MIL_USER_DIFFPEX_RX5 20MIL_G2G_30MIL_USER_DIFFPEX_RX5 20MIL_G2G_30MIL_USER_DIFFPEX_RX6 20MIL_G2G_30MIL_USER_DIFFPEX_RX6 20MIL_G2G_30MIL_USER_DIFFPEX_RX7 20MIL_G2G_30MIL_USER_DIFFPEX_RX7 20MIL_G2G_30MIL_USER_DIFFPEX_RX8
20MIL_G2G_30MIL_USER_DIFFPEX_RX11 20MIL_G2G_30MIL_USER_DIFFPEX_RX11 20MIL_G2G_30MIL_USER_DIFFPEX_RX12 20MIL_G2G_30MIL_USER_DIFFPEX_RX12 20MIL_G2G_30MIL_USER_DIFFPEX_RX13 20MIL_G2G_30MIL_USER_DIFFPEX_RX13 20MIL_G2G_30MIL_USER_DIFFPEX_RX14 20MIL_G2G_30MIL_USER_DIFFPEX_RX14
MIN_LINE_WIDTH
10MIL 10MIL
10MIL
Sheet of
Sheet of
Sheet of
1
2
3
4
5
00A
00A
00A
2
22
2
22
2
22
www.vinafix.vn
HGFEDCBA
4.4B<> 4.1G<> <<<4,6>>>
1
2
4.4B<> 4.1G<> <<<4,6>>>
3
4.5B<> 4.1G<> <<<4,6>>>
4.4B<> 4.1G<> <<<4,6>>>
FBVDD
4
Rtop
COMMON
COMMON
1%
1%
0402
0402
R602 1K
R602 1K
Rbot
COMMON0402
COMMON0402 1%
1%
R607 1K
R607 1K
GND
5
BI
OUT
BI
BI
C652
C652 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 NS
NS
C660
C660 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
VREF = 0.70 * FBVDDQ
DDR3:
1.26V = 1.8V * 2.7K/(1.15K + 2.7K)
FBAD[63..0]
FBADQM[7..0]
FBADQS_WP[7..0]
FBADQS_RN[7..0]
U11B
U11B
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
FBAD0
0
FBAD1
1
FBAD2
2
FBAD3
3
FBAD4
4
FBAD5
5
FBAD6
6
FBAD7
7
FBAD8
8
FBAD9
9
FBAD10
10
FBAD11
11
FBAD12
12
FBAD13
13
FBAD14
14
FBAD15
15
FBAD16
16
FBAD17
17
FBAD18
18
FBAD19
19
FBAD20
20
FBAD21
21
FBAD22
22
FBAD23
23
FBAD24
24
FBAD25
25
FBAD26
26
FBAD27
27
FBAD28
28
FBAD29
29
FBAD30
30
FBAD31
31
FBAD32
32
FBAD33
33
FBAD34
34
FBAD35
35
FBAD36
36
FBAD37
37
FBAD38
38
FBAD39
39
FBAD40
40
FBAD41
41
FBAD42
42
FBAD43
43
FBAD44
44
FBAD45
45
FBAD46
46
FBAD47
47
FBAD48
48
FBAD49
49
FBAD50
50
FBAD51
51
FBAD52
52
FBAD53
53
FBAD54
54
FBAD55
55
FBAD56
56
FBAD57
57
FBAD58
58
FBAD59
59
FBAD60
60
FBAD61
61
FBAD62
62
FBAD63
63
FBADQM0
0
FBADQM1
1
FBADQM2
2
FBADQM3
3
FBADQM4
4
FBADQM5
5
FBADQM6
6
FBADQM7
7
FBADQS_WP0
0
FBADQS_WP1
1
FBADQS_WP2
2
FBADQS_WP3
3
FBADQS_WP4
4
FBADQS_WP5
5
FBADQS_WP6
6
FBADQS_WP7
7
FBADQS_RN0
0
FBADQS_RN1
1
FBADQS_RN2
2
FBADQS_RN3
3
FBADQS_RN4
4
FBADQS_RN5
5
FBADQS_RN6
6
FBADQS_RN7
7
FBA_VREF
COMMON
N27 M27 N28 L29 K27 K28 J29 J28 P30 N31 N30 N32 L31 L30 J30 L32 H30 K30 H31 F30 H32 E31 D30 E30 H28 H29 E29 J27 F27 E27 E28
F28 AD29 AE29 AD28 AC28 AB29 AA30
Y28 AB30 AM30 AF30 AJ31 AJ30 AJ32 AK29 AM31 AL30 AE32 AE30 AE31 AD30 AC31 AC32 AB32 AB31 AG27 AF28 AH28 AG28 AG29 AD27 AF27 AE28
M29
M30
G30
F29 AA29 AK30 AC30 AG30
L28
K31
G32
G28 AB28 AL32 AF32 AH30
M28
K32
G31
G27 AA28 AL31 AF31 AH29
E32
2/14 FBA
2/14 FBA
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4 FBADQS_RN5 FBADQS_RN6 FBADQS_RN7
FB_VREF1
ALL FBVDD PINS ARE NC ON NV43 DESKTOP G3 PACKAGE
FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_DEBUG
FBA_REFCLK FBA_REFCLK
FBA_PLLVDD
FBA_PLLAVDD
FBA_PLLGND
NTP_GPU_A12
A12
NTP_GPU_A15
A15
NTP_GPU_A18
A18
NTP_GPU_A21
A21
NTP_GPU_A24
A24
NTP_GPU_A27
A27
NTP_GPU_A3
A3
NTP_GPU_A30
A30
NTP_GPU_A6
A6
NTP_GPU_A9
A9
NTP_GPU_AA32
AA32
NTP_GPU_AD32
AD32
NTP_GPU_AG32
AG32
NTP_GPU_AK32
AK32
NTP_GPU_C32
C32
NTP_GPU_F32
F32
NTP_GPU_J32
J32
NTP_GPU_M32
M32
NTP_GPU_R32
R32
NTP_GPU_V32
V32
AA25 AA26 AB25 AB26 G11 G12 G15 G18 G21 G22 H11 H12 H15 H18 H21 H22 L25 L26 M25 M26 R25 R26 V25 V26
FBA_CMD0
P32
FBA_CMD1
U27
FBA_CMD2
P31
FBA_CMD3
U30
FBA_CMD4
Y31
FBA_CMD5
W32
FBA_CMD6
W31
FBA_CMD7
T32
FBA_CMD8
V27
FBA_CMD9
T28
FBA_CMD10
T31
FBA_CMD11
U32
FBA_CMD12
W29
FBA_CMD13
W30
FBA_CMD14
T27
FBA_CMD15
V28
FBA_CMD16
V30
FBA_CMD17
U31
FBA_CMD18
R27
FBA_CMD19
V29
FBA_CMD20
T30
FBA_CMD21
W28
FBA_CMD22
R29
FBA_CMD23
R30
FBA_CMD24
P29
FBA_CMD25
U28
NTP_FBA_CMD<26>
Y32
FBA_CLK0
P28
FBA_CLK0*
R28
FBA_CLK1
Y27
FBA_CLK1*
AA27
TP NOW
TP_FBA_DBI0
Y30
RFU RFU
TP_FBA_DBI1
AC26
TP_FBA_DEBUG
AC27
FBA_REFCLK
D32
FBA_REFCLK*
D31
G23
FBA_PLLAVDD
G25
G24
FBA_CMD[26..0]
0 1 2 3 4 5 6
8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
OUT
OUT
OUT
OUT
GND
PLACE BELOW GPU
C792
C792 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
OUT
PLACE close to GPU
FBVDD
4.1G<
<<<4,6>>>
4.2A<
R596
R596
4.1G<
<<<4,6>>>
100
100
4.2D<
1%
1% 0402
0402 COMMON
COMMON
FBA_REFCLK*
R593
R593 100
100
1%
1% 0402
0402 COMMON
COMMON
GND
4.1G< 4.1A< <<<4,6>>>
R599
R599 100
100
1%
1% 0402
0402 COMMON
COMMON
R601
R601 100
100
1%
1% 0402
0402 COMMON
COMMON
C705
C705
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C704
C704 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C708
C708
C754
C754
0.47UF
0.47UF
0.47UF
0.47UF
6.3V
6.3V
6.3V
6.3V 10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C707
C707
C750
C750
.1UF
.1UF
0.47UF
0.47UF
6.3V
6.3V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402 COMMON
COMMON
COMMON
COMMON
C698
C698
C722
C722
0.47UF
0.47UF
.1UF
.1UF
6.3V
6.3V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402 COMMON
COMMON
COMMON
COMMON
PLACE close to balls
FBA_PLLVDD
C689
C689 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C710
C710 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C692
C692 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C685
C685 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C806
C806 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C755
C755 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C800
C800
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
FBVDD
C730
C730
C50
C50
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C5
C5
C68
C68
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C6
C6
C824
C824
.1UF
.1UF
1UF
1UF
10V
10V
10V
10V
10%
10%
10%
10%
X7R
X7R
X5R
X5R 0402
0402
0603
0603
COMMON
COMMON
COMMON
COMMON
C697
C697 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
GND
FB_DLLVDD
ON NV3x version's of G3 FB_DLLVDD will be routed on FB_PLLVDD
150-220R@100MHz
150-220R@100MHz
LB507
LB507
0603 COMMON
0603 COMMON
C674
C674 1UF
1UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
150-220R@100MHz
150-220R@100MHz
LB509
LB509
0603 COMMON
0603 COMMON
C672
C672 1UF
1UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
MIN_LINE_WIDTHNET
4MIL 10MIL
10MIL 10MIL
NET_SPACING_RULE
10MIL4MIL
1
FBA_PLLVDD
FBA_PLLAVDD
DIFFPAIR
FBA_REFCLK FBA_REFCLK*
IN IN
IN IN
GND
GND
FBVDD
GND
C856
C856
C594
10UF
10UF
6.3V
6.3V 20%
20% X5R
X5R 0805
0805 COMMON
COMMON
C594 10UF
10UF
6.3V
6.3V 20%
20% X5R
X5R 0805
0805 COMMON
COMMON
C597
C597 10UF
10UF
6.3V
6.3V 20%
20% X5R
X5R 0805
0805 COMMON
COMMON
2
GND
C740
C740 10UF
10UF
6.3V
6.3V 20%
20% X5R
GND
X5R 0805
0805 COMMON
COMMON
PLACE MIDWAY BETWEEN GPU AND MEMORY
PLACE NEAR GPU
FBVDD
R638
R638
10K
10K
5%
5%
0402
0402
NS
NS
FBA_CMD11
COMMON
COMMON
R640
R640
10K
10K
5%
5%
0402
0402
3
GND
CKE Stuff options for DDR3 configation for on-die terminations at the memory
IMPORTANT FOR POWER ON INITIALIZATION OF DDR3 MEMS
NVVDD
C662
C662
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
C654
C654
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
A3V3
GND
DDR3: DETERMINES THE ODT VALUE FOR ADDR AND CONTROL PINS
CKE = 0 --> ODT = ZQ/2 CKE = 1 --> ODT = ZQ
4
GND
FBA_AVDD is TBD. This may not be hooked up on the Package.
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL FBA MEMORY INTERFACE, GPU FBVDD/Q DECOUPLING CAPS
E GC
www.vinafix.vn
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
3
3
3
Sheet of
Sheet of
Sheet of
00A
00A
00A
22
22
22
5 FrameBuffer: Partition A 8Mx32 BGA144 DDR3
M5
N6 N9
M10
N2 N3
M3
L3 L12 M12 N12 N13 N11 M11
M4
N4
L9
N5
N10
L6
M7
N7
N8
E3
E12 M8
M6
M9
F6
F7
F8
F9
G6 G7 G8 G9
H6
H7
H8
H9
J6
J7
J8
J9
GND
U8C
U8C
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
B10
DQ0
B8
DQ1
B9
DQ2
C13
DQ3
C9
DQ4
D12
DQ5
E13
DQ6
D13
DQ7
C12
DQM
B12
DQSR
B13
DQSW
U12B
U12B
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
B9
DQ0
B8
DQ1
C9
DQ2
B10
DQ3
D12
DQ4
C13
DQ5
D13
DQ6
E13
DQ7
C12
DQM
B12
DQSR
B13
DQSW
E GC
A-CS0-HI-32bit
U12C
U12C
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
RAS CAS WE CS
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 NC/A<12>
BA<0> BA<1> NC/BA<2>
CKE CLK CLK
NC/RFU NC/RFU NC/RFU
RESET
ZQ
THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM
24 25 26 27 28 29 30 31
56 57 58 59 60 61 62 63
A-CS0-LOW-32bit
U8E
U8E
BGA_DIAMOND144_P08_DDR_13MM_B2
GND
FBAD[63..0]
FBADQM[7..0]
FBADQS_RN[7..0]
FBADQS_WP[7..0]
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
M5
RAS
N6
CAS
N9
WE
M10
CS
N2
A0
N3
A1
M3
A2
L3
A3
L12
A4
M12
A5
N12
A6
N13
A7
N11
A8
M11
A9
M4
A10
N4
A11
L9
NC/A<12>
N5
BA<0>
N10
BA<1>
L6
NC/BA<2>
M7
CKE
N7
CLK
N8
CLK
NC/RFU
E3
NC/RFU
E12
NC/RFU
M8
RESET
M6
M9
ZQ
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
VREF: M2 - DATA M13 - ADDR
FBADQM0 FBADQM1 FBADQM2 FBADQM3
FBADQM5 FBADQM6
FBADQM7
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4 FBADQS_RN5 FBADQS_RN6 FBADQS_RN7
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VREF VREF
FBVDD
D7 D8 E4 E11 L4 L7 L8 L11
C4 C5 C7 C8 C10 C11 F4 F11 G4 G11 H4 H11 J4 J11 K4 K11
B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10
E5 E7 E8 E10 K6 K7 K8 K9 L5 L10
FBA_VREF_DATA0
M2
FBA_VREF_ADDR0
M13
VREF = FBVDDQ * R2/(R1 + R2)
DDR3:
VREF = 0.70 * FBVDDQ
1.26V = 1.8V * 2.7K/(1.15K + 2.7K)
0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
FBA_CMD[26..0] FBA_CMD[26..0]
3.2D> 4.1G< <<<3,6>>>
1
2
3
4
DDR3:
ZQ = 6x desired output impedence of DQ drivers Impedence = 240 / 6 = 40 ohm
144BGA CMD Mapping
CMD15 RAS* CMD25 CMD9 CMD11 CKE CMD12 CMD8 CMD7
CMD1 CMD3
CMD2 CMD0 CMD24 CMD22
CMD13 CMD4 CMD5 CMD6
CMD21 CMD23 CMD19 CMD20 CMD17 CMD16 CMD14 CMD10 CMD18
ADDRCMD
CAS* WE*
RESET CS0* CS1**notused
A<0> A<1>
A<2> A<3> A<4> A<5>
A<2> A<3> A<4> A<5>
A<6> A<7> A<8> A<9> A<10 A<11> A<12> BA0 BA1
Low Sub-Partition
Hi Sub-Partition
IN
Low Sub-Partition
3.3D> 4.1G< <<<3,6>>> IN
3.4D> 4.1G< <<<3,6>>> IN
12
FBA_CMD15 FBA_CMD15
15
FBA_CMD25 FBA_CMD25
25
FBA_CMD9 FBA_CMD9
9
FBA_CMD8 FBA_CMD8
8
CS0
FBA_CMD1 FBA_CMD1
1
FBA_CMD3 FBA_CMD3
3
FBA_CMD2
2
FBA_CMD0
0
FBA_CMD24
24
FBA_CMD22
22
FBA_CMD21 FBA_CMD21
21
FBA_CMD23 FBA_CMD23FBA_CMD24
23
FBA_CMD19 FBA_CMD19
19
FBA_CMD20 FBA_CMD20
20
FBA_CMD17 FBA_CMD17
17
FBA_CMD16 FBA_CMD16
16
FBA_CMD14 FBA_CMD14
14
FBA_CMD10 FBA_CMD10
10
FBA_CMD18 FBA_CMD18
18
TP_FBA0_BA<2>
FBA_CMD11 FBA_CMD11
11
FBA_CLK0 FBA_CLK0*
TP_FBA0_NC1 TP_FBA0_NC2 TP_FBA0_NC3
FBA_CMD12 FBA_CMD12
FBA_CMD12
FBA_ZQ0 FBA_ZQ1
R61
R61
R643
R643
240
240
10K
10K
1%
1%
5%
5%
0603
0603
0402
0402
COMMON
COMMON
COMMON
COMMON
GND GND
3.1A<> 4.1G<> <<<3,6>>> BI
3.3A> 4.1G<> <<<3,6>>> BI
3.4A<> 4.1G<> <<<3,6>>> BI
3.3A<> 4.1G<> <<<3,6>>> BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
Termination for Sub-Partition and CLK MUST BE PLACED as close as possible to the BGA memory on the line BEFORE the MEMORY pin!!
Minimize the stub length!!
FBA_CMD[26..0]
GND
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7
FBCDQM0
FBADQS_RN0 FBADQS_WP0
FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39
FBADQM4 FBADQS_RN4 FBADQS_WP4
FBA Partition
FBVDD
R639
R639
1K
1K
R1
1%
1%
0402
0402
COMMON
COMMON
R635
R635
1K
1K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
U8A
U8A
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
L2
DQ0
K2
DQ1
G2
DQ2
J2
DQ3
F2
DQ4
F3
DQ5
G3
DQ6
K3
DQ7
J3
DQM
H3
DQSR
H2
DQSW
U12E
U12E
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
G12
DQ0
L13
DQ1
K12
DQ2
J13
DQ3
G13
DQ4
K13
DQ5
F12
DQ6
F13
DQ7
J12
DQM
H12
DQSR
H13
DQSW
15 25 9 8
CS0
1 3
FBA_CMD13
13
FBA_CMD4
4
FBA_CMD5
5
FBA_CMD6
6 21 23 19 20 17 16 14
10 18
TP_FBA1_BA<2>
11
IN IN
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL FBA 8Mx32 DDR3 MEMORIES, FBA COMMAND BUS PU'S, FBA CLK PU'S
FBA_CLK1 FBA_CLK1*
TP_FBA1_NC1 TP_FBA1_NC2 TP_FBA1_NC3
R88
R88 240
240
1%
1% 0603
0603 COMMON
COMMON
GND
FBAD16
16
FBAD17
17
FBAD18
18
FBAD19
19
FBAD20
20
FBAD21
21
FBAD22
22
FBAD23
23
FBADQM2 FBADQS_RN2 FBADQS_WP2
FBAD48
48
FBAD49
49
FBAD50
50
FBAD51
51
FBAD52
52
FBAD53
53
FBAD54
54
FBAD55
55
FBADQM6 FBADQS_RN6 FBADQS_WP6
FBA_CMD2
2
0
24
22
13
4
5
6
C772
C772 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 NS
NS
C753
C753 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
FBA_CMD0
FBA_CMD22
FBA_CMD13
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
R597
R597
COMMON
COMMON
R605
R605
COMMON
COMMON
8 9 10 11 12 13 14 15
40 41 42 43 44 45 46 47
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
FBVDD
1K
1K
1%
1%
0402
0402
1K
1K
1%
1%
0402
0402
GND
FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15
FBADQM1 FBADQS_RN1 FBADQS_WP1
FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47
FBADQM5 FBADQS_RN5 FBADQS_WP5
120
120
5%
5%
1205%R628
120
5%
120
120
5%
5%
120
120
5%
5%
120
120
5%
5%
1205%R675
120
5%
120
120
5%
5%
1205%R646
120
5%
120 R68
120
5%
5%
120 R67
120
5%
5%
120 R94
120
5%
5%
120
120
5%
5%
DDR3:
R1
R2
FBVDD
R627
R627
0402
0402
R628
0402COMMON
0402COMMON
R611
R611
0402
0402
R610
R610
0402
0402
R674
R674
0402
0402
R675
0402COMMON
0402COMMON
R647
R647
0402
0402
R646
0402COMMON
0402COMMON
R68
0402COMMON
0402COMMON
R67
0402COMMON
0402COMMON
R94
0402
0402
R92
R92
0402
0402
ZQ = 6x desired output impedence of DQ drivers Impedence = 240 / 6 = 40 ohm
C648
C648 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 NS
NS
C655
C655 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
ASSEMBLY PAGE DETAIL
Hi Sub-Partition
3.4D> 4.1G< <<<3,6>>>
3.4D> 4.1G< <<<3,6>>>
U8B
U8B
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
E2
DQ0
D2
DQ1
C2
DQ2
D3
DQ3
B5
DQ4
B6
DQ5
B7
DQ6
C6
DQ7
C3
DQM
B3
DQSR
B2
DQSW
U12A
U12A
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
D2
DQ0
B7
DQ1
B6
DQ2
B5
DQ3
C6
DQ4
E2
DQ5
D3
DQ6
C2
DQ7
C3
DQM
B3
DQSR
B2
DQSW
FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31
FBADQM3FBADQM4 FBADQS_RN3 FBADQS_WP3
FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
FBADQM7
FBADQS_RN7 FBADQS_WP7
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C4
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C11
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
H4
VDDQ
H11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
M2
VREF
M13
VREF
VREF = FBVDDQ * R2/(R1 + R2)
DDR3: VREF = 0.70 * FBVDDQ
FBVDD
GND
FBA_VREF_DATA1 FBA_VREF_ADDR1
1.26V = 1.8V * 2.7K/(1.15K + 2.7K)
U8D
U8D
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
F12
DQ0
G12
DQ1
G13
DQ2
F13
DQ3
J13
DQ4
K12
DQ5
L13
DQ6
K13
DQ7
J12
DQM
H12
DQSR
H13
DQSW
U12D
U12D
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
L2
DQ0
F3
DQ1
G2
DQ2
K2
DQ3
F2
DQ4
K3
DQ5
J2
DQ6
G3
DQ7
J3
DQM
H3
DQSR
H2
DQSW
COMMON
COMMON
COMMON
COMMON
HGFEDCBA
FBA_CLK0
3.3D> 4.2A< <<<3,6>>>
FBA_CLK0*
IN
3.4D> 4.2A< <<<3,6>>>
FBA_CLK1
IN
3.4D> 4.2D< <<<3,6>>>
FBA_CLK1*
IN
3.4D> 4.2D< <<<3,6>>>
FBA_CMD[26..0]
IN
3.2D> 4.1A< <<<3,6>>> IN
3.1A<> 4.4B<> <<<3,6>>>
3.3A> 4.4B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
3.4A<> 4.4B<> <<<3,6>>>
3.3A<> 4.5B<> <<<3,6>>>
FBAD[63..0] FBADQM[7..0]
BI BI
FBADQS_RN0 FBADQS_WP0
BI
FBADQS_RN1
BI
FBADQS_WP1
BI
FBADQS_RN2
BI
FBADQS_WP2
BI
FBADQS_RN3
BI
FBADQS_WP3
BI
FBADQS_RN4
BI
FBADQS_WP4
BI
FBADQS_RN5
BI
FBADQS_WP5
BI
FBADQS_RN6
BI
FBADQS_WP6
BI
FBADQS_RN7
BI
FBADQS_WP7
BI BI
FBA_VREF_DATA0 FBA_VREF_ADDR0
BI BI
FBA_VREF_DATA1
BI
FBA_VREF_ADDR1
BI
DIFFPAIR MIN_LINE_WIDTH SPACINGNET
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
5MIL 5MIL 5MIL 5MIL
12MIL 12MIL
12MIL 12MIL
15MIL_G2G_25MIL 15MIL_G2G_25MIL 15MIL_G2G_25MIL 15MIL_G2G_25MIL 15MIL
15MIL 15MIL
15MILFBADQS_RN0 15MILFBADQS_RN0 15MILFBADQS_RN1 15MILFBADQS_RN1 15MILFBADQS_RN2 15MILFBADQS_RN2 15MILFBADQS_RN3 15MILFBADQS_RN3 15MILFBADQS_RN4 15MILFBADQS_RN4 15MILFBADQS_RN5 15MILFBADQS_RN5 15MILFBADQS_RN6 15MILFBADQS_RN6 15MILFBADQS_RN7 15MILFBADQS_RN7
1
2
FBVDD
R689
R689
C907
C907
1K
1K
.1UF
.1UF
R1
10V
10V
1%
1%
0402
0402
10%
10% X5R
X5R 0402
0402 NS
NS
R684
R684
1K
1K
R2
1%
1%
0402
0402
GND
C898
C898 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
FBVDD
C803
C803 .1UF
.1UF
R642
R642
10V
10V
1K
1K
R1
10%
10%
1%
1%
X5R
X5R
0402
0402
0402
0402 NS
NS
R644
R644
C818
C818
1K
1K
.1UF
.1UF
R2
10V
10V
1%
1%
0402
0402
10%
10% X5R
X5R 0402
0402 COMMON
COMMON
GND
3
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
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00A
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00A
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4
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FRAME BUFFER: PARTITION A DECOUPLING
HGFEDCBA
1
Decoupling for FBA 0..31
C529
C529
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
PLACE NEAR MEMORY FBVDD PINS
C765
C765
C841
C841
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C678
C678
C718
C718
.01UF
.01UF
.01UF
.01UF
25V
25V
25V
25V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
PLACE NEAR MEMORY FBVDDQ PINS
C642
C642
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C541
C541 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C48
C48 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C571
C571 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C725
C725 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C680
C680 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C683
C683 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C691
C691 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C767
C767
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
GND
GND
C716
C716 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C682
C682 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C706
C706 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C719
C719 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C717
C717 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
GND
GND
FBVDD
FBVDD
C887
C887 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
C749
C749 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
C543
C543
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
C641
C641
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
C832
C832 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
C681
C681 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C512
C512 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C527
C527 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C712
C712 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
2
3
4
Decoupling for FBA 32..63
FBVDD
C572
C542
C542
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
C544
C544 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C875
C875 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C572 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C528
C528 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C668
C668 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
FBVDD
C670
C670 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
C562
C562 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
C658
C658
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
C578
C578
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
C536
C536 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
PLACE NEAR MEMORY FBVDD PINS
C715
C715
C902
C902
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C859
C859 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
PLACE NEAR MEMORY FBVDDQ PINS
C876
C876 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C858
C858 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C878
C878 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C726
C726
0.47UF
0.47UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C866
C866 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
GND
GND
C871
C871
C882
.01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C861
C861 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C882 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C879
C879 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C860
C860 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C877
C877 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C855
C855 .01UF
.01UF
25V
25V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
GND
GND
1
2
3
4
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL FBA MEMORY FBVDD/Q DECOUPLING CAPS
E GC
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Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
5
5
5
Sheet of
Sheet of
Sheet of
5
00A
00A
00A
22
22
22
5 FrameBuffer: Partition A 8Mx32 BGA144 DDR3
M5
N6 N9
M10
N2 N3
M3
L3 L12 M12 N12 N13 N11 M11
M4
N4
L9
N5 N10
L6
M7
N7
N8
E3 E12
M8
M6
M9
F6
F7
F8
F9
G6 G7 G8 G9
H6
H7
H8
H9
J6
J7
J8
J9
GND
U800C
U800C
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
B10
DQ0
B8
DQ1
B9
DQ2
C13
DQ3
C9
DQ4
D12
DQ5
E13
DQ6
D13
DQ7
C12
DQM
B12
DQSR
B13
DQSW
U1200B
U1200B
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
B9
DQ0
B8
DQ1
C9
DQ2
B10
DQ3
D12
DQ4
C13
DQ5
D13
DQ6
E13
DQ7
C12
DQM
B12
DQSR
B13
DQSW
E GC
A-CS0-HI-32bit
U1200C
U1200C
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
RAS CAS WE CS
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 NC/A<12>
BA<0> BA<1> NC/BA<2>
CKE CLK CLK
NC/RFU NC/RFU NC/RFU
RESET
ZQ
THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM
24 25 26 27 28 29 30 31
56 57 58 59 60 61 62 63
A-CS0-LOW-32bit
U800E
U800E
BGA_DIAMOND144_P08_DDR_13MM_B2
GND
FBAD[63..0]
FBADQM[7..0]
FBADQS_RN[7..0]
FBADQS_WP[7..0]
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
M5
RAS
N6
CAS
N9
WE
M10
CS
N2
A0
N3
A1
M3
A2
L3
A3
L12
A4
M12
A5
N12
A6
N13
A7
N11
A8
M11
A9
M4
A10
N4
A11
L9
NC/A<12>
N5
BA<0>
N10
BA<1>
L6
NC/BA<2>
M7
CKE
N7
CLK
N8
CLK
NC/RFU
E3
NC/RFU
E12
NC/RFU
M8
RESET
M6
M9
ZQ
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
VREF: M2 - DATA M13 - ADDR
FBADQM0 FBADQM1 FBADQM2 FBADQM3
FBADQM5 FBADQM6
FBADQM7
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4 FBADQS_RN5 FBADQS_RN6 FBADQS_RN7
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VREF VREF
FBVDD
D7 D8 E4 E11 L4 L7 L8 L11
C4 C5 C7 C8 C10 C11 F4 F11 G4 G11 H4 H11 J4 J11 K4 K11
B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10
E5 E7 E8 E10 K6 K7 K8 K9 L5 L10
FBA_VREF_DATA0
M2
FBA_VREF_ADDR0
M13
VREF = FBVDDQ * R2/(R1 + R2)
DDR3:
VREF = 0.70 * FBVDDQ
1.26V = 1.8V * 2.7K/(1.15K + 2.7K)
0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
FBA_CMD[26..0]
3.2D> 4.1G< <<<3,4>>>
1
2
3
4
DDR3:
ZQ = 6x desired output impedence of DQ drivers Impedence = 240 / 6 = 40 ohm
144BGA CMD Mapping
CMD15 RAS* CMD25 CMD9 CMD11 CKE CMD12 CMD8 CMD7
CMD1 CMD3
CMD2 CMD0 CMD24 CMD22
CMD13 CMD4 CMD5 CMD6
CMD21 CMD23 CMD19 CMD20 CMD17 CMD16 CMD14 CMD10 CMD18
ADDRCMD
CAS* WE*
RESET CS0* CS1**notused
A<0> A<1>
A<2> A<3> A<4> A<5>
A<2> A<3> A<4> A<5>
A<6> A<7> A<8> A<9> A<10 A<11> A<12> BA0 BA1
Low Sub-Partition
Hi Sub-Partition
IN
Low Sub-Partition
3.3D> 4.1G< <<<3,4>>> IN
3.4D> 4.1G< <<<3,4>>> IN
12
4.1G<>
<<<3,4>>>
FBA_CMD15 FBA_CMD15
15
FBA_CMD25 FBA_CMD25
25
FBA_CMD9 FBA_CMD9
9
FBA_CMD7 FBA_CMD7
7
CS1
FBA_CMD1 FBA_CMD1
1
FBA_CMD3 FBA_CMD3
3
FBA_CMD2
2
FBA_CMD0
0
FBA_CMD24
24
FBA_CMD22
22
FBA_CMD21 FBA_CMD21
21
FBA_CMD23 FBA_CMD23
23
FBA_CMD19 FBA_CMD19
19
FBA_CMD20 FBA_CMD20
20
FBA_CMD17 FBA_CMD17
17
FBA_CMD16 FBA_CMD16
16
FBA_CMD14 FBA_CMD14
14
FBA_CMD10 FBA_CMD10
10
FBA_CMD18 FBA_CMD18
18
TP_FBA0_BA<2>
FBA_CMD11 FBA_CMD11
11
FBA_CLK0 FBA_CLK0*
TP_FBA0_NC1 TP_FBA0_NC2 TP_FBA0_NC3
FBA_CMD12 FBA_CMD12
FBA_CMD12
FBA_ZQ0 FBA_ZQ1
R7056
R7056
R7055
R7055
240
240
10K
10K
1%
1%
5%
5%
0603
0603
0402
0402
COMMON
COMMON
COMMON
COMMON
GND GND
3.1A<> 4.1G<> <<<3,4>>> BI
3.3A> 4.1G<> <<<3,4>>> BI
3.4A<> BI
3.3A<> 4.1G<> <<<3,4>>> BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
Termination for Sub-Partition and CLK MUST BE PLACED as close as possible to the BGA memory on the line BEFORE the MEMORY pin!!
Minimize the stub length!!
FBA_CMD[26..0]
GND
FBAD30 FBAD31 FBAD26 FBAD28 FBAD27 FBAD24 FBAD25 FBAD29
FBADQM3 FBADQS_RN3 FBADQS_WP3
FBAD63 FBAD56 FBAD61 FBAD62 FBAD58 FBAD59 FBAD57 FBAD60
FBADQM7
FBADQS_RN7 FBADQS_WP7
FBA Partition
FBVDD
R7059
R7059
1K
1K
R1
1%
1%
0402
0402
COMMON
COMMON
R7061
R7061
1K
1K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
U800A
U800A
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
L2
DQ0
K2
DQ1
G2
DQ2
J2
DQ3
F2
DQ4
F3
DQ5
G3
DQ6
K3
DQ7
J3
DQM
H3
DQSR
H2
DQSW
U1200E
U1200E
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
G12
DQ0
L13
DQ1
K12
DQ2
J13
DQ3
G13
DQ4
K13
DQ5
F12
DQ6
F13
DQ7
J12
DQM
H12
DQSR
H13
DQSW
FBA_CMD[26..0]
FBA_CMD2
2
0
24
22
13
4
5
6
C952
C952 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 NS
NS
C954
C954 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
FBA_CMD0
FBA_CMD24
FBA_CMD22
FBA_CMD13
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
R7062
R7062
COMMON
COMMON
R7064
R7064
COMMON
COMMON
8 9 10 11 12 13 14 15
40 41 42 43 44 45 46 47
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
FBVDD
1K
1K
1%
1%
0402
0402
1K
1K
1%
1%
0402
0402
GND
FBAD22 FBAD23 FBAD19 FBAD21 FBAD16 FBAD18 FBAD17 FBAD20
FBADQM2 FBADQS_RN2 FBADQS_WP2
FBAD54 FBAD49 FBAD48 FBAD51 FBAD50 FBAD55 FBAD52 FBAD53
FBADQM6 FBADQS_RN6 FBADQS_WP6
120
120
5%
5%
1205%R7044
120
5%
120
120
5%
5%
120
120
5%
5%
120
120
5%
5%
1205%R7048
120
5%
120
120
5%
5%
1205%R7050
120
5%
120 R7051
120
5%
5%
120 R7052
120
5%
5%
120 R7053
120
5%
5%
120
120
5%
5%
DDR3:
R1
R2
FBVDD
R7043
R7043
0402
0402
R7044
0402COMMON
0402COMMON
R7045
R7045
0402
0402
R7046
R7046
0402
0402
R7047
R7047
0402
0402
R7048
0402COMMON
0402COMMON
R7049
R7049
0402
0402
R7050
0402COMMON
0402COMMON
R7051
0402COMMON
0402COMMON
R7052
0402COMMON
0402COMMON
R7053
0402
0402
R7054
R7054
0402
0402
ZQ = 6x desired output impedence of DQ drivers Impedence = 240 / 6 = 40 ohm
C956
C956 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 NS
NS
C958
C958 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
ASSEMBLY PAGE DETAIL
Hi Sub-Partition
3.4D> 4.1G< <<<3,4>>>
3.4D> 4.1G< <<<3,4>>>
U800B
U800B
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
E2
DQ0
D2
DQ1
C2
DQ2
D3
DQ3
B5
DQ4
B6
DQ5
B7
DQ6
C6
DQ7
C3
DQM
B3
DQSR
B2
DQSW
U1200A
U1200A
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
D2
DQ0
B7
DQ1
B6
DQ2
B5
DQ3
C6
DQ4
E2
DQ5
D3
DQ6
C2
DQ7
C3
DQM
B3
DQSR
B2
DQSW
15 25 9 7
CS1
1 3
FBA_CMD13
13
FBA_CMD4
4
FBA_CMD5
5
FBA_CMD6
6 21 23 19 20 17 16 14
10 18
TP_FBA1_BA<2>
11
IN IN
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL FBA 8Mx32 DDR3 MEMORIES, FBA COMMAND BUS PU'S, FBA CLK PU'S
FBA_CLK1 FBA_CLK1*
TP_FBA1_NC1 TP_FBA1_NC2 TP_FBA1_NC3
R7057
R7057 240
240
1%
1% 0603
0603 COMMON
COMMON
GND
FBAD12
16
FBAD14
17
FBAD13
18
FBAD10
19
FBAD15
20
FBAD11
21
FBAD8
22
FBAD9
23
FBADQM1 FBADQS_RN1 FBADQS_WP1
FBAD42
48
FBAD41
49
FBAD44
50
FBAD43
51
FBAD46
52
FBAD47
53
FBAD40
54
FBAD45
55
FBADQM5 FBADQS_RN5 FBADQS_WP5
FBAD5 FBAD6 FBAD2 FBAD4 FBAD3 FBAD7 FBAD0 FBAD1
FBADQM0FBADQM4 FBADQS_RN0 FBADQS_WP0
FBAD33 FBAD38 FBAD36 FBAD37 FBAD39 FBAD34 FBAD35 FBAD32
FBADQM4 FBADQS_RN4 FBADQS_WP4
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C4
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C11
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
H4
VDDQ
H11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
M2
VREF
M13
VREF
VREF = FBVDDQ * R2/(R1 + R2)
DDR3: VREF = 0.70 * FBVDDQ
FBVDD
GND
FBA_VREF_DATA1 FBA_VREF_ADDR1
1.26V = 1.8V * 2.7K/(1.15K + 2.7K)
U800D
U800D
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
F12
DQ0
G12
DQ1
G13
DQ2
F13
DQ3
J13
DQ4
K12
DQ5
L13
DQ6
K13
DQ7
J12
DQM
H12
DQSR
H13
DQSW
U1200D
U1200D
BGA_DIAMOND144_P08_DDR_13MM_B2
BGA_DIAMOND144_P08_DDR_13MM_B2 BGA144
BGA144 COMMON
COMMON
L2
DQ0
F3
DQ1
G2
DQ2
K2
DQ3
F2
DQ4
K3
DQ5
J2
DQ6
G3
DQ7
J3
DQM
H3
DQSR
H2
DQSW
COMMON
COMMON
COMMON
COMMON
HGFEDCBA
FBA_CLK0
3.3D> 4.2A< <<<3,4>>>
FBA_CLK0*
IN
3.4D> 4.2A< <<<3,4>>>
FBA_CLK1
IN
3.4D> 4.2D< <<<3,4>>>
FBA_CLK1*
IN
3.4D> 4.2D< <<<3,4>>>
FBA_CMD[26..0]
IN
3.2D> 4.1A< <<<3,4>>> IN
3.1A<> 4.4B<> <<<3,4>>>
3.3A> 4.4B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
3.4A<> 4.4B<> <<<3,4>>>
3.3A<> 4.5B<> <<<3,4>>>
FBAD[63..0] FBADQM[7..0]
BI BI
FBADQS_RN0 FBADQS_WP0
BI
FBADQS_RN1
BI
FBADQS_WP1
BI
FBADQS_RN2
BI
FBADQS_WP2
BI
FBADQS_RN3
BI
FBADQS_WP3
BI
FBADQS_RN4
BI
FBADQS_WP4
BI
FBADQS_RN5
BI
FBADQS_WP5
BI
FBADQS_RN6
BI
FBADQS_WP6
BI
FBADQS_RN7
BI
FBADQS_WP7
BI BI
FBA_VREF_DATA0 FBA_VREF_ADDR0
BI BI
FBA_VREF_DATA1
BI
FBA_VREF_ADDR1
BI
DIFFPAIR MIN_LINE_WIDTH SPACINGNET
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
5MIL 5MIL 5MIL 5MIL
12MIL 12MIL
12MIL 12MIL
15MIL_G2G_25MIL 15MIL_G2G_25MIL 15MIL_G2G_25MIL 15MIL_G2G_25MIL 15MIL
15MIL 15MIL
15MILFBADQS_RN0 15MILFBADQS_RN0 15MILFBADQS_RN1 15MILFBADQS_RN1 15MILFBADQS_RN2 15MILFBADQS_RN2 15MILFBADQS_RN3 15MILFBADQS_RN3 15MILFBADQS_RN4 15MILFBADQS_RN4 15MILFBADQS_RN5 15MILFBADQS_RN5 15MILFBADQS_RN6 15MILFBADQS_RN6 15MILFBADQS_RN7 15MILFBADQS_RN7
1
2
FBVDD
R7058
R7058
C953
C953
1K
1K
.1UF
.1UF
R1
10V
10V
1%
1%
0402
0402
10%
10% X5R
X5R 0402
0402 NS
NS
R7060
R7060
1K
1K
R2
1%
1%
0402
0402
GND
C955
C955 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
FBVDD
C957
C957 .1UF
.1UF
R7063
R7063
10V
10V
1K
1K
R1
10%
10%
1%
1%
X5R
X5R
0402
0402
0402
0402 NS
NS
C959
C959
R7065
R7065
.1UF
.1UF
1K
1K
R2
10V
10V
1%
1%
0402
0402
10%
10% X5R
X5R 0402
0402 COMMON
COMMON
GND
3
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
Sheet of
Sheet of
Sheet of
00A
00A
00A
6
22
6
22
6
22
www.vinafix.vn
7.1G<> 7.4B<> <<<8,10>>>
1
2
7.1G<>
<<<8,10>>>
7.4B<>
3
7.2G<>
7.1G<>
7.5B<> <<<8,10>>>
7.1G<> 7.2G<> 7.4B<> <<<8,10>>>
4
5
FBCD[63..0]
BI
FBCD0
0
FBCD1
1
FBCD2
2
FBCD3
3
FBCD4
4
FBCD5
5
FBCD6
6
FBCD7
7
FBCD8
8
FBCD9
9
FBCD10
10
FBCD11
11
FBCD12
12
FBCD13
13
FBCD14
14
FBCD15
15
FBCD16
16
FBCD17
17
FBCD18
18
FBCD19
19
FBCD20
20
FBCD21
21
FBCD22
22
FBCD23
23
FBCD24
24
FBCD25
25
FBCD26
26
FBCD27
27
FBCD28
28
FBCD29
29
FBCD30
30
FBCD31
31
FBCD32
32
FBCD33
33
FBCD34
34
FBCD35
35
FBCD36
36
FBCD37
37
FBCD38
38
FBCD39
39
FBCD40
40
FBCD41
41
FBCD42
42
FBCD43
43
FBCD44
44
FBCD45
45
FBCD46
46
FBCD47
47
FBCD48
48
FBCD49
49
FBCD50
50
FBCD51
51
FBCD52
52
FBCD53
53
FBCD54
54
FBCD55
55
FBCD56
56
FBCD57
57
FBCD58
58
FBCD59
59
FBCD60
60
FBCD61
61
FBCD62
62
FBCD63
63
FBCDQM[7..0]
OUT
FBCDQS_WP[7..0]
BI
FBCDQS_RN[7..0]
BI
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
TP_FBC_VREF
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5
FBCDQM6
FBCDQM7
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2 FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2 FBCDQS_RN3 FBCDQS_RN4 FBCDQS_RN5 FBCDQS_RN6 FBCDQS_RN7
U11C
U11C
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
B7 A7 C7 A2 B2 C4 A5 B5
F9 F10 D12
D9 E12 D11
E8
D8
E7
F7
D6
D5
D3
E4
C3
B4 C10 B10
C8 A10 C11 C12 A11 B11 B28 C27 C26 B26 C30 B31 C29 A31 D28 D27 F26 D24 E23 E26 E24 F23 B23 A23 C25 C23 A22 C22 C21 B22 E22 D22 D21 E21 E18 D19 D18 E19
A4 E11
F5
C9 C28 F24 C24 E20
C5 E10
E5
B8 A29 D25 B25 F20
C6
E9
E6
A8 B29 E25 A25 F21
A28
3/14 FBC
3/14 FBC
FBCD0 FBCD1 FBCD2 FBCD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9 FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15 FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5 FBCDQM6 FBCDQM7
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2 FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2 FBCDQS_RN3 FBCDQS_RN4 FBCDQS_RN5 FBCDQS_RN6 FBCDQS_RN7
FB_VREF2
FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
FBC_DEBUG
FBC_REFCLK FBC_REFCLK
FBC_PLLVDD
FBC_PLLAVDD
FBC_PLLGND
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
Place near BGA
AA23 AB23 H16 H17 J10 J23 J24 J9 K11 K12 K21 K22 K24 K9 L23 M23 T25 U25
FBC_CMD0
C13
FBC_CMD1
A16
FBC_CMD2
A13
FBC_CMD3
B17
FBC_CMD4
B20
FBC_CMD5
A19
FBC_CMD6
B19
FBC_CMD7
B14
FBC_CMD8
E16
FBC_CMD9
A14
FBC_CMD10
C15
FBC_CMD11
B16
FBC_CMD12
F17
FBC_CMD13
C19
FBC_CMD14
D15
FBC_CMD15
C17
FBC_CMD16
A17
FBC_CMD17
C16
FBC_CMD18
D14
FBC_CMD19
F16
FBC_CMD20
C14
FBC_CMD21
C18
FBC_CMD22
E14 B13 E15 F15 A20
FBC_CLK0
E13
FBC_CLK0*
F13
FBC_CLK1
F18
FBC_CLK1*
E17
TP NOW
C20
RFU
D1
RFU
F12
B1 C1
G8
G10
G9
GND
K26
H26
J26
FBC_CMD23 FBC_CMD24 FBC_CMD25
NTP_FBC_CMD<26>
TP_FBC_DBI0 TP_FBC_DBI1
TP_FBC_DEBUG
FBC_REFCLK FBC_REFCLK*
FBC_PLLVDD
FBC_PLLAVDD
FBCAL_PD
FBCAL_PU
FBCAL_TERM
Value TBD
FBC_CMD[26..0]
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
OUT OUT OUT OUT
R624
04021%COMMON
04021%COMMON
R621
R621
0402
0402
1%
1%
R625
0402 COMMON
0402 COMMON
5%
7.1G< 7.2A< <<<8,10>>>
7.1G< 7.2A< <<<8,10>>>
7.1G< 7.2D< <<<8,10>>>
7.1G< 7.2D< <<<8,10>>>
FBVDD
49.9R624
49.9
49.9
49.9
COMMON
COMMON
05%R625
0
GND
FBVDD
C782
C782 1UF
1UF
10V
10V 10%
10% X7R
X7R 0603
0603 COMMON
COMMON
GND
7.1G<
7.1A<
<<<8,10>>>
OUT
PLACE close to GPU
FBVDD
R45
R45
R44
R44
100
100
100
100
1%
1%
1%
1% 0402
0402
0402
0402 COMMON
COMMON
COMMON
COMMON
R43
R43
R46
R46
100
100
100
100
1%
1%
1%
1%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
GND
C713
C713 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
GND
C696
C696 .01UF
.01UF
16V
16V 10%
10% X7R
X7R 0402
0402 COMMON
COMMON
C701
C701 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C688
C688 .1UF
.1UF
10V
10V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C669
C669 1UF
1UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
C677
C677 1UF
1UF
6.3V
6.3V 10%
10% X5R
X5R 0402
0402 COMMON
COMMON
Place close to balls
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL FBC MEMORY INTERFACE, GPU FBVTT
E GC
150-220R@100MHz
150-220R@100MHz
LB506
LB506
0603 COMMON
0603 COMMON
150-220R@100MHz
150-220R@100MHz
LB508
LB508
GND
HGFEDCBA
FBC_REFCLK
IN
FBC_REFCLK*
IN
FBC_PLLVDD
IN
FBC_PLLAVDD
IN
4MIL 10MIL
10MIL 10MIL
10MIL
1
DIFFPAIR MIN_LINE_WIDTH
NET NET_SPACING_RULE
2
PLACE NEAR GPU
FBVDD
R606
R606
10K
10K
5%
5%
0402
0402
NS
NS
FBC_CMD11
R608
R608
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
CKE Stuff options for DDR3 configation for on-die terminations at the memory
IMPORTANT FOR POWER ON INITIALIZATION OF DDR3 MEMS
DDR3: DETERMINES THE ODT VALUE FOR ADDR AND CONTROL PINS
CKE = 0 --> ODT = ZQ/2 CKE = 1 --> ODT = ZQ
3
4
A3V3
C653
C653
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
NVVDD
GND
COMMON0603
COMMON0603
FBA_AVDD Connection is TBD. This may not be tied on the Package
C657
C657
4.7UF
4.7UF
6.3V
6.3V 10%
10% X5R
X5R 0603
0603 COMMON
COMMON
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
MS-8983 base on P216 Modify
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date:
Date:
Date:
Monday, May 23, 2005
Monday, May 23, 2005
Monday, May 23, 2005
7
7
7
Sheet of
Sheet of
Sheet of
5
00A
00A
00A
22
22
22
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