MSI MS-95G5 Schematics

A B C

D

REVISIONS

1

9G CONTROL PANEL (MLK)

BLOCK DIAGRAM

Planar Connector

REV

X00

DESCRIPTIONECO DATE

TABLE OF CONTENTS

APPROVED

03/26/07Initial Prototype Release

1

2

Power NMI USB

ID

CPLD

Button Button

Power

Button

HUB

LCD

USB1 USB2

LED

Conn.

VGA

Conn.

TMP75

Pg. 1
Pg. 2

Block Diagram

Planar Conn., Buttons, Power LED & TMP75
Pg. 3 VGA Output System
Pg. 4 USB 2.0 Hub & Connectors
Pg. 5

CPLD, LCD, Coupons & Mounting Holes

STACKUP

2

3

BOARD OUTLINE

Planar Connector

PWR
Btn

CPLD

LCD Connector

USB
Hub

3

4

IDNMI

LED

Btn Btn

(5.65" x 1.25")

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

USB1

PWA Build Options
PWB
Schem.
Assy. Dwg. PK140

FN241
UU209
DX459

Production
Debug

USB2

VGA Connector

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,

0

EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY
OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN

1

WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC.
UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE
OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED
FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE
LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DRAWN

DESIGNED

CHECKED

APPROVED

APPROVED

APPROVED

APPROVED

RELEASED

A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO

ECO
ECO
ECO
ECO
ECO
ECO
ECO

TITLE

SCHEM,CNTL PNL,SV,DELL,PE,MLK

DWG NO.

DX459

DATE

3/26/2007 1 OF 5

DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE

INC.

ROUND ROCK,TEXAS

SHEET

4

REV.

X00

DCBA

A B C

PLANAR CONNECTOR

D

1

I2C_BMC_SEG3_VAUX_SCL

2

R1

1 2

0-5%

+3.3V

I2C_BMC_SEG3_VAUX_SCL_R

VID_FRONT_I2C_SCL

3

PS_ENABLE_N

5

VID_FRONT_HS_OUT

3

VID_FRONT_VS_OUT

3

VID_FRONT_RED

3

VID_FRONT_GREEN

3

VID_FRONT_BLUE

3

BTN_PWR_ON_N

2

BTN_NMI_N

2

USB_FRONT_P

4

CTRLPNL_CLK

5

CTRLPNL_MUX_S0

5

+5V+5V_AUX+3.3V_AUX +5V +3.3V

CP_PRES_N

J_PLANAR
1
3
5 6
7 8
9

11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
31 32
33 34
35 36
37 38
39

2
4

10

20

30

40

C24

ROOM=PLANAR_CONN

POWER-ON, ID, NMI BUTTONS

1

SW_PWR

1 2

R2

I2C_BMC_SEG3_VAUX_SDA_R

VID_FRONT_I2C_SDA

SP_PLANAR_10

FRONT_MONITOR_PRES_N

.1uF

1 2

10V-10%

ECAD: Place right next to connector

BTN_ID_RAW_N

USB_FRONT_N

SP_PLANAR_30

CTRLPNL_DATA

CTRLPNL_MUX_S1

1 2

0-5%

3

3

2

4

5

5

I2C_BMC_SEG3_VAUX_SDA

2

PUSHBUTTON

PWR SWITCH

SW_ID

21

PUSHBUTTON

PWR SWITCH

SW_NMI

1 2

PUSHBUTTON

PWR SWITCH

BTN_PWR_ON_N

BTN_ID_RAW_N

BTN_NMI_N

2

2

2

2

ADD*_UU209_PWB
ADD*_DX459_SCHEM
ADD*_PK140_ASSYDWG
ADD*_42610_LBL_PPID
ADD*_42753_LBL_REV
ADD*_CG254_LBL_UL

C15

1 2

+3.3V

VOLTAGE=3.3

C16

.1uF

10V-10%

VOLTAGE=0

2x20 2MM RA

SHR LATCH SLOT

Debouncing/pull-ups located on planar

2

+3.3V_AUX +5V_AUX+5V

VOLTAGE=3.3

21

.1uF

10V-10%

C18

21

C19

.1uF

10V-10%

.1uF

1 2

10V-10%

C20

21

.1uF

10V-10%

VOLTAGE=5

C21

1 2

.1uF

10V-10%

C22

NP*

21

.1uF

C23

X

10V-10%

1 2

VOLTAGE=5

C14

.1uF

10V-10%

21

.1uF

10V-10%

POWER LED

ROOM=PWR_LED

ECAD: Place at least one decoupling cap right next to connector

ECAD: Place at least one decoupling cap right next to connector

+3.3V_AUX

3

TMP75 TEMPERATURE MONITOR

ROOM=TMP75

I2C Address: 48h

I2C_BMC_SEG3_VAUX_SDA

2

I2C_BMC_SEG3_VAUX_SCL

2

NC_TMP75_ALERT_N

U_TMP75

1

SDA

2

SCL

3

ALERT

4 5

GND A2

VCC

A0
A1

+3.3V_AUX

8
7
6

+3.3V_AUX

C26

R21

NET_PHYSICAL_TYPE=10MILS

PWR_LED

5

.1uF

1 2

10V-10%

56-5%

1 2

C25

.1uF

1 2

10V-10%

Vf=2.2V

DS1

2 1

GRN LED

NET_PHYSICAL_TYPE=10MILS

Q1

D

3

1

G

S

2

2N7002

3

4

TMP75AID

R22

1 2

100-5%

I2C pull-ups are located on the planar

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,CNTL PNL,SV,DELL,PE,MLK

REV.

DX459

SHEET

3/26/2007 2 OF 5

DCBA

4

X00

1

A B C

FRONT VGA OUTPUT SYSTEM

On future design, L1 should be substituted with DPN KJ309 for derating purposes

+5V

21

C51

10uF

16V 10%

C27

D

ROOM=VGA

R53

21

.499-1%

L1

21

FERRITE

1812-1.5A

21

.1uF

10V-10%

C28

1 2

R50

1 2

.499-1%

.1uF

10V-10%

FS1

1 2

1.5A
6V

1

2

VID_FRONT_RED

2

VID_FRONT_GREEN

2

VID_FRONT_BLUE

2

R18

R17

R16

21

1 2

21

C13

150-1%

C10

150-1%

C9

150-1%

21

1 2

21

(200mA)

L5

1 2

MMZ1608R300A

50V

3.3pF
+/-0.25pF

(200mA)

L4

MMZ1608R300A

50V

3.3pF
+/-0.25pF

(200mA)

L3

1 2

MMZ1608R300A

50V

3.3pF
+/-0.25pF

VID_5VDCC

3

NP

21

C30

X

C12

1 2

21

21

C11

C8

1 2

50V

3.3pF
+/-0.25pF

50V

3.3pF
+/-0.25pF

3.3pF
+/-0.25pF

C29

J_VGA

VGA_RED_OUT
VGA_GREEN_OUT
VGA_BLUE_OUT

NC_VGA_4

21

.1uF

10V-10%

VGA_DDC_OUT_SDA
VGA_HS_OUT
VGA_VS_OUT
VGA_DDC_OUT_SCL

NC_VGA_11

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

DDC

DSUB_VGA

SCREW LOCK

FRONT_MONITOR_PRES_N

.1uF

10V-10%

ECAD: Place right next to connector

2

2

3

VID_FRONT_HS_OUT

2

Signed off on 0-ohms for this design

VID_FRONT_VS_OUT

2

L6 and L7 are required for EMI

VID_5VDCC

3

1 2

SUB*_J5713

(0-ohm resistor)

SUB*_J5713

(0-ohm resistor)

D13

2 1

L7

200mA

L6

200mA

NP*

VID_5VDCC

3

NP*

C2

X

21

NP*

C1

X

47pF

1 2

21

50V-5%

47pF

50V-5% 50V

NP*

NP*

NP*

D6

1

2

DDA204U

D9

1

2

DDA204U

D8

1

2

DDA204U

D7

1

3

X

3

X

3

X

NP*

NP*

NP*

3

DDA204U

3

DDA204U

3

DDA204U

D10

1

2

X

D11

1

2

X

D12

1

2

X

VID_5VDCC

3

3

4

VID_FRONT_I2C_SDA

2

VID_FRONT_I2C_SCL

2

1N914

SOD123

21

R34

R35

2.2K-5%

1 2

2.2K-5%

R3

0-5%

R4

1 2

0-5%

3

2

DDA204U

21

X

4

INC.

TITLE

ROUND ROCK,TEXAS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM,CNTL PNL,SV,DELL,PE,MLK

REV.

DX459

SHEET

3/26/2007 3 OF 5

DCBA

X00

A B C

USB 2.0 HUB

D

USB CONNECTORS

ROOM=USB_CONN

+3.3V

1

2

3

NP*

D5

1 3

X

+3.3V

R15

BAR43

C42

1 2

1 2

100K-5%

.1uF

10V-10%

USB_FRONT_N

2

USB_FRONT_P

2

USB_FRONT1_N

4

USB_FRONT1_P

4

USB_FRONT2_N

4

USB_FRONT2_P

4

NC_USB_FRONT3_N
NC_USB_FRONT3_P
NC_USB_FRONT4_N
NC_USB_FRONT4_P

+3.3V

R9

1 2

4.7K-5%

26

BUSPOWER

46

RESET

17

D-

18

D+

13

DD-1

14

DD+1

9

DD-2

10

DD+2

5

DD-3

6

DD+3

1

DD-4

2

DD+4

V1

V1

V2

V2

V3

V3

V4

V4

V5

V5

V6

V6

V7

V7

V8

V8

V9

V9

V10

V10

V11

V11

V12

V12

V13

V13

V14

V14

V15

V15

V16

V16

V17

V17

V18

V18

V19

V19

V20

V20

V21

V21

V22

V22

V23

V23

V24

V24

V25

V25

V26

V26

V27

V27

V28

V28

V29

V29

V30

V30

V31

V31

V32

V32

V33

V33

V34

V34

V35

V35

V36

V36

U_USB

XIN

XOUT

GREEN_1
AMBER_1
GREEN_2
AMBER_2
GREEN_3
AMBER_3
GREEN_4
AMBER_4

PWR_1
OVR_1
PWR_2
OVR_2
PWR_3

OVR_3

PWR_4
OVR_4

SPI_CS

SPI_SCK

SPI_SD

VCC_3

VCC_7
VCC_11
VCC_15
VCC_19
VCC_23
VCC_27
VCC_33
VCC_39
VCC_45
VCC_55

GND_4

GND_8
GND_12
GND_16
GND_20
GND_24
GND_28
GND_34
GND_40
GND_47
GND_50
GND_56

21
22

35
36
37
38
41
42
43
44

29
30
31
32
54
53
52
51
25
48
49

3
7
11
15
19
23
27
33
39
45
55

4
8
12
16
20
24
28
34
40
47
50
56

+3.3V

USB_XTAL_IN

USB_XTAL_OUT

NC_USB_LEDGRN1_N
NC_USB_LEDAMB1_N
NC_USB_LEDGRN2_N
NC_USB_LEDAMB2_N
NC_USB_LEDGRN3_N
NC_USB_LEDAMB3_N
NC_USB_LEDGRN4_N
NC_USB_LEDAMB4_N

NC_USB_PWR1_N

NC_USB_PWR2_N

NC_USB_PWR3_N

NC_USB_PWR4_N

USB_SPI_CS_N

USB_SPI_SCK

USB_SPI_SD

21

R25

4.7K-5%

USB_OC_N

USB_OC_N

ECAD: Verify a ground plane is below crystal
ECAD: Route lines "differentially" where possible

+3.3V

R8

21

R7

4.7K-5%

1 2

4.7K-5%

4

4

4
4
4

Hub Properties

VID: 0x04B4
PID: 0x6560
DID: 0x0007

C4

1 2

X1

24MHz

27pF 50V

ROOM=USB

21

21

C5

27pF 50V

USB_OC_N

4

+5V

FS2

1 2

1.5A
6V

21

R54

ECAD: Length matched ±5mils

Signed off on 0-ohms for this design

L8 and L9 are required for EMI

ECAD: Length matched ±5mils

100-5%

ECAD: Route traces/shapes symmetrically out of U_USB_PWR_SWITCH

USB_FRONT1_N

4

USB_FRONT1_P

4

USB_FRONT2_N

4

USB_FRONT2_P

4

U_USB_PWR_SWITCH

1

GND

2

IN

3

EN_1

4

EN_2

TPS2062DGN

ECAD: <500mils; Length matched ±5mils

ECAD: <500mils; Length matched ±5mils

USB EEPROM

EPAD

OC_1
OUT_1
OUT_2

OC_2

21

R49

4.7K-5%

8
7
6
5

DLW21SN900SQ2

CM CHOKE

4

4

1 2

1 2

L9

SUB*_8M262

(0-ohm resistor)

DLW21SN900SQ2

CM CHOKE

4

4

1 2

L8

SUB*_8M262

(0-ohm resistor)

3

3

3

3

21

R52

NP

1 2

0-5%

R51

NP

1 2

0-5%

L10

FERRITE

1812-1.5A

D1

NP*

X

D3

NP*

X

X
X

21

D2

NP*

X

1 2

ESD SUPPRESSOR

1 2

21

D4

NP*

X

1 2

ESD SUPPRESSOR

+5V

21

1 2

ESD SUPPRESSOR

1 2

ESD SUPPRESSOR

1 2

+5V

C56

J_USB1

1
2
3
4

USB

SILKSCREEN=USB1

J_USB2

1
2
3
4

USB

SILKSCREEN=USB2

1 2

C43

.1uF

10V-10%

21

.1uF

10V-10%

ROOM=USB

C3

C44

C45

12

+

220uF-6.3V

.1uF

1 2

21

.1uF

1

10V-10%

2

10V-10%

3

C52

CY7C65640

+3.3V

USB_SPI_CS_N

4

USB_SPI_SD

4

NP*

+3.3V

NP*

R47

X

4.7K-5%

1 2

NP*

U_USB_EEPROM

1

CS

2

SO

3

WP

4 5

VSS SI

VCC

HOLD

SCK

+3.3V

NP*

21

+3.3V

R45

X

8
7
6

NP*

R46

X

4.7K-5%

1 2

4.7K-5%

USB_SPI_SCK

USB_SPI_SD

4
4

X

R48

21

10uF

21

C53

16V 10%

10uF

16V 10%

C41

21

1 2

10V-10%

C40

.1uF

.1uF

10V-10%

C39

.1uF

1 2

21

C38

10V-10%

.1uF

10V-10%

C37

21

1 2

10V-10%

C32

.1uF

.1uF

10V-10%

C36

.1uF

1 2

21

C35

10V-10%

.1uF

10V-10%

C34

.1uF

1 2

21

C33

10V-10%

.1uF

10V-10%

C31

.1uF

1 2

10V-10%

X

1 2

100-5%

25C040S

Blank IC P/N
Programmed IC P/N
DSK Prog P/N

P0373
D3098
D3100

4

ECAD: Place close to U_USB_EEPROM

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,CNTL PNL,SV,DELL,PE,MLK

REV.

DX459

SHEET

4 OF 53/26/2007

DCBA

4

X00

1

2

CPLD

CTRLPNL_DATA

2

CTRLPNL_CLK

2

C54

A B C

ROOM=CPLD

+3.3V_AUX

U_CPLD

OE1

85TJN
MC594
MC595

44
43
42
35
34
33
31
28
27
25
23
22
21

38
40
39
37

26
1
32
7

LCD_ENABLE

NC_CPLD_35
NC_CPLD_34
NC_CPLD_33
NC_CPLD_31
NC_CPLD_28
NC_CPLD_27
NC_CPLD_25
NC_CPLD_23

PS_ENABLE_N

CPLD_TDI
CPLD_TDO

LCD_R

LCD_RS

PWR_LED

5

5

5

5

21

R12

5
5
5

2
2

R30

+3.3V_AUX

R13

4.7K-5%

1 2

1 2

100-5%

4.7K-5%

21

R31

21

R14

100-5%

4.7K-5%

CPLD_TCK
CPLD_TDO
CPLD_TDI
CPLD_TMS

+3.3V_AUX

X

J_JTAGNP*
1
2
3
4
5
6

LCD_DB4

5

LCD_DB5

5

LCD_DB6

5

LCD_DB7

5

LCD_AMBER_N

5

LCD_WHITE_N

R6

1 2

R33

1K-5%

21

1 2

10K-5%

1 2

10K-5%

.1uF

R5

1K-5%

+3.3V_AUX

21

10uF

21

C47

16V 10%

.1uF

10V-10%

C48

21

R32

21

C49

10V-10%

NP*

C6

.1uF

10V-10%

X

1 2

C50

1 2

NP*

C7

68pF

X

50V-5%

.1uF

10V-10%

5

CTRLPNL_MUX_S1

2

CTRLPNL_MUX_S0

2

CTRLPNL_DATA_IN
CTRLPNL_DATA_OUT
CTRLPNL_CLK_IN
CTRLPNL_CLK_OUT

NC_CPLD_20

21

68pF

50V-5%

2

IO1

3

IO2

5

IO3

6

IO4

8

IO5

10

IO6

12

IO7

13

IO8

14

IO9

15

IO10

18

IO11

19

IO12

20

IO13

9

VCCIO1

29

VCCIO2

17

VCCINT1

41

VCCINT2

16

GNDINT1

36

GNDINT2

4

GNDIO1

11

GNDIO2

24

GNDIO3

30

GNDIO4

EPM3032A_CPLD

TFTP44_P8MM_P1UR

SUB*_MC594

Blank IC P/N
Programmed IC P/N
DSK Prog P/N

IO26
IO25
IO24
IO23
IO22
IO21
IO20
IO19
IO18
IO17
IO16
IO15
IO14

OE2/GCLK2

GCLR
GCLK

IO/TCK
IO/TDI
IO/TDO
IO/TMS

LCD PANEL

LCD_RS

5

LCD_R

5

LCD_ENABLE

5

LCD_DB4

5

LCD_DB5

5

LCD_DB6

5

LCD_DB7

5

LCD_AMBER_N

5

NET_PHYSICAL_TYPE=10MILS

LCD_WHITE_N

5

NET_PHYSICAL_TYPE=10MILS

R43

1 2

0-5%

R36

0-5%

R37

1 2

0-5%

R38

0-5%

R39

1 2

0-5%

R40

0-5%

R41

1 2

0-5%

R42

0-5%

R44

1 2

0-5%

21

21

21

21

NET_PHYSICAL_TYPE=10MILS

NET_PHYSICAL_TYPE=10MILS

LCD_RS_R
LCD_R_R
LCD_ENABLE_R
LCD_DB4_R
LCD_DB5_R
LCD_DB6_R
LCD_DB7_R
LCD_AMBER_N_R
LCD_WHITE_N_R

R10

LCD_V0

1 2

R11

2.2K-5%

+5V_AUX

21

4.7K-5%

D

J_LCD

1
2
3
4
5
6
7
8

9
10
11
12

12 PIN ZIF

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

FLEX

SMT

13
14
15
16
17
18
19
20
21
22
23
24

ROOM=LCD

NC_LCD_13
NC_LCD_14
NC_LCD_15
NC_LCD_16
NC_LCD_17
NC_LCD_18
NC_LCD_19
NC_LCD_20
NC_LCD_21
NC_LCD_22
NC_LCD_23
NC_LCD_24

+5V_AUX

C55

21

10uF

21

C46

16V 10%

.1uF

1

2

10V-10%

3

The Altera EPM3032A is compatible with the Xilinx XCR3032XL for this design

IMPEDANCE COUPONS

Z_TOP_50_END

NP*

NP*

3

RY

COUPON TEST

NETNAME=GND_TAB

Z_TOP_50

ZSE3PINS2R

IMP_TOP_50

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

NETNAME=GND_TAB

1

1

2

2

3

3

IMPEDENCE SINGLE END

TEST POINT

NP*

1

RX

3

RY

COUPON TEST

NETNAME=GND_TAB

Z_TOP_D90

ZDI4PINS2R

IMP_TOP_D90_P

2

+

PROPAGATION_DELAY=L:S:5995:6005

IMP_TOP_D90_N

4

-

PROPAGATION_DELAY=L:S:5995:6005

ROOM=COUPONS

Z_TOP_D90_END

NP*

1

1

2

2

3

3

4

4

IMPEDENCE DIFFERENTIAL

TEST POINT

MOUNTING HOLES

MH3MH2MH1

GND

2
3
4
5
6
7
8
9

NP.125
SQ.225 PAD
8 GND VIAS

GND

2
3
4
5
6
7
8
9

NP.125
SQ.225 PAD
8 GND VIAS

GND

NP.125
SQ.225 PAD
8 GND VIAS

3

2
3
4
5
6
7
8
9

4

Z_BOT_50_END

NP*

NP*

Z_BOT_50

1 2

3

RY

ZSE3PINS2R

COUPON TEST

+RX

IMP_BOT_50

PROPAGATION_DELAY=L:S:5995:6005

1

1

2

2

3

3

IMPEDENCE SINGLE END

TEST POINT

NETNAME=GND_TABNETNAME=GND_TAB

NP*

NETNAME=GND_TAB

Z_BOT_D90

1

RX

3

RY

ZDI4PINS2R

COUPON TEST

IMP_BOT_D90_P

2

+

PROPAGATION_DELAY=L:S:5995:6005

IMP_BOT_D90_N

4

-

PROPAGATION_DELAY=L:S:5995:6005

Only one set of coupons are needed per panel (placed on the breakaway)

NETNAME=GND_TAB

Z_BOT_D90_END

NP*

1

1

2

2

3

3

4

4

IMPEDENCE DIFFERENTIAL

TEST POINT

NETNAME=GND_TAB

4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,CNTL PNL,SV,DELL,PE,MLK

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

DX459

SHEET

3/26/2007 5 OF 5

DCBA

X00