MSI MS-9574 Schematic 0A

ABC

Acknowledge: This Design Is Leveraged From Mark Shelton's Landrover 1x2 BP Design

REVISIONS

REV

X00 INITIAL PROTOTYPE
X01 PROTOTYPE UNIT TEST BUILD
X02 PROTOTYPE PRODUCT TEST BUILD

DESCRIPTIONECO DATE

D

APPROVED

7/28/03
8/21/03
12/10/03

1

Corvette 1x2 SCSI BP

1

TABLE OF CONTENTS

I2C

FRU

IPMB

PWRGOOD

12V and 5V

POWER

CONNECTOR

SIGNAL

DRIVE PRESENCE<0..1>

BACKPLANE/DTR

MATING

CONNECTOR

SCSI BUS A

CONNECTOR

2

FAULT

LEDS

PAGE DESCRIPTION

1 BLOCK DIAGRAM
2

ROUTING & OTHER RULES, STACKUP

3

BP/DTR MATING & SCSI CONNECTORS

LVD SCSI SLOTS 0 - 1

4
5

I2C CIRCUITRY and 3.3V LDO

6

PWRCONN and SIGCONN

7

IMP. COUPONS,GND CLIPS,CPTV SCREWS

SCHEMATIC IS CONFIGURED TO USE
THE XLBOM UTILITY:

BUILD0 IS PROTOTYPE BUILD
BUILD1 IS PRODUCTION BUILD

2

ACTIVITY

LEDS

SCSI ID0

ONLINE

LEDS

SCSI ID1

3

3

LVD SCSI

CONNECTOR A

A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO

ECO
ECO
ECO
ECO
ECO
ECO

4

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER
CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN
ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE
REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION
OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE
INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS
NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH
THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF
DELL COMPUTER CORPORATION.

PROPRIETARY NOTE

DRAWN

DESIGNED

CHECKED

APPROVED

APPROVED

APPROVED

APPROVED

RELEASED

Mark Shelton/Dan Rao

M. Shelton/D. Rao/J. Melanson/R. Hemingway

ECO

TITLE

SCHEM, BKPLN, 1X2, PE2800

DWG NO.

DATE

D1392

12/5/2003 1 OF 7

DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE

COMPUTER
CORPORATION
AUSTIN,TEXAS

SHEET

REV.

X02

4

-03

DCBA

ABC

D

STACKUP AND ROUTING RULES

1

NOTE ON COMPONENT PLACEMENT:

--> ALL COMPONENTS SHOULD BE PLACED ON THE TOP SIDE IF POSSIBLE EXCEPT:

SCSIA, PWRCONN, SIGCONN CONNECTORS

NOTE ON SCSI ROUTING RULES:

--> SCSI SIGNALS ARE NAMED SCSI_D_*. THERE ARE 27 DIFFERENTIAL PAIRS.
THEY HAVE FIRST PRIORITY WHEN ROUTING.

--> AVOID VIAS WHENEVER POSSIBLE. USE THE SAME NUMBER OF VIAS BETWEEN PAIRS
IF UNAVOIDABLE.

--> ROUTE SCSI_D_SREQ* AND SCSI_D_SACK* FIRST. ISOLATION FROM OTHER PAIRS IS

1.5X (22MIL) SINCE THEY ARE MORE SUSCEPTIBLE TO CROSSTALK.

--> TRY TO ROUTE ALL THE ± DIFFERENTIAL SIGNALS ON INNER LAYERS (IN1-2 & IN5-6)
IF POSSIBLE AS EDGE COUPLED DIFFERENTIAL PAIRS.

--> ALL SCSI SIGNALS SHALL BE LENGTH MATCHED TO WITHIN 100MILS ~17PS WITHIN BUS

AND VARIATION WITHIN PAIR SHALL BE < 5 MILS. RULE FILE WILL BE PROVIDED
TO ACHIEVE THIS.

--> SCSI TRACE WIDTH AND SPACING MUST BE MAINTAINED AS IN THE TABLE. THE ONLY

2

ACCEPTABLE DEVIATION FROM THE SPACING IS WHERE THE SIGNALS MUST ROUTE
THROUGH THE Z-PACK CONNECTOR

PWB Impedance Reference Table

PWB PN: D1391
Program Name: Corvette
PWB Name: Corvette 1x2 SCSI Backplane
PWB Revision: x00
PWB Thickness: 0.100"
Date: 10/21/2003 PWC

Bus
Z Type
Freq.(MHz)
Target Z (ohms)
Z tolerance

Finished Dielect Tolerance

Layer Lyr Type Cu Wt Thickness

1 Top 1.5 oz 2.1 5/11/5/30 (120.5) Ref L2 Allowed

Prepreg 8.0 +/-2 mil 4.3

2 GND 1 oz 1.4

Core 7.0 +/-1 mil 4.3

3 IN1 1/2 oz 0.7

Prepreg 20.0 +/-3 mil 4.3

Er

1

SCSI Clocks

Differential

120

+/- 10%

Trace/ Space / Trace/space_to_other pair Layer Restrictions

GND GND

2

4/10/4/15 (119.1) Ref L2&L5 Allowed

GENERAL (NON-SCSI) ROUTING RULES:

--> FOR EXTERNAL LAYERS (TOP AND BOTTOM), USE 6 MIL TRACE,
6MIL SPACING FOR 60 OHM SIGNALS.

--> FOR INTERNAL LAYERS (IN1 AND IN2), USE 6 MIL TRACE
12MIL SPACING FOR 60 OHM SIGNALS.

--> ALL NON-SCSI TRACES SHALL BE ISOLATED FROM LVD SCSI SIGNALS BY 50MILS.

--> I2C SIGNALS SHOULD BE ROUTED SERIALLY. THERE SHOULD NOT BE ANY LONG

STUBS OR BRANCHES.

TRY TO KEEP THESE SIGNALS AWAY FROM SCSI LVD SIGNALS.

POWER SIGNALS ROUTING RULES:

--> TRY TO USE ISLANDS FOR ALL POWER SIGNALS WITH NO POWER PLANE.
IF ISLANDS ARE NOT POSSIBLE, USE AT LEAST 30 MIL TRACES.

--> USE MULTIPLE VIAS WHERE THE POWER SIGNALS CHANGE LAYERS,

3

I.E. FROM THE POWER SOURCE ON THE TOP/BOTTOM LAYER

TO THE POWER PLANE ON THE INNER LAYER

--> FOR LARGE CERAMIC CAP PACKAGE, I.E. 1210 PACKAGE, USE MULTIPLE VIAS AND MAKE SURE
THE TRACE IS KEPT AS SHORT AS POSSIBLE.

--> SHORTEN THE PATH FROM THE CAPACITOR PADS TO THE GROUND VIAS (10MIL < L < 20MIL)

AND KEEP THE TRACE AT LEAST 20MILS WIDE TO REDUCE INDUCTANCE.

--> DO NOT SHARE POWER OR GROUND VIAS FOR DECOUPLING CAPS.

TESTABILITY AND TOOLING HOLE:

--> REFER TO SEPERATE TESTABILITY DOCUMENT TEST POINT PLACEMENT REQUIREMENT.

--> AT LEAST THREE TOOLING HOLES MUST BE INCLUDED ON THE BOARD.

4 IN2 1/2 oz 0.7

Core 7.0 +/-1 mil 4.3

5 VCC 1 oz 1.4

Prepreg 5.0 +/-2 mil 4.3

6 Gnd2 1 oz 1.4

Core 7.0 +/-1 mil 4.3

7 IN5 1/2 oz 0.7

Prepreg 20.0 +/-3 mil 4.3

8 IN6 1/2 oz 0.7

Core 7.0 +/-1 mil 4.3

9 VC2 1 oz 1.4

Prepreg 8.0 +/-2 mil 4.3

10 Bot 1.5 oz 2.1

Total Thickness 101.6 +/- 10mil

4/10/4/15 (119.1) Ref L2&L5 NOT ALLOWED

VCC VCC

Gnd2 Gnd2

4/10/4/15 (119.1) Ref L6&L9 Allowed

4/10/4/15 (119.1) Ref L6&L9 NOT ALLOWED

3

VC2 VC2

5/11/5/30 (120.5) Ref L9 NOT ALLOWED

SILKSCREEN:

--> ALL COMPONENTS SHOULD HAVE PIN 1 LABELED.

--> ON MANY PIN COMPONENTS AND CONNECTORS, THERE SHOULD BE A TICK MARK EVERY 10 PINS.

--> ALL REFERENCE DESIGNATORS SHALL BE VISIBLE WHEN THE PARTS ARE PLACED.

4

IMPEDANCE COUPON:

--> PLEASE FOLLOW THE SEPERATE IMPEDANCE COUPON DOCUMENT FOR SPECIFIC REQUIREMENT.

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER
CORPORATION

TITLE

SCHEM, BKPLN, 1X2, PE2800

DWG NO.

DATE

D1392

12/5/2003 2 OF 7

AUSTIN,TEXAS

SHEET

DCBA

REV.

4

X02

ABC

D

BP/DTR CONNECTOR AND SCSI CONNECTOR

+3.3V

BACKPLANE/DAUGHTER BOARD MATING

1

R8

21

2

3

4

CONNECTOR (110 PIN)

+5V

GEM_I2C_ADDR0

NC_LEDFALT4_N
NC_LEDONLN4_N

220

SCSI_D_SD10-

3,4

SCSI_D_SD10+

3,4

SCSI_D_SD8-

3,4

SCSI_D_SD8+

3,4

SCSI_D_SREQ-

3,4

SCSI_D_SREQ+

3,4

SCSI_D_SSEL-

3,4

SCSI_D_SSEL+

3,4

SCSI_D_SRST-

3,4

SCSI_D_SRST+

3,4

SCSI_D_SBSY-

3,4

SCSI_D_SBSY+

3,4

3
3

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

4

+3.3V

HD_PRES3_N
HD_PRES4_N

SCSI_D_SDP0­SCSI_D_SDP0+

SCSI_D_SD6­SCSI_D_SD6+

SCSI_D_SD4­SCSI_D_SD4+

SCSI_D_SD2­SCSI_D_SD2+

SCSI_D_SD0­SCSI_D_SD0+

SCSI_D_SD15­SCSI_D_SD15+

SCSI_D_SD13­SCSI_D_SD13+

HD_PRES1_N

LEDONLN0_N

4

I2C1_CLK_DC

5

LEDFALT0_N

4

I2C1_SDA_DC

5

NC_JTAG_TDO

IPMB_RST_N

6

+3.3V

C2

12

22uF 10V

12

C5

6/12/03 Match pin out v2.0

12

C3

0.1uF 16V

E10
D10

E11
D11

E15
D15

E16
D16

E17
D17

E18
D18

E19
D19

E20
D20

E21
D21

E22
D22

E23
D23

E24
D24

E25
D25

12

C6

0.1uF 16V

DTRCONN

MALE

A10

B10

C10

A11

B11

C11

A15

B15

C15

A16

B16

C16

A17

B17

C17

A18

B18

C18

A19

B19

C19

A20

B20

C20

A21

B21

C21

A22

B22

C22

A23

B23

C23

A24

B24

C24

A25

B25

C25

A1

B1

C1

A2

B2

C2

A3

B3

C3

A4

B4

C4

A5

B5

C5

A6

B6

C6

A7

B7

C7

A8

B8

C8

A9

B9

C9

E1

E1

D1

D1

E2

E2

D2

D2

E3

E3

D3

D3

E4

E4

D4

D4

E5

E5

D5

D5

E6

E6

D6

D6

E7

E7

D7

D7

E8

E8

D8

D8

E9

E9

D9

D9

E10

D10

E11

D11

E15

D15

E16

D16

E17

D17

E18

D18

E19

D19

E20

D20

E21

D21

E22

D22

E23

D23

E24

D24

E25

D25

VERTICAL PLUG

HM CONN

DPN: 3729R

PRESS FIT

ROOM=DTRCONN

0.1uF 16V

A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
A10
B10
C10
A11
B11
C11

A15
B15
C15
A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
A21
B21
C21
A22
B22
C22
A23
B23
C23
A24
B24
C24
A25
B25
C25

C2_PRES_N

NC_LEDONLN3_N
NC_LEDONLN2_N
DC_PWRGOOD
LEDONLN1_N

CONNB_PRES_N

CONNA_PRES_N
C2_HAS_ID_0_N

SCSI_D_DIFFSENS

SCSI_D_SD11+
SCSI_D_SD11-

NC_GEM_I2C_ADDR1
SCSI_D_SD9+
SCSI_D_SD9-

SCSI_D_SIO+
SCSI_D_SIO-

SCSI_D_SCD+
SCSI_D_SCD-

SCSI_D_SMSG+
SCSI_D_SMSG-

SCSI_D_SACK+
SCSI_D_SACK-

SCSI_D_SATN+
SCSI_D_SATN-

SCSI_D_SD7+
SCSI_D_SD7­NC_BUS_SPLIT_N

SCSI_D_SD5+

SCSI_D_SD5-

SCSI_D_SD3+
SCSI_D_SD3-

SCSI_D_SD1+

SCSI_D_SD1-

SCSI_D_SDP1+

SCSI_D_SDP1-

SCSI_D_SD14+

SCSI_D_SD14-

SCSI_D_SD12+
SCSI_D_SD12-

HD_PRES0_N

PCI_RESET_N
NC_JTAG_TMS

ISO_IPMB_DATA
ISO_IPMB_CLK

NC_JTAG_TCK
NC_JTAG_TDI

NC_LEDFALT2_N

DC_SERIAL_ID_LATCH

DC_SERIAL_ID_DATA

DC_SERIAL_ID_CLOCK

NC_LEDFALT3_N

LEDFALT1_N

HD_PRES2_N

+5V

21

C1

12

C4

22uF 10V

12

C7

0.1uF 16V

R10

4.7K

12

6
4

3

3,4
3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4
3,4

3,4

3,4

3,4

3,4

3,4
3,4

3,4
3,4

3,4
3,4

4

6

6
6

4
3

12

C8

0.1uF 16V

+3.3V

R6

12

R211

21

R1

R3

220

21

21

0.1uF 16V

4.7K

220

220

R4

220

21

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

ADD1=ADD*_D1391_PWB
ADD2=ADD*_D1392_SCH

ADD3=ADD*_D1393_ASSY_DWG
ADD4=ADD*_42610_BAR
ADD5=ADD*_42753_REV

DTRCONN

COMPONENT

FRONT VIEW

WIDE

123 11

E

D
C
B

A

A

B
C
D

E

123 11

3

3

3

HD_PRES2_N

HD_PRES3_N

HD_PRES4_N

15 25

KEY

NARROW

KEY

DTRCONN

COMPONENT

BOTTOM VIEW

MOUNTING

PEG

+3.3V

R7

4.7K

12

15 25

R11

4.7K

12R912

4.7K

3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4

3,4

3,4

3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4

PLACE NEAR BACKPLANE/DAUGHTER BOARD

MATING CONNECTOR (DTRCONN)

--- AVOID PLACING DECOUPLING CAPS TO CONNECTOR PINS WITH LONG TRACES (>25MILS)

--- INSTEAD, PLACE CAPS AS CLOSE TO CONNECTOR AS POSSIBLE, AND TIE THEM
DIRECTLY TO POWER PLANE WITH VERY SHORT TRACES

--- EACH CAP SHOULD HAVE ITS OWN POWER/GND PAIR. AVOID SHARING VIAS.

SCSI_D_SD12+
SCSI_D_SD13+
SCSI_D_SD14+
SCSI_D_SD15+
SCSI_D_SDP1+
SCSI_D_SD0+
SCSI_D_SD1+
SCSI_D_SD2+
SCSI_D_SD3+
SCSI_D_SD4+
SCSI_D_SD5+
SCSI_D_SD6+
SCSI_D_SD7+
SCSI_D_SDP0+

SCSI_D_DIFFSENS
NC_TRMPWR_D_17
NC_TRMPWR_D_18
NC_A_19

SCSI_D_SATN+

CONNA_PRES_N

3

SCSI_D_SBSY+
SCSI_D_SACK+
SCSI_D_SRST+
SCSI_D_SMSG+
SCSI_D_SSEL+
SCSI_D_SCD+
SCSI_D_SREQ+
SCSI_D_SIO+
SCSI_D_SD8+
SCSI_D_SD9+
SCSI_D_SD10+
SCSI_D_SD11+

SCSI 68-PIN CONNECTOR A

SCSIA

RCPT

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

SCSI_D_SD12­SCSI_D_SD13­SCSI_D_SD14­SCSI_D_SD15­SCSI_D_SDP1­SCSI_D_SD0­SCSI_D_SD1­SCSI_D_SD2­SCSI_D_SD3­SCSI_D_SD4­SCSI_D_SD5­SCSI_D_SD6­SCSI_D_SD7­SCSI_D_SDP0-

CONNA_PRES_N

NC_TRMPWR_D_51
NC_TRMPWR_D_52

NC_M_53

SCSI_D_SATN-

SCSI_D_SBSY­SCSI_D_SACK­SCSI_D_SRST­SCSI_D_SMSG­SCSI_D_SSEL­SCSI_D_SCD­SCSI_D_SREQ­SCSI_D_SIO­SCSI_D_SD8­SCSI_D_SD9­SCSI_D_SD10­SCSI_D_SD11-

TITLE

SCHEM, BKPLN, 1X2, PE2800

DWG NO.

DATE

D1392

12/5/2003

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

ROOM=SCSIA

Mechanical Parts:

ADD6=ADD*_Y2657_FORMEX

3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4

3,4

3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4
3,4

COMPUTER
CORPORATION
AUSTIN,TEXAS

+3.3V

R5

4.7K

12

REV.

SHEET

3 OF 7

1

3

2

3

4

X02

DCBA