MSI MS-9573 Schematic 140

Page 1
A B C
Dell Controlled Print
D
REVISIONS
Mechanical adds are on pages 4, 6, 13, 16, 35
REV
A00
DESCRIPTIONECO DATE
Production by Ross Amans164200
06/22/04
APPROVED
Randy Hemingway
Corvette 5U Riser
Part number subs on pages 10, 14, 30, 36
Programmables on pages 10 (U16), 14 (U14), and 36 (U31)
With Hot Plug PCI Express Slots
Debug parts on pages 10, 13, 27, 36
1
ROMB DDR2 DIMM
A01 A02 A03 A04 A05 A06
Spin by Ross Amans167100 166975 Spin by Ross Amans 09/08/04 Randy Hemingway 170371 New schematic for M8938 & M8871 PWAs
Changed CPLD to D-Rev (dell p/n: W8714) 10/21/04 Scott Ramsey171598 171436
177371
Added Xilinx Glitch workaround 10/29/04
Added current limit resistor on the 3.3V_RSR to the dimm SPD voltage
Page 1. Page 2. Page 3.
BLOCK DIAGRAM, INDEX IDSEL/REQ/GNT/INT TABLE Blank
08/11/04
10/10/04 Scott Ramsey
02/22/05
Randy Hemingway
Scott Ramsey Neeraja Gedela
1
Page 4. Page 5. Page 6. Page 7. Page 8. Page 9. Page 10. Page 11. Page 12. Page 13. Page 14. Page 15. Page 16. Page 17. Page 18.
SCSI B (U320)
DDR2 400
PCI EXPRESS x8 x8 SLOT
PCI EXPRESS x4 x8 SLOT
C
HOT PLUG
B lo
Chassis Slot 7
Chassis Slot 6
PCIE Slot 7
PCIE Slot 6
DOBSON
Differential
Terminators
2
SCSI A (U320)
LSI1030
(SCSI)
CHNL A
A_PCIX
80332
500MHz
CHNL B
PCIX1
PCIX 1.0 (133MHz)
64bit, 3.3V
PCI Slot 5
Chassis Slot 5
6X25 HS3 CONNECTOR TO PLANAR GOLD FINGERS TO PLANAR, SCSI CONNS TO BP DOBSON MEMORY INTERFACE DOBSON PCIX INTERFACE DOBSON PCI EXPRESS DOBSON GND POWER BATT DOBSON FLASH NVRAM ROMB BATT CNTRL CKT ROMB MISC SCSI LSI 1030 SCSI LSI 1030 SCSI TERM PXH PCI INTERFACE PXH POWER PXH PCI EXPRESS, GND, PXH DECOUPLING
2
A Lo
SCSI B
SCSI A
x4 PCI Express
CHNL A
PCIX3
PCIX 1.0 (133 MHz)
64bit, 3.3V
PCI Slot 4
Chassis Slot 4
Page 19. Page 20. Page 21. Page 22.
5V 32BIT LEGACY PCI SLOT 1 5V 32BIT LEGACY PCI SLOT LEVEL SHIFTERS PCIX SLOT 2
PCIX SLOT 3 Page 23. Page 24.
PXH
PCIX 1.0 (133 MHz)
64bit, 3.3V
PCIX 1.0 (133 MHz)
64bit, 3.3V
LEGACY PCI 32b/33M 5V
Part
Intel Part #
Dell P/N
x4 PCI Express
ACA
Lo Hi
Lo
A hi
I6700
C Hi
CHNL B
PCIX2
B Lo
3
Lindenhurst Tumwater Dobson PXH PXH-D LSI 1030 PXH, Dobson Heatsink, Clip F2085, Y1978
/ LSI 1020 / D4195 C0Y3556 C0
E7520, NQ82001 E7525, NQE7525MCH R1806 C2 IOP332, NQ80332 I6700, NQ80000 ???, NQ80001 53C1030, 62036A1
R7626 C4, W6123 C2, N1312 C2, U5928 C1
M6627 C1, F5290 C0
Y5218 C1 C5604 C0
NEW PWAs:
M8871 - A00 PWB w/ Xilinx Rework M8938 - A01 PWB w/ Xilinx Rework
6x25 HS3 Connector
T8384 - New PWA which has PWB A02 (includes FET for Xilinx workaround)
202 pin Gold Fingers Card Edge
Input/Output Series resistor Series resistor with pull-down Defaults high VAux rail VBat rail
Chassis Slot 3
Chassis Slot 2
Chassis Slot 1
PCI Slot 3
PCI Slot 2
PCI Slot 1
Page 25. Page 26. Page 27. Page 28. Page 29. Page 30. Page 31. Page 32. Page 33. Page 34. Page 35. Page 36. Page 37. Page 38. Page 39. Page 40. Page 41. Page 42. Page 43. Page 44. Page 45.
PCIX SLOT 4
PCIX SLOT 5
PCI EXPRESS SLOT 6
PCI EXPRESS SLOT 7
DEBUG HEADERS
LINEARS, INVERTOR
DC2DCs
INTRUSION/FRU/TEMP SENSOR
PCI EXPRESS HOT PLUG SWITCHES, LEDS
PCI EXPRESS HOT PLUG LOGIC
PCI EXPRESS HOT PLUG LOGIC
Virtual points for PCI-X shared slot simulation, Spare Gates
COUPONS, HARDWARE
CPLD
POWERGOOD BLOCK DIAGRAM
I2C ISOLATION, I2C BLOCK DIAGRAM, I2C ADDRESS CHART
PME BLOCK DIAGRAM
RESET BLOCK DIAGRAM
POWER DISTRIBUTION BLOCK DIAGRAM
CLOCK BLOCK DIAGRAM
INT BLOCK DIAGRAM
JTAG BLOCK DIAGRAM
HOT PLUG BLOCK DIAGRAM
3
8C288LSI SCSI Heatsink
ROMB Battery G3399
Clear
A1, A2
XLBOM Build Options
1U, Production 2U/5U Production
0A0 RedRed 1
GC654 - New PWA - Changes to limit the current to the ROMB SPD
PWB/Silk ColorPWB Color Chipset Rev
x00White
PWA:
PWB:
GC654 DC876
x01WhiteRed
SCHEM:
F1314
Corvette 5U RISER
Clear White x01
Green
B0, C0, C1
4
1U, Debug 2 2U/5U Debug 3
Clear White x02 Green Yellow x03
WhiteGreen
x04
Green White a00
EXPORT RESTRICTION:
THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.
ASSY DWG:
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
HC375
OD/Output Pullup
2-24-2005_14:21
DRAWN DESIGNED CHECKED APPROVED APPROVED APPROVED APPROVED RELEASED
Ross Amans Ross Amans Randy Hemingway Randy Hemingway
21 June, 2004 21 June, 2004 21 June, 2004 21 June, 2004
XLBOM Build option table
0 Production Build 9 Prototype Build
A CURRENT ISSUE OF THIS DRAWING MUST INCLUDE A COPY OF THE FOLLOWING ECO'S: ECO
ECO ECO ECO ECO ECO ECO ECO
TITLE
DWG NO.
164200 06/22/04 166975 09/08/04
170371 10/10/04 171436 177371
SCHEM, RSR, PE2800, SV
SUB=POP0
SUB=POP9
DATE DATE DATE DATE DATE DATE DATE DATE
INC.
F1314
DATE
2/23/2005
08/11/04167100
10/29/04 02/22/05
4
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
1 OF 45
DCBA
Page 2
Corvette 5U RISER PCI DEVICE CHART
B D
CA
Device#
Function#
Device
Device#
IDSEL IRQD#IRQB# IRQC# REQ#IRQA#
GNT#
IRQA IRQB IRQC IRQD
Used On
1
Bus / Default Bus Number
BUS 0X09h
--
5U PCIX Slot 5
IOP DEVICE B
AD27
INT
IOPIOPIOPIOPIOP
XINT7XINT6XINT5
XINT4
REQ0#
IOP
GNT0#
1U, 2U, 5U 5U PG 8,24
A B C
IDSEL XINT 16, 20, 24, 28
17, 21, 25, 29 18, 22, 26, 30
0, 4 1, 5
2, 6
1
A.Lo B / 3
19, 23, 27, 31
3, 7
IOP
D
IOP IOP IOP IOP
1U
BUS 0X0Bh
--
(IOP SLOT_1)
(AD28)
XINT4
XINT5XINT7XINT6
(REQ1#)
(GNT1#)
A.Lo B
Dobson IOP
(fixed)
(fixed)
IOP
BUS 0X0Ah
A.Lo / 2
0,1
IOP DEVICE E
AD30
(internal)
XINT2
(internal)
INT0
(Debug)
1U, 2U, 5U
U320 SCSI
BUS 0X08h
0,1
IOP DEVICE 5
AD21
XINT1XINT2
REQ0#
GNT0#
1U, 2U, 5U
A.Lo A / 2
PXHPXHPXHPXHPXHPXH
BUS 0X04h
2
A.Hi A
--
5U PCIX Slot 4
AD20
A_IRQ8A_IRQ11A_IRQ10
A_IRQ9
GNT0#REQ0#
2U, 5U
2
BUS 0X05h
A.Hi B
BUS 0X06h
A.Hi B
BUS 0X07h
ICH (planar)
--
--
--
5U PCIX Slot 3
5U PCIX Slot 2
5U PCI Slot 1
5V 32b
AD19
AD18
AD17
PXH PXH PXH PXH PXH PXH
A_IRQ7A_IRQ6A_IRQ5
A_IRQ4
REQ1# GNT1#
PXH PXH PXH PXH PXH PXH
GNT2#REQ2#
PIRQA
ICH (planar)ICH (planar)
PIRQB
A_IRQ2A_IRQ31A_IRQ0
A_IRQ3
ICH ICH ICH ICH
PIRQA
PIRQB
REQ?# GNT?#
2U, 5U
2U, 5U
5U
BUS 0X01h
--
Ethernet A
PXH (planar)PXH (planar)
4
AD23
A_IRQ0
PXHPXHPXHPXH
Planar
GNT?#REQ?#
B.Hi A
PXH (planar)PXH (planar)
PXH PXH PXH PXH
BUS 0X02h
3
B.Hi B
--
Ethernet B
4
AD24
BUS 0X0Eh
A_IRQ1
GNT?#REQ?#
ICH (planar)ICH (planar)
ICHICHICHICH
Planar
3
Planar
ICH (planar)
--
Video
AD29
INT? INT? INT? INT? REQ?# GNT?#
BUS 0X0Ch
ICH (planar)
BUS 0X0Dh
ICH (planar)
--
--
Rac Agilent SP2
RAC - IDE
Debug Slot
AD21
AD22
AD19
ICH (planar)ICH (planar)
ICH ICH ICH ICH
INT? INT? INT? INT? REQ?# GNT?#
ICH (planar)ICH (planar)
ICHICHICHICH
GNT?#REQ?#INT?INT?INT?INT?
Planar
Planar
B.LoMCH (planar)
MCH (planar) MCH (planar)
4 4
B.Lo
C
MCH (planar) MCH (planar)
MCH (planar) MCH (planar)
B.Lo A.hi A.Lo B.hi
Slot 6 Slot 7C
6Slot 7MCH (planar)
PXH (Planar) PXH (Planar) PXH
Dobson Slot 6
4 3
2 5
N/A N/A
in the IOP, AD16-25 goes public or private as a group, not individuallyA.8 B key: Express Lane.width PCIX buss
MCH MCH
MCH5
MCH
PXH Dobson
MCH
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2-23-2005_9:36
TITLE
DWG NO.
DATE
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
SHEET
ROUND ROCK,TEXAS
REV.
2 OF 45
A06-00
A B
DC
Page 3
B D
CA
1
1
2
2
This Page Left Blank Intentionally
3
3
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
3 OF 45
DC
A B
Page 4
B D
CA
ADD1=ADD*_0585R_RIVET ADD2=ADD*_0585R_RIVET ADD3=ADD*_0585R_RIVET
ADD1=ADD*_T6977_SCREW_GUIDE ADD2=ADD*_T6977_SCREW_GUIDE
2-24-2005_11:43
ADD4=ADD*_F2670_GASKET
these should be floating
+3.3V
CONN2_GUIDE
MH1
NC1
MH2
R335
1 2
0-5%
NC_CONN1_GUIDE_MH1 NC_CONN1_GUIDE_MH2
CONN1_GUIDE
MH1
NC1
MH2
NC_CONN2_GUIDE_MH1 NC_CONN2_GUIDE_MH2
1
1
3P3V_RISER_SENSE
R365
4
RISER_PRES1_N
4
1 2
RISER_PRES_N
5
0-5%
+3.3V_AUX
NC_CONN1_GUIDE_MH3
CONN,. FEMALE GUIDE BLOCK
UNIVERSAL PWR MOD
MH3
NC2 NC3
NC_CONN2_GUIDE_MH3
CONN,. FEMALE GUIDE BLOCK
NC2
MH3
NC3
UNIVERSAL PWR MOD
PLANAR TO RISER TO PLANAR HS3
ROOM=RISER_CONN
+3.3V
+3.3V
A1
A1
B1
B1
C1
C1
D1
D1
E1
E1
F1
RISER_PRES1_N
4
This is other part of RISER_PRES_N
3P3V_RISER_SENSE
4
2
TD3 == TDO TD2 == TDI
CK_100M_DOBSON_P
8
CK_100M_DOBSON_N
8
CK_100M_EXP_SPARE_P
27
CK_100M_EXP_SPARE_N
27
CK_100M_PXH_P
16
CK_100M_PXH_N
16
8,27 8,27
8,27 8,27
8,27 8,27
8,27 8,27
26 26
26 26 26 26 26 26
26 26 26 26 26 26
EXP_A_UP_7N EXP_A_UP_7P EXP_A_UP_3N EXP_A_UP_3P EXP_A_UP_6N EXP_A_UP_6P
EXP_A_UP_2N EXP_A_UP_2P EXP_A_UP_5P EXP_A_UP_5N EXP_A_UP_1N EXP_A_UP_1P
EXP_A_UP_4P EXP_A_UP_4N EXP_A_UP_0N EXP_A_UP_0P EXP_C_UP_5P EXP_C_UP_5N
EXP_C_UP_4P EXP_C_UP_4N EXP_C_UP_6P EXP_C_UP_6N EXP_C_UP_7P EXP_C_UP_7N
EXP_C_DN_5P EXP_C_DN_5N EXP_C_DN_4P EXP_C_DN_4N EXP_C_DN_6P EXP_C_DN_6N
18,27 18,27
18,27 18,27
18,27 18,27
18,27 18,27
3
36 36 36 36
CPLD_TCK CPLD_TD3 CPLD_TD2 CPLD_TMS
F1
A2 B2 C2 D2 E2
F2
A3 B3 C3 D3 E3
F3
A4 B4 C4 D4 E4
F4
A5 B5 C5 D5 E5
F5
A6 B6 C6 D6 E6
F6
A7 B7 C7 D7 E7
F7
A8 B8 C8 D8 E8
F8
A9 B9 C9 D9 E9
F9
A10
B10 C10 D10 E10
F10
A2 B2 C2 D2 E2 F2
A3 B3 C3 D3 E3 F3
A4 B4 C4 D4 E4 F4
A5 B5 C5 D5 E5 F5
A6 B6 C6 D6 E6 F6
A7 B7 C7 D7 E7 F7
A8 B8 C8 D8 E8 F8
A9 B9 C9 D9 E9 F9
A10 B10 C10 D10 E10 F10
6 ROW RECEPTACLE ASSEMBLY
RISER_CONN1
Z-PACK HS3
G1 H1
J1
G2 H2
J2
G3 H3
J3
G4 H4
J4
G5 H5
J5
G6 H6
J6
G7 H7
J7
G8 H8
J8
G9 H9
J9
G10 H10
J10
G1 H1 J1
G2 H2 J2
G3 H3 J3
G4 H4 J4
G5 H5 J5
G6 H6 J6
G7 H7 J7
G8 H8 J8
G9 H9 J9
G10 H10 J10
16,27 16,27
8,27
8,27 16,27 16,27
8,27
8,27
8,27
8,27 16,27 16,27
8,27
8,27 16,27 16,27
CK_100M_SLOT7_P
26
CK_100M_SLOT7_N
26
EXP_C_DN_7N
26
EXP_C_DN_7P
26
EXP_A_DN_7N EXP_A_DN_7P EXP_A_DN_3N EXP_A_DN_3P EXP_A_DN_6N EXP_A_DN_6P
EXP_A_DN_2N EXP_A_DN_2P EXP_A_DN_1P EXP_A_DN_1N EXP_A_DN_5N EXP_A_DN_5P
EXP_A_DN_0N EXP_A_DN_0P EXP_A_DN_4N EXP_A_DN_4P EXP_C_DN_0P
26
EXP_C_DN_0N
26
EXP_C_DN_3N
26
EXP_C_DN_3P
26
EXP_C_DN_2P
26
EXP_C_DN_2N
26
EXP_C_DN_1N
26
EXP_C_DN_1P
26
EXP_C_UP_1N
26
EXP_C_UP_1P
26
EXP_C_UP_3P
26
EXP_C_UP_3N
26
EXP_C_UP_0N
26
EXP_C_UP_0P
26
CK_100M_SLOT6_P
25
CK_100M_SLOT6_N
25
SLOT6
EXP_C_UP_2N
26
EXP_C_UP_2P
26
EXP_B_DN_1P
25
EXP_B_DN_1N
25
EXP_B_DN_3N
25
EXP_B_DN_3P
25
EXP_B_DN_2P
25
EXP_B_DN_2N
25
EXP_B_DN_0P
25
EXP_B_DN_0N
25
EXP_B_UP_3P
25
EXP_B_UP_3N
25
EXP_B_UP_2P
25
EXP_B_UP_2N
25
EXP_B_UP_1P
25
EXP_B_UP_1N
25
EXP_B_UP_0P
25
EXP_B_UP_0N
25
SLOT7
RISER_CONN2
A1
A1
B1
B1
C1
C1
D1
D1
E1
E1
F1
F1
A2
A2
B2
B2
C2
C2
D2
D2
E2
E2
F2
F2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
A4
A4
B4
B4
C4
C4
D4
D4
E4
E4
F4
F4
A5
A5
B5
B5
C5
C5
D5
D5
E5
E5
F5
F5
A6
A6
B6
B6
C6
C6
D6
D6
E6
E6
F6
F6
A7
A7
B7
B7
C7
C7
D7
D7
E7
E7
F7
F7
A8
A8
B8
B8
C8
C8
D8
D8
E8
E8
F8
F8
A9
A9
B9
B9
C9
C9
D9
D9
E9
E9
F9
F9
A10
A10
B10
B10
C10
C10
D10
D10
E10
E10
F10
F10
6 ROW RECEPTACLE ASSEMBLY
G1 H1
J1
G2 H2
J2
G3 H3
J3
G4 H4
J4
G5 H5
J5
G6 H6
J6
G7 H7
J7
G8 H8
J8
G9 H9
J9
G10 H10
J10
G1 H1 J1
G2 H2 J2
G3 H3 J3
G4 H4 J4
G5 H5 J5
G6 H6 J6
G7 H7 J7
G8 H8 J8
G9 H9 J9
G10 H10 J10
RISER_PRES_N for 1U
+5V
16,31 16,31
6,8 6,8
36 36
4
31
4
7,16,31
NC_HS3_E2
7,16
SHIFTY_RISER_CLK
36
SHIFTY_RISER_LATCH
36
SHIFTY_RISER_DATA_DN
36
SHIFTY_RISER_DATA_UP
36
INTRUSION_COVER_N
30
LI_BAT_PACK_P
11
NC_1U_RISER_PRSNT_N
I2C_SEG3_VAUX_SDA
30
+12V
I2C_SEG3_VAUX_SCL
30
ICH_SEG0_SCL ICH_SEG0_SDA ICH_SEG3_SCL ICH_SEG3_SDA SYSTEM_PWRGOOD_RISER RISER_PWRGOOD
3P3VAUX_PWRGOOD_RISER MCH_EXPHPINTR_N PCI_RST_RISER_N RISER_EXP_PME_N
RISER_PCI_PME_N
NC_RISER_CONN_D24
RISER_CONN3
A1
A1
B1
B1
C1
C1
D1
D1
E1
E1
F1
F1
A2
A2
B2
B2
C2
C2
D2
D2
E2
E2
F2
F2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
A4
A4
B4
B4
C4
C4
D4
D4
E4
E4
F4
F4
A5
A5
B5
B5
C5
C5
D5
D5
E5
E5
F5
F5
6 ROW RECPTACLE ASSEMBLY
Z-PACK HS3
G1 H1
J1
G2 H2
J2
G3 H3
J3
G4 H4
J4
G5 H5
J5
G1 H1 J1
G2 H2 J2
G3 H3 J3
G4 H4 J4
G5 H5 J5
+12V
2
+5V
3
Z-PACK HS3
PCI_RST_RISER_N
4
C589
1 2
9
10
0.1uF 16V
+3.3V_AUX
148U10
74VHC08
R455
1 2
22-5%
BUFFERS
CPLD p36
PCI_RST_RISER_BUF_N
Slot1 p20
PCI_RST_RISER_BUF3_N
Pull up 2.2k on p20
+3.3V
+5V
+3.3V_AUX
21
ROMB p11
14
12
36
13
U10
11
74VHC08
20
R492
1 2
22-5%
I_U10_P11
stub
3P3VAUX_PWRGOOD_ROMB_BUF2
R723
4.7K
11
+12V
C69
21
C70
0.1uF 16V
21
C92
0.1uF 16V
0.1uF 16V
21
C299
0.1uF 16V
1 2
I_3P3VAUX_PWRGD_RISER
+3.3V_AUX
14
4 5
U10
C66
1
2
22uF
16V 20%
1
C67
2
6
3P3VAUX_PWRGOOD_CPLD_BUF
36
22uF
C62
16V 20%
1
2
22uF
16V 20%
16V-20%
270uF
1
+
C534
2
21
C344
21
C354
0.1uF 16V
21
C510
0.1uF 16V
21
C511
0.1uF 16V
21
C522
0.1uF 16V
0.1uF 16V
74VHC08
4 4
3P3VAUX_PWRGOOD_RISER
4
+3.3V_AUX
143U10
1 2
74VHC08
R447
22-5%
21
3P3VAUX_PWRGOOD_ROMB_BUF
Pull up 4.7k on p11
R449
ROMB p11
11
1 2
4.7K
VHC schmitt trigger inputs family avoids issues
CPLD p36
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
VOLTAGE=0
+3.3V
5,19,31-33,36
VOLTAGE=3.3 RATSNEST_SCHEDULE=MIN_TREE
29
+3.3V_AUX
+5V
+12V
RATSNEST_SCHEDULE=MIN_TREE
VOLTAGE=3.3
7-3W,8-2X,11-2U,16-2U,19-3W 21-3W,22-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
RATSNEST_SCHEDULE=MIN_TREE VOLTAGE=5
5,19,20,31
RATSNEST_SCHEDULE=MIN_TREE VOLTAGE=12
5,7,19,21-24,28,29,33
TITLE
DWG NO.
DATE
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
4 OF 45
DC
A B
Page 5
B D
GOLD FINGERS TO PLANAR. PCI CONN ON PLANAR. NO GOLD FINGERS ON 1U RISER
CA
1
1
CONN2_PLNR
+3.3V
We could shorten RISER_PRES_N pad for last mate, first break
RISER_PRES_N
4
CK_33M_SLOT1
19
+3.3V
+5V
+12V
Side B Side A
NO_PKG
CONN2_PLNR
B1 B2 B3 B4 B5 B6 B7 B8 B9
B10
+5V
+12V
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
SCSI Connectors to Backplane These SCSI connectors support external devices
SCSIA
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
1 2 3 4 5 6 7 8 9
SCSIA
RCPT
SCSIB
RCPT
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
SCSI_A_SD12_N SCSI_A_SD13_N SCSI_A_SD14_N SCSI_A_SD15_N
SCSI_A_SDP1_N
SCSI_A_SD0_N SCSI_A_SD1_N SCSI_A_SD2_N SCSI_A_SD3_N SCSI_A_SD4_N SCSI_A_SD5_N SCSI_A_SD6_N SCSI_A_SD7_N
SCSI_A_SDP0_N
SCSI_TRMPWR
NC_A_53
SCSI_A_SATN_N
SCSI_A_SBSY_N
SCSI_A_SACK_N
SCSI_A_SRST_N
SCSI_A_SMSG_N
SCSI_A_SSEL_N
SCSI_A_SCD_N
SCSI_A_SREQ_N
SCSI_A_SIO_N SCSI_A_SD8_N SCSI_A_SD9_N
SCSI_A_SD10_N SCSI_A_SD11_N
SCSI_B_SD12_N SCSI_B_SD13_N SCSI_B_SD14_N SCSI_B_SD15_N
SCSI_B_SDP1_N
SCSI_B_SD0_N SCSI_B_SD1_N SCSI_B_SD2_N SCSI_B_SD3_N SCSI_B_SD4_N SCSI_B_SD5_N SCSI_B_SD6_N SCSI_B_SD7_N
SCSI_B_SDP0_N
SCSI_TRMPWR
NC_B_53
SCSI_B_SATN_N
SCSI_B_SBSY_N
SCSI_B_SACK_N
SCSI_B_SRST_N
SCSI_B_SMSG_N
SCSI_B_SSEL_N
SCSI_B_SCD_N
SCSI_B_SREQ_N
SCSI_B_SIO_N SCSI_B_SD8_N SCSI_B_SD9_N
SCSI_B_SD10_N SCSI_B_SD11_N
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
5,15
13,15
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
5,15
13,15
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
NP
C576
X
NP
21
C575
X
SCSI_TRMPWR
NP
470pF
1 2
50V-10%
X
2 1
C990
NP
4.7uF 16V-10%
NP
C991
X
NP
1 2
0.1uF 16V
SCSI_TRMPWR
5,15
5,15
21
C993
470pF
50V-10%
X
C992
4.7uF
2 1
X
16V-10%
0.1uF 16V
+3.3V
4,19,31-33,36
+5V
4,19,20,31
+12V
4,7,19,21-24,28,29,33
B11 A11 B12 B13 B14 B15 B16
20 20
PCI0_AD31 PCI0_AD29
B17 B18 B19
20
PCI0_AD27
B20 B21
20
PCI0_AD25
B22 B23 B24
PCI0_AD23
2
20 20
PCI0_AD21
B25 B26 B27
20 20
PCI0_AD20 PCI0_AD19
B28 B29 B30
20
PCI0_AD17
B31 B32
PCI0_CBE2_N
20
B33 B34
20
PCI0_IRDY_N
B35 B36
PCI0_DEVSEL_N
20
B37 B38
PCI0_LOCK_N
20
B39 B40
PCI0_PERR_N
20
B41 B42
PCI0_SERR_N
20
B43 B44
PCI0_CBE1_N
20
B45 B46 B47
20
PCI0_AD14
B48 B49
20
PCI0_AD12
B50 B51
20 20
PCI0_AD10 PCI0_AD8
B52 B53 B54
20 20
PCI0_AD7 PCI0_AD5
B55
X
B56 B57
20
PCI0_AD3
B58 B59
B60 A60
3
B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91
B93 B94 B95
4 4
B96 B97 B98 B99
B100
A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59
A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92B92 A93 A94 A95 A96 A97 A98 A99 A100
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N
PCI0_AD30 PCI0_AD28
PCI0_AD26
PCI0_CBE3_N
PCI0_AD24 PCI0_AD22
PCI0_AD18 PCI0_AD16
PCI0_FRAME_N
PCI0_TRDY_N
PCI0_STOP_N
PCI0_PAR
PCI0_AD15
PCI0_AD13
PCI0_AD11
PCI0_AD9
PCI0_CBE0_N
PCI0_AD6
PCI0_AD4 PCI0_AD2
PCI0_AD0 PCI0_AD1
PCI0_REQ_SLOT_N
PCI0_GNT_SLOT_N
PCIL_5V_PME_N
SLOT6_PWRGD SLOT7_PWRGD
13,15 13,15
19 19
20 20
20
20
20 20
20 20
20
20
20
20
20
20
20
20
20
20
20 20
20 20
20 20
19
32 32
+3.3V
21
C523
21
C524
0.1uF 16V
21
C525
0.1uF 16V
0.1uF 16V
+5V
21
C528
0.1uF 16V
+12V
16V-20%
270uF
1
+
C535
21
C529
2
21
C530
0.1uF 16V
21
C531
0.1uF 16V
21
C532
0.1uF 16V
21
C533
0.1uF 16V
0.1uF 16V
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
13,15
13,15
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
13,15
5,15
13,15
13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15 13,15
SCSI_A_SD12_P SCSI_A_SD13_P SCSI_A_SD14_P SCSI_A_SD15_P SCSI_A_SDP1_P SCSI_A_SD0_P SCSI_A_SD1_P SCSI_A_SD2_P SCSI_A_SD3_P SCSI_A_SD4_P SCSI_A_SD5_P SCSI_A_SD6_P SCSI_A_SD7_P SCSI_A_SDP0_P
SCSI_A_DIFFSENSE SCSI_TRMPWR
5,15
NC_A_19
SCSI_A_SATN_P
SCSI_A_SBSY_P SCSI_A_SACK_P SCSI_A_SRST_P SCSI_A_SMSG_P SCSI_A_SSEL_P SCSI_A_SCD_P SCSI_A_SREQ_P SCSI_A_SIO_P SCSI_A_SD8_P SCSI_A_SD9_P SCSI_A_SD10_P SCSI_A_SD11_P
SCSI_B_SD12_P SCSI_B_SD13_P SCSI_B_SD14_P SCSI_B_SD15_P SCSI_B_SDP1_P SCSI_B_SD0_P SCSI_B_SD1_P SCSI_B_SD2_P SCSI_B_SD3_P SCSI_B_SD4_P SCSI_B_SD5_P SCSI_B_SD6_P SCSI_B_SD7_P SCSI_B_SDP0_P
SCSI_B_DIFFSENSE SCSI_TRMPWR
NC_B_19
SCSI_B_SATN_P
SCSI_B_SBSY_P SCSI_B_SACK_P SCSI_B_SRST_P SCSI_B_SMSG_P SCSI_B_SSEL_P SCSI_B_SCD_P SCSI_B_SREQ_P SCSI_B_SIO_P SCSI_B_SD8_P SCSI_B_SD9_P SCSI_B_SD10_P SCSI_B_SD11_P
SCSIB
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
B101 A101
INC.
ROUND ROCK,TEXAS
202MCA PCI EDG
FOXCONN LOW PROFILE
TITLE
2-24-2005_11:43
2
3
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
REV.
A06-00
SHEET
5 OF 45
Page 6
B D
CA
DOBSON MEMORY INTERFACE
Put one 22 uF cap at each end of DIMM
VBAT_RAID
6,11,12
VBAT_RAID
6,11,12
MUST BE 10% CAPS
C272
1
2
22uF 10V
C274
1 2
0.1uF 16V
C536
1 2
0.1uF 16V
C291
1 2
0.1uF 16V
C275
1 2
0.1uF 16V
C276
1 2
0.1uF 16V
C277
1 2
0.1uF 16V
C283
1 2
0.1uF 16V
C278
1 2
0.1uF 16V
C296
1 2
0.1uF 16V
C279
1 2
0.1uF 16V
C280
1 2
0.1uF 16V
C281
1 2
0.1uF 16V
C282
1 2
0.1uF 16V
C295
1 2
0.1uF 16V
0.1uF 16V 0.1uF 16V
C30
2 1
R142
1.5K-1%1.5K-1%
1 2
1uF 6.3V
Dobson Operating Limits Supplies
2
C273
1
22uF 10V
3.3V == 3.0 to 3.6V, +- 10%
ROMB_DIMM_VREF
1
1.8V == 1.7 to 1.9V, +- 5%
6
C264
12
1
1.5V == 1.425 to 1.575V, +- 5%
1.35V == 1.282 to 1.418V, +- 5%
2 1
C25
PLL == 1.425 to 1.575V, +- 5% DDR Vref == .49*Vcc1.1, .51*Vcc1.8, +- 2%
R144
1 2
BG Vref == 2.375 to 2.625V, +- 5%
U_DOBSON
RAID_DIMM
DDR_SD0_0
6
DDR_SD0_1
6
DDR_SD0_2
6
DDR_SD0_3
6
DDR_SD0_4
6
DDR_SD0_5
6
DDR_SD0_6
6
DDR_SD0_7
6
DDR_DM0
6
DDR_DQS0_P
6
DDR_DQS0_N
6
DDR_SD1_0
6
DDR_SD1_1
6
DDR_SD1_2
6
DDR_SD1_3
6
DDR_SD1_4
6
DDR_SD1_5
6
DDR_SD1_6
6
DDR_SD1_7
6
DDR_DM1
6
DDR_DQS1_P
6
DDR_DQS1_N
6
DDR_SD2_0
6
DDR_SD2_1
2
6
DDR_SD2_2
6
DDR_SD2_3
6
DDR_SD2_4
6
DDR_SD2_5
6
DDR_SD2_6
6
DDR_SD2_7
6
DDR_DM2
6
DDR_DQS2_P
6
DDR_DQS2_N
6
DDR_SD3_0
6
DDR_SD3_1
6
DDR_SD3_2
6
DDR_SD3_3
6
DDR_SD3_4
6
DDR_SD3_5
6
DDR_SD3_6
6
DDR_SD3_7
6
DDR_DM3
6
DDR_DQS3_P
6
DDR_DQS3_N
6
AD5 AD4
AF3 AG2 AD2 AD1
AF1
AF2
AE1 AE4 AE3
AE7
AF6
AJ7 AG7 AD8 AE6 AH6
AJ6 AG5
AJ5
AJ4
AG8
AJ8
AG10 AD11
AH7
AF8
AD10
AE10
AJ9
AF9
AE9
AH12
AJ12
AE13
AD14
AJ11 AF12 AF14
AG14
AJ13
AG13
AH13
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM0 DQS0 DQS0
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DM1 DQS1 DQS1
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DM2 DQS2 DQS2
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DM3 DQS3 DQS3
MEMORY INTERFACE
DQS_N8
M_CK0 M_CK0
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39
DM4 DQS4 DQS4
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DM5 DQS5 DQS5
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DM6 DQS6 DQS6
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DM7 DQS7 DQS7
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
DM8 DQS8
AF18 AE18 AG20 AJ21 AJ18 AH18 AJ20 AH20 AJ19 AF19 AG19
AJ22 AG22 AG23 AF23 AH21 AF21 AJ24 AH24 AE21 AH23 AJ23
AF24 AF25 AG26 AG27 AE24 AE23 AH26 AH27 AG25 AJ26 AJ25
AF28 AE26 AD29 AD28 AG28 AF27 AD25 AD26 AE27 AE29 AF29
AE15 AF15 AD17 AC16 AC15 AC14 AD16 AE17 AH15 AG16 AF16 AJ16 AJ17
DDR_SD4_0 DDR_SD4_1 DDR_SD4_2 DDR_SD4_3 DDR_SD4_4 DDR_SD4_5 DDR_SD4_6 DDR_SD4_7
DDR_DM4 DDR_DQS4_P DDR_DQS4_N
DDR_SD5_0 DDR_SD5_1 DDR_SD5_2 DDR_SD5_3 DDR_SD5_4 DDR_SD5_5 DDR_SD5_6 DDR_SD5_7
DDR_DM5 DDR_DQS5_P DDR_DQS5_N
DDR_SD6_0 DDR_SD6_1 DDR_SD6_2 DDR_SD6_3 DDR_SD6_4 DDR_SD6_5 DDR_SD6_6 DDR_SD6_7
DDR_DM6 DDR_DQS6_P DDR_DQS6_N
DDR_SD7_0 DDR_SD7_1 DDR_SD7_2 DDR_SD7_3 DDR_SD7_4 DDR_SD7_5 DDR_SD7_6 DDR_SD7_7
DDR_DM7 DDR_DQS7_P DDR_DQS7_N
DDR_SD8_0 DDR_SD8_1 DDR_SD8_2 DDR_SD8_3 DDR_SD8_4 DDR_SD8_5 DDR_SD8_6 DDR_SD8_7
DDR_DM8 DDR_DQS8_P DDR_DQS8_N
CK_DDR_MCLK0_P_R CK_DDR_MCLK0_N_R
6 6 6 6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6 6 6 6
R10
1 2
1K-5%
R9
1 2
1K-5%
+3.3V_RSR
6 6 6 6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6 6 6 6 6 6
CK_DDR_MCLK0_P_R
6
CK_DDR_MCLK0_N_R
6
NP
NP
ICH_SEG3_SDA
4,8
ICH_SEG3_SCL
4,8
R693
1 2
0-5% R692
1 2
0-5%
R65
1 2
0-5%
R53
1 2
0-5%
Place close to Dobson
1 2
1 2
stub
I_CK_DDR_MCLK0_P_R2
X
2.8" long
stub
I_CK_DDR_MCLK0_N_R1
X
stub
stub
I_CK_DDR_MCLK0_N_R2
I_CK_DDR_MCLK0_P_R1
4" long
R220
0-5% R219
0-5%
Pull-up at planar
+3.3V_RSR
NP
R179
X
1 2
R691
NP
1 2
0-5% R690
NP
1 2
0-5% R689
1 2
0-5% R688
1 2
0-5%
NP
8.2K-5%
X X
R180
X
1 2
8.2K-5%
DIMM_SDA
DIMM_SCL
CK_DDR_MCLK0_P
CK_DDR_MCLK0_N
stub
stub
+3.3V_RSR
6
6
R1003
220
CK_DDR_MCLK0_N
6
CK_DDR_MCLK0_P
6
6,9,12 6,9,12
21
6
DDR_BA1
6,9
DDR_BA0
6,9
DDR_MA15 DDR_MA14
DDR_MA13
6,9
DDR_MA12
6,9
DDR_MA11
6,9
DDR_MA10
6,9
DDR_MA9
6,9
DDR_MA8
6,9
DDR_MA7
6,9
DDR_MA6
6,9
DDR_MA5
6,9
DDR_MA4
6,9
DDR_MA3
6,9
DDR_MA2
6,9
DDR_MA1
6,9
DDR_MA0
6,9
DDR_CS1_N
6,9
DDR_CS0_N
6,9
DDR_RAS_N
6,9
DDR_CAS_N
6,9
DDR_WE_N
6,9
DDR_CKE1 DDR_CKE0
DIMM1A_SA
6
ROMB_DIMM_VREF
DDR_ODT1
6,9
DDR_ODT0
6,9
DDR_SD8_7
6
DDR_SD8_6
6
DDR_SD8_5
6
DDR_SD8_4
6
DDR_SD8_3
6
DDR_SD8_2
6
DDR_SD8_1
6
DDR_SD8_0
6
DDR_DM8
6
DDR_DM7
6
DDR_DM6
6
DDR_DM5
6
DDR_DM4
6
NC_DDR_DIMM_BA2
NC_CK_DDR_MCLK2_N NC_CK_DDR_MCLK2_P NC_CK_DDR_MCLK1_N NC_CK_DDR_MCLK1_P
NC_DDR_DIMM_165
NC_DDR_DIMM_233
NC_DDR_DIMM_224
NC_DDR_DIMM_212
NC_DDR_DIMM_203
190
71
54 173 174 196 176
57
70 177 179
58 180
60
61 182
63 183 188
76 193 192
74
73 221 220 138 137 186 185 171
52 119
120 101 240 239 238
1
77 195
168 167 162 161
49
48
43
42 164
165 232 233 223 224 211 212 202 203
BA1 BA0 A16/BA2 A15 A14 A13 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
S1 S0 RAS CAS WE CK2 CK2 CK1 CK1 CK0 CK0 CKE1 CKE0
SDA SCL SA2 SA1 SA0 VDDSPD VREF ODT1 ODT0
CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
DM8/DQS17/NC DQS17/NC DM7/DQS16 DQS16/NC DM6/DQS15 DQS15/NC DM5/DQS14 DQS14/NC DM4/DQS13 DQS13/NC
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3
236 235 230 229 117 116 111 110 227 226 218 217 108 107 99 98 215 214 209 208 96 95 90 89 206 205 200 199 87 86 81 80 159 158 153 152 40 39 34 33 150 149 144 143 31 30 25 24 141 140 132 131 22 21 13 12 129 128 123 122 10
DDR_SD7_7 DDR_SD7_6 DDR_SD7_5 DDR_SD7_4 DDR_SD7_3 DDR_SD7_2 DDR_SD7_1 DDR_SD7_0 DDR_SD6_7 DDR_SD6_6 DDR_SD6_5 DDR_SD6_4 DDR_SD6_3 DDR_SD6_2 DDR_SD6_1 DDR_SD6_0 DDR_SD5_7 DDR_SD5_6 DDR_SD5_5 DDR_SD5_4 DDR_SD5_3 DDR_SD5_2 DDR_SD5_1 DDR_SD5_0 DDR_SD4_7 DDR_SD4_6 DDR_SD4_5 DDR_SD4_4 DDR_SD4_3 DDR_SD4_2 DDR_SD4_1 DDR_SD4_0 DDR_SD3_7 DDR_SD3_6 DDR_SD3_5 DDR_SD3_4 DDR_SD3_3 DDR_SD3_2 DDR_SD3_1 DDR_SD3_0 DDR_SD2_7 DDR_SD2_6 DDR_SD2_5 DDR_SD2_4 DDR_SD2_3 DDR_SD2_2 DDR_SD2_1 DDR_SD2_0 DDR_SD1_7 DDR_SD1_6 DDR_SD1_5 DDR_SD1_4 DDR_SD1_3 DDR_SD1_2 DDR_SD1_1 DDR_SD1_0 DDR_SD0_7 DDR_SD0_6 DDR_SD0_5 DDR_SD0_4 DDR_SD0_3
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
MUST BE 1%
2
3
3
DQ2 DQ1 DQ0
NC
9 4 3
197 189 187 184 178 172 69 67 64 59 53
194 191 181 175 170 78 75 72 62 56 51
19 18
NC_DDR_DIMM_19
DDR_SD0_2 DDR_SD0_1 DDR_SD0_0
6 6 6
VBAT_RAID
6,11,12
DDR_DIMM_RST_N
VBAT_RAID
6,11,12
36
DDR_MA0
6,9
DDR_MA1
6,9
DDR_MA2
6,9
DDR_MA3
6,9
DDR_MA4
6,9
DDR_MA5
6,9
DDR_MA6
6,9
DDR_MA7
6,9
DDR_MA8
6,9
DDR_MA9
6,9
DDR_MA10
6,9
DDR_MA11
6,9
DDR_MA12
6,9
DDR_MA13
6,9
NC_CK_DDR_MCLK1_P_R NC_CK_DDR_MCLK1_N_R
NC_CK_DDR_MCLK2_P_R NC_CK_DDR_MCLK2_N_R
DDRCRES0
stub
DDR-2 - use 976 ohm
MUST BE 1%
R167 can be 825 or 976 ohms 1%
R167
1 2
976-1%
R242
1 2
287-1%
DDR-2 - use 285 ohm
DDRSLWCRES
DDRIMPCRES
AC13
MA0
AE12
MA1
AC12
MA2
AF11
MA3
AG11
MA4
AH10
MA5
AH9
MA6
AD7
MA7
AJ10
MA8
AC9
MA9
AC18
MA10
AC8
MA11
AF5
MA12
AD22
MA13
AJ14
M_CK1
AJ15
M_CK1
AH17
M_CK2
AG17
M_CK2
AC27
DDRCRES0
AC28
DDRSLWCRES
AC29
DDRIMPCRES
INTEL DOBSON IOP MEM
POWER_DRAW=P3.3V@1.2A POWER_DRAW=P1.8V@0.9A POWER_DRAW=P1.5V@6.4A POWER_DRAW=P1.35V@0.5A
VER C0
HETERO 1 OF 6
SUB=SUB*_M6627
BA0 BA1
CAS RAS
WE
CS0 CS1
CKE0 CKE1
DDR_VREF
ODT0 ODT1
DDRRES1 DDRRES2
M_RST
AD18 AD13
AC21 AC19 AD20
AE20 AD23
AG4 AH4
AC1
AC22 AB20
AB28 AB29
AH3
stub
NC_DDR_RST_N
DDR_BA0 DDR_BA1
DDR_CAS_N DDR_RAS_N
DDR_WE_N
DDR_CS0_N DDR_CS1_N
DDR_CKE0 DDR_CKE1
DDR_ODT0 DDR_ODT1
0.1uF 16V
C416
2 1
C399
6,9 6,9
6,9 6,9 6,9
6,9 6,9
6,9,12 6,9,12
6,9 6,9
DDR_RES1 DDR_RES2
0.1uF 16V
12
DDR_DOBSON_VREF
R140
40.2-0.5%
MUST BE 10% CAPS
stub
R141
1 2
21
40.2-0.5%
+1.8V
MUST BE 0.5%
C18
0.1uF 16V0.1uF 16V
C36
+1.8V
2 1
R145
1.5K-1%1.5K-1%
1 2
2 1
R143
1 2
MUST BE 1% RES
1uF 6.3V
12
C263
DDR_DM3
6
DDR_DM2
6
DDR_DM1
6
DDR_DM0
6
DDR_DQS8_P
6
DDR_DQS8_N
6
DDR_DQS7_P
6
DDR_DQS7_N
6
DDR_DQS6_P
6
DDR_DQS6_N
6
DDR_DQS5_P
6
DDR_DQS5_N
6
DDR_DQS4_P
6
DDR_DQS4_N
6
DDR_DQS3_P
6
DDR_DQS3_N
6
DDR_DQS2_P
6
DDR_DQS2_N
6
DDR_DQS1_P
6
DDR_DQS1_N
6
DDR_DQS0_P
6
DDR_DQS0_N
6
NC_DDR_DIMM_156
NC_DDR_DIMM_147
NC_DDR_DIMM_135
NC_DDR_DIMM_126
NC_DDR_DIMM_ERR NC_DDR_DIMM_PAR NC_DDR_DIMM_TEST
155
DM3/DQS12
156
DQS12/NC
146
DM2/DQS11
147
DQS11/NC
134
DM1/DQS10
135
DQS10/NC
125
DM0/DQS9
126
DQS9/NC
46
DQS8/NC
45
DQS8/NC
114
DQS7
113
DQS7
105
DQS6
104
DQS6
93
DQS5
92
DQS5
84
DQS4
83
DQS4
37
DQS3
36
DQS3
28
DQS2
27
DQS2
16
DQS1
15
DQS1
7
DQS0
6
DQS0
55
ERR_OUT
68
PAR_IN
102
TEST
POWER_DRAW=P1.8V@7.5A
VDD10
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0
VDDQ10
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0
RESET
240 PIN DDR II DIMM
ADD=ADD*_D2614_HEATSINK_DOBSON
4 4
M6627 = C1 Dobson
+3.3V_RSR
4.7K
R339
12
DIMM1A_SA
ROOM = ROMB_DIMM
6
+3.3V_RSR
7-18,21-24,28,29
F5290 = C0 Dobson
INC.
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
6 OF 45
ROOM = DOBSON
A B
Set DIMM SPD = AE
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
DC
Page 7
DOBSON PCI INTERFACE
B D
CA
PME PULLUP POP'D ON PLANAR
OPTION 2 POP'D
ROOM = DOBSON
Q16 R278 R262
IOP PME B
Option 1 Option 2 Nopop Nopop Pop
Pop Pop Nopop
K (Cathode)
1 2
A (Anode)
P
N
3
BAR43
BAR43
RISER_EXP_PME_N
D8
31
4,16,31
+3.3V_AUX
21
R369
NP
R425
X
22K-5%
RISER_PCI_PME_N
21
0-5%
4,16
R425
DOBSON CH A (IOP BUS) to LSI
R369
+3.3V_RSR
1
7,13,27
IOP_PCIX_A_SERR_N
NP
1 2
8.2K-5%
R218
X
U_DOBSON
+3.3V_RSR
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
1
RN40
2 3 4
8.2K
1
RN32
2 3 4
8.2K
1
RN33
2 3 4
8.2K
1
RN39
2 3 4
8.2K
1
RN34
2 3 4
8.2K
1
RN35
2 3 4
8.2K
1
RN36
2 3 4
8.2K
1
RN28
2 3 4
8.2K
1
RN41
2 3 4
8.2K
1
RN37
2 3 4
8.2K
1
RN38
2 3 4
8.2K
1
RN30
2 3 4
8.2K
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27
2
7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7,13,27
IOP_PCIX_A_ACK64_N IOP_PCIX_A_SERR_N IOP_PCIX_A_STOP_N IOP_PCIX_A_FRAME_N
IOP_PCIX_A_AD46 IOP_PCIX_A_AD45 IOP_PCIX_A_AD40 IOP_PCIX_A_AD44
IOP_PCIX_A_AD34 IOP_PCIX_A_AD35 IOP_PCIX_A_AD32 IOP_PCIX_A_AD33
IOP_PCIX_A_AD54 IOP_PCIX_A_AD51 IOP_PCIX_A_AD52 IOP_PCIX_A_AD48
IOP_PCIX_A_AD39 IOP_PCIX_A_AD38 IOP_PCIX_A_AD36 IOP_PCIX_A_AD37
IOP_PCIX_A_AD50 IOP_PCIX_A_AD57 IOP_PCIX_A_AD58 IOP_PCIX_A_AD60
IOP_PCIX_A_AD62 IOP_PCIX_A_AD61 IOP_PCIX_A_CBE6_N IOP_PCIX_A_CBE4_N
IOP_PCIX_A_AD56 IOP_PCIX_A_AD53 IOP_PCIX_A_AD63 IOP_PCIX_A_AD59
IOP_PCIX_A_AD43 IOP_PCIX_A_AD47 IOP_PCIX_A_AD55 IOP_PCIX_A_AD49
IOP_PCIX_A_PERR_N IOP_PCIX_A_DEVSEL_N IOP_PCIX_A_TRDY_N IOP_PCIX_A_IRDY_N
IOP_PCIX_A_REQ64_N IOP_PCIX_A_PAR64 IOP_PCIX_A_CBE7_N IOP_PCIX_A_CBE5_N
NC_RN30_P1 NC_RN30_P2
IOP_PCIX_A_AD42 IOP_PCIX_A_AD41
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
R658
NP
IOP_PCIX_A_LOCK_N
7
1 2
8.2K-5%
X
13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27
7,13,27
13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27 13,27
13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27 7,13,27
IOP_PCIX_A_AD0 IOP_PCIX_A_AD1 IOP_PCIX_A_AD2 IOP_PCIX_A_AD3 IOP_PCIX_A_AD4 IOP_PCIX_A_AD5 IOP_PCIX_A_AD6 IOP_PCIX_A_AD7 IOP_PCIX_A_AD8 IOP_PCIX_A_AD9 IOP_PCIX_A_AD10 IOP_PCIX_A_AD11 IOP_PCIX_A_AD12 IOP_PCIX_A_AD13 IOP_PCIX_A_AD14 IOP_PCIX_A_AD15 IOP_PCIX_A_AD16 IOP_PCIX_A_AD17 IOP_PCIX_A_AD18 IOP_PCIX_A_AD19 IOP_PCIX_A_AD20 IOP_PCIX_A_AD21 IOP_PCIX_A_AD22 IOP_PCIX_A_AD23 IOP_PCIX_A_AD24 IOP_PCIX_A_AD25 IOP_PCIX_A_AD26 IOP_PCIX_A_AD27 IOP_PCIX_A_AD28 IOP_PCIX_A_AD29 IOP_PCIX_A_AD30 IOP_PCIX_A_AD31 IOP_PCIX_A_AD32 IOP_PCIX_A_AD33 IOP_PCIX_A_AD34 IOP_PCIX_A_AD35 IOP_PCIX_A_AD36 IOP_PCIX_A_AD37 IOP_PCIX_A_AD38 IOP_PCIX_A_AD39 IOP_PCIX_A_AD40 IOP_PCIX_A_AD41 IOP_PCIX_A_AD42 IOP_PCIX_A_AD43 IOP_PCIX_A_AD44 IOP_PCIX_A_AD45 IOP_PCIX_A_AD46 IOP_PCIX_A_AD47 IOP_PCIX_A_AD48 IOP_PCIX_A_AD49 IOP_PCIX_A_AD50 IOP_PCIX_A_AD51 IOP_PCIX_A_AD52 IOP_PCIX_A_AD53 IOP_PCIX_A_AD54 IOP_PCIX_A_AD55 IOP_PCIX_A_AD56 IOP_PCIX_A_AD57 IOP_PCIX_A_AD58 IOP_PCIX_A_AD59 IOP_PCIX_A_AD60 IOP_PCIX_A_AD61 IOP_PCIX_A_AD62 IOP_PCIX_A_AD63
3
E24
F23 E23 H22 G22
F22 H21 G21 D21
F20
E20
H19 G19
F19 H18 G18 B27 C26 B26 A26 D25 C25 A25 D24 A24 C23 B23 D22 C22 A22 B21 A21 P23 P24 N24 N22 M25 M23 M22
L23 L24
L22 K22 K24
J26
J25
J23
J22 U29
T26
T27 R26 R28 R29 P26 P27 P29 N28 N29 N27 M29 M28 M26
L29
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_AD32 A_AD33 A_AD34 A_AD35 A_AD36 A_AD37 A_AD38 A_AD39 A_AD40 A_AD41 A_AD42 A_AD43 A_AD44 A_AD45 A_AD46 A_AD47 A_AD48 A_AD49 A_AD50 A_AD51 A_AD52 A_AD53 A_AD54 A_AD55 A_AD56 A_AD57 A_AD58 A_AD59 A_AD60 A_AD61 A_AD62 A_AD63
PRIMARY PCI-X BUS
A_PCIXCAP
INTEL DOBSON IOP PCI A
VER C0
HETERO 2 OF 6
A_C/BE0 A_C/BE1 A_C/BE2 A_C/BE3 A_C/BE4 A_C/BE5 A_C/BE6 A_C/BE7
A_REQ0 A_REQ1 A_REQ2 A_REQ3
A_GNT0 A_GNT1 A_GNT2 A_GNT3
A_TRDY
A_STOP
A_LOCK
A_IRDY
A_FRAME
A_DEVSEL
A_PAR A_PERR A_SERR
A_REQ64 A_ACK64 A_PAR64
A_M66EN
A_PME
A_CLKOUT
A_CLKIN
A_CLKO3 A_CLKO2 A_CLKO1 A_CLKO0
A_RST
A_RCOMP
H20 H17 C27 D27 K27 K28 L26 L27
N25 F28 E21 K25
A23 B24 P22 U25
E28 D28 E27
E29 C28 F29
F26 G29 E26
J29 J28 K29
C20 R21 R25
G25
G27
H23 F25 G24 H24
R22
T29
NC_IOP_PCIX_A_GNT1_N NC_IOP_PCIX_A_GNT2_N NC_IOP_PCIX_A_GNT3_N
stub
CK_IOP_PCIX_A_CKOUT_R
CK_IOP_PCIX_A_CKIN
NC_A_CLKO3 NC_A_CLKO2
CK_IOP_PCIX_A_DBG_R
CK_IOP_PCIX_A_LSI_R
PD_A_RCOMP
0.750 V
IOP_PCIX_A_CBE0_N IOP_PCIX_A_CBE1_N IOP_PCIX_A_CBE2_N IOP_PCIX_A_CBE3_N IOP_PCIX_A_CBE4_N IOP_PCIX_A_CBE5_N IOP_PCIX_A_CBE6_N IOP_PCIX_A_CBE7_N
IOP_PCIX_A_REQ0_N
PU_IOP_PCIX_A_REQ1_N PU_IOP_PCIX_A_REQ2_N PU_IOP_PCIX_A_REQ3_N
IOP_PCIX_A_GNT0_N
IOP_PCIX_A_TRDY_N
IOP_PCIX_A_STOP_N
IOP_PCIX_A_LOCK_N
IOP_PCIX_A_IRDY_N
IOP_PCIX_A_FRAME_N
IOP_PCIX_A_DEVSEL_N
IOP_PCIX_A_PAR IOP_PCIX_A_PERR_N IOP_PCIX_A_SERR_N
IOP_PCIX_A_REQ64_N IOP_PCIX_A_ACK64_N
IOP_PCIX_A_PAR64
IOP_PCIX_A_M66EN
IOP_PCIX_A_PCIXCAP
PU_IOP_PCIX_A_PME_N
stub
1 2
100-1%
stub
R250
13,27 13,27 13,27 13,27 7,13,27 7,13,27 7,13,27 7,13,27
7,13,27 7 7 7
13,27
7,13,27
7,13,27
7
7,13,27
7,13,27
7,13,27
13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7
7
7
R71
1 2
22-5%
stub
Length Match!!
stub
R342
1 2
R67
1 2
I_IOP_PCIX_A_RST_N IOP_PCIX_A_RST_N
22-5%
22-5%
CK_IOP_PCIX_A_LSI
R506
21
22-5%
CK_IOP_PCIX_A_DBG
13
13,27
To LSI 1030
IOP_PCIX_B_AD0
24
IOP_PCIX_B_AD1
24
IOP_PCIX_B_AD2
24
IOP_PCIX_B_AD3
24
IOP_PCIX_B_AD4
24
IOP_PCIX_B_AD5
24
IOP_PCIX_B_AD6
24
IOP_PCIX_B_AD7
24
IOP_PCIX_B_AD8
24
IOP_PCIX_B_AD9
24
IOP_PCIX_B_AD10
24
IOP_PCIX_B_AD11
24
IOP_PCIX_B_AD12
24
IOP_PCIX_B_AD13
24
IOP_PCIX_B_AD14
24
IOP_PCIX_B_AD15
24
IOP_PCIX_B_AD16
24
IOP_PCIX_B_AD17
24
IOP_PCIX_B_AD18
24
IOP_PCIX_B_AD19
24
IOP_PCIX_B_AD20
24
IOP_PCIX_B_AD21
24
IOP_PCIX_B_AD22
24
IOP_PCIX_B_AD23
24
IOP_PCIX_B_AD24
24
IOP_PCIX_B_AD25
24
IOP_PCIX_B_AD26
24
IOP_PCIX_B_AD27
24
IOP_PCIX_B_AD28
24
IOP_PCIX_B_AD29
24
IOP_PCIX_B_AD30
24
IOP_PCIX_B_AD31
24
IOP_PCIX_B_AD32
24
IOP_PCIX_B_AD33
24
IOP_PCIX_B_AD34
24
IOP_PCIX_B_AD35
24
IOP_PCIX_B_AD36
24
IOP_PCIX_B_AD37
24
IOP_PCIX_B_AD38
24
IOP_PCIX_B_AD39
24
IOP_PCIX_B_AD40
24
IOP_PCIX_B_AD41
24
IOP_PCIX_B_AD42
24
IOP_PCIX_B_AD43
24
IOP_PCIX_B_AD44
24
IOP_PCIX_B_AD45
24
IOP_PCIX_B_AD46
24
IOP_PCIX_B_AD47
24
IOP_PCIX_B_AD48
24
IOP_PCIX_B_AD49
24
IOP_PCIX_B_AD50
24
IOP_PCIX_B_AD51
24
IOP_PCIX_B_AD52
24
IOP_PCIX_B_AD53
24
IOP_PCIX_B_AD54
27
24
IOP_PCIX_B_AD55
24
IOP_PCIX_B_AD56
24
IOP_PCIX_B_AD57
24
IOP_PCIX_B_AD58
24
IOP_PCIX_B_AD59
24
IOP_PCIX_B_AD60
24
IOP_PCIX_B_AD61
24
IOP_PCIX_B_AD62
24
IOP_PCIX_B_AD63
24
DOBSON CH B to PCI SLOT
U_DOBSON
H1
B_AD0
H3
B_AD1
H4
B_AD2
G1
B_AD3
G2
B_AD4
G3
B_AD5
F1
B_AD6
F2
B_AD7
F4
B_AD8
E4
B_AD9
D1
B_AD10
D2
B_AD11
D3
B_AD12
C2 C3 B3 A4 C5 A5 D6 B6 A6 C7 B7 D8 C8 A8 D9 B9
A9 C10 B10
K8
L8 L7
L6 M8 M7 M5 N8 N6 N5 P8 P7 P6 R5 R7 R8
J2 J1
K1
L4
L3
L1 M4 M2 M1 N3 N2 N1 P1 P3 P4 R1
B_AD13 B_AD14 B_AD15 B_AD16 B_AD17 B_AD18 B_AD19 B_AD20 B_AD21 B_AD22 B_AD23 B_AD24 B_AD25 B_AD26 B_AD27 B_AD28 B_AD29 B_AD30 B_AD31 B_AD32 B_AD33 B_AD34 B_AD35 B_AD36 B_AD37 B_AD38 B_AD39 B_AD40 B_AD41 B_AD42 B_AD43 B_AD44 B_AD45 B_AD46 B_AD47 B_AD48 B_AD49 B_AD50 B_AD51 B_AD52 B_AD53 B_AD54 B_AD55 B_AD56 B_AD57 B_AD58 B_AD59 B_AD60 B_AD61 B_AD62 B_AD63
INTEL DOBSON IOP PCI B
VER C0
HETERO 3 OF 6
B_REQ2_N/B_HPCIXCAP1 B_REQ3_N/B_HPCIXCAP2
B_REQ4/B_HM66EN
B_GNT2/B_HBUSEN B_GNT3/B_HCLKEN
SECONDARY PCI-X BUS
B_C/BE0 B_C/BE1 B_C/BE2 B_C/BE3 B_C/BE4 B_C/BE5 B_C/BE6 B_C/BE7
B_REQ0 B_REQ1
B_GNT0 B_GNT1
B_GNT4/B_HRST
B_TRDY
B_STOP
B_LOCK
B_IRDY
B_FRAME
B_DEVSEL
B_PAR B_PERR B_SERR
B_REQ64 B_ACK64
B_PAR64
B_M66EN
B_PCIXCAP
B_PME
B_CLKOUT
B_CLKIN
B_CLKO4 B_CLKO3 B_CLKO2 B_CLKO1 B_CLKO0
RSTIN
B_RST
B_RCOMP
B_VIOSEL
B_VREF
E1 B4 D5 A7 U1 U2 T3 U3
R4 K5
G12 K3
K2
T6 T4
H11 F11 H12
H10 G6 J7
F5 E6 G5
C4 J4 J5
G11
H6
R2
E3 W4 H13
E7
G9
H7 H9 H8 J8 F7
AB6 V8
V1
K6
Y1
D8
stub
CK_IOP_PCIX_B_CKOUT_R
CK_IOP_PCIX_B_CKIN
CK_IOP_PCIX_B_CLK0_R
stub
PD_B_RCOMP
0.750 V
Pop Nopop Nopop
Nopop
11,16,36
IOP_PCIX_B_CBE0_N IOP_PCIX_B_CBE1_N IOP_PCIX_B_CBE2_N IOP_PCIX_B_CBE3_N IOP_PCIX_B_CBE4_N IOP_PCIX_B_CBE5_N IOP_PCIX_B_CBE6_N IOP_PCIX_B_CBE7_N
IOP_PCIX_B_REQ0_N
PU_IOP_PCIX_B_REQ1_N PU_IOP_PCIX_B_REQ2_N PU_IOP_PCIX_B_REQ3_N PU_IOP_PCIX_B_REQ4_N
IOP_PCIX_B_GNT0_N
NC_IOP_PCIX_B_GNT1_N NC_IOP_PCIX_B_GNT2_N NC_IOP_PCIX_B_GNT3_N NC_IOP_PCIX_B_GNT4_N
IOP_PCIX_B_TRDY_N
IOP_PCIX_B_STOP_N
IOP_PCIX_B_LOCK_N
IOP_PCIX_B_IRDY_N
IOP_PCIX_B_FRAME_N
IOP_PCIX_B_DEVSEL_N
IOP_PCIX_B_PAR IOP_PCIX_B_PERR_N IOP_PCIX_B_SERR_N
IOP_PCIX_B_REQ64_N IOP_PCIX_B_ACK64_N
IOP_PCIX_B_PAR64
IOP_PCIX_B_M66EN
IOP_PCIX_B_PCIXCAP
NC_IOP_B_CLK04 NC_IOP_B_CLK03 NC_IOP_B_CLK02
NC_IOP_B_CLK1
1 2
100-1%
stub
R246
NC_B_VIOSEL
VREF_PCI_IOP
For PCIX mode 1
Nopop Pop
SYSTEM_PWRGOOD_RISER_BUF_5V
24 24 24 24 24 24 24 24
7,24 7 7 7 7
24
24
24
24
24 24 24
24
24
24
24 24 24
24
7,24
IOP_PCIX_B_PME_N
R70
1 2
22-5%
R60
1 2
22-5%
I_IOP_PCIX_B_RST_N
PCI_RST_RISER_BUF1_N
stub
7
R507
1 2
22-5%
R278
21
470
C72
1 2
330pF 50V
7
CK_IOP_SLOT5_PCICLK0
36
IOP_PCIX_B_RST_N
stub
I_SYSTEM_PWRGOOD_RISER_BUF_R2
+3.3V_RSR
Length Match !!
24
7
133 Mhz PCI B bus, pullup by external card
SLOT5_PME_N
D
Q16
2N7002
3
1
G
S
2
D
3
2N7002
1 2
G S
PU_IOP_PCIX_A_PME_N
7
+3.3V_RSR
21
R262
22K-5%
IOP_PCIX_B_PME_N
+3.3V_RSR
R343
1 2
PME not used for PCI-X A on IOP
NP
RN42
1 2 3 4
8.2K
8 7 6 5
PU_IOP_PCIX_B_REQ1_N PU_IOP_PCIX_B_REQ2_N PU_IOP_PCIX_B_REQ3_N
X
R168
NP
1 2
C271
21
X
0.1uF 16V
+1.5V
R269
1 2
R664
1 2
150-1%
150-1%
8.2K-5%
133EN lo limits bus to 100MHz max
IOP_PCIX_B_PCIXCAP
7,24
PU_IOP_PCIX_B_REQ4_N
24
7
4.7K
IOP_PCIX_B_REQ0_N
VREF_PCI_IOP
0.75V
+3.3V_RSR
21
R54
NP
21
R134
X
1
7,24 7 7 7
7
2
7
3.3K-5%3.3K-5%
3
220
+3.3V_RSR
NP
+3.3V_RSR
RN29
1 2 3 4
8.2K
8 7 6 5
IOP_PCIX_A_REQ0_N
PU_IOP_PCIX_A_REQ1_N PU_IOP_PCIX_A_REQ2_N PU_IOP_PCIX_A_REQ3_N
7,13,27 7 7 7
PCI Reset glitch fix
U799 p11
+3.3V_AUX
R40
X
1 2
U799
+3.3V_RSR
R334
1 2
4.7K
In SCSI mode, BIOS can enable / disable SCSI if fet option is pop'd
R327
1 2
16,36
SYSTEM_PWRGOOD_RISER_RST_BUF IOP_PCIX_B_RST_N
7
12 13
74VHC08
NP
1 2
14
R798
0-5%
11
X
IOP_PCIX_B_RST_SLOT5_N
24
IOP_PCIX_A_PCIXCAP
7
133 Mhz PCI bus A
NP
21
R136
X
220
C538
1 2
0.1uF 16V
+3.3V_RSR
6,8-18,21-24,28,29
+3.3V_AUX
4-2U,8-2X,11-2U,16-2U,19-3W 21-3W,22-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
+12V
4,5,19,21-24,28,29,33
ROUND ROCK,TEXAS
3 D
NP
1
G
100-1%
2N7002
Q6
1
G
D
3
2
I_PCIX_SCSI_IDSEL_R
S
X
1 2
stub
D
3
2N7002
NP
8.2K-5%
X
stub
1 2
NP
100-1%
R181
12
R197
X
NP
1N914
X
Card resistor Card resistor
PCIX_SCSI_IDSEL
1 3
D5
A (Anode)
N
K (Cathode)
3
1N914
1 2
P
13
X133EN PCIXCAP PCIBUSMODE FREQUENCY
N/A
N/A
N/A
M66EN
GROUND
NO CONNECT
N/A
GROUND
GROUND
PCI CONVENTION
PCI CONVENTION
PULL-DOWN PCIX
33 MHz
66 MHz
66 MHz
PCIXCAP card pulldown open
10k
133 / 100
66
comp threshold
%bus freq
88
Voltage
% 100 75
2-24-2005_11:43
62
GROUND
N/A
N/A
NO CONNECT
PCIX
PCIX
100 MHz
133 MHzNO CONNECT NO CONNECT
3.16k 1%
1.02k 1% GND (100 ohms)
266 533
PCI
36
11.5
48.5 24
0
INC.
TITLE
IOP_PCIX_A_M66EN
7
7,13,27
4 4
OnDieTerminated Signals, 8.33kohm ±40%.
IOP_PCIX_A_AD21
+12V
NP
1 2
2.7K-5% R244
NP
X
PxDEVSEL# PxFRAME# PxIRDY# PxTRDY# PxLOCK# PxSTOP#
PxAD[63:32] PxCBE_[7:4]# XINT[7:0]# PxM66EN PxREQ[]#
PxPAR64
GPO_SCSI_IDSEL_DIS
36
PU_SCSI_DIS_CKT
Q1
2N7002
SCHEM, RSR, PE2800, SV
PxSERR# PxPERR#
PxREQ64# PxACK64#
Pull-up resistors for PxAD[31:0] and PxCBE_[3:1]# are not required by the PCI Specification.
X
S
2
G S
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
7 OF 45
A B
DC
Page 8
DOBSON PCI Express bus and Strapping
B D
R221
+3.3V_RSR
I2C_DOBSON_SDA
8
I2C_DOBSON_SCL
8
R222
21
1 2
0-5%
ICH_SEG3_SDA
ICH_SEG3_SCL
CA
4,6
PCI EXPRESS x4
4,6
0-5%
+3.3V_RSR
NP
1
NP
RN44
1 2 3 4
8.2K
RN43
1 2 3 4
8.2K
8 7 6 5
X
8 7 6 5
Dobson Errata # 51 pop RN44 for B0 Dobson
SCSI_INTB_N
SCSI_INTA_N IOP_PCIX_B_INT0_N IOP_PCIX_B_INT1_N
IOP_PCIX_B_INT4_N IOP_PCIX_B_INT5_N IOP_PCIX_B_INT7_N IOP_PCIX_B_INT6_N
8,13,27 8,13,27 8 8
8,24 8,24 8,24 8,24
PU_I2C_DOBSON_SDA1
8
PU_I2C_DOBSON_SCL1
8
X
ROMB_FLSH_AD0
10
ROMB_FLSH_AD1
10
ROMB_FLSH_AD2
NP
RN88
1 2 3 4
2.7K
8 7 6 5
HPC_HIPCK
HPC_HIPLD
HPC_HIPDA
HPC_HOPLD
8 8 8 8
X
Vref = 2.5V
L13
4.7uH 80mA
600 uA
R673
0-5%
22uF 6.3V
1
C358
2
21
17,28
V_2P5V_REF
R148
1 2
.499-1%
I_2P5V_AUX_REF_IOP_R
stub
1 2
2
VCCBG DIFF PAIR TO BGA, VSS GND AT REF, NOT BGA
D2938 is 4.7uH, <30%,ESR max<0.3 ohm, Imax>80mA
+1.5V
R153
1 2
.499-1%
I_IOP_VCC_PLL1_L
stub
1 2
31.8 mA
+1.5V
R155
1 2
.499-1%
I_IOP_VCC_PLL2_L
stub
1 2
3
+1.5V
L8
4.7uH 80mA
NP
L9
4.7uH 80mA
31.8 mA
NP
R672
0-5%
R671
0-5%
C249
21
X
1
C250
2
21
X
1
2
C353
22uF 6.3V
C417
22uF 6.3V
V_IOP_VCC_PLL1
1 2
IOP_VSS_PLL1
V_IOP_VCC_PLL2
21
0.1uF 16V 0.1uF 16V IOP_VSS_PLL2
30.9 mA
R151
1 2
.499-1%
I_IOP_VCC_PLL3_L
stub
MUST BE 0.499 OHM
1 2
L10
4.7uH 80mA
31.8 mA
NP
R670
0-5%
1
C251
2
21
X
22uF 6.3V
C526
1 2
V_IOP_VCC_PLL3
0.1uF 16V IOP_VSS_PLL3
2.5V +- 3%
(A15)
V_IOP_VCCBG_A15
21
8
ROUTE AS DIFF PAIR
C626
0.1uF 16V
V_IOP_VSSBG_A14
8
1.5V -110 mV, +45 mV
8
M19
PCI A segment
ROUTE AS DIFF PAIR
M18
9
1.5V -110 mV, +45 mV
8
M11
PCI B segment
ROUTE AS DIFF PAIR
M12
9
1.5V -110 mV, +45 mV
8
L15
ROUTE AS DIFF PAIR
K15
9
PCI Express
+3.3V_RSR
R190
1 2
8.2K-5%
8,10 8,10 8,10 8,10 8,10 8,10 8,10
10
8,10
10 10 10 10
8,10
10 10 10
10,36
8,10,36
10
10 10 10
10 10 10 10 36
8 8 8
8
8 8,13,27 8,13,27
8
8,24 8,24 8,24 8,24
PU_IOP_HPI_N
ROMB_FLSH_AD3 ROMB_FLSH_AD4 ROMB_FLSH_AD5 ROMB_FLSH_AD6 ROMB_FLSH_AD7 ROMB_FLSH_AD8 ROMB_FLSH_AD9 ROMB_FLSH_AD10 ROMB_FLSH_AD11 ROMB_FLSH_AD12 ROMB_FLSH_AD13 ROMB_FLSH_AD14 ROMB_FLSH_AD15
ROMB_A16 ROMB_A17 ROMB_A18 ROMB_A19 ROMB_A20 ROMB_A21
NC_DOBSON_A22
ROMB_A0 ROMB_A1 ROMB_A2
ROMB_FLSH_ALE ROMB_FLSH_OE_N ROMB_FLSH_WE_N DOBSON_FLSH_EN_N DOBSON_PCE1_EN_N
HPC_HIPCK HPC_HIPLD HPC_HIPDA
NC_HPC_HOPCK
HPC_HOPLD
NC_HPC_HOPRLD NC_HPC_HOPDA NC_HPC_HPRST_N
IOP_PCIX_B_INT0_N SCSI_INTB_N SCSI_INTA_N IOP_PCIX_B_INT1_N IOP_PCIX_B_INT4_N IOP_PCIX_B_INT5_N IOP_PCIX_B_INT6_N IOP_PCIX_B_INT7_N
NC_Y5 NC_W6 NC_T1
stub
8 8 8 8 8
NC_Y8 NC_AA2 NC_AA4 NC_AB1
V_IOP_VCC_PLL1 V_IOP_VCC_PLL2 V_IOP_VCC_PLL3 V_IOP_VCC_PLL4 V_IOP_VCC_PLL5
V29
AD0
V28
AD1
W24
AD2/MEM_TYPE
V23
AD3/A_PCIX133EN
T23
AD4/P_BOOT16_N
V26
AD5/CORE_RST_N
T22
AD6/RETRY
W23
AD7/B_MODE2
W26
AD8
W27
AD9
T21
AD10/B_PCIX133EN
Y24
AD11/B_M2133EN
U24
AD12/B_HSLOT0
V25
AD13/B_HSLOT1
U22
AD14/B_HSLOT2
Y22
AD15/B_HSLOT3
W29
A16/SMB_MA1
Y27
A17/SMB_MA2
U21
A18/SMB_MA3
V22
A19/SMB_MA5
Y29
A20/B_ODTEN
Y28
A21
W22
A22
Y25
A0
AA29
A1
W21
A2
AA28
ALE
V21
POE_N
Y21
PWE_N
AA26
PCE0_N
AA25
PCE1_N
U8
B_HIPCK
T8
B_HIPLD
W8
B_HIPDA
W7
B_HOPCK
U5
B_HOPLD
U6
B_HOPRLD
V7
B_HOPDA
AA1
B_HPRST
U27
XINT0
U28
XINT1
T24
XINT2
R23
XINT3
W3
XINT4
V5
XINT5
V4
XINT6
V2
XINT7
AA8
HPI
Y5
NC0
W6
NC1
T1
NC2
Y8
NC3
AA2
NC4
AA4
NC5
AB1
NC6
M19
VCCPLL1
M11
VCCPLL2
L15
VCCPLL3
R15
VCCPLL4
P13
VCCPLL5
INTEL DOBSON IOP MISC SIGS
R341
21
8.2K-5% R405
21
8.2K-5%
U_DOBSON
MISC SIGNALS
PERIPHERAL BUS INTERFACE
VER C0
HETERO 4 OF 6
REFCLKP REFCLKN
PE0TP0 PE0TP1 PE0TP2 PE0TP3 PE0TP4 PE0TP5 PE0TP6 PE0TP7
PE0TN0 PE0TN1 PE0TN2 PE0TN3 PE0TN4 PE0TN5 PE0TN6 PE0TN7
PE0RP0 PE0RP1 PE0RP2 PE0RP3 PE0RP4 PE0RP5 PE0RP6 PE0RP7
PE0RN0 PE0RN1 PE0RN2 PE0RN3 PE0RN4 PE0RN5 PE0RN6 PE0RN7
PE_RCOMPO
PE_ICOMPI
PE_VCCBG
PE_VSSBG
TCK
TDI
TDO
TRST
TMS
PWRDELAY
PWRGD
GPIO0/U0_RXD
GPIO1/U0_TXD
GPIO2/U0_CTS_N
GPIO3/U0_RTS_N
GPIO4/U1_RXD
GPIO5/U1_TXD
GPIO6/U1_CTS_N
GPIO7/U1_RTS_N
SCD0
SCD1/SDTA
SCL0
SCL1/SCLK
H15 G15
F13 C12 C11 E15 C17 D19 A19 F16
E13 B12 D11 D15 B17 C19 A20 G16
G14 E12 A11 D14 D16 E18 A18 E17
F14 D12 A12 C14 C16 D18 B18 F17
B15 A16 A15 A14
Y2 Y6 AB3 AA5 AB4 W1 AA7
AB26 AB27 AA21 AA22 AC26 AC25 AB23 AB24 AB21 AC24 AA23 AB22
NC_EXP_A_UP_4P_C NC_EXP_A_UP_5P_C NC_EXP_A_UP_6P_C NC_EXP_A_UP_7P_C
NC_EXP_A_UP_4N_C NC_EXP_A_UP_5N_C NC_EXP_A_UP_6N_C NC_EXP_A_UP_7N_C
NC_EXP_A_DN_4P NC_EXP_A_DN_5P NC_EXP_A_DN_6P NC_EXP_A_DN_7P
NC_EXP_A_DN_4N NC_EXP_A_DN_5N NC_EXP_A_DN_6N NC_EXP_A_DN_7N
0.500 V
V_IOP_VCCBG_A15
V_IOP_VSSBG_A14
NC_DOBSON_TDO
DOBSON_TRST_N
GATE_IOP_PWRDELAY
SYSTEM_PWRGOOD_RISER_BUF3
U0_ROMB_RXD
U0_ROMB_TXD
PU_IOP_UART0_CTS_N
PU_IOP_UART0_RTS_N
PU_I2C_DOBSON_SDA1
PU_I2C_DOBSON_SCL1
8 8
CPLD_ROMB_BAT_STAT1 CPLD_ROMB_BAT_STAT2
ROMB_BAT_EN_N
LI_BAT_PRSNT_N
I2C_DOBSON_SDA
8
I2C_DOBSON_SCL
8
CK_100M_DOBSON_P CK_100M_DOBSON_N
EXP_A_UP_0P_C EXP_A_UP_1P_C EXP_A_UP_2P_C EXP_A_UP_3P_C
EXP_A_UP_0N_C EXP_A_UP_1N_C EXP_A_UP_2N_C EXP_A_UP_3N_C
PU_RCOMP
8 8
DOBSON_TCK
DOBSON_TDI
DOBSON_TMS
EXP_A_DN_0P EXP_A_DN_1P EXP_A_DN_2P EXP_A_DN_3P
EXP_A_DN_0N EXP_A_DN_1N EXP_A_DN_2N EXP_A_DN_3N
R84
49.9-1% R679
49.9-1%
stub
8 8
Jtag Debug port
8 8 12 17,36
8,10 8,10
8,36 8,36 8,11,36 11,36 8
8
NP
NP
4 4
8 8 8 8
8 8 8 8
4,27 4,27 4,27 4,27
4,27 4,27 4,27 4,27
21
21
R182
1 2
8.2K-5% R189
1 2
8.2K-5%
EXP_DN IS MCH TX
DN (MCH TX) CONNECTS TO SLOT TX
DN (MCH TX) CONNECTS TO PXH, IOP RX
EXP_UP IS MCH RX
UP (MCH RX) CONNECTS TO SLOT RX
UP (MCH RX) CONNECTS TO PXH, IOP TX
+1.5V
X
X
Dobson I2C =A4
+3.3V_RSR
EXP_A_UP_0P_C
8
EXP_A_UP_1P_C
8
EXP_A_UP_2P_C
8
EXP_A_UP_3P_C
8
EXP_A_UP_0N_C
8
EXP_A_UP_1N_C
8
EXP_A_UP_2N_C
8
EXP_A_UP_3N_C
8
use 402 package
Place these Caps close to Dobson
caps only on upstream, immediately next to Dobson. 0.5 inch max seperation
C377
21
.1uF
10V-10%
C369
21
.1uF
10V-10%
C376
21
.1uF
10V-10%
C368
21
.1uF
10V-10%
C375
21
.1uF
10V-10%
C367
21
.1uF
10V-10%
C374
21
.1uF
10V-10%
C366
21
.1uF
10V-10%
DOBSON Reset Strap Signals
Configuration Retry Mode :
RETRY
CORE_RST#
P_BOOT 16#
MEM_TYPE
A_PCIX133EN
B_PCIX133EN
PCI MODE
PCI ODT
B_HSLOT(3)
B_HSLOT(2:0)
ATU to disable config cycle and control upstream PCIEX config transaction 0 = Config cycle enabled (pull down)
1 = Config Retry enabled by ATU and Retry status respose enanled in PCIEX
Determinate when Xscale core to hold reset until reset bit is cleared 0 = Hold in reset (pull-down) 1 = Do not hold in reset (default mode)
Indicate the default bus width for the PBI memory boot window 0 = 16 bit wide (pull - down)
1 = 8 bit wide (Default mode)
Define the speed of the DDR SDRAM interface 0 = DDR-2 SDRAM at 400Mhz (pull - down)
1 = DDR SDRAM at 266 MHz (Default mode)
Determanes the max A bus PCI-X mode operatin frequency 0 = 100MHz enabled (pull - down )
1 = 133 Mhz enabled (Default mode), if PCIXCAP is high
Determanes the max B bus PCI-X mode operatin frequency 0 = 100MHz enabled (pull - down )
1 = 133 Mhz enabled (Default mode), if PCIXCAP is high
Determanes if PCI will be mode 1 or mode 2 0 = Pull-down to disable mode 2
1 = Pull-up to enable mode 2
Determanes if PCI on-die-termiantor enable/disable 0 = Pull-down to disable PCI on-die-terminator
1 = Pull -up to enabel PCI on-die-terminator
Indicates if B PCI bus Standard Hot Plug is enable for operation 0 = SHPC Disabled ( Pull down)
1 = SHPC Enabled (Default mode)
Indicates if the number and the mode of B PCI bus Standard Hot Plug is enable for operation xxx
xxx
EXP_A_UP_0P EXP_A_UP_1P EXP_A_UP_2P EXP_A_UP_3P
EXP_A_UP_0N EXP_A_UP_1N EXP_A_UP_2N EXP_A_UP_3N
4,27
4,27
4,27
4,27
4,27
4,27
4,27
4,27
1
2
3
+1.5V
STRAPPED FOR DOBSON
R149
+1.5V
1 2
.499-1%
R152
1 2
.499-1%
I_IOP_VCC_PLL4_L
stub
I_IOP_VCC_PLL5_L
stub
1 2
1 2
4 4
PLL Resistor / Cap Values
L11
4.7uH 80mA
31.8 mA
NP
L12
4.7uH 80mA
31.8 mA
NP
R669
0-5%
R668
0-5%
C252
21
X
C253
21
X
1
2
1
2
C527
22uF 6.3V
C564 21
22uF 6.3V
V_IOP_VCC_PLL4
0.1uF 16V IOP_VSS_PLL4
V_IOP_VCC_PLL5
1 2
0.1uF 16V IOP_VSS_PLL5
VCC_PLL trace as short as possibe
0.5 ohm for 33uf, 22uf, or 20 uf 1 ohm for 10uf
VCCA, VSSA DIFF PAIR TO BGA
PCI Express PLL cannot use 1 ohm for 10uf
1.5V -110 mV, +45 mV
8
R15
Xscale & MCU
ROUTE AS DIFF PAIR
R16
9
1.5V -110 mV, +45 mV
8
P13
LBW (Low Bandwidth)
ROUTE AS DIFF PAIR
P14
9
8,36
8,36
8,11,36
8,10 8,10
CPLD_ROMB_BAT_STAT2
CPLD_ROMB_BAT_STAT1
ROMB_BAT_EN_N
U0_ROMB_RXD U0_ROMB_TXD
PU_IOP_UART0_CTS_N
8
PU_IOP_UART0_RTS_N
8
1 2
R730
1 2
8.2K-5%
1 2 3 4
R731
8.2K-5%
R458
8.2K-5% RN46
8.2K
Config Retry at ATU disabled
+3.3V_RSR
+3.3V_RSR
Config Retry disabled Reset mode hold in reset Bus width is 16 bit DDR-2 at 400Mhz
pulldown <133 MHz
133 Mhz for Bus Apulldown <133 MHz 133 Mhz for Bus B Disbable PCI mode2 Disbale on-die-terminator
SHPC disabled
ROMB_FLSH_AD6 ROMB_FLSH_AD5 ROMB_FLSH_AD4 ROMB_FLSH_AD2 ROMB_FLSH_AD3
ROMB_FLSH_AD10
ROMB_FLSH_AD7
ROMB_A20
ROMB_FLSH_AD15
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10,36
8,10
Xcore Hold in Reset unless bit cleared Memory Type is DDR-II Flash Width is 16 bit Dobson Channel A is 133Mhz Dobson Channel B is 133Mhz Dobson PCIX mode disabled
+3.3V_RSR
Dobson PCI ODT disabled
R363
NP
1 2
8.2K-5%
21
8 7 6 5
NP
8.2K-5%
1.5K-5%
X
R362
21
X
R147
21
R146
21
220
DOBSON_TMS
DOBSON_TDI
DOBSON_TCK
DOBSON_TRST_N
8
NP
1 2
1.5K-1% R346
8
8
8
1 2
1.5K-1% R349
1 2
1.5K-1% R344
1 2
1.5K-1% R345
1.5K-1%
X
1 2
NP
R347
1 2
1.5K-1%
X
R348
1.5K-1%
1 2
NP
R350
1 2
1.5K-1%
X
R351
1 2
1.5K-1% R352
pop means PCI Exp 1.0 spec in B0+ chips depop means PCI Exp 1.0a spec in B0+ chips
NP
1.5K-1% R287
X
21
ROMB_FLSH_AD8
8,10
Dobson PCI Hot-Plug NOT Supported
+3.3V_AUX
+1.5V
ROOM = DOBSON
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM, RSR, PE2800, SV
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
SHEET
8 OF 45
6,7,9-18,21-24,28,29
4-2U,7-3W,11-2U,16-2U,19-3W 21-3W,22-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
9,17,18,29
REV.
A06-00
A B
DC
Page 9
DOBSON Power and GND
U_DOBSON
B D
CA
ROOM = DOBSON
A3
VSS_A3
A10
VSS_A10
A17
VSS_A17
A27
VSS_A27
B2
VSS_B2
B5
1
+3.3V_RSR
+3.3V_RSR
U_DOBSON
C1 C6
C9 C21 C24 C29
D4 D26
E9 F3 F6
F21 G10 G23
H5
H26
J3 J18 J20 J24 J27
K17 K19 K21
L5
VCC33_C1 VCC33_C6 VCC33_C9 VCC33_C21 VCC33_C24 VCC33_C29 VCC33_D4 VCC33_D26 VCC33_E9 VCC33_F3 VCC33_F6 VCC33_F21 VCC33_G10 VCC33_G23 VCC33_G5 VCC33_G26 VCC33_J3 VCC33_J18 VCC33_J20 VCC33_J24 VCC33_J27 VCC33_K17 VCC33_K19 VCC33_K21 VCC33_L5
VCC 3.3V
VCC33_L20 VCC33_L25
VCC33_M3
VCC33_M6 VCC33_M21 VCC33_M27
VCC33_N20 VCC33_N23 VCC33_N26 VCC33_P21
VCC33_R3
VCC33_R6 VCC33_R20 VCC33_R24 VCC33_R27
VCC33_U7 VCC33_U20 VCC33_U26
VCC33_V3 VCC33_V24
VCC33_W5
VCC33_W20
VCC33_Y26
VCC33_AA24
+1.5V
A13
2
+1.8V
3
+1.3V +1.3V
C13 C18 E14 E16
J10 J12 J14 J16
K9 K10 K11 K13
L10 L12 L18
M9 M13 M15 M17
N10 N12 N14 N16 N18
P9 P11 P15
AA10 AA12 AA14 AA16 AA18 AA20
AB7
AB9 AB11 AB13 AB15 AB17 AB19 AC10 AC20
VCC15_A13 VCC15_C13 VCC15_C18 VCC15_E14 VCC15_E16 VCC15_J10 VCC15_J12 VCC15_J14 VCC15_J16 VCC15_K9 VCC15_K10 VCC15_K11 VCC15_K13 VCC15_L10 VCC15_L12 VCC15_L18 VCC15_M9 VCC15_M13 VCC15_M15 VCC15_M17 VCC15_N10 VCC15_N12 VCC15_N14 VCC15_N16 VCC15_N18 VCC15_P9 VCC15_P11 VCC15_P15
VCC25_AA10 VCC25_AA12 VCC25_AA14 VCC25_AA16 VCC25_AA18 VCC25_AA20 VCC25_AB7 VCC25_AB9 VCC25_AB11 VCC25_AB13 VCC25_AB15 VCC25_AB17 VCC25_AB19 VCC25_AC10 VCC25_AC20
VCC 1.5V
VCC 2.5/1.8V
VCC 1.3V
U12
VCC13_U12
V13
VCC13_V13
W10
VCC13_W10
VCC15_P17 VCC15_P19 VCC15_R10 VCC15_R12 VCC15_R14 VCC15_R18
VCC15_T9 VCC15_T11 VCC15_T13 VCC15_T15 VCC15_T17 VCC15_T19
VCC15_U10 VCC15_U14 VCC15_U16 VCC15_U18
VCC15_V9 VCC15_V11 VCC15_V15 VCC15_V17 VCC15_V19
VCC15_W14 VCC15_W16 VCC15_W18
VCC15_Y15 VCC15_Y17 VCC15_Y19
VCC25_AD6 VCC25_AD12 VCC25_AD19 VCC25_AD24
VCC25_AF4 VCC25_AF10 VCC25_AF13 VCC25_AF17 VCC25_AF20 VCC25_AF22 VCC25_AF26
VCC25_AH11 VCC25_AH16
VCC25_AJ3
VCC13_W12
VCC13_Y9 VCC13_Y11 VCC13_Y13
INTEL DOBSON IOP POWER
VER C0
HETERO 5 OF 6
L20 L25 M3 M6 M21 M27 N20 N23 N26 P21 R3 R6 R20 R24 R27 U7 U20 U26 V3 V24 W5 W20 Y26 AA24
P17 P19 R10 R12 R14 R18 T9 T11 T13 T15 T17 T19 U10 U14 U16 U18 V9 V11 V15 V17 V19 W14 W16 W18 Y15 Y17 Y19
AD6 AD12 AD19 AD24 AF4 AF10 AF13 AF17 AF20 AF22 AF26 AH11 AH16 AJ3
W12 Y9 Y11 Y13
+1.5V
+1.8V
B8 B11 B13 B14 B16 B19 B20 B22 B25 B28
C15
D7
D10 D13 D17 D20 D23 D29
E2
E5
E8 E10 E11 E19 E22 E25
F8
F9 F10 F12 F15 F18 F24 F27
G4 G7
G8 G13 G17 G20 G26 G28
H2
H14 H16 H25 H27 H28 H29
J6
J9 J11 J13 J15 J17 J19 J21
K4
K7 K12 K14 K16 K18 K20 K23 K26
L2
L9 L11 L13 L14 L16 L17 L19 L21 L28
M10 M14 M16 M20 M24
N4 N7
N9 N11 N13 N15 N17 N19 N21
P2
P5 P10 P12 P16 P18 P20 P25 P28
VSS_B5 VSS_B8 VSS_B11 VSS_B13 VSS_B14 VSS_B16 VSS_B19 VSS_B20 VSS_B22 VSS_B25 VSS_B28 VSS_C15 VSS_D7 VSS_D10 VSS_D13 VSS_D17 VSS_D20 VSS_D23 VSS_D29 VSS_E2 VSS_E5 VSS_E8 VSS_E10 VSS_E11 VSS_E19 VSS_E22 VSS_E25 VSS_F8 VSS_F9 VSS_F10 VSS_F12 VSS_F15 VSS_F18 VSS_F24 VSS_F27 VSS_G4 VSS_G7 VSS_G8 VSS_G13 VSS_G17 VSS_G20 VSS_G26 VSS_G28 VSS_H2 VSS_H14 VSS_H16 VSS_H25 VSS_H27 VSS_H28 VSS_H29 VSS_J6 VSS_J9 VSS_J11 VSS_J13 VSS_J15 VSS_J17 VSS_J19 VSS_J21 VSS_K4 VSS_K7 VSS_K12 VSS_K14 VSS_K16 VSS_K18 VSS_K20 VSS_K23 VSS_K26 VSS_L2 VSS_L9 VSS_L11 VSS_L13 VSS_L14 VSS_L16 VSS_L17 VSS_L19 VSS_L21 VSS_L28 VSS_M10 VSS_M14 VSS_M16 VSS_M20 VSS_M24 VSS_N4 VSS_N7 VSS_N9 VSS_N11 VSS_N13 VSS_N15 VSS_N17 VSS_N19 VSS_N21 VSS_P2 VSS_P5 VSS_P10 VSS_P12 VSS_P16 VSS_P18 VSS_P20 VSS_P25 VSS_P28
GROUND
VSS_T10 VSS_T12 VSS_T14 VSS_T16 VSS_T18 VSS_T20 VSS_T25 VSS_T28
VSS_U11 VSS_U13 VSS_U15 VSS_U17 VSS_U19 VSS_U23
VSS_V10 VSS_V12 VSS_V14 VSS_V16 VSS_V18 VSS_V20 VSS_V27
VSS_W11 VSS_W13 VSS_W15 VSS_W17 VSS_W19 VSS_W25 VSS_W28
VSS_Y10 VSS_Y12 VSS_Y14 VSS_Y16 VSS_Y18 VSS_Y20
VSS_Y23 VSS_AA3 VSS_AA6 VSS_AA9
VSS_AA11 VSS_AA13 VSS_AA15 VSS_AA17 VSS_AA19 VSS_AA27
VSS_AB2 VSS_AB5 VSS_AB8
VSS_AB10 VSS_AB12 VSS_AB14 VSS_AB16 VSS_AB18 VSS_AB25
VSS_AC2 VSS_AC3 VSS_AC4 VSS_AC5 VSS_AC6 VSS_AC7
VSS_AC11 VSS_AC17 VSS_AC23
VSS_AD3 VSS_AD9
VSS_AD15 VSS_AD21 VSS_AD27
VSS_AE2 VSS_AE5 VSS_AE8
VSS_AE11 VSS_AE14 VSS_AE16 VSS_AE19 VSS_AE22 VSS_AE25 VSS_AE28
VSS_AF7 VSS_AG1 VSS_AG3 VSS_AG6 VSS_AG9
VSS_AG12 VSS_AG15 VSS_AG18 VSS_AG21 VSS_AG24 VSS_AG29
VSS_AH2 VSS_AH5 VSS_AH8
VSS_AH14 VSS_AH19 VSS_AH22 VSS_AH25 VSS_AH28
VSS_T7
VSS_U4 VSS_U9
VSS_V6
VSS_W2 VSS_W9
VSS_Y3 VSS_Y4 VSS_Y7
T7 T10 T12 T14 T16 T18 T20 T25 T28 U4 U9 U11 U13 U15 U17 U19 U23 V6 V10 V12 V14 V16 V18 V20 V27 W2 W9 W11 W13 W15 W17 W19 W25 W28 Y3 Y4 Y7 Y10 Y12 Y14 Y16 Y18 Y20 Y23 AA3 AA6 AA9 AA11 AA13 AA15 AA17 AA19 AA27 AB2 AB5 AB8 AB10 AB12 AB14 AB16 AB18 AB25 AC2 AC3 AC4 AC5 AC6 AC7 AC11 AC17 AC23 AD3 AD9 AD15 AD21 AD27 AE2 AE5 AE8 AE11 AE14 AE16 AE19 AE22 AE25 AE28 AF7 AG1 AG3 AG6 AG9 AG12 AG15 AG18 AG21 AG24 AG29 AH2 AH5 AH8 AH14 AH19 AH22 AH25 AH28
+1.8V
12
C432
+1.3V
12
C420
+1.5V
12
.1uF
C394
+3.3V_RSR
12
C378
+3.3V_RSR
12
.1uF
10V-10%
.1uF
10V-10%
10V-10%
C393
.1uF
10V-10%
.1uF
10V-10%
12
C431
C419
12
C382
12
.1uF
12
.1uF
12
.1uF
12
10V-10%
C430
C418
.1uF
10V-10%
12
10V-10%
C392
.1uF
10V-10%
10V-10%
.1uF
10V-10%
12
.1uF
10V-10%
12
C433
.1uF
10V-10%
C380
12
.1uF
12
.1uF
12
10V-10%
C435
.1uF
10V-10%
C383
12
10V-10%
12
.1uF
10V-10%
.1uF
10V-10%
.1uF
10V-10%
12
C429
12
C391
C379
12
.1uF
.1uF
12
.1uF
12
10V-10%
C428
12
C415
10V-10%
.1uF
10V-10%
12
10V-10%
.1uF
.1uF
10V-10%
C254
.1uF
10V-10%
C427
12
C414
C390
2 1
10V-10%
12
.1uF
12
.1uF
10uF
16V 10%
12
.1uF
10V-10%
C413
10V-10%
10V-10%
.1uF
10V-10%
12
C426
12
12
C389
12
.1uF
10V-10%
.1uF
10V-10%
+1.5V
.1uF
10V-10%
.1uF
10V-10%
12
C425
C412
12
.1uF
12
.1uF
10V-10%
C424
.1uF
10V-10%
12
C397
12
C388
10V-10%
12
C411
.1uF
12
.1uF
10V-10%
12
.1uF
C395
10V-10%
.1uF
10V-10%
C387
.1uF
10V-10%
12
.1uF
C423
12
C410
10V-10%
12
.1uF
12
.1uF
12
.1uF
12
10V-10%
C422
.1uF
10V-10%
10V-10%
12
10V-10%
C386
12
10V-10%
.1uF
C409
C385
.1uF
.1uF
12
10V-10%
C434
12
.1uF
10V-10%
12
.1uF
12
10V-10%
C396
12
10V-10%
.1uF
10V-10%
C257
2 1
C222
10V-10%
.1uF
10V-10%
.1uF
10V-10%
12
C421
10uF
12
NP
X
.1uF
16V 10%
10uF
16V 10%
12
.1uF
12
10V-10%
C464
12
C384
10V-10%
.1uF
10V-10%
.1uF
10V-10%
C256
C255
2 1
DDR2 termination place immediate after DIMM
+1.8V
C460
21
.1uF
10V-10%
10uF
2 1
16V 10%
1
RN11
2 3 4
100
8
DDR_MA4
6
7 6
DDR_MA3
6
5
1%
1
RN7
2 3 4
100
8 7 6 5
DDR_MA7
DDR_MA8
6
6
1%
1
RN9
2 3 4
100
8 7 6 5
DDR_MA11
DDR_MA9
6
6
1%
1
RN6
2 3 4
100
8 7 6 5
DDR_MA12
NC_RN4_P6 NC_RN4_P5
6
1%
1
RN5
2 3 4
100
8 7 6 5
DDR_MA5
DDR_MA6
6
6
1%
1
RN4
2 3 4
100
8 7 6 5
DDR_MA1
DDR_MA2
6
6
1%
1
RN10
2 3 4
100
8 7 6 5
DDR_RAS_N
DDR_CS0_N
6
6
1%
1
RN13
2 3 4
100
8 7 6 5
DDR_MA0
DDR_BA1
6
6
1%
1
RN14
2 3 4
100
8 7 6 5
DDR_ODT0
DDR_MA13
6
6
1%
1
RN1
2 3 4
100
8 7 6 5
DDR_WE_N
DDR_CAS_N
6
6
C455
21
.1uF
10V-10%
C459
21
.1uF
10V-10%
C454
21
.1uF
10V-10%
C452
21
.1uF
10V-10%
C450
21
.1uF
10V-10%
C446
21
.1uF
10V-10%
C449
21
.1uF
10V-10%
C444
21
.1uF
10V-10%
C442
21
.1uF
10V-10%
C440
21
.1uF
10V-10%
C438
21
.1uF
10V-10%
C439
21
.1uF
10V-10%
1%
10uF
16V 10%
1
RN2
2 3 4
100
8 7 6 5
DDR_CKE0
DDR_CKE1
6,12
6,12
1%
1
RN3
2 3 4
100
8 7 6 5
DDR_MA10
DDR_BA0
6
6
1%
1
RN12
2 3 4
100
8 7 6 5
DDR_ODT1
DDR_CS1_N
6
6
1%
2) Place 10uF caps at each end of row
C461
.1uF
10V-10%
C456
.1uF
10V-10%
C457
.1uF
10V-10%
C453
.1uF
10V-10%
C451
.1uF
10V-10%
C445
.1uF
10V-10%
C447
.1uF
10V-10%
C448
.1uF
10V-10%
C443
.1uF
10V-10%
C441
.1uF
10V-10%
C437
.1uF
10V-10%
C458
.1uF
10V-10%
21
C360
21
10uF 6.3V
C359
21
1 2
10uF 6.3V
21
21
21
21
21
21
21
21
21
21
+3.3V_RSR
R9 R11 R13 R17
VSS_R9 VSS_R11 VSS_R13 VSS_R17
VSS_AJ27
AJ27
C436
C400
C401
C398
C462
C404
C403
C405
C402
C407
C466
C406
C408
C5045
ROOM = ROMB_DIMM
6-8,10-18,21-24,28,29
+1.8V
11,12,14,29
+1.5V
R19
VSS_R19
T2 T5
VSS_T2
+1.3V
VSS_T5
8,17,18,29
28
4 4
IOP_VSS_PLL1
8
IOP_VSS_PLL2
8
IOP_VSS_PLL3
8
M18 R16
VSSA1 VSSA4
M12
K15
VSSA2 VSSA3
VSSA5
P14
IOP_VSS_PLL4 IOP_VSS_PLL5
8 8
1
2
3
INTEL DOBSON IOP GND
VER C0
HETERO 6 OF 6
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
DC
INC.
ROUND ROCK,TEXAS
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
9 OF 45
Page 10
DOBSON Flash and NVRAM
B D
CA
1
1
Populated For AMD
+3.3V_RSR
SUB to 0 ohm for Intel
+3.3V_RSR
R123
PU_ROMB_FLSH_U40_OE_N
21
stub
220
U40
1
OE
ROMB_FLSH_AD3
8,10
ROMB_FLSH_AD4
8,10
ROMB_FLSH_AD5
8,10
ROMB_FLSH_AD6
8,10
ROMB_FLSH_AD7
8,10
ROMB_FLSH_AD8
8,10
ROMB_FLSH_AD9
8,10
ROMB_FLSH_AD10
8,10
2
R115
21
220
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
10 20
GND VCC
74LVC573A
TSSOP20
PU_ROMB_FLSH_U41_OE_N
stub
U41
1
OE
LE
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
LE
11
19 18 17 16 15 14 13 12
11
C351
+3.3V_RSR
1 2
0.1uF 16V
ROMB_FLSH_ALE
ROMB_FLSH_A3 ROMB_FLSH_A4 ROMB_FLSH_A5 ROMB_FLSH_A6 ROMB_FLSH_A7 ROMB_FLSH_A8 ROMB_FLSH_A9
ROMB_FLSH_A10
ROMB_FLSH_ALE
8,10
10 10 10 10 10 10 10 10
8,10
8,10,36
ROMB_A19
R375
8.2K-5%
1 2
R198
NP
1 2
X
0-5%
De-pop for AMD flash
stub
stub
8 8,10 8,10
36
8,10 8,10
10 10 10 10 10 10 10 10 10 10 10 10 10
8
8
8
8,10,36
DOBSON_FLSH_EN_N ROMB_FLSH_OE_N ROMB_FLSH_WE_N
I_U16_PG10_P47
ROMB_FLSH_RST_N NC_ROMB_RDY_N
ROMB_A1 ROMB_A2 ROMB_FLSH_A3 ROMB_FLSH_A4 ROMB_FLSH_A5 ROMB_FLSH_A6 ROMB_FLSH_A7 ROMB_FLSH_A8 ROMB_FLSH_A9 ROMB_FLSH_A10 ROMB_FLSH_A11 ROMB_FLSH_A12 ROMB_FLSH_A13 ROMB_FLSH_A14 ROMB_FLSH_A15 ROMB_A16 ROMB_A17 ROMB_A18 ROMB_A19
26 28 11
47 12 15
25 24
22 21 20 19 18
48 17 16
8 7 6 5 4 3 2 1
CE OE WE
BYTE RESET RY/BY
A0 A1
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18
U16
29LV320
VCC
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8A2
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14
DQ15/A-1
VSS1 VSS2
A19 A20
NC13
WP/ACC
37
29 31 33 35 38 40 42 44 3023 32 34 36 39 41 43 45
27 46
9 10 13 14
ROMB_FLSH_AD0 ROMB_FLSH_AD1 ROMB_FLSH_AD2 ROMB_FLSH_AD3 ROMB_FLSH_AD4 ROMB_FLSH_AD5 ROMB_FLSH_AD6 ROMB_FLSH_AD7 ROMB_FLSH_AD8 ROMB_FLSH_AD9 ROMB_FLSH_AD10 ROMB_FLSH_AD11 ROMB_FLSH_AD12 ROMB_FLSH_AD13 ROMB_FLSH_AD14 ROMB_FLSH_AD15
ROMB_A20 ROMB_A21
PU_IB_FLSH_13
8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10
8,36 8
PU_ROMB_FLSH_WP_N
+3.3V_RSR
R176
1 2
stub
SUB*_H4550
ROMB_FLSH_AD11
8,10
ROMB_FLSH_AD12
8,10
ROMB_FLSH_AD13
8,10
ROMB_FLSH_AD14
8,10
ROMB_FLSH_AD15
8,10
PD_74LVC573_P7
stub
stub
220
R337
1 2
R336
1 2
PD_74LVC573_P8
stub
220
R328
PD_74LVC573_P9
220
1 2
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
10 20
GND VCC
74LVC573A
TSSOP20
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
19 18 17 16 15 14 13 12
+3.3V_RSR
ROMB_FLSH_A11 ROMB_FLSH_A12 ROMB_FLSH_A13 ROMB_FLSH_A14 ROMB_FLSH_A15
NC_74LVC573_P14 NC_74LVC573_P13 NC_74LVC573_P12
10 10 10 10 10
H4550 is made from a 2mx16 blank flash, Dell PN 9N465
AMD Footprint
Dell PN 9N465 is an AMD 29LV320DB-90EI
AMD Flash
A19
Intel Flash
NCPin9
change to 1uF
21
C355
8.2K-5% R646
NP
1 2
stub
0-5%
De-pop for AMD flash
C352
1uF 6.3V
+3.3V_RSR
X
12
0.1uF 16V
R138
1 2
0.1uF 16V
10K-1%
stub
+3.3V_RSR
R110
1 2
C49
36 8,10 8,10
21
R55
10K-1%
1-1%
1 2
ROMB_A0
8
ROMB_A1
8,10
ROMB_A2
8,10
ROMB_FLSH_A3
10
ROMB_FLSH_A4
10
ROMB_FLSH_A5
10
ROMB_FLSH_A6
10
ROMB_FLSH_A7
10
ROMB_FLSH_A8
10
ROMB_FLSH_A9
10
ROMB_FLSH_A10
10
ROMB_FLSH_A11
10
ROMB_FLSH_A12
10
ROMB_FLSH_A13
10
ROMB_FLSH_A14
10
ROMB_NVRAM_EN_N
ROMB_FLSH_OE_N ROMB_FLSH_WE_N
stub
NP
21
R56
X
10K-1%
V_IOP_NVRAM_POWER
PU_ROMB_NVRAM_HSB
12 11 10
28 27 23 26
29
31 22
25 30
A0 A1 A2
8
A3
7
A4
6
A5
5
A6
4
A7 A8 A9 A10 A11
3
A12 A13
2
A14 HSB E
G W
32Kx8-35ns
NVSRAM
SUB=SUB*_F7747
U29
VCAP
VCCX
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
VSS16
NC9
NC24
I_U29_VCAP_P1
1
32
13 14 15 17 18 19 20 21
16
9 24
0.1uF 16V
1 2
C45
ROMB_FLSH_AD0 ROMB_FLSH_AD1 ROMB_FLSH_AD2 ROMB_FLSH_AD3 ROMB_FLSH_AD4 ROMB_FLSH_AD5 ROMB_FLSH_AD6 ROMB_FLSH_AD7
NC_SIMTEK_9
NC_SIMTEK_24
+
10V-20%
68uF
1
C7
2
68uF
8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10
2
Pin13 NC VPP
C349
1 2
0.1uF 16V
Pin15 R/B# A19 Pin47 BYTE# Vccq
8F073 is blank p/n for Intel Flash 8F073 is 2Mx16 part, bottom boot block
ROOM = ROMB_FLASH
ROOM = ROMB_NVRAM
3
3
can be 3.3v or 5v
+5V_RSR
UART header
NP
P2
3 4
SHROUDED
21
X
U0_ROMB_TXD U0_ROMB_RXD
8
8
+5V_RSR
11,15,21-24,29,36
+3.3V_RSR
6-9,11-18,21-24,28,29
4 4
ROOM = UART Debug Header, for production
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
DC
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
10 OF 45
Page 11
B D
CA
Keep FETS biased LOW to let FET on until VBAT_3V is ramped up
3P3VAUX_PWRGOOD_ROMB_BUF
21
4
CHARGER STATUS FAST / PRECHARGE FAULT CONDITION CHARGED > 90% BATTERY NOT THERE
STAT 2STAT 1
RED LED GREEN LED
ONOFF
1Hz CYCLING
ON ON OFF OFF OFF
+3.3V_AUX
2N7002
1 2
Q17
R74
1.5K-5%
2
3
R49
S
G
1
2N7002
D
I_Q17_P3
I_Q22_PG11_P1
2N7002
stub
470
G
1
I_Q22_P3
D
2
S
2N7002
3
2N7002
1 2
G S
Q22
3
D
R79
1.5K-5%
SI3911DV
21
N
S1D1
SI3911DV
1 2 3
456
tON = 15ns tRISE = 15ns tOFF = 40ns
tFALL = 25ns
1
1
1
G
SI3911DV
From Boxter / Yellowstone / Everglades
Q18
S
5
D
6
depop R200 to increase charge time from 3 to 4.5 hours
change to 0.5 amp from 1Amp when charging
Current limit=0.1V/R
Outer layer 3" long 10 mil wide = 0.1 ohm
R5
1 2
BATTERY OUT = 4.1V to 3.0V
BATTERY_OUT
11
BATTERY_OUT
11
VOLTAGE=4.2
5
S
Q21
VAUX_PATH
BAT_PATH
6
D
2-5%
+5V_RSR
I_U38_TRMSEL_P13
R199
stub
21
47K-5%
NP
21
NP: Vreg=4.1V/cell
NP
21
2
R200
X
47K-5%
C292
1 2
.01uF 16V
R113
1
.2-1%
I_U38_PG11_PIN2
1
NC_1
2
IN_0
3
IN_1
4
VCC
5
ISNS
6
NC_2
7
APG
8
EN
9
VSEL
10
GND/HEATSINK
U38
BQ24002
NC_4 OUT_0 OUT_1
VSENSE
AGND STAT2 STAT1
TMR_SEL
CR
NC_3
20 19 18 17 16 15 14 13 12 11
2.85V @100uA
NC_U26_4NC_U26_1
NC_U26_11
I_CR_U38_P12
I_U38_VSENSE_P17
stub
C507
21
10pF
PU_U38_VSEL_P9
stub
R202
X
47K-5%
2
NC_U26_2
R654
1 2
1 2
8.2K-5%
0.1uF 16V
21
C259
10uF
16V 10%
C50
50V-5%
1 2
2-5%
21
C261
ROMB_BAT_STAT2
ROMB_BAT_STAT1
LI_BAT_PACK_P
R338
1 2
100-1%
36
36
4
+3.3V_RSR
R12
21
4.7K
R11
1 2
4.7K
Batt sense res, place by batt conn
10uF
16V 10%
+3.3V_RSR
1 2
8.2K-5% R191
LI_BAT_PRSNT_N
RAID_BAT
1 2 3 4
POCKET SHR
BATT_PRSNT PACK+ THERM PACK-
8,36
D
3
2N7002
21
SG
3P3VAUX_PWRGOOD_ROMB_BUF2
4
10K-5%
2N7002
11,12,34
R166
21
Q15
VBAT_3V
R4
G
1
SI3911DV
I_Q29_P4
3
2
14
5
VHC14
D
S
U7
stub
2N7002
2N7002
1
G
I_Q30_PG11_P1
21
R21
6
21
CPLD_CHARGER_EN
36
R464
1 2
0-5%
C268
Add 6 vias in thermal pad, to gnd
1uF 6.3V
NP
21
R57
X
10K-1%
+3.3V_RSR
21
R162
21
R217
22K-5%
100K
C265
0.57...1.48V
1 2
1uF 6.3V
I_V_C265_P2
+3.3V_AUX
I_RAID_BAT_CONN_P3
stub
21
R1001
1.5K-5%
0-5%
R227
1 2
36
0-5%
stub
ROMB_SWITCH_1P8_EN_
Connects to pin36 of Xilinx part
R1002
SUB=NP*
ROMB_SWITCH_1P8_EN
21
D
3
Q900
2N7002
R728
470
21
1
G
S
2
11,36
ROMB_SWITCH_1P8VAUX_EN_N
Connects to pin 6 of Xilinx.
Load R728 and Q900 and unload R1002 to bypass glitchy xilinx parts Load R1002 and unload R728 and Q900 when non-glitchy Xilinx are used
3
G
Q18
D
4
4
D
S
2
2
S
Q21
SI3911DV
G
3
R66
1 2
stub
D
I_Q30_P3
3
4.7K
Q30
1
G
S
2
Vgs >1V
2N7002
470
3P3VAUX_PWRGOOD_BUFB_N
+1.8V
C
3
2N3906
1 2
B E
R177
21
I_Q10_P1_R
1.5K-5%
stub
C
3
2N3904
1 2
B E
stub
3906
I_Q47_P1_R
stub
C213
1
Q10
1 2
1uF 6.3V
D
+3.3V_AUX
2
3
I_Q10_P3_R
10K-1% 10K-1%
R687
21
21
C210
8 7 6 5
stub
R686
21
D3 D2
D1D4
I_Q13_P4_R
Q47
3904
1
G1
1uF 6.3V
Q13
SI4463DY
stub
10K-1%
S2D2G2
SOT23-6
U34 input works with 2.7V or greater.
VBAT_3V is 3V rail powered by battery or 3.3Vaux
VBAT_3V
VOLTAGE=3.3
11,12,34
U34
3 4
SHDN OUT
2
GND
MAX1733EUK_T
51
LXIN
Set for 1.8V
KILL_RAID_REG_N
11
S
2
S
3
S
4 5DG
11A 1.5W 20 mOhm
SI4463DY
SO-8
P MOSFET
S
3
S3 S2 S1
2 1
G
4
G
16V 10%
10uF
R3
1 2
8.2K-5%
R685
21
I_Q47_P3_R
3
2
-12V
stub
V_U34_LX_P4
C258
21
R266
1 2
R78
1 2
D1 D D
22uF 10V
8 7 6
stub
30.1K-1%68.1K-1%
I_U34_OUT
stub
1
C345
2
L2
10uH 1.1A
C478
470pF
50V-10%
22uF 10V
1
C346
2
21
21
22uF 10V
12C347
22uF 10V
1
C297
2
22uF 10V
1
C357
2
VOLTAGE=1.8 RATSNEST_SCHEDULE=MIN_TREE
DDR +1.8volts
VBAT_RAID
6,12
2
3
3
VBAT_3V
11,12,34
ROOM = ROMB_CHARGER
A05_SMR - Added R644, Q900, R1001, R1002, and R728 for Xilinx glitch ROMB_SWITCH_1P8AUX_EN_N is SYS_PWRGOOD from CPLD
D
3
2N7002
1 2
G S
22K-5%
21
R164
KILL_RAID_REG_N
11
D
3
Rds 14 ohms, Vgs 2.5V
Q9
2N7002
D
3
Q7
2N7002
R20
1 2
470
I_Q9_P1_R
1
G
S
stub
2
1
G
S
2
11,12,34
VBAT_3V
VBAT_3V is 3V rail powered by battery or 3.3Vaux
11,36
ROMB_SWITCH_1P8VAUX_EN_N
This allows factory to disable battery for shipping
pull up on page 36
R178
470
21
I_RBAT_EN_N_R
stub
+3.3V_AUX
4-2U,7-3W,8-2X,16-2U,19-3W 21-3W,22-3W,23-3W,24-3W,30-2W
+5V_RSR
31-3W,32-2T,33-3V,36-3W
10,15,21-24,29,36
+3.3V_RSR
6-10,12-18,21-24,28,29
+1.8V
RBAT_EN_N
7,16,36
4 4
SYSTEM_PWRGOOD_RISER_BUF_5V
C73
1 2
330pF 50V
ROMB_BAT_EN_N
8,36
2N7002
2N7002
G
1
S
2
QB2
D
3
stub
I_RBAT_EN_2
D
3
2N7002
1 2
G S
Q45
G
1
D
3
S
2
I_RBAT_EN_3
R13
C60
1K-5%
1 2
11
14
U7
10
I_RBAT_EN_1
14
U7
9
8
RBAT_EN_N
VHC14 VHC14
stub
2
1
1000pF
50V-10%
stub
C59
1 2
11
0.1uF 16V
ROOM = ROMB_BATTERY_CONTROL
Source of VBAT_RAID
BatteryMain Power VBAT_RAID
x x
on off
Vaux
x on
11
Fom main Power From Vaux
ROOM = ROMB_ENABLE
A B
off
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
off
on
From Battery
-12V
9,12,14,29
19,21-24,28
TITLE
DWG NO.
DATE
DC
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
11 OF 45
Page 12
GND
3
DS1818
RESET# VCC
B D
21
CA
+3.3V_RSR
2.98 to 3.15V
809T
(3.08V)
1
0.1uF 16V
2 1
C596
U43
3
VCC
GND
1
RESET
2
3P3V_RISER_PWRGOOD
21
29,36
VBAT_3V
11,12,34
6,11
VBAT_RAID
Battery or 1.8V powered
CPLD_CKE drives the CPLD on a falling edge to hold DDR_RST# low. We only support buffered DIMMs, which hold internal CKE low during DDR_RST
1
R132
100K
PCI_RST_RISER_BUF2_N
36
Could be 809S, 2.80 to 2.97V
SEE PAGE 29 FOR 809 SELECTION TABLE
12 13
74VHC00
1411U37
Battery or 3.3V powered
I_IOP_SPECIAL_RST_1
R15
21
33-5%
I_IOP_SPECIAL_RST_3
DDR_CKE1
143U37
1 2
74VHC00
stub
stub
IOP_SPECIAL_RST_N
12
VBAT_3V
11,12,34
CPLD_CKE
D
3
S
2
D
3
BSS138
1 2
G S
IOP_PWRDELAY
12
IOP_SPECIAL_RST_N
12
146U37
4 5
74VHC00
5 6
74LVC02
14 U9
4
I_DDR_CKE1
0
2 3
74LVC02
stub
14 U9
stub
1
I_DDR_CKE1_GATE
Q42
FDN337N
1 G
6,9
12,36
DPN T1778 is 74LVC02
+3.3V_RSR
NP
0.1uF 16V
21
12
R225
X
100K
S
2
1
G
Q44
C216
DDR_CKE0
6,9
2
2
D & S swapped from 2N7002 STD
S
3
TP0202T
1 2
G
D
R213
1 2
TP0202T
I_IOP_PWRDELAY_1
1K-5%
20%
D
3
R214
1 2
.22uF 25V
1 2
stub
1K-5%
I_IOP_PWRDELAY2
C270
D4
1
CPLD_CKE
2
MBRS130LT3
stub
14
1
U7
stub
14 U9
8 9
VBAT_3V
14
U7
2
I_IOP_PWRDELAY
stub
3
4
VHC14VHC14
11,12,34
IOP_PWRDELAY
12
+3.3V_RSR
74LVC02
74LVC00/02 Specification
Vcc=3.3V Vcc=1.8V
10
I_DDR_CKE0_1I_DDR_CKE0_2
11 12
74LVC02
stub
14
U9
13
I_DDR_CKE0_GATE
Q43
FDN337N
D
3
1 G
S
2
stub
12,36
Vih_min = 2.3v (min) Vih_min = 1.5v (min)
ViL_max = 0.5v (max) Voh_min = 1.8v (min) VoL_max = 0.1v (max)
ROOM = DIMM_SELF_REF
BAR43
3 1
D19
R656
1 2
A (Anode)
4.7K
GATE_IOP_PWRDELAY
N
K (Cathode)
3
BAR43
1 2
P
ViL_max = 0.99v (max) Voh_min = 2.9v (min) VoL_max = 0.1v (max)
8
Use schimitt trigger to handle the slow rising IOP_PWRDELAY Gate IOP_PWRDELAY since Dobson is 3.3V rail
3
3
2.495 +- 0.025V V_2P5V_AUX_REF
28
+- 3%
1 2
4.99K-1%
1 2
10.2K-1%
R216
R2
ROOM = IOP POWR DELAY
1.854V
+- 0.054v1.8V
+1.8V
50V-10%
1000pF
1.679V
1.6755
21
+- 0.028 +- 1.6%
1.746V
1 2
C262
I_1P679_AUX_VREF
R215
1K-5%
1.703
1.648
1.8mv Hystereisis
stub
1
3
stub
I_U18_P5
+3.3V_AUX
+
-
R59
1 2
1M-5%
U18
5
LMV331
V G
4
2
21
1P8V_PWRGOOD
29,36
C537
0.1uF 16V
+3.3V_RSR
6-11,13-18,21-24,28,29
+1.8V
9,11,14,29
4 4
Set 1.8V pwr_good at ~95% (DDR-2 Vdd spec +/- 5%)
to switch over the power rail
INC.
TITLE
ROUND ROCK,TEXAS
ROOM = ROMB_BATTERY_CONTROL
SCHEM, RSR, PE2800, SV
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
12 OF 45
A B
DC
Page 13
SCSI Controller: PCI_NX/Differential Pairs
B D
CA
from Everglades
1
1
ROOM=LSI_1030
U_SCSI
m66en pin AC5 is actually IOPD_GNT
stub
PD_IOP_PCIX_A_M66EN
12
R1
1K-5%
2
3
CK_IOP_PCIX_A_LSI
7
IOP_PCIX_A_RST_N
7,27
IOP_PCIX_A_CBE7_N
7,27
IOP_PCIX_A_CBE6_N
7,27
IOP_PCIX_A_CBE5_N
7,27
IOP_PCIX_A_CBE4_N
7,27
IOP_PCIX_A_CBE3_N
7,27
IOP_PCIX_A_CBE2_N
7,27
IOP_PCIX_A_CBE1_N
7,27
IOP_PCIX_A_CBE0_N
7,27
IOP_PCIX_A_AD63
7,27
IOP_PCIX_A_AD62
7,27
IOP_PCIX_A_AD61
7,27
IOP_PCIX_A_AD60
7,27
IOP_PCIX_A_AD59
7,27
IOP_PCIX_A_AD58
7,27
IOP_PCIX_A_AD57
7,27
IOP_PCIX_A_AD56
7,27
IOP_PCIX_A_AD55
7,27
IOP_PCIX_A_AD54
7,27
IOP_PCIX_A_AD53
7,27
IOP_PCIX_A_AD52
7,27
IOP_PCIX_A_AD51
7,27
IOP_PCIX_A_AD50
7,27
IOP_PCIX_A_AD49
7,27
IOP_PCIX_A_AD48
7,27
IOP_PCIX_A_AD47
7,27
IOP_PCIX_A_AD46
7,27
IOP_PCIX_A_AD45
7,27
IOP_PCIX_A_AD44
7,27
IOP_PCIX_A_AD43
7,27
IOP_PCIX_A_AD42
7,27
IOP_PCIX_A_AD41
7,27
IOP_PCIX_A_AD40
7,27
IOP_PCIX_A_AD39
7,27
IOP_PCIX_A_AD38
7,27
IOP_PCIX_A_AD37
7,27
IOP_PCIX_A_AD36
7,27
IOP_PCIX_A_AD35
7,27
IOP_PCIX_A_AD34
7,27
IOP_PCIX_A_AD33
7,27
IOP_PCIX_A_AD32
7,27
IOP_PCIX_A_AD31
7,27
IOP_PCIX_A_AD30
7,27
IOP_PCIX_A_AD29
7,27
IOP_PCIX_A_AD28
7,27
IOP_PCIX_A_AD27
7,27
IOP_PCIX_A_AD26
7,27
IOP_PCIX_A_AD25
7,27
IOP_PCIX_A_AD24
7,27
IOP_PCIX_A_AD23
7,27
IOP_PCIX_A_AD22
7,27
IOP_PCIX_A_AD21
7,27
IOP_PCIX_A_AD20
7,27
IOP_PCIX_A_AD19
7,27
IOP_PCIX_A_AD18
7,27
IOP_PCIX_A_AD17
7,27
IOP_PCIX_A_AD16
7,27
IOP_PCIX_A_AD15
7,27
IOP_PCIX_A_AD14
7,27
IOP_PCIX_A_AD13
7,27
IOP_PCIX_A_AD12
7,27
IOP_PCIX_A_AD11
7,27
IOP_PCIX_A_AD10
7,27
IOP_PCIX_A_AD9
7,27
IOP_PCIX_A_AD8
7,27
IOP_PCIX_A_AD7
7,27
IOP_PCIX_A_AD6
7,27
IOP_PCIX_A_AD5
7,27
IOP_PCIX_A_AD4
7,27
IOP_PCIX_A_AD3
7,27
IOP_PCIX_A_AD2
7,27
IOP_PCIX_A_AD1
7,27
IOP_PCIX_A_AD0
7,27
POWER_DRAW=P3.3V@1A POWER_DRAW=P1.8V@1.8A
AC22
AB10
AC5
AA23
AC25
Y23
AD26
AB13 AB14 AE18 AE21
W22
AB25
AC26
AA25
W23
Y25
Y26 V22 U22 V24 V23 U24 V25
W26
U23 U25
T22
T23
T25 R25 R22 P22 P23 R23 P24 P25
T26 R26
M26
L26 N25 N24
AE9
AF8
AE10 AB11
AC11
AE11 AE12
AB12 AC12 AD13
AE13
AF11
AF16
AE14 AC15 AC14 AD17
AE19 AC18
AB17
AB18
AF20
AE20 AC19
AF23
AE22
AB19 AD21
AF24 AC20
AE23 AC21
CLK RST M66EN
CBE7 CBE6 CBE5 CBE4 CBE3 CBE2 CBE1 CBE0
AD63 AD62 AD61 AD60 AD59 AD58 AD57 AD56 AD55 AD54 AD53 AD52 AD51 AD50 AD49 AD48 AD47 AD46 AD45 AD44 AD43 AD42 AD41 AD40 AD39 AD38 AD37 AD36 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
LSI53C1030 REV C0
U_SCSI
LSI LOGIC ULTRA320 SCSI
HETERO 1 OF 4
PAR
PAR64
ACK64 REQ64
FRAME
TRDY
IRDY
STOP
DEVSEL
IDSEL
REQ
GNT
PERR SERR
INTA INTB
ALT_INTA ALT_INTB
PVT1 PVT2
GPIO_7 GPIO_6 GPIO_5 GPIO_4 GPIO_3 GPIO_2 GPIO_1 GPIO_0
A_LED B_LED
HB_LED
BWE1 BWE0
FLSHALE1 FLSHALE0
MOE
FLSHCE
MPAR1 MPAR0
MCLK
ADSC
ADV
MAD15 MAD14 MAD13 MAD12 MAD11 MAD10
MAD9 MAD8 MAD7 MAD6 MAD5 MAD4 MAD3 MAD2 MAD1 MAD0
RAMCE
SERIAL_DATA
SERIAL_CLK
NC_1 NC_2 NC_3
AF19 AA24
AB20 AD22 AB15 AE16 AE15 AB16 AC16 AC13
AD10 AE8
AE17 AC17
AC8 AE7
AF7 AB9 AE5 AF4
K25 L23 L25 M25 H25 K24 AE25 AC23
J23 K23 C25
E24 H23
J24 K22
G26 G25
C22 B24
E20
D21 B23
D22 E21 B25 D23 E22 C24 F22 E23 D26 E25 H22 F24 G23 D25 F23 G22
D20 H26
J25 A24
N23 AC9
NC_SCSI_AF7
NC_SCSI_AB9 I_SCSI_PVT1_N I_SCSI_PVT2_N
NC_SCSI_GPIO7 NC_SCSI_GPIO6 NC_SCSI_GPIO5 NC_SCSI_GPIO4 NC_SCSI_GPIO3 NC_SCSI_GPIO2 NC_SCSI_GPIO1 NC_SCSI_GPIO0
NC_SCSI_CH_A_LED_N NC_SCSI_CH_B_LED_N
SCSI_HB_LED_N
NC_SCSI_E24
NC_SCSI_H23_N
NC_SCSI_MAS1_N NC_SCSI_MAS0_N
NC_SCSI_MOE_N
NC_SCSI_G25
PU_SCSI_MPAR1_N PU_SCSI_MPAR0_N
NC_SCSI_E20
NC_SCSI_D21 NC_SCSI_B23
PU_SCSI_MAD15
PU_SCSI_MAD14
PU_SCSI_MAD13
PU_SCSI_MAD12
PU_SCSI_MAD11
PU_SCSI_MAD10
PU_SCSI_MAD9 PU_SCSI_MAD8 PU_SCSI_MAD7 PU_SCSI_MAD6 PU_SCSI_MAD5 PU_SCSI_MAD4 PU_SCSI_MAD3 PU_SCSI_MAD2 PU_SCSI_MAD1 PU_SCSI_MAD0
NC_SCSI_RAMCE_N
SCSI_SDA
SCSI_SCL
PU_SCSI_A24
NC_SCSI_N23
NC_SCSI_AC9
PULLUP FOR PCI-X 66
IOP_PCIX_A_PAR
IOP_PCIX_A_PAR64
IOP_PCIX_A_ACK64_N IOP_PCIX_A_REQ64_N
IOP_PCIX_A_FRAME_N
IOP_PCIX_A_TRDY_N
IOP_PCIX_A_IRDY_N
IOP_PCIX_A_STOP_N
IOP_PCIX_A_DEVSEL_N
PCIX_SCSI_IDSEL
IOP_PCIX_A_REQ0_N
IOP_PCIX_A_GNT0_N
IOP_PCIX_A_PERR_N IOP_PCIX_A_SERR_N
SCSI_INTA_N SCSI_INTB_N
R171
13
13 13
13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13
14 14
TEST PAD
7,27 7,27
7,27 7,27 7,27 7,27 7,27 7,27 7,27
7
7,27 7,27
7,27 7,27
8,27 8,27
stub
21
49.9-1%
stub
+3.3V_RSR
R172
1 2
5,15
8.2K-5%
stub
SCSI_A_DIFFSENSE
R17
stub
R47
21
220K
22K-5%
C3
1 2
0.1uF 16V
21
I_SCSI_A_DIFFSENSE_R
stub
R7
21
10K-1%
I_SCSI_A_VDDBIAS
I_SCSI_A_RBIAS
stub
MUST BE 1%
check shredder
+3.3V_RSR
SCSI_A_SD15_P
5,15
SCSI_A_SD14_P
5,15
SCSI_A_SD13_P
5,15
SCSI_A_SD12_P
5,15
SCSI_A_SD11_P
5,15
SCSI_A_SD10_P
5,15
SCSI_A_SD9_P
5,15
SCSI_A_SD8_P
5,15
SCSI_A_SD7_P
5,15
SCSI_A_SD6_P
5,15
SCSI_A_SD5_P
5,15
SCSI_A_SD4_P
5,15
SCSI_A_SD3_P
5,15
SCSI_A_SD2_P
5,15
SCSI_A_SD1_P
5,15
SCSI_A_SD0_P
5,15
SCSI_A_SD15_N
5,15
SCSI_A_SD14_N
5,15
SCSI_A_SD13_N
5,15
SCSI_A_SD12_N
5,15
SCSI_A_SD11_N
5,15
SCSI_A_SD10_N
5,15
SCSI_A_SD9_N
5,15
SCSI_A_SD8_N
5,15
SCSI_A_SD7_N
5,15
SCSI_A_SD6_N
5,15
SCSI_A_SD5_N
5,15
SCSI_A_SD4_N
5,15
SCSI_A_SD3_N
5,15
SCSI_A_SD2_N
5,15
SCSI_A_SD1_N
5,15
SCSI_A_SD0_N
5,15
SCSI_A_SCD_P
5,15
SCSI_A_SCD_N
5,15
SCSI_A_SIO_P
5,15
SCSI_A_SIO_N
5,15
SCSI_A_SMSG_P
5,15
SCSI_A_SMSG_N
5,15
SCSI_A_SREQ_P
5,15
SCSI_A_SREQ_N
5,15
SCSI_A_SACK_P
5,15
SCSI_A_SACK_N
5,15
SCSI_A_SBSY_P
5,15
SCSI_A_SBSY_N
5,15
SCSI_A_SATN_P
5,15
SCSI_A_SATN_N
5,15
SCSI_A_SRST_P
5,15
SCSI_A_SRST_N
5,15
SCSI_A_SSEL_P
5,15
SCSI_A_SSEL_N
5,15
SCSI_A_SDP0_P
5,15
SCSI_A_SDP0_N
5,15
SCSI_A_SDP1_P
5,15
SCSI_A_SDP1_N
5,15
+3.3V_RSR
SCSI_ICE_TCK
13
SCSI_ICE_TMS
13
SCSI_ICE_TDI
13
SCSI_ICE_TDO
13
SCSI_ICE_TRST_N
13
SCSI_ICE_RTCK
13
SCSI_TCK
13
SCSI_TMS
13
SCSI_TDI
13
SCSI_TDO
13
NC_SCSI_AA22 NC_SCSI_AC4
PULLDOWN FOR PCI 33
W5
A_SD15+
Y2
A_SD14+
AA3
A_SD13+
AC1
A_SD12+
D1
A_SD11+
G1
A_SD10+
H4
A_SD9+
H2
A_SD8+
P3
A_SD7+
R5
A_SD6+
R2
A_SD5+
T4
A_SD4+
U4
A_SD3+
U3
A_SD2+
V5
A_SD1+
V3
A_SD0+
Y1
A_SD15-
AA2
A_SD14-
AB2
A_SD13-
AD1
A_SD12-
F2
A_SD11-
G2
A_SD10-
J4
A_SD9-
H1
A_SD8-
R4
A_SD7-
T5
A_SD6-
T2
A_SD5-
U2
A_SD4-
U5
A_SD3-
V2
A_SD2-
V4
A_SD1-
W4
A_SD0-
T1
A_VDDBIAS
E2
A_DIFFSENS
R1
A_RBIAS
K4
A_SCD+
K3
A_SCD-
J5
A_SIO+
K5
A_SIO-
L1
A_SMSG+
L2
A_SMSG-
J3
A_SREQ+
J2
A_SREQ-
L5
A_SACK+
M5
A_SACK-
N4
A_SBSY+
N3
A_SBSY-
N5
A_SATN+
M4
A_SATN-
M2
A_SRST+
M1
A_SRST-
K2
A_SSEL+
L4
A_SSEL-
P5
A_SPD0+
P4
A_SPDO-
W1
A_SPD1+
W2
A_SPD1-
AF12
PCI5VBIAS8
AE6
PCI5VBIAS7
AD18
PCI5VBIAS6
AD9
PCI5VBIAS5
AC10
PCI5VBIAS4
AB22
PCI5VBIAS3
Y22
PCI5VBIAS2
W25
PCI5VBIAS1
M23
PCI5VBIAS0
AA4
TCK_ICE
Y5
TMS_ICE
AB3
TDI_ICE
AD2
TDO_ICE
AB4
TRST_ICE
AA5
RTCK_ICE
AC6
TCK_CHIP
AE4
TMS_CHIP
AF3
TDI_CHIP
AD6
TDO_CHIP
AC2 Y4
CLKMODE_1 IDDTN
AA22
CLKMODE_0
AC4
SCSI_FSN
LSI LOGIC ULTRA320 SCSI
LSI53C1030 REV C0 HETERO 2 OF 4
B_SD15+ B_SD14+ B_SD13+ B_SD12+ B_SD11+ B_SD10+
B_SD9+ B_SD8+ B_SD7+ B_SD6+ B_SD5+ B_SD4+ B_SD3+ B_SD2+ B_SD1+ B_SD0+
B_SD15­B_SD14­B_SD13­B_SD12­B_SD11­B_SD10-
B_SD9­B_SD8­B_SD7­B_SD6­B_SD5­B_SD4­B_SD3­B_SD2­B_SD1­B_SD0-
B_VDDBIAS
B_DIFFSENS
B_RBIAS
B_SCD+
B_SCD-
B_SIO+
B_SIO-
B_SMSG+
B_SMSG-
B_SREQ+
B_SREQ-
B_SACK+
B_SACK­B_SBSY+
B_SBSY-
B_SATN+
B_SATN-
B_SRST+
B_SRST-
B_SSEL+
B_SSEL-
B_SDP0+
B_SDP0-
B_SDP1+
B_SDP1-
TRACEPKT_7 TRACEPKT_6 TRACEPKT_5 TRACEPKT_4 TRACEPKT_3 TRACEPKT_2 TRACEPKT_1 TRACEPKT_0
PIPESTAT2 PIPESTAT1 PIPESTAT0
TRACECLK
TRACESYNC
TESTHCLK
TESTACLK TESTCLKEN SCANMODE
SCANEN
TST_RST
DEFAULTS LOW
SCLK
TN
B7 B6 B5 A4 A23 B20 A20 B19 E12 B12 D11 C10 E11 E10 B9 A8
D8 E8 C6 A3 B21 D19 E18 A19 E13 A12 B11 B10 D10 C9 D9 B8
B13 B22 A11
D17 E16 D18 E17 D16 B16 C18 B18 E14 D14 B15 A15 D13 B14 A16 E15 C17 B17 C13 D12 E9 A7
F4 G5 E3 C2 E4 F5 B2 D4
C3 E6 D5
F3 B3
E5 AE2 AB6 D7 E7 N22
C5 AD5
~LSI_TST_RST TO CPLD JUST IN CASE
NC_SCSI_TESTCLKEN
NC_SCSI_SCANMODE
SCSI_B_SD15_P SCSI_B_SD14_P SCSI_B_SD13_P SCSI_B_SD12_P SCSI_B_SD11_P SCSI_B_SD10_P
SCSI_B_SD9_P SCSI_B_SD8_P SCSI_B_SD7_P SCSI_B_SD6_P SCSI_B_SD5_P SCSI_B_SD4_P SCSI_B_SD3_P SCSI_B_SD2_P SCSI_B_SD1_P SCSI_B_SD0_P
SCSI_B_SD15_N SCSI_B_SD14_N SCSI_B_SD13_N SCSI_B_SD12_N SCSI_B_SD11_N SCSI_B_SD10_N
SCSI_B_SD9_N SCSI_B_SD8_N SCSI_B_SD7_N SCSI_B_SD6_N SCSI_B_SD5_N SCSI_B_SD4_N SCSI_B_SD3_N SCSI_B_SD2_N SCSI_B_SD1_N SCSI_B_SD0_N
I_SCSI_B_VDDBIAS
SCSI_B_SCD_P SCSI_B_SCD_N
SCSI_B_SIO_P
SCSI_B_SIO_N SCSI_B_SMSG_P SCSI_B_SMSG_N
SCSI_B_SREQ_P SCSI_B_SREQ_N SCSI_B_SACK_P SCSI_B_SACK_N
SCSI_B_SBSY_P SCSI_B_SBSY_N SCSI_B_SATN_P SCSI_B_SATN_N SCSI_B_SRST_P SCSI_B_SRST_N SCSI_B_SSEL_P
SCSI_B_SSEL_N SCSI_B_SDP0_P SCSI_B_SDP0_N SCSI_B_SDP1_P SCSI_B_SDP1_N
NC_SCSI_F4
NC_SCSI_G5
NC_SCSI_E3
NC_SCSI_C2
NC_SCSI_E4 NC_SCSI_F5 NC_SCSI_B2
NC_SCSI_D4 NC_SCSI_C3
NC_SCSI_E6
NC_SCSI_D5
CK_SCSI_80MHZ
NC_SCSI_B3
NC_SCSI_E5 NC_SCSI_AE2 NC_SCSI_AB6
NC_SCSI_N22
NC_SCSI_Y4NC_SCSI_AC2
NC_SCSI_C5
SCSI_TST_RST_N
5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15
5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15
I_SCSI_B_RBIAS
5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15 5,15
14
36
I_SCSI_B_DIFFSENSE_R
R14
10K-1%
MUST BE 1%
LSI Strapping
+3.3V_RSR
R232
NP
PU_SCSI_MPAR0_N
13
PU_SCSI_MAD15
13
32bit Enable
PU_SCSI_MAD14
13
PU_SCSI_MAD13
13
ID CNTRL 0
ID CNTRL 1
SEEPROM DISABLE
stub
R73
21
22K-5%
stub
21
C4
1 2
0.1uF 16V
R22
21
220K
IOP DISABLE
SCSI_B_DIFFSENSE
NVSRAM ENABLED
ROM SIZE
ROM SIZE
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
5,15
PU_SCSI_MAD10
13
PU_SCSI_MAD11
13
PU_SCSI_MAD7
13
PU_SCSI_MAD6
13
PU_SCSI_MAD3
13
PU_SCSI_MAD2
13
PU_SCSI_MAD1
13
PU_SCSI_MAD5
13
PU_SCSI_MAD4
13
PU_SCSI_MAD0
13
PU_SCSI_MPAR1_N
13
PU_SCSI_MAD12
13
PU_SCSI_MAD9
13
PU_SCSI_MAD8
13
1 2
NP
1 2
NP
1 2
NP
1 2
NP
1 2
NP
1 2
NP
1 2
1 2
NP
1 2
NP
1 2
1 2
NP
1 2
R186
NP
1 2
4.7K
R185
NP
1 2
4.7K
R175
NP
1 2
4.7K
R174
NP
1 2
4.7K
R173
NP
1 2
4.7K
R234
NP
1 2
4.7K
4.7K
R211
4.7K
R210
4.7K
R209
4.7K
R208
4.7K
R207
4.7K
R206
4.7K
R233
4.7K
R205
4.7K
R235
4.7K
R204
4.7K
R203
4.7K
X X
X
X X X X
X X
X X X
X X X
X
Enable PCIX
Disable 133 Mhz
64 bit PCI wide
Enable 66M PCI
No ID control
2
X
Enable SEEPROM
Disable IOP
Disable NVRAM
Flash Size
Flash Size
X
X
X
3
X
X
X
X
R409
NP
NP
1 2
V6
4 4
DS1
GREEN
12
X
I_DS1_PG13_P1
stub
NP
R401
220
21
X
SCSI_HB_LED_N
13
NP
+3.3V_RSR
SUB=NO_PKG
V5
SUB=NO_PKG
V4
SUB=NO_PKG
V3
SUB=NO_PKG
V2
SUB=NO_PKG
V1
SUB=NO_PKG
SCSI_ICE_TCK SCSI_ICE_TMS
SCSI_ICE_TDI
SCSI_ICE_TDO
SCSI_ICE_TRST_N
SCSI_ICE_RTCK
13
13
13
13
13
13
NP
NP
1 2
SCSI Heartbeat LED
layout in 1x6 pattern
4.7K
R408
4.7K
R407
4.7K
R270
4.7K
21
X X
21
X X
SCSI_TMS
SCSI_TDI
SCSI_TCK
SCSI_TDO
13
+3.3V_RSR
13
RN61
1
13
13
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2 3 4
4.7K-5%
8 7 6 5
R801
NP
1 2
R802
NP
X
4.7K
1 2
X
4.7K
SCSI_ICE_TCK SCSI_ICE_TMS
SCSI_ICE_TDI
SCSI_ICE_TRST_N
SCSI_ICE_RTCK
SCSI_ICE_TDO
13 13 13 13
INC.
ROUND ROCK,TEXAS
13
13
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314 A06-00
DATE
SHEET
2/23/2005
+3.3V_RSR
6-12,14-18,21-24,28,29
REV.
13 OF 45
A B
DC
Page 14
SCSI Controller: Power/Misc
INDUCTORS FROM EVERGLADES
B D
CA
1
2
2
2
L6
FERRITE
1206
L4
FERRITE
1206
1
1
I_SCSI_VSSA_AD24
I_SCSI_VSSA_H5
stub
stub
H5
AD24
T24
A5
A9 A13 A17 A21 A25
B1 B26
C4
C8 C12 C16 C20 D24
E1
F26
G3 H24
J1
K26
L3 L11 L12 L13 L14 L15 L16
M11 M12 M13 M14 M15 M16 M24
N1 N11 N12 N13 N14 N15 N16
VSSA_H5 VSSA_AD24
VSS_IO_T24 VSS_IO_A5 VSS_IO_A9 VSS_IO_A13 VSS_IO_A17 VSS_IO_A21 VSS_IO_A25 VSS_IO_B1 VSS_IO_B26 VSS_IO_C4 VSS_IO_C8 VSS_IO_C12 VSS_IO_C16 VSS_IO_C20 VSS_IO_D24 VSS_IO_E1 VSS_IO_F26 VSS_IO_G3 VSS_IO_H24 VSS_IO_J1 VSS_IO_K26 VSS_IO_L3 VSS_IO_L11 VSS_IO_L12 VSS_IO_L13 VSS_IO_L14 VSS_IO_L15 VSS_IO_L16 VSS_IO_M11 VSS_IO_M12 VSS_IO_M13 VSS_IO_M14 VSS_IO_M15 VSS_IO_M16 VSS_IO_M24 VSS_IO_N1 VSS_IO_N11 VSS_IO_N12 VSS_IO_N13 VSS_IO_N14 VSS_IO_N15 VSS_IO_N16
U_SCSI
LSI LOGIC ULTRA320 SCSI
LSI53C1030 REV C0
HETERO 4 OF 4
VSSC_B4 VSSC_C14 VSSC_C21 VSSC_C26
VSSC_F25
VSSC_G4
VSSC_L22
VSSC_P2 VSSC_AB5 VSSC_AB7 VSSC_AB8
VSSC_AB23 VSSC_AB24
VSSC_AD14 VSS_IO_P11
VSS_IO_P12 VSS_IO_P13 VSS_IO_P14 VSS_IO_P15 VSS_IO_P16 VSS_IO_P26
VSS_IO_R3 VSS_IO_R11 VSS_IO_R12 VSS_IO_R13 VSS_IO_R14 VSS_IO_R15 VSS_IO_R16
VSS_IO_T11 VSS_IO_T12 VSS_IO_T13 VSS_IO_T14 VSS_IO_T15 VSS_IO_T16
VSS_IO_U1 VSS_IO_V26
VSS_IO_W3
VSS_IO_Y24
VSS_IO_AA1
VSS_IO_AB26
VSS_IO_AC3
VSS_IO_AD7 VSS_IO_AD11 VSS_IO_AD15 VSS_IO_AD19 VSS_IO_AD23
VSS_IO_AE1
VSS_IO_AF2
VSS_IO_AF6 VSS_IO_AF10 VSS_IO_AF14 VSS_IO_AF18 VSS_IO_AF22 VSS_IO_AF26
B4 C14 C21 C26 F25 G4 L22 P2 AB5 AB7 AB8 AB23 AB24 AD14
P11 P12 P13 P14 P15 P16 P26 R3 R11 R12 R13 R14 R15 R16 T11 T12 T13 T14 T15 T16 U1 V26 W3 Y24 AA1 AB26 AC3 AD7 AD11 AD15 AD19 AD23 AE1 AF2 AF6 AF10 AF14 AF18 AF22 AF26
+1.8V
+1.8V
80 MHz Oscillator
2
2
L5
FERRITE
1206
L3
FERRITE
1206
1
I_SCSI_VDDA_C1
1
stub
I_SCSI_VDDA_AB21
stub
C1
AB21
A1 A2
A6 A10 A14 A18 A22 A26
C7 C11 C15 C19 C23
D3 E26
F1
G24
H3
J26
K1
L24
M3 N26
VDDA_C1 VDDA_AB21
VDD_IO_A1 VDD_IO_A2 VDD_IO_A6 VDD_IO_A10 VDD_IO_A14 VDD_IO_A18 VDD_IO_A22 VDD_IO_A26 VDD_IO_C7 VDD_IO_C11 VDD_IO_C15 VDD_IO_C19 VDD_IO_C23 VDD_IO_D3 VDD_IO_E26 VDD_IO_F1 VDD_IO_G24 VDD_IO_H3 VDD_IO_J26 VDD_IO_K1 VDD_IO_L24 VDD_IO_M3 VDD_IO_N26
ROOM=LSI_1030
U_SCSI
LSI LOGIC ULTRA320 SCSI
LSI53C1030 REV C0
HETERO 3 OF 4
VDDC_D2 VDDC_D6
VDDC_D15
VDDC_E19
VDDC_J22
VDDC_M22
VDDC_N2 VDDC_AC7 VDDC_AD3
VDDC_AD25
VDDC_AE3 VDDC_AE24 VDDC_AF15
VDD_IO_P1
VDD_IO_R24
VDD_IO_T3
VDD_IO_U26
VDD_IO_V1
VDD_IO_W24
VDD_IO_Y3
VDD_IO_AA26
VDD_IO_AB1
VDD_IO_AC24
VDD_IO_AD4
VDD_IO_AD8 VDD_IO_AD12 VDD_IO_AD16 VDD_IO_AD20
VDD_IO_AE26
VDD_IO_AF1 VDD_IO_AF5
VDD_IO_AF9 VDD_IO_AF13 VDD_IO_AF17 VDD_IO_AF21 VDD_IO_AF25
D2 D6 D15 E19 J22 M22 N2 AC7 AD3 AD25 AE3 AE24 AF15
P1 R24 T3 U26 V1 W24 Y3 AA26 AB1 AC24 AD4 AD8 AD12 AD16 AD20 AE26 AF1 AF5 AF9 AF13 AF17 AF21 AF25
+3.3V_RSR
L1
12
BLM11A60
NP
21
C330
922RV IS 5% 16V P/N
+3.3V_RSR+3.3V_RSR
SCSI_SCL
13
SCSI_SDA
13
.1uF
25V-20%
+3.3V_RSR
21
R238
stub
4.7K
R239
PD_SCSI_EEPROM_WP
1 2
C329
21
4.7K
R416
21
.1uF
25V-20%
220
C328
X
1 2
8
VCC
6
SCL
5
SDA
.01uF 16V
stub
21
C21
U14
24C16
3.3V
5K236
R263
.1uF
25V-20%
GNDWP
V_3P3V_80M
1 2
PU_80M_P1
1
A0
2
A1
3
A2
47
8.2K-5%
1
E/D
PD_SCSI_EEPROM
U1
80.0000MHz
4
VCC
GND
2
OUT
stub
stub
R16
33-5%
stub
21
CK_SCSI_80MHZ
13
3
R35
220
I_80MHZ_OSC_SCSI
21
1
2
SUB=SUB*_Y6059
Dell P/N U6940 on 1U
+1.8V
HIGH Freq bypass for 1.8V under chip
Serial EEPROM
sub's Y6059 programmed
X6084 on 2U Y6059 on 5U
3
3
C327
1 2
C289
.01uF 16V
C290
21
1000pF
50V-10%
C325
1 2
.01uF 16V
21
C326
50V-10%
1 2
.01uF 16V
1000pF
C316
21
C331
1000pF
1 2
50V-10%
.01uF 16V
C287
21
1000pF
50V-10%
C324
1 2
.01uF 16V
C288
21
1000pF
50V-10%
C333
1 2
.01uF 16V
C317
21
1000pF
50V-10%
C323
1 2
.01uF 16V
C286
21
1000pF
50V-10%
+3.3V_RSR
C332
1 2
.01uF 16V
C322
1 2
C321
.01uF 16V
1 2
C320
.01uF 16V
1 2
C319
.01uF 16V
1 2
C318
.01uF 16V
1 2
C22
.01uF 16V
.1uF
C23
25V-20%
21
.1uF
C20
25V-20%
21
.1uF
C19
25V-20%
21
.1uF
C17
25V-20%
21
.1uF
C16
25V-20%
21
.1uF
25V-20%
+3.3V_RSR
6-13,15-18,21-24,28,29
+1.8V
9,11,12,29
21
+3.3V_RSR
4 4
C26
C27
21
.1uF
25V-20%
C5
21
.1uF
25V-20%
C6
21
.1uF
25V-20%
C8
21
.1uF
25V-20%
C9
21
.1uF
25V-20%
C10
21
.1uF
25V-20%
C11
21
.1uF
25V-20%
C12
21
.1uF
25V-20%
C24
21
.1uF
25V-20%
21
.1uF
25V-20%
C14
21
.1uF
25V-20%
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM, RSR, PE2800, SV
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
14 OF 45
A B
DC
Page 15
B D
CA
SCSI Termination/External Connector
ROOM=SCSI_TERMA
ROOM=SCSI_TERMB
+3.3V_RSR
1
16V-10%
1
4.7uF
C481
C337
1 2
16V-10%
.01uF 16V
.01uF 16V
51K-5%
21
1
4.7uF
2
R77
C540
U13
14 15 16 17 18 19 20 21 22 23
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
TRMPWR
DISCNCT
DIFFSENSE
L5+ L5­L6+
DIFF_B L6­L7+ L7­L8+ L8­L9+ L9-
SCSI_B_SD11_P
5,13
SCSI_B_SD11_N
5,13
SCSI_B_SD10_P
5,13
SCSI_B_SD10_N
5,13
SCSI_B_SD9_P
5,13
SCSI_B_SD9_N
SCSI_A_DIFFSENSE
stub
5,13
5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13
SCSI_B_SD8_P SCSI_B_SD8_N SCSI_B_SMSG_P SCSI_B_SMSG_N SCSI_B_SSEL_P SCSI_B_SSEL_N SCSI_B_SCD_P SCSI_B_SCD_N SCSI_B_SREQ_P SCSI_B_SREQ_N SCSI_B_SIO_P SCSI_B_SIO_N
REG
GND
24
13
11
10
1
12
UCC5640PW
5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13
SCSI_A_SSEL_P SCSI_A_SSEL_N SCSI_A_SMSG_P SCSI_A_SMSG_N SCSI_A_SCD_P SCSI_A_SCD_N SCSI_A_SREQ_P SCSI_A_SREQ_N SCSI_A_SD11_P SCSI_A_SD11_N SCSI_A_SD10_P SCSI_A_SD10_N SCSI_A_SD9_P SCSI_A_SD9_N SCSI_A_SD8_P SCSI_A_SD8_N SCSI_A_SIO_P SCSI_A_SIO_N
14 15 16 17 18 19 20 21 22 23
2
U4
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
TRMPWR
DISCNCT
DIFFSENSE
24
13
PLACE CLOSE TO TERM PKGS
11
L5+ L5­L6+
DIFF_B
10
DIFF_B_1030A
L6­L7+ L7­L8+
REG
1
REG_1030A1
L8-
16V-10%
L9+ L9-
GND
12
4.7uF
2
1
C482
C338
1 2
UCC5640PW
+3.3V_RSR
16V-10%
PLACE CLOSE TO TERM PKGS
DIFF_B_1030B
REG_1030B1
16V-10%
4.7uF
2
4.7uF
1
1
2
C488
C539
C479
1 2
C480
1 2
16V-10%
.01uF 16V
.01uF 16V
51K-5%
21
1
4.7uF
2
R76
C487
SCSI_B_DIFFSENSE
stub
5,13
FUSED 5V FOR EXTERNAL SCSI
+5V_RSR
FS2
1 2
1.5A 6V
I_SCSI_TRMPWR
MBRS330T3
2 1
D7
stub
SCSI_TRMPWR
1
5
+3.3V_RSR
+3.3V_RSR
2
2
16V-10%
1
4.7uF
5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13
SCSI_A_SD12_P SCSI_A_SD12_N SCSI_A_SD13_P SCSI_A_SD13_N SCSI_A_SD14_P SCSI_A_SD14_N SCSI_A_SD15_P SCSI_A_SD15_N SCSI_A_SD3_P SCSI_A_SD3_N SCSI_A_SD2_P SCSI_A_SD2_N SCSI_A_SD1_P SCSI_A_SD1_N SCSI_A_SD0_P SCSI_A_SD0_N SCSI_A_SDP1_P SCSI_A_SDP1_N
14 15 16 17 18 19 20 21 22 23
C483
C339
2
1 2
.01uF 16V
U5
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
TRMPWR
DISCNCT
DIFFSENSE
L5+ L5­L6+
DIFF_B L6­L7+ L7­L8+ L8­L9+ L9-
REG
GND
24
13
11
10
1
12
PLACE CLOSE TO TERM PKGS
REG_1030A2
16V-10%
1
4.7uF
2
C484
NC_DIFFSENSE1
C340
1 2
.01uF 16V
5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13
SCSI_B_SD3_P SCSI_B_SD3_N SCSI_B_SD1_P SCSI_B_SD1_N SCSI_B_SDP1_P SCSI_B_SDP1_N SCSI_B_SD14_P SCSI_B_SD14_N SCSI_B_SD12_P SCSI_B_SD12_N SCSI_B_SD13_P SCSI_B_SD13_N SCSI_B_SD15_P SCSI_B_SD15_N SCSI_B_SD0_P SCSI_B_SD0_N SCSI_B_SD2_P SCSI_B_SD2_N
14 15 16 17 18 19 20 21 22 23
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4­L5+ L5­L6+ L6­L7+ L7­L8+ L8­L9+ L9-
U11
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
REG
GND
24
13
11
10
1
12
REG_1030B2
UCC5640PW
UCC5640PW
16V-10%
1
4.7uF
C489
2
PLACE CLOSE TO TERM PKGS
NC_DIFFSENSE3
16V-10%
1
4.7uF
C490
C334
2
1 2
C343
1 2
.01uF 16V
.01uF 16V
+3.3V_RSR
+3.3V_RSR
3
3
16V-10%
1
4.7uF
5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13
SCSI_A_SD4_P SCSI_A_SD4_N SCSI_A_SD5_P SCSI_A_SD5_N SCSI_A_SD6_P SCSI_A_SD6_N SCSI_A_SD7_P SCSI_A_SD7_N SCSI_A_SRST_P SCSI_A_SRST_N SCSI_A_SACK_P SCSI_A_SACK_N SCSI_A_SBSY_P SCSI_A_SBSY_N SCSI_A_SATN_P SCSI_A_SATN_N SCSI_A_SDP0_P SCSI_A_SDP0_N
14 15 16 17 18 19 20 21 22 23
C485
C342
2
1 2
.01uF 16V
U6
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
TRMPWR
DISCNCT
DIFFSENSE
L5+ L5­L6+
DIFF_B L6­L7+ L7­L8+ L8­L9+ L9-
REG
GND
24
13
11
10
1
12
PLACE CLOSE TO TERM PKGS
REG_1030A3
16V-10%
1
4.7uF
2
C486
NC_DIFFSENSE2
C341
1 2
.01uF 16V
5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13 5,13
SCSI_B_SRST_P SCSI_B_SRST_N SCSI_B_SACK_P SCSI_B_SACK_N SCSI_B_SBSY_P SCSI_B_SBSY_N SCSI_B_SATN_P SCSI_B_SATN_N SCSI_B_SD4_P SCSI_B_SD4_N SCSI_B_SD5_P SCSI_B_SD5_N SCSI_B_SD6_P SCSI_B_SD6_N SCSI_B_SD7_P SCSI_B_SD7_N SCSI_B_SDP0_P SCSI_B_SDP0_N
14 15 16 17 18 19 20 21 22 23
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4­L5+ L5­L6+ L6­L7+ L7­L8+ L8­L9+ L9-
U12
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
REG
GND
24
13
11
10
1
12
REG_1030B3
UCC5640PW
UCC5640PW
16V-10%
1
4.7uF
C491
2
C335
PLACE CLOSE TO TERM PKGS
NC_DIFFSENSE4
16V-10%
1
4.7uF
C492
C336
2
1 2
.01uF 16V
1 2
.01uF 16V
+5V_RSR
10,11,21-24,29,36
+3.3V_RSR
6-14,16-18,21-24,28,29
PKG_TYPE = TSSOP24
PKG_TYPE = TSSOP24
PLACE NEXT TO 1030
4 4
THESE ARE LVT ONLY TERMINATORS LEGACY SINGLE-ENDED DEVICES ARE NOT TERMINATED BY THESE
From Everglades
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
15 OF 45
A B
DC
Page 16
B D
CA
PME PULLUP POP'D ON PLANAR
POWER IS V3P3_AUX
RISER_PCI_PME_N
RISER_EXP_PME_N
N
NP
21
PXH
R411
X
16,23
1
2-24-2005_11:44
PXH
PXH_PCIX_A_AD0
23
PXH_PCIX_A_AD1
23
PXH_PCIX_A_AD2
23
PXH_PCIX_A_AD3
23
PXH_PCIX_A_AD4
23
PXH_PCIX_A_AD5
23
PXH_PCIX_A_AD6
23
PXH_PCIX_A_AD7
23
PXH_PCIX_A_AD8
23
PXH_PCIX_A_AD9
23
PXH_PCIX_A_AD10
23
PXH_PCIX_A_AD11
23
PXH_PCIX_A_AD12
23
PXH_PCIX_A_AD13
23
PXH_PCIX_A_AD14
23
PXH_PCIX_A_AD15
23
PXH_PCIX_A_AD16
23
PXH_PCIX_A_AD17
23
PXH_PCIX_A_AD18
23
PXH_PCIX_A_AD19
23
PXH_PCIX_A_AD20
23
PXH_PCIX_A_AD21
23
PXH_PCIX_A_AD22
23
PXH_PCIX_A_AD23
23
PXH_PCIX_A_AD24
23
PXH_PCIX_A_AD25
23
PXH_PCIX_A_AD26
23
PXH_PCIX_A_AD27
23
PXH_PCIX_A_AD28
23
2
18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23
3
18,23 18,23 18,23 18,23
PXH_PCIX_A_AD29
23
PXH_PCIX_A_AD30
23
PXH_PCIX_A_AD31
23
PXH_PCIX_A_AD32 PXH_PCIX_A_AD33 PXH_PCIX_A_AD34 PXH_PCIX_A_AD35 PXH_PCIX_A_AD36 PXH_PCIX_A_AD37 PXH_PCIX_A_AD38 PXH_PCIX_A_AD39 PXH_PCIX_A_AD40 PXH_PCIX_A_AD41 PXH_PCIX_A_AD42 PXH_PCIX_A_AD43 PXH_PCIX_A_AD44 PXH_PCIX_A_AD45 PXH_PCIX_A_AD46 PXH_PCIX_A_AD47 PXH_PCIX_A_AD48 PXH_PCIX_A_AD49 PXH_PCIX_A_AD50 PXH_PCIX_A_AD51 PXH_PCIX_A_AD52 PXH_PCIX_A_AD53 PXH_PCIX_A_AD54 PXH_PCIX_A_AD55 PXH_PCIX_A_AD56 PXH_PCIX_A_AD57 PXH_PCIX_A_AD58 PXH_PCIX_A_AD59 PXH_PCIX_A_AD60 PXH_PCIX_A_AD61 PXH_PCIX_A_AD62 PXH_PCIX_A_AD63
PXH_PCIX_A_CBE0_N
23
PXH_PCIX_A_CBE1_N
23
PXH_PCIX_A_CBE2_N
23
PXH_PCIX_A_CBE3_N
23
PXH_PCIX_A_CBE4_N PXH_PCIX_A_CBE5_N PXH_PCIX_A_CBE6_N PXH_PCIX_A_CBE7_N
PXH_PCIX_A_REQ0_N
23
PXH_PCIX_A_GNT0_N
23
NC_PXH_PCIX_A_REQ1_N NC_PXH_PCIX_A_REQ2_N NC_PXH_PCIX_A_REQ3_N NC_PXH_PCIX_A_REQ4_N NC_PXH_PCIX_A_REQ5_N
NC_PXH_PCIX_A_GNT1_N NC_PXH_PCIX_A_GNT2_N NC_PXH_PCIX_A_GNT3_N NC_PXH_PCIX_A_GNT4_N NC_PXH_PCIX_A_GNT5_N
AC23
PAAD0
AD23
PAAD1
AC22
PAAD2
AB21
PAAD3
AD21
PAAD4
AC20
PAAD5
AD20
PAAD6
AC19
PAAD7
AB18
PAAD8
AC17
PAAD9
AD17
PAAD10
AC16
PAAD11
AB15
PAAD12
AD15
PAAD13
AD14
PAAD14
AC13
PAAD15
W24
PAAD16
Y23
PAAD17
AA23
PAAD18
Y22
PAAD19
AB22
PAAD20
AA21
PAAD21
Y20
PAAD22
Y19
PAAD23
AB19
PAAD24
W18
PAAD25
AA18
PAAD26
Y17
PAAD27
Y16
PAAD28
AB16
PAAD29
W15
PAAD30
AA15
PAAD31
T22
PAAD32
T21
PAAD33
R24
PAAD34
R23
PAAD35
P23
PAAD36
P22
PAAD37
N22
PAAD38
N21
PAAD39
M23
PAAD40
M21
PAAD41
L23
PAAD42
L20
PAAD43
K24
PAAD44
K22
PAAD45
J23
PAAD46
J21
PAAD47
H23
PAAD48
H22
PAAD49
R20
PAAD50
R18
PAAD51
P19
PAAD52
P17
PAAD53
N19
PAAD54
N17
PAAD55
M18
PAAD56
M17
PAAD57
L19
PAAD58
L17
PAAD59
K18
PAAD60
K17
PAAD61
K19
PAAD62
J17
PAAD63
AD18
PACBE0
AC14
PACBE1
AA24
PACBE2
AA20
PACBE3
H17
PACBE4
J18
PACBE5
H19
PACBE6
H20
PACBE7
W21
PAREQ0
W22
PAREQ1
V18
PAREQ2
N18
PAREQ3
L22
PAREQ4
W13
PAREQ5
W19
PAGNT0
J24
PAGNT1
Y14
PAGNT2
Y13
PAGNT3
AA14
PAGNT4
U23
PAGNT5
POWER_DRAW=P3.3V@1.6A POWER_DRAW=P1.5V_CORE@2.2A POWER_DRAW=P1.5V_PCIX@0.2A POWER_DRAW=P1.5V_PCIEX@0.7A
PBAD0 PBAD1 PBAD2 PBAD3 PBAD4 PBAD5 PBAD6 PBAD7 PBAD8
PBAD9 PBAD10 PBAD11 PBAD12 PBAD13 PBAD14 PBAD15 PBAD16 PBAD17 PBAD18 PBAD19 PBAD20 PBAD21 PBAD22 PBAD23 PBAD24 PBAD25 PBAD26 PBAD27 PBAD28 PBAD29 PBAD30 PBAD31 PBAD32 PBAD33 PBAD34 PBAD35 PBAD36 PBAD37 PBAD38 PBAD39 PBAD40 PBAD41 PBAD42 PBAD43 PBAD44 PBAD45 PBAD46 PBAD47 PBAD48 PBAD49 PBAD50 PBAD51 PBAD52 PBAD53 PBAD54 PBAD55 PBAD56 PBAD57 PBAD58 PBAD59 PBAD60 PBAD61 PBAD62 PBAD63
PBCBE0 PBCBE1 PBCBE2 PBCBE3 PBCBE4 PBCBE5 PBCBE6 PBCBE7
PBREQ0 PBREQ1 PBREQ2 PBREQ3 PBREQ4 PBREQ5
PBGNT0 PBGNT1 PBGNT2 PBGNT3 PBGNT4 PBGNT5
PXH MCH INTERFACE
HETERO 1 OF 4
INTEL 6700 REV C1
OnDieTerminated Signals, 8.33kohm ±40%. PxACK64#
HxATNLED_1# PxAD[63:32] HPxRST2# PxCBE_[7:4]# PxDEVSEL# PxFRAME#
4 4
PxIRDY# PxIRQ_[15:13]# PxIRQ_[10:0]#
PxPAR64 PxREQ64#
HPxPRST#
HPx_SOD
HPxSOLR
HPxSOL
HPxSIL#
HxPWREN_1
PxVIOSELPxLOCK#
16,23
EXP0_COMP
16
PXH_PCIX_A_IRQ11_N PXH_PCIX_A_IRQ12_N
16
PXH_PCIX_B_IRQ11_N
16
PXH_PCIX_B_IRQ12_N
16
21
R481
49.9-1%
+1.5V
21
R312
AC2 AD2 AD3 AB4 AC4 AC5 AD5 AD6 AB7 AC7 AD8 AB9 AD9 AB10 AC10 AD11 W1 Y2 AA2 AA3 AB3 Y4 Y5 W6 AA6 W7 Y7 Y8 AA8 W9 Y10 AA9 R2 R3 P1 P4 P5 N3 N4 M2 M3 L1 L2 K3 K4 J2 J3 H4 H1 H2 P7 P8 N6 N7 M5 M6 L5 L7 K6 K7 J6 J7 H5 H8
AC8 AB12 Y1 AA5 G9 H9 G6 G7
L4 AB6 T6 T1 V5 AA12
J5 K1 Y11 AA11 W12 L8
49.9-1%
NC_PXH_PCIX_B_REQ2_N NC_PXH_PCIX_B_REQ3_N NC_PXH_PCIX_B_REQ4_N NC_PXH_PCIX_B_REQ5_N
NC_PXH_PCIX_B_GNT2_N NC_PXH_PCIX_B_GNT3_N NC_PXH_PCIX_B_GNT4_N NC_PXH_PCIX_B_GNT5_N
21
R684
1 2
R659
8.2K-5%
PXH_PCIX_B_AD0 PXH_PCIX_B_AD1 PXH_PCIX_B_AD2 PXH_PCIX_B_AD3 PXH_PCIX_B_AD4 PXH_PCIX_B_AD5 PXH_PCIX_B_AD6 PXH_PCIX_B_AD7 PXH_PCIX_B_AD8
PXH_PCIX_B_AD9 PXH_PCIX_B_AD10 PXH_PCIX_B_AD11 PXH_PCIX_B_AD12 PXH_PCIX_B_AD13 PXH_PCIX_B_AD14 PXH_PCIX_B_AD15 PXH_PCIX_B_AD16 PXH_PCIX_B_AD17 PXH_PCIX_B_AD18 PXH_PCIX_B_AD19 PXH_PCIX_B_AD20 PXH_PCIX_B_AD21 PXH_PCIX_B_AD22 PXH_PCIX_B_AD23 PXH_PCIX_B_AD24 PXH_PCIX_B_AD25 PXH_PCIX_B_AD26 PXH_PCIX_B_AD27 PXH_PCIX_B_AD28 PXH_PCIX_B_AD29 PXH_PCIX_B_AD30 PXH_PCIX_B_AD31 PXH_PCIX_B_AD32 PXH_PCIX_B_AD33 PXH_PCIX_B_AD34 PXH_PCIX_B_AD35 PXH_PCIX_B_AD36 PXH_PCIX_B_AD37 PXH_PCIX_B_AD38 PXH_PCIX_B_AD39 PXH_PCIX_B_AD40 PXH_PCIX_B_AD41 PXH_PCIX_B_AD42 PXH_PCIX_B_AD43 PXH_PCIX_B_AD44 PXH_PCIX_B_AD45 PXH_PCIX_B_AD46 PXH_PCIX_B_AD47 PXH_PCIX_B_AD48 PXH_PCIX_B_AD49 PXH_PCIX_B_AD50 PXH_PCIX_B_AD51 PXH_PCIX_B_AD52 PXH_PCIX_B_AD53 PXH_PCIX_B_AD54 PXH_PCIX_B_AD55 PXH_PCIX_B_AD56 PXH_PCIX_B_AD57 PXH_PCIX_B_AD58 PXH_PCIX_B_AD59 PXH_PCIX_B_AD60 PXH_PCIX_B_AD61 PXH_PCIX_B_AD62 PXH_PCIX_B_AD63
PXH_PCIX_B_CBE0_N PXH_PCIX_B_CBE1_N PXH_PCIX_B_CBE2_N PXH_PCIX_B_CBE3_N PXH_PCIX_B_CBE4_N PXH_PCIX_B_CBE5_N PXH_PCIX_B_CBE6_N PXH_PCIX_B_CBE7_N
PXH_PCIX_B_REQ0_N PXH_PCIX_B_REQ1_N
PXH_PCIX_B_GNT0_N PXH_PCIX_B_GNT1_N
+3.3V_RSR
21
R660
8.2K-5% 1 2
R661
8.2K-5%
21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34
21,22,34 21,22,34 21,22,34 21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34
21 22
21 22
8.2K-5%
18,23 18,23 18,23 18,23 18,23 18,23 18,23 18,23
18,23 18,23 18,23
16,23 16,23
16,23
4,27 4,27 4,27 4,27 4,27 4,27 4,27 4,27
PXH_PCIX_A_FRAME_N PXH_PCIX_A_IRDY_N PXH_PCIX_A_DEVSEL_N PXH_PCIX_A_TRDY_N PXH_PCIX_A_STOP_N PXH_PCIX_A_PERR_N PXH_PCIX_A_SERR_N PXH_PCIX_A_LOCK_N PXH_PCIX_A_PAR
23
PXH_PCIX_A_PAR64 PXH_PCIX_A_REQ64_N PXH_PCIX_A_ACK64_N
PXH_PCIX_A_GATE_PME_N
16
PXH_PCIX_A_M66EN PXH_PCIX_A_PCIXCAP
CK_PXH_PCIX_A_PCLKO0_R
16
NC_PXH_PCIX_A_PCLKO1_R NC_PXH_PCIX_A_PCLKO2 NC_PXH_PCIX_A_PCLKO3 NC_PXH_PCIX_A_PCLKO4 NC_PXH_PCIX_A_PCLKO5
CK_PXH_PCIX_A_PCLKO6_FB_R
16
CK_PXH_PCIX_A_PCLKI_FB
16
PXH_PCIX_A_RST_N
16
PXH_PCIX_A_IRQ0_N
21
PXH_PCIX_A_IRQ1_N
21
PXH_PCIX_A_IRQ2_N
21
PXH_PCIX_A_IRQ3_N
21
PXH_PCIX_A_IRQ4_N
22
PXH_PCIX_A_IRQ5_N
22
PXH_PCIX_A_IRQ6_N
22
PXH_PCIX_A_IRQ7_N
22
PXH_PCIX_A_IRQ8_N
23
PXH_PCIX_A_IRQ9_N
23
PXH_PCIX_A_IRQ10_N
23
PXH_PCIX_A_IRQ11_N PXH_PCIX_A_IRQ12_N
16
NC_PXH_PCIX_A_IRQ13_N NC_PXH_PCIX_A_IRQ14_N NC_PXH_PCIX_A_IRQ15_N
PXH_PCIX_A_133EN
16
PCI_RST_RISER_BUF4_N
36
EXP_A_DN_4N EXP_A_DN_4P EXP_A_DN_5N EXP_A_DN_5P EXP_A_DN_6N EXP_A_DN_6P EXP_A_DN_7N EXP_A_DN_7P
NC_EXP_C_DN_4_N_C NC_EXP_C_DN_4_P_C NC_EXP_C_DN_5_N_C NC_EXP_C_DN_5_P_C NC_EXP_C_DN_6_N_C NC_EXP_C_DN_6_P_C NC_EXP_C_DN_7_N_C
PXH_TCK
16
PXH_TMS
16
PXH_TDI
16
PXH_TRST_N
16
+3.3V_RSR
R27
1 2
1K-5%
R26
1 2
1K-5%
R25
1 2
1K-5%
R24
1 2
1K-5%
NC_PXH_TDO
PXH V23 V24 U20 U22 U19 P20
T19
R21
AB13
J20
AC24
AB24
V21
T18
E17
V14
W16
V17 U17 U14 U16 V15
U13
AA17
G24
F24 D23 C24 B24 A23 D24
F23 G21 D22 G22
F22 B23 E22
F21 E21
V20
H16
F10 G10 D12 E12
B9
C9 C11 C10 H12 G12 D13 C13 A16 A15 E15 E14
B7
E7
E9
A6
F9
PAFRAME PAIRDY PADEVSEL PATRDY PASTOP PAPERR PASERR PAPLOCK PAPAR PAPAR64 PAREQ64 PAACK64
PAPME
PAM66EN PAPCIXCAP
PAPCLKO0 PAPCLKO1 PAPCLKO2 PAPCLKO3 PAPCLKO4 PAPCLKO5 PAPCLKO6
PAPCLKI PAPCIRST
PAIRQ0 PAIRQ1 PAIRQ2 PAIRQ3 PAIRQ4 PAIRQ5 PAIRQ6 PAIRQ7 PAIRQ8 PAIRQ9 PAIRQ10 PAIRQ11 PAIRQ12 PAIRQ13 PAIRQ14 PAIRQ15
PA133EN
RSTIN
EXP_RXN0­EXP_RXP0+ EXP_RXN1­EXP_RXP1+ EXP_RXN2­EXP_RXP2+ EXP_RXN3­EXP_RXP3+ EXP_RXN4­EXP_RXP4+ EXP_RXN5­EXP_RXP5+ EXP_RXN6­EXP_RXP6+ EXP_RXN7­EXP_RXP7+
TCK TMS TDI TDO TRST
PXH MCH INTERFACE
HETERO 2 OF 4
INTEL 6700 REV C1
PBFRAME
PBIRDY
PBDEVSEL
PBTRDY PBSTOP PBPERR PBSERR
PBPLOCK
PBPAR
PBPAR64 PBREQ64 PBACK64
PBPME
PBM66EN
PBPCIXCAP
PBPCLKO0 PBPCLKO1 PBPCLKO2 PBPCLKO3 PBPCLKO4 PBPCLKO5 PBPCLKO6
PBPCLKI
PBPCIRST
PBIRQ0 PBIRQ1 PBIRQ2 PBIRQ3 PBIRQ4 PBIRQ5 PBIRQ6 PBIRQ7 PBIRQ8
PBIRQ9 PBIRQ10 PBIRQ11 PBIRQ12 PBIRQ13 PBIRQ14 PBIRQ15
PB133EN
EXP_CLK-
EXP_CLK+
EXP_TXN0-
EXP_TXP0+
EXP_TXN1-
EXP_TXP1+
EXP_TXN2-
EXP_TXP2+
EXP_TXN3-
EXP_TXP3+
EXP_TXN4-
EXP_TXP4+
EXP-TXN5-
EXP_TXP5+
EXP_TXN6-
EXP_TXP6+
EXP_TXN7-
EXP_TXP7+
EXP_COMP0 EXP_COMP1
SDATA
ADD=ADD*_D2614_HEATSINK_PXH
PXH_TMS
PXH_TDI
PXH_TCK
PXH_TRST_N
16
16
16
Px133EN PULLUP 8.2K, OR PULL DOWN 1k to 8.2K PxPCIXCAP PULLUP 3.3K
16
M66EN High indicates that a PCI card can operate in PCI 66 MHz mode
PxM66EN PULLUP 4.7K WHEN CONNECTED, OR TP
SCLK
16,21,22,34
U4 U5 T3 W4 V3 U2 V2 W3 AC11 H7 AC1 AB1
R5
U1 D7
W10 V9 V8 T7 V6 U7 U8
U10 N8
F2 G1 F3 C1 B2 E4 D2 E1 G3 D3 B1 C3 D1 G4 E3 F4
P2 C17
C16
E11 F11 D10 D9 A10 A9 B12 B11 G13 H13 B15 B14 D16 D15 F14 F13
E16 B17
C7 D8
PXH_PA_PME_N
PXH_PB_PME_N
NC_PXH_PCIX_B_PCLKO2 NC_PXH_PCIX_B_PCLKO3 NC_PXH_PCIX_B_PCLKO4 NC_PXH_PCIX_B_PCLKO5
CK_PXH_PCIX_B_PCLKO6_FB_R
PXH_PCIX_B_RST_N
NC_PXH_PCIX_B_IRQ0_N NC_PXH_PCIX_B_IRQ1_N NC_PXH_PCIX_B_IRQ2_N NC_PXH_PCIX_B_IRQ3_N NC_PXH_PCIX_B_IRQ4_N NC_PXH_PCIX_B_IRQ5_N NC_PXH_PCIX_B_IRQ6_N NC_PXH_PCIX_B_IRQ7_N NC_PXH_PCIX_B_IRQ8_N NC_PXH_PCIX_B_IRQ9_N
NC_PXH_PCIX_B_IRQ10_N
NC_PXH_PCIX_B_IRQ13_N NC_PXH_PCIX_B_IRQ14_N NC_PXH_PCIX_B_IRQ15_N
NC_EXP_C_UP_4_N_C NC_EXP_C_UP_4_P_C NC_EXP_C_UP_5_N_C NC_EXP_C_UP_5_P_C NC_EXP_C_UP_6_N_C NC_EXP_C_UP_6_P_C NC_EXP_C_UP_7_N_C NC_EXP_C_UP_7_P_CNC_EXP_C_DN_7_P_C
0-5%
PXH_PCIX_B_FRAME_N
PXH_PCIX_B_IRDY_N
PXH_PCIX_B_DEVSEL_N
PXH_PCIX_B_TRDY_N
PXH_PCIX_B_STOP_N PXH_PCIX_B_PERR_N PXH_PCIX_B_SERR_N PXH_PCIX_B_LOCK_N
PXH_PCIX_B_PAR64 PXH_PCIX_B_REQ64_N PXH_PCIX_B_ACK64_N
PXH_PCIX_B_GATE_PME_N
PXH_PCIX_B_M66EN
PXH_PCIX_B_PCIXCAP
CK_PXH_PCIX_B_PCLKO0_R CK_PXH_PCIX_B_PCLKO1_R
CK_PXH_PCIX_B_PCLKI_FB
PXH_PCIX_B_IRQ11_N PXH_PCIX_B_IRQ12_N
PXH_PCIX_B_133EN
0.500 V
1 3
BAR43
D10
PXH_PCIX_B_PAR
16
CK_100M_PXH_N CK_100M_PXH_P
EXP_A_UP_4N_C EXP_A_UP_4P_C EXP_A_UP_5N_C EXP_A_UP_5P_C EXP_A_UP_6N_C EXP_A_UP_6P_C EXP_A_UP_7N_C EXP_A_UP_7P_C
EXP0_COMP
PXH_SCLK
PXH_SDATA
1 3
BAR43
18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 18,21,22,34 21,22,34 18,21,22,34 18,21,22,34 18,21,22,34
16
16,21,22,34 16,21,22,34
16 16
16
16
16 16
16
4 4
18 18 18 18 18 18 18 18
16
16 16
CK_PXH_PCIX_A_PCLKO0_R
16
CK_PXH_PCIX_A_PCLKI_FB
16
CK_PXH_PCIX_B_PCLKO0_R
16
CK_PXH_PCIX_B_PCLKO1_R
16
CK_PXH_PCIX_B_PCLKI_FB
16
D9
NP
R410
X
1 2
0-5%
K (Cathode)
1 2
A (Anode)
P
3
BAR43
NP
21
X
C5044
4,7
4,7,31
7,16,36
7,16,36
10pF
50V-5%
EXP_DN IS MCH TX DN (MCH TX) CONNECTS TO SLOT TX
DN (MCH TX) CONNECTS TO PXH, IOP RX
EXP_UP IS MCH RX UP (MCH RX) CONNECTS TO SLOT RX
UP (MCH RX) CONNECTS TO PXH, IOP TX
SYSTEM_PWRGOOD_RISER_RST_BUF PXH_PCIX_A_RST_N
16
SYSTEM_PWRGOOD_RISER_RST_BUF PXH_PCIX_B_RST_N
16
R28
1 2
22-5%
R29
1 2
22-5%
R33
1 2
22-5%
7,11,16,36
7,11,16,36
R72
1 2
22-5%
R683
I_CK_PXH_PCIX_B_PCLKO6_FB_R
SYSTEM_PWRGOOD_RISER_BUF_5V
SYSTEM_PWRGOOD_RISER_BUF_5V
+3.3V_AUX
4 5
74VHC08
NP
9
10
NP
1 2
NP
1 2
21
0-5%
U799
14
R796
21
X
0-5%
+3.3V_AUX
U799
14
74VHC08
R797
0-5%
R32
X
22-5%
6
8
X
R682
21
C84
PXH_PCIX_A_RST_SLOT4_N
PXH_PCIX_B_RST_SLOT2_3_N
CK_PXH_PCIX_A_PCLKO0_S4
CK_PXH_PCIX_A_PCLKO6_FB_R
CK_PXH_PCIX_B_PCLKO0_S2
CK_PXH_PCIX_B_PCLKO1_S3
CK_PXH_PCIX_B_PCLKO6_FB_R
22-5%
1 2
stub
OPTION 2 POP'D
PXH PME A
Option 2Option 1 Q26 R297 R253
Nopop Nopop
Pop R411 R261 Nopop Nopop D10
R297
470
330pF 50V
Nopop
21
I_SYSTEM_PWRGOOD_RISER_BUF_R
OPTION 2 POP'D
PXH PME B
Q25
R298
R245
R410
R370
D9
R298
1 2
470
23
21,22
23
16
21
22
16
I_SYSTEM_PWRGOOD_RISER_BUF_R1
Pop Pop Nopop NopopPop
Pop
stub
Option 1 Option 2 Nopop Nopop Pop Pop Nopop Nopop Nopop Nopop
stub
16,23
16,21,22,34
+3.3V_RSR
+3.3V_AUX
2N7002
Pop Pop Nopop
Pop
2N7002
PXH_SCLK
16
PXH_SDATA
16
PXH_PCIX_A_M66EN
PXH_PCIX_B_M66EN
6-15,17,18,21-24,28,29
Q26
1
G
Q25
1
G
NP
R310
X
+3.3V_AUX
2 1
22K-5%
R261
D
3
S
2
+3.3V_AUX
2 1
22K-5%
1 2
16
16
R370
D
3
S
2
PXH_PCIX_A_PCIXCAP
+3.3V_RSR
8.2K-5%
PXH_PCIX_B_133EN
PXH_PCIX_A_133EN
TITLE
CAP MUST BE MAX 0.25 IN FROM CONN PIN
CAP MUST BE MAX 0.1 IN FROM GND VIA
NP
R309
X
1 2
R316
+3.3V_RSR
22K-5%
8.2K-5% R305
2 1
+3.3V_RSR
4.7K
1 2
16
2 1
+3.3V_RSR
16
22K-5%
+3.3V_RSR
21
R43
NP
21
R236
X
220
R315
R253
PXH_PA_PME_N
PXH_PCIX_A_GATE_PME_N
D
3
2N7002
1 2
G S
2 1
R245
PXH_PB_PME_N
PXH_PCIX_B_GATE_PME_N
3.3K-5%
PXH_PCIX_B_PCIXCAP
ICH_SEG0_SCL
ICH_SEG0_SDA
+3.3V_RSR
4.7K
NP
4.7K
220
R302
2 1
220
4.7K
1 2
NP
16,21,22,3416,23
21
R314
R48
X
1 2
INC.
ROUND ROCK,TEXAS
16,23
21
R445
21
R45
X
16
16
4.7K
4.7K
16,21,22,34
+3.3V_RSR
R42
1 2
NP
R364
X
1 2
4,31
4,31
3.3K-5%
220
PxSERR#
4-2U,7-3W,8-2X,11-2U,19-3W 21-3W,22-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
SCHEM, RSR, PE2800, SV
PxSTOP#
133EN High indicates that a PCI-X card can operate in PCI-X 133 MHz mode
2-24-2005_11:44
PxTRDY#
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
Pull-up resistors for PxAD[31:0] and PxCBE_[3:1]# are not required by the PCI Specification.
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
16 OF 45
1
2
3
A B
DC
Page 17
+3.3V_RSR
These are the reserved straps
R83
NP
1 2
4.7K
R81
NP
1 2
4.7K
X X
R82
1 2
1K-5%
R80
1 2
1K-5%
PXH_PASTRAP0_PAODTDIS
PXH_PBSTRAP0_PBODTDIS
B D
17
17
pin C18
pin A19
PxSTRAP0 C18, A19
2-24-2005_11:44
PXH
CA
1
1
Set to enable ODT
Sets PXH to Express 1.0 / 1.0A
+3.3V_RSR
R482
1 2
1K-5%
NP
pulled up is PCI Express spec 1.0A pulled down is PCI Express spec 1.0
R480
1K-5%
21
X
PN_PXH_PCIX_A_HATNLED_1_N
17
21
C86
0.1uF 16V
+1.5V
R313
1 2
R665
1 2
150-1%150-1%
V_VREF_PCI_PXH
0.75 V +- 3%
17
PXH
PXH_HASIC_STRAP
17
NC_PXH_HASIL_N
PXH_HASID_STRAP
17
PXH_HAMODE2
17
NC_PXH_HASOL NC_PXH_HASOLR
2
Strapped for No Hot Plug on PCI-X A and B
PN_PXH_PCIX_A_HATNLED_1_N
17
PXH_HASLOTS
17
Hx_SLOT3 Low disables Hot Plug, High enables Hot Plug
PXH-Hxslot<3:0> tells the HP Controller how many slots are Hot Plug
HxSlot<3:0> Hot Plug Disabled 0000 1 slot 0001 2 slots 0010 3 slots 0011 4 slots 0100 5 slots 0101 6 slots 0110 7 slots 0111 8 slots Hot Plug Enabled
R157
1 2
1K-5%
R158
1 2
1K-5%
PXH_HASLOTS
PXH_HBSLOTS
17
17
1000 Reserved 1001 1 slot (Parallel Mode) 1010 2 slots (Parallel Mode) 1011 3 slots (Serial Mode) 1100 4 slots (Serial Mode) 1101 5 slots (Serial Mode) 1110 6 slots (Serial Mode) 1111 1 slot no glue (Parallel Mode)
V_PXH_VCCA_EXP_G15
17
NC_PXH_HASOD NC_PXH_HAPRST1_N NC_PXH_HAPRST2_N
NC_PXH_PCIX_A_HPWREN_1
NC_PXH_C6 NC_PXH_B6
+1.5V
A21
HPA_SIC
E19
HPA_SIL
F19
HPA_SID
B22
HPA_SOC
A22
HPA_SOL
G19
HPA_SOLR
G18
HPA_SOD
E18
HPA_PRST
F18
HPA_RST2
T24 T4
HAATNLED_1 HBATNLED_1
K21 R6
HAPWREN_1 HBPWREN_1
C21
HPA_SLOT0
B21
HPA_SLOT1
D21
HPA_SLOT2
F20
HPA_SLOT3
C6
RSVD/TDIOANODE
B6
RSVD/TDIOCATH
K11
VCC_K11
K13
VCC_K13
K15
VCC_K15
L10
VCC_L10
L12
VCC_L12
L14
VCC_L14
M11
VCC_M11
M13
VCC_M13
M15
VCC_M15
N10
VCC_N10
N12
VCC_N12
N14
VCC_N14
P11
VCC_P11
P13
VCC_P13
P15
VCC_P15
R10
VCC_R10
R12
VCC_R12
R14
VCC_R14
G15
VCCAEXP_G15
HPB_SIC
HPB_SIL
HPB_SID
HPB_SOC
HPB_SOL
HPB_SOLR
HPB_SOD
HPB_PRST
HPB_RST2
HPB_SLOT0 HPB_SLOT1 HPB_SLOT2 HPB_SLOT3
SMBUS_1 SMBUS_2 SMBUS_3 SMBUS_5
VCC15_J16
VCC15_K9
VCC15_L3
VCC15_L16
VCC15_M9
VCC15_M22
VCC15_N16
VCC15_P9
VCC15_R16
VCC15_T9 VCC15_T11 VCC15_T13 VCC15_T15
VCC15_V16
VCC15_Y6
VCC15_AB20
VCC15_AC3
E6 F6 B5 B3 C4 A5 D6 F8 F7
A3 B4 D4 F5
G16
B20 A18 D20
J16 K9 L3 L16 M9 M22 N16 P9 R16 T9 T11 T13 T15 V16 Y6 AB20 AC3
PXH_HBSIC_STRAP
NC_PXH_HBSIL_N
PXH_HBSID_STRAP
NC_PXH_HBSOL
NC_PXH_HBSOLR
NC_PXH_HBSOD NC_PXH_HBPRST1_N NC_PXH_HBPRST2_N
NC_PXH_PCIX_B_HATNLED_1_N
NC_PXH_PCIX_B_HPWREN_1
PXH_SMBUS1 PXH_SMBUS2 PXH_SMBUS3 PXH_SMBUS5
17 17 17 17
+1.5V
PXH_HBMODE2
17
17 17
2
+1.5V
1.5V -110 mV, +45 mV
17
R41PXH_HBSLOTS
1 2
.499-1%
stub
1 2
I_PXH_VCCA_EXP_L
30.9 mA
+1.5V
L14
4.7uH 80mA
PCI Express PLL
NP
R674
0-5%
2
C298
1
21
X
C87
22uF 6.3V
V_PXH_VCCA_EXP_G15
G15
ROUTE AS DIFF PAIR
1 2
0.1uF 16V
F16
PXH_VSSA_EXP_F16
MUST BE GND'D AT BGA
17
18
1.5V -110 mV, +45 mV
R37
1 2
.499-1%
31.8 mA
stub
1 2
I_PXH_VCCA_PCI0_L
L15
4.7uH 80mA
R675
0-5%
C302
21
2
1
C91
22uF 6.3V
V_PXH_VCCA_PCI0
21
0.1uF 16V
I_V_PXH_VSSA_PCI0
17
PCI Segment A PLL
stub
MUST BE GND'D AT FILTER
R17
7H671 is 4.7uH, <30%,ESR max<0.3 ohm, Imax>80mA
+1.5V
A2 A7 B18 C22 D5 E24 F1 H3 H18 H21 H24 L6 M19 R7 T5 T17 T20 T23 U9 V4 W2 W11 Y9 Y15 Y21 Y24 AA1 AB8 AB14 AC6 AD19
+3.3V_RSR
8,28
1 2
31.8 mA
+1.5V
V_2P5V_REF
R38
.499-1%
R39
1 2
.499-1%
31.8 mA
600 uA
Vref = 2.5V
stub
I_PXH_VCCA_PCI1_L
stub
I_PXH_VCCA_PCI2_L
R296
1 2
.499-1%
1 2
4.7uH 80mA
1 2
stub
I_PXH_VCCBG_EXP_L
L16
1.5V -110 mV, +45 mV
R676
0-5%
1.5V -110 mV, +45 mV
L17
4.7uH 80mA
R677
0-5%
2.5V +- 3%
L7
1 2
4.7uH 80mA
C301
21
C300
21
R678
0-5%
1
2
1
2
C51
21
C90
22uF 6.3V
C89
22uF 6.3V
2
1
22uF 6.3V
V_PXH_VCCA_PCI1
1 2
PCI Segment B PLL
0.1uF 16V
I_V_PXH_VSSA_PCI1
17
stub
MUST BE GND'D AT FILTER
V_PXH_VCCA_PCI2
17
J8
21
Low Bandwidth PLL
0.1uF 16V
I_V_PXH_VSSA_PCI2
stub
MUST BE GND'D AT FILTER
V_PXH_VCCBG_EXP_C14
17
C14
ROUTE AS DIFF PAIR
C15
1 2
0.1uF 16V
PXH_VSSBG_EXP_A13
A13
R8
18
C14
C12 C15
C18
M20
D19 D18 C19
100pF
50V-10%
R17
VCCAPCI0
R8
VCCAPCI1
J8
VCCAPCI2
VCCBGEXP_C14
A14
VCCEXP_A14 VCCEXP_C12 VCCEXP_C15
F12
VCCEXP_F12
H11
VCCEXP_H11
H15
VCCEXP_H15
J10
VCCEXP_J10
J12
VCCEXP_J12
J14
VCCEXP_J14
PASTRAP0
A19
PBSTRAP0
RSVD_M20
M8
RSVD_M8 RSVD_D19 RSVD_D18 RSVD_C19
B19
RSVD_B19
U11
RSVD_U11
V12
VREF_PCI
V11
RCOMP
F17
PWROK
PXh MCH INTERFACE
HETERO 3 OF 4
INTEL 6700 REV C1
PWROK is PE_RST, ie, PCI Express Reset, resets whole IC
VCC33_A2
VCC33_A7 VCC33_B18 VCC33_C22
VCC33_D5
VCC33_E24
VCC33_F1
VCC33_H3 VCC33_H18 VCC33_H21 VCC33_H24
VCC33_L6
VCC33_M19
VCC33_R7
VCC33_T5 VCC33_T17 VCC33_T20 VCC33_T23
VCC33_U9 VCC33_V4
VCC33_W2
VCC33_W11
VCC33_Y9 VCC33_Y15 VCC33_Y21 VCC33_Y24
VCC33_AA1 VCC33_AB8
VCC33_AB14
VCC33_AC6
VCC33_AD19
V_PXH_VCCA_PCI0
17
V_PXH_VCCA_PCI1
3
+3.3V_RSR
R159
1 2
4.7K
R165
1 2
4.7K
R18
1 2
1K-5%
R19
1 2
1K-5%
R107
1 2
1K-5%
R150
1 2
1K-5%
PXH_HBSIC_STRAP
PXH_HASIC_STRAP
PXH_HBMODE2
PXH_HAMODE2
PXH_HASID_STRAP
PXH_HBSID_STRAP
17
17
17
17
17
NEVER PULL UP SIDS, THAT IS A TEST MODE
17
HxMODE2 HIGH MEANS SLOT MODE 2 CAPABLE
PxVIOSEL IS AN OUTPUT IN PXH-D ONLY A 0 INDICATES 1.5V MODE 2
HPxBUTTON PULL HIGH IF UNUSED IN HP MODE HxMRL_N PULL LOW IF UNUSED IN HP MODE HxMRLN PULL LOW IF UNUSED IN HP MODE
17 17
17
V_PXH_VCCA_PCI2
17
V_PXH_VCCBG_EXP_C14
17
PXH_PASTRAP0_PAODTDIS PXH_PBSTRAP0_PBODTDIS
NC_PXH_PCIX_A_VIOSEL NC_PXH_PCIX_B_VIOSEL NC_PXH_RSVD_D19 NC_PXH_RSVD_D18 NC_PXH_RSVD_C19 NC_PXH_RSVD_B19 NC_PXH_RSVD_U11
0.750 V +- 3%
V_VREF_PCI_PXH
stub
PD_PXH_RCOMP
17
0.750 V
+3.3V_RSR
R237
NP
1 2
X
4.7K
R228NP
1 2
4 4
X
R139
1 2
1K-5%
R117
STRAPPED FOR ADDRESS C0h
PXH_SMBUS5
17
SMBUS ADDRESS
R129
1 2
100-1%
MUST BE 1%
C361
1 2
PCI Express Bandgap Reference
4.7K
NP R120
1 2
4.7K
R119NP
1 2
X
1 2
1K-5%
R130
1 2
1K-5%
PXH_SMBUS3
PXH_SMBUS2
17
17
BIT 7 1 BIT 6 1 BIT 5 SMBUS<5> BIT 4 0 BIT 3 SMBUS<3> BIT 2 SMBUS<2>
PCIXCAP PIN
MEANING
SYSTEM_PWRGOOD_RISER_BUF3
8,36
+3.3V_RSR
+1.5V
6-16,18,21-24,28,29
8,9,18,29
MUST BE GND'D AT FILTER
INC.
ROUND ROCK,TEXAS
OPEN 133 / 100 MHz PCI-X Mode 10k PULLDOWN 66 MHz PCI-X Mode
2.4k PULLDOWN 266 MHz PCI-X MODE 2 GND PCI Mode
These pull downs are found on the PCI-X card
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
REV.
A06-00
SHEET
17 OF 45
4.7K
X
R118
1 2
1K-5%
PXH_SMBUS1
BIT 1 SMBUS<1>
17
3
A B
DC
Page 18
B D
CA
PCI EXPRESS x4
use 402 package
PXH
caps only on upstream, immediately next to PXH. 0.5 inch max seperation
C373
1
10uF 6.3V
EXP_A_UP_4P EXP_A_UP_5P EXP_A_UP_6P EXP_A_UP_7P
EXP_A_UP_4N EXP_A_UP_5N EXP_A_UP_6N EXP_A_UP_7N
2
C313
1
2
C311
10uF 6.3V
1
2
C315
1
10uF 6.3V
2
10uF 6.3V
1
10uF 6.3V
4,27
4,27
4,27
4,27
4,27
4,27
4,27
4,27
C310
2
1
10uF 6.3V
INSIDE BGA 0402s
+1.5V
C219
21
.1uF
21
C107
10V-10%
+1.5V
.1uF
+3.3V_RSR
21
C224
21
C237
10V-10%
21
C225
.1uF
10V-10%
.1uF
.1uF
C114
10V-10%
10V-10%
21
.1uF
21
C102
0.1uF
21
C238
10V-10%
C208
.1uF
10V-10%
.1uF
10V-10%
21
.1uF
21
C226
0.7Amps
21
C241
21
C94
10V-10%
.1uF
10V-10%
.1uF
10V-10%
.1uF
C236
21
C113
10V-10%
21
.1uF
.1uF
10V-10%
10V-10%
C215
21
.1uF
EXP_A_UP_4P_C
16
EXP_A_UP_5P_C
1
16
EXP_A_UP_6P_C
16
EXP_A_UP_7P_C
16
EXP_A_UP_4N_C
16
EXP_A_UP_5N_C
16
EXP_A_UP_6N_C
16
EXP_A_UP_7N_C
16
21
.1uF
10V-10%
C365
21
.1uF
10V-10%
C364
21
.1uF
10V-10%
C372
21
.1uF
10V-10%
C371
21
.1uF
10V-10%
C363
21
.1uF
10V-10%
C370
21
.1uF
10V-10%
C362
21
.1uF
10V-10%
BACKSIDE DECOUPLING
+1.5V
21
2
C221
+1.5V
C196
0.1uF 16V
1 2
C209
0.1uF 16V
21
21
C220
0.1uF 16V
0.1uF 16V
C218
C214
21
1 2
C217
0.1uF 16V
C211
0.1uF 16V
1 2
0.1uF 16V
1 2
1uF 6.3V
C240
1 2
C239
C242
1uF 6.3V
1 2
1 2
1uF 6.3V
C212
1uF 6.3V
0.1uF
+3.3V_RSR
C112
1 2
C111
0.1uF 16V
21
0.1uF 16V
C171
21
C144
0.1uF 16V
1 2
0.1uF 16V
C115
21
0.1uF 16V
C314
1 2
2
C309
10uF 6.3V
1
C312
1uF 6.3V
2
3
2-24-2005_11:44
10V-10%
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,23 16,23 16,23 16,23
16,18,23
16,23 16,23 16,23
16,23 16,23 16,23
PXH_PCIX_A_AD32 PXH_PCIX_A_AD34 PXH_PCIX_A_AD35 PXH_PCIX_A_AD33
PXH_PCIX_A_AD36 PXH_PCIX_A_AD37 PXH_PCIX_A_AD38 PXH_PCIX_A_AD39
PXH_PCIX_A_AD40 PXH_PCIX_A_AD42 PXH_PCIX_A_AD41 PXH_PCIX_A_AD43
PXH_PCIX_A_AD44 PXH_PCIX_A_AD45 PXH_PCIX_A_AD46 PXH_PCIX_A_AD47
PXH_PCIX_A_AD48 PXH_PCIX_A_AD50 PXH_PCIX_A_AD49 PXH_PCIX_A_AD51
PXH_PCIX_A_AD52 PXH_PCIX_A_AD53 PXH_PCIX_A_AD55 PXH_PCIX_A_AD54
PXH_PCIX_A_AD56 PXH_PCIX_A_AD57 PXH_PCIX_A_AD59 PXH_PCIX_A_AD58
PXH_PCIX_A_AD60 PXH_PCIX_A_AD61 PXH_PCIX_A_AD62 PXH_PCIX_A_PAR64
PXH_PCIX_A_AD63 PXH_PCIX_A_CBE5_N PXH_PCIX_A_CBE4_N PXH_PCIX_A_CBE6_N
PXH_PCIX_A_DEVSEL_N PXH_PCIX_A_TRDY_N PXH_PCIX_A_IRDY_N PXH_PCIX_A_FRAME_N
PXH_PCIX_A_SERR_N PXH_PCIX_A_PERR_N PXH_PCIX_A_LOCK_N PXH_PCIX_A_STOP_N
PXH_PCIX_A_ACK64_N PXH_PCIX_A_REQ64_N PXH_PCIX_A_CBE7_N NC_RN77_P4
16,18,23
PXH_PCIX_A_SERR_N
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
1
+3.3V_RSR
+3.3V_RSR
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
R459
RN74
8.2K
RN66
8.2K
RN67
8.2K
RN73
8.2K
RN68
8.2K
RN69
8.2K
RN70
8.2K
RN64
8.2K
RN75
8.2K
RN71
8.2K
RN72
8.2K
RN65
8.2K
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
8 7 6 5
X
+3.3V_RSR+3.3V_RSR
RN86
1 2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD32 PXH_PCIX_B_AD34 PXH_PCIX_B_AD35 PXH_PCIX_B_AD33
X
1
RN78
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD36 PXH_PCIX_B_AD37 PXH_PCIX_B_AD38 PXH_PCIX_B_AD39
X
1
RN79
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD40 PXH_PCIX_B_AD42 PXH_PCIX_B_AD41 PXH_PCIX_B_AD43
X
1
RN85
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD44 PXH_PCIX_B_AD45 PXH_PCIX_B_AD46 PXH_PCIX_B_AD47
X
1
RN80
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD48 PXH_PCIX_B_AD50 PXH_PCIX_B_AD49 PXH_PCIX_B_AD51
X
1
RN81
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD52 PXH_PCIX_B_AD53 PXH_PCIX_B_AD55 PXH_PCIX_B_AD54
X
1
RN82
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD56 PXH_PCIX_B_AD57 PXH_PCIX_B_AD59 PXH_PCIX_B_AD58
X
1
RN76
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD60 PXH_PCIX_B_AD61 PXH_PCIX_B_AD62 PXH_PCIX_B_PAR64
X
1
RN87
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_AD63 PXH_PCIX_B_CBE5_N PXH_PCIX_B_CBE4_N PXH_PCIX_B_CBE6_N
X
1
RN83
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_DEVSEL_N PXH_PCIX_B_TRDY_N PXH_PCIX_B_IRDY_N PXH_PCIX_B_FRAME_N
X
1
RN84
2 3 4
8.2K
8 7 6 5
16,18,21,22,34
16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_SERR_N PXH_PCIX_B_PERR_N PXH_PCIX_B_LOCK_N PXH_PCIX_B_STOP_N
X
1
RN77
2 3 4
8.2K
8 7 6 5
16,21,22,34 16,21,22,34 16,21,22,34
PXH_PCIX_B_ACK64_N PXH_PCIX_B_REQ64_N PXH_PCIX_B_CBE7_N NC_RN65_P4
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
X
R226
NP
1 2
8.2K-5% 8.2K-5%
X
16,18,21,22,34
PXH_PCIX_B_SERR_N
NP
1 2
17
PXH_VSSBG_EXP_A13
A4
A8 A17 A20 A24
B8 B10 B13 B16
C2 C5
C8 C20 C23 D11 D14 D17
E2 E5
E8 E10 E13 E20 E23
F15
G2 G5
G8 G11 G14 G17 G20 G23
H6 H10 H14
J1 J4
J9 J11 J13 J15 J19 J22
K2 K5
K8 K10 K12 K14 K16 K20 K23
L9
L11 L13 L15 L18 L21 L24
M4
M7 M10 M12 M14 M16
N2 N5
N9 N11 N13 N15
VSS_A4 VSS_A8 VSS_A17 VSS_A20 VSS_A24 VSS_B8 VSS_B10 VSS_B13 VSS_B16 VSS_C2 VSS_C5 VSS_C8 VSS_C20 VSS_C23 VSS_D11 VSS_D14 VSS_D17 VSS_E2 VSS_E5 VSS_E8 VSS_E10 VSS_E13 VSS_E20 VSS_E23 VSS_F15 VSS_G2 VSS_G5 VSS_G8 VSS_G11 VSS_G14 VSS_G17 VSS_G20 VSS_G23 VSS_H6 VSS_H10 VSS_H14 VSS_J1 VSS_J4 VSS_J9 VSS_J11 VSS_J13 VSS_J15 VSS_J19 VSS_J22 VSS_K2 VSS_K5 VSS_K8 VSS_K10 VSS_K12 VSS_K14 VSS_K16 VSS_K20 VSS_K23 VSS_L9 VSS_L11 VSS_L13 VSS_L15 VSS_L18 VSS_L21 VSS_L24 VSS_M4 VSS_M7 VSS_M10 VSS_M12 VSS_M14 VSS_M16 VSS_N2 VSS_N5 VSS_N9 VSS_N11 VSS_N13 VSS_N15
PXH
VSSAEXPVSSBGEXP
VSS_N20 VSS_N23
VSS_P3
VSS_P6 VSS_P10 VSS_P12 VSS_P14 VSS_P16 VSS_P18 VSS_P21 VSS_P24
VSS_R1
VSS_R4
VSS_R9 VSS_R11 VSS_R13 VSS_R15 VSS_R19 VSS_R22
VSS_T2
VSS_T8 VSS_T10 VSS_T12 VSS_T14 VSS_T16
VSS_U3
VSS_U6 VSS_U12 VSS_U15 VSS_U18 VSS_U21 VSS_U24
VSS_V1
VSS_V7 VSS_V10 VSS_V13 VSS_V19 VSS_V22
VSS_W5
VSS_W8 VSS_W14 VSS_W17 VSS_W20 VSS_W23
VSS_Y3 VSS_Y12 VSS_Y18
VSS_AA4
VSS_AA7 VSS_AA10 VSS_AA13 VSS_AA16 VSS_AA19 VSS_AA22
VSS_AB2
VSS_AB5 VSS_AB11 VSS_AB17 VSS_AB23
VSS_AC9 VSS_AC12 VSS_AC15 VSS_AC18 VSS_AC21
VSS_AD1
VSS_AD4
VSS_AD7 VSS_AD10 VSS_AD16 VSS_AD22 VSS_AD24
F16A13
N20 N23 P3 P6 P10 P12 P14 P16 P18 P21 P24 R1 R4 R9 R11 R13 R15 R19 R22 T2 T8 T10 T12 T14 T16 U3 U6 U12 U15 U18 U21 U24 V1 V7 V10 V13 V19 V22 W5 W8 W14 W17 W20 W23 Y3 Y12 Y18 AA4 AA7 AA10 AA13 AA16 AA19 AA22 AB2 AB5 AB11 AB17 AB23 AC9 AC12 AC15 AC18 AC21 AD1 AD4 AD7 AD10 AD16 AD22 AD24
PXH_VSSA_EXP_F16
17
2
3
+3.3V_RSR
+1.5V
C95
1 2
21
C96
0.1uF 16V
0.1uF 16V
TOPSIDE DECOUPLING
2
C306
1
10uF 6.3V
+3.3V_RSR
12
C381
.1uF
10V-10%
C463
PXH MCH INTERFACE
HETERO 4 OF 4
INTEL 6700 REV C1
+1.5V
C465
10V-10%
12
.1uF
10V-10%
12
.1uF
2
1
2
1
10uF 6.3V
10uF 6.3V
2-24-2005_11:44
+3.3V_RSR
+1.5V
6-17,21-24,28,29
8,9,17,29
INC.
ROUND ROCK,TEXAS
TITLE
C308
2
1
2
1
C305
10uF 6.3V
C307
10uF 6.3V
C100
C106
21
21
C99
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
21
C97
4 4
+1.5V
21
C109
1 2
C103
0.1uF 16V
0.1uF 16V
0.1uF 16V
1 2
C110
C223
0.1uF 16V
21
C104
1 2
1uF 6.3V
0.1uF 16V
C101
C105
1 2
1 2
0.1uF 16V
0.1uF 16V
C98
C108
21
21
C243
0.1uF 16V
0.1uF 16V
1 2
C304
1uF 6.3V
SCHEM, RSR, PE2800, SV
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
18 OF 45
A B
DC
Page 19
B D
CA
PCI Bus Connectors
PCI SLOT 1
CHASSIS SLOT 1
Legacy PCI with Level Shifters Page 1 of 2
FROM ICH5 ON PLANAR
1
1
5V/32Bit PCI Card Slot
+3.3V
+5V
Side B
Side A
-12V +12V
PULL UPS ARE ON THE PLANAR
ROOM=SLOT1
PCI1
61
PCIL_5V_TCK
20
NC_TDO_SLT1
ICH_PIRQ_SLOT_BD_N
5,19
ICH_PIRQ_SLOT_BD_N
5,19
PA_SLT1_N
NC_PRSVD1_SLT1
PB_SLT1_N
NC_PRSVD3_SLT1
C2
12
.01uF 16V
19,20
CK_33M_SLOT1
5
PCIL_5V_REQ_N
20
PCIL_5V_AD31
20
PCIL_5V_AD29
20
PCIL_5V_AD27
20
PCIL_5V_AD25
20
PCIL_5V_CBE3_N
20
PCIL_5V_AD23
20
PCIL_5V_AD21
20
PCIL_5V_AD19
20
PCIL_5V_AD17 PCIL_5V_CBE2_N
20
PCIL_5V_IRDY_N
20
PCIL_5V_DEVSEL_N
20
PCIL_5V_LOCK_N
20
PCIL_5V_PERR_N
20
PCIL_5V_SERR_N
20
PCIL_5V_CBE1_N
20
PCIL_5V_AD14
20
PCIL_5V_AD12
20
PCIL_5V_AD10
20
2
LOW Level on pin 109 (PCIXCAP
on plnr) denotes presence of PCI card
12
C1
.01uF 16V
62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98
99 100 101 102 103 104 105 106 107 108 109
B D
3
PCIL_5V_AD8
20
PCIL_5V_AD7
20
PCIL_5V_AD5
20
PCIL_5V_AD3
20
PCIL_5V_AD1
20
PCIL_5V_ACK64_N
20
110 111 112 113 114 115 116 117 118 119 120
1 2 3 4 5
A
6
C
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
ID
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
NC_PRSVD0_SLT1
NC_PRSVD2_SLT1
PCIL_5V_TRST_N
PCIL_5V_TMS
PCIL_5V_TDI
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_AC_N
PCIL_5V_RST_N
PCIL_5V_GNT_N
PCIL_5V_PME_N
PCIL_5V_AD30
PCIL_5V_AD28 PCIL_5V_AD26
PCIL_5V_AD24
PCIL_5V_IDSEL_SLOT1
PCIL_5V_AD22 PCIL_5V_AD20
PCIL_5V_AD18 PCIL_5V_AD16
PCIL_5V_FRAME_N
PCIL_5V_TRDY_N
PCIL_5V_STOP_N
PCIL_5V_SDONE
PCIL_5V_SBO_N
PCIL_5V_PAR
PCIL_5V_AD15
PCIL_5V_AD13 PCIL_5V_AD11
PCIL_5V_AD9
20
20 20
5,19 5,19
20
20
20
20 20
20
20 20
20 20
20
20
20
19 19
20 20
20 20
20
stub
+3.3V_AUX
5
1 2
100-1%
R23
PCIL_5V_AD17
19,20
On A00 PWA brds, this was connected up to 5V for PCI 2.1 support.
On A01 PWA brds, these resistors were connected up to 3.3V for PCI 2.3 support. A01 PWA brds used A00 PWB and rework
On A02 PWA brds, these resistors were changed to make no issues with PCI 2.3 add-in cards On A02 brds, these resistors were changed to 22k 5%, Dell P/N 30423. A02 PWA brds used A00 PWB and rework
On A03 PWA brds, these resistors were connected up to 3.3V for PCI 2.3 support. On A03 PWA brds, these resistors were changed to 4.7k 5%, Dell P/N 19960. A03 PWA brds used A01 PWB and no rework
19
19
PCIL_5V_SDONE
PCIL_5V_SBO_N
2
+3.3V_AUX
R156
1 2
4.7K
R154
1 2
4.7K
3
50 51 52 53 54 55 56 57 58 59 60
PCIL_5V_CBE0_N
PCIL_5V_AD6 PCIL_5V_AD4
PCIL_5V_AD2 PCIL_5V_AD0
PCIL_5V_REQ64_N
20
20 20
20 20
20
C38
C39
+12V
1 2
1 2
-12V
.1uF
25V-20%
.1uF
25V-20%
C614
2 1
10uF
16V 10%
+3.3V_AUX
21
C48
4.7uF
6.3V-10%
+5V
C52
+3.3V
C53
2X60 PCI SKT
2
C68
1
22uF 10V
2
C47
1
22uF 10V
1
2
2
1
C37
22uF 10V
C35
22uF 10V
1 2
1 2
C34
0.1uF 16V
ROOM=PCI1_CAPS
C28
0.1uF 16V
1 2
1 2
C33
1 2
0.1uF 16V
C29
1 2
0.1uF 16V
C32
1 2
0.1uF 16V
C31
1 2
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
C285
C71
0.1uF 16V
1 2
0.1uF 16V
1 2
C85
C74
+5V
+3.3V
+3.3V_AUX
+12V
-12V
4,5,20,31
4,5,31-33,36
4-2U,7-3W,8-2X,11-2U,16-2U 21-3W,22-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
4,5,7,21-24,28,29,33
11,21-24,28
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
2-24-2005_11:44
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
19 OF 45
DC
A B
Page 20
PCI Level Shifters
B D
PCI Level Shifters
CA
PCI Card (5.0V)
PCI Bus (3.3V)
pi5c3384 not flow thru
+5V
Power Generation
1
IMBD4448
1
Circuit: 4.4V For Level Shifting
D3
K (Cathode)
IMBD4448
1 2
A (Anode)
P
N
Changed to Discovery level shifter for flow-through routing
3
pi5c6800Q QSOP24 150 mils wide 244 max 1Y584 used on Discovery
3
R75
1 2
V_4P4V
20
do not use charge pump version 8174U latches up if you do not power VCC before VBIAS
825-1%
0.1uF 16V C40
21
PCI_RST_RISER_BUF3_N
4
5 5 5 5 5 5 5 5 5
20
21
C568
1uF 6.3V
PCI0_GNT_SLOT_N PCI0_AD30 PCI0_AD28 PCI0_AD26 PCI0_REQ_SLOT_N PCI0_AD31 PCI0_AD29 PCI0_AD27 PCI0_AD25
LVL_SHFT_ON_N
21
R463
220
20
V_4P4V
U19
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800Q
QSOP24
PCIL_5V_RST_N
PCIL_5V_GNT_N
PCIL_5V_AD30 PCIL_5V_AD28 PCIL_5V_AD26
PCIL_5V_REQ_N
PCIL_5V_AD31 PCIL_5V_AD29 PCIL_5V_AD27 PCIL_5V_AD25
U20
V_4P4V
20
19 19 19 19 19 19 19 19 19 19
PCI0_AD15
5
PCI0_AD13
5
PCI0_AD11
5
PCI0_AD9
5
PCI0_CBE0_N
5
PCI0_SERR_N
5
PCI0_CBE1_N
5
PCI0_AD14
5
PCI0_AD12
5
PCI0_AD10
5
LVL_SHFT_ON_N
20
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
PCIL_5V_AD15 PCIL_5V_AD13 PCIL_5V_AD11
PCIL_5V_AD9
PCIL_5V_CBE0_N
PCIL_5V_SERR_N
PCIL_5V_CBE1_N
PCIL_5V_AD14 PCIL_5V_AD12 PCIL_5V_AD10
19 19 19 19 19 19,20 19 19 19 19
5C6800Q
QSOP24
pi5c3384AQ QSOP24 244 mils total wide pi5c3384Z leadless 150 mils wide pi5c6800Q QSOP24 150 mils wide 244 max 1Y584 used on Discovery do not use charge pump version 8174U latches up if you do not power VCC before VBIAS
pi5c6800Z DFN 150 mils wide max
+5V
R391
2.7K-5% R390
2 1
2.7K-5% R394
2 1
2.7K-5% R395
2.7K-5% R396
1
12
12
12
PCIL_5V_FRAME_N
PCIL_5V_IRDY_N
PCIL_5V_TRDY_N
PCIL_5V_DEVSEL_N
PCIL_5V_STOP_N
19,20
19,20
19,20
19,20
19,20
2.7K-5% R398
2
2
PCI0_AD24
5
PCI0_AD22
5
PCI0_AD20
5
PCI0_AD18
5
PCI0_CBE3_N
5
PCI0_AD23
5
PCI0_AD21
5
PCI0_AD19
5
PCI0_AD17
5
LVL_SHFT_ON_N
20
20
NC_U17_P3
V_4P4V
U17
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800Q
QSOP24
NC_U17_P22
PCIL_5V_AD24
PCIL_5V_AD22 PCIL_5V_AD20 PCIL_5V_AD18
PCIL_5V_CBE3_N
PCIL_5V_AD23 PCIL_5V_AD21 PCIL_5V_AD19 PCIL_5V_AD17
12
2.7K-5% R397
2 1
2.7K-5% R399
12
U21
V_4P4V
19
PCI0_AD6
5 19 19 19 19 19 19 19 19
PCI0_AD4
5
PCI0_AD2
5
PCI0_AD0
5
PCI0_AD8
5
PCI0_AD7
5
PCI0_AD5
5
PCI0_AD3
5
PCI0_AD1
5
LVL_SHFT_ON_N
20
20
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
PCIL_5V_AD6 PCIL_5V_AD4 PCIL_5V_AD2 PCIL_5V_AD0
19 19 19 19
NC_U21_P19NC_U21_P6
PCIL_5V_AD8 PCIL_5V_AD7 PCIL_5V_AD5 PCIL_5V_AD3 PCIL_5V_AD1
19 19 19 19 19
+5V
5C6800Q
QSOP24
2.7K-5%
R240
2.7K-5% R247
2.7K-5%
R249
2.7K-5%
R248
2.7K-5%
12
12
12
12
PCIL_5V_LOCK_N
PCIL_5V_PERR_N
PCIL_5V_SERR_N
PCIL_5V_REQ64_N
PCIL_5V_ACK64_N
PCIL_5V_TDI
PCIL_5V_TMS
19,20
19,20
19,20
19
19
19
19
U15
R46
20
V_4P4V
24
VCC
12
PCIL_5V_TRST_N
19
3
3
PCI0_AD16
5
PCI0_FRAME_N
5
PCI0_TRDY_N
5
PCI0_STOP_N
5
PCI0_PAR
5
PCI0_CBE2_N
5
PCI0_IRDY_N
5
PCI0_DEVSEL_N
5
PCI0_LOCK_N
5
PCI0_PERR_N
5
LVL_SHFT_ON_N
20
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800Q
QSOP24
PCIL_5V_AD16
PCIL_5V_FRAME_N
PCIL_5V_TRDY_N
PCIL_5V_STOP_N
PCIL_5V_PAR
PCIL_5V_CBE2_N
PCIL_5V_IRDY_N
PCIL_5V_DEVSEL_N
PCIL_5V_LOCK_N PCIL_5V_PERR_N
19 19,20 19,20 19,20 19 19 19,20 19,20 19,20 19,20
220
R36
220
12
PCIL_5V_TCK
19
+5V
4,5,19,31
High Frequency Decoupling
Within 0.2" of VCC pin
V_4P4V
20
4 4
1 between each pair of ICs and 1 on each end of the row of ICs
0.1uF 16V
21
C83
0.1uF 16V
1 2
C77
0.1uF 16V
1 2
C78
0.1uF 16V
1 2
C80
0.1uF 16V
1 2
C81
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
ROOM=PCI0
2-24-2005_11:44
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
20 OF 45
A B
DC
Page 21
B D
CA
+3.3V_RSR
R392
21
SLOT2_TMS
1 2
4.7K
PCIX SLOT 2
TO PXH B
SLOT2_TDI
21
SLOT2_TCK
21
SLOT2_TRST_N
21
Side B
+3.3V_RSR
+5V_RSR
-12V
CHASSIS SLOT 2
+3.3V_RSR
+5V_RSR
+12V
Side A
1
section 4.3.3
TMS, TDI pullups ~5k TRST, TCK pulldowns ~5k
TDO must be left open
SLOT2_TCK
21
PXH_PCIX_A_IRQ1_N
16
PXH_PCIX_A_IRQ3_N
16
PCI_SLOT2_PRSNT_N
21
PCI_SLOT2_PRSNT2_N
21
NC_SLOT2_TDO
NC_SLOT2_RSVD1
INTB
INTD
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
PCI2
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
INTA
INTC
PXH_PCIX_A_IRQ0_N PXH_PCIX_A_IRQ2_N
NC_SLOT2_RSVD6
NC_SLOT2_RSVD7
SLOT2_TRST_N
SLOT2_TMS
SLOT2_TDI
21
21 21
16 16
+3.3V_AUX
+12V
25V-20%
.1uF
21
C190
C615
2 1
10uF
16V 10%
+3.3V_AUX
21
C620
4.7uF
6.3V-10%
PCI 2.3 systems:
section 7.7.7
M66EN pullup ~5k
PCI 2.3:
PCI_SLOT2_PRSNT2_N
21
PCI_SLOT2_PRSNT_N
21
R393
1 2
4.7K
R187
1 2
4.7K
R188
1 2
4.7K
1
NC_SLOT2_RSVD2
CK_PXH_PCIX_B_PCLKO0_S2
16
PXH_PCIX_B_REQ0_N
16
16,22,34 16,22,34
16,22,34 16,22,34
16,22,34 16,22,34
16,22,34 16,22,34
16,22,34
2
16,22,34
16,18,22,34
16,18,22,34 16,21,22,34 16,18,22,34 16,18,22,34
16,18,22,34
16,22,34 16,22,34
16,22,34 16,22,34
16,21,22,34
16,22,34 16,22,34
16,22,34 16,22,34
16,22,34
16,18,22,34
PXH_PCIX_B_AD31 PXH_PCIX_B_AD29
PXH_PCIX_B_AD27 PXH_PCIX_B_AD25
PXH_PCIX_B_CBE3_N PXH_PCIX_B_AD23
PXH_PCIX_B_AD21 PXH_PCIX_B_AD19
PXH_PCIX_B_AD17 PXH_PCIX_B_CBE2_N
PXH_PCIX_B_IRDY_N
PXH_PCIX_B_DEVSEL_N PXH_PCIX_B_PCIXCAP PXH_PCIX_B_LOCK_N PXH_PCIX_B_PERR_N
PXH_PCIX_B_SERR_N
PXH_PCIX_B_CBE1_N PXH_PCIX_B_AD14
PXH_PCIX_B_AD12 PXH_PCIX_B_AD10 PXH_PCIX_B_M66EN
PXH_PCIX_B_AD8 PXH_PCIX_B_AD7
PXH_PCIX_B_AD5 PXH_PCIX_B_AD3
PXH_PCIX_B_AD1
PXH_PCIX_B_ACK64_N
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
PXH_PCIX_B_RST_SLOT2_3_N
PXH_PCIX_B_GNT0_N
PXH_PB_PME_N
PXH_PCIX_B_AD30
PXH_PCIX_B_AD28 PXH_PCIX_B_AD26
PXH_PCIX_B_AD24
PXH_PCIX_B_SLOT2_IDSEL
PXH_PCIX_B_AD22 PXH_PCIX_B_AD20
PXH_PCIX_B_AD18 PXH_PCIX_B_AD16
PXH_PCIX_B_FRAME_N
PXH_PCIX_B_TRDY_N
PXH_PCIX_B_STOP_N
SLOT2_SDONE
SLOT2_SBO_N
PXH_PCIX_B_PAR
PXH_PCIX_B_AD15
PXH_PCIX_B_AD13 PXH_PCIX_B_AD11
PXH_PCIX_B_AD9
PXH_PCIX_B_CBE0_N
PXH_PCIX_B_AD6 PXH_PCIX_B_AD4
PXH_PCIX_B_AD2 PXH_PCIX_B_AD0
PXH_PCIX_B_REQ64_N
16,22
16
16,22,34 16,22,34
16,22,34 16,22,34
16,22,34
16,22,34 16,22,34
16,21,22,34 16,22,34
16,18,22,34
16,18,22,34
16,18,22,34
21 21
16,22,34 16,22,34
16,22,34 16,22,34
16,22,34
16,22,34
16,22,34 16,22,34
16,22,34 16,22,34
16,18,22,34
1 2
100-1%
stub
R6
PXH_PCIX_B_AD18
16,21,22,34
25V-20%
.1uF
-12V
+5V_RSR
22uF 10V
1
2
+5V_RSR
0.1uF 16V
1 2
+3.3V_RSR
1 2
21
C5032
C183
C172
C191
0.1uF 16V
0.1uF 16V
1 2
C181
0.1uF 16V
1 2
1 2
C173
C184
0.1uF 16V
0.1uF 16V
1 2
C180
0.1uF 16V 0.1uF 16V
1 2
1 2
C176
C192
0.1uF 16V
0.1uF 16V
1 2
C182
0.1uF 16V
1 2
1 2
C175
C193
0.1uF 16V
0.1uF 16V
1 2
1 2
C174
C185
PCIX 2.0 systems: 5V
3.3V +12V
-12V
5% 5A +-0.3V 5% 10% 100mA
3.3Vaux +-0.3V +-0.075V
section 2.5.1
7.6A 500mA
375mA
1.5AVi/o = 1.5V MODE2
PCI 2.3 cards:
PCIX 2.0 systems:
PCIXCAP pullup 3.3k for mode2 capable systems PCIXCAP pullup 10k for mode1 capable systems
MODE2 pullup 1k 5% on slot pin B50 on Mode2 systems MODE2 GND on slot pin B50 on Mode1 systems
PCIX 2.0 cards:
PCIXCAP pulldown 10k 5% for 66MHz cards Mode1 PCIXCAP pulldown open for 133MHz cards PCIXCAP pulldown 3.16k 1% for 266MHz cards PCIXCAP pulldown 1.02k 1% for 533MHz cards
section 7.7.7
M66EN gnd 33 MHz
section 2.4
section 2.4 table 2-39
MODE2 pin open Mode2 MODE2 pin gnd Mode1
Mode1 Mode2 Mode2
16,21,22,34
PXH_PCIX_B_PCIXCAP
.01uF 16V
16,21,22,34
1 2
C143
PXH_PCIX_B_M66EN
.01uF 16V
.01uF 16V
CAP MUST BE MAX 0.25 IN FROM CONN PIN
CAP MUST BE MAX 0.1 IN FROM GND VIA
C266
1 2
.01uF 16V
R381
1 2
C542
1 2
C198
+3.3V_AUX
2
NC_SLOT2_RSVD3
16,18,22,34 16,18,22,34
3
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34
PXH_PCIX_B_CBE6_N PXH_PCIX_B_CBE4_N
PXH_PCIX_B_AD63 PXH_PCIX_B_AD61
PXH_PCIX_B_AD59 PXH_PCIX_B_AD57
PXH_PCIX_B_AD55 PXH_PCIX_B_AD53
PXH_PCIX_B_AD51 PXH_PCIX_B_AD49
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78
PXH_PCIX_B_CBE7_N PXH_PCIX_B_CBE5_N
PXH_PCIX_B_PAR64
PXH_PCIX_B_AD62
PXH_PCIX_B_AD60 PXH_PCIX_B_AD58
PXH_PCIX_B_AD56 PXH_PCIX_B_AD54
PXH_PCIX_B_AD52 PXH_PCIX_B_AD50
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
+3.3V_RSR
0.1uF 16V0.1uF 16V
1 2
C195
0.1uF 16V
1 2
C194
1 2
C177
0.1uF 16V
1 2
C178
0.1uF 16V
1 2
C179
PCI 2.3: section 4.3.3
SLOT2_SBO_N
21
SLOT2_SDONE
21
SMBUS support is optional in PCI 2.3 if SMBUS not used, pullups ~5k required
1 2
4.7K
R161
1 2
4.7K
3
if system has aux, pullups must be to aux
16,18,22,34
A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94B94
PXH_PCIX_B_AD48 PXH_PCIX_B_AD46
PXH_PCIX_B_AD44 PXH_PCIX_B_AD42
PXH_PCIX_B_AD40 PXH_PCIX_B_AD38
PXH_PCIX_B_AD36 PXH_PCIX_B_AD34
PXH_PCIX_B_AD32
NC_SLOT2_RSVD8
NC_SLOT2_RSVD9
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34
+3.3V_RSR
22uF 10V
1
C5033
2
0.1uF 16V
1 2
C189
0.1uF 16V
1 2
C188
0.1uF 16V
1 2
C187
0.1uF 16V
1 2
C186
+5V_RSR
+3.3V_RSR
+3.3V_AUX
+12V
10,11,15,22-24,29,36
6-18,22-24,28,29
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,22-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
16,18,22,34 16,18,22,34
PXH_PCIX_B_AD47 PXH_PCIX_B_AD45
PXH_PCIX_B_AD43 PXH_PCIX_B_AD41
PXH_PCIX_B_AD39 PXH_PCIX_B_AD37
PXH_PCIX_B_AD35 PXH_PCIX_B_AD33
NC_SLOT2_RSVD4 NC_SLOT2_RSVD5
B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93
PCI 64-3.3V
SKT, GREEN
POWER_DRAW=P12V@0.5A POWER_DRAW=M12V@0.1A POWER_DRAW=P5V@5A POWER_DRAW=P3.3V@7.6A POWER_DRAW=P3.3VAUX@0.4A
4,5,7,19,22-24,28,29,33
-12V
4 4
11,19,22-24,28
INC.
ROUND ROCK,TEXAS
TITLE
2-24-2005_11:44
SCHEM, RSR, PE2800, SV
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
21 OF 45
DC
A B
Page 22
B D
CA
+3.3V_RSR
R274
1 2
PCIX SLOT 3
CHASSIS SLOT 3
TO PXH B
22
SLOT3_TMS
4.7K
+12V
R275
Side B
+3.3V_RSR
-12V +3.3V_RSR
Side A
22
SLOT3_TDI
1 2
4.7K
+5V_RSR +5V_RSR
R169
SLOT3_TCK
1 2
1
1
22
PCI3
B1
22
SLOT3_TCK
B2 B3
NC_SLOT3_TDO
B4 B5 B6
PXH_PCIX_A_IRQ6_N
16
PXH_PCIX_A_IRQ4_N
16
PCI_SLOT3_PRSNT_N
22
PCI_SLOT3_PRSNT2_N
22
NC_SLOT3_RSVD1
NC_SLOT3_RSVD2
B7 B8
B9 B10 B11
B14 B15
CK_PXH_PCIX_B_PCLKO1_S3
16
B16 B17
PXH_PCIX_B_REQ1_N
16
B18 B19
16,21,34 16,21,34
PXH_PCIX_B_AD31 PXH_PCIX_B_AD29
B20 B21 B22
16,21,34 16,21,34
PXH_PCIX_B_AD27 PXH_PCIX_B_AD25
B23 B24 B25
16,21,34 16,21,34
PXH_PCIX_B_CBE3_N PXH_PCIX_B_AD23
B26 B27 B28
16,21,34
16,21,22,34
PXH_PCIX_B_AD21 PXH_PCIX_B_AD19
B29 B30 B31
16,21,34 16,21,34
PXH_PCIX_B_AD17 PXH_PCIX_B_CBE2_N
B32 B33 B34
2
16,18,21,34
PXH_PCIX_B_IRDY_N
B35 B36
16,18,21,34
16,21,34 16,18,21,34 16,18,21,34
PXH_PCIX_B_DEVSEL_N PXH_PCIX_B_PCIXCAP PXH_PCIX_B_LOCK_N PXH_PCIX_B_PERR_N
B37 B38 B39 B40 B41
16,18,21,34
PXH_PCIX_B_SERR_N
B42 B43
16,21,34
16,21,34
PXH_PCIX_B_CBE1_N PXH_PCIX_B_AD14
B44 B45 B46
16,21,34
16,21,34
16,21,34
PXH_PCIX_B_AD12 PXH_PCIX_B_AD10 PXH_PCIX_B_M66EN
B47 B48 B49 B50 B51
16,21,34
16,21,34
PXH_PCIX_B_AD8 PXH_PCIX_B_AD7
B52 B53 B54
16,21,34
16,21,34
PXH_PCIX_B_AD5 PXH_PCIX_B_AD3
B55 B56 B57
16,21,34
PXH_PCIX_B_AD1
B58 B59
16,18,21,34
PXH_PCIX_B_ACK64_N
B60 B61 B62
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
SLOT3_TRST_N
PXH_PCIX_A_IRQ5_N PXH_PCIX_A_IRQ7_N
NC_SLOT3_RSVD6
NC_SLOT3_RSVD7
PXH_PCIX_B_RST_SLOT2_3_N
PXH_PCIX_B_GNT1_N
PXH_PB_PME_N
PXH_PCIX_B_AD30
PXH_PCIX_B_AD28 PXH_PCIX_B_AD26
PXH_PCIX_B_AD24
PXH_PCIX_B_SLOT3_IDSEL
PXH_PCIX_B_AD22 PXH_PCIX_B_AD20
PXH_PCIX_B_AD18 PXH_PCIX_B_AD16
PXH_PCIX_B_FRAME_N
PXH_PCIX_B_TRDY_N
PXH_PCIX_B_STOP_N
SLOT3_SDONE
SLOT3_SBO_N
PXH_PCIX_B_PAR
PXH_PCIX_B_AD15
PXH_PCIX_B_AD13 PXH_PCIX_B_AD11
PXH_PCIX_B_AD9
PXH_PCIX_B_CBE0_N
PXH_PCIX_B_AD6 PXH_PCIX_B_AD4
PXH_PCIX_B_AD2 PXH_PCIX_B_AD0
PXH_PCIX_B_REQ64_N
SLOT3_TMS
SLOT3_TDI
22
22 22
16 16
16,21
16
16,21,34 16,21,34
16,21,34 16,21,34
16,21,34
16,21,34 16,21,34
16,21,34 16,21,34
16,18,21,34
16,18,21,34
16,18,21,34
22 22
16,21,34 16,21,34
16,21,34 16,21,34
16,21,34
16,21,34
16,21,34 16,21,34
16,21,34 16,21,34
16,18,21,34
+3.3V_AUX
1 2
stub
R69
100-1%
PXH_PCIX_B_AD19
16,21,22,34
+12V
25V-20%
.1uF
25V-20%
.1uF
-12V
+5V_RSR
22uF 10V
1
2
+5V_RSR
0.1uF 16V
1 2
+3.3V_RSR
0.1uF 16V
1 2
1 2
C5034
C156
1 2
C163
C164
C118
C616
2 1
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
10uF
1 2
C154
1 2
16V 10%
C157
0.1uF 16V
C119
0.1uF 16V
1 2
1 2
C153
0.1uF 16V 0.1uF 16V
1 2
C165
C122
+3.3V_AUX
C621
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
21
1 2
C155
1 2
C166
C121
4.7uF
6.3V-10%
0.1uF 16V
1 2
0.1uF 16V
1 2
C158
C120
SLOT3_TRST_N
22
PCI_SLOT3_PRSNT2_N
22
PCI_SLOT3_PRSNT_N
22
SLOT3_SBO_N
22
SLOT3_SDONE
22
4.7K
R224
1 2
4.7K
.01uF 16V
R383
1 2
4.7K
R382
1 2
4.7K
1 2
C169
.01uF 16V
1 2
+3.3V_AUX
C543
2
NC_SLOT3_RSVD3
B63 B64
16,18,21,34 16,18,21,34
PXH_PCIX_B_CBE6_N PXH_PCIX_B_CBE4_N
B65 B66 B67
16,18,21,34
3
16,18,21,34
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD63 PXH_PCIX_B_AD61
PXH_PCIX_B_AD59 PXH_PCIX_B_AD57
B68 B69 B70 B71 B72 B73
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD55 PXH_PCIX_B_AD53
B74 B75 B76
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD51 PXH_PCIX_B_AD49
B77 B78 B79
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD47 PXH_PCIX_B_AD45
B80 B81 B82
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD43 PXH_PCIX_B_AD41
B83 B84 B85
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD39 PXH_PCIX_B_AD37
B86 B87 B88
16,18,21,34 16,18,21,34
PXH_PCIX_B_AD35 PXH_PCIX_B_AD33
B89 B90 B91
NC_SLOT3_RSVD4
B92
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92
NC_SLOT3_RSVD8
PXH_PCIX_B_CBE7_N PXH_PCIX_B_CBE5_N
PXH_PCIX_B_PAR64
PXH_PCIX_B_AD62
PXH_PCIX_B_AD60 PXH_PCIX_B_AD58
PXH_PCIX_B_AD56 PXH_PCIX_B_AD54
PXH_PCIX_B_AD52 PXH_PCIX_B_AD50
PXH_PCIX_B_AD48 PXH_PCIX_B_AD46
PXH_PCIX_B_AD44 PXH_PCIX_B_AD42
PXH_PCIX_B_AD40 PXH_PCIX_B_AD38
PXH_PCIX_B_AD36 PXH_PCIX_B_AD34
PXH_PCIX_B_AD32
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34 16,18,21,34
16,18,21,34
+3.3V_RSR
0.1uF 16V
1 2
+3.3V_RSR
22uF 10V
1
2
C141
C560
0.1uF 16V
1 2
0.1uF 16V
C140
1 2
C135
1 2
C123
0.1uF 16V
1 2
C134
0.1uF 16V
1 2
0.1uF 16V
C124
1 2
C133
0.1uF 16V
1 2
0.1uF 16V
3
C125
1 2
C132
+5V_RSR
NC_SLOT3_RSVD5
B93
A93 A94B94
NC_SLOT3_RSVD9
10,11,15,21,23,24,29,36
+3.3V_RSR
PCI 64-3.3V
SKT, GREEN
6-18,21,23,24,28,29
+3.3V_AUX
POWER_DRAW=P12V@0.5A POWER_DRAW=M12V@0.1A POWER_DRAW=P5V@5A POWER_DRAW=P3.3V@7.6A POWER_DRAW=P3.3VAUX@0.4A
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,23-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
+12V
4-1U,5-2W,7-2W,19-3W,21-2W
-12V
23-3W,24-3W,28-3W,29-2W,33-2V
11,19,21,23,24,28
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
2-24-2005_11:44
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
22 OF 45
A B
DC
Page 23
B D
CA
+3.3V_RSR
R388
PCIX SLOT 4
CHASSIS SLOT 4
23
SLOT4_TMS
1 2
4.7K
R389
1 2
Side B
TO PXH A
23
SLOT4_TDI
4.7K
-12V
+12V
Side A
R183
+5V_RSR
+5V_RSR
23
SLOT4_TCK
1 2
4.7K
1
1
SLOT4_TCK
23
PXH_PCIX_A_IRQ11_N
16
PXH_PCIX_A_IRQ9_N
16
PCI_SLOT4_PRSNT_N
23
PCI_SLOT4_PRSNT2_N
23
NC_SLOT4_TDO
NC_SLOT4_RSVD1
+3.3V_RSR
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
PCI4
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
+3.3V_RSR
SLOT4_TRST_N
SLOT4_TMS
SLOT4_TDI
PXH_PCIX_A_IRQ10_N
PXH_PCIX_A_IRQ8_N
NC_SLOT4_RSVD6
NC_SLOT4_RSVD7
23
23 23
16 16
+3.3V_AUX
+12V
25V-20%
.1uF
1 2
C136
C617
2 1
10uF
16V 10%
+3.3V_AUX
21
C622
4.7uF
6.3V-10%
SLOT4_TRST_N
23
PCI_SLOT4_PRSNT2_N
23
R184
1 2
4.7K
PCI_SLOT4_PRSNT_N
NC_SLOT4_RSVD2
B14 B15
CK_PXH_PCIX_A_PCLKO0_S4
16
B16 B17
PXH_PCIX_A_REQ0_N
16
B18 B19
PXH_PCIX_A_AD31
16
PXH_PCIX_A_AD29
16
B20 B21 B22
PXH_PCIX_A_AD27
16
PXH_PCIX_A_AD25
16
B23 B24 B25
PXH_PCIX_A_CBE3_N
16
PXH_PCIX_A_AD23
16
B26 B27 B28
PXH_PCIX_A_AD21
16
PXH_PCIX_A_AD19
16
B29 B30 B31
PXH_PCIX_A_AD17
16
PXH_PCIX_A_CBE2_N
16
B32 B33 B34
2
16,18
PXH_PCIX_A_IRDY_N
B35 B36
16,18 16,23 16,18 16,18
PXH_PCIX_A_DEVSEL_N PXH_PCIX_A_PCIXCAP PXH_PCIX_A_LOCK_N PXH_PCIX_A_PERR_N
B37 B38 B39 B40 B41
16,18
PXH_PCIX_A_SERR_N
B42 B43
PXH_PCIX_A_CBE1_N
16
PXH_PCIX_A_AD14
16
B44 B45 B46 B47 B48 B49
16,23
PXH_PCIX_A_AD12
16
PXH_PCIX_A_AD10
16
PXH_PCIX_A_M66EN
B50 B51
PXH_PCIX_A_AD8
16
PXH_PCIX_A_AD7
16
B52 B53 B54
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54
PXH_PCIX_A_RST_SLOT4_N
PXH_PCIX_A_GNT0_N
PXH_PA_PME_N
PXH_PCIX_A_AD30
PXH_PCIX_A_AD28 PXH_PCIX_A_AD26
PXH_PCIX_A_AD24
PXH_PCIX_A_SLOT4_IDSEL
PXH_PCIX_A_AD22 PXH_PCIX_A_AD20
PXH_PCIX_A_AD18 PXH_PCIX_A_AD16
PXH_PCIX_A_FRAME_N
PXH_PCIX_A_TRDY_N
PXH_PCIX_A_STOP_N
SLOT4_SDONE
SLOT4_SBO_N
PXH_PCIX_A_PAR
PXH_PCIX_A_AD15
PXH_PCIX_A_AD13 PXH_PCIX_A_AD11
PXH_PCIX_A_AD9
PXH_PCIX_A_CBE0_N
PXH_PCIX_A_AD6
16
16
16 16
16 16
16
16 16,23
16 16
16,18
16,18
16,18
23 23
16 16
16 16
16
16
16
R163
1 2
100-1%
stub
PXH_PCIX_A_AD20
16,23
25V-20%
+5V_RSR
22uF 10V
1
2
+5V_RSR
0.1uF 16V
1 2
.1uF
-12V
C613
C129
1 2
C137
0.1uF 16V
0.1uF 16V
1 2
C130
1 2
C127
0.1uF 16V
0.1uF 16V
1 2
1 2
C126
C138
0.1uF 16V
0.1uF 16V
1 2
1 2
C128
C139
0.1uF 16V
1 2
C131
16,23
16,23
PXH_PCIX_A_PCIXCAP
C267
23
PXH_PCIX_A_M66EN
.01uF 16V
CAP MUST BE MAX 0.25 IN FROM CONN PIN CAP MUST BE MAX 0.1 IN FROM GND VIA
1 2
.01uF 16V
1 2
C197
.01uF 16V
1 2
C170
.01uF 16V
1 2
C544
2
+3.3V_AUX
PXH_PCIX_A_AD5
16
PXH_PCIX_A_AD3
16
PXH_PCIX_A_AD1
16
B55 B56 B57 B58
A55 A56 A57 A58
PXH_PCIX_A_AD4
PXH_PCIX_A_AD2 PXH_PCIX_A_AD0
16
+3.3V_RSR
16 16
SLOT4_SBO_N
23
R385
1 2
4.7K
A59 A60 A61 A62
PXH_PCIX_A_REQ64_N
16,18
R384
SLOT4_SDONE
0.1uF 16V
1 2
1 2
0.1uF 16V 0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
23
1 2
16,18
PXH_PCIX_A_ACK64_N
B59 B60 B61 B62
4.7K
16,18 16,18
16,18 16,18
PXH_PCIX_A_CBE6_N PXH_PCIX_A_CBE4_N
PXH_PCIX_A_AD63 PXH_PCIX_A_AD61
NC_SLOT4_RSVD3
B63 B64 B65 B66 B67 B68 B69
A63 A64 A65 A66 A67 A68 A69
PXH_PCIX_A_CBE7_N PXH_PCIX_A_CBE5_N
PXH_PCIX_A_PAR64
PXH_PCIX_A_AD62
16,18 16,18
16,18 16,18
+3.3V_RSR
C145
C146
C149
C148
C147
3
3
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
PXH_PCIX_A_AD59 PXH_PCIX_A_AD57
PXH_PCIX_A_AD55 PXH_PCIX_A_AD53
PXH_PCIX_A_AD51 PXH_PCIX_A_AD49
PXH_PCIX_A_AD47 PXH_PCIX_A_AD45
PXH_PCIX_A_AD43 PXH_PCIX_A_AD41
PXH_PCIX_A_AD39 PXH_PCIX_A_AD37
PXH_PCIX_A_AD35 PXH_PCIX_A_AD33
NC_SLOT4_RSVD4 NC_SLOT4_RSVD5
B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93
A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94B94
NC_SLOT4_RSVD8
NC_SLOT4_RSVD9
PXH_PCIX_A_AD60 PXH_PCIX_A_AD58
PXH_PCIX_A_AD56 PXH_PCIX_A_AD54
PXH_PCIX_A_AD52 PXH_PCIX_A_AD50
PXH_PCIX_A_AD48 PXH_PCIX_A_AD46
PXH_PCIX_A_AD44 PXH_PCIX_A_AD42
PXH_PCIX_A_AD40 PXH_PCIX_A_AD38
PXH_PCIX_A_AD36 PXH_PCIX_A_AD34
PXH_PCIX_A_AD32
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18 16,18
16,18
0.1uF 16V0.1uF 16V
1 2
+3.3V_RSR
22uF 10V
1
C561
2
C168
0.1uF 16V
1 2
0.1uF 16V
C167
1 2
C162
1 2
C150
0.1uF 16V
1 2
C161
0.1uF 16V
1 2
0.1uF 16V
C151
1 2
C160
0.1uF 16V
1 2
0.1uF 16V
C152
1 2
C159
+5V_RSR
10,11,15,21,22,24,29,36
PCI 64-3.3V
+3.3V_RSR
SKT, GREEN
POWER_DRAW=P12V@0.5A
6-18,21,22,24,28,29
+3.3V_AUX
POWER_DRAW=M12V@0.1A POWER_DRAW=P5V@5A POWER_DRAW=P3.3V@7.6A POWER_DRAW=P3.3VAUX@0.4A
+12V
-12V
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,24-3W,30-2W 31-3W,32-2T,33-3V,36-3W
4-1U,5-2W,7-2W,19-3W,21-2W 22-3W,24-3W,28-3W,29-2W,33-2V
11,19,21,22,24,28
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
2-24-2005_11:44
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
23 OF 45
A B
DC
Page 24
B D
CA
+3.3V_RSR
PCIX SLOT 5
+3.3V_RSR
Side B
-12V
+5V_RSR
1
SLOT5_TCK
24
NC_SLOT5_TDO
IOP_PCIX_B_INT6_N
8
IOP_PCIX_B_INT4_N
8
PCI_SLOT5_PRSNT_N
24
NC_SLOT5_RSVD1
PCI_SLOT5_PRSNT2_N
24
CHASSIS SLOT 5
+3.3V_RSR
Side A
IOP_PCIX_B_INT5_N IOP_PCIX_B_INT7_N
NC_SLOT5_RSVD6
NC_SLOT5_RSVD7
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
+12V
+5V_RSR
PCI5
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
SLOT5_TRST_N
SLOT5_TMS
SLOT5_TDI
24
24 24
8 8
+3.3V_AUX
from Dobson IOP
+12V
25V-20%
.1uF
1 2
C685
C618
2 1
10uF
16V 10%
+3.3V_AUX
21
C623
4.7uF
6.3V-10%
SLOT5_TMS
24
SLOT5_TDI
24
SLOT5_TCK
24
SLOT5_TRST_N
24
PCI_SLOT5_PRSNT_N
24
R452
1 2
4.7K
R453
1 2
4.7K
R443
1 2
4.7K
R444
1 2
4.7K
1
NC_SLOT5_RSVD2
CK_IOP_SLOT5_PCICLK0
7
IOP_PCIX_B_REQ0_N
7
IOP_PCIX_B_AD31
7
IOP_PCIX_B_AD29
7
IOP_PCIX_B_AD27
7,24
IOP_PCIX_B_AD25
7
IOP_PCIX_B_CBE3_N
7
IOP_PCIX_B_AD23
7
IOP_PCIX_B_AD21
7
IOP_PCIX_B_AD19
7
IOP_PCIX_B_AD17
7
IOP_PCIX_B_CBE2_N
7
IOP_PCIX_B_IRDY_N
7,24
IOP_PCIX_B_DEVSEL_N
2
IOP_PCIX_B_PCIXCAP
7,24
3
7,24
IOP_PCIX_B_LOCK_N
7,24
IOP_PCIX_B_PERR_N
7,24
IOP_PCIX_B_SERR_N
7,24
IOP_PCIX_B_CBE1_N
7
IOP_PCIX_B_AD14
7
IOP_PCIX_B_AD12
7
IOP_PCIX_B_AD10
7
IOP_PCIX_B_M66EN
7,24
IOP_PCIX_B_AD8
7
IOP_PCIX_B_AD7
7
IOP_PCIX_B_AD5
7
IOP_PCIX_B_AD3
7
IOP_PCIX_B_AD1
7
IOP_PCIX_B_ACK64_N
7,24
IOP_PCIX_B_CBE6_N
7,24
IOP_PCIX_B_CBE4_N
7,24
IOP_PCIX_B_AD63
7,24
IOP_PCIX_B_AD61
7,24
IOP_PCIX_B_AD59
7,24
IOP_PCIX_B_AD57
7,24
IOP_PCIX_B_AD55
7,24
IOP_PCIX_B_AD53
7,24
IOP_PCIX_B_AD51
7,24
IOP_PCIX_B_AD49
7,24
IOP_PCIX_B_AD47
7,24
IOP_PCIX_B_AD45
7,24
IOP_PCIX_B_AD43
7,24
IOP_PCIX_B_AD41
7,24
IOP_PCIX_B_AD39
7,24
IOP_PCIX_B_AD37
7,24
IOP_PCIX_B_AD35
7,24
IOP_PCIX_B_AD33
7,24
NC_SLOT5_RSVD3
NC_SLOT5_RSVD4 NC_SLOT5_RSVD5
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94B94
IOP_PCIX_B_RST_SLOT5_N
IOP_PCIX_B_GNT0_N
SLOT5_PME_N
IOP_PCIX_B_AD30
IOP_PCIX_B_AD28 IOP_PCIX_B_AD26
IOP_PCIX_B_AD24
IOP_PCIX_B_SLOT5_IDSEL
IOP_PCIX_B_AD22 IOP_PCIX_B_AD20
IOP_PCIX_B_AD18 IOP_PCIX_B_AD16
IOP_PCIX_B_FRAME_N
IOP_PCIX_B_TRDY_N
IOP_PCIX_B_STOP_N
SLOT5_SDONE
SLOT5_SBO_N
IOP_PCIX_B_PAR
IOP_PCIX_B_AD15
IOP_PCIX_B_AD13 IOP_PCIX_B_AD11
IOP_PCIX_B_AD9
IOP_PCIX_B_CBE0_N
IOP_PCIX_B_AD6 IOP_PCIX_B_AD4
IOP_PCIX_B_AD2 IOP_PCIX_B_AD0
IOP_PCIX_B_REQ64_N
IOP_PCIX_B_CBE7_N IOP_PCIX_B_CBE5_N
IOP_PCIX_B_PAR64
IOP_PCIX_B_AD62
IOP_PCIX_B_AD60 IOP_PCIX_B_AD58
IOP_PCIX_B_AD56 IOP_PCIX_B_AD54
IOP_PCIX_B_AD52 IOP_PCIX_B_AD50
IOP_PCIX_B_AD48 IOP_PCIX_B_AD46
IOP_PCIX_B_AD44 IOP_PCIX_B_AD42
IOP_PCIX_B_AD40 IOP_PCIX_B_AD38
IOP_PCIX_B_AD36 IOP_PCIX_B_AD34
IOP_PCIX_B_AD32
NC_SLOT5_RSVD8
NC_SLOT5_RSVD9
7
7
7 7
7 7
7
7 7
7 7
7,24
7,24
7,24
24 24
7 7
7 7
7
7
7 7
7 7
7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24 7,24
7,24
R201
1 2
100-1%
IOP_PCIX_B_AD27
stub
7,24
25V-20%
1 2
.1uF
-12V
+5V_RSR
1
C5037
2
+5V_RSR
0.1uF 16V
1 2
C678
+3.3V_RSR
0.1uF 16V
1 2
+3.3V_RSR
0.1uF 16V
1 2
+3.3V_RSR
22uF 10V22uF 10V
1
2
C686
C546
C559
C562
0.1uF 16V
0.1uF 16V
1 2
C676
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
C547
C558
1 2
C679
0.1uF 16V
C557
0.1uF 16V
1 2
C675
0.1uF 16V 0.1uF 16V
1 2
1 2
0.1uF 16V
1 2
C550
C551
1 2
C687
0.1uF 16V
C556
0.1uF 16V
1 2
C677
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
C549
C552
1 2
C688
C555
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
C548
C553
1 2
C680
C554
IOP_PCIX_B_AD34
7,24
IOP_PCIX_B_AD35
7,24
IOP_PCIX_B_AD32
7,24
IOP_PCIX_B_AD33
7,24
IOP_PCIX_B_AD39
7,24
IOP_PCIX_B_AD38
7,24
IOP_PCIX_B_AD37
7,24
IOP_PCIX_B_AD36
7,24
IOP_PCIX_B_AD42
7,24
IOP_PCIX_B_AD43
7,24
IOP_PCIX_B_AD41
7,24
IOP_PCIX_B_AD40
7,24
IOP_PCIX_B_AD47
7,24
IOP_PCIX_B_AD46
7,24
IOP_PCIX_B_AD45
7,24
IOP_PCIX_B_AD44
7,24
IOP_PCIX_B_AD51
7,24
IOP_PCIX_B_AD50
7,24
IOP_PCIX_B_AD49
7,24
IOP_PCIX_B_AD48
7,24
IOP_PCIX_B_AD56
7,24
IOP_PCIX_B_AD54
7,24
IOP_PCIX_B_AD53
7,24
IOP_PCIX_B_AD52
7,24
IOP_PCIX_B_AD59
7,24
IOP_PCIX_B_AD58
7,24
IOP_PCIX_B_AD57
7,24
IOP_PCIX_B_AD55
7,24
IOP_PCIX_B_AD62
7,24
IOP_PCIX_B_PAR64
7,24
IOP_PCIX_B_AD61
7,24
IOP_PCIX_B_AD60
7,24
IOP_PCIX_B_CBE6_N
7,24
IOP_PCIX_B_CBE4_N
7,24
IOP_PCIX_B_CBE5_N
7,24
IOP_PCIX_B_AD63
7,24
IOP_PCIX_B_FRAME_N
7,24
IOP_PCIX_B_IRDY_N
7,24
IOP_PCIX_B_TRDY_N
7,24
IOP_PCIX_B_DEVSEL_N
7,24
IOP_PCIX_B_LOCK_N
7,24
IOP_PCIX_B_STOP_N
7,24
IOP_PCIX_B_PERR_N
7,24
IOP_PCIX_B_SERR_N
7,24
NC_RN56_P1 IOP_PCIX_B_ACK64_N
7,24
IOP_PCIX_B_REQ64_N
7,24
IOP_PCIX_B_CBE7_N
7,24
7,24
IOP_PCIX_B_SERR_N
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
NP
PCI_SLOT5_PRSNT2_N
24
.01uF 16V
.01uF 16V
1 2
C521
+3.3V_RSR
RN58
1 2 3 4
8.2K
1
RN54
2 3 4
8.2K
8 7 6 5
X
8 7 6 5
+3.3V_RSR
1 2
C520
X
1
RN53
2 3 4
8.2K
1
RN52
2 3 4
8.2K
1
RN51
2 3 4
8.2K
8 7 6 5
X
8 7 6 5
X
8 7 6 5
7,24
IOP_PCIX_B_M66EN
R170
1 2
.01uF 16V
1 2
4.7K
2
C5004
X
1
RN57
2 3 4
8.2K
8 7 6 5
CAP MUST BE MAX 0.25 IN FROM CONN PIN
CAP MUST BE MAX 0.1 IN FROM GND VIA
X
1
RN50
2 3 4
8.2K
1
RN49
2 3 4
8.2K
8 7 6 5
X
8 7 6 5
IOP_PCIX_B_PCIXCAP
7,24
C574
21
0.1uF 16V
X
1
RN48
2 3 4
8.2K
1
RN55
2 3 4
8.2K
1
RN47
2 3 4
8.2K
8 7 6 5
X
8 7 6 5
X
8 7 6 5
SLOT5_SBO_N
24
SLOT5_SDONE
24
R387
1 2
4.7K
R386
1 2
4.7K
+3.3V_AUX
3
X
1
RN56
2 3 4
8.2K
8 7 6 5
X
+3.3V_RSR
R460
NP
1 2
8.2K-5%
X
PCI 64-3.3V
SKT, GREEN
POWER_DRAW=P12V@0.5A POWER_DRAW=M12V@0.1A POWER_DRAW=P5V@5A POWER_DRAW=P3.3V@7.6A POWER_DRAW=P3.3VAUX@0.4A
+5V_RSR
+3.3V_RSR
+3.3V_AUX
+12V
-12V
10,11,15,21-23,29,36
6-18,21-23,28,29
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,23-3W,30-2W 31-3W,32-2T,33-3V,36-3W
4,5,7,19,21-23,28,29,33
11,19,21-23,28
4 4
INC.
TITLE
ROUND ROCK,TEXAS
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
REV.
A06-00
SHEET
24 OF 45
Page 25
B D
CA
SLOT6_P3V3
1 2
1 2
R359
4.7K
R426
1
CHASSIS SLOT 6
25
25
25,32,33
SLOT6_TMS
SLOT6_TDI
1
PCI EXPRESS SLOT
B lo
SLOT6_TCK
25
SLOT6_TRST_N
4.7K
R427
1 2
4.7K
R428
1 2
WAKE_N IS A GPI IN THE ICH
25
4.7K
SLOT6_P3V3
SLOT6_P12V
25,32,33
25,33
25,32,33
we can direct connect +12V to pin B3
stub
R680
25,33
SLOT6_P12V
1 2
0-5%
25 25
25
25,32,33
31
SLOT6_B3
PCI_SLOT6_SMCLK PCI_SLOT6_SMDATA
SLOT6_TRST_N SLOT6_P3V3_AUX SLOT6_WAKE_N
NC_RSVD_SLOT6_B12
EXP_B_DN_0P
4
EXP_B_DN_0N
4
2
B1
+12V_1
B2
+12V_2
B3
+12V_5
B4
GND_B4
B5
SMCLK
B6
SMDATA
B7
GND_B7
B8
+3.3V_1
B9
JTAG_TRST
B10
+3.3V_AUX
B11
WAKE
B12
RSVD_B12
B13
GND_B13
B14
PETP0
B15
PETN0
B16
GND_B16
B17
PRSNT2_X1
B18
GND_B18
PCI6
PRSNT1
+12V_3 +12V_4
GND_A4
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
+3.3V_2 +3.3V_3
PERST
GND_A12
REFCLK+
REFCLK-
GND_A15
PERP0 PERN0
GND_A18
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
SLOT6_TCK
SLOT6_TDI
NC_SLOT6_TDO
SLOT6_TMS
HP_SLOT6_PWRGD
CK_100M_SLOT6_P CK_100M_SLOT6_N
EXP_B_UP_0P EXP_B_UP_0N
Negative Transient Protection Diode
25 25
D750NP
12
SLOT6_P12V
25,33
PCI_SLOT6_SMCLK
25
PCI_SLOT6_SMDATA
25
X
25
32
4 4
4 4
MBRS130LT3
Dell P/N 09719
SLOT6_P3V3_AUX
R999
1 2
4.7K
R998
1 2
4.7K
2
SLOT6_PRSNT2_N
25,32
Place cap at slot
+-SWPD
21
C475
0.1uF 16V
4 4
4 4
4 4
SLOT6_PRSNT2_N
25,32
EXP_B_DN_1P EXP_B_DN_1N
EXP_B_DN_2P EXP_B_DN_2N
EXP_B_DN_3P EXP_B_DN_3N
NC_RSVD_SLOT6_B30
NC_PCI_SLOT6_B33 NC_PCI_SLOT6_B34
NC_PCI_SLOT6_B37 NC_PCI_SLOT6_B38
NC_PCI_SLOT6_B41 NC_PCI_SLOT6_B42
NC_PCI_SLOT6_B45 NC_PCI_SLOT6_B46
B19
PETP1
B20
PETN1
B21
GND_B21
B22
GND_B22
B23
PETP2
B24
PETN2
B25
GND_B25
B26
GND_B26
B27
PETP3
B28
PETN3
B29
GND_B29
B30
RSVD_B30
B31
PRSNT2_X4
B32
GND_B32
B33
PETP4
B34
PETN4
B35
GND_B35
B36
GND_B36
B37
PETP5
B38
PETN5
B39
GND_B39
B40
GND_B40
B41
PETP6
B42
PETN6
B43
GND_B43
B44
GND_B44
B45
PETP7
B46
PETN7
B47
GND_B47
B48
PRSNT2_X8
B49
GND_B49
RSVD_A19
GND_A20
PERP1
PERN1 GND_A23 GND_A24
PERP2
PERN2 GND_A27 GND_A28
PERP3
PERN3 GND_A31
RSVD_A32
RSVD_A33
GND_A34
PERP4
PERN4 GND_A37 GND_A38
PERP5
PERN5 GND_A41 GND_A42
PERP6
PERN6 GND_A45 GND_A46
PERP7
PERN7 GND_A49
A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
NC_RSVD_SLOT6_A19
EXP_B_UP_1P EXP_B_UP_1N
EXP_B_UP_2P EXP_B_UP_2N
EXP_B_UP_3P EXP_B_UP_3N
NC_RSVD_SLOT6_A32
NC_RSVD_SLOT6_A33
NC_PCI_SLOT6_A35 NC_PCI_SLOT6_A36
NC_PCI_SLOT6_A39 NC_PCI_SLOT6_A40
NC_PCI_SLOT6_A43 NC_PCI_SLOT6_A44
NC_PCI_SLOT6_A47 NC_PCI_SLOT6_A48
4 4
4 4
4 4
SLOT6_P12V
25,33
PCI-E X8 CONNECTOR
3
POWER_DRAW=P12V@2.1A POWER_DRAW=P3.3V@3A POWER_DRAW=P3.3VAUX@0.4A
PCI-E SPECIFICATION 1.1
EXP_DN IS MCH TX
C46
12
10uF
16V 10%
C235
C233
2 1
1
2
10uF
16V 10%
22uF 10V
C230
SLOT6_P3V3
21
C199
.1uF
1 2
C229
25V-20%
25,32,33
0.1uF 16V
1 2
C200
.1uF
25V-20%
21
21
C228
C247
0.1uF 16V
1 2
.1uF
25V-20%
1000pF
C231
1 2
50V-10%
3
.1uF
25V-20%
DN (MCH TX) CONNECTS TO SLOT TX DN (MCH TX) CONNECTS TO PXH, IOP RX
EXP_UP IS MCH RX
21
C624
4.7uF
6.3V-10%
SLOT6_P3V3_AUX
25,32,33
UP (MCH RX) CONNECTS TO SLOT RX UP (MCH RX) CONNECTS TO PXH, IOP TX
4 4
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
DC
INC.
ROUND ROCK,TEXAS
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
25 OF 45
Page 26
B D
PRSNT1 GND ties thru card to PRSNT2 PIN to tell board that card is plugged in all the way PRSNT1, PRSNT2 Pins short on card for first break, last mate.
CA
26,32,33
SLOT7_P3V3
PE (HS) = PCI Express (High Speed) T (O) = Transmitter (Output)
R429
R (I) = Receiver (Input)
26
SLOT7_TMS
SLOT7_TDI
1 2
4.7K
R430
1 2
1
1
26
4.7K
R431
1 2
4.7K
R432
1 2
4.7K
CHASSIS SLOT 7
PCI EXPRESS SLOT
C
SLOT7_P3V3
SLOT7_P12V
26,32,33
26,33
SLOT7_TCK
26
SLOT7_TRST_N
26
Negative Transient Protection Diode
we can direct connect +12V to pin B3
R681
26,33
SLOT7_P12V
1 2
0-5%
2
SLOT7_B3
PCI_SLOT7_SMCLK
26
PCI_SLOT7_SMDATA
26
SLOT7_TRST_N
26
26,32,33
SLOT7_P3V3_AUX SLOT7_WAKE_N
31
4 4
stub
NC_SLOT7_RSVD_B12
EXP_C_DN_0P EXP_C_DN_0N
B1
+12V_1
B2
+12V_2
B3
+12V_5
B4
GND_B4
B5
SMCLK
B6
SMDATA
B7
GND_B7
B8
+3.3V_1
B9
JTAG_TRST
B10
+3.3V_AUX
B11
WAKE
B12
RSVD_B12
B13
GND_B13
B14
PETP0
B15
PETN0
B16
GND_B16
B17
PRSNT2_X1
B18
GND_B18
PCI7
PRSNT1
+12V_3 +12V_4
GND_A4
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
+3.3V_2 +3.3V_3
PERST
GND_A12
REFCLK+
REFCLK-
GND_A15
PERP0 PERN0
GND_A18
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
SLOT7_TCK
SLOT7_TDI
NC_SLOT7_TDO
SLOT7_TMS
HP_SLOT7_PWRGD
CK_100M_SLOT7_P CK_100M_SLOT7_N
EXP_C_UP_0P EXP_C_UP_0N
D751NP
12
SLOT7_P12V
26,33
X
MBRS130LT3
26 26
26
32
4 4
4 4
Dell P/N 09719
PCI_SLOT7_SMCLK
26
PCI_SLOT7_SMDATA
26
26,32,33
SLOT7_P3V3_AUX
R997
1 2
4.7K
R996
1 2
4.7K
2
EXP_C_DN_1P
4
EXP_C_DN_1N
4
EXP_C_DN_2P
4
EXP_C_DN_2N
4
EXP_C_DN_3P
4
EXP_C_DN_3N
4
26,32
3
SLOT7_PRSNT2_N
C476
1 2
0.1uF 16V
cap is by slot
26,32
EXP_C_DN_4P
4
EXP_C_DN_4N
4
EXP_C_DN_5P
4
EXP_C_DN_5N
4
EXP_C_DN_6P
4
EXP_C_DN_6N
4
EXP_C_DN_7P
4
EXP_C_DN_7N
4
SLOT7_PRSNT2_N
NC_RSVD_SLOT7_B30
B19
PETP1
B20
PETN1
B21
GND_B21
B22
GND_B22
B23
PETP2
B24
PETN2
B25
GND_B25
B26
GND_B26
B27
PETP3
B28
PETN3
B29
GND_B29
B30
RSVD_B30
B31
PRSNT2_X4
B32
GND_B32
B33
PETP4
B34
PETN4
B35
GND_B35
B36
GND_B36
B37
PETP5
B38
PETN5
B39
GND_B39
B40
GND_B40
B41
PETP6
B42
PETN6
B43
GND_B43
B44
GND_B44
B45
PETP7
B46
PETN7
B47
GND_B47
B48
PRSNT2_X8
B49
GND_B49
RSVD_A19
GND_A20
PERP1
PERN1 GND_A23 GND_A24
PERP2
PERN2 GND_A27 GND_A28
PERP3
PERN3 GND_A31
RSVD_A32
RSVD_A33
GND_A34
PERP4
PERN4 GND_A37 GND_A38
PERP5
PERN5 GND_A41 GND_A42
PERP6
PERN6 GND_A45 GND_A46
PERP7
PERN7 GND_A49
A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
NC_PCI_SLOT7_A19
EXP_C_UP_1P EXP_C_UP_1N
EXP_C_UP_2P EXP_C_UP_2N
EXP_C_UP_3P EXP_C_UP_3N
NC_RSVD_SLOT7_A32
NC_RSVD_SLOT7_A33
EXP_C_UP_4P EXP_C_UP_4N
EXP_C_UP_5P EXP_C_UP_5N
EXP_C_UP_6P EXP_C_UP_6N
EXP_C_UP_7P EXP_C_UP_7N
4 4
4 4
4 4
gnd A33 with a 1 kohm to tell the card the slot is 75 W capable
4 4
4 4
4 4
4 4
C55
12
10uF
16V 10%
C248
C234
2 1
2
1
10uF
16V 10%
SLOT7_P3V3
22uF 10V
21
C203
C201
SLOT7_P12V
.1uF
1 2
C204
25V-20%
26,32,33
0.1uF 16V
1 2
C88
26,33
.1uF
21
C232
25V-20%
0.1uF 16V
21
C566
1 2
.1uF
25V-20%
1000pF
C202
1 2
50V-10%
.1uF
25V-20%
3
EXP_DN IS MCH TX DN (MCH TX) CONNECTS TO SLOT TX DN (MCH TX) CONNECTS TO PXH, IOP RX
EXP_UP IS MCH RX
POWER_DRAW=P12V@2.1A POWER_DRAW=P3.3V@3A POWER_DRAW=P3.3VAUX@0.4A
PCI-E X8 CONNECTOR
PCI-E SPECIFICATION 1.1
21
C625
4.7uF
6.3V-10%
SLOT7_P3V3_AUX
26,32,33
UP (MCH RX) CONNECTS TO SLOT RX UP (MCH RX) CONNECTS TO PXH, IOP TX
4 4
INC.
TITLE
ROUND ROCK,TEXAS
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
26 OF 45
Page 27
B D
CA
NP
PCIX_DBG1
Debug Connectors
clk1 a1.7
a1.0 a0.7
a0.0
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
IOP_PCIX_A_AD13
IOP_PCIX_A_AD5 IOP_PCIX_A_AD1 IOP_PCIX_A_AD0 IOP_PCIX_A_AD2 IOP_PCIX_A_AD9
IOP_PCIX_A_AD10
IOP_PCIX_A_PERR_N
IOP_PCIX_A_TRDY_N
IOP_PCIX_A_AD12 IOP_PCIX_A_AD17 IOP_PCIX_A_AD21
IOP_PCIX_A_AD8 IOP_PCIX_A_AD29 IOP_PCIX_A_AD31 IOP_PCIX_A_AD30
7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13
1
1 3
1
5 7
9 11 13 15 17 19 21 23 25 27 29 31
X
33 35 37
39 40 41 42 43
SUB1=SUB*_5J738
clk0 a3.7
a3.0 a2.7
a2.0
GND
2x19
RECEPTACLE
TX is UP, RX is DN
EXP_A_UP_7N
4,18
EXP_A_UP_7P
4,18
EXP_A_UP_6N
4,18
EXP_A_UP_6P
4,18
EXP_A_UP_1N
4,8
EXP_A_UP_1P
4,8
EXP_A_UP_0N
4,8
EXP_A_UP_0P
4,8
EXP_A_DN_3N
4,8
EXP_A_DN_3P
4,8
EXP_A_DN_0N
4,8
EXP_A_DN_0P
4,8
NP
4
C1P_DA
6
C1N_DA
10
C3P_DA
12
C3N_DA
16
C5P_DA
18
C5N_DA
22
C7P_DA
24
C7N_DA
28
C1P_DB
30
C1N_DB
34
C3P_DB
36
C3N_DB
PCIE_LAI
C0P_DA C0N_DA
C2P_DA C2N_DA
C4P_DA C4N_DA
C6P_DA C6N_DA
C0P_DB C0N_DB
C2P_DB C2N_DB
1 3
7 9
13 15
19 21
25 27
31 33
EXP_A_UP_4P EXP_A_UP_4N
EXP_A_UP_3N EXP_A_UP_3P
EXP_A_UP_5P EXP_A_UP_5N
EXP_A_UP_2P EXP_A_UP_2N
EXP_A_DN_2N EXP_A_DN_2P
EXP_A_DN_1P EXP_A_DN_1N
4,18 4,18
4,8 4,8
4,18 4,18
4,8 4,8
4,8 4,8
4,8 4,8
IOP_PCIX_A_AD53
7,13
IOP_PCIX_A_AD55
7,13
IOP_PCIX_A_AD54
7,13
IOP_PCIX_A_AD56
7,13
IOP_PCIX_A_AD57
7,13
IOP_PCIX_A_AD59
7,13
IOP_PCIX_A_AD58
7,13
IOP_PCIX_A_AD60
7,13
IOP_PCIX_A_AD62
7,13
IOP_PCIX_A_AD61
7,13
IOP_PCIX_A_AD63
7,13
SCSI_INTA_N
8,13
IOP_PCIX_A_CBE5_N
7,13
IOP_PCIX_A_CBE6_N
7,13
IOP_PCIX_A_CBE4_N
7,13
IOP_PCIX_A_CBE1_N
7,13
NC_PCIX_DBG1_P37 NC_PCIX_DBG1_P38
GND_5
37 39
43 45
5 11
EXP_A_DN_4N EXP_A_DN_4P
EXP_A_DN_7P EXP_A_DN_7N
4,16 4,16
4,16 4,16
Mictor Debug Headers
4,16 4,16
4,16 4,16
EXP_A_DN_6N EXP_A_DN_6P
EXP_A_DN_5N EXP_A_DN_5P
40
C5P_DB
42
C5N_DB
46
C7P_DB
48
C7N_DB
2
GND_2
8
GND_8
14 17
X
GND_14 GND_17
20 23
GND_20 GND_23
C4P_DB C4N_DB
C6P_DB C6N_DB
GND_11
2
2
NP
26 29
GND_26 GND_29
32 35
GND_32 GND_35
38 41
GND_38 GND_41
44 47
GND_44 GND_47
MH1
MH1
MH2
MH2
PCI - EXPRESS LAI
J1
1 3
2 4
CK_100M_EXP_SPARE_P CK_100M_EXP_SPARE_N
X
MH3 MH4
MH3 MH4
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37
PCIX_DBG2
clk1clk0 a1.7a3.7
a3.0 a2.7
a2.0 a0.0
a1.0 a0.7
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
CK_IOP_PCIX_A_DBG
NC_PCIX_DBG2_P8
NC_PCIX_DBG2_P10
IOP_PCIX_A_AD22
NC_PCIX_DBG2_P14
IOP_PCIX_A_AD18
NC_PCIX_DBG2_P18
IOP_PCIX_A_AD19
NC_PCIX_DBG2_P22
IOP_PCIX_A_AD16
NC_PCIX_DBG2_P26
IOP_PCIX_A_IRDY_N
NC_PCIX_DBG2_P30
IOP_PCIX_A_DEVSEL_N
NC_PCIX_DBG2_P34
IOP_PCIX_A_FRAME_N
IOP_PCIX_A_CBE2_N
7
7,13
7,13
7,13
7,13
7,13
7,13
7,13 7,13
NP
IOP_PCIX_A_GNT0_N
7,13
IOP_PCIX_A_AD26
7,13
IOP_PCIX_A_AD27
7,13
IOP_PCIX_A_AD24
7,13
IOP_PCIX_A_AD25
7,13
IOP_PCIX_A_AD23
7,13
IOP_PCIX_A_AD20
7,13
IOP_PCIX_A_AD28
7,13
IOP_PCIX_A_STOP_N
7,13
IOP_PCIX_A_SERR_N
7,13
IOP_PCIX_A_AD6
7,13
IOP_PCIX_A_AD7
7,13
IOP_PCIX_A_AD4
7,13
IOP_PCIX_A_AD3
4 4
7,13
IOP_PCIX_A_CBE3_N
7,13
IOP_PCIX_A_PAR
7,13
IOP_PCIX_A_CBE0_N
7,13
X
39 40 41 42 43
GND
3
3
2x19
RECEPTACLE
PCIX_DBG3
1 3 5
clk0
7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37
a3.7
a3.0 a2.7
a2.0
clk1 a1.7
a1.0 a0.7
a0.0
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
IOP_PCIX_A_AD32 IOP_PCIX_A_AD41 IOP_PCIX_A_AD40 IOP_PCIX_A_AD49 IOP_PCIX_A_AD48 IOP_PCIX_A_AD50 IOP_PCIX_A_AD52 IOP_PCIX_A_AD51 IOP_PCIX_A_AD11
IOP_PCIX_A_PAR64
IOP_PCIX_A_ACK64_N
NC_PCIX_DBG3_P28
IOP_PCIX_A_REQ0_N
IOP_PCIX_A_REQ64_N
IOP_PCIX_A_AD15 IOP_PCIX_A_AD14
7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13 7,13
7,13 7,13 7,13 7,13
SCSI_INTB_N
8,13
IOP_PCIX_A_RST_N
7,13
IOP_PCIX_A_AD35
7,13
IOP_PCIX_A_AD42
7,13
IOP_PCIX_A_AD38
7,13
IOP_PCIX_A_AD33
7,13
IOP_PCIX_A_AD39
7,13
IOP_PCIX_A_AD37
7,13
IOP_PCIX_A_AD46
7,13
IOP_PCIX_A_AD47
7,13
IOP_PCIX_A_AD43
7,13
IOP_PCIX_A_AD45
7,13
IOP_PCIX_A_AD44
7,13
IOP_PCIX_A_CBE7_N
7,13
IOP_PCIX_A_AD34
7,13
IOP_PCIX_A_AD36
7,13
SUB1=SUB*_5J738
NP
X
NC_PCIX_DBG3_P37 NC_PCIX_DBG3_P38
39 40 41 42
GND
4 4
43
SUB1=SUB*_5J738
2x19
RECEPTACLE
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM, RSR, PE2800, SV
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
27 OF 45
DC
A B
Page 28
B D
Linear Regulators, Invertor
CA
1
1
LINEAR +1.35V
2.5VR
1.35V GENERATION, at 1.5A
TOP VIEW
PINOUT
PKG TYPE
TO-263-3L
1
4
2=4
3
2
DPN: 3D853
+2.5VAUX out, +3.3VAUX in +2.5V out, +3.3V in
+3.3V_AUX
+3.3V_RSR
Dobson min spec for +1.35V = 1.282V
+3.3V_RSR
165 uA output
+1.3V
R196
220
220
R400
1.2 mA output
3
IN
1
ADJ
LT1086CM ADJ.
U_1P35V
OUT
2
TAB
4
21
R285
1 2
1.13K-1%
1P35V_TRIM
stub
+
10V-20%
47uF
1
C269
2
R373
90.9-1% C493
2 1
0.1uF 16V
2
21
1
TL431ACD
2
220 Ohm 5% (needs 1mA to operate)
V_2P5V_AUX_REF
VOLTAGE=2.5
D6
2367
8
NP
C565
X
21
12
2.495 +- 0.025V
C76
10uF
16V 10%
1 2
100pF
50V-10%
1
TL431ACD
7 6 3 2
21
220 Ohm 5% (needs 1mA to operate)
V_2P5V_REF
VOLTAGE=2.5
D11
8
C567
1 2
8,17
2.495 +- 0.025V
21
C79
10uF
16V 10%
100pF
50V-10%
C117
2
C504
1
10uF 6.3V
R293
100pF
1 2
50V-10%
90.9-1%
1 2
2.495 +/- 25 mV
IN, K (Cathode)
OUT, REFERENCE
1 2 3 4 5
GND, A (Anode)
TL431
K A A
REF 10 mA
NC NC
IN 2.5 TO 37V
IN 1 TO 100 mA
2.495 +/- 25 mV
SO-8
2.495V
0.81W
REF
8 7
A
6
A
5U needs .002A, .005W
INVERTER TO GENERATE -12V
-12V
ROOM = VR_1P35V
PUT LOTS OF COPPER UNDER PART TO COOL IT.
-12V
ALL DECOUPLING CAPS NEED TO BE RIGHT AT THE REGULATOR PINS
+12V
U_M12V
1
ON/OFF
3
3
C42
21
+
100uF
16V-20%
C54
1 2
.01uF 16V
16V-20%
100uF
+
2
VIN
3
GND
4
VOUT
C44
NC_M12V_TRIM
21
5
OUTTRIM
-12 V, MOD.
7 pin, HORIZONTAL
1A -12V VRM
ROOM=INVERTER
+12V
16V-20%
100uF
+
C43
21
-12V Invertor Decoupling Guidelines
Output V Input Caps Output Caps
-12V 270 uF, 16V Oscon 100 uF Al, 7E541
+3.3V_RSR
+1.3V
+12V
-12V
6-18,21-24,29
RATSNEST_SCHEDULE=MIN_TREE VOLTAGE=1.3
9
4,5,7,19,21-24,29,33
RATSNEST_SCHEDULE=MIN_TREE VOLTAGE=-12
11,19,21-24
0.1uF 16V
1 2
C13
16V-20%
100uF
+
C41
21
1A INVERTER TO GENERATE -12V
Input Caps can be equivalent ESR. MBZ type, AL-E caps or POSCAPS Output Caps can be equivalent. MBZ type, AL-E caps or POSCAPS
4 4
Output caps also 2x 4.7 uF X7R or NPO, and 1 0.01 uF X7R or NPO All caps as close to the convertor as possible
5U needs 500 mA, 6W
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2-24-2005_11:44
TITLE
DWG NO.
DATE
DC
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
28 OF 45
Page 29
B D
CA
should I use gnd sense on 100W DC2DCs?
40W DC-DC
100W DC-DC
DC2DCs
+12V
+1.5V out, +12V in
3.3V out, +12V in, 25A max
+12V
1
16V-20%
270uF
+
C506
2
+12V
1
R252
8.2K-5%
1 2
stub
1P5V_TRIM
1P5V_EN
36
1P5V_DC2DC_PWRGOOD
36
+12V
21
R260
3.3K-5%
2
R539
1
5V
1.8V 1.96k, 1%
301, 1% 562, 1%3.3V 909, 1% (DELL P/N 0P887)2.5V
1.5V 3.92k, 1%
23.7k, 1%1.25V Open1.2V
2
+1.5V
stub
I_U_1P5V_P9
2
R494
3.92K-1% 1
26.1K-1%
5V
3.3V
2.5V
1.8V 11.8k, 1%
0 ohm
1.78k, 1%
4.22k, 1%
1.5V 26.1k, 1%
1.25V 169k
1.2V
Open
U_1P5V
1
VCC_1
2
VCC_2
3
VCC_3
4
TRIM
5
OUTEN
6
PWRGD
7
VSS_7
8
VSS_8
9
PWRGD_SET
10
12VIN_10
11
12VIN_11
40W-15A DC-DC
MOD.-13 pin, HORIZONTAL
26.1k
2P688
4V-20%
820uF
C499
16V-10%
+
21
4.7uF
1 2
C513
0.1uF 16V
12
C495
40 W DC2DC Decoupling Guidelines
Output V Input Caps Output Caps 5V 270 uF, 16V Oscon 680 uF 6.3V SP Oscon
3.3V 270 uF, 16V Oscon 820 uF 4V SP Oscon
2.5V 270 uF, 16V Oscon 820 uF 4V SP Oscon
1.8V 270 uF, 16V Oscon 820 uF 4V SP Oscon
1.5V 270 uF, 16V Oscon 820 uF 4V SP Oscon
1.25V 270 uF, 16V Oscon 820 uF 4V SP Oscon
1.2V 270 uF, 16V Oscon 820 uF 4V SP Oscon Input Caps can be equivalent ESR. MBZ type, AL-E caps or POSCAPS Output Caps can be equivalent. MBZ type, AL-E caps or POSCAPS Output caps also 2x 4.7 uF X7R or NPO, and 1 0.01 uF X7R or NPO All caps as close to the convertor as possible
40 W Trim Resistors
Vout Trim 5V
3.3V 562, 1%
2.5V
1.8V 1.96k, 1%
1.5V 3.92k, 1%
1.25V 23.7k, 1%
1.2V
Trim between pins 4 & 7
301, 1%
909, 1% (DELL P/N 0P887)
Open
Vout PwrGdSset
5V
3.3V
2.5V 4.22k, 1%
1.8V 11.8k, 1%
1.25V 169k
1.2V Open
PwrGdSet between pins 9 & 7
0 ohm
1.78k, 1%
SUPPLY RAMP PROTECTION DIODE
+1.5V
D2
12
MBRS130LT3
Intel uses MBRA130LT3
Dell P/N 09719
+3.3V_RSR
GND
3
MAX809
RESET# VCC
21
12,36
16V-20%
3P3V_RISER_PWRGOOD
+12V
1
270uF
+
C509
2
R366
NP
1 2
0-5%
R276
1 2
X
21
R291
8.2K-5%
PU_3P3V_DC2DC_PWRGD
+3.3V_RSR
3.3K-5%
stub
32,36
stub
3P3V_EN
R286
0-5%
Vout PwrGdSset 5V 0 ohm 1% 5V 0 ohm 1%
3.3V 21.5 kohm 1% 3.3V 10 kohm 1%
2.5V 47.5 kohm 1%
PwrGdSet between pins 5 & 3
R223
1 2
21.5K-1% 10K-1%
stub
NC_DC2DC_3P3V_6
stub
stub
21
I_U3P3V_SENSE_P
C502
+3.3V_RSR
1 2
NP
Vout Rset
2.5V open Rset between pins 1 & 3
R51
I_U3P3V_P5
1000pF
50V-10%
21
I_U3P3V_P3
+12V
I_U3P3V_P1
stub
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
MOD.-25 pin, HORIZONTAL
U_3P3V
1
+RS
K
3
-RS
4
PWRGD
5
PWRGD_SET
6
RESERVED
7
VSS_7
8
VSS_8
9
OUTEN
-SENSE +SENSE 12VIN_12 12VIN_13 12VIN_14 VCC_15 VCC_16 VSS_17 VCC_18 VSS_19 VCC_20 VSS_21 VCC_22 VSS_23 VCC_24
100W-25A DC-DC
ROOM=DC_3P3V
+3.3V_RSR
16V-10%
4.7uF
4V-20%
820uF
1
21
+
C514
21
.01uF 16V
C518
12
C501
16V-10%
C515
4.7uF
21
+3.3V_RSR
1 2
C500
+
4V-20%
820uF
7P006
2
5U needs 10.8 A, 16.5W
5U needs 28.8 A, 86.4 W
ALL DECOUPLING CAPS NEED TO BE RIGHT AT THE REGULATOR PINS
4.50 to 4.75 V
40W DC-DC
PARTS ON PAGES 12,29,32
6315-46
809L 29496
+1.8V out, +12V in
+12V
+1.8V
+12V
16V-20%
3
270uF
12,36
1
+
C505
2
1P8V_PWRGOOD
36
301, 1%
1P8V_EN
1 2
stub
R273
0-5%
5V
301, 1%
3.3V 562, 1%
2.5V
909, 1% (DELL P/N 0P887)
R251
1 2
21
R259
8.2K-5%
1P8V_TRIM
3.3K-5%
R52
1
2
4
stub
+12V
1.96K-1%
I_U1P8V_P6
R294
11.8K-1%
21
stub
I_U1P8V_P9
U_1P8V
1
VCC_1
2
VCC_2
3
VCC_3
4
TRIM
5
OUTEN
6
PWRGD
7
VSS_7
8
VSS_8
9
PWRGD_SET
10
12VIN_10
11
12VIN_11
40W-15A DC-DC
MOD.-13 pin, HORIZONTAL
2P688
4V-20%
820uF
C498
16V-10%
1 2
+
4.7uF 21
C512
0.1uF 16V
2 1
C494
1.8V 1.96k, 1%
1.5V 3.92k, 1%
1.25V
23.7k, 1%
1.2V Open
5V
0 ohm
3.3V
1.78k, 1%
2.5V 4.22k, 1%
1.8V 11.8k, 1%
1.25V 169k
1.2V Open
1810-5 1810-10 1810-15 1811-5 1F826
6315-44
1811-10
1812-5 9E247
809M 29227 811M
1813-10 7K863 1812-10
6315-41
1811-15
809J 0587P
1812-15
1813-15 6315-31
809T 4F520
1815-5 1816-5 1817-5 1818-5
6315-29
809S 2218D
1815-10 D2948 1816-10 1817-10
6315-26 1815-20
1817-20
1811 1816
1818-10 16YNY
809R 4146R
1816-20 811R 1818-20
1813 1818
809Z 6M693
803 809
1811 1810 1812
1816 1815 1817811
All 181x 100 to 300 msec
5U needs 12.1A, 22W, 80%
1813
1818 812811
push-button manual reset input
MAX AVAILABLE 15 Amps, 27W
816 ADJ
ROOM = VRM_1P8
1813
MCP130-475
811L
4.50
1813-5
4.25 4.49
4.00 4.13 4.24
811T
2.98 3.06 3.15
811S
2.80
2.47 2.55 2.64
Internal Pullup
3.5k to 7.5k
1818
4.62
-5%
4.39
-10% 4V
-15%
-5%
2.93V
2.88
-10%
2.63
-20%
2.32
OD TP_N
Totem-pole
4.75
2.97
K L M N P
R S T Z
4.80V
4.68V
4.43V
4.58V
4.13V
2.63V
2.93V
3.08V
2.32V
100 W DC2DC Decoupling Guidelines
Output V Input Caps Output Caps 5V 270 uF, 16V Oscon 2x 680 uF 6.3V SP Oscons
3.3V 270 uF, 16V Oscon 2x 820 uF 4V SP Oscons
2.5V 270 uF, 16V Oscon 2x 820 uF 4V SP Oscons Input Caps can be equivalent ESR. MBZ type, AL-E caps or POSCAPS
Output Caps can be equivalent. MBZ type, AL-E caps or POSCAPS Output caps also 2x 4.7 uF X7R or NPO, and 1 0.1 uF X7R or NPO All caps as close to the convertor as possible
100 W Trim Resistors
Vout PwrGdSset 5V 0 ohm 1%
3.3V 21.5 kohm 1%
2.5V 47.5 kohm 1%
PwrGdSet between pins 5 & 3
15 W DC2DC Decoupling Guidelines
Output V Input Caps Output Caps 5V 270 uF, 16V Oscon 680 uF 6.3V SP Oscon
3.3V 270 uF, 16V Oscon 680 uF 4V SP Oscon
2.5V 270 uF, 16V Oscon 680 uF 4V SP Oscon
1.8V 270 uF, 16V Oscon 680 uF 4V SP Oscon
1.5V 270 uF, 16V Oscon 680 uF 4V SP Oscon
1.25V 270 uF, 16V Oscon 680 uF 4V SP Oscon
1.2V 270 uF, 16V Oscon 680 uF 4V SP Oscon Input Caps can be equivalent ESR. MBZ type, AL-E caps or POSCAPS Output Caps can be equivalent. MBZ type, AL-E caps or POSCAPS Output caps also 2x 4.7 uF X7R or NPO, and 1 0.01 uF X7R or NPO All caps as close to the convertor as possible
0.1uF 16V
2 1
C597
+5V_RSR
MAX809L
3
VCC
RESET
GND
1
U44
Vout Rset 5V 0 ohm 1%
3.3V 10 kohm 1%
2.5V open Rset between pins 1 & 3
100W DC-DC
2
5V_RISER_PWRGOOD
29,36
5V out, +12V in, 20A max
Vout Rset 5V 0 ohm 1%
3.3V 10 kohm 1%
2.5V open Rset between pins 1 & 3
Rset
R288
1 2
I_U5V_P3
I_U5V_P5
I_U_5V_SENSE_P
50V-10%
+12V
I_U5V_P1
U_5V
1
+RS
K
3
-RS
4
PWRGD
5
PWRGD_SET
6
RESERVED
7
VSS_7
8
VSS_8
9
OUTEN
10
-SENSE
11
+SENSE
12
12VIN_12
13
12VIN_13
14
12VIN_14
15
VCC_15
16
VCC_16
17
VSS_17
18
VCC_18
19
VSS_19
20
VCC_20
21
VSS_21
22
VCC_22
23
VSS_23
24
VCC_24
100W-25A DC-DC
MOD.-25 pin, HORIZONTAL
7P006
+5V_RSR
16V-10%
4.7uF
+5V_RSR
C497
21
C516
16V-10%
4.7uF 21
C517
.01uF 16V
C519
12
3
12
+
680uF
6.3V-20%
C496
12
+
680uF
6.3V-20%
R254
21
100K
R367
NP
29,36
16V-20%
270uF
5V_RISER_PWRGOOD
+12V
1
+
C508
2
1 2
0-5%
X
+12V
R277
1 2
21
R292
Vout PwrGdSset 5V 0 ohm 1%
3.3V 21.5 kohm 1%
2.5V 47.5 kohm 1%
PwrGdSet between pins 5 & 3
8.2K-5%
PU_5V_DC2DC_PWRGD
3.3K-5%
+5V_RSR
stub
36
stub
5V_EN
R289
1 2
0-5%
R290
21
0-5% 0-5%
stub
NC_DC2DC_5V_6
stub
21
C503
1000pF
NP
+5V_RSR
ROOM=DC_5V
5U needs 15 A, 75 W
+5V_RSR
15 W Trim Resistors
Vout Trim
301, 1%
5V
562, 1%3.3V 909, 1% (DELL P/N 0P887)
2.5V
1.96k, 1%1.8V
3.92k, 1%1.5V
23.7k, 1%1.25V Open
4 4
Trim between pins 4 & 7
1.2V
+3.3V_RSR
+1.5V
+1.8V
+12V
RATSNEST_SCHEDULE=MIN_TREE VOLTAGE=5
10,11,15,21-24,36
RATSNEST_SCHEDULE=MIN_TREE VOLTAGE=3.3
6-18,21-24,28
RATSNEST_SCHEDULE=MIN_TREE
VOLTAGE=1.5
8,9,17,18
RATSNEST_SCHEDULE=MIN_TREE
VOLTAGE=1.8
9,11,12,14
4,5,7,19,21-24,28,33
INC.
ROUND ROCK,TEXAS
2-24-2005_11:44
TITLE
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
REV.
A06-00
SHEET
29 OF 45
Page 30
B D
CA
LM75 Thermal Sensor
+3.3V_AUX
+3.3V_AUX
0.1uF 16V
1 2
C541
FRU Information SEEPROM
by U_TEMP1
+3.3V_AUX
0.1uF 16V
1 2
C93
LM75 I2C ADDR: 92
NP
R62
X
NP
1 2
R125
0-5%
1
R124
NP
I2C_SEG3_VAUX_SDA
4,30
I2C_SEG3_VAUX_SCL
4,30
1 2
0-5%
NC_LIOM_I2C_ALERT1_N
X
NP
8.2K-5%
stub
21
X
21
R61
X
8.2K-5%
stub
RISER_TEMP1_SDA
RISER_TEMP1_SCL
NP01
1
SDA
2
SCL
3
OS
4
GND
subbed to 3.3v flavor
U_TEMP1
LM75AD
+3.3V_AUX
8
VCC
7
6
5
PU_TEMP1_A0
PU_TEMP1_A1
PU_TEMP1_A2
A0
A1
A2
X
4.7K
NP
220
1 2
1 2
R331
stub
R376
NP
4.7K 220
X
21
R380
stub
R330
NP
4.7K
X
220
1 2
R418
R332
+3.3V_AUX
+3.3V_AUX
+3.3V_AUX
1
4.7K
stub
220
R284
21
PU_FRU_A0
R282
21
PD_FRU_A1
220
21
PD_FRU_A2
R283
U_FRU
2 7
A1 WC
3 6
A2 SCL
4
GND
VCCA0
SDA
24C02
NP
21
81
PD_U_FRU_P7
FRU_SCL
5
220
FRU_SDA
1 2
R127
R63
X
NP
8.2K-5%
stub
stub
R64
X
1 2
8.2K-5%
R280
0-5%
21
R279
1 2
0-5%
I2C_SEG3_VAUX_SCL
I2C_SEG3_VAUX_SDA
4,30
4,30
FRU I2C ADDR: A2
X
21
21
At BOTTOM of brd, between PCI Slot 1 and PCI Slot 2
SUB*_N4804
ROOM = TEMP_MONITOR
ROOM = FRU_MONITOR
+3.3V_AUX
LM75 Thermal Sensor
0.1uF 16V
+3.3V_AUX
LM75 I2C ADDR: 92
8.2K-5%
X
NP
R193
X
1 2
8.2K-5%
stub
RISER_TEMP2_SDA
RISER_TEMP2_SCL
NP01
+3.3V_AUX
U_TEMP2
1
SDA
2
SCL
3
OS
VCC
A0
A1
8
7
6
PU_TEMP2_A0
PU_TEMP2_A1
4.7K
21
NP
21
2
R192
X
I2C_SEG3_VAUX_SDA
4,30
I2C_SEG3_VAUX_SCL
4,30
NP
R229
0-5%
21
X
NP
1 2
NC_LIOM_I2C_ALERT2_N
stub
R230
0-5%
21
R378
stub
C64
NP
X
by U_TEMP2
1 2
R419
stub
NP
4.7K
X
21
R420
stub
INTRUSION SWITCH
INTRUSION
2
4
GND
subbed to 3.3v flavor
In MIDDLE of brd, between PCI Slot 4 and PCI Slot 5
ROOM = TEMP_MONITOR
LM75 Thermal Sensor
At TOP of brd, under DIMM right end
LM75AD
5
A2
PU_TEMP2_A2
X
+3.3V_AUX
0.1uF 16V
NP
220
X
21
1 2
R377
C65
2204.7K
by U_TEMP3
1 2
R308
220
21
R357
2 4 3
SWITCH
SPST PUSH BUTTON
Open (1) Shorted (0)
1
= Not Intruded = Intruded
INTRUSION_COVER_N
Pull up on planar
4
+3.3V_AUX
LM75 I2C ADDR: 92
3
NP
21
R195
X
8.2K-5%
21
NC_LIOM_I2C_ALERT3_N
8.2K-5%
stub
RISER_TEMP3_SDA
RISER_TEMP3_SCL
stub
1
SDA
2
SCL
3
OS
4
GND
subbed to 3.3v flavor
U_TEMP3
LM75AD
VCC
A0
A1
A2
8
7
6
5
+3.3V_AUX
PU_TEMP3_A0
PU_TEMP3_A1
PU_TEMP3_A2
4.7K
NP
220
X
21
1 2
R358
R379
NP
X
2204.7K
1 2
1 2
R421
stubstub
R374
NP
4.7K
X
220
21
21
Temperature Accuracy
R422
-55 to +125 -25 to +100 -10 to 65
LM75 +-3 Degrees C +- 2
stub
LM76 +-1 Degree C
R360
LM77 +-3 Degrees C +-2 +-1.5
I2C_SEG3_VAUX_SDA
4,30
I2C_SEG3_VAUX_SCL
4,30
R231
1 2
0-5%
NP
R194
X
1 2
R241
0-5%
3
ROOM = TEMP_MONITOR
+3.3V_AUX
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,23-3W,24-3W
4 4
LM75 P/N = 15676 LM75A P/N = 5Y977
INC.
ROUND ROCK,TEXAS
LM75B P/N = 0C085
TITLE
31-3W,32-2T,33-3V,36-3W
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
30 OF 45
Page 31
B D
CA
PCI-EXPRESS HOT PLUG SWITCHES, LEDS
Attention Switches
+3.3V
3482C
slot wake should be pulled up to slot aux, not main aux
1
1
HPSW_S7
12
R326
12
R325
8.2K-5%
8.2K-5%
+3.3V
Wake Isolation
+3.3V_AUX
MCH_EXPHPINTR_N Isolation
1 2
PUSH BUTTON
HPSW_S6
1 2
PUSH BUTTON
3 4
3 4
stub
SLOT7_ATTN_SW_BNC
SLOT6_ATTN_SW_BNC
stub
1
IN1
3
IN2
2
GND
U27
MAX6817ETU
VCC
OUT1 OUT2
21
R354
S
D
+3.3V_AUX
22K-5%
2
3
RISER_EXP_PME_N
SLOT6_WAKE_N
4,7,16,31
25
Q46
BSS138
1 G
+3.3V_AUX
15K
12
D
3
S
2
R255
ISO_MCH_EXPHPINTR_N
Q34
R323
SLOT6_PME_ENABLE
32
32
1 2
1K-5%
I_SLOT6_PME_ENABLE_N_R
stub
D
3
BSS138
1 2
G S
G 1
BSS138
5
6 4
SLOT7_ATTN_SW_N SLOT6_ATTN_SW_N
32 32
by U27
0.1uF 16V
2 1
C601
D
3
BSS138
1 2
G S
R243
31,32
SYSTEM_PWRGOOD_RISER_BUF_HP
1 2
1K-5%
I_SYSTEM_PWRGOOD_RISER_BUF_R99
stub
change to discrete LEDs?
MCH_EXPHPINTR_N
4
green means card ok, up amber blinking means card fault or attention
R361
22K-5%
1 2
12.5 to 26.5 mA per LED
Hot Plug LEDS
2
SLOT7_PWR_LED
32
SLOT7_ATTN_LED
32
+3.3V
U24NP
14
74LCX06
+3.3V
U24NP
14
11 10
74LCX06
X
1213
14
X
1 2
74LCX06
+3.3V
14
74LCX06
+3.3V
U24NP
stub
U24NP
stub
I_SLOT7_PWR_LED_B
I_SLOT7_ATTN_LED_B
X
stub
I_SLOT7_PWR_LED_B1
89
I_SLOT7_ATTN_LED_B1
X
HPLED_S7A
1
G
3 4
Y
GRN / YEL LEDS
HPLED_S7B
1
G
3 4
Y
GRN / YEL LEDS
stub
2
2
I_SLOT7_PWR_LED_R
I_SLOT7_PWR_LED_R1
stub
I_SLOT7_ATTN_LED_R I_SLOT7_ATTN_LED_R1
stub
1
RN62
2 3 4
220
1
RN63
2 3 4
220
8 7 6 5
8 7 6 5
+5V
2N7002 is N-FET Vgs = 2.5V Dell PN 16155, 05168, 3282E, D1052, G5996, K5451, 1035D
BSH111, DPN R1878 is N-FET Vgs = 1.3V
BSS138, DPN R5841 is N-FET Vgs = 1.6V
DPN K1421 is N-FET Vgs = 1.1V
SLOT7_PME_ENABLE
32
R324
1K-5%
Q33
21
I_SLOT7_PME_ENABLE_N_R
stub
G 1
BSS138
2
S
3
D
RISER_EXP_PME_N
SLOT7_WAKE_N
4,7,16,31
26
2
0.18W per rpack
Do not use K1421, as it has far too high capacitance.
R476
D
Q8
2N7002
1
G
3
2N7002
S
2
D
3
2N7002
1 2
G S
3
0-5%
1 2
D
Q11
1
G
3
S
2
R477
1 2
LED max current 20 mA
0-5%
NEED PULLUPS ON MY SIDE FOR WHEN FETS ARE ISOLATING SIGNALS
AUX ISOLATION FOR SEG0
HP AUX TO ICH SEG0 MAIN PWR
SYSTEM_PWRGOOD_RISER_BUF_HP
+3.3V_AUX
21
R355
10K-5%
HP_SCL
32,33
D
3
BSS138
1 2
G S
stub
4,16
I2C ISOLATION
I_SYSTEM_PWRGOOD_RISER_BUF_R4
C545
1 2
ICH_SEG0_SCL
R68
1 2
1K-5%
G
S
BSS138
1
Q32
D
32
31,32
3
SLOT6_PWR_LED
32
SLOT6_ATTN_LED
32
+3.3V
14
74LCX06
+3.3V
14
3 4
74LCX06
U66NP
U66NP
65
14
X
13 12
14
X
74LCX06
+3.3V
I_SLOT6_PWR_LED_B
U66NP
74LCX06
+3.3V
U66NP
X
21
X
R478
LED 2.2 to 2.8V drop
stub
HPLED_S6A
1
G
I_SLOT6_ATTN_LED_B
stub
I_SLOT6_PWR_LED_B1
I_SLOT6_ATTN_LED_B1
stub stub
21
0-5%
3 4
Y
GRN / YEL LEDS
HPLED_S6B
1
G
3 4
Y
GRN / YEL LEDS
21
R479
stub
2
2
0-5%
I_SLOT6_PWR_LED_R
I_SLOT6_PWR_LED_R1
stub
I_SLOT6_ATTN_LED_R I_SLOT6_ATTN_LED_R1
stub
1
RN8
2 3 4
220
1
RN60
2 3 4
220
8 7 6 5
8 7 6 5
+5V
ICH_SEG0
4,16
I_SYSTEM_PWRGOOD_RISER_BUF_R5
stub
C563
1 2
.01uF 16V .01uF 16V
ICH_SEG0_SDA
R44
1 2
1K-5%
G
S
2 3
BSS138
1
Q31
SYSTEM_PWRGOOD_RISER_BUF_HP
+3.3V_AUX
21
R356
D
10K-5%
HP_SDA
32,33
HP_SEG0
31,32
+5V
4,5,19,20
D
Q12
2N7002
1
G
3
D
Q14
2N7002
1
S
2
G
3
S
2
D
3
2N7002
1 2
G S
+3.3V
+3.3V_AUX
4,5,19,32,33,36
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,23-3W,24-3W 30-2W,32-2T,33-3V,36-3W
LCX06 max current 100 mA package
4 4
INC.
TITLE
ROUND ROCK,TEXAS
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
REV.
A06-00
SHEET
31 OF 45
Page 32
B D
CA
GND
3
DS1818
RESET# VCC
21
+3.3V_AUX
3.20 to 3.40 V
SYSTEM_PWRGOOD_RISER_BUF_HP
31,32
VOLTAGE=3.3
3
2
SLOT7_P3V3
by U8
0.1uF 16V
2 1
U8
C5038
VCC
GND
DS1818
2
3
RESET
+3.3V_AUX
R85
1
1 2
1.5K-5% SLOT7_PWRGD_DLY
NP
R417
X
143U25
stub
21
100K
1 2
74VHC08
26,33
D
3
2N7002
1 2
G S
R98
1
SLOT7_PWRGD_N
33
1 2
1K-5%
Q19
2N7002
I_Q19_G
stub
D
1
G
S
2.98 to 3.15 V
+3.3V_AUX
14
U23
3
4
VHC14
stub
I_SLOT7_PWRGD
R457
22-5%
21
SLOT7_PWRGD
5
3.20 to 3.40 V
SYSTEM_PWRGOOD_RISER_BUF_HP
21
1.5K-5% SLOT6_PWRGD_DLY
2.98 to 3.15 V
stub
NP
R267
X
1 2
+3.3V_AUX
4 5
100K
U25
14
74VHC08
6
HP_SLOT6_PWRGD
SLOT6_PWRGD_N
33
D
3
2N7002
1 2
G S
Q20
2N7002
R99
1 2
1K-5%
stub
I_Q20_G
1
G
+3.3V_AUX
25,33
D
S
3
2
VOLTAGE=3.3 SLOT6_P3V3
by U2
0.1uF 16V
12
U2
C5039
VCC
GND
DS1818
2
RESET
3
1
GND
3
DS1818
31,32
R311
21
21
by U25
C606
1uF 6.3V
HP_SLOT7_PWRGD
26
Slot_Pwrgood
Slot_Clock_Enable
25
Slot_Pwrgood
PCI-EXPRESS HOT PLUG LOGIC
+3.3V_AUX
ICH SEG0
MCH pin E6 has 4.7k pullup on planar pg 17
GPIO EXPANDER
ATTN SW and FAULT_N cause INT pin to go low.
ISO_MCH_EXPHPINTR_N
31
HP_I2C_EXP_SCL
32
HP_I2C_EXP_SDA
32
32 32 32
PCA_A2 PCA_A1 PCA_A0
+3.3V_AUX
12
24
21
22 23
3 2
1
VDD
A2 A1 A0
INT_N
SCL SDA
VSS
U28
PCA9555
GPIO0_7 GPIO0_6 GPIO0_5 GPIO0_4 GPIO0_3 GPIO0_2 GPIO0_1 GPIO0_0
GPIO1_7 GPIO1_6 GPIO1_5 GPIO1_4 GPIO1_3 GPIO1_2 GPIO1_1 GPIO1_0
11 10 9 8 7 6 5 4
20 19 18 17 16 15 14 13
SLOT6_MRL_N
SLOT7_MRL_N
I2C address 40h
SLOT6_PWREN
SLOT6_PWR_LED
SLOT6_ATTN_LED
PD_9555_P8
PD_9555_P16
SLOT6_FAULT_N
SLOT6_ATTN_SW_N
SLOT6_PRSNT2_N
SLOT7_PWREN
SLOT7_PWR_LED
SLOT7_ATTN_LED
PD_9555_P17
PD_9555_P7
SLOT7_FAULT_N
SLOT7_ATTN_SW_N
SLOT7_PRSNT2_N
+3.3V_AUX
0.1uF 16V
2 1
C828
by U28
PCI Express Segment B
32 31,32
31 32 32
33
31
25,32
32
31,32
31 32 32
33
31
26,32
place caps by 9555
+3.3V_AUX
0.1uF 16V C607
by U28, extra
12
1
PCI Express Segment C
RESET# VCC
Reading a GPIO causes the latched bit to clear, and the INT to clear
14
U23
5
2
6
VHC14
I_SLOT6_PWRGD
stub
R456
1 2
22-5%
SLOT6_PWRGD
5
by U32
0.1uF 16V C832
12
+3.3V_AUX
2
Slot_Clock_Enable
U32
SEE PAGE 29 FOR 809 SELECTION TABLE
+3.3V_AUX
U26
14
SLOT7_P3V3_AUX_PWRGD
32
SLOT7_AUX_EN
32,33
9
10
74VHC08
+3.3V_AUX
8
SLOT7_PME_ENABLE
31
Slot_PME_Enable
SYSTEM_PWRGOOD_RISER_SLOTS
36
SLOT7_PRSNT2
32
SLOT7_PWREN
32
29,36
+3.3V_AUX
12 13
74VHC08
3P3V_EN
U25
14
11
I_SLOT7_ENABLE
stub
9
10
74VHC08
14
8
+3.3V_AUX
14
1 2
74VHC08
SYSTEM_PWRGOOD_RISER_BUF_HP
U32
3
SLOT7_ENABLE
31,32
PD_9555_P16
PD_9555_P7
21
R462
33
220
1 2
R461
220
32 32
21
220
R281
R272
1 2
220
PD_9555_P17
PD_9555_P8
32
32
32,33
32,33
SLOT7_AUX_EN SLOT6_AUX_EN
NP
R300
X
1 2
R372
1 2
8.2K-5%
NP
R306
X
1 2
1K-5%
R371
1 2
8.2K-5%
1K-5%
U26
14
14
4 5
U23
10
VHC14
74VHC08
6
SLOT6_PME_ENABLE
SLOT7_PRSNT2
31
SLOT6_PRSNT2
32
SLOT6_PWREN
32
32
+3.3V_AUX
14
9
10
74VHC08
U25
8
I_SLOT6_ENABLE
stub
Slot_Enable
SLOT6_P3V3_AUX_PWRGD
32
32,33
+3.3V_AUX
0.1uF 16V
2 1
C823
by U23
26,32
3
SLOT6_AUX_EN
SLOT7_PRSNT2_N
+3.3V_AUX
11
+3.3V_AUX
Slot_Present
14
U23
25,32
SLOT6_PRSNT2_N
13
12
VHC14
SLOT6_PRSNT2
32
VHC schmitt trigger inputs family avoids issues caused by slow VCC ramp times
+3.3V_AUX
14
4 5
74VHC08
U32
6
SLOT6_ENABLE
33
+3.3V_AUX
+3.3V_AUX
SLOT7_PRSNT2_N
26,32
25,32
SLOT6_PRSNT2_N
R319
1 2
1K-5%
R321
1 2
1K-5%
31,33
31,33
HP_SDA
HP_SCL
R106
1 2
0-5%
NP
21
R104
X
R105
0-5%
NP
8.2K-5%
21
R34
X
1 2
8.2K-5%
HP_I2C_EXP_SDA
HP_I2C_EXP_SCL
3
32
32
SLOT7_P3V3_AUX
26,33
GND
3
DS1818
RESET# VCC
0.1uF 16V
12
2.98 to 3.15V
21
25,33
3.20 to 3.40 V
by U22
C5040
U22
SLOT6_P3V3_AUX
809T
3
(3.08V)
VCC
RESET
GND
1
2
3.20 to 3.40 V
NP
21
R318
X
1.5K-5%
NP
21
R424
X
100K
SLOT7_P3V3_AUX_PWRGD
32
Slot_Aux_Pwrgood
SYSTEM_RISER_PWRGD_NEW
36
SLOT6_PRSNT2
32
+3.3V_AUX
14
1 2
74VHC08
U26
0.1uF 16V
3
Aux_Enable
2 1
C5042
by U26
SLOT6_AUX_EN
32,33
Input Pullups
GPIO EXPANDER PULLUPS FOR PRE-PROGRAM POWER UP.
+3.3V
21
R299
8.2K-5%
21
R304
8.2K-5%
R301
1 2
+3.3V
8.2K-5%
R86
220
R329
1 2
220
R333
220
+3.3V_AUX
NP
R471
X
1 2
21
21
NP
8.2K-5%
21
R472
X
NP
8.2K-5%
R473
X
1 2
8.2K-5%
PCA_A2
PCA_A1
PCA_A0
32
32
32
I2C address 40h
0.1uF 16V
4 4
2.98 to 3.15V
2 1
by U3
C5041
U3
3
VCC
GND
1
809T
(3.08V)
RESET
NP
SLOT7_PWREN
R317
X
2
1 2
1.5K-5%
NP
R423
X
SLOT6_P3V3_AUX_PWRGD
100K
1 2
32
SLOT7_PRSNT2
32
+3.3V_AUX
14
12 13
74VHC08
U26
11
SLOT7_AUX_EN
32,33
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
32
SLOT6_PWREN
32
31,32
31,32
SLOT7_PWR_LED
SLOT6_PWR_LED
R303
1 2
8.2K-5%
+3.3V_AUX
+3.3V
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,23-3W,24-3W 30-2W,31-3W,33-3V,36-3W
4,5,19,31,33,36
2-24-2005_11:44
TITLE
DWG NO.
DATE
I2C
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
32 OF 45
DC
A B
Page 33
B D
CA
PCI-EXPRESS HOT PLUG LOGIC
.015 ohm fast trip current limits at 90 to 110 mV fast trip current limits at 6 to 7.33A current limits at 45 to 55 mV
+3.3V_AUX
R867
NP
0 OHM
R868
1
+3.3V_AUX
+3.3V_AUX
21
NP
1 2
0 OHM
21
X X
SLOT7_P3V3_AUX
SLOT6_P3V3_AUX
26,32,33
25,32,33
10.5k
NP
21
R874
X
I_U899_P1
stub
10.7K-1%
NP
NC_U899_P3
R875
NP
11.3K-1%
1 5
INP VDD
2
GND
3 4
NC OUT
21
X
U899
X
MIC842
+3.3V_AUX
NP
25V-20%
.1uF
C879
21
X
+3.3V_AUX
FT2301DS
NP
I_Q879_G
stub
3
D
1
G
2
X
S
+3.3V
SI2323DS
Q879
NP
NP
stub
I_Q879_S
pop these with circuit pop'd
added backup plan for 2592B leakage
pop these with circuit depop'd
R879
21
0-5% R878
0-5%
R877
0-5% R876
1 2
0-5%
21
21
X X
1N4148W == 1N914 in SOD123
SLOT7_3V_SENSE_P
SLOT6_3V_SENSE_P
33
33
1.2MICRON PROCESS, 5 NSEC GATES
+12V
NP
21
R893
X
stub
I_D899_P2
NP
SOD123
10K-1%
1N914
X
NP
D898
X
R894
NP
4.99K-1%
D899
NP
12
FT2301DS
I_Q899_G
stub
NP
1 2
4.99K-1%
1 3
MBZ5235B
01FYU == 7.5V zener, MMBZ5236BLT1
21
X
3
1
G
2
X
R895
X
6.8V
Vaux mosfets internal 400 milliohm at 375 mA
1 2
R258
10K-5%
R102
1 2
10K-5%
10K-5%
SLOT6_PWRGD_N
SLOT7_PWRGD_N
10K-5%
SLOT7_FAULT_N SLOT6_FAULT_N
C245
1 2
32,33
32,33
32,33 32,33
5 to 10 msec timer
21
C635
.01uF 16V
.047uF 25V
With 110k pulldown, 2200 pF caps
2592 2592
With 110k pulldown, 3300 pF caps = 6.4 to 8.2 msec
2592
With 110k pulldown, 4700 pF caps
2592
With 110k pulldown, 6800 pF caps = 8.1 to 10.3 msec
20%
21
C246
With 110k pulldown, 2200 pF caps 400 to 625 usec / nF2591
C634
.01uF 16V
1 2
FLT_TIMER_A FLT_TIMER_B
20%
.047uF 25V
33 33
= 4.4 to 8.4 msec = 5.8 to 7.4 msec
= 7.1 to 9 msec
including cap tolerance
= 5.3 to 8.1 msec = 5.8 to 9 msec = 6.4 to 9.9 msec = 7.3 to 11.3 msec
SLOT6_PWRGD_N
32,33
SLOT7_PWRGD_N
32,33
SLOT7_AUX_EN
32
SLOT6_AUX_EN
32
R790
1 2
0-5%
NP
32,33
32,33
SLOT7_FAULT_N SLOT6_FAULT_N
R791
0-5%
C205
1 2
.047uF
16V-10%
21
s/b 0.039 uf
X
NP
I_SLOT6_PWRGD_N
I_SLOT7_PWRGD_N
C207
21
X
.047uF
16V-10%
R793
0-5%
stub
1 2
21
stub
stub
R792
0-5%
stub
SLOT7_12V_SENSE_P
33
SLOT6_12V_SENSE_P
33
SLOT7_3V_SENSE_P
33
SLOT6_3V_SENSE_P
33
I_SLOT7_FAULT_N I_SLOT6_FAULT_N
SLOT7_ENABLE
32
SLOT6_ENABLE
32
PU_MIC2591_4
33
PU_MIC2591_38
33
FLT_TIMER_A
33
FLT_TIMER_B
33
MIC_SMBUS_A2
33
MIC_SMBUS_A1
33
MIC_SMBUS_A0
33
MIC_SMBCLK
33
MIC_SMBDATA
33
PU_INT_MIC2591_37
33
I2C Address 82h
SDL / SCA / INT ARE FOR SMI (SYSTEM MANGEMENT INTERFACE) CONTROL
SDL / SCA / INT ARE FOR SMI (SYSTEM MANGEMENT INTERFACE) CONTROL ON / AUXEN / FAULT ARE FOR HPI (HOT PLUG INTERFACE) CONTROL HPI AND SMI ARE MUTUALLY EXCLUSIVE. USE ONLY ONE FOR CONTROL.
+3.3V_AUX
PCIEX_HPC
45
AUXENA
42
AUXENB
11
VSTBYA
26
VSTBYB
5
12VINA
32
12VINB
12
3VINA
25
3VINB
6
PWRGD_A
31
PWRGD_B
1
FAULT_A
36
FAULT_B
44
ONA
43
ONB
4
GPI_A0
38
GPI_B0
2
C_FILTER_A
35
C_FILTER_B
39
A2
40
A1
41
A0
47
SCL
48
SDA
37
INT
PCI EXPRESS HOT-PLUG CONTROLLER
12V + sense A 12V + sense B
12V - sense A
3V + sense A 3V + sense B
3V - sense B
12V - sense B
MIC2592A
3V - sense A
3VSENSEA
3VGATEA
3VOUTA
12VSENSEA
12VGATEA
12VOUTA
3VSENSEB
3VGATEB
3VOUTB
12VSENSEB
12VGATEB
12VOUTB
FORCE_ON_A FORCE_ON_B
R_FILTER_A_B
GND_17 GND_33 GND_46
DO NOT CONNECT 3V_IN OR 12V_IN PINS DIRECTLY TO PLANE, USE TRACE
NC_7
15 22
13 14 16
8 3 10
24 23 21
29 34 27
9 28
20
17 33 46
7 18 19 30
VAUXA VAUXB
NC_18 NC_19 NC_30
150-5%
21
R295
R89
1 2
NP
21
R112
X
4.7K
1K-5%
150-5%
4.7K
R133
1 2
PU_INT_MIC2591_37
PU_FORCE_ON_SLOT7_N
PU_FORCE_ON_SLOT6_N
4.7K
R135
1 2
33
33
33
PU_MIC2591_4
PU_MIC2591_7 PU_MIC2591_38 PU_MIC2591_30
R257
+3.3V_AUX
21
R103
33 33 33 33
R88
1K-5%
1 2
2
NP
R111
X
1 2
+3.3V_AUX
4.7K
R131
1 2
3
+3.3V_AUX
R87
10K-5%
1 2
+12V
NP
25V-20%
.1uF
X
SI2323DS
D
Q899
S
C899
21
+12V
NP
1 2
NP
stub
I_Q899_S
pop these with circuit pop'd
VOLTAGE=3.3 VOLTAGE=3.3
PU_FORCE_ON_SLOT7_N PU_FORCE_ON_SLOT6_N
PU_MIC2591_7
SLOT7_P3V3_AUX SLOT6_P3V3_AUX
SLOT7_3V_SENSE_N
SLOT7_12V_SENSE_N
SLOT7_12V_GATE
SLOT6_3V_SENSE_N
SLOT6_12V_SENSE_N
SLOT6_12V_GATE
NC_PCIEX_HPC_P19
PU_MIC2591_30
pop these with circuit depop'd
R899
1 2
0-5%
R898
1 2
0-5%
R897
X
0-5% R896
21
X
0-5%
connect 3.3v and 12V at the sense resistors Kelvin sense connections
26,32,33 25,32,33
33
SLOT7_3V_GATE
SLOT7_P3V3
SLOT7_P12V
SLOT6_3V_GATE
SLOT6_P3V3
SLOT6_P12V
33 33
2
R701
110K
1
33
33
33 26,32,33
33 33 26,33
33 33 25,32,33
33 33 25,33
PCIEX_HPC_RFILTER
MIC_IREF
by R100
by R101
SLOT7_12V_SENSE_P
SLOT6_12V_SENSE_P
33
R93
1 2
0-5%
33
33
MIC_IREF
SI4435DY
Charge pump caps are which?
0.1 uF == 250 V/sec slew rate for 150 uF load cap
0.1 uF == 50 usec rise time
0.022 uF == 950 V/sec slew rate for 150 uF load cap
0.022 uF == 10 usec rise time
33
SLOT7_12V_GATE
+12V
C244
C356
1
S D
SO-8
S
2
P MOSFET
S
3 4 5DG
5.5A 1W 20 mOhm
SLOT7_12V_SENSE_N
33
.022uF
1 2
50V-10%
2
1
5600pF
25V-10%
R96
15
I_MIC_P12V_GATE_SLOT7_R
21
D D
R750
X
NP
8 7 6
2 1
SI4435DY
stub
current limits at 70 to 130 mV in 2591, using .028 ohm
0.020 ohm FET
4.7M
1 2 3
4
G
D1 D4
S3S2S1
D3D2
c244 increase delays 12v turnon
+12V
21
C260
.022uF
50V-10%
2
1
C63
C56
5600pF
25V-10%
2
1
2
1
.018uF
.018uF
C116
SLOT6_12V_GATE
33
SLOT7_3V_GATE
33
SLOT6_3V_GATE
33
33
SLOT6_12V_SENSE_N
33
R97
21
15
I_MIC_P12V_GATE_SLOT6_R
SLOT7_3V_SENSE_N
33
I_MIC_P3V3_GATE_SLOT7_R
R94
21
15
25V-10%
R95
15
25V-10%
NP
21
R752
X
SLOT6_3V_SENSE_N
33
I_MIC_P3V3_GATE_SLOT6_R
21
NP
R753
X
12
R751
X
NP
SI4435DY
stub
4.7M
1 2
4.7M
SI4420DY
stub
SI4420DY
stub
4.7M
1 2 3
4
G
D1 D4
D1
4
D3D2
D3D2
G
D1
4
G
S3S2S1
current limits at 45 to 55 mV current limits at 4.5 to 5.5A
fast trip current limits at 90 to 110 mV fast trip current limits at 9 to 11A
current limits at 3 to 3.67A
R100
1 2
.015-1%
R863
P-Channel
Q4
85 6 7
VOLTAGE=12
SLOT7_P12V
R101
1 2
.015-1%
R864
P-Channel
Q5
85 6 7
8765
D4
Q2
VOLTAGE=12
R438
.01-1%
R865
N-Channel
31 2
S3S1 S2
VOLTAGE=3.3
R439
1 2
.01-1%
8765
D4
D3D2
Q3
31 2
S3S1 S2
VOLTAGE=3.3
SI4420DY
S1 2 3 4 5DG
SO-8
S2
N MOSFET
S3
11A 1.5W 10 mOhm
+12V
NP
2
X
1
NP
X
1
SLOT6_P12V
21
NP
X
1
SLOT7_P3V3
NP
R866
X
SLOT6_P3V3
D1
8 7
D D
6
0 OHMs-5%
+12V
2
+3.3V
2
2
1
25V-20%
26,33
0 OHMs-5%
25,33
0 OHMs-5%
26,32,33
+3.3V
0 OHMs-5%
25,32,33
+12V
.1uF
21
+12V
25V-20%
.1uF 25V-20%
.1uF
25V-20%
.1uF
1
C863
1 2
C864
2
+3.3V
C738
21
+3.3V
1 2
C739
3
0 ohm select table
+3.3V_AUX
+3.3V_AUX
2
1
10uF 6.3V
C578
21
C579
1uF 6.3V
1 2
1uF 6.3V
Pin Name Pin Type Pin Use 3VOUTx I
12VOUTx 3VSENSEx
12VSENSExII 3VINx 12VINx
I
I I
P/IVSTBY-x
Powergood sense Powergood sense
Current Limit Circuit Breaker Sense, IR = 50mv for Tflt (35 to 65 mV) Current Limit Circuit Breaker Sense, IR = 50mv for Tflt (35 to 65 mV) 3V Sense, Undervoltage LockOut 2.75V up, 2.9V down, 3.0 to 3.6V 12V Sense, Undervoltage LockOut 10V up, 10.8V down, 11 to 13V
Chip power, Aux output power, Undervoltage LockOut 3.0V up, 2.9V down, 3.0 to 3.6V
ONx I MAINx Power Enable. Low resets Fault. Gnd for smbus control AUXx I CFILTERx I
AUXx Power Enable. Low resets Fault. Gnd for smbus control Sets how long in current limit before cutout, Tflt
NP
R92
1 2
NP
R91
X
1.5K-1%
1 2
NP
1.5K-1%
R90
X
1 2
1.5K-1%
MIC_SMBUS_A2 MIC_SMBUS_A1 MIC_SMBUS_A0
SLOT7_12V_SENSE_P
SLOT6_3V_SENSE_P SLOT7_3V_SENSE_P
NP
25V-20%
.1uF
C587
21
X
+3.3V_AUX
33 33 33
ICH SEG0
NP
25V-20%
.1uF
X
C585
21
33
33
NP
25V-20%
.1uF
X
C586
21
NP
25V-20%
.1uF
X
SLOT6_12V_SENSE_P
C588
21
33 33
C583
/PWRGDx Asserts when power delivery to slot starts successfullyOD
NP
R435
X
4 4
150-5%
1 2
21
R436
R437
150-5%
150-5%
1 2
I2C ISOLATION
31,32
31,32
HP_SCL
R116
HP_SDA
0-5%
R108
X
1 2
R114
1 2
21
0-5%
NP
8.2K-5%
21
R109
X
MIC_SMBCLK
MIC_SMBDATA
8.2K-5%
SLOT7_P3V3_AUX
SLOT6_3V_SENSE_P SLOT7_3V_SENSE_P
NP
50V-10%
33
33
100pF
X
1 2
C750
NP
50V-10%
100pF
X
C751
21
SLOT7_3V_SENSE_N SLOT6_3V_SENSE_N
33
33
NP
50V-10%
100pF
X
33 33
C752
21
NP
50V-10%
100pF
X
SLOT7_12V_SENSE_P SLOT6_12V_SENSE_P
1 2
C753
SLOT6_12V_SENSE_N SLOT7_12V_SENSE_N
33 33
C58
1 2
33 33
SLOT6_P3V3_AUX
C57
.01uF 16V
1 2
26,32,33 25,32,33
.01uF 16V
/FAULTx OD Asserts when circuit breaker trips, overcurrent, undervoltage, overtemp, etc /FORCEONx I Override on, override fault & pwrgd
/INT OD FAULT Int GPIx_0 I GP Inputs GPIx_1 I NC in Production chip
NC_x rsvd reserved. make no connection to these pins SDA I/O
SMBUS Data
SCL I SMBUS Clock
mils
SIZE
mm
Dissipation 25C 70C
0402 1005 1/16w 1/20 w 0402 1005 1/16w 1/20 w 0603 1608 1/10w 1/16w 0805 2012 1/8w 1/10w 1206 3216 1/8w 1210 3225 1/4w 2010 5025 1/2w 2512 6432 1w
+3.3V_AUX
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,23-3W,24-3W
+3.3V
+12V
30-2W,31-3W,32-2T,36-3W
4,5,19,31,32,36
4,5,7,19,21-24,28,29
TITLE
Current cont pk
0.5A 1.5A
0.5A 1.5A 1A 3A 2A 10A 2A 10A 2A 10A 3A 15A 4A 18A
INC.
symbol R0___7__.1
R0___zx_.1 R0___f__.1 R0___d__.1 R0___d__.1
R0___d__.1
Dell PN
M1273 9K341 30661 21873 20753
194UT 35YEGR0___zo_.1
ROUND ROCK,TEXAS
2-24-2005_11:44
I2C ADDRESS 82h
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
33 OF 45
Page 34
PXH DECOUPLING
B D
CA
+3.3V_AUX
2-24-2005_11:44
0.1uF 16V C798
12
+3.3V_AUX
1
U799
14
PD_U799_P2
stub
1 2
74VHC08
R1000
sch pg 7, 16
3
NC_U799_P3
21
220
1
+3.3V
+3.3V
PXH PCIX B T TOPOLOGY
P3V3AUX
+3.3V_AUX
14
U23
9
VHC14
+3.3V_AUX
14
U23
1
VHC14
8
2
NC_U23_P8
NC_U23_P4
2
U66NP
220
14
74LCX06
1011
NC_U66_P10
X
U24NP
14
PD_U24_P3
stub
74LCX06
+3.3V
R770
21
220
43
NC_U24_P4
X
stub
PD_U66_P11
21
R433
0.1uF 16V
12
C602
stub
21
R469
PD_U23_P9
220
+3.3V
V7
SUB=NO_PKG
V8
SUB=NO_PKG
V10
2
16,21,22 16,21,22
PXH_PCIX_B_AD31 PXH_PCIX_B_AD29
SUB=NO_PKG
V93 V92
SUB=NO_PKG
V9
SUB=NO_PKG
V13
SUB=NO_PKG
PXH_PB_PME_N
PXH_PCIX_B_AD30
PXH_PCIX_B_AD28 PXH_PCIX_B_AD26
PXH_PCIX_B_AD24
16,21,22 16,21,22
16,21,22 16,21,22
16,21,22
PD_U24_P5
stub
220
C603
21
1uF 6.3V
R771
1 2
14
5 6
74LCX06
U24NP
NC_U24_P6
X
U66NP
14
PD_U66_P9
stub
R434
21
220
9 8
74LCX06
NC_U66_P8
X
stub
PD_U23_P1
R468
220
1 2
SUB=NO_PKG
page 31
16,21,22 16,21,22
PXH_PCIX_B_AD27 PXH_PCIX_B_AD25
SUB=NO_PKG SUB=NO_PKG
V91 V90
V12
SUB=NO_PKG
V11
SUB=NO_PKG
PXH_PCIX_B_AD22 PXH_PCIX_B_AD20
16,21,22 16,21,22
16,21,22 16,21,22
16,21,22 16,21,22
16,21,22 16,21,22
16,18,21,22
16,18,21,22
16,21,22 16,18,21,22 16,18,21,22
16,18,21,22
16,21,22
16,21,22
PXH_PCIX_B_CBE3_N PXH_PCIX_B_AD23
PXH_PCIX_B_AD21 PXH_PCIX_B_AD19
PXH_PCIX_B_AD17 PXH_PCIX_B_CBE2_N
PXH_PCIX_B_IRDY_N
PXH_PCIX_B_DEVSEL_N PXH_PCIX_B_PCIXCAP PXH_PCIX_B_LOCK_N PXH_PCIX_B_PERR_N
PXH_PCIX_B_SERR_N
PXH_PCIX_B_CBE1_N PXH_PCIX_B_AD14
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
V89 V88
V87 V86
V85 V84
V83
V82 V81 V80 V79
V78
V77 V76
V15
SUB=NO_PKG
V14
SUB=NO_PKG
V16
SUB=NO_PKG
V17
SUB=NO_PKG
V18
SUB=NO_PKG
V19
SUB=NO_PKG
V20
SUB=NO_PKG
V21
SUB=NO_PKG
V22
SUB=NO_PKG
V23
SUB=NO_PKG
PXH_PCIX_B_AD18 PXH_PCIX_B_AD16
PXH_PCIX_B_FRAME_N
PXH_PCIX_B_TRDY_N
PXH_PCIX_B_STOP_N
PXH_PCIX_B_PAR
PXH_PCIX_B_AD15
PXH_PCIX_B_AD13 PXH_PCIX_B_AD11
PXH_PCIX_B_AD9
16,21,22 16,21,22
16,18,21,22
16,18,21,22
16,18,21,22
16,21,22 16,21,22
16,21,22 16,21,22
16,21,22
stub
R126
PD_U37_P9
1 2
220
9
10
74VHC00
148U37
NC_U37_P8
stub
VBAT_3V
0.1uF 16V
C294
1 2
11,12,34
PD_U12_P13
stub
21
R534
220
13
VBAT_3V
14
U7
12
VHC14
page 11
11,12,34
NC_U7_P12
0.1uF 16V C5043
12
16,21,22 16,21,22 16,21,22
16,21,22
3
16,21,22
16,21,22 16,21,22
16,21,22
16,18,21,22
PXH_PCIX_B_AD12 PXH_PCIX_B_AD10 PXH_PCIX_B_M66EN
PXH_PCIX_B_AD8 PXH_PCIX_B_AD7
PXH_PCIX_B_AD5 PXH_PCIX_B_AD3
PXH_PCIX_B_AD1
PXH_PCIX_B_ACK64_N
SUB=NO_PKG SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG
SUB=NO_PKG
V75 V73 V74
V71 V72
V70 V69
V68
V67
V24
SUB=NO_PKG
V25
SUB=NO_PKG
V26
SUB=NO_PKG
V27
SUB=NO_PKG
V28
SUB=NO_PKG
V29
SUB=NO_PKG
V30
SUB=NO_PKG
V31
SUB=NO_PKG
V32
SUB=NO_PKG
V33
SUB=NO_PKG
16,18,21,22 16,18,21,22
PXH_PCIX_B_CBE6_N PXH_PCIX_B_CBE4_N
SUB=NO_PKG SUB=NO_PKG
V66 V65
V34
SUB=NO_PKG
V35
SUB=NO_PKG
PXH_PCIX_B_CBE0_N
PXH_PCIX_B_AD6 PXH_PCIX_B_AD4
PXH_PCIX_B_AD2 PXH_PCIX_B_AD0
PXH_PCIX_B_REQ64_N
PXH_PCIX_B_CBE7_N PXH_PCIX_B_CBE5_N
PXH_PCIX_B_PAR64
PXH_PCIX_B_AD62
PXH_PCIX_B_AD60 PXH_PCIX_B_AD58
16,21,22
16,21,22 16,21,22
16,21,22 16,21,22
16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
PD_U32_P12
stub
R989
+3.3V_AUX
14
12 13
U32
11
NC_U32_P11
3
74VHC08
21
220
page 32
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
PXH_PCIX_B_AD63 PXH_PCIX_B_AD61
PXH_PCIX_B_AD59 PXH_PCIX_B_AD57
PXH_PCIX_B_AD55 PXH_PCIX_B_AD53
PXH_PCIX_B_AD51 PXH_PCIX_B_AD49
PXH_PCIX_B_AD47 PXH_PCIX_B_AD45
PXH_PCIX_B_AD43 PXH_PCIX_B_AD41
PXH_PCIX_B_AD39 PXH_PCIX_B_AD37
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
SUB=NO_PKG SUB=NO_PKG
V64 V63
V62 V61
V60 V59
V58 V57
V56 V55
V50 V49
V52 V51
V36
SUB=NO_PKG
V37
SUB=NO_PKG
V39
SUB=NO_PKG
V38
SUB=NO_PKG
V41
SUB=NO_PKG
V40
SUB=NO_PKG
V43
SUB=NO_PKG
V42
SUB=NO_PKG
V45
SUB=NO_PKG
V44
SUB=NO_PKG
V47
SUB=NO_PKG
V46
SUB=NO_PKG
V48
SUB=NO_PKG
PXH_PCIX_B_AD56 PXH_PCIX_B_AD54
PXH_PCIX_B_AD52 PXH_PCIX_B_AD50
PXH_PCIX_B_AD48 PXH_PCIX_B_AD46
PXH_PCIX_B_AD44 PXH_PCIX_B_AD42
PXH_PCIX_B_AD40 PXH_PCIX_B_AD38
PXH_PCIX_B_AD36 PXH_PCIX_B_AD34
PXH_PCIX_B_AD32
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22 16,18,21,22
16,18,21,22
SPARE GATES
4 4
16,18,21,22 16,18,21,22
PXH_PCIX_B_AD35 PXH_PCIX_B_AD33
SUB=NO_PKG SUB=NO_PKG
V54 V53
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
DC
INC.
ROUND ROCK,TEXAS
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
34 OF 45
Page 35
B D
CA
CLIP1
P1 P2 V1 V2 V3 V4 V5
V10 V11 V12 V13 V14 V15 V16
V6 V7 V8 V9
PCI Express, diff, 85 ohms, layers 3,4,8,10
Coupons
ADD=ADD*_0342R
STACKUP
SMT GND CLIP
P85L3
1
1
RX
3
RY
SUB=NO_PKG
2
+
4
-
ZDI4PINS2R
COUPON TEST
IMPGND
P85L4
1
RX
3
RY
SUB=NO_PKG
2
+
4
-
ZDI4PINS2R
COUPON TEST
IMPGND
PROPAGATION_DELAY=L:S:5995:6005
Z85D_IN1_N
Z85D_IN1_P
PROPAGATION_DELAY=L:S:5995:6005
pci express
PROPAGATION_DELAY=L:S:5995:6005
Z85D_IN2_N
Z85D_IN2_P
PROPAGATION_DELAY=L:S:5995:6005
pci express
IMPGND
IMPGND
1
1
T85L3
2
2
3
3
4
4
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
TEST POINT
1
1
T85L4
2
2
3
3
4
4
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
TEST POINT
signal group outer layernet_physical_type net_spacing_type layers
imp ok
imp ok
imp ok
imp ok
imp ok
imp ok
CLK_100
CLK
3,4,8 3,8
DDRDDR2Memory
3,7,8
PCI_55 PCI_55 1,3,4,7,8,10 5/20 (56.29) 4.5/11.5 (55.18)
DIFFXPCIX_85
3,4,8,10
Diffclock Diffstrobe DDR2 DDRSTROBE
PCI-X PCI-Express SCSI SCSI DIFFPAIR 3,8
RX, RY SHOULD BE RN, WHERE N IS REFERENCE LAYER
inner layer inner BGA Breakoutlayer
5.6/12.4/5.6/20 (100.3) 4.6/8.4/4.6/16 (100.3)
6.5/20/6.5/20 (100.3) 5.5/12/5.5/20 (100.3)
6.5/20 (50.19) 5.5/12 (50.3)
8.1/13.9/8.1/24 (85.44) 7.1/10.9/7.1/16 (84.04) 6.6/8.4/6.6/16 (84.8) ??? 4.6/8.4/4.6/16 (121.5)
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
86 SLOT
16 GND VIAS
CLIP6
NP
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8 V9
V10
X
V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SCSI, diff, 120 ohms, layers 3,8
CLIP2
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
ADD=ADD*_0342R
SMT GND CLIP
86 SLOT
16 GND VIAS
CLIP8
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
ADD=ADD*_0342R
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
CLIP3
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
ADD=ADD*_0342R
SMT GND CLIP
86 SLOT
16 GND VIAS
CLIP9
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
ADD=ADD*_0342R
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
CLIP5
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
ADD=ADD*_0342R
SMT GND CLIP
86 SLOT
16 GND VIAS
CLIP10
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
ADD=ADD*_0342R
SMT GND CLIP
86 SLOT
16 GND VIAS
1
P85L8 1
1
RX
3
RY
SUB=NO_PKG
2
+
4
-
ZDI4PINS2R
IMPGND
COUPON TEST
pci express
P85L10
1
RX
3
RY
2
SUB=NO_PKG
ZDI4PINS2R
COUPON TEST
IMPGND
2
+
4
-
pci express
PROPAGATION_DELAY=L:S:5995:6005
Z85D_IN4_N
Z85D_IN4_P
PROPAGATION_DELAY=L:S:5995:6005
PROPAGATION_DELAY=L:S:5995:6005
Z85D_BOT_N
Z85D_BOT_P
PROPAGATION_DELAY=L:S:5995:6005
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
IMPGND
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
1
T85L8
2
2
3
3
4
4
TEST POINT
1
1
T85L10
2
2
3
3
4
4
IMPGND
IMPGND
1
RX
3
RY
SUB=NO_PKG
1
RX
3
RY
SUB=NO_PKG
P120L3
2
+
4
-
ZDI4PINS2R
COUPON TEST
P120L8
2
+
4
-
ZDI4PINS2R
COUPON TEST
TEST POINT
IMPGND
LAYERS MUST BE VOIDED
PROPAGATION_DELAY=L:S:5995:6005
Z120D_IN1_N
Z120D_IN1_P
PROPAGATION_DELAY=L:S:5995:6005
PROPAGATION_DELAY=L:S:5995:6005
Z120D_IN4_N
Z120D_IN4_P
PROPAGATION_DELAY=L:S:5995:6005
IMPGND
IMPGND
1
1
T120L3
2
2
3
3
4
4
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
TEST POINT
1
1
T120L8
2
2
3
3
4
4
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
TEST POINT
CLIP12
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
ADD=ADD*_0342R ADD1=ADD*_F2677_PLASTICCLIP
CLIP13
NP
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8 V9
V10
X
V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
GND Mounting Hole
2
SMT CLIPS AT LEAST 200 MILS FROM BRD EDGE
PROPAGATION_DELAY=L:S:5995:6005
P100L3
1
RX
3
RY
SUB=NO_PKG
ZDI4PINS2R
COUPON TEST
IMPGND
P100L4
1
RX
3
RY
SUB=NO_PKG
ZDI4PINS2R
COUPON TEST
IMPGND
P100L8
1
RX
3
3
RY
SUB=NO_PKG
ZDI4PINS2R
COUPON TEST
IMPGND
2
+
Z100D_IN1_N
4
-
Z100D_IN1_P
PROPAGATION_DELAY=L:S:5995:6005
SUB=NO_PKG
IMPGND
PROPAGATION_DELAY=L:S:5995:6005
+
Z100D_IN2_N
4
-
Z100D_IN2_P
PROPAGATION_DELAY=L:S:5995:6005
SUB=NO_PKG
IMPEDENCE DIFFERENTIAL
IMPGND
PROPAGATION_DELAY=L:S:5995:6005
2
+
Z100D_IN4_N
4
-
Z100D_IN4_P
PROPAGATION_DELAY=L:S:5995:6005
SUB=NO_PKG
IMPGND
Clocks, diff, 100 ohms, layers 3,4,8
Memory, 50 ohms, layers 3,7,8
P50L3
1 2 3
RY
SUB=NO_PKG
+RX
PROPAGATION_DELAY=L:S:5995:6005
ZSE3PINS2R
COUPON TEST
IMPGND
P50L7
1 2 3
RY
SUB=NO_PKG
ZSE3PINS2R
+RX
PROPAGATION_DELAY=L:S:5995:6005
COUPON TEST
IMPGND
4 4
P50L8
IMPGND
1 2 3
RY
SUB=NO_PKG
ZSE3PINS2R
COUPON TEST
+RX
PROPAGATION_DELAY=L:S:5995:6005
Z50_IN1
SUB=NO_PKG
IMPGND
Z50_IN3
SUB=NO_PKG
IMPGND
Z50_IN4
SUB=NO_PKG
IMPGND
1
1
T100L3
2
2
3
3
4
4
IMPEDENCE DIFFERENTIAL
TEST POINT
1
1
T100L42
2
2
3
3
4
4
TEST POINT
1
1
T100L8
2
2
3
3
4
4
IMPEDENCE DIFFERENTIAL
TEST POINT
T50L3
1
1
2
2
3
3
IMPEDENCE SINGLE END
TEST POINT
T50L7
1
1
2
2
3
3
IMPEDENCE SINGLE END
TEST POINT
T50L8
1
1
2
2
3
3
IMPEDENCE SINGLE END
TEST POINT
PCIX, 55 ohms, layers 1,3,4,7,8,10
P55L1
Z55_TOP
SUB=NO_PKG
21
+RX
ZSE2PINI1R
COUPON TEST
IMPGND
PROPAGATION_DELAY=L:S:5995:6005
P55L3
Z55_IN1
3
RY
SUB=NO_PKG
21
+RX
PROPAGATION_DELAY=L:S:5995:6005
ZSE3PINS2R
COUPON TEST
IMPGND
P55L4
Z55_IN2
3
RY
SUB=NO_PKG
21
+RX
PROPAGATION_DELAY=L:S:5995:6005
ZSE3PINS2R
COUPON TEST
IMPGND
P55L7
Z55_IN3
3
RY
SUB=NO_PKG
21
+RX
PROPAGATION_DELAY=L:S:5995:6005
ZSE3PINS2R
COUPON TEST
IMPGND
P55L8
Z55_IN4
3
RY
SUB=NO_PKG
21
+RX
PROPAGATION_DELAY=L:S:5995:6005
ZSE3PINS2R
COUPON TEST
IMPGND
P55L10
1 2 3
RY
SUB=NO_PKG
+RX
PROPAGATION_DELAY=L:S:5995:6005
Z55_BOT
ZSE3PINS2R
COUPON TEST
IMPGND
SE Clock, 55 ohms, layers 1,3,4,8,10
SUB=NO_PKG
IMPGND
SUB=NO_PKG
IMPGND
SUB=NO_PKG
IMPGND
IMPGND
IMPGND
IMPGND
1
1
2
2
3
3
IMPEDENCE SINGLE END
TEST POINT
1
1
2
2
3
3
IMPEDENCE SINGLE END
TEST POINT
1
1
2
2
3
3
IMPEDENCE SINGLE END
TEST POINT
1
1
2
2
3
3
SUB=NO_PKG
IMPEDENCE SINGLE END
TEST POINT
1
1
2
2
3
3
SUB=NO_PKG
IMPEDENCE SINGLE END
TEST POINT
1
1
2
2
3
3
SUB=NO_PKG
IMPEDENCE SINGLE END
TEST POINT
T55L1
T55L3
T55L4
T55L7
T55L8
T55L10
SPLOAD_PLNGR1
SPRING-LOADED PLUNGER
NC
K4775
PIN,LKG,PWA,44X.150
NC_SPL1
Spload Plunger Drill Holes
Dobson Heatsink Clips
Dobson
HSC3
below Dobson
1 2
HEATSINK
NP
10V-10%
.1uF
C572
21
X
PXH
HSC2
below PXH
1 2
HEATSINK
RISER_HEATSINK_PRES_N
NP
10V-10%
1 2
C303
.1uF
X
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
stub
HSC4
above Dobson
1 2
HEATSINK
R702
1 2
0-5%
I_HSC4_P1
stub
51FRW
HSC1
I_HEATSINK_PRES_N
1 2
NP
10V-10%
.1uF
HEATSINK
C573
21
PLACE CAPS AT CLIP
X
PXH Heatsink Clips
36
above PXH
2-24-2005_11:44
NO_PKG
MH1
X
.252/
312RD
NC_MH1_P1
NO_PKG
MH2
X
.252/
312RD
HotPlug Dishrack Clips
HSC6
R804
1 2
I_HSC6
1 2
HEATSINK0-5%
ADD2=ADD*_F1314_SCH
ADD1=ADD*_DC876_PWB ADD3=ADD*_HC375_ASSY_DWG
ADD4=PWA0_GC654 ADD1=ADD*_42610_LBL_PPID
ADD2=ADD*_42753_LBL_REV
INC.
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
DATE
F1314
2/23/2005
NC_MH2_P1
below DIMM
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
35 OF 45
3
A B
DC
Page 36
B D
CA
+3.3V_RSR
+1.8V
CPLD
Compile CPLD with Output low slew rate and Low Power optionsturned on Low Power option prevents slow inputs from causing internal oscillation
1 extra gpio
Low Slew Rate option minimizes non-motonics, ringing, overshoot, etc on outputs
4.7K
R485
R268
1K-5%
1 2
DDR_DIMM_RST_N
6,36
1 2
SCSI_TST_RST_N
13,36
C293
1 2
+3.3V_AUX
C61
0.1uF 16V
1 2
0.1uF 16V
U31
C759
1 2
C758
0.1uF 16V
1 2
0.1uF 16V
1
1
26 55
22 31 32 24 34
25 27 39 33 40
35 36 42 38
pg 8
pg 36
stub
pg 11
stub
pg 36
pg 36
pg 36
pg 36
pg 36
pg 36
I_SCSI_TST_RST_N
stub
pg 8
stub
pg 36
CPLD_ROMB_BAT_STAT1 CPLD_ROMB_BAT_STAT2
I_RISER_PWRGOOD
CPLD_CHARGER_EN
I_ROMB_FLSH_RST_N_R
I_DDR_DIMM_RST_N
GPO_SCSI_IDSEL_DIS
ROMB_SWITCH_1P8_EN_
CPLD_REV_BIT1
CPLD_REV_BIT0
R442
22-5%
RISER_TYPE2
R700
1 2
22-5%
RISER_TYPE1 RISER_TYPE0
21
SCSI_TST_RST_N
8 8
R322
36
1 2
11
22-5%
ROMB_FLSH_RST_N
R441
1 2
7
22-5%
11 36
36 36 36
13,36
RISER_PWRGOOD
10
DDR_DIMM_RST_N
4
6,36
A05_SMR - connected pin 33 of CPLD through zero ohm R1002 on page 11
R340
1 2
12
+3.3V_AUX
+3.3V_RSR
R212
R529
PD_INTRUSION_CABLE_PRSNT_N
ROMB_SWITCH_1P8VAUX_EN_N
1 2
2.2K-5%
4.7K
1 2
ROMB_NVRAM_EN_N
CPLD_CKE
RISER_HEATSINK_PRES_N
36
11,36
A05_SMR - Removed R271 since CPLD output no longer used
10,36
12,36
35,36
text names are cpld code names
SHIFTY_RISER_DATA_UP
4
NVRAM_EN_N
NC_CPLD_P19
8,10 8,10
10,36
8,11 8,11
12,36
35,36
SHIFTY_RISER_LATCH
4
SHIFTY_RISER_DATA_DN
4
ROMB_A20 ROMB_A19
ROMB_NVRAM_EN_N SHIFTY_RISER_CLK
4
DOBSON_PCE1_EN_N
8
LI_BAT_PRSNT_N ROMB_BAT_EN_N
CPLD_CKE
RISER_HEATSINK_PRES_N
R30
33-5%
3
VCCINT1
37
VCCINT2
21
stub
I_SHIFTY_RISER_DATA_UP_R
pg 8
pg 36
pg 11
pg 8
pg 36
pg 36
8 12 13
9 10
11 15 18 16 23
17 19
20
IO2/FB1 IO3/FB1 IO4/FB1 IO5/FB1 IO6/FB1
IO8/FB1 IO9/GCK1 IO10/FB1 IO11/GCK2 IO12/FB1
IO14/GCK3 IO15/FB1
IO17/FB1
VCCIO1 VCCIO2
IO2/FB3 IO3/FB3 IO4/FB3 IO5/FB3 IO6/FB3
IO8/FB3
IO9/FB3 IO10/FB3 IO11/FB3 IO12/FB3
IO14/FB3 IO15/FB3 IO16/FB3 IO17/FB3
R353
2
8.2K-5% 8.2K-5% R50
32,36
1.5K-5%
1 2
SYSTEM_RISER_PWRGD_NEW
+3.3V_AUX
21
R881
NP
R869
X
1 2
2.2K-5%
2.2K-5%
12,29
V1P5V_EN
CPLD_RBAT_EN
CPLD_PCI_RST_RISER_BUF_N
11,36
1P8V_PWRGOOD
1P5V_DC2DC_PWRGOOD
29
1P5V_EN
29
1P8V_EN
29
3P3VAUX_PWRGOOD_CPLD_BUF
4
SYSTEM_PWRGOOD_RISER
4
PCI_RST_RISER_BUF_N
4
ROMB_BAT_STAT1
11
ROMB_BAT_STAT2
11
I_SYSTEM_PWRGOOD_RISER_BUF_5V
36
I_PCI_RST_CPLD
36
ROMB_SWITCH_1P8VAUX_EN_N
PD_INTRUSION_CABLE_PRSNT_N
36
pg 29
pg 29
pg 4
pg 11
pg 11
pg 36
pg 36
pg 36
60 58 59 61 62
63 64
1 2 4
5
7
14 21 41 54
IO2/FB2 IO3/FB2 IO4/FB2 IO5/FB2 IO6/FB2
IO8/FB2 IO9/GSR IO10/FB2 IO11/GTS2 IO12/FB2
IO14/GTS1
IO17/FB2
GND_14 GND_21 GND_41 GND_54
IO2/FB4 IO3/FB4 IO4/FB4 IO5/FB4 IO6/FB4
IO8/FB4
IO10/FB4 IO11/FB4 IO12/FB4
IO14/FB4 IO15/FB4IO15/FB2
IO17/FB4
TCK
TDI TDO TMS
43 46 47 44 49
45
51 48 52
50 566
57
30 28 53 29
pg 36
pg 36
pg 36
pg 36
pg 29
pg 12
I_SYSTEM_PWRGOOD_RISER_BUF3
stub
stub
pg 36
pg 36
pg 36
pg 36
pg 36
I_SYSTEM_PWRGOOD_RISER_SLOTS
SYSTEM_RISER_PWRGD_NEW
INT_CPLD_TCK_R
ISO_CPLD_TD2
ISO_CPLD_TD3
INT_CPLD_TMS
CPLD_DEBUG_LED0 CPLD_DEBUG_LED1 CPLD_DEBUG_LED2 CPLD_DEBUG_LED3
5V_RISER_PWRGOOD
3P3V_RISER_PWRGOOD
5V_EN
3P3V_EN
I_SYSTEM_PWRGOOD_RISER_CPLD_N
1 2
CPLD_TDI
CPLD_TDO
36 36 36
R320
100-5%
36 36 36 36 29
12,29
29
29,32
32,36
R451
1 2
R467
68-5%
stubstub
INT_CPLD_TCK
21
0-5%
R795
1 2
22-5%
36
SYSTEM_PWRGOOD_RISER_BUF3
SYSTEM_PWRGOOD_RISER_SLOTS
SYSTEM_PWRGOOD_RISER_RST_BUF
8,17
32
7,16
2
Dobson p7
PCI_RST_RISER_BUF1_N
7
PCI_RST_RISER_BUF2_N
12
ROMB U37 p12
PCI_RST_RISER_BUF4_N
16
PXH p16
R448
1 2
22-5%
R454
1 2
22-5%
R440
1 2
22-5%
I_PCI_RST_CPLD
XC9572XL-VQ
+5V_RSR
SUB=SUB*_W8714
C75
100pF
1 2
50V-10%
A04_SMR - added part number for RevD CPLD
12
36
R640
4.7K
Dobson Isolation p7 PXH Isolation p16
R497
7,11,16
SYSTEM_PWRGOOD_RISER_BUF_5V
1 2
I_SYSTEM_PWRGOOD_RISER_BUF_5V
36
old PN: X3361
22-5%
3
+3.3V_AUX
R160
1 2
NP
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
NP
8.2K-5%
R666
CPLD_TCK
4
0-5%
R662
0-5% R663
0-5%
21
CPLD_TDO
CPLD_TD3
4
NP
4 4
4
CPLD_TD2
4
CPLD_TMS
R8
0-5%
21
X
1 2
X
R307
R128
R58
X
36
21
R667
21
CPLD JTAG
INT_CPLD_TMS
CPLD_TDI
CPLD_TDO
INT_CPLD_TCK
INT_CPLD_TCK
36
CPLD_TDI
36
36
36
36
36
+3.3V_AUX
J_CPLD_JTAG
NP
1 2 3 4 5
X
6
Riser Type 5Ue = 110
+3.3V_AUX
+3.3V_AUX
Battery Status 1
36
CPLD_DEBUG_LED0
Battery Status 2
36
CPLD_DEBUG_LED1
System Power good
36
CPLD_DEBUG_LED2
Shifty clock
36
CPLD_DEBUG_LED3
NP
NP
NP
NP
DS4
GREEN
DS5
GREEN
DS3
GREEN
DS2
GREEN
12
X
12
X
12
X
12
X
I_DS4_PG36_P1
stub
I_DS5_PG36_P1
stub
I_DS3_PG36_P1
stub
I_DS2_PG36_P1
stub
NP
NP
NP
NP
R406
220
R404
220
R403
220
R402
220
21
X
21
X
21
X
21
X
CPLD_REV_BIT1
36
CPLD_REV_BIT0
36
RISER_TYPE2
36
RISER_TYPE1
36
RISER_TYPE0
36
NP
R618
X
1 2
21
R122
8.2K-5%
NP
220
X
R619
1 2
21
R121
8.2K-5%
NP
220
R620
1 2
21
R615
X
8.2K-5%
220
Riser Rev
01
R621
1 2
NP
21
R617
X
NP
8.2K-5%
220
R622
X
1 2
21
R616
8.2K-5%
220
Riser Type 1U = 000
2U = 001 5U = 010 (obsolete)
5Ue = 110 1Ue = 100 2Ue = 101 1Up = 111
+3.3V_AUX
+3.3V
+5V_RSR
4-2U,7-3W,8-2X,11-2U,16-2U 19-3W,21-3W,22-3W,23-3W,24-3W 30-2W,31-3W,32-2T,33-3V
4,5,19,31-33
10,11,15,21-24,29
3
0-5%
INT_CPLD_TMS
36
p/u for TCK at SIO on planar
A B
For debug purpose only
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2-24-2005_11:44
TITLE
DWG NO.
DATE
DC
INC.
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
36 OF 45
Page 37
B D
CA
PowerGood Block Diagram
HS3 CONN
RISER_VRM_EN_1
1
RISER_VRM_EN_2
Shifty Bus
1
Shifty Bus
Shifty Bus
RISER_VRM_EN_1 RISER_VRM_EN_2
1P8V_EN
1P8V_EN
40W DC2DCs
DOBSON
1
3P3VAUX_PWRGOOD
RISER_PWR_GOOD
SYSTEM_PWRGOOD_RISER
3P3VAUX_PWRGOOD
RISER_PWR_GOOD
SYSTEM_PWRGOOD_RISER
1P8V_PWRGD
1P5V_EN
1P5V_PWRGD
3P3V_EN
3P3V_PWRGD
5V_EN
5V_PWRGD
1P8V_PWRGD
1P5V_EN
1P5V_PWRGD
3P3V_EN
3P3V_PWRGD
5V_EN
5V_PWRGD
SYSTEM_PWRGOOD_RISER
IOP_PWR_DELAY
SCH PAGE 8
100W DC2DCs
PXH
SYSTEM_PWRGOOD_RISER
PLANAR
SCH PAGE 4
SCH PAGE 36
SCH PAGE 29
CPLD
SCH PAGE 17
SCH PAGE 5
2
2
1P8V_PWRGD
Gold FIngers
SLOT6_PWRGD
SLOT6_CLOCK_ENABLE
SCH PAGE 12
SLOT7_CLOCK_ENABLE
SLOT7_PWRGD
SLOT6
3
3
Hot Plug Controller
SLOT6_PWRGD
MCHINT
I2C
SLOT7_PWRGD
SCH PAGE 29 & 30 & 31
SCH PAGE 23
SLOT6_PWRGD
SLOT7
SLOT7_PWRGD
SCH PAGE 24
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
2-23-2005_9:37
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
37 OF 45
DC
A B
Page 38
B D
CA
5U Riser I2C Map
2 pF per inch of trace
Function Type Bus
FRU
24C02
I2C_SEG3_AUX
Addr Page
A2
30
PLANAR
1
Temperature
Temperature
Temperature
LM75A
LM75A
LM75A
I2C_SEG3_AUX
I2C_SEG3_AUX
I2C_SEG3_AUX
92
92
92
30
30
30
I2C Block Diagram
ICH5
pg33
U5
MUX
pg35
MCH
pg17
Seg0 Seg3
DOBSON
HS3 CONN
1
ICH_SEG3 SCH PAGE 8
1
ADDRESS A4h
Dobson
DDR-2
PXH
PCA9555
MIC2951A
Planar I2C Map
ROMB Key
Dobson
SPD
PXH
PCA9555
MC2951
24C02
ICH_SEG3
ICH_SEG0
ICH_SEG0
ICH_SEG0
ICH_SEG3
A4ICH_SEG3
AE
C0
40h
8Eh
A8
8
6
16
32
33
PCI Slot
14 pF 10 pF pin + 1 in (2 pF per in) trace + 2 pF conn pin cap = 14pF
43 pF 40 pF + 3 pF conn pin cap = 43 pF
BMC
Seg3_Vaux
SCH PAGE 4
ICH_SEG3 SCH PAGE 6
DOBSON ROMB DIMM
ADDRESS AEh
PXH
LM75A
ICH_SEG3_VAUX
SCH PAGE 30
ADDRESS 92h
LM75A
ICH_SEG3_VAUX
2
MCH
MCH ICH_SEG0
ICH_SEG0PXH PXH
C4
60
BP Daughter Card
ICH_SEG0 SCH PAGE 16
SCH PAGE 30
ADDRESS 94h
2
PageAddrBusTypeFunction
ICH5 ICH5 ICH_SEG0
Proc Temp
Planar Temp
ICH_SEG0ICH5
ICH_SEG0ICH5
??? 12 pF
2E
24C02FRU I2C_SEG3_AUX
I2C_SEG3_AUX24C02
AA
C2GEM
ADDRESS C0h
LM75A
90
ICH_SEG3_VAUX
Tabor 1
ICH_SEG0ICH5
80
BackPlane
SCH PAGE 30
Tabor 0
CPLD
Sel
RAC
CK409b
ICH5 ICH_SEG0
ICH5 ICH_SEG0
3
DB800
ICH_SEG0ICH5
ICH_SEG0ICH5
ICH_SEG0ICH5
ICH_SEG0ICH5
82
4A
A0
30
D2
DC
10 pF
24C02FRU
GEM
Temperature
Temperature LM75A
LM81
BusTypeFunction
I2C_SEG3_AUX
I2C_SEG3_AUXLM75A
I2C_SEG3_AUX
I2C_SEG3_AUX
AE
C0
58
90
PageAddr
PCA9555
ICH_SEG3_VAUX
HP_SEG0
ADDRESS 96h
FRU
3
PS1 Temp
PS1 FRU
PS1 I2C Exp
PS2 Temp
PS2 FRU
PS2 I2C Exp
DIMMs
ICH5 ICH_SEG0
ICH5 ICH_SEG0
ICH5 ICH_SEG0
ICH_SEG0ICH5
ICH_SEG0ICH5
ICH_SEG0ICH5
ICH5 ICH_SEG0
34
AC
7C
9C
AE
7E
A0,A2,A4 A6,A8,AA
Control Panel
Function Type Bus Addr Page
AAI2C_SEG3_AUXFRU 24C02
LM75A I2C_SEG3_AUX
98temp
1 x 2 Drive Cage
PageAddrBusTypeFunction
3P3_VAUX
ADDRESS A2h
ADDRESS 40h
SCH PAGE 32 SCH PAGE 30
MIC2951A
HP_SEG0
3P3_VAUX
ADDRESS 8Eh
24C02FRU I2C_SEG3_AUX AA
0 to 100 pF
100 to 200 pF
4 4
200 to 300 pF 300 to 400 pF
8.2k to 1.2k pull up
4.7k to 1.2k pull up
3.3k to 1.2k pull up
2.2k to 1.2k pull up
temp I2C_SEG3_AUXLM75A
90
C4LM75A I2C_SEG3_AUXGEM
I2C Risetime Spec Standard
Fast High Speed
1000 nsec 300 nsec 20-80 nsec
SCH PAGE 33
INC.
ROUND ROCK,TEXAS
TITLE
HOW MANY LOADS ON EACH I2C??? Do not use K1421FDN337 or MGSF2N02 FETs as they have very highcapacitance at low VDS, 100s of pF
2-23-2005_9:37
SCHEM, RSR, PE2800, SV
PCA9515 I2C load isolation IC
Do not use K1421, BSS138 FETs as they have very high capacitance at low VDS, 100s of pF
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
38 OF 45
A B
DC
Page 39
B D
CA
SLOT1
Intel PCI Express PME Event Chain (Option 2)
System is asleep
Slot generates PME
PME Pulls Wake Through Diode
Gold Fingers PCIL_5V_PME_N
1
PME Block Diagram
PLANAR
PCIL_5V_PME_N
Wake awakens the System
1
PXH / Dobson sends PME Message to Lindy
SCH PAGE 19
Lindy sends PME to ICH5
ICH5 sees PME, does Interrupt
MCH
ICH5R
MCH_EXPHPINTR_N E6
PCI EXP A X8
SCH PAGE 17
PCI
MCH_GPE_N MCH_PME_N
MCH_GPE_N MCH_PME_N
L25
M24
W5
HS3 CONN
PCI EXP A x8
PCI EXP C hi x4
PCI EXP B lo x4
PCI EXP C lo x4
RISER_EXP_PME_N
RISER_PCI_PME_N
MCH_EXPHPINTR_N
PCI EXP C HI X4
PXH_PCIX_B_GATE_PME_N
PXH
SCH PAGE 16
SYSTEM_PWRGOOD_RISER_BUF
FET
SCH PAGE 16
Diode
RISER_PCI_PME_N
SLOT2
PXH_PB_PME_N
SCH PAGE 21
SLOT3
BIOS Finds PME Source Device
BIOS Clears PME
BIOS Handles Interrupt
PCI Express PME Event Chain (Option 1)
System is asleep
Slot generates PME
ICH5 sees PME, Wakes System, does Interrupt
BIOS Finds PME Source Device
PXH_PB_PME_N
BIOS Clears PME
ICH_PME_N
2
SIO_PME_NRI
SCH PAGE 33
SCH PAGE 4
PXH_PCIX_A_GATE_PME_N
RISER_PCI_PME_N
SCH PAGE 16
BIOS Handles Interrupt
2
PXH
PME_NIC_CPLD_N
PCI_A_PME_N
PCI EXP A X8
GOLD FINGERS
PCI EXP B X8
PCI_B_PME_N
SYSTEM_PWRGOOD_RISER_BUF
FET
SCH PAGE 22
RISER_PCI_PME_N
SLOT4
SCH PAGE 28
RISER_PCI_PME_N PCIL_5V_PME_N
RISER_PCI_PME_N
SCH PAGE 16
PXH_PA_PME_N
Diode
TABOR
SCH PAGE 23
SLOT5
PCI-X A
SCH PAGE 24
PCI_A_PME_N
SCH PAGE 5
IOP_PCIX_A_PME_N
DOBSON
SCH PAGE 16
SYSTEM_PWRGOOD_RISER_BUF
RISER_PCI_PME_N
FET
3
PCI EXP A X8
TABOR
PCI EXP A x8
IOP_PCIX_B_PME_N
SLOT5_PME_N
SCH PAGE 7
3
PCI-X B
SCH PAGE 25
PME_NIC_CPLD_N
PCI_B_PME_N
CPLD
ICH_PME_N
PULLUPS on PLANAR
RISER_PCI_PME_N
RISER_EXP_PME_N
SCH PAGE 7
Hot Plug PME Isolation
RISER_PCI_PME_N
Diode
SCH PAGE 7
PCI EXP B lo x4
SCH PAGE 24
SLOT6
SCH PAGE 25
SCH PAGE 5
4 4
SCH PAGE 37
RISER_PCI_PME_N
PCIE_PME_N
SLOT6_WAKE_N SLOT6_WAKE_N
SLOT7_WAKE_N
SCH PAGE 32
PCI EXP C lo x4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
SLOT7
SLOT7_WAKE_N
SCH PAGE 26
2-23-2005_9:37
TITLE
DWG NO.
DATE
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
39 OF 45
A B
DC
Page 40
B D
CA
Reset Block Diagram
ROMB
LEGACY 5V
FLASH
PLANAR
LEVEL TRANSLATOR
HS3 CONN
PCI EXP A x8
PCI_RST_RISER_BUF_N
PCI EXP C hi x4
1
PCI EXP B lo x4
PCI EXP C lo x4
PCI_RST_RISER_BUF_N
74VHC08
PCI_RST_RISER_BUF_N
PCI_RST_RISER_N
PCI_RST_RISER_N
CPLD p36
CPLD
ROMB_FLSH_RST_N
DDR_DIMM_RST
ROMB_FLSH_RST_N
SCH PAGE 20
SCH PAGE 10
DDR_DIMM_RST
PCIL_5V_RST_N
SLOT1
PCIL_5V_RST_N
1
SCH PAGE 19
SCH PAGE 4
SCH PAGE 4
Slot1 p20
PCI_RST_RISER_BUF3_N
SCH PAGE 37
DDR DIMM
SCH PAGE 6
SLOT2
SCH PAGE 19
PXH_PCIX_B_RST_N
PCI_RST_RISER_BUF_N
SLOT6
SLOT3
2
PCI EXP B lo x4
2
PXH
SCH PAGE 23
PCI EXP C hi x4
PCI EXP C hi x4
SCH PAGE 16
PXH_PCIX_A_RST_N
SCH PAGE 20
SLOT4
PXH_PCIX_A_RST_N
SLOT7
PCI EXP C lo x4
PCI EXP A x8
SCH PAGE 24
3
SCH PAGE 21
3
SHOW PULLUPS
PCI EXP A x8
PCI_RST_RISER_BUF_N
SCH PAGE 7
DOBSON
IOP_PCIX_A_RST_N
IOP_PCIX_B_RST_N
LSI 1030
IOP_PCIX_A_RST_N
SCH PAGE 13
SLOT5
IOP_PCIX_B_RST_N
SCH PAGE 22
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
INC.
TITLE
2-23-2005_9:37
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
40 OF 45
A B
DC
Page 41
B D
CA
100W DC2DC
+5V_rsr
Power Distribution Block Diagram
BATTERY OUT = 4.2V to 3.0V
+5V out
PLANAR
HS3 CONN
+12V
+3.3V
+5V
1
+3.3Vaux
+3.3V_SENSE
+12V in
5V_EN
SWITCHER
SCH PAGE 27
100W DC2DC
Iout
5V_PWRGD
22AmpsImax
??Amps
+3.3V_RSR 1.2A
+1.8V 0.9A 0.46W +1.5V 5.74W
+1.35V 0.5A 0.48W
Total 9.7W
+3.3V_rsr SCH PAGE 9
DOBSON
CurrentVoltage
4.1A
Thermal Power
3.02W
Battery
SCH PAGE 10
LI_BAT_PACK_P
+5V_rsr
+3.3V_rsr
ROMB FLASH
ROMB
NVSRAM
1
+3.3V_rsr
Battery Circuit
+3.3V out
SCH PAGE 10
SCH PAGE 10
SCH PAGE 4
GOLD FINGERS
+12V in
3P3V_EN
SWITCHER
SCH PAGE 27
40W DC2DC
+12V in
Imax Iout
+1.8V out
3P3V_PWRGD
??Amps ??Amps
+1.8V
+3.3Vaux
SCH PAGE 37
CPLD
VBAT_RAID is 1.8V rail powered by battery or 3.3Vaux
+3.3Vaux
SCH PAGE 10 & 11
(1.8V)
VBAT_RAID
8.5A
DDR DIMM
+12V
1P8V_EN
+3.3V
+5V
2
SWITCHER
SCH PAGE 27
Imax Iout
40W DC2DC
+1.5V out
+12V in
1P8V_PWRGD
??Amps ??Amps
+1.5V
+3.3V_RSR
+1.8V
+3.3V_RSR
+1.8V
SCH PAGE 14
LSI 1030
CurrentVoltage
1A
1.8A
Total
Thermal Power
3W 3W
6W
EEPROM
+3.3V_rsr
SCH PAGE 14
SCSI TERM POWER
+5V_rsr 2 Amps max
SCH PAGE 6
+-5%
+12V
CURRENT DRAW PER SLOT 5
0.5A
MAX DRAW
0.5A
SLOT
0.5A 2A
TOTAL DRAW
2
SLOT2
SCH PAGE 19
SLOT3
1P5V_EN
SWITCHER
SCH PAGE 27
Imax Iout
1P5V_PWRGD
??Amps ??Amps
PXH
Voltage Current +3.3V_RSR 1.6A 4.81W
Thermal Power
SCH PAGE 15
+3.3Vaux
LM75
SCH PAGE 28
LM75
SCH PAGE 28
+-5%
+-5%
+-5%
+-10%
+3.3V_RSR
+5V_RSR
+3.3Vaux
-12V
4.5A 21.1A
3A 14A
0.02A
0.1A
7.6A
5A
0.375A
0.1A
7.6A
3A
0.375A 0.435A
0.1A 0.4A
SCH PAGE 20
SLOT4
SCH PAGE 21
SLOT5
+1.5V_Core
2.16A
SCH PAGE 22
LM75
SCH PAGE 5
-12V INVERTOR
+12V in
-12V_EN
-12V out
-12V
+1.5V_PCI-X
+1.5V_PCI-EXP
+1.5V Total 4.01W
Total 8.89W
SCH PAGE 17
0.22A
0.70A
3.08A
SCH PAGE 28
+5V_RSR +3.3V_RSR +12V
-12V
+3.3Vaux
max cap min slew max slew
3000uF 3000uF 300uF 150uF
25 V/us 3300 V/us
16.5 V/us 60 V/us
60 V/us
16.5 V/us150uF
3300 V/us 33000 V/us 66000 V/us 3300 V/us
SLOT6
FRU
Imax
SWITCHER
SCH PAGE 26
3
Iout
2.5V SHUNT VREG
??Amps ??Amps
+2.5Vaux
+3.3Vaux
Slot6_3.3Vaux 0.375A Slot6_12V Slot6_3.3V
2.1A 3A
SCH PAGE 28
+3.3Vaux
3
Voltage ramp order
+2.5Vaux out
+3.3Vaux in
LINEAR
SCH PAGE 26
1.35V VREG
+3.3V_RSR in
Imax Iout
+1.35V out
??Amps ??Amps
+1.35V
+3.3V
+12V
+3.3Vaux
MIC2591A Hot Plug
Controller
SCH PAGE 31
Slot6_3.3Vaux Slot6_12V Slot6_3.3V
Slot6_3.3Vaux Slot6_12V Slot6_3.3V
SCH PAGE 23
SLOT7
Slot6_3.3Vaux Slot6_12V Slot6_3.3V
0.375A
2.1A 3A
+5V
LEGACY 5V
LEVEL TRANSLATOR
+12V
+3.3V
+5V
SLOT1
CURRENT DRAW
0.5A
4.5A
3A
MAX DRAW
0.5A
7.6A
5A
+3.3Vaux
0.02A
0.375A
MCH: 3.3V ramps before 1.5V, ie, 3.3V >= (1.5V -0.5) PXH: 3.3V ramps before 1.5V, ie, 3.3V >= (1.5V -0.5)
LINEAR
SCH PAGE 26
Imax Iout
??Amps ??Amps
SCH PAGE 24
SCH PAGE 33
-12V
0.1A
SCH PAGE 32
0.1A
Dobson: 3.3V ramps before 1.5V, ie, 3.3V >= (1.5V -0.5) LSI: 1.8V ramps before 3.3V, ie, (3.3-2V) <= 1.8V
4 4
Video: 1.8V ramps before 3.3V, ie, (3.3-2.1V) <= 1.8V
PXH: 3.3V / 1.5V diode carries 1.6A Dobson: 3.3V / 1.5V diode carries 1.2A
LSI: 3.3V / 1.8V diode carries 1A
ICH: 5Vref ramps up before 3.3V,ie, (3.3-0.7V) <= 5Vref
INC.
TITLE
ROUND ROCK,TEXAS
ICH: 5Vrefsus ramps up before 3.3Vaux
2-23-2005_9:37
SCHEM, RSR, PE2800, SV
Northway: Voltages ramp in descending order
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
F1314
2/23/2005
REV.
A06-00
SHEET
41 OF 45
A B
DC
Page 42
B D
CA
Clock Block Diagram
PLANAR
80 MHz Osc
CLK_SCSI_80MHZ
LSI 1030
HS3 CONN
CK_100M_DOBSON
CLK_SCSI_80MHZ
EEPROM
SCH PAGE 14
CK_100M_PXH
CK_100M_SLOT6
+3.3V_rsr
1
CK_100M_SLOT7
SHIFTY_RISER_CLK
CK_IOP_PCIX_A_LSI
CK_100M_DOBSON
IOP_SLOT5_PCICLK0
CK_IOP_PCIX_A_LSI
SCH PAGE 14
I2C
SCH PAGE 14
1
SLOT5
SCH PAGE 4
GOLD FINGERS
CK_33M_SLOT1
SLOT1
DOBSON
SCH PAGE 6 & 7
DDR_MCLK
DDR_MCLK
DDR DIMM
SCH PAGE 6
IOP_SLOT5_PCICLK0
SCH PAGE 22
LM75
IOP_SLOT5_PCICLK0
SCH PAGE 28
I2C
LM75
SCH PAGE 28
LM75
SCH PAGE 28
CPLD
SHIFTY_RISER_CLK
2
I2C
SCH PAGE 32
SLOT6_PWRGD GATES CK_100M_SLOT6
SLOT6_PWRGD
SCH PAGE 37
FRU
SCH PAGE 28
2
PCA9555
SLOT7_PWRGD GATES CK_100M_SLOT7
SLOT7_PWRGD
SCH PAGE 5
CK_100M_PXH
PXH
PXH_PCIX_B_PCLKO0_S2
PXH_PCIX_B_PCLKO1_S3
PXH_PCIX_A_PCLKO0_S4
SCH PAGE 16
PXH_PCIX_B_PCLKO0_S2
SLOT2
SCH PAGE 19
I2C
I2C
HOT PLUG GPIOs
SCH PAGE 30
MIC2591A
HOT PLUG CONTROLLER
SCH PAGE 31
3
3
SLOT6
SCH PAGE 23
CK_100M_SLOT6
PXH_PCIX_B_PCLKO1_S3
SLOT3
SCH PAGE 20
PXH_PCIX_A_PCLKO0_S4
SLOT4
SLOT7
SCH PAGE 24
CK_100M_SLOT7
4 4
SCH PAGE 21
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2-23-2005_9:37
TITLE
DWG NO.
DATE
DC
INC.
SCHEM, RSR, PE2800, SV
F1314
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
42 OF 45
Page 43
B D
CA
SLOT1
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N
1
1
PLANAR
MCH
INT Block Diagram
PCI EXP A X8
PCI EXP B X8
PCI EXP C X8
MCH_EXPHPINTR_N E6
MCH_GPE_N MCH_PME_N
L25
M24
HS3 CONN
PCI EXP A x8
PCI EXP C hi x4
PCI EXP B lo x4
PCI EXP C lo x4
MCH_EXPHPINTR_N
PXH_PCIX_A_IRQ0_N PXH_PCIX_A_IRQ1_N PXH_PCIX_A_IRQ2_N PXH_PCIX_A_IRQ3_N
SCH PAGE 32
SLOT2
SCH PAGE 17
SCH PAGE 19
ICH5R
MCH_GPE_N MCH_PME_N
W5
PXH_PCIX_A_IRQ0_N PXH_PCIX_A_IRQ1_N PXH_PCIX_A_IRQ2_N
PCI
PXH_PCIX_A_IRQ3_N
PXH_PCIX_A_IRQ4_N
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N
PCI EXP C HI X4
PXH
2
PXH_PCIX_A_IRQ5_N PXH_PCIX_A_IRQ6_N PXH_PCIX_A_IRQ7_N
PXH_PCIX_A_IRQ4_N PXH_PCIX_A_IRQ5_N PXH_PCIX_A_IRQ6_N PXH_PCIX_A_IRQ7_N
SLOT3
2
SCH PAGE 33
PXH_PCIX_A_IRQ8_N
SCH PAGE 4
SCH PAGE 16
PXH_PCIX_A_IRQ9_N PXH_PCIX_A_IRQ10_N PXH_PCIX_A_IRQ11_N
SCH PAGE 20
GOLD FINGERS
SCH PAGE 5
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N
PXH_PCIX_A_IRQ8_N PXH_PCIX_A_IRQ9_N PXH_PCIX_A_IRQ10_N PXH_PCIX_A_IRQ11_N
SLOT4
SCH PAGE 21
IOP_PCIX_B_INT5_N IOP_PCIX_B_INT6_N
SLOT5
DOBSON
3
IOP_PCIX_B_INT7_N IOP_PCIX_B_INT4_N
PCI EXP A X8
PCI EXP A x8
SCH PAGE 7
SCH PAGE 22
3
Hot Plug GPIOs
PULLUPS on PLANAR
SLOT6_PRSNT2_N SLOT6_ATTN_SW_N
SLOT6_PRSNT2_N
SLOT7_PRSNT2_N SLOT7_ATTN_SW_N
SLOT7_PRSNT2_N
PCI EXP B lo x4
SLOT6
SCH PAGE 23
Hot Plug Controller
SCH PAGE 37
SLOT7_FAULT_N
MCH_EXPHPINTR_N
SLOT6_FAULT_N
SLOT7
4 4
SCH PAGE 30
SCH PAGE 31
A B
PCI EXP C lo x4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
SCH PAGE 24
2-23-2005_9:37
TITLE
DWG NO.
DATE
DC
INC.
ROUND ROCK,TEXAS
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
43 OF 45
Page 44
B D
JTAG Block Diagram
J_CPLD_JTAG
CPLD
CA
SLOT1
JTAG
PXH
JTAG
JTAG
1
1
SCH PAGE 16
SCH PAGE 32
SCH PAGE 37
PLANAR
HS3 CONN
PCI EXP A x8
SLOT2
DOBSON
MCH
PCI EXP C hi x4
PCI EXP A X8
PCI EXP B X8
PCI EXP C X8
SCH PAGE 17
PCI EXP B lo x4
PCI EXP C lo x4
MCH_EXPHPINTR_N
JTAG
SCH PAGE 19
JTAG
SCH PAGE 8
ICH5R
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N
LSI 1030
SLOT3
PCI
JTAG
2
SCH PAGE 33
SCH PAGE 4
SCH PAGE 20
GOLD
JTAG ICE
JTAG
2
SCH PAGE 13
FINGERS
SCH PAGE 5
ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N
SLOT4
JTAG
SCH PAGE 21
SLOT5
3
JTAG
SCH PAGE 22
PULLUPS on PLANAR
pullups depop'd
CPLD_TCK 5,31,32,40,46 CPLD_TMS 5,31,32,40,46
pullups pop'd
CPLD_TD2 5,40 CPLD_TD3 5,40
5U riser sch page 36
3
Riser
SLOT6
CPLD
Input/Output
NO PULLUPS ON PLANAR
CPLD_TD1 5,46 CPLD_TD2 5,31,46 CPLD_TD3 31, 32
Planar
Lattice
SCH PAGE 37
CPLD_TCK 5,31,32,40,46 CPLD_TDI 5,40 CPLD_TDO 5,40 CPLD_TMS 5,31,32,40,46
pullups pop'd
planar sch page 40
CPLD ESM BMC
SIO
planar sch page 40
4 4
Header
CPLD_TDI CPLD_TD2
planar sch page 5, 40 planar sch page 5, 46
Xilinx
CPLD_TCK 5,31,32,40,46 CPLD_TDI 5,40 CPLD_TD1 46 CPLD_TMS 5,31,32,40,46
planar sch page 5
CPLD_TD1
CPLD
CPLD_TDI CPLD_TDO CPLD_TD2 CPLD_TD3
CPLD_TCK 5,31,32,40 CPLD_TDI 5 CPLD_TD1 5,31 CPLD_TMS 5,31,32,40
planar sch page 46
planar sch page 5, 31,46
CPLD JTAG Chain
planar sch page 5
5U riser sch page 36
CPLD_TD2 CPLD_TD3
Riser HS3
5U riser sch page 4 planar sch page 31
planar sch page 31, 32
Backplane
planar sch page 5,32,40
CPLD_TD3
Gated by ~SPG Gated by ~SPG
planar sch page 32
Jumper
planar sch page 5
CPLD_TD0
JTAG
SCH PAGE 23
SLOT7
JTAG
SCH PAGE 24
Series resistor with pull-down
Series resistor
Defaults high
VAux rail
VBat rail
OD/Output
Pullup
INC.
CPLD_TCK 5,31,32,40,46 CPLD_TDI 5,40
ROUND ROCK,TEXAS
CPLD_TDO 5,32,40 CPLD_TMS 5,31,32,40,46
TITLE
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2-23-2005_9:37
DWG NO.
DATE
DC
SCHEM, RSR, PE2800, SV
F1314
SHEET
2/23/2005
REV.
A06-00
44 OF 45
Page 45
B D
CA
1
Hot Plug Block Diagram
1
Planar
CPURST#
MCH
(p7,8)
PWRGD
SMBUS Master
MCH_GPE_NL25
RSTIN#
MCH_EXPHPINTR_N
E6
RSTIN#
PXH
(p22,23)
SMBUS Slave
PAPCIRST#
PBPCIRST#PWROK
MCH_EXPHPINTR_N
ICH_SEG0
2
VRMPWRGD
PWROK
MCH_GPE_N W5
RSMRST#
CPUPWRGD
I2C MUX
ICH_SEG0
2
ICH5
RTCRST#
(p12)
SMBUS Master
PWRBTN#
INIT#
PCIRST#
AC_RST#
HS3
Goldfingers
Riser
3.3V 12V
Slot 7
PCI Express
I2C
FET
HP Controller
(p22,23)
3
ICH_SEG0
Fet Isolation
AuxOn
On
MIC2591A
SMBUS Slave
Fault
AuxOn
Slot 6
FET FET
Fault
On
FET
12V3.3V
PCI Express
Slot 7
Slot 6
LEDPB
LED LEDPB
LED
3
Slot 7Slot 6
MCH_EXPHPINTR_N
Fet Isolation
ISO_MCH_EXPHPINTR_N
I2C
PWROK
I2C GPIO PCA9555
SMBUS Slave
(p22,23)
PBPCIRST#
Buffers
4 4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
2-23-2005_9:37
INC.
TITLE
SCHEM, RSR, PE2800, SV
DWG NO.
F1314
DATE
2/23/2005
ROUND ROCK,TEXAS
REV.
A06-00
SHEET
45 OF 45
DC
A B
Loading...