MSI MS-9573 Schematic 140

A B C

Dell Controlled Print

D

REVISIONS

Mechanical adds are on pages 4, 6, 13, 16, 35

REV

A00

DESCRIPTIONECO DATE

Production by Ross Amans164200

06/22/04

APPROVED

Randy Hemingway

Corvette 5U Riser

Part number subs on pages 10, 14, 30, 36

Programmables on pages 10 (U16), 14 (U14), and 36 (U31)

With Hot Plug PCI Express Slots

Debug parts on pages 10, 13, 27, 36

1

ROMB DDR2 DIMM

A01
A02
A03
A04
A05
A06

Spin by Ross Amans167100
166975 Spin by Ross Amans 09/08/04 Randy Hemingway
170371 New schematic for M8938 & M8871 PWAs

Changed CPLD to D-Rev (dell p/n: W8714) 10/21/04 Scott Ramsey171598
171436

177371

Added Xilinx Glitch workaround 10/29/04

Added current limit resistor on the 3.3V_RSR to the dimm SPD voltage

Page 1.
Page 2.
Page 3.

BLOCK DIAGRAM, INDEX
IDSEL/REQ/GNT/INT TABLE
Blank

08/11/04

10/10/04 Scott Ramsey

02/22/05

Randy Hemingway

Scott Ramsey
Neeraja Gedela

1

Page 4.
Page 5.
Page 6.
Page 7.
Page 8.
Page 9.
Page 10.
Page 11.
Page 12.
Page 13.
Page 14.
Page 15.
Page 16.
Page 17.
Page 18.

SCSI B (U320)

DDR2 400

PCI EXPRESS x8
x8 SLOT

PCI EXPRESS x4
x8 SLOT

C

HOT PLUG

B lo

Chassis Slot 7

Chassis Slot 6

PCIE Slot 7

PCIE Slot 6

DOBSON

Differential

Terminators

2

SCSI A (U320)

LSI1030

(SCSI)

CHNL A

A_PCIX

80332

500MHz

CHNL B

PCIX1

PCIX 1.0 (133MHz)

64bit, 3.3V

PCI Slot 5

Chassis Slot 5

6X25 HS3 CONNECTOR TO PLANAR
GOLD FINGERS TO PLANAR, SCSI CONNS TO BP
DOBSON MEMORY INTERFACE
DOBSON PCIX INTERFACE
DOBSON PCI EXPRESS
DOBSON GND POWER BATT
DOBSON FLASH NVRAM
ROMB BATT CNTRL CKT
ROMB MISC
SCSI LSI 1030
SCSI LSI 1030
SCSI TERM
PXH PCI INTERFACE
PXH POWER
PXH PCI EXPRESS, GND, PXH DECOUPLING

2

A Lo

SCSI B

SCSI A

x4 PCI Express

CHNL A

PCIX3

PCIX 1.0 (133 MHz)

64bit, 3.3V

PCI Slot 4

Chassis Slot 4

Page 19.
Page 20.
Page 21.
Page 22.

5V 32BIT LEGACY PCI SLOT 1
5V 32BIT LEGACY PCI SLOT LEVEL SHIFTERS
PCIX SLOT 2

PCIX SLOT 3
Page 23.
Page 24.

PXH

PCIX 1.0 (133 MHz)

64bit, 3.3V

PCIX 1.0 (133 MHz)

64bit, 3.3V

LEGACY PCI
32b/33M 5V

Part

Intel Part #

Dell P/N

x4 PCI Express

ACA

Lo Hi

Lo

A hi

I6700

C
Hi

CHNL B

PCIX2

B
Lo

3

Lindenhurst
Tumwater
Dobson
PXH
PXH-D
LSI 1030
PXH, Dobson Heatsink, Clip F2085, Y1978

/ LSI 1020 / D4195 C0Y3556 C0

E7520, NQ82001
E7525, NQE7525MCH R1806 C2
IOP332, NQ80332
I6700, NQ80000
???, NQ80001
53C1030, 62036A1

R7626 C4, W6123 C2, N1312 C2, U5928 C1

M6627 C1, F5290 C0

Y5218 C1
C5604 C0

NEW PWAs:

M8871 - A00 PWB w/ Xilinx Rework
M8938 - A01 PWB w/ Xilinx Rework

6x25 HS3 Connector

T8384 - New PWA which has PWB A02 (includes FET for Xilinx workaround)

202 pin Gold Fingers Card Edge

Input/Output
Series resistor
Series resistor with pull-down
Defaults high
VAux rail
VBat rail

Chassis Slot 3

Chassis Slot 2

Chassis Slot 1

PCI Slot 3

PCI Slot 2

PCI Slot 1

Page 25.
Page 26.
Page 27.
Page 28.
Page 29.
Page 30.
Page 31.
Page 32.
Page 33.
Page 34.
Page 35.
Page 36.
Page 37.
Page 38.
Page 39.
Page 40.
Page 41.
Page 42.
Page 43.
Page 44.
Page 45.

PCIX SLOT 4

PCIX SLOT 5

PCI EXPRESS SLOT 6

PCI EXPRESS SLOT 7

DEBUG HEADERS

LINEARS, INVERTOR

DC2DCs

INTRUSION/FRU/TEMP SENSOR

PCI EXPRESS HOT PLUG SWITCHES, LEDS

PCI EXPRESS HOT PLUG LOGIC

PCI EXPRESS HOT PLUG LOGIC

Virtual points for PCI-X shared slot simulation, Spare Gates

COUPONS, HARDWARE

CPLD

POWERGOOD BLOCK DIAGRAM

I2C ISOLATION, I2C BLOCK DIAGRAM, I2C ADDRESS CHART

PME BLOCK DIAGRAM

RESET BLOCK DIAGRAM

POWER DISTRIBUTION BLOCK DIAGRAM

CLOCK BLOCK DIAGRAM

INT BLOCK DIAGRAM

JTAG BLOCK DIAGRAM

HOT PLUG BLOCK DIAGRAM

3

8C288LSI SCSI Heatsink

ROMB Battery G3399

Clear

A1, A2

XLBOM Build Options

1U, Production
2U/5U Production

0A0 RedRed
1

GC654 - New PWA - Changes to limit the current to the ROMB SPD

PWB/Silk ColorPWB Color Chipset Rev

x00White

PWA:

PWB:

GC654
DC876

x01WhiteRed

SCHEM:

F1314

Corvette 5U RISER

Clear White x01

Green

B0, C0, C1

4

1U, Debug 2
2U/5U Debug 3

Clear White x02
Green Yellow x03

WhiteGreen

x04

Green White a00

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

ASSY DWG:

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY
OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN
WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC.
UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE
OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED
FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE
LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

HC375

PROPRIETARY NOTE

OD/Output
Pullup

2-24-2005_14:21

DRAWN
DESIGNED
CHECKED
APPROVED
APPROVED
APPROVED
APPROVED
RELEASED

Ross Amans
Ross Amans
Randy Hemingway
Randy Hemingway

21 June, 2004
21 June, 2004
21 June, 2004
21 June, 2004

XLBOM Build option table

0 Production Build
9 Prototype Build

A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO

ECO
ECO
ECO
ECO
ECO
ECO
ECO

TITLE

DWG NO.

164200 06/22/04
166975 09/08/04

170371 10/10/04
171436
177371

SCHEM, RSR, PE2800, SV

SUB=POP0

SUB=POP9

DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE

INC.

F1314

DATE

2/23/2005

08/11/04167100

10/29/04
02/22/05

4

ROUND ROCK,TEXAS

REV.

A06-00

SHEET

1 OF 45

DCBA

Corvette 5U RISER PCI DEVICE CHART

B D

CA

Device#

Function#

Device

Device#

IDSEL IRQD#IRQB# IRQC# REQ#IRQA#

GNT#

IRQA IRQB IRQC IRQD

Used On

1

Bus / Default Bus Number

BUS 0X09h

--

5U PCIX Slot 5

IOP DEVICE B

AD27

INT

IOPIOPIOPIOPIOP

XINT7XINT6XINT5

XINT4

REQ0#

IOP

GNT0#

1U, 2U, 5U
5U PG 8,24

A
B
C

IDSEL XINT
16, 20, 24, 28

17, 21, 25, 29
18, 22, 26, 30

0, 4
1, 5

2, 6

1

A.Lo B / 3

19, 23, 27, 31

3, 7

IOP

D

IOP IOP IOP IOP

1U

BUS 0X0Bh

--

(IOP SLOT_1)

(AD28)

XINT4

XINT5XINT7XINT6

(REQ1#)

(GNT1#)

A.Lo B

Dobson IOP

(fixed)

(fixed)

IOP

BUS 0X0Ah

A.Lo / 2

0,1

IOP DEVICE E

AD30

(internal)

XINT2

(internal)

INT0

(Debug)

1U, 2U, 5U

U320 SCSI

BUS 0X08h

0,1

IOP DEVICE 5

AD21

XINT1XINT2

REQ0#

GNT0#

1U, 2U, 5U

A.Lo A / 2

PXHPXHPXHPXHPXHPXH

BUS 0X04h

2

A.Hi A

--

5U PCIX Slot 4

AD20

A_IRQ8A_IRQ11A_IRQ10

A_IRQ9

GNT0#REQ0#

2U, 5U

2

BUS 0X05h

A.Hi B

BUS 0X06h

A.Hi B

BUS 0X07h

ICH (planar)

--

--

--

5U PCIX Slot 3

5U PCIX Slot 2

5U PCI Slot 1

5V 32b

AD19

AD18

AD17

PXH PXH PXH PXH PXH PXH

A_IRQ7A_IRQ6A_IRQ5

A_IRQ4

REQ1# GNT1#

PXH PXH PXH PXH PXH PXH

GNT2#REQ2#

PIRQA

ICH (planar)ICH (planar)

PIRQB

A_IRQ2A_IRQ31A_IRQ0

A_IRQ3

ICH ICH ICH ICH

PIRQA

PIRQB

REQ?# GNT?#

2U, 5U

2U, 5U

5U

BUS 0X01h

--

Ethernet A

PXH (planar)PXH (planar)

4

AD23

A_IRQ0

PXHPXHPXHPXH

Planar

GNT?#REQ?#

B.Hi A

PXH (planar)PXH (planar)

PXH PXH PXH PXH

BUS 0X02h

3

B.Hi B

--

Ethernet B

4

AD24

BUS 0X0Eh

A_IRQ1

GNT?#REQ?#

ICH (planar)ICH (planar)

ICHICHICHICH

Planar

3

Planar

ICH (planar)

--

Video

AD29

INT? INT? INT? INT? REQ?# GNT?#

BUS 0X0Ch

ICH (planar)

BUS 0X0Dh

ICH (planar)

--

--

Rac
Agilent SP2

RAC - IDE

Debug Slot

AD21

AD22

AD19

ICH (planar)ICH (planar)

ICH ICH ICH ICH

INT? INT? INT? INT? REQ?# GNT?#

ICH (planar)ICH (planar)

ICHICHICHICH

GNT?#REQ?#INT?INT?INT?INT?

Planar

Planar

B.LoMCH (planar)

MCH (planar)
MCH (planar)

4 4

B.Lo

C

MCH (planar)
MCH (planar)

MCH (planar)
MCH (planar)

B.Lo
A.hi
A.Lo
B.hi

Slot 6
Slot 7C

6Slot 7MCH (planar)

PXH (Planar) PXH (Planar)
PXH

Dobson
Slot 6

4
3

2
5

N/A
N/A

in the IOP, AD16-25 goes public or private as a group, not individuallyA.8 B key: Express Lane.width PCIX buss

MCH
MCH

MCH5

MCH

PXH
Dobson

MCH

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

2-23-2005_9:36

TITLE

DWG NO.

DATE

INC.

SCHEM, RSR, PE2800, SV

F1314

2/23/2005

SHEET

ROUND ROCK,TEXAS

REV.

2 OF 45

A06-00

A B

DC

B D

CA

1

1

2

2

This Page Left Blank Intentionally

3

3

4 4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

INC.

TITLE

SCHEM, RSR, PE2800, SV

DWG NO.

F1314

DATE

2/23/2005

ROUND ROCK,TEXAS

REV.

A06-00

SHEET

3 OF 45

DC

A B

B D

CA

ADD1=ADD*_0585R_RIVET
ADD2=ADD*_0585R_RIVET
ADD3=ADD*_0585R_RIVET

ADD1=ADD*_T6977_SCREW_GUIDE
ADD2=ADD*_T6977_SCREW_GUIDE

2-24-2005_11:43

ADD4=ADD*_F2670_GASKET

these should be floating

+3.3V

CONN2_GUIDE

MH1

NC1

MH2

R335

1 2

0-5%

NC_CONN1_GUIDE_MH1
NC_CONN1_GUIDE_MH2

CONN1_GUIDE

MH1

NC1

MH2

NC_CONN2_GUIDE_MH1
NC_CONN2_GUIDE_MH2

1

1

3P3V_RISER_SENSE

R365

4

RISER_PRES1_N

4

1 2

RISER_PRES_N

5

0-5%

+3.3V_AUX

NC_CONN1_GUIDE_MH3

CONN,. FEMALE GUIDE BLOCK

UNIVERSAL PWR MOD

MH3

NC2
NC3

NC_CONN2_GUIDE_MH3

CONN,. FEMALE GUIDE BLOCK

NC2

MH3

NC3

UNIVERSAL PWR MOD

PLANAR TO RISER TO PLANAR HS3

ROOM=RISER_CONN

+3.3V

+3.3V

A1

A1

B1

B1

C1

C1

D1

D1

E1

E1

F1

RISER_PRES1_N

4

This is other part of RISER_PRES_N

3P3V_RISER_SENSE

4

2

TD3 == TDO
TD2 == TDI

CK_100M_DOBSON_P

8

CK_100M_DOBSON_N

8

CK_100M_EXP_SPARE_P

27

CK_100M_EXP_SPARE_N

27

CK_100M_PXH_P

16

CK_100M_PXH_N

16

8,27
8,27

8,27
8,27

8,27
8,27

8,27
8,27

26
26

26
26
26
26
26
26

26
26
26
26
26
26

EXP_A_UP_7N
EXP_A_UP_7P
EXP_A_UP_3N
EXP_A_UP_3P
EXP_A_UP_6N
EXP_A_UP_6P

EXP_A_UP_2N
EXP_A_UP_2P
EXP_A_UP_5P
EXP_A_UP_5N
EXP_A_UP_1N
EXP_A_UP_1P

EXP_A_UP_4P
EXP_A_UP_4N
EXP_A_UP_0N
EXP_A_UP_0P
EXP_C_UP_5P
EXP_C_UP_5N

EXP_C_UP_4P
EXP_C_UP_4N
EXP_C_UP_6P
EXP_C_UP_6N
EXP_C_UP_7P
EXP_C_UP_7N

EXP_C_DN_5P
EXP_C_DN_5N
EXP_C_DN_4P
EXP_C_DN_4N
EXP_C_DN_6P
EXP_C_DN_6N

18,27
18,27

18,27
18,27

18,27
18,27

18,27
18,27

3

36
36
36
36

CPLD_TCK
CPLD_TD3
CPLD_TD2
CPLD_TMS

F1

A2
B2
C2
D2
E2

F2

A3
B3
C3
D3
E3

F3

A4
B4
C4
D4
E4

F4

A5
B5
C5
D5
E5

F5

A6
B6
C6
D6
E6

F6

A7
B7
C7
D7
E7

F7

A8
B8
C8
D8
E8

F8

A9
B9
C9
D9
E9

F9

A10

B10
C10
D10
E10

F10

A2
B2
C2
D2
E2
F2

A3
B3
C3
D3
E3
F3

A4
B4
C4
D4
E4
F4

A5
B5
C5
D5
E5
F5

A6
B6
C6
D6
E6
F6

A7
B7
C7
D7
E7
F7

A8
B8
C8
D8
E8
F8

A9
B9
C9
D9
E9
F9

A10
B10
C10
D10
E10
F10

6 ROW RECEPTACLE ASSEMBLY

RISER_CONN1

Z-PACK HS3

G1
H1

J1

G2
H2

J2

G3
H3

J3

G4
H4

J4

G5
H5

J5

G6
H6

J6

G7
H7

J7

G8
H8

J8

G9
H9

J9

G10
H10

J10

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

G6
H6
J6

G7
H7
J7

G8
H8
J8

G9
H9
J9

G10
H10
J10

16,27
16,27

8,27

8,27
16,27
16,27

8,27

8,27

8,27

8,27
16,27
16,27

8,27

8,27
16,27
16,27

CK_100M_SLOT7_P

26

CK_100M_SLOT7_N

26

EXP_C_DN_7N

26

EXP_C_DN_7P

26

EXP_A_DN_7N
EXP_A_DN_7P
EXP_A_DN_3N
EXP_A_DN_3P
EXP_A_DN_6N
EXP_A_DN_6P

EXP_A_DN_2N
EXP_A_DN_2P
EXP_A_DN_1P
EXP_A_DN_1N
EXP_A_DN_5N
EXP_A_DN_5P

EXP_A_DN_0N
EXP_A_DN_0P
EXP_A_DN_4N
EXP_A_DN_4P
EXP_C_DN_0P

26

EXP_C_DN_0N

26

EXP_C_DN_3N

26

EXP_C_DN_3P

26

EXP_C_DN_2P

26

EXP_C_DN_2N

26

EXP_C_DN_1N

26

EXP_C_DN_1P

26

EXP_C_UP_1N

26

EXP_C_UP_1P

26

EXP_C_UP_3P

26

EXP_C_UP_3N

26

EXP_C_UP_0N

26

EXP_C_UP_0P

26

CK_100M_SLOT6_P

25

CK_100M_SLOT6_N

25

SLOT6

EXP_C_UP_2N

26

EXP_C_UP_2P

26

EXP_B_DN_1P

25

EXP_B_DN_1N

25

EXP_B_DN_3N

25

EXP_B_DN_3P

25

EXP_B_DN_2P

25

EXP_B_DN_2N

25

EXP_B_DN_0P

25

EXP_B_DN_0N

25

EXP_B_UP_3P

25

EXP_B_UP_3N

25

EXP_B_UP_2P

25

EXP_B_UP_2N

25

EXP_B_UP_1P

25

EXP_B_UP_1N

25

EXP_B_UP_0P

25

EXP_B_UP_0N

25

SLOT7

RISER_CONN2

A1

A1

B1

B1

C1

C1

D1

D1

E1

E1

F1

F1

A2

A2

B2

B2

C2

C2

D2

D2

E2

E2

F2

F2

A3

A3

B3

B3

C3

C3

D3

D3

E3

E3

F3

F3

A4

A4

B4

B4

C4

C4

D4

D4

E4

E4

F4

F4

A5

A5

B5

B5

C5

C5

D5

D5

E5

E5

F5

F5

A6

A6

B6

B6

C6

C6

D6

D6

E6

E6

F6

F6

A7

A7

B7

B7

C7

C7

D7

D7

E7

E7

F7

F7

A8

A8

B8

B8

C8

C8

D8

D8

E8

E8

F8

F8

A9

A9

B9

B9

C9

C9

D9

D9

E9

E9

F9

F9

A10

A10

B10

B10

C10

C10

D10

D10

E10

E10

F10

F10

6 ROW RECEPTACLE ASSEMBLY

G1
H1

J1

G2
H2

J2

G3
H3

J3

G4
H4

J4

G5
H5

J5

G6
H6

J6

G7
H7

J7

G8
H8

J8

G9
H9

J9

G10
H10

J10

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

G6
H6
J6

G7
H7
J7

G8
H8
J8

G9
H9
J9

G10
H10
J10

RISER_PRES_N for 1U

+5V

16,31
16,31

6,8
6,8

36
36

4

31

4

7,16,31

NC_HS3_E2

7,16

SHIFTY_RISER_CLK

36

SHIFTY_RISER_LATCH

36

SHIFTY_RISER_DATA_DN

36

SHIFTY_RISER_DATA_UP

36

INTRUSION_COVER_N

30

LI_BAT_PACK_P

11

NC_1U_RISER_PRSNT_N

I2C_SEG3_VAUX_SDA

30

+12V

I2C_SEG3_VAUX_SCL

30

ICH_SEG0_SCL
ICH_SEG0_SDA
ICH_SEG3_SCL
ICH_SEG3_SDA
SYSTEM_PWRGOOD_RISER
RISER_PWRGOOD

3P3VAUX_PWRGOOD_RISER
MCH_EXPHPINTR_N
PCI_RST_RISER_N
RISER_EXP_PME_N

RISER_PCI_PME_N

NC_RISER_CONN_D24

RISER_CONN3

A1

A1

B1

B1

C1

C1

D1

D1

E1

E1

F1

F1

A2

A2

B2

B2

C2

C2

D2

D2

E2

E2

F2

F2

A3

A3

B3

B3

C3

C3

D3

D3

E3

E3

F3

F3

A4

A4

B4

B4

C4

C4

D4

D4

E4

E4

F4

F4

A5

A5

B5

B5

C5

C5

D5

D5

E5

E5

F5

F5

6 ROW RECPTACLE ASSEMBLY

Z-PACK HS3

G1
H1

J1

G2
H2

J2

G3
H3

J3

G4
H4

J4

G5
H5

J5

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

+12V

2

+5V

3

Z-PACK HS3

PCI_RST_RISER_N

4

C589

1 2

9

10

0.1uF 16V

+3.3V_AUX

148U10

74VHC08

R455

1 2

22-5%

BUFFERS

CPLD p36

PCI_RST_RISER_BUF_N

Slot1 p20

PCI_RST_RISER_BUF3_N

Pull up 2.2k on p20

+3.3V

+5V

+3.3V_AUX

21

ROMB p11

14

12

36

13

U10

11

74VHC08

20

R492

1 2

22-5%

I_U10_P11

stub

3P3VAUX_PWRGOOD_ROMB_BUF2

R723

4.7K

11

+12V

C69

21

C70

0.1uF 16V

21

C92

0.1uF 16V

0.1uF 16V

21

C299

0.1uF 16V

1 2

I_3P3VAUX_PWRGD_RISER

+3.3V_AUX

14

4
5

U10

C66

1

2

22uF

16V 20%

1

C67

2

6

3P3VAUX_PWRGOOD_CPLD_BUF

36

22uF

C62

16V 20%

1

2

22uF

16V 20%

16V-20%

270uF

1

+

C534

2

21

C344

21

C354

0.1uF 16V

21

C510

0.1uF 16V

21

C511

0.1uF 16V

21

C522

0.1uF 16V

0.1uF 16V

74VHC08

4 4

3P3VAUX_PWRGOOD_RISER

4

+3.3V_AUX

143U10

1
2

74VHC08

R447

22-5%

21

3P3VAUX_PWRGOOD_ROMB_BUF

Pull up 4.7k on p11

R449

ROMB p11

11

1 2

4.7K

VHC schmitt trigger inputs family avoids issues

CPLD p36

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

VOLTAGE=0

+3.3V

5,19,31-33,36

VOLTAGE=3.3
RATSNEST_SCHEDULE=MIN_TREE

29

+3.3V_AUX

+5V

+12V

RATSNEST_SCHEDULE=MIN_TREE

VOLTAGE=3.3

7-3W,8-2X,11-2U,16-2U,19-3W
21-3W,22-3W,23-3W,24-3W,30-2W
31-3W,32-2T,33-3V,36-3W

RATSNEST_SCHEDULE=MIN_TREE
VOLTAGE=5

5,19,20,31

RATSNEST_SCHEDULE=MIN_TREE
VOLTAGE=12

5,7,19,21-24,28,29,33

TITLE

DWG NO.

DATE

INC.

SCHEM, RSR, PE2800, SV

F1314

2/23/2005

ROUND ROCK,TEXAS

REV.

A06-00

SHEET

4 OF 45

DC

A B

B D

GOLD FINGERS TO PLANAR. PCI CONN ON PLANAR. NO GOLD FINGERS ON 1U RISER

CA

1

1

CONN2_PLNR

+3.3V

We could shorten RISER_PRES_N pad for last mate, first break

RISER_PRES_N

4

CK_33M_SLOT1

19

+3.3V

+5V

+12V

Side B Side A

NO_PKG

CONN2_PLNR

B1
B2
B3
B4
B5
B6
B7
B8
B9

B10

+5V

+12V

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10

SCSI Connectors to Backplane
These SCSI connectors support external devices

SCSIA

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

1
2
3
4
5
6
7
8
9

SCSIA

RCPT

SCSIB

RCPT

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

SCSI_A_SD12_N
SCSI_A_SD13_N
SCSI_A_SD14_N
SCSI_A_SD15_N

SCSI_A_SDP1_N

SCSI_A_SD0_N
SCSI_A_SD1_N
SCSI_A_SD2_N
SCSI_A_SD3_N
SCSI_A_SD4_N
SCSI_A_SD5_N
SCSI_A_SD6_N
SCSI_A_SD7_N

SCSI_A_SDP0_N

SCSI_TRMPWR

NC_A_53

SCSI_A_SATN_N

SCSI_A_SBSY_N

SCSI_A_SACK_N

SCSI_A_SRST_N

SCSI_A_SMSG_N

SCSI_A_SSEL_N

SCSI_A_SCD_N

SCSI_A_SREQ_N

SCSI_A_SIO_N
SCSI_A_SD8_N
SCSI_A_SD9_N

SCSI_A_SD10_N
SCSI_A_SD11_N

SCSI_B_SD12_N
SCSI_B_SD13_N
SCSI_B_SD14_N
SCSI_B_SD15_N

SCSI_B_SDP1_N

SCSI_B_SD0_N
SCSI_B_SD1_N
SCSI_B_SD2_N
SCSI_B_SD3_N
SCSI_B_SD4_N
SCSI_B_SD5_N
SCSI_B_SD6_N
SCSI_B_SD7_N

SCSI_B_SDP0_N

SCSI_TRMPWR

NC_B_53

SCSI_B_SATN_N

SCSI_B_SBSY_N

SCSI_B_SACK_N

SCSI_B_SRST_N

SCSI_B_SMSG_N

SCSI_B_SSEL_N

SCSI_B_SCD_N

SCSI_B_SREQ_N

SCSI_B_SIO_N
SCSI_B_SD8_N
SCSI_B_SD9_N

SCSI_B_SD10_N
SCSI_B_SD11_N

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

5,15

13,15

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

5,15

13,15

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

NP

C576

X

NP

21

C575

X

SCSI_TRMPWR

NP

470pF

1 2

50V-10%

X

2 1

C990

NP

4.7uF
16V-10%

NP

C991

X

NP

1 2

0.1uF 16V

SCSI_TRMPWR

5,15

5,15

21

C993

470pF

50V-10%

X

C992

4.7uF

2 1

X

16V-10%

0.1uF 16V

+3.3V

4,19,31-33,36

+5V

4,19,20,31

+12V

4,7,19,21-24,28,29,33

B11 A11
B12
B13
B14
B15
B16

20
20

PCI0_AD31
PCI0_AD29

B17
B18
B19

20

PCI0_AD27

B20
B21

20

PCI0_AD25

B22
B23
B24

PCI0_AD23

2

20
20

PCI0_AD21

B25
B26
B27

20
20

PCI0_AD20
PCI0_AD19

B28
B29
B30

20

PCI0_AD17

B31
B32

PCI0_CBE2_N

20

B33
B34

20

PCI0_IRDY_N

B35
B36

PCI0_DEVSEL_N

20

B37
B38

PCI0_LOCK_N

20

B39
B40

PCI0_PERR_N

20

B41
B42

PCI0_SERR_N

20

B43
B44

PCI0_CBE1_N

20

B45
B46
B47

20

PCI0_AD14

B48
B49

20

PCI0_AD12

B50
B51

20
20

PCI0_AD10
PCI0_AD8

B52
B53
B54

20
20

PCI0_AD7
PCI0_AD5

B55

X

B56
B57

20

PCI0_AD3

B58
B59

B60 A60

3

B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91

B93
B94
B95

4 4

B96
B97
B98
B99

B100

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59

A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92B92
A93
A94
A95
A96
A97
A98
A99
A100

ICH_PIRQ_SLOT_AC_N
ICH_PIRQ_SLOT_BD_N

PCI0_AD30
PCI0_AD28

PCI0_AD26

PCI0_CBE3_N

PCI0_AD24
PCI0_AD22

PCI0_AD18
PCI0_AD16

PCI0_FRAME_N

PCI0_TRDY_N

PCI0_STOP_N

PCI0_PAR

PCI0_AD15

PCI0_AD13

PCI0_AD11

PCI0_AD9

PCI0_CBE0_N

PCI0_AD6

PCI0_AD4
PCI0_AD2

PCI0_AD0
PCI0_AD1

PCI0_REQ_SLOT_N

PCI0_GNT_SLOT_N

PCIL_5V_PME_N

SLOT6_PWRGD
SLOT7_PWRGD

13,15
13,15

19
19

20
20

20

20

20
20

20
20

20

20

20

20

20

20

20

20

20

20

20
20

20
20

20
20

19

32
32

+3.3V

21

C523

21

C524

0.1uF 16V

21

C525

0.1uF 16V

0.1uF 16V

+5V

21

C528

0.1uF 16V

+12V

16V-20%

270uF

1

+

C535

21

C529

2

21

C530

0.1uF 16V

21

C531

0.1uF 16V

21

C532

0.1uF 16V

21

C533

0.1uF 16V

0.1uF 16V

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

13,15

13,15

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

13,15

5,15

13,15

13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15
13,15

SCSI_A_SD12_P
SCSI_A_SD13_P
SCSI_A_SD14_P
SCSI_A_SD15_P
SCSI_A_SDP1_P
SCSI_A_SD0_P
SCSI_A_SD1_P
SCSI_A_SD2_P
SCSI_A_SD3_P
SCSI_A_SD4_P
SCSI_A_SD5_P
SCSI_A_SD6_P
SCSI_A_SD7_P
SCSI_A_SDP0_P

SCSI_A_DIFFSENSE
SCSI_TRMPWR

5,15

NC_A_19

SCSI_A_SATN_P

SCSI_A_SBSY_P
SCSI_A_SACK_P
SCSI_A_SRST_P
SCSI_A_SMSG_P
SCSI_A_SSEL_P
SCSI_A_SCD_P
SCSI_A_SREQ_P
SCSI_A_SIO_P
SCSI_A_SD8_P
SCSI_A_SD9_P
SCSI_A_SD10_P
SCSI_A_SD11_P

SCSI_B_SD12_P
SCSI_B_SD13_P
SCSI_B_SD14_P
SCSI_B_SD15_P
SCSI_B_SDP1_P
SCSI_B_SD0_P
SCSI_B_SD1_P
SCSI_B_SD2_P
SCSI_B_SD3_P
SCSI_B_SD4_P
SCSI_B_SD5_P
SCSI_B_SD6_P
SCSI_B_SD7_P
SCSI_B_SDP0_P

SCSI_B_DIFFSENSE
SCSI_TRMPWR

NC_B_19

SCSI_B_SATN_P

SCSI_B_SBSY_P
SCSI_B_SACK_P
SCSI_B_SRST_P
SCSI_B_SMSG_P
SCSI_B_SSEL_P
SCSI_B_SCD_P
SCSI_B_SREQ_P
SCSI_B_SIO_P
SCSI_B_SD8_P
SCSI_B_SD9_P
SCSI_B_SD10_P
SCSI_B_SD11_P

SCSIB

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

B101 A101

INC.

ROUND ROCK,TEXAS

202MCA PCI EDG

FOXCONN LOW PROFILE

TITLE

2-24-2005_11:43

2

3

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

DC

SCHEM, RSR, PE2800, SV

F1314

2/23/2005

REV.

A06-00

SHEET

5 OF 45

B D

CA

DOBSON MEMORY INTERFACE

Put one 22 uF cap at each end of DIMM

VBAT_RAID

6,11,12

VBAT_RAID

6,11,12

MUST BE 10% CAPS

C272

1

2

22uF 10V

C274

1 2

0.1uF 16V

C536

1 2

0.1uF 16V

C291

1 2

0.1uF 16V

C275

1 2

0.1uF 16V

C276

1 2

0.1uF 16V

C277

1 2

0.1uF 16V

C283

1 2

0.1uF 16V

C278

1 2

0.1uF 16V

C296

1 2

0.1uF 16V

C279

1 2

0.1uF 16V

C280

1 2

0.1uF 16V

C281

1 2

0.1uF 16V

C282

1 2

0.1uF 16V

C295

1 2

0.1uF 16V

0.1uF 16V 0.1uF 16V

C30

2 1

R142

1.5K-1%1.5K-1%

1 2

1uF 6.3V

Dobson Operating Limits
Supplies

2

C273

1

22uF 10V

3.3V == 3.0 to 3.6V, +- 10%

ROMB_DIMM_VREF

1

1.8V == 1.7 to 1.9V, +- 5%

6

C264

12

1

1.5V == 1.425 to 1.575V, +- 5%

1.35V == 1.282 to 1.418V, +- 5%

2 1

C25

PLL == 1.425 to 1.575V, +- 5%
DDR Vref == .49*Vcc1.1, .51*Vcc1.8, +- 2%

R144

1 2

BG Vref == 2.375 to 2.625V, +- 5%

U_DOBSON

RAID_DIMM

DDR_SD0_0

6

DDR_SD0_1

6

DDR_SD0_2

6

DDR_SD0_3

6

DDR_SD0_4

6

DDR_SD0_5

6

DDR_SD0_6

6

DDR_SD0_7

6

DDR_DM0

6

DDR_DQS0_P

6

DDR_DQS0_N

6

DDR_SD1_0

6

DDR_SD1_1

6

DDR_SD1_2

6

DDR_SD1_3

6

DDR_SD1_4

6

DDR_SD1_5

6

DDR_SD1_6

6

DDR_SD1_7

6

DDR_DM1

6

DDR_DQS1_P

6

DDR_DQS1_N

6

DDR_SD2_0

6

DDR_SD2_1

2

6

DDR_SD2_2

6

DDR_SD2_3

6

DDR_SD2_4

6

DDR_SD2_5

6

DDR_SD2_6

6

DDR_SD2_7

6

DDR_DM2

6

DDR_DQS2_P

6

DDR_DQS2_N

6

DDR_SD3_0

6

DDR_SD3_1

6

DDR_SD3_2

6

DDR_SD3_3

6

DDR_SD3_4

6

DDR_SD3_5

6

DDR_SD3_6

6

DDR_SD3_7

6

DDR_DM3

6

DDR_DQS3_P

6

DDR_DQS3_N

6

AD5
AD4

AF3
AG2
AD2
AD1

AF1

AF2

AE1
AE4
AE3

AE7

AF6

AJ7
AG7
AD8
AE6
AH6

AJ6
AG5

AJ5

AJ4

AG8

AJ8

AG10
AD11

AH7

AF8

AD10

AE10

AJ9

AF9

AE9

AH12

AJ12

AE13

AD14

AJ11
AF12
AF14

AG14

AJ13

AG13

AH13

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM0
DQS0
DQS0

DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DM1
DQS1
DQS1

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DM2
DQS2
DQS2

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DM3
DQS3
DQS3

MEMORY INTERFACE

DQS_N8

M_CK0
M_CK0

DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39

DM4
DQS4
DQS4

DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47

DM5
DQS5
DQS5

DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55

DM6
DQS6
DQS6

DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DM7
DQS7
DQS7

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

DM8
DQS8

AF18
AE18
AG20
AJ21
AJ18
AH18
AJ20
AH20
AJ19
AF19
AG19

AJ22
AG22
AG23
AF23
AH21
AF21
AJ24
AH24
AE21
AH23
AJ23

AF24
AF25
AG26
AG27
AE24
AE23
AH26
AH27
AG25
AJ26
AJ25

AF28
AE26
AD29
AD28
AG28
AF27
AD25
AD26
AE27
AE29
AF29

AE15
AF15
AD17
AC16
AC15
AC14
AD16
AE17
AH15
AG16
AF16
AJ16
AJ17

DDR_SD4_0
DDR_SD4_1
DDR_SD4_2
DDR_SD4_3
DDR_SD4_4
DDR_SD4_5
DDR_SD4_6
DDR_SD4_7

DDR_DM4
DDR_DQS4_P
DDR_DQS4_N

DDR_SD5_0
DDR_SD5_1
DDR_SD5_2
DDR_SD5_3
DDR_SD5_4
DDR_SD5_5
DDR_SD5_6
DDR_SD5_7

DDR_DM5
DDR_DQS5_P
DDR_DQS5_N

DDR_SD6_0
DDR_SD6_1
DDR_SD6_2
DDR_SD6_3
DDR_SD6_4
DDR_SD6_5
DDR_SD6_6
DDR_SD6_7

DDR_DM6
DDR_DQS6_P
DDR_DQS6_N

DDR_SD7_0
DDR_SD7_1
DDR_SD7_2
DDR_SD7_3
DDR_SD7_4
DDR_SD7_5
DDR_SD7_6
DDR_SD7_7

DDR_DM7
DDR_DQS7_P
DDR_DQS7_N

DDR_SD8_0
DDR_SD8_1
DDR_SD8_2
DDR_SD8_3
DDR_SD8_4
DDR_SD8_5
DDR_SD8_6
DDR_SD8_7

DDR_DM8
DDR_DQS8_P
DDR_DQS8_N

CK_DDR_MCLK0_P_R
CK_DDR_MCLK0_N_R

6
6
6
6
6
6
6
6
6
6
6

6
6
6
6
6
6
6
6
6
6
6

R10

1 2

1K-5%

R9

1 2

1K-5%

+3.3V_RSR

6
6
6
6
6
6
6
6
6
6
6

6
6
6
6
6
6
6
6
6
6
6

6
6
6
6
6
6
6
6
6
6
6
6
6

CK_DDR_MCLK0_P_R

6

CK_DDR_MCLK0_N_R

6

NP

NP

ICH_SEG3_SDA

4,8

ICH_SEG3_SCL

4,8

R693

1 2

0-5%
R692

1 2

0-5%

R65

1 2

0-5%

R53

1 2

0-5%

Place close to Dobson

1 2

1 2

stub

I_CK_DDR_MCLK0_P_R2

X

2.8" long

stub

I_CK_DDR_MCLK0_N_R1

X

stub

stub

I_CK_DDR_MCLK0_N_R2

I_CK_DDR_MCLK0_P_R1

4" long

R220

0-5%
R219

0-5%

Pull-up at planar

+3.3V_RSR

NP

R179

X

1 2

R691

NP

1 2

0-5%
R690

NP

1 2

0-5%
R689

1 2

0-5%
R688

1 2

0-5%

NP

8.2K-5%

X
X

R180

X

1 2

8.2K-5%

DIMM_SDA

DIMM_SCL

CK_DDR_MCLK0_P

CK_DDR_MCLK0_N

stub

stub

+3.3V_RSR

6

6

R1003

220

CK_DDR_MCLK0_N

6

CK_DDR_MCLK0_P

6

6,9,12
6,9,12

21

6

DDR_BA1

6,9

DDR_BA0

6,9

DDR_MA15
DDR_MA14

DDR_MA13

6,9

DDR_MA12

6,9

DDR_MA11

6,9

DDR_MA10

6,9

DDR_MA9

6,9

DDR_MA8

6,9

DDR_MA7

6,9

DDR_MA6

6,9

DDR_MA5

6,9

DDR_MA4

6,9

DDR_MA3

6,9

DDR_MA2

6,9

DDR_MA1

6,9

DDR_MA0

6,9

DDR_CS1_N

6,9

DDR_CS0_N

6,9

DDR_RAS_N

6,9

DDR_CAS_N

6,9

DDR_WE_N

6,9

DDR_CKE1
DDR_CKE0

DIMM1A_SA

6

ROMB_DIMM_VREF

DDR_ODT1

6,9

DDR_ODT0

6,9

DDR_SD8_7

6

DDR_SD8_6

6

DDR_SD8_5

6

DDR_SD8_4

6

DDR_SD8_3

6

DDR_SD8_2

6

DDR_SD8_1

6

DDR_SD8_0

6

DDR_DM8

6

DDR_DM7

6

DDR_DM6

6

DDR_DM5

6

DDR_DM4

6

NC_DDR_DIMM_BA2

NC_CK_DDR_MCLK2_N
NC_CK_DDR_MCLK2_P
NC_CK_DDR_MCLK1_N
NC_CK_DDR_MCLK1_P

NC_DDR_DIMM_165

NC_DDR_DIMM_233

NC_DDR_DIMM_224

NC_DDR_DIMM_212

NC_DDR_DIMM_203

190

71

54
173
174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

76
193
192

74

73
221
220
138
137
186
185
171

52
119

120
101
240
239
238

1

77
195

168
167
162
161

49

48

43

42
164

165
232
233
223
224
211
212
202
203

BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0

SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10

DDR_SD7_7
DDR_SD7_6
DDR_SD7_5
DDR_SD7_4
DDR_SD7_3
DDR_SD7_2
DDR_SD7_1
DDR_SD7_0
DDR_SD6_7
DDR_SD6_6
DDR_SD6_5
DDR_SD6_4
DDR_SD6_3
DDR_SD6_2
DDR_SD6_1
DDR_SD6_0
DDR_SD5_7
DDR_SD5_6
DDR_SD5_5
DDR_SD5_4
DDR_SD5_3
DDR_SD5_2
DDR_SD5_1
DDR_SD5_0
DDR_SD4_7
DDR_SD4_6
DDR_SD4_5
DDR_SD4_4
DDR_SD4_3
DDR_SD4_2
DDR_SD4_1
DDR_SD4_0
DDR_SD3_7
DDR_SD3_6
DDR_SD3_5
DDR_SD3_4
DDR_SD3_3
DDR_SD3_2
DDR_SD3_1
DDR_SD3_0
DDR_SD2_7
DDR_SD2_6
DDR_SD2_5
DDR_SD2_4
DDR_SD2_3
DDR_SD2_2
DDR_SD2_1
DDR_SD2_0
DDR_SD1_7
DDR_SD1_6
DDR_SD1_5
DDR_SD1_4
DDR_SD1_3
DDR_SD1_2
DDR_SD1_1
DDR_SD1_0
DDR_SD0_7
DDR_SD0_6
DDR_SD0_5
DDR_SD0_4
DDR_SD0_3

6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6

MUST BE 1%

2

3

3

DQ2
DQ1
DQ0

NC

9
4
3

197
189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

19
18

NC_DDR_DIMM_19

DDR_SD0_2
DDR_SD0_1
DDR_SD0_0

6
6
6

VBAT_RAID

6,11,12

DDR_DIMM_RST_N

VBAT_RAID

6,11,12

36

DDR_MA0

6,9

DDR_MA1

6,9

DDR_MA2

6,9

DDR_MA3

6,9

DDR_MA4

6,9

DDR_MA5

6,9

DDR_MA6

6,9

DDR_MA7

6,9

DDR_MA8

6,9

DDR_MA9

6,9

DDR_MA10

6,9

DDR_MA11

6,9

DDR_MA12

6,9

DDR_MA13

6,9

NC_CK_DDR_MCLK1_P_R
NC_CK_DDR_MCLK1_N_R

NC_CK_DDR_MCLK2_P_R
NC_CK_DDR_MCLK2_N_R

DDRCRES0

stub

DDR-2 - use 976 ohm

MUST BE 1%

R167 can be 825 or 976 ohms 1%

R167

1 2

976-1%

R242

1 2

287-1%

DDR-2 - use 285 ohm

DDRSLWCRES

DDRIMPCRES

AC13

MA0

AE12

MA1

AC12

MA2

AF11

MA3

AG11

MA4

AH10

MA5

AH9

MA6

AD7

MA7

AJ10

MA8

AC9

MA9

AC18

MA10

AC8

MA11

AF5

MA12

AD22

MA13

AJ14

M_CK1

AJ15

M_CK1

AH17

M_CK2

AG17

M_CK2

AC27

DDRCRES0

AC28

DDRSLWCRES

AC29

DDRIMPCRES

INTEL DOBSON IOP MEM

POWER_DRAW=P3.3V@1.2A
POWER_DRAW=P1.8V@0.9A
POWER_DRAW=P1.5V@6.4A
POWER_DRAW=P1.35V@0.5A

VER C0

HETERO 1 OF 6

SUB=SUB*_M6627

BA0
BA1

CAS
RAS

WE

CS0
CS1

CKE0
CKE1

DDR_VREF

ODT0
ODT1

DDRRES1
DDRRES2

M_RST

AD18
AD13

AC21
AC19
AD20

AE20
AD23

AG4
AH4

AC1

AC22
AB20

AB28
AB29

AH3

stub

NC_DDR_RST_N

DDR_BA0
DDR_BA1

DDR_CAS_N
DDR_RAS_N

DDR_WE_N

DDR_CS0_N
DDR_CS1_N

DDR_CKE0
DDR_CKE1

DDR_ODT0
DDR_ODT1

0.1uF 16V

C416

2 1

C399

6,9
6,9

6,9
6,9
6,9

6,9
6,9

6,9,12
6,9,12

6,9
6,9

DDR_RES1
DDR_RES2

0.1uF 16V

12

DDR_DOBSON_VREF

R140

40.2-0.5%

MUST BE 10% CAPS

stub

R141

1 2

21

40.2-0.5%

+1.8V

MUST BE 0.5%

C18

0.1uF 16V0.1uF 16V

C36

+1.8V

2 1

R145

1.5K-1%1.5K-1%

1 2

2 1

R143

1 2

MUST BE 1% RES

1uF 6.3V

12

C263

DDR_DM3

6

DDR_DM2

6

DDR_DM1

6

DDR_DM0

6

DDR_DQS8_P

6

DDR_DQS8_N

6

DDR_DQS7_P

6

DDR_DQS7_N

6

DDR_DQS6_P

6

DDR_DQS6_N

6

DDR_DQS5_P

6

DDR_DQS5_N

6

DDR_DQS4_P

6

DDR_DQS4_N

6

DDR_DQS3_P

6

DDR_DQS3_N

6

DDR_DQS2_P

6

DDR_DQS2_N

6

DDR_DQS1_P

6

DDR_DQS1_N

6

DDR_DQS0_P

6

DDR_DQS0_N

6

NC_DDR_DIMM_156

NC_DDR_DIMM_147

NC_DDR_DIMM_135

NC_DDR_DIMM_126

NC_DDR_DIMM_ERR
NC_DDR_DIMM_PAR
NC_DDR_DIMM_TEST

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

POWER_DRAW=P1.8V@7.5A

VDD10

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

RESET

240 PIN DDR II DIMM

ADD=ADD*_D2614_HEATSINK_DOBSON

4 4

M6627 = C1 Dobson

+3.3V_RSR

4.7K

R339

12

DIMM1A_SA

ROOM = ROMB_DIMM

6

+3.3V_RSR

7-18,21-24,28,29

F5290 = C0 Dobson

INC.

ROUND ROCK,TEXAS

REV.

A06-00

SHEET

6 OF 45

ROOM = DOBSON

A B

Set DIMM SPD = AE

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM, RSR, PE2800, SV

DWG NO.

F1314

DATE

2/23/2005

DC

DOBSON PCI INTERFACE

B D

CA

PME PULLUP POP'D ON PLANAR

OPTION 2 POP'D

ROOM = DOBSON

Q16
R278
R262

IOP PME B

Option 1 Option 2
Nopop
Nopop
Pop

Pop
Pop
Nopop

K (Cathode)

1 2

A (Anode)

P

N

3

BAR43

BAR43

RISER_EXP_PME_N

D8

31

4,16,31

+3.3V_AUX

21

R369

NP

R425

X

22K-5%

RISER_PCI_PME_N

21

0-5%

4,16

R425

DOBSON CH A (IOP BUS) to LSI

R369

+3.3V_RSR

1

7,13,27

IOP_PCIX_A_SERR_N

NP

1 2

8.2K-5%

R218

X

U_DOBSON

+3.3V_RSR

NP

NP

NP

NP

NP

NP

NP

NP

NP

NP

NP

NP

1

RN40

2
3
4

8.2K

1

RN32

2
3
4

8.2K

1

RN33

2
3
4

8.2K

1

RN39

2
3
4

8.2K

1

RN34

2
3
4

8.2K

1

RN35

2
3
4

8.2K

1

RN36

2
3
4

8.2K

1

RN28

2
3
4

8.2K

1

RN41

2
3
4

8.2K

1

RN37

2
3
4

8.2K

1

RN38

2
3
4

8.2K

1

RN30

2
3
4

8.2K

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27

2

7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7,13,27

IOP_PCIX_A_ACK64_N
IOP_PCIX_A_SERR_N
IOP_PCIX_A_STOP_N
IOP_PCIX_A_FRAME_N

IOP_PCIX_A_AD46
IOP_PCIX_A_AD45
IOP_PCIX_A_AD40
IOP_PCIX_A_AD44

IOP_PCIX_A_AD34
IOP_PCIX_A_AD35
IOP_PCIX_A_AD32
IOP_PCIX_A_AD33

IOP_PCIX_A_AD54
IOP_PCIX_A_AD51
IOP_PCIX_A_AD52
IOP_PCIX_A_AD48

IOP_PCIX_A_AD39
IOP_PCIX_A_AD38
IOP_PCIX_A_AD36
IOP_PCIX_A_AD37

IOP_PCIX_A_AD50
IOP_PCIX_A_AD57
IOP_PCIX_A_AD58
IOP_PCIX_A_AD60

IOP_PCIX_A_AD62
IOP_PCIX_A_AD61
IOP_PCIX_A_CBE6_N
IOP_PCIX_A_CBE4_N

IOP_PCIX_A_AD56
IOP_PCIX_A_AD53
IOP_PCIX_A_AD63
IOP_PCIX_A_AD59

IOP_PCIX_A_AD43
IOP_PCIX_A_AD47
IOP_PCIX_A_AD55
IOP_PCIX_A_AD49

IOP_PCIX_A_PERR_N
IOP_PCIX_A_DEVSEL_N
IOP_PCIX_A_TRDY_N
IOP_PCIX_A_IRDY_N

IOP_PCIX_A_REQ64_N
IOP_PCIX_A_PAR64
IOP_PCIX_A_CBE7_N
IOP_PCIX_A_CBE5_N

NC_RN30_P1
NC_RN30_P2

IOP_PCIX_A_AD42
IOP_PCIX_A_AD41

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

8
7
6
5

X

R658

NP

IOP_PCIX_A_LOCK_N

7

1 2

8.2K-5%

X

13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27

7,13,27

13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27
13,27

13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27
7,13,27

IOP_PCIX_A_AD0
IOP_PCIX_A_AD1
IOP_PCIX_A_AD2
IOP_PCIX_A_AD3
IOP_PCIX_A_AD4
IOP_PCIX_A_AD5
IOP_PCIX_A_AD6
IOP_PCIX_A_AD7
IOP_PCIX_A_AD8
IOP_PCIX_A_AD9
IOP_PCIX_A_AD10
IOP_PCIX_A_AD11
IOP_PCIX_A_AD12
IOP_PCIX_A_AD13
IOP_PCIX_A_AD14
IOP_PCIX_A_AD15
IOP_PCIX_A_AD16
IOP_PCIX_A_AD17
IOP_PCIX_A_AD18
IOP_PCIX_A_AD19
IOP_PCIX_A_AD20
IOP_PCIX_A_AD21
IOP_PCIX_A_AD22
IOP_PCIX_A_AD23
IOP_PCIX_A_AD24
IOP_PCIX_A_AD25
IOP_PCIX_A_AD26
IOP_PCIX_A_AD27
IOP_PCIX_A_AD28
IOP_PCIX_A_AD29
IOP_PCIX_A_AD30
IOP_PCIX_A_AD31
IOP_PCIX_A_AD32
IOP_PCIX_A_AD33
IOP_PCIX_A_AD34
IOP_PCIX_A_AD35
IOP_PCIX_A_AD36
IOP_PCIX_A_AD37
IOP_PCIX_A_AD38
IOP_PCIX_A_AD39
IOP_PCIX_A_AD40
IOP_PCIX_A_AD41
IOP_PCIX_A_AD42
IOP_PCIX_A_AD43
IOP_PCIX_A_AD44
IOP_PCIX_A_AD45
IOP_PCIX_A_AD46
IOP_PCIX_A_AD47
IOP_PCIX_A_AD48
IOP_PCIX_A_AD49
IOP_PCIX_A_AD50
IOP_PCIX_A_AD51
IOP_PCIX_A_AD52
IOP_PCIX_A_AD53
IOP_PCIX_A_AD54
IOP_PCIX_A_AD55
IOP_PCIX_A_AD56
IOP_PCIX_A_AD57
IOP_PCIX_A_AD58
IOP_PCIX_A_AD59
IOP_PCIX_A_AD60
IOP_PCIX_A_AD61
IOP_PCIX_A_AD62
IOP_PCIX_A_AD63

3

E24

F23
E23
H22
G22

F22
H21
G21
D21

F20

E20

H19
G19

F19
H18
G18
B27
C26
B26
A26
D25
C25
A25
D24
A24
C23
B23
D22
C22
A22
B21
A21
P23
P24
N24
N22
M25
M23
M22

L23
L24

L22
K22
K24

J26

J25

J23

J22
U29

T26

T27
R26
R28
R29
P26
P27
P29
N28
N29
N27
M29
M28
M26

L29

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_AD32
A_AD33
A_AD34
A_AD35
A_AD36
A_AD37
A_AD38
A_AD39
A_AD40
A_AD41
A_AD42
A_AD43
A_AD44
A_AD45
A_AD46
A_AD47
A_AD48
A_AD49
A_AD50
A_AD51
A_AD52
A_AD53
A_AD54
A_AD55
A_AD56
A_AD57
A_AD58
A_AD59
A_AD60
A_AD61
A_AD62
A_AD63

PRIMARY PCI-X BUS

A_PCIXCAP

INTEL DOBSON IOP PCI A

VER C0

HETERO 2 OF 6

A_C/BE0
A_C/BE1
A_C/BE2
A_C/BE3
A_C/BE4
A_C/BE5
A_C/BE6
A_C/BE7

A_REQ0
A_REQ1
A_REQ2
A_REQ3

A_GNT0
A_GNT1
A_GNT2
A_GNT3

A_TRDY

A_STOP

A_LOCK

A_IRDY

A_FRAME

A_DEVSEL

A_PAR
A_PERR
A_SERR

A_REQ64
A_ACK64
A_PAR64

A_M66EN

A_PME

A_CLKOUT

A_CLKIN

A_CLKO3
A_CLKO2
A_CLKO1
A_CLKO0

A_RST

A_RCOMP

H20
H17
C27
D27
K27
K28
L26
L27

N25
F28
E21
K25

A23
B24
P22
U25

E28
D28
E27

E29
C28
F29

F26
G29
E26

J29
J28
K29

C20
R21
R25

G25

G27

H23
F25
G24
H24

R22

T29

NC_IOP_PCIX_A_GNT1_N
NC_IOP_PCIX_A_GNT2_N
NC_IOP_PCIX_A_GNT3_N

stub

CK_IOP_PCIX_A_CKOUT_R

CK_IOP_PCIX_A_CKIN

NC_A_CLKO3
NC_A_CLKO2

CK_IOP_PCIX_A_DBG_R

CK_IOP_PCIX_A_LSI_R

PD_A_RCOMP

0.750 V

IOP_PCIX_A_CBE0_N
IOP_PCIX_A_CBE1_N
IOP_PCIX_A_CBE2_N
IOP_PCIX_A_CBE3_N
IOP_PCIX_A_CBE4_N
IOP_PCIX_A_CBE5_N
IOP_PCIX_A_CBE6_N
IOP_PCIX_A_CBE7_N

IOP_PCIX_A_REQ0_N

PU_IOP_PCIX_A_REQ1_N
PU_IOP_PCIX_A_REQ2_N
PU_IOP_PCIX_A_REQ3_N

IOP_PCIX_A_GNT0_N

IOP_PCIX_A_TRDY_N

IOP_PCIX_A_STOP_N

IOP_PCIX_A_LOCK_N

IOP_PCIX_A_IRDY_N

IOP_PCIX_A_FRAME_N

IOP_PCIX_A_DEVSEL_N

IOP_PCIX_A_PAR
IOP_PCIX_A_PERR_N
IOP_PCIX_A_SERR_N

IOP_PCIX_A_REQ64_N
IOP_PCIX_A_ACK64_N

IOP_PCIX_A_PAR64

IOP_PCIX_A_M66EN

IOP_PCIX_A_PCIXCAP

PU_IOP_PCIX_A_PME_N

stub

1 2

100-1%

stub

R250

13,27
13,27
13,27
13,27
7,13,27
7,13,27
7,13,27
7,13,27

7,13,27
7
7
7

13,27

7,13,27

7,13,27

7

7,13,27

7,13,27

7,13,27

13,27

7,13,27

7,13,27

7,13,27

7,13,27

7,13,27

7

7

7

R71

1 2

22-5%

stub

Length Match!!

stub

R342

1 2

R67

1 2

I_IOP_PCIX_A_RST_N IOP_PCIX_A_RST_N

22-5%

22-5%

CK_IOP_PCIX_A_LSI

R506

21

22-5%

CK_IOP_PCIX_A_DBG

13

13,27

To LSI 1030

IOP_PCIX_B_AD0

24

IOP_PCIX_B_AD1

24

IOP_PCIX_B_AD2

24

IOP_PCIX_B_AD3

24

IOP_PCIX_B_AD4

24

IOP_PCIX_B_AD5

24

IOP_PCIX_B_AD6

24

IOP_PCIX_B_AD7

24

IOP_PCIX_B_AD8

24

IOP_PCIX_B_AD9

24

IOP_PCIX_B_AD10

24

IOP_PCIX_B_AD11

24

IOP_PCIX_B_AD12

24

IOP_PCIX_B_AD13

24

IOP_PCIX_B_AD14

24

IOP_PCIX_B_AD15

24

IOP_PCIX_B_AD16

24

IOP_PCIX_B_AD17

24

IOP_PCIX_B_AD18

24

IOP_PCIX_B_AD19

24

IOP_PCIX_B_AD20

24

IOP_PCIX_B_AD21

24

IOP_PCIX_B_AD22

24

IOP_PCIX_B_AD23

24

IOP_PCIX_B_AD24

24

IOP_PCIX_B_AD25

24

IOP_PCIX_B_AD26

24

IOP_PCIX_B_AD27

24

IOP_PCIX_B_AD28

24

IOP_PCIX_B_AD29

24

IOP_PCIX_B_AD30

24

IOP_PCIX_B_AD31

24

IOP_PCIX_B_AD32

24

IOP_PCIX_B_AD33

24

IOP_PCIX_B_AD34

24

IOP_PCIX_B_AD35

24

IOP_PCIX_B_AD36

24

IOP_PCIX_B_AD37

24

IOP_PCIX_B_AD38

24

IOP_PCIX_B_AD39

24

IOP_PCIX_B_AD40

24

IOP_PCIX_B_AD41

24

IOP_PCIX_B_AD42

24

IOP_PCIX_B_AD43

24

IOP_PCIX_B_AD44

24

IOP_PCIX_B_AD45

24

IOP_PCIX_B_AD46

24

IOP_PCIX_B_AD47

24

IOP_PCIX_B_AD48

24

IOP_PCIX_B_AD49

24

IOP_PCIX_B_AD50

24

IOP_PCIX_B_AD51

24

IOP_PCIX_B_AD52

24

IOP_PCIX_B_AD53

24

IOP_PCIX_B_AD54

27

24

IOP_PCIX_B_AD55

24

IOP_PCIX_B_AD56

24

IOP_PCIX_B_AD57

24

IOP_PCIX_B_AD58

24

IOP_PCIX_B_AD59

24

IOP_PCIX_B_AD60

24

IOP_PCIX_B_AD61

24

IOP_PCIX_B_AD62

24

IOP_PCIX_B_AD63

24

DOBSON CH B to PCI SLOT

U_DOBSON

H1

B_AD0

H3

B_AD1

H4

B_AD2

G1

B_AD3

G2

B_AD4

G3

B_AD5

F1

B_AD6

F2

B_AD7

F4

B_AD8

E4

B_AD9

D1

B_AD10

D2

B_AD11

D3

B_AD12

C2
C3
B3
A4
C5
A5
D6
B6
A6
C7
B7
D8
C8
A8
D9
B9

A9
C10
B10

K8

L8
L7

L6
M8
M7
M5
N8
N6
N5
P8
P7
P6
R5
R7
R8

J2
J1

K1

L4

L3

L1
M4
M2
M1
N3
N2
N1
P1
P3
P4
R1

B_AD13
B_AD14
B_AD15
B_AD16
B_AD17
B_AD18
B_AD19
B_AD20
B_AD21
B_AD22
B_AD23
B_AD24
B_AD25
B_AD26
B_AD27
B_AD28
B_AD29
B_AD30
B_AD31
B_AD32
B_AD33
B_AD34
B_AD35
B_AD36
B_AD37
B_AD38
B_AD39
B_AD40
B_AD41
B_AD42
B_AD43
B_AD44
B_AD45
B_AD46
B_AD47
B_AD48
B_AD49
B_AD50
B_AD51
B_AD52
B_AD53
B_AD54
B_AD55
B_AD56
B_AD57
B_AD58
B_AD59
B_AD60
B_AD61
B_AD62
B_AD63

INTEL DOBSON IOP PCI B

VER C0

HETERO 3 OF 6

B_REQ2_N/B_HPCIXCAP1
B_REQ3_N/B_HPCIXCAP2

B_REQ4/B_HM66EN

B_GNT2/B_HBUSEN
B_GNT3/B_HCLKEN

SECONDARY PCI-X BUS

B_C/BE0
B_C/BE1
B_C/BE2
B_C/BE3
B_C/BE4
B_C/BE5
B_C/BE6
B_C/BE7

B_REQ0
B_REQ1

B_GNT0
B_GNT1

B_GNT4/B_HRST

B_TRDY

B_STOP

B_LOCK

B_IRDY

B_FRAME

B_DEVSEL

B_PAR
B_PERR
B_SERR

B_REQ64
B_ACK64

B_PAR64

B_M66EN

B_PCIXCAP

B_PME

B_CLKOUT

B_CLKIN

B_CLKO4
B_CLKO3
B_CLKO2
B_CLKO1
B_CLKO0

RSTIN

B_RST

B_RCOMP

B_VIOSEL

B_VREF

E1
B4
D5
A7
U1
U2
T3
U3

R4
K5

G12
K3

K2

T6
T4

H11
F11
H12

H10
G6
J7

F5
E6
G5

C4
J4
J5

G11

H6

R2

E3
W4
H13

E7

G9

H7
H9
H8
J8
F7

AB6
V8

V1

K6

Y1

D8

stub

CK_IOP_PCIX_B_CKOUT_R

CK_IOP_PCIX_B_CKIN

CK_IOP_PCIX_B_CLK0_R

stub

PD_B_RCOMP

0.750 V

Pop Nopop
Nopop

Nopop

11,16,36

IOP_PCIX_B_CBE0_N
IOP_PCIX_B_CBE1_N
IOP_PCIX_B_CBE2_N
IOP_PCIX_B_CBE3_N
IOP_PCIX_B_CBE4_N
IOP_PCIX_B_CBE5_N
IOP_PCIX_B_CBE6_N
IOP_PCIX_B_CBE7_N

IOP_PCIX_B_REQ0_N

PU_IOP_PCIX_B_REQ1_N
PU_IOP_PCIX_B_REQ2_N
PU_IOP_PCIX_B_REQ3_N
PU_IOP_PCIX_B_REQ4_N

IOP_PCIX_B_GNT0_N

NC_IOP_PCIX_B_GNT1_N
NC_IOP_PCIX_B_GNT2_N
NC_IOP_PCIX_B_GNT3_N
NC_IOP_PCIX_B_GNT4_N

IOP_PCIX_B_TRDY_N

IOP_PCIX_B_STOP_N

IOP_PCIX_B_LOCK_N

IOP_PCIX_B_IRDY_N

IOP_PCIX_B_FRAME_N

IOP_PCIX_B_DEVSEL_N

IOP_PCIX_B_PAR
IOP_PCIX_B_PERR_N
IOP_PCIX_B_SERR_N

IOP_PCIX_B_REQ64_N
IOP_PCIX_B_ACK64_N

IOP_PCIX_B_PAR64

IOP_PCIX_B_M66EN

IOP_PCIX_B_PCIXCAP

NC_IOP_B_CLK04
NC_IOP_B_CLK03
NC_IOP_B_CLK02

NC_IOP_B_CLK1

1 2

100-1%

stub

R246

NC_B_VIOSEL

VREF_PCI_IOP

For PCIX mode 1

Nopop
Pop

SYSTEM_PWRGOOD_RISER_BUF_5V

24
24
24
24
24
24
24
24

7,24
7
7
7
7

24

24

24

24

24
24
24

24

24

24

24
24
24

24

7,24

IOP_PCIX_B_PME_N

R70

1 2

22-5%

R60

1 2

22-5%

I_IOP_PCIX_B_RST_N

PCI_RST_RISER_BUF1_N

stub

7

R507

1 2

22-5%

R278

21

470

C72

1 2

330pF 50V

7

CK_IOP_SLOT5_PCICLK0

36

IOP_PCIX_B_RST_N

stub

I_SYSTEM_PWRGOOD_RISER_BUF_R2

+3.3V_RSR

Length Match !!

24

7

133 Mhz PCI B bus, pullup by external card

SLOT5_PME_N

D

Q16

2N7002

3

1

G

S

2

D

3

2N7002

1 2

G S

PU_IOP_PCIX_A_PME_N

7

+3.3V_RSR

21

R262

22K-5%

IOP_PCIX_B_PME_N

+3.3V_RSR

R343

1 2

PME not used for PCI-X A on IOP

NP

RN42

1
2
3
4

8.2K

8
7
6
5

PU_IOP_PCIX_B_REQ1_N
PU_IOP_PCIX_B_REQ2_N
PU_IOP_PCIX_B_REQ3_N

X

R168

NP

1 2

C271

21

X

0.1uF 16V

+1.5V

R269

1 2

R664

1 2

150-1%

150-1%

8.2K-5%

133EN lo limits bus to 100MHz max

IOP_PCIX_B_PCIXCAP

7,24

PU_IOP_PCIX_B_REQ4_N

24

7

4.7K

IOP_PCIX_B_REQ0_N

VREF_PCI_IOP

0.75V

+3.3V_RSR

21

R54

NP

21

R134

X

1

7,24
7
7
7

7

2

7

3.3K-5%3.3K-5%

3

220

+3.3V_RSR

NP

+3.3V_RSR

RN29

1
2
3
4

8.2K

8
7
6
5

IOP_PCIX_A_REQ0_N

PU_IOP_PCIX_A_REQ1_N
PU_IOP_PCIX_A_REQ2_N
PU_IOP_PCIX_A_REQ3_N

7,13,27
7
7
7

PCI Reset glitch fix

U799 p11

+3.3V_AUX

R40

X

1 2

U799

+3.3V_RSR

R334

1 2

4.7K

In SCSI mode, BIOS can enable / disable SCSI if fet option is pop'd

R327

1 2

16,36

SYSTEM_PWRGOOD_RISER_RST_BUF
IOP_PCIX_B_RST_N

7

12
13

74VHC08

NP

1 2

14

R798

0-5%

11

X

IOP_PCIX_B_RST_SLOT5_N

24

IOP_PCIX_A_PCIXCAP

7

133 Mhz PCI bus A

NP

21

R136

X

220

C538

1 2

0.1uF 16V

+3.3V_RSR

6,8-18,21-24,28,29

+3.3V_AUX

4-2U,8-2X,11-2U,16-2U,19-3W
21-3W,22-3W,23-3W,24-3W,30-2W
31-3W,32-2T,33-3V,36-3W

+12V

4,5,19,21-24,28,29,33

ROUND ROCK,TEXAS

3
D

NP

1

G

100-1%

2N7002

Q6

1

G

D

3

2

I_PCIX_SCSI_IDSEL_R

S

X

1 2

stub

D

3

2N7002

NP

8.2K-5%

X

stub

1 2

NP

100-1%

R181

12

R197

X

NP

1N914

X

Card resistor Card resistor

PCIX_SCSI_IDSEL

1 3

D5

A (Anode)

N

K (Cathode)

3

1N914

1 2

P

13

X133EN PCIXCAP PCIBUSMODE FREQUENCY

N/A

N/A

N/A

M66EN

GROUND

NO CONNECT

N/A

GROUND

GROUND

PCI CONVENTION

PCI CONVENTION

PULL-DOWN PCIX

33 MHz

66 MHz

66 MHz

PCIXCAP
card pulldown
open

10k

133 / 100

66

comp
threshold

%bus freq

88

Voltage

%
100
75

2-24-2005_11:43

62

GROUND

N/A

N/A

NO CONNECT

PCIX

PCIX

100 MHz

133 MHzNO CONNECT NO CONNECT

3.16k 1%

1.02k 1%
GND (100 ohms)

266
533

PCI

36

11.5

48.5
24

0

INC.

TITLE

IOP_PCIX_A_M66EN

7

7,13,27

4 4

OnDieTerminated Signals, 8.33kohm ±40%.

IOP_PCIX_A_AD21

+12V

NP

1 2

2.7K-5%
R244

NP

X

PxDEVSEL#
PxFRAME#
PxIRDY#
PxTRDY#
PxLOCK#
PxSTOP#

PxAD[63:32]
PxCBE_[7:4]#
XINT[7:0]#
PxM66EN
PxREQ[]#

PxPAR64

GPO_SCSI_IDSEL_DIS

36

PU_SCSI_DIS_CKT

Q1

2N7002

SCHEM, RSR, PE2800, SV

PxSERR#
PxPERR#

PxREQ64#
PxACK64#

Pull-up resistors for PxAD[31:0] and PxCBE_[3:1]# are not required by the PCI Specification.

X

S

2

G S

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

F1314

2/23/2005

REV.

A06-00

SHEET

7 OF 45

A B

DC

DOBSON PCI Express bus and Strapping

B D

R221

+3.3V_RSR

I2C_DOBSON_SDA

8

I2C_DOBSON_SCL

8

R222

21

1 2

0-5%

ICH_SEG3_SDA

ICH_SEG3_SCL

CA

4,6

PCI EXPRESS x4

4,6

0-5%

+3.3V_RSR

NP

1

NP

RN44

1
2
3
4

8.2K

RN43

1
2
3
4

8.2K

8
7
6
5

X

8
7
6
5

Dobson Errata # 51
pop RN44 for B0 Dobson

SCSI_INTB_N

SCSI_INTA_N
IOP_PCIX_B_INT0_N
IOP_PCIX_B_INT1_N

IOP_PCIX_B_INT4_N
IOP_PCIX_B_INT5_N
IOP_PCIX_B_INT7_N
IOP_PCIX_B_INT6_N

8,13,27
8,13,27
8
8

8,24
8,24
8,24
8,24

PU_I2C_DOBSON_SDA1

8

PU_I2C_DOBSON_SCL1

8

X

ROMB_FLSH_AD0

10

ROMB_FLSH_AD1

10

ROMB_FLSH_AD2

NP

RN88

1
2
3
4

2.7K

8
7
6
5

HPC_HIPCK

HPC_HIPLD

HPC_HIPDA

HPC_HOPLD

8
8
8
8

X

Vref = 2.5V

L13

4.7uH 80mA

600 uA

R673

0-5%

22uF 6.3V

1

C358

2

21

17,28

V_2P5V_REF

R148

1 2

.499-1%

I_2P5V_AUX_REF_IOP_R

stub

1 2

2

VCCBG DIFF PAIR TO BGA, VSS GND AT REF, NOT BGA

D2938 is 4.7uH, <30%,ESR max<0.3 ohm, Imax>80mA

+1.5V

R153

1 2

.499-1%

I_IOP_VCC_PLL1_L

stub

1 2

31.8 mA

+1.5V

R155

1 2

.499-1%

I_IOP_VCC_PLL2_L

stub

1 2

3

+1.5V

L8

4.7uH 80mA

NP

L9

4.7uH 80mA

31.8 mA

NP

R672

0-5%

R671

0-5%

C249

21

X

1

C250

2

21

X

1

2

C353

22uF 6.3V

C417

22uF 6.3V

V_IOP_VCC_PLL1

1 2

IOP_VSS_PLL1

V_IOP_VCC_PLL2

21

0.1uF 16V 0.1uF 16V
IOP_VSS_PLL2

30.9 mA

R151

1 2

.499-1%

I_IOP_VCC_PLL3_L

stub

MUST BE 0.499 OHM

1 2

L10

4.7uH 80mA

31.8 mA

NP

R670

0-5%

1

C251

2

21

X

22uF 6.3V

C526

1 2

V_IOP_VCC_PLL3

0.1uF 16V
IOP_VSS_PLL3

2.5V +- 3%

(A15)

V_IOP_VCCBG_A15

21

8

ROUTE AS DIFF PAIR

C626

0.1uF 16V

V_IOP_VSSBG_A14

8

1.5V -110 mV, +45 mV

8

M19

PCI A segment

ROUTE AS DIFF PAIR

M18

9

1.5V -110 mV, +45 mV

8

M11

PCI B segment

ROUTE AS DIFF PAIR

M12

9

1.5V -110 mV, +45 mV

8

L15

ROUTE AS DIFF PAIR

K15

9

PCI Express

+3.3V_RSR

R190

1 2

8.2K-5%

8,10
8,10
8,10
8,10
8,10
8,10
8,10

10

8,10

10
10
10
10

8,10

10
10
10

10,36

8,10,36

10

10
10
10

10
10
10
10
36

8
8
8

8

8
8,13,27
8,13,27

8

8,24
8,24
8,24
8,24

PU_IOP_HPI_N

ROMB_FLSH_AD3
ROMB_FLSH_AD4
ROMB_FLSH_AD5
ROMB_FLSH_AD6
ROMB_FLSH_AD7
ROMB_FLSH_AD8
ROMB_FLSH_AD9
ROMB_FLSH_AD10
ROMB_FLSH_AD11
ROMB_FLSH_AD12
ROMB_FLSH_AD13
ROMB_FLSH_AD14
ROMB_FLSH_AD15

ROMB_A16
ROMB_A17
ROMB_A18
ROMB_A19
ROMB_A20
ROMB_A21

NC_DOBSON_A22

ROMB_A0
ROMB_A1
ROMB_A2

ROMB_FLSH_ALE
ROMB_FLSH_OE_N
ROMB_FLSH_WE_N
DOBSON_FLSH_EN_N
DOBSON_PCE1_EN_N

HPC_HIPCK
HPC_HIPLD
HPC_HIPDA

NC_HPC_HOPCK

HPC_HOPLD

NC_HPC_HOPRLD
NC_HPC_HOPDA
NC_HPC_HPRST_N

IOP_PCIX_B_INT0_N
SCSI_INTB_N
SCSI_INTA_N
IOP_PCIX_B_INT1_N
IOP_PCIX_B_INT4_N
IOP_PCIX_B_INT5_N
IOP_PCIX_B_INT6_N
IOP_PCIX_B_INT7_N

NC_Y5
NC_W6
NC_T1

stub

8
8
8
8
8

NC_Y8
NC_AA2
NC_AA4
NC_AB1

V_IOP_VCC_PLL1
V_IOP_VCC_PLL2
V_IOP_VCC_PLL3
V_IOP_VCC_PLL4
V_IOP_VCC_PLL5

V29

AD0

V28

AD1

W24

AD2/MEM_TYPE

V23

AD3/A_PCIX133EN

T23

AD4/P_BOOT16_N

V26

AD5/CORE_RST_N

T22

AD6/RETRY

W23

AD7/B_MODE2

W26

AD8

W27

AD9

T21

AD10/B_PCIX133EN

Y24

AD11/B_M2133EN

U24

AD12/B_HSLOT0

V25

AD13/B_HSLOT1

U22

AD14/B_HSLOT2

Y22

AD15/B_HSLOT3

W29

A16/SMB_MA1

Y27

A17/SMB_MA2

U21

A18/SMB_MA3

V22

A19/SMB_MA5

Y29

A20/B_ODTEN

Y28

A21

W22

A22

Y25

A0

AA29

A1

W21

A2

AA28

ALE

V21

POE_N

Y21

PWE_N

AA26

PCE0_N

AA25

PCE1_N

U8

B_HIPCK

T8

B_HIPLD

W8

B_HIPDA

W7

B_HOPCK

U5

B_HOPLD

U6

B_HOPRLD

V7

B_HOPDA

AA1

B_HPRST

U27

XINT0

U28

XINT1

T24

XINT2

R23

XINT3

W3

XINT4

V5

XINT5

V4

XINT6

V2

XINT7

AA8

HPI

Y5

NC0

W6

NC1

T1

NC2

Y8

NC3

AA2

NC4

AA4

NC5

AB1

NC6

M19

VCCPLL1

M11

VCCPLL2

L15

VCCPLL3

R15

VCCPLL4

P13

VCCPLL5

INTEL DOBSON IOP MISC SIGS

R341

21

8.2K-5%
R405

21

8.2K-5%

U_DOBSON

MISC SIGNALS

PERIPHERAL BUS INTERFACE

VER C0

HETERO 4 OF 6

REFCLKP
REFCLKN

PE0TP0
PE0TP1
PE0TP2
PE0TP3
PE0TP4
PE0TP5
PE0TP6
PE0TP7

PE0TN0
PE0TN1
PE0TN2
PE0TN3
PE0TN4
PE0TN5
PE0TN6
PE0TN7

PE0RP0
PE0RP1
PE0RP2
PE0RP3
PE0RP4
PE0RP5
PE0RP6
PE0RP7

PE0RN0
PE0RN1
PE0RN2
PE0RN3
PE0RN4
PE0RN5
PE0RN6
PE0RN7

PE_RCOMPO

PE_ICOMPI

PE_VCCBG

PE_VSSBG

TCK

TDI

TDO

TRST

TMS

PWRDELAY

PWRGD

GPIO0/U0_RXD

GPIO1/U0_TXD

GPIO2/U0_CTS_N

GPIO3/U0_RTS_N

GPIO4/U1_RXD

GPIO5/U1_TXD

GPIO6/U1_CTS_N

GPIO7/U1_RTS_N

SCD0

SCD1/SDTA

SCL0

SCL1/SCLK

H15
G15

F13
C12
C11
E15
C17
D19
A19
F16

E13
B12
D11
D15
B17
C19
A20
G16

G14
E12
A11
D14
D16
E18
A18
E17

F14
D12
A12
C14
C16
D18
B18
F17

B15
A16
A15
A14

Y2
Y6
AB3
AA5
AB4
W1
AA7

AB26
AB27
AA21
AA22
AC26
AC25
AB23
AB24
AB21
AC24
AA23
AB22

NC_EXP_A_UP_4P_C
NC_EXP_A_UP_5P_C
NC_EXP_A_UP_6P_C
NC_EXP_A_UP_7P_C

NC_EXP_A_UP_4N_C
NC_EXP_A_UP_5N_C
NC_EXP_A_UP_6N_C
NC_EXP_A_UP_7N_C

NC_EXP_A_DN_4P
NC_EXP_A_DN_5P
NC_EXP_A_DN_6P
NC_EXP_A_DN_7P

NC_EXP_A_DN_4N
NC_EXP_A_DN_5N
NC_EXP_A_DN_6N
NC_EXP_A_DN_7N

0.500 V

V_IOP_VCCBG_A15

V_IOP_VSSBG_A14

NC_DOBSON_TDO

DOBSON_TRST_N

GATE_IOP_PWRDELAY

SYSTEM_PWRGOOD_RISER_BUF3

U0_ROMB_RXD

U0_ROMB_TXD

PU_IOP_UART0_CTS_N

PU_IOP_UART0_RTS_N

PU_I2C_DOBSON_SDA1

PU_I2C_DOBSON_SCL1

8
8

CPLD_ROMB_BAT_STAT1
CPLD_ROMB_BAT_STAT2

ROMB_BAT_EN_N

LI_BAT_PRSNT_N

I2C_DOBSON_SDA

8

I2C_DOBSON_SCL

8

CK_100M_DOBSON_P
CK_100M_DOBSON_N

EXP_A_UP_0P_C
EXP_A_UP_1P_C
EXP_A_UP_2P_C
EXP_A_UP_3P_C

EXP_A_UP_0N_C
EXP_A_UP_1N_C
EXP_A_UP_2N_C
EXP_A_UP_3N_C

PU_RCOMP

8
8

DOBSON_TCK

DOBSON_TDI

DOBSON_TMS

EXP_A_DN_0P
EXP_A_DN_1P
EXP_A_DN_2P
EXP_A_DN_3P

EXP_A_DN_0N
EXP_A_DN_1N
EXP_A_DN_2N
EXP_A_DN_3N

R84

49.9-1%
R679

49.9-1%

stub

8
8

Jtag Debug port

8
8
12
17,36

8,10
8,10

8,36
8,36
8,11,36
11,36
8

8

NP

NP

4
4

8
8
8
8

8
8
8
8

4,27
4,27
4,27
4,27

4,27
4,27
4,27
4,27

21

21

R182

1 2

8.2K-5%
R189

1 2

8.2K-5%

EXP_DN IS MCH TX

DN (MCH TX) CONNECTS TO SLOT TX

DN (MCH TX) CONNECTS TO PXH, IOP RX

EXP_UP IS MCH RX

UP (MCH RX) CONNECTS TO SLOT RX

UP (MCH RX) CONNECTS TO PXH, IOP TX

+1.5V

X

X

Dobson I2C =A4

+3.3V_RSR

EXP_A_UP_0P_C

8

EXP_A_UP_1P_C

8

EXP_A_UP_2P_C

8

EXP_A_UP_3P_C

8

EXP_A_UP_0N_C

8

EXP_A_UP_1N_C

8

EXP_A_UP_2N_C

8

EXP_A_UP_3N_C

8

use 402 package

Place these Caps close to Dobson

caps only on upstream, immediately next to Dobson. 0.5 inch max seperation

C377

21

.1uF

10V-10%

C369

21

.1uF

10V-10%

C376

21

.1uF

10V-10%

C368

21

.1uF

10V-10%

C375

21

.1uF

10V-10%

C367

21

.1uF

10V-10%

C374

21

.1uF

10V-10%

C366

21

.1uF

10V-10%

DOBSON Reset Strap Signals

Configuration Retry Mode :

RETRY

CORE_RST#

P_BOOT 16#

MEM_TYPE

A_PCIX133EN

B_PCIX133EN

PCI MODE

PCI ODT

B_HSLOT(3)

B_HSLOT(2:0)

ATU to disable config cycle and control upstream PCIEX config transaction
0 = Config cycle enabled (pull down)

1 = Config Retry enabled by ATU and Retry status respose enanled in PCIEX

Determinate when Xscale core to hold reset until reset bit is cleared
0 = Hold in reset (pull-down)
1 = Do not hold in reset (default mode)

Indicate the default bus width for the PBI memory boot window
0 = 16 bit wide (pull - down)

1 = 8 bit wide (Default mode)

Define the speed of the DDR SDRAM interface
0 = DDR-2 SDRAM at 400Mhz (pull - down)

1 = DDR SDRAM at 266 MHz (Default mode)

Determanes the max A bus PCI-X mode operatin frequency
0 = 100MHz enabled (pull - down )

1 = 133 Mhz enabled (Default mode), if PCIXCAP is high

Determanes the max B bus PCI-X mode operatin frequency
0 = 100MHz enabled (pull - down )

1 = 133 Mhz enabled (Default mode), if PCIXCAP is high

Determanes if PCI will be mode 1 or mode 2
0 = Pull-down to disable mode 2

1 = Pull-up to enable mode 2

Determanes if PCI on-die-termiantor enable/disable
0 = Pull-down to disable PCI on-die-terminator

1 = Pull -up to enabel PCI on-die-terminator

Indicates if B PCI bus Standard Hot Plug is enable for operation
0 = SHPC Disabled ( Pull down)

1 = SHPC Enabled (Default mode)

Indicates if the number and the mode of B PCI bus Standard Hot Plug is enable for operation
xxx

xxx

EXP_A_UP_0P
EXP_A_UP_1P
EXP_A_UP_2P
EXP_A_UP_3P

EXP_A_UP_0N
EXP_A_UP_1N
EXP_A_UP_2N
EXP_A_UP_3N

4,27

4,27

4,27

4,27

4,27

4,27

4,27

4,27

1

2

3

+1.5V

STRAPPED FOR DOBSON

R149

+1.5V

1 2

.499-1%

R152

1 2

.499-1%

I_IOP_VCC_PLL4_L

stub

I_IOP_VCC_PLL5_L

stub

1 2

1 2

4 4

PLL Resistor / Cap Values

L11

4.7uH 80mA

31.8 mA

NP

L12

4.7uH 80mA

31.8 mA

NP

R669

0-5%

R668

0-5%

C252

21

X

C253

21

X

1

2

1

2

C527

22uF 6.3V

C564 21

22uF 6.3V

V_IOP_VCC_PLL4

0.1uF 16V
IOP_VSS_PLL4

V_IOP_VCC_PLL5

1 2

0.1uF 16V
IOP_VSS_PLL5

VCC_PLL trace as short as possibe

0.5 ohm for 33uf, 22uf, or 20 uf
1 ohm for 10uf

VCCA, VSSA DIFF PAIR TO BGA

PCI Express PLL cannot use 1 ohm for 10uf

1.5V -110 mV, +45 mV

8

R15

Xscale & MCU

ROUTE AS DIFF PAIR

R16

9

1.5V -110 mV, +45 mV

8

P13

LBW (Low Bandwidth)

ROUTE AS DIFF PAIR

P14

9

8,36

8,36

8,11,36

8,10
8,10

CPLD_ROMB_BAT_STAT2

CPLD_ROMB_BAT_STAT1

ROMB_BAT_EN_N

U0_ROMB_RXD
U0_ROMB_TXD

PU_IOP_UART0_CTS_N

8

PU_IOP_UART0_RTS_N

8

1 2

R730

1 2

8.2K-5%

1
2
3
4

R731

8.2K-5%

R458

8.2K-5%
RN46

8.2K

Config Retry at ATU disabled

+3.3V_RSR

+3.3V_RSR

Config Retry disabled
Reset mode hold in reset
Bus width is 16 bit
DDR-2 at 400Mhz

pulldown <133 MHz

133 Mhz for Bus Apulldown <133 MHz
133 Mhz for Bus B
Disbable PCI mode2
Disbale on-die-terminator

SHPC disabled

ROMB_FLSH_AD6
ROMB_FLSH_AD5
ROMB_FLSH_AD4
ROMB_FLSH_AD2
ROMB_FLSH_AD3

ROMB_FLSH_AD10

ROMB_FLSH_AD7

ROMB_A20

ROMB_FLSH_AD15

8,10

8,10

8,10

8,10

8,10

8,10

8,10

8,10,36

8,10

Xcore Hold in Reset unless bit cleared
Memory Type is DDR-II
Flash Width is 16 bit
Dobson Channel A is 133Mhz
Dobson Channel B is 133Mhz
Dobson PCIX mode disabled

+3.3V_RSR

Dobson PCI ODT disabled

R363

NP

1 2

8.2K-5%

21

8
7
6
5

NP

8.2K-5%

1.5K-5%

X

R362

21

X

R147

21

R146

21

220

DOBSON_TMS

DOBSON_TDI

DOBSON_TCK

DOBSON_TRST_N

8

NP

1 2

1.5K-1%
R346

8

8

8

1 2

1.5K-1%
R349

1 2

1.5K-1%
R344

1 2

1.5K-1%
R345

1.5K-1%

X

1 2

NP

R347

1 2

1.5K-1%

X

R348

1.5K-1%

1 2

NP

R350

1 2

1.5K-1%

X

R351

1 2

1.5K-1%
R352

pop means PCI Exp 1.0 spec in B0+ chips
depop means PCI Exp 1.0a spec in B0+ chips

NP

1.5K-1%
R287

X

21

ROMB_FLSH_AD8

8,10

Dobson PCI Hot-Plug NOT Supported

+3.3V_AUX

+1.5V

ROOM = DOBSON

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM, RSR, PE2800, SV

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

F1314

2/23/2005

SHEET

8 OF 45

6,7,9-18,21-24,28,29

4-2U,7-3W,11-2U,16-2U,19-3W
21-3W,22-3W,23-3W,24-3W,30-2W
31-3W,32-2T,33-3V,36-3W

9,17,18,29

REV.

A06-00

A B

DC

DOBSON Power and GND

U_DOBSON

B D

CA

ROOM = DOBSON

A3

VSS_A3

A10

VSS_A10

A17

VSS_A17

A27

VSS_A27

B2

VSS_B2

B5

1

+3.3V_RSR

+3.3V_RSR

U_DOBSON

C1
C6

C9
C21
C24
C29

D4
D26

E9
F3
F6

F21
G10
G23

H5

H26

J3
J18
J20
J24
J27

K17
K19
K21

L5

VCC33_C1
VCC33_C6
VCC33_C9
VCC33_C21
VCC33_C24
VCC33_C29
VCC33_D4
VCC33_D26
VCC33_E9
VCC33_F3
VCC33_F6
VCC33_F21
VCC33_G10
VCC33_G23
VCC33_G5
VCC33_G26
VCC33_J3
VCC33_J18
VCC33_J20
VCC33_J24
VCC33_J27
VCC33_K17
VCC33_K19
VCC33_K21
VCC33_L5

VCC 3.3V

VCC33_L20
VCC33_L25

VCC33_M3

VCC33_M6
VCC33_M21
VCC33_M27

VCC33_N20
VCC33_N23
VCC33_N26
VCC33_P21

VCC33_R3

VCC33_R6
VCC33_R20
VCC33_R24
VCC33_R27

VCC33_U7
VCC33_U20
VCC33_U26

VCC33_V3
VCC33_V24

VCC33_W5

VCC33_W20

VCC33_Y26

VCC33_AA24

+1.5V

A13

2

+1.8V

3

+1.3V +1.3V

C13
C18
E14
E16

J10
J12
J14
J16

K9
K10
K11
K13

L10
L12
L18

M9
M13
M15
M17

N10
N12
N14
N16
N18

P9
P11
P15

AA10
AA12
AA14
AA16
AA18
AA20

AB7

AB9
AB11
AB13
AB15
AB17
AB19
AC10
AC20

VCC15_A13
VCC15_C13
VCC15_C18
VCC15_E14
VCC15_E16
VCC15_J10
VCC15_J12
VCC15_J14
VCC15_J16
VCC15_K9
VCC15_K10
VCC15_K11
VCC15_K13
VCC15_L10
VCC15_L12
VCC15_L18
VCC15_M9
VCC15_M13
VCC15_M15
VCC15_M17
VCC15_N10
VCC15_N12
VCC15_N14
VCC15_N16
VCC15_N18
VCC15_P9
VCC15_P11
VCC15_P15

VCC25_AA10
VCC25_AA12
VCC25_AA14
VCC25_AA16
VCC25_AA18
VCC25_AA20
VCC25_AB7
VCC25_AB9
VCC25_AB11
VCC25_AB13
VCC25_AB15
VCC25_AB17
VCC25_AB19
VCC25_AC10
VCC25_AC20

VCC 1.5V

VCC 2.5/1.8V

VCC 1.3V

U12

VCC13_U12

V13

VCC13_V13

W10

VCC13_W10

VCC15_P17
VCC15_P19
VCC15_R10
VCC15_R12
VCC15_R14
VCC15_R18

VCC15_T9
VCC15_T11
VCC15_T13
VCC15_T15
VCC15_T17
VCC15_T19

VCC15_U10
VCC15_U14
VCC15_U16
VCC15_U18

VCC15_V9
VCC15_V11
VCC15_V15
VCC15_V17
VCC15_V19

VCC15_W14
VCC15_W16
VCC15_W18

VCC15_Y15
VCC15_Y17
VCC15_Y19

VCC25_AD6
VCC25_AD12
VCC25_AD19
VCC25_AD24

VCC25_AF4
VCC25_AF10
VCC25_AF13
VCC25_AF17
VCC25_AF20
VCC25_AF22
VCC25_AF26

VCC25_AH11
VCC25_AH16

VCC25_AJ3

VCC13_W12

VCC13_Y9
VCC13_Y11
VCC13_Y13

INTEL DOBSON IOP POWER

VER C0

HETERO 5 OF 6

L20
L25
M3
M6
M21
M27
N20
N23
N26
P21
R3
R6
R20
R24
R27
U7
U20
U26
V3
V24
W5
W20
Y26
AA24

P17
P19
R10
R12
R14
R18
T9
T11
T13
T15
T17
T19
U10
U14
U16
U18
V9
V11
V15
V17
V19
W14
W16
W18
Y15
Y17
Y19

AD6
AD12
AD19
AD24
AF4
AF10
AF13
AF17
AF20
AF22
AF26
AH11
AH16
AJ3

W12
Y9
Y11
Y13

+1.5V

+1.8V

B8
B11
B13
B14
B16
B19
B20
B22
B25
B28

C15

D7

D10
D13
D17
D20
D23
D29

E2

E5

E8
E10
E11
E19
E22
E25

F8

F9
F10
F12
F15
F18
F24
F27

G4
G7

G8
G13
G17
G20
G26
G28

H2

H14
H16
H25
H27
H28
H29

J6

J9
J11
J13
J15
J17
J19
J21

K4

K7
K12
K14
K16
K18
K20
K23
K26

L2

L9
L11
L13
L14
L16
L17
L19
L21
L28

M10
M14
M16
M20
M24

N4
N7

N9
N11
N13
N15
N17
N19
N21

P2

P5
P10
P12
P16
P18
P20
P25
P28

VSS_B5
VSS_B8
VSS_B11
VSS_B13
VSS_B14
VSS_B16
VSS_B19
VSS_B20
VSS_B22
VSS_B25
VSS_B28
VSS_C15
VSS_D7
VSS_D10
VSS_D13
VSS_D17
VSS_D20
VSS_D23
VSS_D29
VSS_E2
VSS_E5
VSS_E8
VSS_E10
VSS_E11
VSS_E19
VSS_E22
VSS_E25
VSS_F8
VSS_F9
VSS_F10
VSS_F12
VSS_F15
VSS_F18
VSS_F24
VSS_F27
VSS_G4
VSS_G7
VSS_G8
VSS_G13
VSS_G17
VSS_G20
VSS_G26
VSS_G28
VSS_H2
VSS_H14
VSS_H16
VSS_H25
VSS_H27
VSS_H28
VSS_H29
VSS_J6
VSS_J9
VSS_J11
VSS_J13
VSS_J15
VSS_J17
VSS_J19
VSS_J21
VSS_K4
VSS_K7
VSS_K12
VSS_K14
VSS_K16
VSS_K18
VSS_K20
VSS_K23
VSS_K26
VSS_L2
VSS_L9
VSS_L11
VSS_L13
VSS_L14
VSS_L16
VSS_L17
VSS_L19
VSS_L21
VSS_L28
VSS_M10
VSS_M14
VSS_M16
VSS_M20
VSS_M24
VSS_N4
VSS_N7
VSS_N9
VSS_N11
VSS_N13
VSS_N15
VSS_N17
VSS_N19
VSS_N21
VSS_P2
VSS_P5
VSS_P10
VSS_P12
VSS_P16
VSS_P18
VSS_P20
VSS_P25
VSS_P28

GROUND

VSS_T10
VSS_T12
VSS_T14
VSS_T16
VSS_T18
VSS_T20
VSS_T25
VSS_T28

VSS_U11
VSS_U13
VSS_U15
VSS_U17
VSS_U19
VSS_U23

VSS_V10
VSS_V12
VSS_V14
VSS_V16
VSS_V18
VSS_V20
VSS_V27

VSS_W11
VSS_W13
VSS_W15
VSS_W17
VSS_W19
VSS_W25
VSS_W28

VSS_Y10
VSS_Y12
VSS_Y14
VSS_Y16
VSS_Y18
VSS_Y20

VSS_Y23
VSS_AA3
VSS_AA6
VSS_AA9

VSS_AA11
VSS_AA13
VSS_AA15
VSS_AA17
VSS_AA19
VSS_AA27

VSS_AB2
VSS_AB5
VSS_AB8

VSS_AB10
VSS_AB12
VSS_AB14
VSS_AB16
VSS_AB18
VSS_AB25

VSS_AC2
VSS_AC3
VSS_AC4
VSS_AC5
VSS_AC6
VSS_AC7

VSS_AC11
VSS_AC17
VSS_AC23

VSS_AD3
VSS_AD9

VSS_AD15
VSS_AD21
VSS_AD27

VSS_AE2
VSS_AE5
VSS_AE8

VSS_AE11
VSS_AE14
VSS_AE16
VSS_AE19
VSS_AE22
VSS_AE25
VSS_AE28

VSS_AF7
VSS_AG1
VSS_AG3
VSS_AG6
VSS_AG9

VSS_AG12
VSS_AG15
VSS_AG18
VSS_AG21
VSS_AG24
VSS_AG29

VSS_AH2
VSS_AH5
VSS_AH8

VSS_AH14
VSS_AH19
VSS_AH22
VSS_AH25
VSS_AH28

VSS_T7

VSS_U4
VSS_U9

VSS_V6

VSS_W2
VSS_W9

VSS_Y3
VSS_Y4
VSS_Y7

T7
T10
T12
T14
T16
T18
T20
T25
T28
U4
U9
U11
U13
U15
U17
U19
U23
V6
V10
V12
V14
V16
V18
V20
V27
W2
W9
W11
W13
W15
W17
W19
W25
W28
Y3
Y4
Y7
Y10
Y12
Y14
Y16
Y18
Y20
Y23
AA3
AA6
AA9
AA11
AA13
AA15
AA17
AA19
AA27
AB2
AB5
AB8
AB10
AB12
AB14
AB16
AB18
AB25
AC2
AC3
AC4
AC5
AC6
AC7
AC11
AC17
AC23
AD3
AD9
AD15
AD21
AD27
AE2
AE5
AE8
AE11
AE14
AE16
AE19
AE22
AE25
AE28
AF7
AG1
AG3
AG6
AG9
AG12
AG15
AG18
AG21
AG24
AG29
AH2
AH5
AH8
AH14
AH19
AH22
AH25
AH28

+1.8V

12

C432

+1.3V

12

C420

+1.5V

12

.1uF

C394

+3.3V_RSR

12

C378

+3.3V_RSR

12

.1uF

10V-10%

.1uF

10V-10%

10V-10%

C393

.1uF

10V-10%

.1uF

10V-10%

12

C431

C419

12

C382

12

.1uF

12

.1uF

12

.1uF

12

10V-10%

C430

C418

.1uF

10V-10%

12

10V-10%

C392

.1uF

10V-10%

10V-10%

.1uF

10V-10%

12

.1uF

10V-10%

12

C433

.1uF

10V-10%

C380

12

.1uF

12

.1uF

12

10V-10%

C435

.1uF

10V-10%

C383

12

10V-10%

12

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

12

C429

12

C391

C379

12

.1uF

.1uF

12

.1uF

12

10V-10%

C428

12

C415

10V-10%

.1uF

10V-10%

12

10V-10%

.1uF

.1uF

10V-10%

C254

.1uF

10V-10%

C427

12

C414

C390

2 1

10V-10%

12

.1uF

12

.1uF

10uF

16V 10%

12

.1uF

10V-10%

C413

10V-10%

10V-10%

.1uF

10V-10%

12

C426

12

12

C389

12

.1uF

10V-10%

.1uF

10V-10%

+1.5V

.1uF

10V-10%

.1uF

10V-10%

12

C425

C412

12

.1uF

12

.1uF

10V-10%

C424

.1uF

10V-10%

12

C397

12

C388

10V-10%

12

C411

.1uF

12

.1uF

10V-10%

12

.1uF

C395

10V-10%

.1uF

10V-10%

C387

.1uF

10V-10%

12

.1uF

C423

12

C410

10V-10%

12

.1uF

12

.1uF

12

.1uF

12

10V-10%

C422

.1uF

10V-10%

10V-10%

12

10V-10%

C386

12

10V-10%

.1uF

C409

C385

.1uF

.1uF

12

10V-10%

C434

12

.1uF

10V-10%

12

.1uF

12

10V-10%

C396

12

10V-10%

.1uF

10V-10%

C257

2 1

C222

10V-10%

.1uF

10V-10%

.1uF

10V-10%

12

C421

10uF

12

NP

X

.1uF

16V 10%

10uF

16V 10%

12

.1uF

12

10V-10%

C464

12

C384

10V-10%

.1uF

10V-10%

.1uF

10V-10%

C256

C255

2 1

DDR2 termination
place immediate after DIMM

+1.8V

C460

21

.1uF

10V-10%

10uF

2 1

16V 10%

1

RN11

2
3
4

100

8

DDR_MA4

6

7
6

DDR_MA3

6

5

1%

1

RN7

2
3
4

100

8
7
6
5

DDR_MA7

DDR_MA8

6

6

1%

1

RN9

2
3
4

100

8
7
6
5

DDR_MA11

DDR_MA9

6

6

1%

1

RN6

2
3
4

100

8
7
6
5

DDR_MA12

NC_RN4_P6
NC_RN4_P5

6

1%

1

RN5

2
3
4

100

8
7
6
5

DDR_MA5

DDR_MA6

6

6

1%

1

RN4

2
3
4

100

8
7
6
5

DDR_MA1

DDR_MA2

6

6

1%

1

RN10

2
3
4

100

8
7
6
5

DDR_RAS_N

DDR_CS0_N

6

6

1%

1

RN13

2
3
4

100

8
7
6
5

DDR_MA0

DDR_BA1

6

6

1%

1

RN14

2
3
4

100

8
7
6
5

DDR_ODT0

DDR_MA13

6

6

1%

1

RN1

2
3
4

100

8
7
6
5

DDR_WE_N

DDR_CAS_N

6

6

C455

21

.1uF

10V-10%

C459

21

.1uF

10V-10%

C454

21

.1uF

10V-10%

C452

21

.1uF

10V-10%

C450

21

.1uF

10V-10%

C446

21

.1uF

10V-10%

C449

21

.1uF

10V-10%

C444

21

.1uF

10V-10%

C442

21

.1uF

10V-10%

C440

21

.1uF

10V-10%

C438

21

.1uF

10V-10%

C439

21

.1uF

10V-10%

1%

10uF

16V 10%

1

RN2

2
3
4

100

8
7
6
5

DDR_CKE0

DDR_CKE1

6,12

6,12

1%

1

RN3

2
3
4

100

8
7
6
5

DDR_MA10

DDR_BA0

6

6

1%

1

RN12

2
3
4

100

8
7
6
5

DDR_ODT1

DDR_CS1_N

6

6

1%

2) Place 10uF caps at each end of row

C461

.1uF

10V-10%

C456

.1uF

10V-10%

C457

.1uF

10V-10%

C453

.1uF

10V-10%

C451

.1uF

10V-10%

C445

.1uF

10V-10%

C447

.1uF

10V-10%

C448

.1uF

10V-10%

C443

.1uF

10V-10%

C441

.1uF

10V-10%

C437

.1uF

10V-10%

C458

.1uF

10V-10%

21

C360

21

10uF 6.3V

C359

21

1 2

10uF 6.3V

21

21

21

21

21

21

21

21

21

21

+3.3V_RSR

R9
R11
R13
R17

VSS_R9
VSS_R11
VSS_R13
VSS_R17

VSS_AJ27

AJ27

C436

C400

C401

C398

C462

C404

C403

C405

C402

C407

C466

C406

C408

C5045

ROOM = ROMB_DIMM

6-8,10-18,21-24,28,29

+1.8V

11,12,14,29

+1.5V

R19

VSS_R19

T2
T5

VSS_T2

+1.3V

VSS_T5

8,17,18,29

28

4 4

IOP_VSS_PLL1

8

IOP_VSS_PLL2

8

IOP_VSS_PLL3

8

M18 R16

VSSA1 VSSA4

M12

K15

VSSA2
VSSA3

VSSA5

P14

IOP_VSS_PLL4
IOP_VSS_PLL5

8
8

1

2

3

INTEL DOBSON IOP GND

VER C0

HETERO 6 OF 6

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

DC

INC.

ROUND ROCK,TEXAS

SCHEM, RSR, PE2800, SV

F1314

SHEET

2/23/2005

REV.

A06-00

9 OF 45

DOBSON Flash and NVRAM

B D

CA

1

1

Populated For AMD

+3.3V_RSR

SUB to 0 ohm for Intel

+3.3V_RSR

R123

PU_ROMB_FLSH_U40_OE_N

21

stub

220

U40

1

OE

ROMB_FLSH_AD3

8,10

ROMB_FLSH_AD4

8,10

ROMB_FLSH_AD5

8,10

ROMB_FLSH_AD6

8,10

ROMB_FLSH_AD7

8,10

ROMB_FLSH_AD8

8,10

ROMB_FLSH_AD9

8,10

ROMB_FLSH_AD10

8,10

2

R115

21

220

2

1D

3

2D

4

3D

5

4D

6

5D

7

6D

8

7D

9

8D

10 20

GND VCC

74LVC573A

TSSOP20

PU_ROMB_FLSH_U41_OE_N

stub

U41

1

OE

LE

1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q

LE

11

19
18
17
16
15
14
13
12

11

C351

+3.3V_RSR

1 2

0.1uF 16V

ROMB_FLSH_ALE

ROMB_FLSH_A3
ROMB_FLSH_A4
ROMB_FLSH_A5
ROMB_FLSH_A6
ROMB_FLSH_A7
ROMB_FLSH_A8
ROMB_FLSH_A9

ROMB_FLSH_A10

ROMB_FLSH_ALE

8,10

10
10
10
10
10
10
10
10

8,10

8,10,36

ROMB_A19

R375

8.2K-5%

1 2

R198

NP

1 2

X

0-5%

De-pop for AMD flash

stub

stub

8
8,10
8,10

36

8,10
8,10

10
10
10
10
10
10
10
10
10
10
10
10
10

8

8

8

8,10,36

DOBSON_FLSH_EN_N
ROMB_FLSH_OE_N
ROMB_FLSH_WE_N

I_U16_PG10_P47

ROMB_FLSH_RST_N
NC_ROMB_RDY_N

ROMB_A1
ROMB_A2
ROMB_FLSH_A3
ROMB_FLSH_A4
ROMB_FLSH_A5
ROMB_FLSH_A6
ROMB_FLSH_A7
ROMB_FLSH_A8
ROMB_FLSH_A9
ROMB_FLSH_A10
ROMB_FLSH_A11
ROMB_FLSH_A12
ROMB_FLSH_A13
ROMB_FLSH_A14
ROMB_FLSH_A15
ROMB_A16
ROMB_A17
ROMB_A18
ROMB_A19

26
28
11

47
12
15

25
24

22
21
20
19
18

48
17
16

8
7
6
5
4
3
2
1

CE
OE
WE

BYTE
RESET
RY/BY

A0
A1

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18

U16

29LV320

VCC

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8A2

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14

DQ15/A-1

VSS1
VSS2

A19
A20

NC13

WP/ACC

37

29
31
33
35
38
40
42
44
3023
32
34
36
39
41
43
45

27
46

9
10
13
14

ROMB_FLSH_AD0
ROMB_FLSH_AD1
ROMB_FLSH_AD2
ROMB_FLSH_AD3
ROMB_FLSH_AD4
ROMB_FLSH_AD5
ROMB_FLSH_AD6
ROMB_FLSH_AD7
ROMB_FLSH_AD8
ROMB_FLSH_AD9
ROMB_FLSH_AD10
ROMB_FLSH_AD11
ROMB_FLSH_AD12
ROMB_FLSH_AD13
ROMB_FLSH_AD14
ROMB_FLSH_AD15

ROMB_A20
ROMB_A21

PU_IB_FLSH_13

8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10

8,36
8

PU_ROMB_FLSH_WP_N

+3.3V_RSR

R176

1 2

stub

SUB*_H4550

ROMB_FLSH_AD11

8,10

ROMB_FLSH_AD12

8,10

ROMB_FLSH_AD13

8,10

ROMB_FLSH_AD14

8,10

ROMB_FLSH_AD15

8,10

PD_74LVC573_P7

stub

stub

220

R337

1 2

R336

1 2

PD_74LVC573_P8

stub

220

R328

PD_74LVC573_P9

220

1 2

2

1D

3

2D

4

3D

5

4D

6

5D

7

6D

8

7D

9

8D

10 20

GND VCC

74LVC573A

TSSOP20

1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q

19
18
17
16
15
14
13
12

+3.3V_RSR

ROMB_FLSH_A11
ROMB_FLSH_A12
ROMB_FLSH_A13
ROMB_FLSH_A14
ROMB_FLSH_A15

NC_74LVC573_P14
NC_74LVC573_P13
NC_74LVC573_P12

10
10
10
10
10

H4550 is made from a 2mx16 blank flash, Dell PN 9N465

AMD Footprint

Dell PN 9N465 is an AMD 29LV320DB-90EI

AMD Flash

A19

Intel Flash

NCPin9

change to 1uF

21

C355

8.2K-5%
R646

NP

1 2

stub

0-5%

De-pop for AMD flash

C352

1uF 6.3V

+3.3V_RSR

X

12

0.1uF 16V

R138

1 2

0.1uF 16V

10K-1%

stub

+3.3V_RSR

R110

1 2

C49

36
8,10
8,10

21

R55

10K-1%

1-1%

1 2

ROMB_A0

8

ROMB_A1

8,10

ROMB_A2

8,10

ROMB_FLSH_A3

10

ROMB_FLSH_A4

10

ROMB_FLSH_A5

10

ROMB_FLSH_A6

10

ROMB_FLSH_A7

10

ROMB_FLSH_A8

10

ROMB_FLSH_A9

10

ROMB_FLSH_A10

10

ROMB_FLSH_A11

10

ROMB_FLSH_A12

10

ROMB_FLSH_A13

10

ROMB_FLSH_A14

10

ROMB_NVRAM_EN_N

ROMB_FLSH_OE_N
ROMB_FLSH_WE_N

stub

NP

21

R56

X

10K-1%

V_IOP_NVRAM_POWER

PU_ROMB_NVRAM_HSB

12
11
10

28
27
23
26

29

31
22

25
30

A0
A1
A2

8

A3

7

A4

6

A5

5

A6

4

A7
A8
A9
A10
A11

3

A12
A13

2

A14
HSB
E

G
W

32Kx8-35ns

NVSRAM

SUB=SUB*_F7747

U29

VCAP

VCCX

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VSS16

NC9

NC24

I_U29_VCAP_P1

1

32

13
14
15
17
18
19
20
21

16

9
24

0.1uF 16V

1 2

C45

ROMB_FLSH_AD0
ROMB_FLSH_AD1
ROMB_FLSH_AD2
ROMB_FLSH_AD3
ROMB_FLSH_AD4
ROMB_FLSH_AD5
ROMB_FLSH_AD6
ROMB_FLSH_AD7

NC_SIMTEK_9

NC_SIMTEK_24

+

10V-20%

68uF

1

C7

2

68uF

8,10
8,10
8,10
8,10
8,10
8,10
8,10
8,10

2

Pin13 NC VPP

C349

1 2

0.1uF 16V

Pin15 R/B# A19
Pin47 BYTE# Vccq

8F073 is blank p/n for Intel Flash
8F073 is 2Mx16 part, bottom boot block

ROOM = ROMB_FLASH

ROOM = ROMB_NVRAM

3

3

can be 3.3v or 5v

+5V_RSR

UART header

NP

P2

3 4

SHROUDED

21

X

U0_ROMB_TXD
U0_ROMB_RXD

8

8

+5V_RSR

11,15,21-24,29,36

+3.3V_RSR

6-9,11-18,21-24,28,29

4 4

ROOM = UART Debug Header, for production

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

INC.

TITLE

SCHEM, RSR, PE2800, SV

DWG NO.

F1314

DATE

2/23/2005

DC

ROUND ROCK,TEXAS

REV.

A06-00

SHEET

10 OF 45

B D

CA

Keep FETS biased LOW to let FET on until VBAT_3V is ramped up

3P3VAUX_PWRGOOD_ROMB_BUF

21

4

CHARGER STATUS
FAST / PRECHARGE
FAULT CONDITION
CHARGED > 90%
BATTERY NOT THERE

STAT 2STAT 1

RED LED GREEN LED

ONOFF

1Hz CYCLING

ON
ON OFF
OFF OFF

+3.3V_AUX

2N7002

1 2

Q17

R74

1.5K-5%

2

3

R49

S

G

1

2N7002

D

I_Q17_P3

I_Q22_PG11_P1

2N7002

stub

470

G

1

I_Q22_P3

D

2

S

2N7002

3

2N7002

1 2

G S

Q22

3

D

R79

1.5K-5%

SI3911DV

21

N

S1D1

SI3911DV

1 2 3

456

tON = 15ns tRISE = 15ns
tOFF = 40ns

tFALL = 25ns

1

1

1

G

SI3911DV

From Boxter / Yellowstone / Everglades

Q18

S

5

D

6

depop R200 to increase charge time from 3 to 4.5 hours

change to 0.5 amp from 1Amp when charging

Current limit=0.1V/R

Outer layer 3" long 10 mil wide = 0.1 ohm

R5

1 2

BATTERY OUT = 4.1V to 3.0V

BATTERY_OUT

11

BATTERY_OUT

11

VOLTAGE=4.2

5

S

Q21

VAUX_PATH

BAT_PATH

6

D

2-5%

+5V_RSR

I_U38_TRMSEL_P13

R199

stub

21

47K-5%

NP

21

NP: Vreg=4.1V/cell

NP

21

2

R200

X

47K-5%

C292

1 2

.01uF 16V

R113

1

.2-1%

I_U38_PG11_PIN2

1

NC_1

2

IN_0

3

IN_1

4

VCC

5

ISNS

6

NC_2

7

APG

8

EN

9

VSEL

10

GND/HEATSINK

U38

BQ24002

NC_4
OUT_0
OUT_1

VSENSE

AGND
STAT2
STAT1

TMR_SEL

CR

NC_3

20
19
18
17
16
15
14
13
12
11

2.85V @100uA

NC_U26_4NC_U26_1

NC_U26_11

I_CR_U38_P12

I_U38_VSENSE_P17

stub

C507

21

10pF

PU_U38_VSEL_P9

stub

R202

X

47K-5%

2

NC_U26_2

R654

1 2

1 2

8.2K-5%

0.1uF 16V

21

C259

10uF

16V 10%

C50

50V-5%

1 2

2-5%

21

C261

ROMB_BAT_STAT2

ROMB_BAT_STAT1

LI_BAT_PACK_P

R338

1 2

100-1%

36

36

4

+3.3V_RSR

R12

21

4.7K

R11

1 2

4.7K

Batt sense res, place by batt conn

10uF

16V 10%

+3.3V_RSR

1 2

8.2K-5%
R191

LI_BAT_PRSNT_N

RAID_BAT

1
2
3
4

POCKET SHR

BATT_PRSNT
PACK+
THERM
PACK-

8,36

D

3

2N7002

21

SG

3P3VAUX_PWRGOOD_ROMB_BUF2

4

10K-5%

2N7002

11,12,34

R166

21

Q15

VBAT_3V

R4

G

1

SI3911DV

I_Q29_P4

3

2

14

5

VHC14

D

S

U7

stub

2N7002

2N7002

1

G

I_Q30_PG11_P1

21

R21

6

21

CPLD_CHARGER_EN

36

R464

1 2

0-5%

C268

Add 6 vias in thermal pad, to gnd

1uF 6.3V

NP

21

R57

X

10K-1%

+3.3V_RSR

21

R162

21

R217

22K-5%

100K

C265

0.57...1.48V

1 2

1uF 6.3V

I_V_C265_P2

+3.3V_AUX

I_RAID_BAT_CONN_P3

stub

21

R1001

1.5K-5%

0-5%

R227

1 2

36

0-5%

stub

ROMB_SWITCH_1P8_EN_

Connects to pin36 of Xilinx part

R1002

SUB=NP*

ROMB_SWITCH_1P8_EN

21

D

3

Q900

2N7002

R728

470

21

1

G

S

2

11,36

ROMB_SWITCH_1P8VAUX_EN_N

Connects to pin 6 of Xilinx.

Load R728 and Q900 and unload R1002 to bypass glitchy xilinx parts
Load R1002 and unload R728 and Q900 when non-glitchy Xilinx are used

3

G

Q18

D

4

4

D

S

2

2

S

Q21

SI3911DV

G

3

R66

1 2

stub

D

I_Q30_P3

3

4.7K

Q30

1

G

S

2

Vgs >1V

2N7002

470

3P3VAUX_PWRGOOD_BUFB_N

+1.8V

C

3

2N3906

1 2

B E

R177

21

I_Q10_P1_R

1.5K-5%

stub

C

3

2N3904

1 2

B E

stub

3906

I_Q47_P1_R

stub

C213

1

Q10

1 2

1uF 6.3V

D

+3.3V_AUX

2

3

I_Q10_P3_R

10K-1% 10K-1%

R687

21

21

C210

8
7
6
5

stub

R686

21

D3 D2

D1D4

I_Q13_P4_R

Q47

3904

1

G1

1uF 6.3V

Q13

SI4463DY

stub

10K-1%

S2D2G2

SOT23-6

U34 input works with 2.7V or greater.

VBAT_3V is 3V rail powered by battery or 3.3Vaux

VBAT_3V

VOLTAGE=3.3

11,12,34

U34

3 4

SHDN OUT

2

GND

MAX1733EUK_T

51

LXIN

Set for 1.8V

KILL_RAID_REG_N

11

S

2

S

3

S

4 5DG

11A 1.5W 20 mOhm

SI4463DY

SO-8

P MOSFET

S

3

S3 S2 S1

2
1

G

4

G

16V 10%

10uF

R3

1 2

8.2K-5%

R685

21

I_Q47_P3_R

3

2

-12V

stub

V_U34_LX_P4

C258

21

R266

1 2

R78

1 2

D1
D
D

22uF 10V

8
7
6

stub

30.1K-1%68.1K-1%

I_U34_OUT

stub

1

C345

2

L2

10uH 1.1A

C478

470pF

50V-10%

22uF 10V

1

C346

2

21

21

22uF 10V

12C347

22uF 10V

1

C297

2

22uF 10V

1

C357

2

VOLTAGE=1.8
RATSNEST_SCHEDULE=MIN_TREE

DDR +1.8volts

VBAT_RAID

6,12

2

3

3

VBAT_3V

11,12,34

ROOM = ROMB_CHARGER

A05_SMR - Added R644, Q900, R1001, R1002, and R728 for Xilinx glitch
ROMB_SWITCH_1P8AUX_EN_N is SYS_PWRGOOD from CPLD

D

3

2N7002

1 2

G S

22K-5%

21

R164

KILL_RAID_REG_N

11

D

3

Rds 14 ohms, Vgs 2.5V

Q9

2N7002

D

3

Q7

2N7002

R20

1 2

470

I_Q9_P1_R

1

G

S

stub

2

1

G

S

2

11,12,34

VBAT_3V

VBAT_3V is 3V rail powered by battery or 3.3Vaux

11,36

ROMB_SWITCH_1P8VAUX_EN_N

This allows factory to disable battery for shipping

pull up on page 36

R178

470

21

I_RBAT_EN_N_R

stub

+3.3V_AUX

4-2U,7-3W,8-2X,16-2U,19-3W
21-3W,22-3W,23-3W,24-3W,30-2W

+5V_RSR

31-3W,32-2T,33-3V,36-3W

10,15,21-24,29,36

+3.3V_RSR

6-10,12-18,21-24,28,29

+1.8V

RBAT_EN_N

7,16,36

4 4

SYSTEM_PWRGOOD_RISER_BUF_5V

C73

1 2

330pF 50V

ROMB_BAT_EN_N

8,36

2N7002

2N7002

G

1

S

2

QB2

D

3

stub

I_RBAT_EN_2

D

3

2N7002

1 2

G S

Q45

G

1

D

3

S

2

I_RBAT_EN_3

R13

C60

1K-5%

1 2

11

14

U7

10

I_RBAT_EN_1

14

U7

9

8

RBAT_EN_N

VHC14 VHC14

stub

2

1

1000pF

50V-10%

stub

C59

1 2

11

0.1uF 16V

ROOM = ROMB_BATTERY_CONTROL

Source of VBAT_RAID

BatteryMain Power VBAT_RAID

x
x

on
off

Vaux

x
on

11

Fom main Power
From Vaux

ROOM = ROMB_ENABLE

A B

off

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

off

on

From Battery

-12V

9,12,14,29

19,21-24,28

TITLE

DWG NO.

DATE

DC

INC.

SCHEM, RSR, PE2800, SV

F1314

2/23/2005

ROUND ROCK,TEXAS

REV.

A06-00

SHEET

11 OF 45

GND

3

DS1818

RESET# VCC

B D

21

CA

+3.3V_RSR

2.98 to 3.15V

809T

(3.08V)

1

0.1uF 16V

2 1

C596

U43

3

VCC

GND

1

RESET

2

3P3V_RISER_PWRGOOD

21

29,36

VBAT_3V

11,12,34

6,11

VBAT_RAID

Battery or 1.8V powered

CPLD_CKE drives the CPLD on a falling edge to hold DDR_RST# low.
We only support buffered DIMMs, which hold internal CKE low during DDR_RST

1

R132

100K

PCI_RST_RISER_BUF2_N

36

Could be 809S, 2.80 to 2.97V

SEE PAGE 29 FOR 809 SELECTION TABLE

12
13

74VHC00

1411U37

Battery or 3.3V powered

I_IOP_SPECIAL_RST_1

R15

21

33-5%

I_IOP_SPECIAL_RST_3

DDR_CKE1

143U37

1
2

74VHC00

stub

stub

IOP_SPECIAL_RST_N

12

VBAT_3V

11,12,34

CPLD_CKE

D

3

S

2

D

3

BSS138

1 2

G S

IOP_PWRDELAY

12

IOP_SPECIAL_RST_N

12

146U37

4
5

74VHC00

5
6

74LVC02

14 U9

4

I_DDR_CKE1

0

2
3

74LVC02

stub

14 U9

stub

1

I_DDR_CKE1_GATE

Q42

FDN337N

1
G

6,9

12,36

DPN T1778 is 74LVC02

+3.3V_RSR

NP

0.1uF 16V

21

12

R225

X

100K

S

2

1

G

Q44

C216

DDR_CKE0

6,9

2

2

D & S swapped from 2N7002 STD

S

3

TP0202T

1 2

G

D

R213

1 2

TP0202T

I_IOP_PWRDELAY_1

1K-5%

20%

D

3

R214

1 2

.22uF 25V

1 2

stub

1K-5%

I_IOP_PWRDELAY2

C270

D4

1

CPLD_CKE

2

MBRS130LT3

stub

14

1

U7

stub

14 U9

8
9

VBAT_3V

14

U7

2

I_IOP_PWRDELAY

stub

3

4

VHC14VHC14

11,12,34

IOP_PWRDELAY

12

+3.3V_RSR

74LVC02

74LVC00/02 Specification

Vcc=3.3V Vcc=1.8V

10

I_DDR_CKE0_1I_DDR_CKE0_2

11
12

74LVC02

stub

14

U9

13

I_DDR_CKE0_GATE

Q43

FDN337N

D

3

1
G

S

2

stub

12,36

Vih_min = 2.3v (min) Vih_min = 1.5v (min)

ViL_max = 0.5v (max)
Voh_min = 1.8v (min)
VoL_max = 0.1v (max)

ROOM = DIMM_SELF_REF

BAR43

3 1

D19

R656

1 2

A (Anode)

4.7K

GATE_IOP_PWRDELAY

N

K (Cathode)

3

BAR43

1 2

P

ViL_max = 0.99v (max)
Voh_min = 2.9v (min)
VoL_max = 0.1v (max)

8

Use schimitt trigger to handle the slow rising IOP_PWRDELAY
Gate IOP_PWRDELAY since Dobson is 3.3V rail

3

3

2.495 +- 0.025V
V_2P5V_AUX_REF

28

+- 3%

1 2

4.99K-1%

1 2

10.2K-1%

R216

R2

ROOM = IOP POWR DELAY

1.854V

+- 0.054v1.8V

+1.8V

50V-10%

1000pF

1.679V

1.6755

21

+- 0.028
+- 1.6%

1.746V

1 2

C262

I_1P679_AUX_VREF

R215

1K-5%

1.703

1.648

1.8mv Hystereisis

stub

1

3

stub

I_U18_P5

+3.3V_AUX

+

-

R59

1 2

1M-5%

U18

5

LMV331

V
G

4

2

21

1P8V_PWRGOOD

29,36

C537

0.1uF 16V

+3.3V_RSR

6-11,13-18,21-24,28,29

+1.8V

9,11,14,29

4 4

Set 1.8V pwr_good at ~95% (DDR-2 Vdd spec +/- 5%)

to switch over the power rail

INC.

TITLE

ROUND ROCK,TEXAS

ROOM = ROMB_BATTERY_CONTROL

SCHEM, RSR, PE2800, SV

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

F1314

2/23/2005

REV.

A06-00

SHEET

12 OF 45

A B

DC

SCSI Controller: PCI_NX/Differential Pairs

B D

CA

from Everglades

1

1

ROOM=LSI_1030

U_SCSI

m66en pin AC5 is actually IOPD_GNT

stub

PD_IOP_PCIX_A_M66EN

12

R1

1K-5%

2

3

CK_IOP_PCIX_A_LSI

7

IOP_PCIX_A_RST_N

7,27

IOP_PCIX_A_CBE7_N

7,27

IOP_PCIX_A_CBE6_N

7,27

IOP_PCIX_A_CBE5_N

7,27

IOP_PCIX_A_CBE4_N

7,27

IOP_PCIX_A_CBE3_N

7,27

IOP_PCIX_A_CBE2_N

7,27

IOP_PCIX_A_CBE1_N

7,27

IOP_PCIX_A_CBE0_N

7,27

IOP_PCIX_A_AD63

7,27

IOP_PCIX_A_AD62

7,27

IOP_PCIX_A_AD61

7,27

IOP_PCIX_A_AD60

7,27

IOP_PCIX_A_AD59

7,27

IOP_PCIX_A_AD58

7,27

IOP_PCIX_A_AD57

7,27

IOP_PCIX_A_AD56

7,27

IOP_PCIX_A_AD55

7,27

IOP_PCIX_A_AD54

7,27

IOP_PCIX_A_AD53

7,27

IOP_PCIX_A_AD52

7,27

IOP_PCIX_A_AD51

7,27

IOP_PCIX_A_AD50

7,27

IOP_PCIX_A_AD49

7,27

IOP_PCIX_A_AD48

7,27

IOP_PCIX_A_AD47

7,27

IOP_PCIX_A_AD46

7,27

IOP_PCIX_A_AD45

7,27

IOP_PCIX_A_AD44

7,27

IOP_PCIX_A_AD43

7,27

IOP_PCIX_A_AD42

7,27

IOP_PCIX_A_AD41

7,27

IOP_PCIX_A_AD40

7,27

IOP_PCIX_A_AD39

7,27

IOP_PCIX_A_AD38

7,27

IOP_PCIX_A_AD37

7,27

IOP_PCIX_A_AD36

7,27

IOP_PCIX_A_AD35

7,27

IOP_PCIX_A_AD34

7,27

IOP_PCIX_A_AD33

7,27

IOP_PCIX_A_AD32

7,27

IOP_PCIX_A_AD31

7,27

IOP_PCIX_A_AD30

7,27

IOP_PCIX_A_AD29

7,27

IOP_PCIX_A_AD28

7,27

IOP_PCIX_A_AD27

7,27

IOP_PCIX_A_AD26

7,27

IOP_PCIX_A_AD25

7,27

IOP_PCIX_A_AD24

7,27

IOP_PCIX_A_AD23

7,27

IOP_PCIX_A_AD22

7,27

IOP_PCIX_A_AD21

7,27

IOP_PCIX_A_AD20

7,27

IOP_PCIX_A_AD19

7,27

IOP_PCIX_A_AD18

7,27

IOP_PCIX_A_AD17

7,27

IOP_PCIX_A_AD16

7,27

IOP_PCIX_A_AD15

7,27

IOP_PCIX_A_AD14

7,27

IOP_PCIX_A_AD13

7,27

IOP_PCIX_A_AD12

7,27

IOP_PCIX_A_AD11

7,27

IOP_PCIX_A_AD10

7,27

IOP_PCIX_A_AD9

7,27

IOP_PCIX_A_AD8

7,27

IOP_PCIX_A_AD7

7,27

IOP_PCIX_A_AD6

7,27

IOP_PCIX_A_AD5

7,27

IOP_PCIX_A_AD4

7,27

IOP_PCIX_A_AD3

7,27

IOP_PCIX_A_AD2

7,27

IOP_PCIX_A_AD1

7,27

IOP_PCIX_A_AD0

7,27

POWER_DRAW=P3.3V@1A
POWER_DRAW=P1.8V@1.8A

AC22

AB10

AC5

AA23

AC25

Y23

AD26

AB13
AB14
AE18
AE21

W22

AB25

AC26

AA25

W23

Y25

Y26
V22
U22
V24
V23
U24
V25

W26

U23
U25

T22

T23

T25
R25
R22
P22
P23
R23
P24
P25

T26
R26

M26

L26
N25
N24

AE9

AF8

AE10
AB11

AC11

AE11
AE12

AB12
AC12
AD13

AE13

AF11

AF16

AE14
AC15
AC14
AD17

AE19
AC18

AB17

AB18

AF20

AE20
AC19

AF23

AE22

AB19
AD21

AF24
AC20

AE23
AC21

CLK
RST
M66EN

CBE7
CBE6
CBE5
CBE4
CBE3
CBE2
CBE1
CBE0

AD63
AD62
AD61
AD60
AD59
AD58
AD57
AD56
AD55
AD54
AD53
AD52
AD51
AD50
AD49
AD48
AD47
AD46
AD45
AD44
AD43
AD42
AD41
AD40
AD39
AD38
AD37
AD36
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

LSI53C1030 REV C0

U_SCSI

LSI LOGIC ULTRA320 SCSI

HETERO 1 OF 4

PAR

PAR64

ACK64
REQ64

FRAME

TRDY

IRDY

STOP

DEVSEL

IDSEL

REQ

GNT

PERR
SERR

INTA
INTB

ALT_INTA
ALT_INTB

PVT1
PVT2

GPIO_7
GPIO_6
GPIO_5
GPIO_4
GPIO_3
GPIO_2
GPIO_1
GPIO_0

A_LED
B_LED

HB_LED

BWE1
BWE0

FLSHALE1
FLSHALE0

MOE

FLSHCE

MPAR1
MPAR0

MCLK

ADSC

ADV

MAD15
MAD14
MAD13
MAD12
MAD11
MAD10

MAD9
MAD8
MAD7
MAD6
MAD5
MAD4
MAD3
MAD2
MAD1
MAD0

RAMCE

SERIAL_DATA

SERIAL_CLK

NC_1
NC_2
NC_3

AF19
AA24

AB20
AD22
AB15
AE16
AE15
AB16
AC16
AC13

AD10
AE8

AE17
AC17

AC8
AE7

AF7
AB9
AE5
AF4

K25
L23
L25
M25
H25
K24
AE25
AC23

J23
K23
C25

E24
H23

J24
K22

G26
G25

C22
B24

E20

D21
B23

D22
E21
B25
D23
E22
C24
F22
E23
D26
E25
H22
F24
G23
D25
F23
G22

D20
H26

J25
A24

N23
AC9

NC_SCSI_AF7

NC_SCSI_AB9
I_SCSI_PVT1_N
I_SCSI_PVT2_N

NC_SCSI_GPIO7
NC_SCSI_GPIO6
NC_SCSI_GPIO5
NC_SCSI_GPIO4
NC_SCSI_GPIO3
NC_SCSI_GPIO2
NC_SCSI_GPIO1
NC_SCSI_GPIO0

NC_SCSI_CH_A_LED_N
NC_SCSI_CH_B_LED_N

SCSI_HB_LED_N

NC_SCSI_E24

NC_SCSI_H23_N

NC_SCSI_MAS1_N
NC_SCSI_MAS0_N

NC_SCSI_MOE_N

NC_SCSI_G25

PU_SCSI_MPAR1_N
PU_SCSI_MPAR0_N

NC_SCSI_E20

NC_SCSI_D21
NC_SCSI_B23

PU_SCSI_MAD15

PU_SCSI_MAD14

PU_SCSI_MAD13

PU_SCSI_MAD12

PU_SCSI_MAD11

PU_SCSI_MAD10

PU_SCSI_MAD9
PU_SCSI_MAD8
PU_SCSI_MAD7
PU_SCSI_MAD6
PU_SCSI_MAD5
PU_SCSI_MAD4
PU_SCSI_MAD3
PU_SCSI_MAD2
PU_SCSI_MAD1
PU_SCSI_MAD0

NC_SCSI_RAMCE_N

SCSI_SDA

SCSI_SCL

PU_SCSI_A24

NC_SCSI_N23

NC_SCSI_AC9

PULLUP FOR PCI-X 66

IOP_PCIX_A_PAR

IOP_PCIX_A_PAR64

IOP_PCIX_A_ACK64_N
IOP_PCIX_A_REQ64_N

IOP_PCIX_A_FRAME_N

IOP_PCIX_A_TRDY_N

IOP_PCIX_A_IRDY_N

IOP_PCIX_A_STOP_N

IOP_PCIX_A_DEVSEL_N

PCIX_SCSI_IDSEL

IOP_PCIX_A_REQ0_N

IOP_PCIX_A_GNT0_N

IOP_PCIX_A_PERR_N
IOP_PCIX_A_SERR_N

SCSI_INTA_N
SCSI_INTB_N

R171

13

13
13

13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13

14
14

TEST PAD

7,27
7,27

7,27
7,27
7,27
7,27
7,27
7,27
7,27

7

7,27
7,27

7,27
7,27

8,27
8,27

stub

21

49.9-1%

stub

+3.3V_RSR

R172

1 2

5,15

8.2K-5%

stub

SCSI_A_DIFFSENSE

R17

stub

R47

21

220K

22K-5%

C3

1 2

0.1uF 16V

21

I_SCSI_A_DIFFSENSE_R

stub

R7

21

10K-1%

I_SCSI_A_VDDBIAS

I_SCSI_A_RBIAS

stub

MUST BE 1%

check shredder

+3.3V_RSR

SCSI_A_SD15_P

5,15

SCSI_A_SD14_P

5,15

SCSI_A_SD13_P

5,15

SCSI_A_SD12_P

5,15

SCSI_A_SD11_P

5,15

SCSI_A_SD10_P

5,15

SCSI_A_SD9_P

5,15

SCSI_A_SD8_P

5,15

SCSI_A_SD7_P

5,15

SCSI_A_SD6_P

5,15

SCSI_A_SD5_P

5,15

SCSI_A_SD4_P

5,15

SCSI_A_SD3_P

5,15

SCSI_A_SD2_P

5,15

SCSI_A_SD1_P

5,15

SCSI_A_SD0_P

5,15

SCSI_A_SD15_N

5,15

SCSI_A_SD14_N

5,15

SCSI_A_SD13_N

5,15

SCSI_A_SD12_N

5,15

SCSI_A_SD11_N

5,15

SCSI_A_SD10_N

5,15

SCSI_A_SD9_N

5,15

SCSI_A_SD8_N

5,15

SCSI_A_SD7_N

5,15

SCSI_A_SD6_N

5,15

SCSI_A_SD5_N

5,15

SCSI_A_SD4_N

5,15

SCSI_A_SD3_N

5,15

SCSI_A_SD2_N

5,15

SCSI_A_SD1_N

5,15

SCSI_A_SD0_N

5,15

SCSI_A_SCD_P

5,15

SCSI_A_SCD_N

5,15

SCSI_A_SIO_P

5,15

SCSI_A_SIO_N

5,15

SCSI_A_SMSG_P

5,15

SCSI_A_SMSG_N

5,15

SCSI_A_SREQ_P

5,15

SCSI_A_SREQ_N

5,15

SCSI_A_SACK_P

5,15

SCSI_A_SACK_N

5,15

SCSI_A_SBSY_P

5,15

SCSI_A_SBSY_N

5,15

SCSI_A_SATN_P

5,15

SCSI_A_SATN_N

5,15

SCSI_A_SRST_P

5,15

SCSI_A_SRST_N

5,15

SCSI_A_SSEL_P

5,15

SCSI_A_SSEL_N

5,15

SCSI_A_SDP0_P

5,15

SCSI_A_SDP0_N

5,15

SCSI_A_SDP1_P

5,15

SCSI_A_SDP1_N

5,15

+3.3V_RSR

SCSI_ICE_TCK

13

SCSI_ICE_TMS

13

SCSI_ICE_TDI

13

SCSI_ICE_TDO

13

SCSI_ICE_TRST_N

13

SCSI_ICE_RTCK

13

SCSI_TCK

13

SCSI_TMS

13

SCSI_TDI

13

SCSI_TDO

13

NC_SCSI_AA22
NC_SCSI_AC4

PULLDOWN FOR PCI 33

W5

A_SD15+

Y2

A_SD14+

AA3

A_SD13+

AC1

A_SD12+

D1

A_SD11+

G1

A_SD10+

H4

A_SD9+

H2

A_SD8+

P3

A_SD7+

R5

A_SD6+

R2

A_SD5+

T4

A_SD4+

U4

A_SD3+

U3

A_SD2+

V5

A_SD1+

V3

A_SD0+

Y1

A_SD15-

AA2

A_SD14-

AB2

A_SD13-

AD1

A_SD12-

F2

A_SD11-

G2

A_SD10-

J4

A_SD9-

H1

A_SD8-

R4

A_SD7-

T5

A_SD6-

T2

A_SD5-

U2

A_SD4-

U5

A_SD3-

V2

A_SD2-

V4

A_SD1-

W4

A_SD0-

T1

A_VDDBIAS

E2

A_DIFFSENS

R1

A_RBIAS

K4

A_SCD+

K3

A_SCD-

J5

A_SIO+

K5

A_SIO-

L1

A_SMSG+

L2

A_SMSG-

J3

A_SREQ+

J2

A_SREQ-

L5

A_SACK+

M5

A_SACK-

N4

A_SBSY+

N3

A_SBSY-

N5

A_SATN+

M4

A_SATN-

M2

A_SRST+

M1

A_SRST-

K2

A_SSEL+

L4

A_SSEL-

P5

A_SPD0+

P4

A_SPDO-

W1

A_SPD1+

W2

A_SPD1-

AF12

PCI5VBIAS8

AE6

PCI5VBIAS7

AD18

PCI5VBIAS6

AD9

PCI5VBIAS5

AC10

PCI5VBIAS4

AB22

PCI5VBIAS3

Y22

PCI5VBIAS2

W25

PCI5VBIAS1

M23

PCI5VBIAS0

AA4

TCK_ICE

Y5

TMS_ICE

AB3

TDI_ICE

AD2

TDO_ICE

AB4

TRST_ICE

AA5

RTCK_ICE

AC6

TCK_CHIP

AE4

TMS_CHIP

AF3

TDI_CHIP

AD6

TDO_CHIP

AC2 Y4

CLKMODE_1 IDDTN

AA22

CLKMODE_0

AC4

SCSI_FSN

LSI LOGIC ULTRA320 SCSI

LSI53C1030 REV C0
HETERO 2 OF 4

B_SD15+
B_SD14+
B_SD13+
B_SD12+
B_SD11+
B_SD10+

B_SD9+
B_SD8+
B_SD7+
B_SD6+
B_SD5+
B_SD4+
B_SD3+
B_SD2+
B_SD1+
B_SD0+

B_SD15­B_SD14­B_SD13­B_SD12­B_SD11­B_SD10-

B_SD9­B_SD8­B_SD7­B_SD6­B_SD5­B_SD4­B_SD3­B_SD2­B_SD1­B_SD0-

B_VDDBIAS

B_DIFFSENS

B_RBIAS

B_SCD+

B_SCD-

B_SIO+

B_SIO-

B_SMSG+

B_SMSG-

B_SREQ+

B_SREQ-

B_SACK+

B_SACK­B_SBSY+

B_SBSY-

B_SATN+

B_SATN-

B_SRST+

B_SRST-

B_SSEL+

B_SSEL-

B_SDP0+

B_SDP0-

B_SDP1+

B_SDP1-

TRACEPKT_7
TRACEPKT_6
TRACEPKT_5
TRACEPKT_4
TRACEPKT_3
TRACEPKT_2
TRACEPKT_1
TRACEPKT_0

PIPESTAT2
PIPESTAT1
PIPESTAT0

TRACECLK

TRACESYNC

TESTHCLK

TESTACLK
TESTCLKEN
SCANMODE

SCANEN

TST_RST

DEFAULTS LOW

SCLK

TN

B7
B6
B5
A4
A23
B20
A20
B19
E12
B12
D11
C10
E11
E10
B9
A8

D8
E8
C6
A3
B21
D19
E18
A19
E13
A12
B11
B10
D10
C9
D9
B8

B13
B22
A11

D17
E16
D18
E17
D16
B16
C18
B18
E14
D14
B15
A15
D13
B14
A16
E15
C17
B17
C13
D12
E9
A7

F4
G5
E3
C2
E4
F5
B2
D4

C3
E6
D5

F3
B3

E5
AE2
AB6
D7
E7
N22

C5
AD5

~LSI_TST_RST TO CPLD JUST IN CASE

NC_SCSI_TESTCLKEN

NC_SCSI_SCANMODE

SCSI_B_SD15_P
SCSI_B_SD14_P
SCSI_B_SD13_P
SCSI_B_SD12_P
SCSI_B_SD11_P
SCSI_B_SD10_P

SCSI_B_SD9_P
SCSI_B_SD8_P
SCSI_B_SD7_P
SCSI_B_SD6_P
SCSI_B_SD5_P
SCSI_B_SD4_P
SCSI_B_SD3_P
SCSI_B_SD2_P
SCSI_B_SD1_P
SCSI_B_SD0_P

SCSI_B_SD15_N
SCSI_B_SD14_N
SCSI_B_SD13_N
SCSI_B_SD12_N
SCSI_B_SD11_N
SCSI_B_SD10_N

SCSI_B_SD9_N
SCSI_B_SD8_N
SCSI_B_SD7_N
SCSI_B_SD6_N
SCSI_B_SD5_N
SCSI_B_SD4_N
SCSI_B_SD3_N
SCSI_B_SD2_N
SCSI_B_SD1_N
SCSI_B_SD0_N

I_SCSI_B_VDDBIAS

SCSI_B_SCD_P
SCSI_B_SCD_N

SCSI_B_SIO_P

SCSI_B_SIO_N
SCSI_B_SMSG_P
SCSI_B_SMSG_N

SCSI_B_SREQ_P
SCSI_B_SREQ_N
SCSI_B_SACK_P
SCSI_B_SACK_N

SCSI_B_SBSY_P
SCSI_B_SBSY_N
SCSI_B_SATN_P
SCSI_B_SATN_N
SCSI_B_SRST_P
SCSI_B_SRST_N
SCSI_B_SSEL_P

SCSI_B_SSEL_N
SCSI_B_SDP0_P
SCSI_B_SDP0_N
SCSI_B_SDP1_P
SCSI_B_SDP1_N

NC_SCSI_F4

NC_SCSI_G5

NC_SCSI_E3

NC_SCSI_C2

NC_SCSI_E4
NC_SCSI_F5
NC_SCSI_B2

NC_SCSI_D4
NC_SCSI_C3

NC_SCSI_E6

NC_SCSI_D5

CK_SCSI_80MHZ

NC_SCSI_B3

NC_SCSI_E5
NC_SCSI_AE2
NC_SCSI_AB6

NC_SCSI_N22

NC_SCSI_Y4NC_SCSI_AC2

NC_SCSI_C5

SCSI_TST_RST_N

5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15

5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15

I_SCSI_B_RBIAS

5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15
5,15

14

36

I_SCSI_B_DIFFSENSE_R

R14

10K-1%

MUST BE 1%

LSI Strapping

+3.3V_RSR

R232

NP

PU_SCSI_MPAR0_N

13

PU_SCSI_MAD15

13

32bit Enable

PU_SCSI_MAD14

13

PU_SCSI_MAD13

13

ID CNTRL 0

ID CNTRL 1

SEEPROM DISABLE

stub

R73

21

22K-5%

stub

21

C4

1 2

0.1uF 16V

R22

21

220K

IOP DISABLE

SCSI_B_DIFFSENSE

NVSRAM ENABLED

ROM SIZE

ROM SIZE

RESERVED

RESERVED

RESERVED

RESERVED

RESERVED

5,15

PU_SCSI_MAD10

13

PU_SCSI_MAD11

13

PU_SCSI_MAD7

13

PU_SCSI_MAD6

13

PU_SCSI_MAD3

13

PU_SCSI_MAD2

13

PU_SCSI_MAD1

13

PU_SCSI_MAD5

13

PU_SCSI_MAD4

13

PU_SCSI_MAD0

13

PU_SCSI_MPAR1_N

13

PU_SCSI_MAD12

13

PU_SCSI_MAD9

13

PU_SCSI_MAD8

13

1 2

NP

1 2

NP

1 2

NP

1 2

NP

1 2

NP

1 2

NP

1 2

1 2

NP

1 2

NP

1 2

1 2

NP

1 2

R186

NP

1 2

4.7K

R185

NP

1 2

4.7K

R175

NP

1 2

4.7K

R174

NP

1 2

4.7K

R173

NP

1 2

4.7K

R234

NP

1 2

4.7K

4.7K

R211

4.7K

R210

4.7K

R209

4.7K

R208

4.7K

R207

4.7K

R206

4.7K

R233

4.7K

R205

4.7K

R235

4.7K

R204

4.7K

R203

4.7K

X
X

X

X
X
X
X

X
X

X
X
X

X
X
X

X

Enable PCIX

Disable 133 Mhz

64 bit PCI wide

Enable 66M PCI

No ID control

2

X

Enable SEEPROM

Disable IOP

Disable NVRAM

Flash Size

Flash Size

X

X

X

3

X

X

X

X

R409

NP

NP

1 2

V6

4 4

DS1

GREEN

12

X

I_DS1_PG13_P1

stub

NP

R401

220

21

X

SCSI_HB_LED_N

13

NP

+3.3V_RSR

SUB=NO_PKG

V5

SUB=NO_PKG

V4

SUB=NO_PKG

V3

SUB=NO_PKG

V2

SUB=NO_PKG

V1

SUB=NO_PKG

SCSI_ICE_TCK
SCSI_ICE_TMS

SCSI_ICE_TDI

SCSI_ICE_TDO

SCSI_ICE_TRST_N

SCSI_ICE_RTCK

13

13

13

13

13

13

NP

NP

1 2

SCSI Heartbeat LED

layout in 1x6 pattern

4.7K

R408

4.7K

R407

4.7K

R270

4.7K

21

X
X

21

X
X

SCSI_TMS

SCSI_TDI

SCSI_TCK

SCSI_TDO

13

+3.3V_RSR

13

RN61

1

13

13

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

2
3
4

4.7K-5%

8
7
6
5

R801

NP

1 2

R802

NP

X

4.7K

1 2

X

4.7K

SCSI_ICE_TCK
SCSI_ICE_TMS

SCSI_ICE_TDI

SCSI_ICE_TRST_N

SCSI_ICE_RTCK

SCSI_ICE_TDO

13
13
13
13

INC.

ROUND ROCK,TEXAS

13

13

TITLE

SCHEM, RSR, PE2800, SV

DWG NO.

F1314 A06-00

DATE

SHEET

2/23/2005

+3.3V_RSR

6-12,14-18,21-24,28,29

REV.

13 OF 45

A B

DC

SCSI Controller: Power/Misc

INDUCTORS FROM EVERGLADES

B D

CA

1

2

2

2

L6

FERRITE

1206

L4

FERRITE

1206

1

1

I_SCSI_VSSA_AD24

I_SCSI_VSSA_H5

stub

stub

H5

AD24

T24

A5

A9
A13
A17
A21
A25

B1
B26

C4

C8
C12
C16
C20
D24

E1

F26

G3
H24

J1

K26

L3
L11
L12
L13
L14
L15
L16

M11
M12
M13
M14
M15
M16
M24

N1
N11
N12
N13
N14
N15
N16

VSSA_H5
VSSA_AD24

VSS_IO_T24
VSS_IO_A5
VSS_IO_A9
VSS_IO_A13
VSS_IO_A17
VSS_IO_A21
VSS_IO_A25
VSS_IO_B1
VSS_IO_B26
VSS_IO_C4
VSS_IO_C8
VSS_IO_C12
VSS_IO_C16
VSS_IO_C20
VSS_IO_D24
VSS_IO_E1
VSS_IO_F26
VSS_IO_G3
VSS_IO_H24
VSS_IO_J1
VSS_IO_K26
VSS_IO_L3
VSS_IO_L11
VSS_IO_L12
VSS_IO_L13
VSS_IO_L14
VSS_IO_L15
VSS_IO_L16
VSS_IO_M11
VSS_IO_M12
VSS_IO_M13
VSS_IO_M14
VSS_IO_M15
VSS_IO_M16
VSS_IO_M24
VSS_IO_N1
VSS_IO_N11
VSS_IO_N12
VSS_IO_N13
VSS_IO_N14
VSS_IO_N15
VSS_IO_N16

U_SCSI

LSI LOGIC ULTRA320 SCSI

LSI53C1030 REV C0

HETERO 4 OF 4

VSSC_B4
VSSC_C14
VSSC_C21
VSSC_C26

VSSC_F25

VSSC_G4

VSSC_L22

VSSC_P2
VSSC_AB5
VSSC_AB7
VSSC_AB8

VSSC_AB23
VSSC_AB24

VSSC_AD14
VSS_IO_P11

VSS_IO_P12
VSS_IO_P13
VSS_IO_P14
VSS_IO_P15
VSS_IO_P16
VSS_IO_P26

VSS_IO_R3
VSS_IO_R11
VSS_IO_R12
VSS_IO_R13
VSS_IO_R14
VSS_IO_R15
VSS_IO_R16

VSS_IO_T11
VSS_IO_T12
VSS_IO_T13
VSS_IO_T14
VSS_IO_T15
VSS_IO_T16

VSS_IO_U1
VSS_IO_V26

VSS_IO_W3

VSS_IO_Y24

VSS_IO_AA1

VSS_IO_AB26

VSS_IO_AC3

VSS_IO_AD7
VSS_IO_AD11
VSS_IO_AD15
VSS_IO_AD19
VSS_IO_AD23

VSS_IO_AE1

VSS_IO_AF2

VSS_IO_AF6
VSS_IO_AF10
VSS_IO_AF14
VSS_IO_AF18
VSS_IO_AF22
VSS_IO_AF26

B4
C14
C21
C26
F25
G4
L22
P2
AB5
AB7
AB8
AB23
AB24
AD14

P11
P12
P13
P14
P15
P16
P26
R3
R11
R12
R13
R14
R15
R16
T11
T12
T13
T14
T15
T16
U1
V26
W3
Y24
AA1
AB26
AC3
AD7
AD11
AD15
AD19
AD23
AE1
AF2
AF6
AF10
AF14
AF18
AF22
AF26

+1.8V

+1.8V

80 MHz Oscillator

2

2

L5

FERRITE

1206

L3

FERRITE

1206

1

I_SCSI_VDDA_C1

1

stub

I_SCSI_VDDA_AB21

stub

C1

AB21

A1
A2

A6
A10
A14
A18
A22
A26

C7
C11
C15
C19
C23

D3
E26

F1

G24

H3

J26

K1

L24

M3
N26

VDDA_C1
VDDA_AB21

VDD_IO_A1
VDD_IO_A2
VDD_IO_A6
VDD_IO_A10
VDD_IO_A14
VDD_IO_A18
VDD_IO_A22
VDD_IO_A26
VDD_IO_C7
VDD_IO_C11
VDD_IO_C15
VDD_IO_C19
VDD_IO_C23
VDD_IO_D3
VDD_IO_E26
VDD_IO_F1
VDD_IO_G24
VDD_IO_H3
VDD_IO_J26
VDD_IO_K1
VDD_IO_L24
VDD_IO_M3
VDD_IO_N26

ROOM=LSI_1030

U_SCSI

LSI LOGIC ULTRA320 SCSI

LSI53C1030 REV C0

HETERO 3 OF 4

VDDC_D2
VDDC_D6

VDDC_D15

VDDC_E19

VDDC_J22

VDDC_M22

VDDC_N2
VDDC_AC7
VDDC_AD3

VDDC_AD25

VDDC_AE3
VDDC_AE24
VDDC_AF15

VDD_IO_P1

VDD_IO_R24

VDD_IO_T3

VDD_IO_U26

VDD_IO_V1

VDD_IO_W24

VDD_IO_Y3

VDD_IO_AA26

VDD_IO_AB1

VDD_IO_AC24

VDD_IO_AD4

VDD_IO_AD8
VDD_IO_AD12
VDD_IO_AD16
VDD_IO_AD20

VDD_IO_AE26

VDD_IO_AF1
VDD_IO_AF5

VDD_IO_AF9
VDD_IO_AF13
VDD_IO_AF17
VDD_IO_AF21
VDD_IO_AF25

D2
D6
D15
E19
J22
M22
N2
AC7
AD3
AD25
AE3
AE24
AF15

P1
R24
T3
U26
V1
W24
Y3
AA26
AB1
AC24
AD4
AD8
AD12
AD16
AD20
AE26
AF1
AF5
AF9
AF13
AF17
AF21
AF25

+3.3V_RSR

L1

12

BLM11A60

NP

21

C330

922RV IS 5% 16V P/N

+3.3V_RSR+3.3V_RSR

SCSI_SCL

13

SCSI_SDA

13

.1uF

25V-20%

+3.3V_RSR

21

R238

stub

4.7K

R239

PD_SCSI_EEPROM_WP

1 2

C329

21

4.7K

R416

21

.1uF

25V-20%

220

C328

X

1 2

8

VCC

6

SCL

5

SDA

.01uF 16V

stub

21

C21

U14

24C16

3.3V

5K236

R263

.1uF

25V-20%

GNDWP

V_3P3V_80M

1 2

PU_80M_P1

1

A0

2

A1

3

A2

47

8.2K-5%

1

E/D

PD_SCSI_EEPROM

U1

80.0000MHz

4

VCC

GND

2

OUT

stub

stub

R16

33-5%

stub

21

CK_SCSI_80MHZ

13

3

R35

220

I_80MHZ_OSC_SCSI

21

1

2

SUB=SUB*_Y6059

Dell P/N
U6940 on 1U

+1.8V

HIGH Freq bypass for 1.8V under chip

Serial EEPROM

sub's Y6059 programmed

X6084 on 2U
Y6059 on 5U

3

3

C327

1 2

C289

.01uF 16V

C290

21

1000pF

50V-10%

C325

1 2

.01uF 16V

21

C326

50V-10%

1 2

.01uF 16V

1000pF

C316

21

C331

1000pF

1 2

50V-10%

.01uF 16V

C287

21

1000pF

50V-10%

C324

1 2

.01uF 16V

C288

21

1000pF

50V-10%

C333

1 2

.01uF 16V

C317

21

1000pF

50V-10%

C323

1 2

.01uF 16V

C286

21

1000pF

50V-10%

+3.3V_RSR

C332

1 2

.01uF 16V

C322

1 2

C321

.01uF 16V

1 2

C320

.01uF 16V

1 2

C319

.01uF 16V

1 2

C318

.01uF 16V

1 2

C22

.01uF 16V

.1uF

C23

25V-20%

21

.1uF

C20

25V-20%

21

.1uF

C19

25V-20%

21

.1uF

C17

25V-20%

21

.1uF

C16

25V-20%

21

.1uF

25V-20%

+3.3V_RSR

6-13,15-18,21-24,28,29

+1.8V

9,11,12,29

21

+3.3V_RSR

4 4

C26

C27

21

.1uF

25V-20%

C5

21

.1uF

25V-20%

C6

21

.1uF

25V-20%

C8

21

.1uF

25V-20%

C9

21

.1uF

25V-20%

C10

21

.1uF

25V-20%

C11

21

.1uF

25V-20%

C12

21

.1uF

25V-20%

C24

21

.1uF

25V-20%

21

.1uF

25V-20%

C14

21

.1uF

25V-20%

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM, RSR, PE2800, SV

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

F1314

2/23/2005

REV.

A06-00

SHEET

14 OF 45

A B

DC