Page 1
8
7
6
5
4
3
2
1
D D
MS-9134
Version 0A
INTEL (R) Brookdale-G Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale-G Chipset:
INTEL GMCH (North Bridge) +
INTEL ICH4 (South Bridge)
C C
On Board Chipset:
BIOS -- FWH
LPC Super I/O -- W83627HF-AW
Clock Generation -- CY28349
LAN -- Intel 82551
LAN -- Intel 82540
PROMISE PDC20276*2
B B
Expansion Slots:
PCI2.2 SLOT * 1
A A
Title Page
Cover Sheet
Block Diagram
CLOCK GENERATOR SPEC
General SPEC 4
Clock ICS950218AF & ATA100 IDE CONNECTORS
mPGA478-B INTEL CPU Sockets
INTEL Brookdale-G GMCH -- North Bridge
INTEL ICH4 -- South Bridge
LPC I/O -- W83627HF-AW
DDR DIMM1&2 and DDR Terminator Resistor
VGA Connector
PCI SLOT 1
FWH & USB 18
FAN/1.5V/D-LED
W83302D ACPI CONTROLLER
VRM 9.0 INTERSIL HIP6302
FRONT PANEL ATX
MANUAL PARTS
IDE RAID/ATA 133
IDE3/IDE4 CONNECTOR
IDE2 RAID/ATA 133
IDE5/IDE6 CONNECTOR
LAN1 82540
LAN1 82540#2
LAN2 82551
LAN2 82551#2
BMC&SMBUS ISOLATION
RESET SPEC
1
2
3
5
6 - 7
8-10
11-12
13
14-15
16
17
19 KB/MS/COM/LPT/FDD
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Cover Sheet
星期五, 十月
2
11, 2002
MS-9134
0A
13 5
1
Page 2
8
Power
Supply
CONN
7
6
Pentium4 Socket478 VRM9.1 CY_28349
5
4
Clock
3
2
1
Scalable Bus
DIMM 1:2
MCH: Memory
D D
IDE
1:2
Controller HUB
HUB Interface
ICH4: I/O
DOUBLE DATA
RATE SDRAM
PCI (33MHz)
Controller HUB
USB Port 1:2
SMBUS
BMC
C C
LPC Bus
Brookdale
Chipset
PCI1
INT#ABCD AD17 R/G#0
PCLK0
Winbond I/O
PS2 Mouse &
Monitor
B B
Keyboard
Parallel (1)
Serial (2)
FWH: Firmware HUB
Floppy Disk
Drive CONN
LAN1
82540
INT#E
AD19
R/G#2
PCLK12
LAN2
82540
INT#F
AD20
R/G#3
PCLK13
IDE
RAID
INT#G
AD21 Hardware
R/G#4
PCLK4
IDE 1
IDE 2
IDE
RAID
INT#H
AD22
R/G#5
PCLK5
IDE 3
IDE 4
POWER CONSUMPTION
CPU
PMCH
ICH2
CLOCK
CODEC
FWH
LAN
SIO
782D
SC2433
SC1205
SC1547 0
DIMM
CNR
AGP
PCI
USB
FAN
TTL
OTHER
NOTE1 --- MCH
A A
VCC_AGP
NOTE2 --- DIMM
S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3
S1/S3 STATE --- 200mA * 3 = 600mA ---> VCC3_SB
VCC3_SB --> 600mA*3.3V/5V=396mA --> VCC5_SB
NOTE3 --- ICH2
VCCP VCC_AGP
69.0A NOTE4 0
2.4A NOTE1
0
0
0
0
0
0
0
0
0
00 0 0
0
0
0
0
0
= VCC1_5 (1.5A) VCC_AGP (0.37A) +
8
VCC1_8
VCC3_DIMM
0
0
0.2A
NOTE3 NOTE3 NOTE3
0
0
0
0
0
0
0
0
0
0
0
0
2.0A 0 0
0
0
0
0
0
0
NOTE2
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1.8V
1.8V_LAN 36mA
VCC1_8SB
VCC3
VCC3+562ET
VCC3_SB
VCC3_SB
VCC1_8SB
VCC5_SB
7
VCC3 VCC5
0
0
0
0
0
0
0
0
0
6.0A 1.0A 8.0A 2.0A
0
0
VCC5_SB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NOTE2
0
?
0
0
0
0
0
0
S0 Power S3/S4/S5
300mA
45mA
410mA
230mA
25mA
=
=
= VCC3_SB VCC1_8SB +
S1
100mA
28mA
30mA
5mA
210mA
0.6mA
+12V
6
-12V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
N/A
N/A
7mA
N/A
N/A
N/A
PCLK1~PCLK5=6.5"
PCLK6+PCLK11=PCLK6+PCLK12=9"
PCLK9+PCLK8 =PCLK9+PCLK10=9"
ICH_PCLK=SIO_PCLK=FWH_PCLK=9"
5
4
(10/5/10 mil)
(10/5/10 mil)
(10/5/10 mil)
(15/5/15 mil)
3
MICRO-STAR
Title
Block Diagram
Size Document Number Rev
Custom
MS-9134
星期五, 十月
Date: Sheet
2
11, 2002
of
23 5
1
0A
Page 3
5
4
3
2
1
3
D D
DDR
DIMM0
MCH-G CPU
PCICLK0_33MHZ
CPUCLK_133MHZ
CPUCLK#_133MHZ
MCHCLK_133MHZ
MCHCLK#_133MHZ
MCH66_66MHZ
3
DIMM0=CLK1/1#,CLK0/0#,CLK2/2#
DIMM1=CLK4/4#,CLK3/3#,CLK5/5#
DOTCLK_48MHZ
DDR
DIMM1
PCI
C C
PCICLK4_33MHZ
RAID1
CLOCK
GENERATOR
PCICLK5_33MHZ
ICH66_66MHZ
ICH48_48MHZ
ICHPCLK_33MHZ
ICH14_14MHZ
RTC CRY
32.768KHZ
ICH4
RAID2
B B
PCICLK2_33MHZ
LAN1
SIO24_24MHZ
14.318MHZ
SIOPCLK_24MHZ FWHPCLK_33MHZ
SIO FWH
LAN2
PCICLK3_33MHZ
A A
Title
Size Document Number Rev
5
4
3
Date: Sheet of
MS-9134
<Doc> 0A
A
星期五, 十月
2
11, 2002
33 5
1
Page 4
8
General SPEC
7
6
5
4
3
2
1
ICH4
Function Type GPIO Pin
GPIO 0
D D
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14~15
C C
GPIO 16
GPIO 17
GPIO 18*
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29~31
B B
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44~47
* GPIO18 will toggle at 1Hz frequen c y.
A A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
REQ#A (multifunction pin)
I
I
REQ#B (multifunction pin)
I
Pull up through 8.2K ohms (PIRQE#)
I
Pull up through 8.2K ohms (PIRQF#)
I
Pull up through 8.2K ohms (PIRQG#)
I
Pull up through 8.2K ohms (PIRQH#)
I
Pull up through 10K ohms (unused)
I
Pull up through 10K ohms (unused)
I
Pull Up to 3.3VSBY through 4.7K ohms (SIO_PME)
Not Implemented
I
Not Implemented
I
I
SMB_ALERT (multifuntion pin)
I
EXTSMI# with Pull up 10K ohms to VCC3_SB
I
Pull up through 10K ohms (unused)
I
Not Implemented
No Connected
O
O
No Connected
O
No Connected
O
No Connected
O
No Connected
O
No Connected
OD
No Connected
No Connected
O
No Connected
No Connected
Not Implemented
No Connected
No Connected
Not Implemented
O
No Connected
No Connected
Primary IDE ATA66/100 detection (PD_DET)
Secondary IDE ATA66/100 detection (S D_ DE T)
No Connected
No Connected
No Connected
No Connected
No Connected
No Connected
No Connected
No Connected
Not Implemented
FWH
GPIO Pin Type Function
I GPI 0
Connect to SD_DET
GPI 1
GPI 2
GPI 3
GPI 4
Connect to PD_DET
I
Pull down through 8.2K ohms (unused)
I
Pull down through 8.2K ohms (unused)
I
I Pull down through 8.2K ohms (unused)
PCI Config.
DEVICE ICH INT Pin IDSEL
PCI 1
LAN1
LAN2
IDE RAID1
IDE RAID2
MINIPCI1
INT
A# B# C# D#
INTC#
INTD#
INTE#
INTF#
INTG#
AD17
AD18
AD19
AD20
AD21
AD22
DIMM Config.
DEVICE ADDRESS CLOCK
DIMM 1 1010000B DCLK0/DCLK0#
DIMM 2 1010001B
DCLK1/DCLK1#
DCLK2/DCLK2#
DCLK3/DCLK3#
DCLK4/DCLK4#
DCLK5/DCLK5#
CLOCK
PCICLK0
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK1
R&G
0
1
2
3
4
5
MSI
Title
Size Document Number Rev
星期五, 十月
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
General SPEC
MS-9134
2
11, 2002
0A
43 5
1
Page 5
8
VCCP
CB1
0.1u
FB1 80_0805
CB195
0.1u
filtering from 10K~1M
FB2 80_0805
CB7
0.1u
4.7u-0805
R30 1K
VCC3
R35 220
CB275
Q1
3904
CB273
10u-0805
VDDA3V
VCC3
D D
* Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around
it
* put close to every power pin
*
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Differentical mode spacing 7mils on itself
VCC3
C C
7
CLOCK GENERATOR BLOCK
VCC3V
CB274
0.1u
SMBCLK_VCC <14,21,33>
SMBDATA_VCC <14,21,33>
SMBCLK_VCC
SMBDATA_VCC
R39
X_1K
CB2
0.1u
CB3
0.1u
CB4
0.1u
CB5
0.1u
CB6
0.1u
C24
0.01u
C26
0.01u
C27
0.01u
39
36
46
43
29
9
5
18
13
24
21
2
47
34
33
26
25
19
U1
CPU_VDD
CPU_GND
MREF_VDD
MREF_GND
3V66_GND
PCI_VDD
PCI_GND
PCI_VDD
PCI_GND
48_VDD
48_GND
REF_VDD
REF_GND
CORE_VDD
CORE_GND
SCLK
SDATA
VTT_GD#
CY28349
6
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
CPUCLK2
CPUCLK2#
3V66_0 3V66_VDD
3V66_1
3V66_2
3V66_48/SEL66_48#
FS2/PCI0
FS3/PCI1
SEL48_24#/PCI2
FS4/PCI3
PCI4
PCI5
PCI6
PCI7
PCI8
PCI9
FS0/48MHz
FS1/24_48MHz
MUL0/REF0
MUL1/REF1
IREF
RESET#
PWR_DN#
5
*Trace < 0.5"
R2 27.4_1%
CPU0
41
40
38
37
45
44
31 32
30
28
27
6
7
8
10
11
12
14
15
16
17
22
23
48
1
3
X1
4
X2
35
20
42
R4 27.4_1%
CPU0#
R10 27.4_1%
CPU1
R12 27.4_1%
CPU1# MCHCLK#
R1210 33
R1211 33
SEL48_2
R589 33
FS2
R587 33
FS3
SEL48_1
FS4
FS0
FS1 SIO_24
MUL0 ICH_14
MUL1
X1
X2
PWR_DN# VCC3V
7 8
RN85
5 6
33
3 4
1 2
7 8
RN2
5 6
33
3 4
1 2
R26 33
R27 33
R25 33
X1 14M-32pf-HC49S-D
R28 475_1%
R590 1K
CB312
0.1u
4
CPUCLK
CPUCLK#
MCHCLK
MCH_66
ICH_66
DOT_CLK
PCICLK1
PCICLK0
PCICLK2
PCICLK3
PCICLK4
FWH_PCLK
SIO_PCLK
ICH_PCLK
PCICLK5
ICH_48
22p C23
22p C25
Iref = 2.32mA
VCC3 VCC3
CB314
0.1u
CPUCLK <6>
CPUCLK# <6>
MCHCLK <8>
MCHCLK# <8>
MCH_66 <8>
ICH_66 <12>
DOT_CLK <8>
PCICLK1 <13>
PCICLK0 <17>
PCICLK2 <29>
PCICLK3 <31>
PCICLK4 <25>
FWH_PCLK <18>
SIO_PCLK<24>
ICH_PCLK <11>
PCICLK5 <27>
ICH_48 <12>
SIO_24 <13>
ICH_14 <12>
8445
8442
8544
8547
8119
8132
4098
4480
5613
5614
5591
5613
8106
8105
8104
3060
7222
2641
5512
3
2
Shut Source Termination Resistors
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
R1 49.9_1%
R3 49.9_1%
R5 49.9_1%
R7 49.9_1%
CLOCK STRAPPING RESISTORS
FS0 VCC3V
VCC3V
SIO_24
SEL48_1
FS3
FS2
FS4
SEL48_2
MUL0
MUL1
1 1 1 1 1
SMBCLK_VCC
SMBDATA_VCC
R740 10K
R22 1.5K
R18 8.2K
RN75
1 2
3 4
5 6
7 8
10K
R741 10K
R1265 X_10K
R742 10K
R871 X_10K
R1003 10K
R29 2.7K
R32 2.7K
BSEL0 <6,8>
VCC3V
VCC3V
VCC3V
FSB (MHz) FS4 FS3 FS2 FS1 FS0
100 MHz 1 1 1 0 1
133 MHz
VCC3
MUL0=0
MUL1=1
1
Pull-Down Capacitors
10p C775
10p C776
10p C777
10p C778
CN14
7
5
3
1
10p
CN11
2
4
6
8
10p
Ioh=6*Iref
Voh=0.71V
10p C1
10p C2
10p C3
10p C4
8
6
4
2
1
3
5
7
10p C16
10p C376
10p C20
10p C21
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
PCICLK4
PCICLK5
ICH_66
MCH_66
PCICLK1
PCICLK0
PCICLK2
PCICLK3
FWH_PCLK
SIO_PCLK
ICH_PCLK
ICH_14
SIO_24
ICH_48
DOT_CLK
used only for EMI issue
Trace less 0.2"
B B
PDD[0..15] <12>
A A
8
HD_RST# <21>
PD_DREQ <12>
PD_IOW# <12>
PD_IOR# <12>
PD_IORDY <12>
PD_DACK# <12>
IRQ14 <11>
PD_A1 <12>
PD_A0 <12>
PD_CS#1 <12>
PD_LED <23>
HD_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
VCC5
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
IDE1
R47
4.7K
R43 33
7
C29
220p
R48
10K
VCC3
YJ220-CB-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
2
PDD8
PDD9
PDD10
PDD11
PDD12
12
PDD13
PDD14
16 15
PDD15
22
24
26
28
30
32
34
36
38
40 39
R743
15K
6
ATA100 IDE CONNECTORS
SDD[0..15] <12>
PDD[0..15]
SD_DREQ <12>
SD_IOW# <12>
SD_IOR# <12>
SD_IORDY <12>
SD_DACK# <12>
IRQ15 <11>
SD_A1 <12>
SD_A0 <12>
SD_CS#1 <12>
PD_DET <18>
PD_A2 <12>
PD_CS#3 <12>
5
SD_LED <23>
4
VCC5
HD_RST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
R49
4.7K
R44 33
C31
220p
3
R50
10K
VCC3
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
IDE2
YJ220-CW-1
2
SDD8
SDD9
SDD10
SDD11
SDD12
12
SDD13
SDD14
16 15
SDD15
22
24
26
28
30
32
34
36
38
40 39
R744
15K
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
2
* Trace Width : 5mils
* Trace Spacing : 7mils
* Length(longest)-Length(shortest)<0. 5 "
* Trace Length less than 5"
SDD[0..15]
SD_DET <18>
SD_A2 <12>
SD_CS#3 <12>
MICRO-STAR INT'L CO.,LTD.
Clock Gen & ATA100 IDE Connectors
11, 2002
MS-9134
53 5
1
0A
Page 6
8
7
6
5
4
3
2
1
VCCPS+
HA#[31..3] <8>
P24
HA#25
A26#
D41#
R21
HA#24
A25#
D40#
N25
HA#23
A24#
D39#
N26
HA#22
A23#
D38#
M26
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
HA#19
A20#
D35#
P21
HA#18
A19#
D34#
N22
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
HA#12
A13#
D28#
L22
HA#27
HA#30
HA#26
HA#29
HA#31
U24
A34#
D49#
U26
A33#
D48#
T23
A32#
D47#
T22
A31#
D46#
T25
A30#
D45#
T26
HA#28
A29#
D44#
R24
A28#
D43#
R25
A27#
D42#
D D
U3A
HINV#0
HINV#[3..0] <8>
FERR# <11>
STPCLK# <11>
HINIT# <11>
HDBSY# <8>
HDRDY# <8>
HTRDY# <8>
HADS# <8>
HLOCK# <8>
HBNR# <8>
HIT# <8>
HITM# <8>
C C
Trace 10 mils width
10 mils space, Max 8"
B B
HBPRI# <8>
HDEFER# <8>
CPU_TMPA <13>
VAGND <13>
TRMTRIP# <11>
PROCHOT# <12>
IGNNE# <11>
HSMI# <11>
A20M# <11>
SLP# <11>
CPU_GD <12>
CPURST# <8>
HD#[63..0] <8>
HINIT#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
PROCHOT#
BSEL0 <5,8>
CPU_GD
CPURST#
HINV#1
HINV#2
HINV#3
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
AC3
AA3
AB2
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
G25
P26
V21
A22
Y21
Y24
Y23
Y26
V24
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
D53#
D52#
D51#
D50#
V22
U21
V25
U23
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
HA#8
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
D17#
H22
D16#
AE25A5A4
DBR#
VCC_SENSE
D15#
D14#
D13#
D25
J21
D23
C26
VCCPS-
VSS_SENSE
D12#
D11#
H21
AD26
ITP_CLK1
D10#
G22
AC26
ITP_CLK0
D9#
D8#
B25
C24
VCCPS+ <22>
VCCPS- <22>
VID2
VID4
VID3
AE1
AE2
AE3
VID4#
VID3#
VID2#
D7#
D6#
D5#
D4#
C23
B24
D22
C21
VID1
VID0
AE4
AE5
VID1#
D3#
A25
A23
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
B22
B21
VID[4..0] <13,22>
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
R929 49.9_1%
A6
R930 49.9_1%
Y3
R931 49.9_1%
W4
R932 49.9_1%
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
SOCKET478
GTLREF
BPM#5
BPM#4
BPM#3
BPM#2
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R933 1K
HRS#2
HRS#1
HRS#0
HBR#0
R64 51.1_1%
R65 51.1_1%
HREQ#[4..0] <8>
VCCP
VCCP
CPUCLK# <5>
CPUCLK <5>
HRS#[2..0] <8>
HBR#0 <8>
* Short trace
HADSTB#1 <8>
HADSTB#0 <8>
HDSTBP#3 <8>
HDSTBP#2 <8>
HDSTBP#1 <8>
HDSTBP#0 <8>
HDSTBN#3 <8>
HDSTBN#2 <8>
HDSTBN#1 <8>
HDSTBN#0 <8>
NMI <33>
INTR <11>
CPU GTL REFERNCE VOLTAGE BLOCK CPU SIGNAL BLOCK
with in
1"~2"
VCCP
C35
1u-0805
R54
49.9_1%
R55
100_1%
GTLREF
2/3*Vccp
C34
220p
Every pin put one 220pF cap near it.
Trace Width 7mils, Space 10mils.
Keep the voltage divider within
1.5" of the GETREF pin.
CPU STRAPPING RESISTORS
BPM#5
BPM#4
BPM#3
BPM#2
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
HINIT#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
R85 51
R82 51
R88 51
R87 51
R78 X_62
R80 300
R81 150
R84 51
R86 X_300
R79 150
R76 75
R74 39
R83 680
R77 27
VCCP
VCCP
VCCP
HD#1
HD#5
HD#2
HD#4
HD#7
HD#9
HD#30
HD#31
HD#29
HD#28
HD#26
HD#27
HD#25
HD#24
HD#42
HD#41
HD#40
HD#39
HD#37
HD#38
HD#35
HD#34
6
HD#33
HD#47
HD#48
HD#50
HD#53
HD#51
HD#52
A A
8
7
HD#49
HD#45
HD#46
HD#44
HD#43
HD#36
HD#32
HD#23
HD#22
HD#20
HD#21
HD#18
HD#19
HD#16
HD#17
5
HD#14
HD#13
HD#11
HD#10
HD#6
HD#8
HD#12
HD#15
HD#3
HD#0
MSI
Title
Size Document Number Rev
星期五, 十月
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
mPGA478-B INTEL CPU SOCKET Part 1
2
11, 2002
MS-9134
63 5
1
0A
Page 7
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCCP
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
C C
B B
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
U3B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
H26H4J2
VSS
VSS
VSS
VSS
VSS
VSS
J22
J25J5K21
VSS
VSS
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
VCC-VID
VSS
AF3
XX1
VCC-VIDPRG
HVSS
XX2
HVSS
AE23
XX3
VCC-IOPLL
HVSS
XX4
HVSS
AD20
XX5
VCCA
HVSS
XX6
HVSS
XX7
HVSS
XX8
HVSS
XX9
HVSS
HVSS
XX10
HVSS
HVSS
XX11
XX12
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HVSS
HVSS
HVSS
HVSS
SOCKET478
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
XX16
XX15
XX14
XX13
VCC_VID <21>
C444
0.1u
Keep the 22uF cap within 0.6"
of the CPU pin.
Trace Width 12mils, Space 10mils.
C39
22u-1206
L23 4.7uH/100MA
L24 4.7uH/100MA
C40
22u-1206
VCCP
CPU DECOUPLING CAPACITORS
VCCP VCCP
CB12
10u-1206
CB19
10u-1206
CB26
10u-1206
CB33
10u-1206
CB40
10u-1206
CB47
A A
10u-1206
CB53
10u-1206
Place 14 pcs 1206 size cap
north side of processor
8
VCCP
CB20
10u-1206
CB34
10u-1206
CB41
10u-1206
CB21
10u-0805
CB28
10u-0805
CB42
10u-0805
CB49
10u-0805
CB55
10u-0805
CB18
10u-0805
CB22
10u-0805
CB43
10u-0805
CB56
10u-0805
CB59
10u-0805
CB15
10u-0805
CB29
10u-1206
CB14
10u-0805
CB50
10u-0805
CB25
10u-0805
PLACE CAPS WITHIN CPU CAVITY
7
6
VCCP VCCP
CB39
10u-0805
CB46
10u-0805
CB52
10u-0805
CB57
10u-0805
CB60
10u-0805
CB58
10u-0805
Place these caps on south
side of processor
5
CT88
VCCP
+
X_150U/SP-CAP
CT89
+
X_150U/SP-CAP
Within CPU Cavity Solder Side
4
MSI
Title
Size Document Number Rev
星期五, 十月
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
mPGA478-B INTEL CPU Part2
MS-9134
2
11, 2002
0A
73 5
1
Page 8
5
4
3
2
1
Y28
T28
M28
K26
K22
K20
K18
AD28
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
CPURST#
HD_VREF1
HD_VREF2
HA_VREF
HCC_VREF
HY_SWNG
HX_SWNG
HI_SWING
HL_RCOMP
DDCA_DATA
DDCA_CLK
DREFCLK
VCCP
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
GCLKIN
RSTIN#
PWROK
HSYNC
VSYNC
REFSET
HI6
HI7
HI8
HI9
HI10
HD#0
T30
HD#1
R33
HD#2
R34
HD#3
N34
HD#4
R31
HD#5
L33
HD#6
L36
HD#7
P35
HD#8
J36
HD#9
K34
HD#10
K36
HD#11
M30
HD#12
M35
HD#13
L34
HD#14
K35
HD#15
H36
HD#16
G34
HD#17
G36
HD#18
J33
HD#19
D35
HD#20
F36
HD#21
F34
HD#22
E36
HD#23
H34
HD#24
F35
HD#25
D36
HD#26
H35
HD#27
E33
HD#28
E34
HD#29
B35
HD#30
G31
HD#31
C36
HD#32
D33
HD#33
D30
HD#34
D29
HD#35
E31
HD#36
D32
HD#37
C34
HD#38
B34
HD#39
D31
HD#40
G29
HD#41
C32
HD#42
B31
HD#43
B32
HD#44
B30
HD#45
B29
HD#46
E27
HD#47
C28
HD#48
B27
HD#49
D26
HD#50
D28
HD#51
B26
HD#52
G27
HD#53
H26
HD#54
B25
HD#55
C24
HD#56
B23
HD#57
B24
HD#58
E23
HD#59
C22
HD#60
G25
HD#61
B22
HD#62
D24
HD#63
G23
AE7
AJ31
D22
E7
H24
D27
AD30
P30
Y30
H28
HL6
AE4
HL7
AE5
HL8
AF3
HL9
AE2
HL10
AF2
HUB_MREF
HI_SWING
AD2
R98 68.1_1%
AC2
C7
D7
B7
C6
D14
R103 137_1%
B16
Brookdale_GMCH
HVREF
HSWNG
X_10p C294
HD#[63..0] <6>
MCH_66 <5>
PCIRST#1 <13,17,18,21,24>
CPURST# <6>
PWR_GD <12,21>
HL[10..0] <11>
Trace 10 mils &
7mils space <
0.5"
VDDQ
3VDDCDA <16>
3VDDCCL <16>
3V_HSYNC <16>
3V_VSYNC <16>
DOT_CLK <5>
BSEL0 <5,6>
VCC3
VDDQ
VCCA_SM
VDDQ
VCCA_DPLL
CB71 0.1u
R101
10K
D D
* Length must be matched
within +/-0.1"of th e Strobe
Signals
C C
B B
HA#[31..3] <6>
HREQ#[4..0] <6>
HRS#[2..0] <6>
HDBSY# <6>
HDRDY# <6>
HADSTB#0 <6>
HADSTB#1 <6>
HDSTBN#0 <6>
HDSTBP#0 <6>
HDSTBN#1 <6>
HDSTBP#1 <6>
HDSTBN#2 <6>
HDSTBP#2 <6>
HDSTBN#3 <6>
HDSTBP#3 <6>
HINV#[3..0] <6>
MCHCLK <5>
MCHCLK# <5>
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HBR#0 <6>
HBNR# <6>
HBPRI# <6>
HLOCK# <6>
HADS# <6>
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HIT# <6>
HITM# <6>
HDEFER# <6>
HTRDY# <6>
HRS#0
HRS#1
HRS#2
HINV#0
HINV#1
HINV#2
HINV#3
R94 24.9_1%
R95 24.9_1%
Trace 10 mils & 7mils space < 0.5"
HL[10..0] <11>
HL_STB <11>
HL_STB# <11>
CRT_B <16>
CRT_B# <16>
CRT_G <16>
CRT_G# <16>
CRT_R <16>
CRT_R# <16>
A A
HL0
HL1
HL2
HL3
HL4
HL5
U4A
W31
HA3#
AA33
HA4#
AB30
HA5#
VTTFSB
V34
HA6#
Y36
HA7#
AC33
HA8#
Y35
HA9#
AA36
HA10#
AC34
HA11#
AB34
HA12#
Y34
HA13#
AB36
HA14#
AC36
HA15#
AC31
HA16#
AF35
HA17#
AD36
HA18#
AD35
HA19#
AE34
HA20#
AD34
HA21#
AE36
HA22#
AF36
HA23#
AE33
HA24#
AF34
HA25#
AG34
HA26#
AG36
HA27#
AE31
HA28#
AH35
HA29#
AG33
HA30#
AG31
HA31#
U33
BREQ0#
T34
BNR#
M34
BPRI#
T35
HLOCK#
T36
ADS#
V36
HREQ0#
AA31
HREQ1#
W33
HREQ2#
AA34
HREQ3#
W35
HREQ4#
P36
HIT#
M36
HITM#
N36
DEFER#
V30
HTRDY#
R36
RS0#
U34
RS1#
P34
RS2#
U31
DBSY#
U36
DRDY#
AB35
HAD_STB0#
AF30
HAD_STB1#
N31
HD_STBN0#
L31
HD_STBP0#
G33
HD_STBN1#
J34
HD_STBP1#
C30
HD_STBN2#
E29
HD_STBP2#
D25
HD_STBN3#
E25
HD_STBP3#
N33
DINV_0#
C35
DINV_1#
B33
DINV_2#
C26 H30
DINV_3# HD_VREF0
K30
HCLKP
J31
HCLKN
V35
HY_RCOMP
B28
HX_RCOMP
AA7
HI0
AB8
HI1
AC7
HI2
AC5
HI3
AD8
HI4
AF4 AD3
HI5 HI_REF
AD4
HI_STBS
AC4
HI_STBF
G15
BLUE
H16
BLUE#
E15
GREEN
F16
GREEN#
C15
RED
D16
RED#
VTTFSB
HOST
HUB LINK
VGA
U4C
A3
VCC_AGP
POWER
A7
VCC_AGP
C1
VCC_AGP
D4
VCC_AGP
D6
VCC_AGP
G1
VCC_AGP
K6
VCC_AGP
L1
VCC_AGP
L9
VCC_AGP
P6
VCC_AGP
R1
VCC_AGP
R9
VCC_AGP
W9
VCC_AGP
V6
VCC_AGP
AD6
VCC_HI
AC9
VCC_HI
AC1
VCC_HI
AE3
VCC_HI
W19
VCC
Y19
VCC
AA19
VCC
W20
VCC
U21
VCC
W21
VCC
AA21
VCC
A9
VCC
B9
VCC
C9
VCC
D9
VCC
E9
VCC
B10
VCC
C10
VCC
D10
VCC
F10
VCC
H10
VCC
A11
VCC
B11
VCC
C11
VCC
D11
VCC
E11
VCC
G11
VCC
J11
VCC
B12
VCC
C12
VCC
D12
VCC
F12
VCC
H12
VCC
G13
VCC
J13
VCC
H14
VCC
J15
VCC
AA17
VCC
W18
VCC
W17
VCC
V19
VCC
U19
VCC
U17
VCC
Other
GND
GND
GND
GND
Y10
AH16
AH20
AH24
AH28
GND
GND
AF28
VCCA_FSB
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
GND
GND
AB28
V28
VCCQ_SM
VCCQ_SM
GND
P28
AG2 AT20
VCCA_SM VCCQ_SM
AG1
VCCA_SM
A15
VCCA_DAC
B14
VCCA_DAC
A13
VCCA_DPLL
C14
VSSA_DAC
B15
VSSA_DAC
B6
VCC_GPIO
Y3
PSBSEL
R102
10K
Y2
RSVD
AA2
RSVD
AA4
RSVD
AA3
RSVD
AA5
RSVD
W7
RSVD
Y4
RSVD
Y8
RSVD
A37
RSVD
AB2
RSVD
AB3
RSVD
GND
GND
M10
T10
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
GND
K24
K28
GND
AH8
AK8
AG9
AJ9
AL9
AM22
AJ23
AL37
AU9
AK10
AJ11
AL11
AU25
AM26
AU13
AM14
AJ27
AJ1
AL1
AJ15
AP15
AU29
AH2
AJ2
AK2
AL2
AM30
AH3
AJ3
AK3
AL3
AH4
AJ4
AK4
AL4
AU17
AJ5
AL5
AU5
AM18
AJ19
AK32
AU33
AH6
AK6
AP20
AG7
AJ7
AL7
AP7
B18
C18
D18
H18
B19
C19
D19
E19
G19
J19
B20
C20
D20
F20
H20
F18
A17
AT21
AU21
G37
L37
R37
AC37
A31
Place <0.1"
A2
NC
A36
NC
AH34
NC
AJ35
NC
AT1
NC
AT37
NC
AU1
NC
AU2
NC
AU36
NC
AU37
NC
B1
NC
B37
NC
Brookdale_GMCH
VCC_DDR
VCCA_FSB
VCCQ_SM
VCCP
CB66 0.1u
CB67 0.1u
CB68 0.1u
CB69 0.1u
CB70 0.1u
GMCH REFERENCE BLOCK
VCCA_FSB
VCCA_DPLL
VCCA_SM
VCCQ_SM
Place Cap. as Close as possible to
GMCH
Keep the voltage divider within 3" of the
GMCH pin.
HI_SWING
HUB_MREF
Place 0.01uF Cap. as Close as possible to
GMCH< 0.25"
Trace width 12 mils & 10mils space
MSI
L25 0.82uH_0603
C284
CB62
22u-1206
0.1u
L26
+
10uH_0805
C46
CB63
470u
0.1u
L27 1uH-0805
CT10
CB64
+
100u_16V
0.1u
L28 0.68uH-0805
C285
CB270
4.7u-0805
0.1u
R520
1
VCCP
HSWNG
C48
0.01u
VCCP
HVREF
C50
0.1u
, Trace width 12 mils & 10mils space
C51
C52
0.01u
0.1u
C54
C53
0.1u
0.01u
I=30mA
I=35mA
I=500mA
I=150mA
R89
301 1%
R90
150 1%
R91
49.9 1%
R92
100_1%
VDDQ
R991
R93
226_1%
R96
100_1%
R97
100_1%
1
C446
0.01u
VDDQ
VDDQ
VDDQ
VCC_DDR
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Brookdale-G GMCH-1 (HOST & HI & VGA)
星期五, 十月
11, 2002
MS-9134
1
83 5
0A
Page 9
5
AH10
AH12
AH14
AH18
AGP
VCC_AGP
VCC_AGP
K10
K12
VCCSM
VCCSM
VCCSM
DDR
VCC_AGP
VCC_AGP
VCC_AGP
K14
K16
P10
AH22
VCCSM
VCC_AGP
V10
AB10
VCCSM
VCC_AGP
VDDQ
AN4
AP2
AT3
AP5
AN2
AP3
AR4
AT4
AT5
AR6
AT9
AR10
AT6
AP6
AT8
AP8
AP10
AT11
AT13
AT14
AT10
AR12
AR14
AP14
AT15
AP16
AT18
AT19
AR16
AT16
AP18
AR20
AR22
AP22
AP24
AT26
AT22
AT23
AT25
AR26
AP26
AT28
AR30
AP30
AT27
AR28
AT30
AT31
AR32
AT32
AR36
AP35
AP32
AT33
AP34
AT35
AN36
AM36
AK36
AJ36
AP36
AM35
AK35
AK34
AK24
AL23
V4
V2
W4
W5
U5
U4
U2
V3
T2
T3
T4
R2
R5
R7
T8
P3
P8
K4
K2
J2
M3
L5
L4
H4
G2
K3
J4
J5
J7
H3
K8
G4
R4
N4
M2
H2
U4B
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SRCVEN_OUT#
SRCVEN_IN#
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#
MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
D D
C C
Trace lengh
must as short
as possible
for SRCVEN
Trace width 12
mil with 12 mil
space for
SM_VREF.
B B
A A
DDR_VREF
GAD13 <17>
GAD14 <17>
GAD15 <17>
GAD30 <17>
MDQ10
MDQ11
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63
R118 X_0_Soder
C55 0.1u
GAD13
GAD14
GAD15
GAD30
5
AH26
SMA0
SMA1
SMA2
VCCSM
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
SMAB1
SMAB2
SMAB4
SMAB5
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SCKE0
SCKE1
SCKE2
SCKE3
SCS0#
SCS1#
SCS2#
SCS3#
SCMDCL_K0
SCMDCLK_0#
SCMDCLK_1
SCMDCLK_1#
SCMDCLK_2
SCMDCLK_2#
SCMDCLK_3
SCMDCLK_3#
SCMDCLK_4
SCMDCLK_4#
SCMDCLK_5
SCMDCLK_5#
SBA_0
SBA_1
SRAS#
SCAS#
SWE#
SMX_RCOMP0
SMY_RCOMP SM_VREF
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ#
G_GNT#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
RBF#
WBF#
AGP_VREF
AGP_RCOMP
VCC_AGP
AD10
4
VCC_DDR
ST0
ST1
ST2
4
AL25
AN25
AP23
AK20
AL19
AL17
AP19
AP17
AN17
AK16
AK26
AL15
AN15
AP25
AN23
AN19
AK18
AR2
AT7
AT12
AT17
AR24
AT29
AT34
AL36
AP4
AR8
AP12
AR18
AT24
AP28
AR34
AL34
AP13
AN13
AK14
AL13
AL29
AP31
AK30
AN31
AL21
AK22
AN11
AP11
AM34
AL33
AP21
AN21
AP9
AN9
AP33
AN34
AN27
AP27
AK28
AN29
AP29
SMX
AF10
SMY
AJ34 AM2
GFRAME#
M4
GIRDY#
N7
GTRDY#
N5
GDEVSEL#
N2
GSTOP#
P2
GPAR
P4
GREQ#
D5
GGNT#
B5
C3
C2
D3
D2
E4
E2
F3
F2
SB_STB
F4
SB_STB#
E5
ST0
C4
ST1
B4
ST2
B3
GAD_STB0
V8
GAD_STB#0
U7
GAD_STB1
M8
GAD_STB#1
L7
H8
G7
G5
AGPREF
W2
R121 40.2_1%
L2
Brookdale_GMCH
DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12
MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7
MSDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7
MSCKE0
MSCKE1
MSCKE2
MSCKE3
GFRAME# <17>
GIRDY# <17>
GTRDY# <17>
GDEVSEL# <17>
GSTOP# <17>
GPAR <17>
GREQ# <17>
GGNT# <17>
SB_STB <17>
SB_STB# <17>
ST0 <17>
ST1 <17>
ST2 <17>
GAD_STB0 <17>
GAD_STB#0 <17>
GAD_STB1 <17>
GAD_STB#1 <17>
PIPE#
PIPE# <17>
RBF#
RBF# <17>
WBF#
WBF# <17>
DDRMAB1 <14,15>
DDRMAB2 <14,15>
DDRMAB4 <14,15>
DDRMAB5 <14,15>
MSCKE0 <14,15>
MSCKE1 <14,15>
MSCKE2 <14,15>
MSCKE3 <14,15>
MSCS0# <14,15>
MSCS1# <14,15>
MSCS2# <14,15>
MSCS3# <14,15>
DCLK0 <14>
DCLK0# <14>
DCLK1 <14>
DCLK1# <14>
DCLK2 <14>
DCLK2# <14>
DCLK3 <14>
DCLK3# <14>
DCLK4 <14>
DCLK4# <14>
DCLK5 <14>
DCLK5# <14>
MSBS0 <14,15>
MSBS1 <14,15>
MRAS# <14,15>
MCAS# <14,15>
MWE# <14,15>
3
DDRMAA[12..0] <14,15>
Trace width 12 mil
with 10 mil space.
Place 0.1uF <1" to GM CH
R119
60.4
C57
R33
0.1u
60.4
VDDQ
R1246
1K_1%
R1247
1K_1%
3
VCC_DDR
R120
60.4
C56
0.1u
R34
60.4
AGPREF: 10uA
AGPREF
CB329
0.1u
NEAR AGP SLOT
2
1
DDR SERIAL RESISTORS
RN3 10
DDRMD[63..0] <14,15>
Title
Size Document Number Rev
2
Date: Sheet of
DDRMD1
DDRMD5
DDRMD4
DDRMD0
DDRMD3
DDRMD7
DDRMD6
DDRMD2
DDRMD13
DDRMD12
DDRMD9
DDRMD8
DDRMD11
DDRMD10
DDRMD15
DDRMD14
DDRMD21
DDRMD17
DDRMD16
DDRMD20
DDRMD23
DDRMD19
DDRMD22
DDRMD18
DDRMD25
DDRMD29
DDRMD28
DDRMD24
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD37
DDRMD33
DDRMD36
DDRMD32
DDRMD35
DDRMD39
DDRMD38
DDRMD34
DDRMD41
DDRMD45
DDRMD44
DDRMD40
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD51
DDRMD50
DDRMD55
DDRMD54
DDRMD57
DDRMD61
DDRMD56
DDRMD60
DDRMD59
DDRMD63
DDRMD58
DDRMD62
MSDM0 SDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7
MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7
MSI
星期五, 十月
11, 2002
7 8
5 6
3 4
1 2
RN5 10
7 8
5 6
3 4
1 2
RN7 10
7 8
5 6
3 4
1 2
RN9 10
7 8
5 6
3 4
1 2
RN10 10
7 8
5 6
3 4
1 2
RN12 10
7 8
5 6
3 4
1 2
RN13 10
7 8
5 6
3 4
1 2
RN14 10
7 8
5 6
3 4
1 2
RN15 10
7 8
5 6
3 4
1 2
RN16 10
7 8
5 6
3 4
1 2
RN18 10
7 8
5 6
3 4
1 2
RN20 10
7 8
5 6
3 4
1 2
RN21 10
7 8
5 6
3 4
1 2
RN22 10
7 8
5 6
3 4
1 2
RN23 10
7 8
5 6
3 4
1 2
RN24 10
7 8
5 6
3 4
1 2
R609 10
R610 10
R611 10
R612 10
R613 10
R614 10
R615 10
R616 10
R110 10
R111 10
R112 10
R113 10
R114 10
R115 10
R116 10
R117 10
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SDQS[7..0] <14,15>
MICRO-STAR INT'L CO.,LTD.
Brookdale-G GMCH-2 (DDR & AGP)
MS-9134
1
MDQ1
MDQ5
MDQ4
MDQ0
MDQ3
MDQ7
MDQ6
MDQ2
MDQ13
MDQ12
MDQ9
MDQ8
MDQ11
MDQ10
MDQ15
MDQ14
MDQ21
MDQ17
MDQ16
MDQ20
MDQ23
MDQ19
MDQ22
MDQ18
MDQ25
MDQ29
MDQ28
MDQ24
MDQ31
MDQ27
MDQ30
MDQ26
MDQ37
MDQ33
MDQ36
MDQ32
MDQ35
MDQ39
MDQ38
MDQ34
MDQ41
MDQ45
MDQ44
MDQ40
MDQ47
MDQ43
MDQ46
MDQ42
MDQ53
MDQ52
MDQ49
MDQ48
MDQ51
MDQ50
MDQ55
MDQ54
MDQ57
MDQ61
MDQ56
MDQ60
MDQ59
MDQ63
MDQ58
MDQ62
SDM0 <14,15>
SDM1 <14,15>
SDM2 <14,15>
SDM3 <14,15>
SDM4 <14,15>
SDM5 <14,15>
SDM6 <14,15>
SDM7 <14,15>
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
93 5
0A
Page 10
U18
V18
Y18
AA18
AL31
AR31
AU31
F32
H32
K32
M32
P32
T32
V32
Y32
AB32
AD32
AF32
AH32
AM4
AG5
AN5
AR5
AR19
AM32
A33
C33
AJ33
AN33
AR33
AB6
AF6
AM6
U20
V20
Y20
AA20
AM20
A21
B21
C21
D21
E21
G21
D34
W34
A35
E35
G35
L35
AN7
AR7
AU7
V21
Y21
AR21
F22
H22
XX3
XX4
XX5
XX6
GMCH DECOUPLING CAPACITOR
C17
D17
E17
G17
J17
V17
AH30
C31
AC3
AG3
AM3
AN3
AR3
AU3
AB4
AG4
Y17
AJ17
AR17
AR9
AM10
AR23
AU23
F24
AM24
VSS
VSS
A25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Brookdale_GMCH
N35
R35
U35
AA35
AC35
AE35
AG35
AL35
AN35
AR35
AU35
B36
W36
AF8
AM8
G9
J9
N9
U9
AA9
AE9
A23
C23
D23
J23
AH36
AT36
C37
E37
J37
U37
AA37
AE37
AG37
AJ37
C25
AN37
AR37
AR11
AU11
J25
AJ25
AR25
F26
AK12
AM12
B13
C13
D13
E13
A27
C27
J27
AJ13
AR13
F14
AL27
AR27
AU27
F28
AM28
E1
J1
N1
U1
AA1
AE1 AJ21
AN1
AR1
B2
D15
AR15
AU15
N37
C16
1000U/6.3V_SANYO
VSS
VSS
VSS
AM16
B17
VDDQ
C58
Pin A5
0.01u
CB75
Pin E1
0.1u
CB74
Pin J1
0.1u
CB77
Pin N1
0.1u
CB80
Pin U1
0.1u
Place decoupling cap
close to GMCH AGP
Interface < 0.1"
Place decoupling cap
close to GMCH
Hub-Link Interface<
0.1"
VDDQ
CB73
0.1u
C142
0.01u
Place decoupling cap
close to GMCH Core
Logic Interface <
0.1"
VDDQ
+
CT11
1000U/6.3V_SANYO
Place Bulk cap for Core Logic,
AGP & Hub Link Interface
VCC_DDR
+
+
CT16
Place Bulk cap between
GMCH & DIMM slot
+
CT14
CT15
470u/16V
1000U/6.3V_SANYO
Place decoupling cap
close to GMCH CPU
Interface < 250mil
in the Vtt corridor
VDDQ VDDQ
CB76
0.1u
CB79
0.1u
Pin AA1
Pin AE1
Place decoupling cap
close to GMCH DAC
Interface< 0.1"
VCC_DDR
CB81
0.1u
CB82
VCCP
CB84
0.1u
CB86
0.1u
CB89
0.1u
CB91
0.1u
CB93
0.1u
0.1u
CB83
0.1u
CB85
0.1u
CB87
0.1u
CB90
0.1u
CB92
0.1u
CB94
0.1u
Place decoupling cap
close to GMCH Memory
Interface < 0.1", with
18 mil trach width
VCCP
CB276
10u-1206
CB277
10u-1206
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Broodale GMCH(VSS)
星期五, 十月
11, 2002
C137
0.01u
CB88
0.1u
Pin AL37
Pin AU5
Pin AU9
Pin AU13
Pin AU17
Pin AU25
Pin AU29
Pin AU33
MS-9134
Pin B14
Pin A15
0A
10 35
U4D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A5
VSS
C5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F6
VSS
H6
VSS
M6
VSS
T6
VSS
Y6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J21
VSS
VSS
VSS
VSS
VSS
VSS
J35
VSS
VSS
VSS
VSS
VSS
B8
VSS
C8
VSS
D8
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
HVSS
HVSS
HVSS
HVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A29
C29
J29
L29
N29
U29
R29
W29
AA29
AC29
AE29
AG29
AJ29
AR29
F30
AT2E3G3J3L3N3R3U3W3
Page 11
ICH4 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
VDDQ
VCC3 VCC1_5SB
VCC3_SB
SMI#
R122 33
100p C78
HSMI# <6>
ICH4 STRAPPING RESISTORS
EE_DOUT
R133 10K
7,24,25,27,29,31
VCC3_SB
AD[31..0]
C_BE#[3..0] 24,25,27,29,31
DEVSEL# <17,24,25,27,29,31>
FRAME# <17,24,25,27,29,31>
IRDY# <17,24,25,27,29,31>
TRDY# <17,24,25,27,29,31>
STOP# <17,24,25,27,29,31>
PAR <17,24,25,27,29,31>
PLOCK# <17>
SERR# <17,24,29,31>
PERR# <17,24,29,31>
PME# <17,24,29,31>
ICH_PCLK <5>
PCIRST# <21>
R1248 X_10K
R1249 10K
R948 33
LAN_RST#
LAN_RST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PREQ#A
EE_DOUT
D10
D11
C12
H5
J3
H3
K1
G5
J4
H4
J5
K2
G2
L1
G4
L2
H2
L3
F5
F4
N1
E5
N2
E3
N3
E4
M5
E2
P1
E1
P2
D3
R1
D2
P4
J2
K4
M4
N4
M3
F1
L5
F2
F3
G1
M2
K5
L4
W2
B5
E8
P5
U5
Y5
A8
K12
K10
AD0
AD1
AD2
VCC1_5
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
GPIO0/REQA#
GPIO16/GNTA#
PCICLK
PCIRST#
LAN_RST#
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
GND1
GND2
GND3
A1
A16
A18
A20
K18
VCC1_5
VCC1_5
GND4
GND5
A22A4AA12
K22
VCC1_5
GND6
P10
VCC1_5
GND7
T18
VCC1_5
GND8
AA16
U19
VCC1_5
GND9
AA22
V14A5AC17
VCC1_5
GND10
GND11
AA3
AA9
VCC3_3
GND12
AB20
AB7
AC8B2H18H6J1
VCC3_3
VCC3_3
VCC3_3
GND13
GND14
GND15
AC1
AC10
AC14
VCC3_3
VCC3_3
GND16
GND17
AC18
J18K6M10
VCC3_3
GND18
AC23
AC5
VCC3_3
VCC3_3
GND19
GND20
B12
P12P6U1
VCC3_3
GND21
B16
B18
VCC3_3
VCC3_3
GND22
GND23
B20
V10
V16
VCC3_3
VCC3_3
GND24
GND25
B22B9C15
V18
VCC3_3
VCC3_3
GND26
GND27
C17
E12
GND28
C19
C21
E13
VCCSUS1_5
VCCSUS1_5
GND29
GND30
C23C6D1
E20
VCCSUS1_5
GND31
F14
G18R6T6
VCCSUS1_5
GND32
D12
VCCSUS1_5
VCCSUS1_5
GND33
GND34
D15
VCCSUS1_5
GND35
D17
U6
VCCSUS1_5
GND36
D19
E11
GND37
D21
D23D4D8
F10
VCCSUS3_3
GND38
F15
F16
F17
F18
K14V7V8
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND41
GND42
GND43
GND39
GND40
E14
D22
E10
E16
V9
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
THRMTRIP#
HI_SWING
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GND44
GND45
GND46
GND47
E17
E18
E19
A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
HI10
HI11
HI_STB
HL_STB#
HLCOMP
HIREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
LAN_CLK
INT-82801DB
U5A
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
NC
AB23
U21
AA21
W21
V22
AB22
V21
W23
V23
U22
Y22
U23
W20
L19
L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21
P21
N20
R23
R22
M23
D5
C2
B4
A3
AC13
AA19
J19
H19
K20
J22
B1
A2
B3
C7
B6
A6
C1
E6
A7
B7
D6
C5
C11
B11
A10
A9
A11
B10
C10
A12
R187 0
SMI#
KB_RST#
A20GATE#
TRMTRIP#
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
R521 62
R130 68.1_1%
HI_ISWING
HUB_IREF
APICCLK
APIC_D0
APIC_D1
SERIRQ
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
A20M#
FERR#
A20M# <6>
SLP# <6>
FERR# <6>
IGNNE# <6>
FINIT# <18>
HINIT# <6>
INTR <6>
ICH_NMI <33>
STPCLK# <6>
KB_RST# <13>
A20GATE# <13>
TRMTRIP# <6>
HL[10..0] <8>
This resistor less than 0.5"
from ICH use 15 mils trace
HL_STB <8>
HL_STB# <8>
VDDQ
INTA# <17>
INTB# <17>
INTC# <17,29>
INTD# <17,31>
IRQ14 <5>
IRQ15 <5>
SERIRQ <13>
PREQ#0 <17>
PREQ#1 <17,29>
PREQ#2 <17,31>
PREQ#3 <17,25>
PREQ#4 <17,27>
PREQ#5 <17,24>
PGNT#0 <17>
PGNT#1 <29>
PGNT#2 <31>
PGNT#3 <25>
PGNT#4 <27>
PGNT#5 <24>
Reserved pull-down resistor for ICH4
reserved function straps.
ICH4 PULL-UP/DOWN RESIS TO RS
FERR#
TRMTRIP#
SERIRQ
KB_RST#
A20GATE#
PREQ#A
PREQ#5
APIC_D0
APIC_D1
APICCLK
R123 62
R124 62
R125 8.2K
R126 8.2K
R127 8.2K
R131 8.2K
R745 8.2K
R128 10K
R129 10K
VCCP
VCC3
ICH4 REFERENCE VOLTAGE
VDDQ
R135
HI_ISWING
C79
C80
0.01u
0.1u
HUB_IREF
C81
C82
0.01u
0.1u
Place Cap. as Close as possible to ICH4 < 0.25"
Trace width use 12 mils and 10mils space
226_1%
R136
100_1%
R137
100_1%
Pin A1 Pin H1
VCC3
Pin A4
CB102
CB103
0.1u
0.1u
ICH4 DECOUPLING CAPACITORS
Pin AC10
CB104
0.1u
Pin T1
CB105
0.1u
Pin AC18
CB106
0.1u
CB107
0.1u
Place one 0.1u close to ICH4 <100 mil
Pin K23 Pin C23 Pin A16 Pin AC1 Pin T23 Pin N23 Pin C22 Pin C22
C140
CB96
0.1u
CB95
0.1u
CB99
0.1u
0.01u
FOR Core Logic FOR Hub Interface FOR PLL
VDDQ VDDQ VDDQ
CB97
C83
0.1u
0.1u
VCC1_5SB
CB100
0.1u
CB101
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
ICH4 PCI & HI & LAN
星期五, 十月
11, 2002
MS-9134
11 35
0A
Page 12
R138 1K
VCC5
D4
VCC3
AC_RST#
AC_SYNC
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
SM5817S
V1
THRM#
Y4
SLP_S3#
Y2
SLP_S4#
AA2
SLP_S5#
AB6
PWROK
Y23
CPUPWRGD
V19
VRMPWRGD
AA1
PWRBTN#
Y1
RI#
AA6
RSMRST#
AB3
SUSSTAT#
AA4
SUSCLK
Y3
SYS_RESET#
AB2
BATLOW#/TP0
R2
AGPBUSY#/GPIO6
AA5
GPIO11/SMBALERT#
AC3
SMLINK0
AB1
SMLINK1
W6
INTRUDER#
W7
RTCRST#
Y6
VBIAS
AB4
SMBDATA
AC4
SMBCLK
AC7
RTCX1
AC6
RTCX2
V20
NC
T21
CLK66
J23
CLK14
F19
CLK48
C13
AC_RST#
C9
AC_SYNC
B8
AC_BITCLK
D9
AC_SDOUT
D13
AC_SDIN0
A13
AC_SDIN1
B13
AC_SDIN2
H23
SPKR
V5
GPIO12
W3
GPIO13
T3
C3_STAT#/GPIO21
Y20
CPUPERF#/GPIO22
J21
SSMUXSEL/GPIO23
W1
GPIO27
W4
GPIO28
T2
LAD0/FWH0
R4
LAD1/FWH1
T4
LAD2/FWH2
U2
LAD3/FWH3
T5
LFRAME#/FWH4
U3
LDRQ0#
U4
LDRQ1#
C20
USBP0+
D20
USBP0-
A21
USBP1+
B21
USBP1-
C18
USBP2+
D18
USBP2-
A19
USBP3+
B19
USBP3-
C16
USBP4+
D16
USBP4-
A17
USBP5+
B17
USBP5-
A23
USBRBIAS
B23
USBRBIAS#
B15
OC0#
C14
OC1#
A15
OC2#
B14
OC3#
A14
OC4#
D14
OC5#
Place Cap close
to Pin E7
RTCRST#
VBIAS
SPKR <23>
R176 22.6 1%
OC#1 <18>
C177
0.1u
THRM#
PWR_GD
RING#
RSMRST#
SYS_RST#
BATLOW#
CDC_DN#
SMBALERT#
INTRUDER#
RTCX1
RTCX2
EXTSMI#
GPI13
FWH_WP#
GPIO27
LAN_DISABLE
THRM# <13>
SLP_S3# <13,21>
SLP_S4# <21>
SLP_S5# <21>
PWR_GD <8,21>
CPU_GD <6>
VRM_GD <22>
PWRBTN# <13>
RSMRST# <21,23>
SUSCLK <13>
SMBALERT# <33>
SMLINK0 <33>
SMLINK1 <33>
SMBDATA <23,33>
SMBCLK <23,33>
ICH_66 <5>
ICH_14 <5>
ICH_48 <5>
AC_BITCLK <23>
AC_SDOUT <23>
AC_SDIN0 <23>
AC_SDIN1 <23>
AC_SDIN2 <23>
C479
100P
C480
100P
EXTSMI# <23,33>
FWH_WP# <18>
LAD0/FWH0 <13,18>
LAD1/FWH1 <13,18>
LAD2/FWH2 <13,18>
LAD3/FWH3 <13,18>
LFRAME#/FWH4 <13,18>
LDRQ# <13>
USBP0+ <18>
USBP0- <18>
USBP1+ <18>
USBP1- <18>
Place < 0.5"
OC#
Note: R176 may be change
16.9 1% for A0 version
ICH4 DECOUPLING CAPACITOR
VCC3_SB
CB112
CB109
0.1u
0.1u
Pin A22 Pin AC5 Pin AA23
Pin A16 Pin E7
VCCP
V5REF
CB113
0.1u
VCC5_SB
E15E7V6
V5REF1
V5REF2
V5REF_SUS
GND48
GND49
GND50
GND51
GND52
GND53
E21
E22F8G19
G21G3G6H1J6
Place one 0.1u close
to ICH4 <100 mil
VDDQ
GND54
GND55
RTC_VCC
C22
VCCPLL
GND56
GND57
K11
V5REF
CB108
0.1u
GND58
K13
AB5
VCCRTC
GND59
K19
K23K3L10
473p CB110
VDDQ
L23
VCC_HI
GND60
GND61
M14
P18
T22F6F7E9F9
VCC_HI
VCC_HI
VCC_HI
GND62
GND63
GND64
L11
L12
GND65
L13
L14
VCC3_SB
VCCLAN1_5/VCCSUS1_5
VCCLAN1_5/VCCSUS1_5
GND66
GND67
L21M1M11
VCCLAN3_3/VCCSUS3_3
GND68
GND69
M12
VCCLAN3_3/VCCSUS3_3
GND70
GND71
M13
VCCP VCC1_5SB
AA23
P14
VCPU_IO1
GND72
M20
M22
U18
VCPU_IO2
VCPU_IO0
GND73
GND74
N10
Y7
GND75
N11
N12
Y19
GND101
GND102
GND76
GND77
N13
N14
GND99
GND100
GND78
GND79
N19
N21
GND97
GND98
GND80
GND81
N23N5P11
V17V3W22W5W8
T19
T23
U20
V15
GND93
GND94
GND95
GND96
STP_PCI#/GPIO18
SLP_S1#/GPIO19
STP_CPU#/GPIO20
CLKRUN#/GPIO24
GND82
GND83
GND84
GND85
P13
P20
P22P3R18
R21R5T1
PDCS1#
SDCS1#
PDCS3#
GND89
GND90
GND91
GND92
SDCS3#
PDDREQ
SDDREQ
PDDACK#
SDDACK#
PDIOR#
SDIOR#
PDIOW#
SDIOW#
PIORDY
SIORDY
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
GPIO25
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
GND86
GND87
GND88
INT-82801DB
PDA0
PDA1
PDA2
SDA0
SDA1
SDA2
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
GPIO7
GPIO8
U5B
Y13
AB21
AB14
AC22
AA13
AB13
W13
AA20
AC20
AC21
AA11
AB18
Y12
AB19
AC12
Y18
W12
AA18
AB12
AC19
AB11
AC11
Y10
AA10
AA7
AB8
Y8
AA8
AB9
Y9
AC9
W9
AB10
W10
W11
Y11
W17
AB17
W16
AC16
W15
AB15
W14
AA14
Y14
AC15
AA15
Y15
AB16
Y16
AA17
Y17
C8
D7
C3
C4
R3
V4
Y21
W18
W19
AC2
V2
J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
GPI7
SIO_PME#
GPIO24
GPIO25
GPIO32
GPIO33
GPIO34
PIDE_IN1
PIDE_IN2
PIDE_IN3
PIDE_IN4
PD_CS#1 <5>
SD_CS#1 <5>
PD_CS#3 <5>
SD_CS#3 <5>
PD_A0 <5>
PD_A1 <5>
PD_A2 <5>
SD_A0 <5>
SD_A1 <5>
SD_A2 <5>
PD_DREQ <5>
SD_DREQ <5>
PD_DACK# <5>
SD_DACK# <5>
PD_IOR# <5>
SD_IOR# <5>
PD_IOW# <5>
SD_IOW# <5>
PD_IORDY <5>
SD_IORDY <5>
PDD[0..15] <5>
SDD[0..15] <5>
INTE# <17,25>
INTF# <17,27>
INTG# <17,24>
INTH# <17>
SIO_PME# <13>
GPIO32 <23>
GPIO33 <23>
GPIO34 <23>
PIDE_IN1 <23>
PIDE_IN2 <23>
PIDE_IN3 <23>
PIDE_IN4 <23>
VCC5_SB
VBAT
INTRUDER#
THRM#
FWH_WP#
GPI7
CDC_DN#
VRM_GD
PWR_GD
RSMRST#
VCCP
*Put a GND Plane under X'TAL
R140
1K
R141
3K
2
*Please put this block close ICH4
D5
1N4148
1
D33
BAT54A-S-SOT23
3
R146
1K
BAT1
ICH4 STRAPPING RESISTORS
AC_SDOUT
HIGH
LOW
ICH4 PULL-UP/DOWN RESIS TO RS
R525 330K
R151 4.7K
R153 4.7K
R155 8.2K
R604 8.2K
R874 10K
R873 10K
R1329 10K
R180 20K
R179 X_20K
PROCHOT BLOCK
THRM#
R183 X_4.7K
PROCHOT# <6>
X_3904
Title
Size Document Number Rev
Date: Sheet of
473p C84
VBAT
R867
X_20M
R868
X_5.6M
SPKR
FSB Safe mode
FSB Auto mode
RTC_VCC
VCC3
Q3
MSI
星期五, 十月
RTC BLOCK
JBAT1 Clear CMOS
1 - 2
Normal
VCC3
Clear CMOS
JBAT1
1
2
3
YJ103
VBIAS
RTCX2
RTCX1
C86
15p
*
*
VCC3_SB
RTC_VCC
R523
390K
*
C374
473p
R147
10M
C85
32K-12.5pf-CSA-309-D
15p
R169 X_1K
SPKR
HIGH
LOW
SMBDATA
SMBCLK PD_IORDY
BATLOW# SD_IORDY
SIO_PME#
SMBALERT#
RING#
LAN_DISABLE
EXTSMI#
GPI13
GPIO24
GPIO25
GPIO27
OC#
RTCRST#
R148 10M
+-30PPM
No Reboot mode
Reboot mode
R152 2.7K
R154 2.7K
R156 4.7K
R160 4.7K
R814 4.7K
R166 8.2K
R168 8.2K
R177 10K
R178 10K
R949 10K
R950 10K
R951 10K
2 - 3
X2
R1318 10K
SYSTEM RESET
R528
VCC3_SB
8.2K
FP_RST# <21,23,33>
R145
SYS_RST#
0
MICRO-STAR INT'L CO.,LTD.
ICH4 ASIC/RTC/AC'97/GPIO/LPC/USB/IDE
11, 2002
MS-9134
12 35
0A
Page 13
VCC5_SB
PCIRST#1 <8,17,18,21,24>
SIO_PCLK <5>
SERIRQ <11>
LDRQ# <12>
LFRAME#/FWH4 <12,18>
LAD0/FWH0 <12,18>
LAD1/FWH1 <12,18>
LAD2/FWH2 <12,18>
LAD3/FWH3 <12,18>
CPU_TMPA <6>
VID[4..0] <6,22>
CPU_CTRL <20>
CPU_FAN1 <20>
SYS_CTRL <20>
SYS_FAN1 <20>
PWR_FAN1 <20>
CHASSIS <17>
SIO_PME# <12>
SMBDATA_HM <33>
SMBCLK_HM <33>
PWRBTN# <12>
PWRBTIN <23>
PS_ON# <21,23>
SLP_S3# <12,21>
SIO_24 <5>
CB116
0.1u
VAGND <6>
THRM# <12>
VBAT
VCC3
VCC5
CB114
VCC3
VDDQ
VCCP
VID[4..0]
0.1u
VREF
VTIN3
CPU_TMPA
VTIN1
VAGND
-5VIN
-12VIN
+12VIN
VAVCC
VID4
VID3
VID2
VID1
VID0
BEEP
CHASSIS
CB115
0.1u
JOY2
JOY1
JOY4
JOY5
JOY0
JOY3
JOY6
JOY7
TXD
RXD
LPC SUPER I/O W83627HF
U8
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/P15/GP14
123
GPY1/GP15
128
GPSA1/P12/GP10
121
GPSA2/GP17
126
GPX1/P14/GP12
124
GPY2/P16/GP14
127
GPSB1/P13/GP11
122
GPSB2/GP16
120
MSO/IRQIN0
119
MSI/GP20
101
VREF
102
VTIN3
103
VTIN2
104
VTIN1
93
AGND
94
-5VIN
95
-12VIN
96
+12VIN
97
AVCC
98
+3.3VIN
99
VCOREB
100
VCOREA
106
VID4
107
VID3
108
VID2
109
VID1
110
VID0
116
FANPWM1
113
FANIO1
115
FANPWM2
112
FANIO2
111
FANIO3
105
OVT#
118
BEEP
76
CASEOPEN#
19
PME#
89
WDTO/GP24
91
SDA/GP22
92
SCL/GP21
67
PSOUT#
68
PSIN
64
SUSLED/GP35
90
PLED/GP23
72
PWRCTL#/GP31
73
SUSCIN/GP30
18
CLKIN
61
VSB
74
28
12
48
77
114
VBAT
VCC3
VCC_1
VCC_2
VCC_3
VCC_4
W83627HF
RSMRST#/GP33
PWROK/GP32
DRVDEN0
DRVDEN1
INDEX#
MOA#
DSB#
DSA#
MOB#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP25
CIRRX/GP34
IRTX/GP26
SUSCLKIN
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#
VSS1
VSS2
VSS3
VSS4
THERMAL RESISTOR BLOCK
R1323
56K
RT1
VTIN1
VTIN3
VAGND
CPU_TMPA
+12VIN
-12VIN
VCC5
-5VIN
R1324
56K
VREF
VAGND
BEEP
VCC5
CP25 X_COPPER
SPEAKER BLOCK Chasiss Intrusion Header
R757
10K
R758
4.7K
C E
B
Q58
2N3904S
VAVCC
C609
104P
VAGND VREF
ALARM <23>
+12V
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
1 2
42
RN25
3 4
41
33
5 6
40
7 8
39
1 2
38
RN26
3 4
37
33
5 6
36
7 8
35
31
7 8
RN87
32
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85
59
60
63
62
66
65
58
70
71
20
55
86
117
5 6
33
3 4
1 2
7 8
RN88
5 6
33
3 4
1 2
R875 33
PE
LP_D0
LP_D1
LP_D2
LP_D3
LP_D4
LP_D5
LP_D6
LP_D7
DRVDEN0 <19>
DRVDEN1 <19>
INDEX# <19>
MOT_A# <19>
DRV_B# <19>
DRV_A# <19>
MOT_B# <19>
DIR# <19>
STEP# <19>
WT_DT# <19>
WT_EN# <19>
TRACK0# <19>
FDD_WP# <19>
RDATA# <19>
HEAD# <19>
DSKCHG# <19>
LP_SLCT <19>
LP_PE <19>
LP_BUSY <19>
LP_ACK# <19>
LP_SLIN# <19>
LP_INIT# <19>
LP_ERR# <19>
LP_AFD# <19>
LP_STB# <19>
SUSCLK <12>
DCDA# <19>
DSRA# <19>
SINA <19>
RTSA# <19>
SOUTA <19>
CTSA# <19>
DTRA# <19>
RIA# <19>
DCDB# <19>
DSRB# <19>
SINB <19>
RTSB# <19>
SOUTB <19>
CTSB# <19>
DTRB# <19>
RIB# <19>
A20GATE# <11>
KB_RST# <11>
KBDATA <19>
KBCLK <19>
MSDATA <19>
MSCLK <19>
LP_D[0..7] <19>
-12V
-5V
Hardware Monitor optional
R1320 28KST
R1321 232KST
R1322 120KST
VAGND
VBAT
R739
JCASE
D1x2
2M
1
2
CHASSIS
R1326
10K
R1327
10K
R1328
30KST
R1325
10K
CP24
X_COPPER
10K/0805
RT2
10K_0805
WITHIN THE CPU SOCKET
VCC5
GAME/MIDI PULL
UP/DOWN
RN47 8P4R-4.7K
RN144 8P4R-1M
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
JOY4
JOY6
JOY7
JOY5
JOY0
JOY2
JOY3
JOY1
RXD
TXD
VCC5
R1263
20K
R171
4.7K
LPC I/O DECOUPLING CAPACITORS
VCC5
CB117
0.1u
CB120
0.1u
CB124
0.1u
SUPER I/O STRAPPING RESISTOR
R865 4.7K
VCC5
R866 X_4.7K
VCC5
R175 X_4.7K
VCC5
SOUTA
L: Disable KBC
L: 24MHZ
SOUTB
L: CFAD=2E
RTSA#
L: PNP Default
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
LPC IO & GAME PORT
11, 2002
MS-9134
SOUTA
SOUTB
R1264 4.7K
RTSA#
H: Enable KBC
H: 48MHZ
H: CFAD=4E
H: PNP no Default DTRA#
13 35
0A
Page 14
SYSTEM MEMORY
VCC_DDR
R249
R250
DDRMD4
DDRMD1
DDRMD2
DDRMD3
DDRMD0
DDRMD5
DDRMD6
DDRMD7
DDRMD8
DDRMD9
DDRMD10
DDRMD11
DDRMD12
DDRMD13
DDRMD14
DDRMD15
DDRMD16
DDRMD17
DDRMD18
DDRMD19
DDRMD20
DDRMD21
DDRMD22
DDRMD23
DDRMD24
DDRMD29
DDRMD30
DDRMD27
DDRMD28
DDRMD25
DDRMD26
DDRMD31
DDRMD32
DDRMD33
DDRMD34
DDRMD35
DDRMD36
DDRMD37
DDRMD38
DDRMD39
DDRMD40
DDRMD41
DDRMD42
DDRMD43
DDRMD44
DDRMD45
DDRMD46
DDRMD47
DDRMD48
DDRMD49
DDRMD50
DDRMD51
DDRMD52
DDRMD53
DDRMD54
DDRMD55
DDRMD56
DDRMD57
DDRMD58
DDRMD59
DDRMD60
DDRMD62
DDRMD63
MWE#
C130
104P
DDRMD[63..0] <9,15>
MWE# <9,15>
150 1%
DDR_VREF
150 1%
VCC_DDR
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VDDQ3
VSS9
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
SLAVE ADDRESS = 1010000B
102
NC4
VSS0
VSS1
VSS2
3111826344250586674818993
VCC3
104
112
128
136
143
156
164
172
1801582
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
DDR DIMM
SOCKET
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
100
116
124
132
139
VDDQ11
VDDQ12
VSS17
VSS18
145
152
VDDQ13
VDDQ14
VDDQ15
CK1#(CK0#)
NC(RESET#)
VSS19
VSS20
VSS21
160
176
VDDID
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
CS0#
CS1#
CS2#
CS3#
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
DDRMAA11
118
DDRMAA12
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
DDR1
N13-1840021
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
MSBS0
MSBS1
SMBCLK_VCC
SMBDATA_VCC
DCLK1
DCLK1#
DCLK0
DCLK0#
DCLK2
DCLK2#
MSCKE0
MSCKE1 DDRMD61
MCAS#
MRAS#
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
MSCS0# <9,15>
MSCS1# <9,15>
SDQS[7..0] <9,15>
DDRMAA[12..0] <9,15>
MSBS0 <9,15>
MSBS1 <9,15>
SMBCLK_VCC <5,21,33>
SMBDATA_VCC <5,21,33>
DCLK1 <9>
DCLK1# <9>
DCLK0 <9>
DCLK0# <9>
DCLK2 <9>
DCLK2# <9>
MSCKE0 <9,15>
MSCKE1 <9,15>
MCAS# <9,15>
MRAS# <9,15>
SDM0 <9,15>
SDM1 <9,15>
SDM2 <9,15>
SDM3 <9,15>
SDM4 <9,15>
SDM5 <9,15>
SDM6 <9,15>
SDM7 <9,15>
DDRMD4
DDRMD1
DDRMD2
DDRMD3
DDRMD0
DDRMD5
DDRMD6
DDRMD7
DDRMD8
DDRMD9
DDRMD10
DDRMD11
DDRMD12
DDRMD13
DDRMD14
DDRMD15
DDRMD16
DDRMD17
DDRMD18
DDRMD19
DDRMD20
DDRMD21
DDRMD22
DDRMD23
DDRMD24
DDRMD29
DDRMD30
DDRMD27
DDRMD28
DDRMD25
DDRMD26
DDRMD31
DDRMD32
DDRMD33
DDRMD34
DDRMD35
DDRMD36
DDRMD37
DDRMD38
DDRMD39
DDRMD40
DDRMD41
DDRMD42
DDRMD43
DDRMD44
DDRMD45
DDRMD46
DDRMD47
DDRMD48
DDRMD49
DDRMD50
DDRMD51
DDRMD52
DDRMD53
DDRMD54
DDRMD55
DDRMD56
DDRMD57
DDRMD58
DDRMD59
DDRMD60
DDRMD61
DDRMD62
DDRMD63
MWE#
DDR_VREF
C128
104P
Place 104p Cap. near the DIMM
164
172
VDDQ12
VSS18
145
152
1801582
VDDQ13
VDDQ14
VDDQ15
CK1#(CK0#)
NC(RESET#)
VSS19
VSS20
VSS21
160
176
VCC3
VDDID
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
DDRMAB2
41
130
DDRMAB4
37
DDRMAB5
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
DDR2
N13-1840021
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
DDRMAA0
DDRMAB1
DDRMAA3
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12
MSBS0
MSBS1
SMBCLK_VCC
SMBDATA_VCC
VCC3
DCLK4
DCLK4#
DCLK3
DCLK3#
DCLK5
DCLK5#
MSCKE2
MSCKE3
MCAS#
MRAS#
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
MSCS2# <9,15>
MSCS3# <9,15>
DDRMAB1 <9,15>
DDRMAB2 <9,15>
DDRMAB4 <9,15>
DDRMAB5 <9,15>
DCLK4 <9>
DCLK4# <9>
DCLK3 <9>
DCLK3# <9>
DCLK5 <9>
DCLK5# <9>
MSCKE2 <9,15>
MSCKE3 <9,15>
VCC_DDR
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
SLAVE ADDRESS = 1010010B
NC4
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
3111826344250586674818993
104
112
128
136
143
156
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
DDR DIMM
SOCKET
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
100
116
124
132
139
VDDQ11
VSS17
Keep the voltage divider within 1" of DIMM1.
Trace width 12 mil with 12 mil space.
Place 104p Cap. near the DIMM
VCC_DDR
Place high freq bypass cap between the DIMMS.
CB133
CB132
CB131
CB130
0.1u
0.1u
0.1u
0.1u
CB134
0.1u
CB135
0.1u
CB308
0.1u
CB309
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
DDR DIMM1&2
星期五, 十月
11, 2002
MS-9134
14 35
0A
Page 15
DDR Decouping Caps
DDR TERMINATO RS
SDM5 <9,14>
SDM3 <9,14>
SDQS4 <9,14>
SDQS5 <9,14>
DDRMAA12 <9,14>
DDRMAA6 <9,14>
DDRMAA3 <9,14>
MSBS0 <9,14>
DDRMD41 <9,14>
DDRMAB5 <9,14>
DDRMAB4 <9,14>
DDRMAA4 <9,14>
DDRMAA5 <9,14>
MSCKE0
<9,14>
MSCKE2 <9,14>
MSCKE1 <9,14>
<9,14>
MSCKE3
MSBS1 <9,14>
DDRMAA10 <9,14>
DDRMAA0 <9,14>
DDRMAA8 <9,14>
DDRMAA7 <9,14>
DDRMD22 <9,14>
DDRMD18 <9,14>
MSCS1# <9,14>
MSCS3# <9,14>
MCAS# <9,14>
MSCS2# <9,14>
DDRMAA1 <9,14>
DDRMAB1 <9,14>
DDRMAA2 <9,14>
DDRMAB2 <9,14>
MSCS0# <9,14>
MWE# <9,14>
MRAS# <9,14>
SDM5
SDM3
SDQS4
SDQS5
DDRMAA12
DDRMAA6
DDRMAA3
MSBS0
DDRMD41
DDRMAB5
DDRMAB4
DDRMAA4
DDRMAA5
MSCKE0
MSCKE2
MSCKE1
MSCKE3
MSBS1
DDRMAA10
DDRMAA0
DDRMAA8
DDRMAA7
DDRMD22
DDRMD18
MSCS1#
MSCS3#
MCAS#
MSCS2#
DDRMAA1
DDRMAB1
DDRMAA2
DDRMAB2
MSCS0#
MWE#
MRAS#
R251 56
R252 56
R253 56
R263 56
R617 56
R256 56
R618 56
R619 56
R259 56
R620 33
R621 33
R622 33
R623 33
RN32 56
1 2
3 4
5 6
7 8
RN35 56
1 2
3 4
5 6
7 8
RN37 56
1 2
3 4
5 6
7 8
RN40 56
1 2
3 4
5 6
7 8
RN70
1 2
3 4
5 6
7 8
33
R738 56
R869 56
R870 56
VTT_DDR
<9,14>
<9,14>
DDRMD1 <9,14>
DDRMD5 <9,14>
DDRMD4 <9,14>
DDRMD0 <9,14>
DDRMD6 <9,14>
DDRMD2 <9,14>
SDQS0 <9,14>
SDM0 <9,14>
DDRMD9 <9,14>
DDRMD8 <9,14>
DDRMD3 <9,14>
DDRMD7 <9,14>
DDRMD11
DDRMD10 <9,14>
DDRMD15 <9,14>
DDRMD14
SDM1 <9,14>
SDQS1 <9,14>
DDRMD13 <9,14>
DDRMD12 <9,14>
DDRMD21 <9,14>
DDRMD17 <9,14>
DDRMD16 <9,14>
DDRMD20 <9,14>
SDM2 <9,14>
DDRMAA9 <9,14>
DDRMAA11 <9,14>
SDQS2 <9,14>
DDRMD24 <9,14>
DDRMD23 <9,14>
DDRMD19 <9,14>
SDQS3 <9,14>
DDRMD25 <9,14>
DDRMD29 <9,14>
DDRMD28 <9,14>
DDRMD31 <9,14>
DDRMD27 <9,14>
DDRMD30 <9,14>
DDRMD26 <9,14>
DDRMD37 <9,14>
DDRMD33 <9,14>
DDRMD36 <9,14>
DDRMD32 <9,14>
DDRMD39 <9,14>
DDRMD38 <9,14>
DDRMD34 <9,14>
SDM4 <9,14>
DDRMD45 <9,14>
DDRMD44 <9,14>
DDRMD40 <9,14>
DDRMD35 <9,14>
DDRMD47 <9,14>
DDRMD43 <9,14>
DDRMD46 <9,14>
DDRMD42 <9,14>
DDRMD53 <9,14>
DDRMD52 <9,14>
DDRMD49 <9,14>
DDRMD48 <9,14>
DDRMD56 <9,14>
DDRMD60 <9,14>
DDRMD51 <9,14>
DDRMD50 <9,14>
DDRMD55 <9,14>
DDRMD54 <9,14>
SDQS6 <9,14>
SDM6 <9,14>
SDQS7 <9,14>
SDM7 <9,14>
DDRMD57 <9,14>
DDRMD61 <9,14>
DDRMD59 <9,14>
DDRMD63 <9,14>
DDRMD58 <9,14>
DDRMD62 <9,14>
DDRMD1
DDRMD5
DDRMD4
DDRMD0
DDRMD6
DDRMD2
SDQS0
SDM0
DDRMD9
DDRMD8
DDRMD3
DDRMD7
DDRMD11
DDRMD10
DDRMD15
DDRMD14
SDM1
SDQS1
DDRMD13
DDRMD12
DDRMD21
DDRMD17
DDRMD16
DDRMD20
SDM2
DDRMAA9
DDRMAA11
SDQS2
DDRMD24
DDRMD23
DDRMD19
SDQS3
DDRMD25
DDRMD29
DDRMD28
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD37
DDRMD33
DDRMD36
DDRMD32
DDRMD39
DDRMD38
DDRMD34
SDM4
DDRMD45
DDRMD44
DDRMD40
DDRMD35
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD56
DDRMD60
DDRMD51
DDRMD50
DDRMD55
DDRMD54
SDQS6
SDM6
SDQS7
SDM7
DDRMD57
DDRMD61
DDRMD59
DDRMD63
DDRMD58
DDRMD62
RN27 56
1 2
3 4
5 6
7 8
RN28 56
1 2
3 4
5 6
7 8
RN29 56
1 2
3 4
5 6
7 8
RN30 56
1 2
3 4
5 6
7 8
RN31 56
1 2
3 4
5 6
7 8
RN33 56
1 2
3 4
5 6
7 8
RN34 56
1 2
3 4
5 6
7 8
R735 56
R736 56
R737 56
RN38 56
1 2
3 4
5 6
7 8
RN39 56
1 2
3 4
5 6
7 8
RN41 56
1 2
3 4
5 6
7 8
RN42 56
1 2
3 4
5 6
7 8
RN43 56
1 2
3 4
5 6
7 8
RN44 56
1 2
3 4
5 6
7 8
RN45 56
1 2
3 4
5 6
7 8
RN46 56
1 2
3 4
5 6
7 8
RN72 56
1 2
3 4
5 6
7 8
RN73 56
1 2
3 4
5 6
7 8
RN74 56
1 2
3 4
5 6
7 8
VTT_DDR
VTT_DDR
VTT_DDR VTT_DDR
CB280
0.1u
CB283
0.1u
CB284
0.1u
CB286
0.1u
CB289
0.1u
CB291
0.1u
CB293
0.1u
CB294
0.1u
CB295
0.1u
CB141
0.1u
CB145
0.1u
CB147
0.1u
CB155
0.1u
CB161
0.1u
CB163
0.1u
CB165
0.1u
CB142
0.1u
CB144
0.1u
CB152
0.1u
CB154
0.1u
CB156
0.1u
CB158
0.1u
CB162
0.1u
CB166
0.1u
CB168
0.1u
CB172
0.1u
CB175
0.1u
CB281
0.1u
CB282
0.1u
CB285
0.1u
CB287
0.1u
CB288
0.1u
Total 110 signal, need 55 pcs decoupling.
Place for VTT_DDR island
VTT_DDR
CT27
+
1000U/6.3V_SANYO
Place at the end of
the VTT_DDR island
VTT_DDR
C131
10u-0805
C132
10u-0805
C133
10u-0805
Bottom Vtt
Center Vtt
Top Vtt
CB292
0.1u
CB296
0.1u
CB139
0.1u
CB143
0.1u
CB149
0.1u
CB151
0.1u
CB153
0.1u
CB157
0.1u
CB159
0.1u
CB167
0.1u
CB169
0.1u
CB140
0.1u
CB146
0.1u
CB148
0.1u
VTT_DDR
CB160
0.1u
CB164
0.1u
CB170
0.1u
CB173
0.1u
CB174
0.1u
CB176
0.1u
CB150
0.1u
CB290
0.1u
CB171
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
DDR Terminator R e si s t o r
星期五, 十月
11, 2002
MS-9134
15 35
0A
Page 16
Video Connector
VCC5 VCC5
BC4
BC3
0.1u
0.1u
CRT_R <8>
Differential CRT space is
5mil trace width is 8mil
differential pair to pair spcacing is
20mil
CRT_R# <8>
CRT_G <8>
CRT_G# <8>
CRT_B <8>
CRT_B# <8>
Place clamping component & Level
shift circuit near to connector
3V_VSYNC <8>
3V_HSYNC <8>
3VDDCDA <8>
3VDDCCL <8>
CRT_R
CRT_G
CRT_B
3V_VSYNC
3V_HSYNC
3VDDCDA
R922 22
R921 22
VCC3
3VDDCCL
5VDDCCL
5V_VSYNC
5V_HSYNC
5VDDCDA
VCC5
VCC3
R926
2.2K
Q82
2N7002
VCC3 VCC5
VCC3
R925
2.2K
Q83
2N7002
VDDQ VDDQ VDDQ
3
R928
8.2K
1
2
D1
BAV99
R923
22
R927
8.2K
3
5VDDCDA
R924
22
3
1
2
1
2
D50
BAV99
D2
BAV99
5VDDCCL
3
VGA_VCC VGA_VCC
1
3
2
1
2
D51
BAV99
D3
BAV99
VCC5
L38
1 2
80S/0805
3V_VSYNC
3V_HSYNC
135
246
7
CN9
100p
8
VCC3
1 6
VCC3
3 4
VGA_VCC
5 2
V
G
5 2
V
G
C608
104P
R934
U40A
X_NC7WZ07_SC70-6
U40B
X_NC7WZ07_SC70-6
X_1K
R935
X_1K
JVGA1
15
10
14
9
13
8
12
7
11
6
VGA-D15-BL-B-SC
VCC5
5V_VSYNC
VCC5
5V_HSYNC
L20 80ohm/100MHz
1 2
1 2
C276
R493
2.2P
37.4_1%
1 2
1 2
1 2
R495
C279
37.4_1%
2.2P
1 2
1 2
1 2
R497
C282
37.4_1%
2.2P
1 2
17
5
4
3
2
1
16
Title
Size Document Number Rev
Date: Sheet of
C274
R492
3.3p
75_1%
1 2
L21 80ohm/100MHz
R494
C277
75_1%
3.3p
1 2
L22 80ohm/100MHz
R496
C280
75_1%
3.3p
1 2
MSI
星期五, 十月
C275
3.3p
1 2
C278
3.3p
1 2
C281
3.3p
1 2
MICRO-STAR INT'L CO.,LTD.
VGA Connector
11, 2002
MS-9134
16 35
0A
Page 17
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
VCC3
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT#1
B10
RESERVED
B11
PRSNT#2
B12
GND
B13
GND
B14
RESERVED
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V(I/O)
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE#3
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE#2
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE#1
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V(I/O)
B60
ACK64#
B61
+5V
B62
+5V
PCI-D120-WH-SN
VCC5
INTB#
INTD#
PCICLK0 <5>
PREQ#0
AD31 <11,24,25,27,29,31>
AD29 <11,24,25,27,29,31>
AD27 <11,24,25,27,29,31>
AD25 <11,24,25,27,29,31>
C_BE#3 <11,24,25,27,29,31>
AD23 <11,24,25,27,29,31>
AD21 <11,24,25,27,29,31>
AD19 <11,24,25,27,29,31>
AD17 <11,24,25,27,29,31>
C_BE#2 <11,24,25,27,29,31>
IRDY# <11,24,25,27,29,31>
DEVSEL# <11,24,25,27,29,31>
PLOCK# <11>
PERR# <11,24,29,31>
SERR# <11,24,29,31>
C_BE#1 <11,24,25,27,29,31>
AD14 <11,24,25,27,29,31>
AD12 <11,24,25,27,29,31>
AD10 <11,24,25,27,29,31>
AD8 <11,24,25,27,29,31>
AD7 <11,24,25,27,29,31>
AD5 <11,24,25,27,29,31>
AD3 <11,24,25,27,29,31>
AD1 <11,24,25,27,29,31>
IDSEL = AD17
MASTER = PREQ0
INTA#
TRST#
+12V
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
C/BE#0
+3.3V
GND
+5V(I/O)
REQ64#
TMS
+3.3
PAR
AD9
AD6
AD4
AD2
AD0
VDDQ PULL
UP/DOWN
+12V -12V
VCC3
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
+5V
A62
+5V
INTA#
INTC#
VCC5
CHASSIS
VCC3_SB
PCIRST#1 <8,13,18,21,24>
PGNT#0 <11>
PME# <11,24,29,31>
AD30 <11,24,25,27,29,31>
AD28 <11,24,25,27,29,31>
AD26 <11,24,25,27,29,31>
AD24 <11,24,25,27,29,31>
AD22 <11,24,25,27,29,31>
AD20 <11,24,25,27,29,31>
AD18 <11,24,25,27,29,31>
AD16 <11,24,25,27,29,31>
FRAME# <11,24,25,27,29,31>
TRDY# <11,24,25,27,29,31>
STOP# <11,24,25,27,29,31>
SDONE <33>
SBO# <33>
PAR <11,24,25,27,29,31>
AD15 <11,24,25,27,29,31>
AD13 <11,24,25,27,29,31>
AD11 <11,24,25,27,29,31>
AD9 <11,24,25,27,29,31>
C_BE#0 <11,24,25,27,29,31>
AD6 <11,24,25,27,29,31>
AD4 <11,24,25,27,29,31>
AD2 <11,24,25,27,29,31>
AD0 <11,24,25,27,29,31>
CHASSIS <13>
AD17
R999 100
VDDQ VCC5
C787
102p
VCC5
C791
102p
C792
102p
VCC3 VCC5
VCC3
C788
102p
C789
102p
C790
102p
C794
VCC5
VCC5 VCC3
102p
GAD13 <9>
GAD30 <9>
GAD15 <9>
C795
102p
VCC5 VCC3
CAP FOR EMI
GPAR <9>
GDEVSEL# <9>
GSTOP# <9>
GFRAME# <9>
GTRDY# <9>
GIRDY# <9>
ST0 <9>
ST1 <9>
GREQ# <9>
GGNT# <9>
ST2 <9>
PIPE# <9>
RBF# <9>
WBF# <9>
GAD13
GAD30
GAD15
GAD_STB0 <9>
GAD_STB1 <9>
SB_STB <9>
GAD_STB#1 <9>
GAD_STB#0 <9>
SB_STB# <9>
GPAR <9>
GAD14 <9>
C793
102p
GAD_STB0
GAD_STB1
SB_STB
GAD_STB#1
GAD_STB#0
SB_STB#
GPAR
GPAR
ST0
ST1
GREQ#
GGNT#
ST2
PIPE#
RBF#
WBF#
R1251 8.2K
GDEVSEL#
GSTOP#
GFRAME#
GTRDY#
GIRDY#
1
2
3
4
6
7
8
9
R1254 8.2K
R1256 8.2K
R1259 4.7K
R1250 8.2K
R1252 8.2K
R1253 8.2K
R1255 8.2K
R1257 8.2K
R1258 8.2K
R1261 330
R1262 8.2K
R1260 4.7K
RN143
1
2
3
4
6
7
8
9510
10P8R-8.2K
RN142
1 2
3 4
5 6
7 8
4.7K
VDDQ
5
10
SERR#
FRAME#
TRDY#
STOP#
DEVSEL#
PLOCK#
IRDY#
PERR#
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN48
8.2K
RN51
8.2K
VCC3
PCI SLOT DECOUPLING CAPACITORS PCI PULL-UP / DOWN RESISTORS
RN49
PREQ#0
PREQ#0 <11>
INTB# <11>
INTG# <12,24>
PREQ#1 <11,29>
PREQ#3 <11,25>
PREQ#5 <11,24>
PREQ#5
1 2
INTB# INTD#
3 4
INTG#
5 6
PREQ#1
7 8
2.7K
R309
PREQ#3
2.7K
R1337
2.7K
VCC5
VCC5
VCC5
PREQ#2 <11,31>
INTD# <11,31>
INTH# <12>
INTA# <11>
INTC# <11,29>
PREQ#4 <11,27>
INTF# <12,27>
INTE# <12,25>
PREQ#2
INTH#
INTA#
INTC#
PREQ#4
INTF#
INTE#
RN50
1 2
3 4
5 6
7 8
2.7K
RN52
1 2
3 4
5 6
7 8
2.7K
VCC5
VCC5
VCC5
CB184
0.1u
CB189
0.1u
CB192
0.1u
CB194
0.1u
CB196
0.1u
CB198
100p
CB200
100p
VCC3
CB190
0.1u
CB193
0.1u
CB197
0.1u
CB199
100p
CB201
0.1u
CB203
100p
-12V
CB183
0.1u
CB187
0.1u
PCI SLOT 1&2&3
VCC3_SB
MS-9134
CB188
0.1u
CB191
0.1u
17 35
+12V
CB182
0.1u
CB186
0.1u
C143
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
星期五, 十月
11, 2002
0A
Page 18
SD_DET <5>
PD_DET <5>
J6 Config.
1 - 2 Normal
Configuration Mode
2 - 3
*
OPEN Recovery
*
Default
FWH DECOUPLING CAPACITORS
VCC3
C449
C450
CB129
0.1u
0.1u
Place Cap. as Close to
FWH< 350 mil
0.1u
C451
0.1u
POWER CIRCUIT FOR USB PORT 0,1
FS1
OC#1 <12>
1.5A-miniSMDC200-S
R333
2.7K
R335
5.1K
NEAR USB CONNECTOR
VCC5
Firware Hub (FWH)
U12
1
VPP
PCIRST#1 <8,13,17,21,24>
FWH_WP#
LAD0/FWH0 <12,13>
LAD1/FWH1 <12,13>
LAD2/FWH2 <12,13>
2
F_GPI3
3
F_GPI2
4
5
6
7
8
9
10
11
12
13
14
15
16 17
BIOS_WP
YJ102
1
2
RST#
FGPI3
FGPI2
FGPI1
FGPI0
WP#
TBL#
ID3
ID2
ID1
ID0
FWH0
FWH1
FWH2
GND FWH3
PLCC32-SMT
FWH_WP#
BIOS_WP BIOS Update
SHORT Locked
OPEN
VCCUSB
C179
105P
+
CT35
1000U/6.3V_SANYO
* USB Trace width : 9 mils
* USB Trace Spacing : 25 mils
* Differential USB Signlas Trace, Spacing : 18 mils
* USB Power Trace must be 40mils width
VCC
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
Unlocked
CLK
FWH_WP# <12>
R334
X_1K
FWH RESISTORS
PCB Mounting Holes
BS7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
VCC3 VCC3
FWH_PCLK <5>
F_GPI4
FWH_IC
INIT#
LFRAME#/FWH4 <12,13>
LAD3/FWH3 <12,13>
F_GPI4
R879 X_1K
F_GPI2
F_GPI2
F_GPI3
F_GPI4
FWH_IC
R876 X_1K
RN94
1 2
3 4
5 6
7 8
8.2K
SIMULATION TRACE
VCC5
J1
X_PIN1*2
VCC3
VCC3
J2
X_PIN1*2
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS8
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS1
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS4
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS2
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS5
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS3
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS6
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
PCB Fiducials
FWH INIT Signal Voltage Translation Block FWH write protect
VCCP
VCC3
R855
10K
B
FINIT# <11>
*
3904
R232
Q7
330
INIT#
C E
FM1
X_FIDUCIAL
FM5
X_FIDUCIAL
FM11
X_FIDUCIAL
FM15
X_FIDUCIAL
FM2
X_FIDUCIAL
FM6
X_FIDUCIAL
FM12
X_FIDUCIAL
FM16
X_FIDUCIAL
FM3
X_FIDUCIAL
FM7
X_FIDUCIAL
FM13
X_FIDUCIAL
FM17
X_FIDUCIAL
FM4
X_FIDUCIAL
FM8
X_FIDUCIAL
FM14
X_FIDUCIAL
FM18
X_FIDUCIAL
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
SBD0SBD0+
SBD1SBD1+
VCCUSB
USB1
1
VCC
2
DATA0-
3
DATA0+
4
GND
9
CGND
10
CGND
USBx2-D8-BK
VCC
DATA1-
DATA1+
GND
CGND
CGND
5
6
7
8
11
12
FB36 0
4 3
1 2
L15
USBP0+ <12>
USBP0- <12>
USBP1+ <12>
USBP1- <12>
CP12 X_COPPER
FB24 X_600_0805
C186 X_0.1u
FB37 0
FB38 0
1 2
FB39 0
NEAR USB
CONNECTOR
X_90ohm_0805
4 3
L16
X_90ohm_0805
CN16
1 2
3 4
5 6
7 8
X_8P4C-10P
For ESD
Protection
SBD0SBD0+
SBD1SBD1+
CAP CLOSE
TO USB
CONNECTOR
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
FWH & CNR
11, 2002
MS-9134
18 35
0A
Page 19
C144 0.1u C145 0.1u
DCDA
RXDA
RIA
CTSA
DSRA
DTRA# <13>
RTSA# <13>
SOUTA <13>
D9
-12V
1N4148-S-LL34
CB206
0.1u
+12V
VCC5
U14
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
75232-1
-12VC
FB8 X_80_0805
CP21 X_COPPER
C150 0.1u
C153 0.1u
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
SERIAL PORT 1
+12VC VCC5
1
V+
19
18
17
14
12
5
6
8
C148 0.1u
10
V-
-12VC
+12V
CB207
0.1u
DTRA
RTSA
TXDA
D10
1N4148-S-LL34
DCDA# <13>
SINA <13>
RIA# <13>
CTSA# <13>
DSRA# <13>
+12VC
DCDA
RXDA
RIA
DTRA
RTSA
CTSA
TXDA
DSRA
DCDA
DSRA
RXDA
RTSA
TXDA
CTSA
DTRA TXDB
RIA
1
6
2
7
3
8
4
9
5
2
4
6
8
2
4
6
8
10 11
1
3
5
7
1
3
5
7
COM1
COM-D9-GN
CN2
220p
CN4
220p
SERIAL PORT
2& JLCD
VCC5
C146 0.1u
DCDB
RXDB
RIB
CTSB
DSRB
DTRB# <13>
RTSB# <13>
SOUTB <13>
TXDB RXDB
R1199
0
20
2
3
4
7
9
16
15
13
11
U15
VCC
RIN1
RIN2
RIN3
RIN4
RIN5
DIN1
DIN2
DIN3
GND
75232-1
JLCD1
12
34
56
CON2X3A
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
1
V+
19
18
17
14
12
5
6
8
10
V-
+12VC
-12VC
R1200 0
C147
0.1u
DTRB
RTSB
TXDB
C149
0.1u
C555
104P
DCDB# <13>
SINB <13>
RIB# <13>
CTSB# <13>
DSRB# <13>
VCC5
DCDB
RTSB
RIB
DTRB
RIB
RXDB
DCDB
DSRB
TXDB
CTSB
RTSB
COM2 HEADER
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
COM2
12
34
56
78
9
D2x5-1:5-WH
CN1
220p
CN3
220p
RXDB
DTRB
DSRB
CTSB
VCC5
LP_D3
LP_D3 <13>
LP_D2
LP_D2 <13>
LP_D1
LP_D1 <13>
LP_D0
LP_D0 <13>
LP_D4
LP_D5
LP_D6
LP_D7
LP_D[0..7] <13>
LP_SLCT <13>
LP_PE <13>
LP_BUSY <13>
LP_ACK# <13>
LP_SLIN# <13>
LP_INIT# <13>
LP_ERR# <13>
LP_AFD# <13>
LP_STB# <13>
LP_SLCT
LP_PE
LP_BUSY
LP_ACK#
LP_SLIN#
LP_INIT#
LP_ERR#
LP_AFD#
LP_STB#
FLOPPY CONNECTOR
FDD1
1 2
4
5
6
7 8
9 10
11 12
13 14
15 16
17 18
19
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
D2x17-1:31-BK
D11 1N4148S
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R320 2.2K
DRVDEN0 <13>
DRVDEN1 <13>
INDEX# <13>
MOT_A# <13>
DRV_B# <13>
DRV_A# <13>
MOT_B# <13>
DIR# <13>
STEP# <13>
WT_DT# <13>
WT_EN# <13>
TRACK0# <13>
FDD_WP# <13>
RDATA# <13>
HEAD# <13>
DSKCHG# <13>
PARALLAL PORT PS2 KEYBOARD & MOUSE CONNECTOR
LP_SLCT
CN5
220p
CN6
220p
CN7
220p
CN8
220p
LP_PE
LP_BUSY
LP_ACK#
LP_D7
LP_D6
LP_D5
LP_D4
LP_D3
LP_SLIN#
LP_D2
LP_INIT#
LP_D1
LP_ERR#
LP_D0
LP_AFD#
LP_STB#
LP_D0
LP_D1
LP_D2
RN53
2.2K
RN55
2.2K
RN56
2.2K
RN57
2.2K
FB15 X_80_0805
CP22 X_COPPER
LP_D3
LP_D4
LP_D5
LP_D6
LP_D7
LP_ACK#
LP_BUSY
LP_PE
LP_SLCT
LP_AFD#
LP_ERR#
LP_INIT#
LP_SLIN#
LP_STB#
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
33p C161
51 52
LPT1
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
48
LPT-D25-BR-BI
MSDATA <13>
MSCLK <13>
KBDATA <13>
KBCLK <13>
KB1_GND
CP23 X_COPPER
1 2
FB50
0_0603
3 4
5 6
7 8
VCC5
RN1
4.7K
L3 300
L4 300
L2 300
L5 300
R319
X_1K
MS_DT
MS_CK
KB_DT
KB_CK
CN15
220p
135
246
KBMS1
14
4
6
2
13
1
5
3
7
15 17
8
MINIDINx2-D12-ML
KB1_GND
16
10
12
8
7
11
9
KB1_GND
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
星期五, 十月
11, 2002
VCC5
C154
C156
0.1u
33p
I/O CONNECTORS
MS-9134
VCC5
VCC5 VCC5
CB320
0.1u
19 35
CB318
0.1u
CB321
0.1u
0A
Page 20
CPU FAN
CPU_CTRL <13>
SYSTEM FAN
SYS_CTRL <13>
POWER FAN
R363
510
R370
510
1K
R559
4.7K
R369
1K
R352 4.7K
+12V
SI2303DS
1 2
+
+12V
SI2303DS
Q18
CT40
47U/16V/S
Q21
CT41
10u-1206
R560 10K
3
2
1
R354 4.7K
D38 1N4148
R969
0_1206
R364 4.7K
D39 1N4148
R970
0_1206
R357
4.7K
PWR_FAN
D1x3-WH-SN
CFAN
SFAN
R556
10K
3
2
CPUFAN1
1
D1x3-WH-SN
R558
10K
3
2
SYS_FAN1
1
D1x3-WH-SN
PWR_FAN1 <13>
CPU_FAN1 <13>
R358
4.7K
SYS_FAN1 <13>
R367
4.7K
VREF1_25 <21>
R557
4.7K
R361
D S
Q20
2N7002S
G
D S
Q24
2N7002S
G
+12V
D40 1N4148
+12V
1 2
+
CT39
47U/16V/S
1.5V STANDBY POWER TRANSLATOR
(40mils trace / 20 mils space)
9VSB
VCC3_SB
C18
VERF1_25
0.1u
5
6
+
-
4 8
U17B
YLM358S-SOIC8
G
7
C203
0.01u
D S
Q84
2N7002S
R378
20_1%
R375
100_1%
C199
0.1u
C200
100p
AGP4X & GMCH 1.5V POWER TRANSLATOR
9VSB
VCC3
C201
0.1u
VCC1_5SB
C202
4.7u-0805
VERF1_25
C468
102p
Title
Size Document Number Rev
Date: Sheet of
MSI
3
2
星期五, 十月
+
1
-
4 8
U17A
YLM358S-SOIC8
R549
1K 1%
R548
1K 1%
CB272
0.1u
MICRO-STAR INT'L CO.,LTD.
FAN
11, 2002
MS-9134
Q56
P3055LD-TO252
+2.5V
+
CT44
1000U/6.3V_SANYO
20 35
0A
Page 21
CT90
1000U/6.3V_SANYO
DDR VTT Power
VTT_DDR
FOR 3VSB OR 3VSTR SETTING BY SEL1
VCC3_SB Main Standby
VCC5_STR
SLP_S4# <12>
SLP_S5# <12>
SLP_S3# <12,13>
PWR_GD <8,12>
FP_RST# <12,23,33>
PWR_OK <23,33>
Q75
P3055LD-TO252
Q76
P3055LD-TO252
VRAM_2.5
2.5V
2.5V
1.25V
+2.5V
PWR_LED <23>
SUS_LED <23>
VCC3
VCC5
DRV_VTTH
DRV_VTTL
PCIRST# <11>
HD_RST# <5>
PCIRST#2 <23,25,27,29,31>
PCIRST#1 <8,13,17,18,24>
SMBDATA_VCC <5,14,33>
SMBCLK_VCC <5,14,33>
Near
302D
**INPUT 2 AND 3 MUST BE HI LEVEL WHEN USE
OUTPUT 1 AND 2 FOR GPIO FUNCTION
VCC3
+
CT90 NEAR
THE DIMM
SIDE
VCC3
1.25V/2.1A
+
EC7
1000U/6.3V
SEL1
TRI-STATE 3.3VSB
L
14 7
11 10
14 7
5 6
14 7
13 12
VRAM
3.3VDUAL H
3.3VSTR
U51E
74LVC07AD-SOIC14
U51C
74LVC07AD-SOIC14
U51F
74LVC07AD-SOIC14
S0 Power S5 S3
Main
Main
R971 180
R972 180
R973 330
D30
1N4001-S-SM-1
Standby
Standby
SLP_S3#
PCIRST#2
PCIRST#1
VCC5_SB
C369
X_102P
CT76 NEAR TO
MS5
FOR 3VDUAL
SETTING BY
SEL1
1000U/6.3V_SANYO
VCC3_SB
VCC_DDR
VCC5_SB
0V
0V MEM_STR
R1270 X_0
R1266 0
R959 X_0
VCC5_SB
R850
330
R995
X_4.7K
R848
10K
VCC5
+
CT75
R845
330
R996
X_4.7K
10
11
12
C368
104P
VCC3
Q78
P45N02LD-S-TO252
1
DGND
2
PCIRST#/GPIOA
3
HDD_RST#/GPIOA
4
SLOT_RST#/GPIOA
5
DEV_RST#/GPIOA
6
I2C_DATA
7
I2C_CLK
8
BT_DRV
9
BT_SEN
BT_SINK
AGND0
SEL1
C367
104P
DRV_3VSB3
Standby
Wide Trace
+
EC9
1000U/6.3V
** SETTING 3VSTR THEN VRAM_2.5
BECOME TO 1.25 VREF
D S
VCC5_SB
G
Q97
NDS351
VCC3
R846
1K
48
PLED0
PLED1
VCC
VRAMDRV2
1314151617181920212223
CT76
+
47U/16V/S
C370
0.47u X7R
DRV_3VSB5
R847
4.7K
PWR_OK
FP_RST#/GPIOB
VRAMSEN
VRAMDRV1SSAGND1
SEL0
H
L
VCC5_SB
VCC3_SB
R844
10K
R958
4.7K
C E
Q94 2N3904S
VCC5_SB
R1340
4.7K
R1343
10K
U38
3738394041424344454647
SLP_S5#
SLP_S3#
PWR_OK1/GPIOC
EXTRA_PWGD/GPIOC
CHIP_PWGD/GPIOC
VRAM_2.5_DEN
RSM_RST#/GPIOB
CPU_PWGD/GPIOC
VRAM_2.5_DRV
5VSB
VRGOOD
1.2V_SEN
S5O#/GPIOB/SEL0
VAGP_SEN
VAGP_DRV
1.2V_DRV
24
5V_USB
5VSB_DRV
5V_DRV
TYPEDET#
AGND2
1.25VREF
9VSB
VCC3
W83302D
DRV_VID
36
35
34
33
32
31
30
29
28
27
C2
26
C1
25
THIS PIN IS OPEN DRAIN OUTPUT
VCC3
DRV_DDR
Q79
P3055LD-TO252
C373
104P
5VUSB
2 MOSFET
1 MOSFET
PS_ON# <13,23>
R957
10K
C476
B
X_0.1u
RSM# <23>
VREF1_25
VCC3
C366
104P
VCC5_SB +12V
D28
SM5817S
CHARGE PUMP VOLTAGE OUTPUT
VCC3
D S
Q77
G
2N7002
C372
X_102P
C371
10u-0805
DDR 2.5V Power
2.5V/2.8A+5.92A
VCC_DDR
1000U/6.3V_SANYO
**S5O# pin function(Hi level = 5V)
same as 5VUSB(Hi level = 12V)
5VUSB USE 2 MOSFET
VCC5_SB
DRV5STR1
DRV5STR2
C362
2200P
C363
X_102P
D S
G
NDS351
D S
G
NDS351
VCC5
Q73
Q74
VCC5_STR
CB322
0.1u
CB240
0.1u
Low RDS ON MOSFET
5V DUAL Power
DRV_VDDQ
VREF1_25 <20>
C364
1u-0805
1N4148S
D29
C365
1u/0805
9VSB
C469
X_102P
VCC_VID / VID_GOOD
Place MOSFET near CPU
VCC_VID <7>
1.2V/0.1A
VID_GD <22>
1.0V
CT91 NEAR
THE DIMM
SIDE
VCC3
CT91
+
Title
Size Document Number Rev
Date: Sheet of
VDDQ
P3055LD-TO252
+2.5V
MSI
星期五, 十月
X_0
R1338
2N3906S
R1341
2.2K
Q119
E C
B
2
3
1
2
3
1
D52
BAV99
D53
BAV99
R1342
X_0
RSM# RSMRST#
PIN WIDTH
1
10 mil
2
5 mil
3
5 mil
4
5 mil
5
Q57
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
5 mil
5 mil
5 mil
10 mil
10 mil
10 mil
10 mil
10 mil
25 mil
10 mil
20 mil
10 mil
10 mil
10 mil
10 mil
10 mil
10 mil
10 mil
10 mil
10 mil
POWER COPPER
PIN 9
PIN 15
PIN 19
MICRO-STAR INT'L CO.,LTD.
ACPI CONTROLLER
11, 2002
MS-9134
R1339
10K
PIN 32
RSMRST# <12,23>
PIN WIDTH
25
COPPER
26
20 mil
27
20 mil
28
10 mil
29
10 mil
30
GND
31
10 mil
32
10 mil
33
GND
34
10 mil
35
NC
36
10 mil
37
5 mil
38
5 mil
39
5 mil
40
5 mil
41
NC
42
5 mil
43
NC
44
5 mil
45
5 mil
46
10 mil
47
5 mil
48
5 mil
21 35
0A
Page 22
5
+12V
VCC5
VCC5
D D
VID_GD <21>
C C
VCCPS- <6>
VCCPS+ <6>
R1284
4.7K
VCC5
R1280
4.7K
B
Q113
C E
2N3904S
VCC3
VRM_GD <12>
R1296 470KST
R1297 X_0
R1302 X_0
R1281
1K
VIDGDR
VID[4..0] <6,13>
R1288 X_10K
C589
X_15p
R1298
X_15K
C596
X_5600p
VID[4..0]
VIDGDR
R1289 X_0
X_100p C585
R1291 154KST
R1295
15K
C591
562P
R1299
2.37KST
CHOK1 1.2uH-18A
CB330
33P
VID4
VID3
VID2
VID1
VID0
U57
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
19
PGOOD
6
COMP
7
FB
INTS-HIP6301-SOIC20
R1300
X_0
R1303 0
HIP6301 -- VRM 9.0/9.2
VID4 VID3 VID2 VID1 VID0 VDC(V)
1 0 1 1 0 1.30
1 0 0 0 1 1.425
1 0 0 0 0 1.45
B B
0 1 1 1 1 1.475
0 1 1 1 0 1.500
0 1 1 0 1 1.525
0 1 1 0 0 1.550
0 1 0 1 1 1.575
0 1 0 1 0 1.600
0 1 0 0 1 1.625
VID4 VID3 VID2 VID1 VID0 VDC(V)
0 1 0 0 0 1.650
0 0 1 1 1 1.675
0 0 1 1 0 1.70
0 0 1 0 1 1.725
0 0 1 0 0 1.75
0 0 0 1 1 1.775
0 0 0 1 0 1.80
0 0 0 0 1 1.825
0 0 0 0 0 1.85
1 1 1 1 1 OFF
VCCP
C578
33P
VCC
GND
PWM1
ISEN1
PWM2
ISEN2 FS/DIS
PWM3
ISEN3
PWM4
ISEN4
VSEN
4
20
9
15
16
14
13 8
11
12
18
17
10
CT77
1500u-16V
V5V
R1287 3.3KST
R1290 3.3KST
R1293 3.3KST
V5V
VCC5
+12V
R1285
0
C584
105P/0805
CT78
1500u-16V
R1282 10/0805
CB331
104P/0805
CB332
104P/0805
+12V
CB333
474P/0805
+12V
CT79
1500u-16V
R1292
10/0805
R1304
10/0805
14
3
1
5 9
6
2
6
7
4
3
CT80
1500u-16V
U56A
VCC
BOOT1
PHASE1
GND
PWM1
HIP6602A-SO14
U56B
PVCC U_G2
BOOT2
PHASE2
PGND
PWM2
HIP6602A-SO14
U58
VCC
BOOT
PVCC
PHASE
GND
PWM
HIP6601B-SOIC8
3
U_G1
L_G1
L_G2
U_G
L_G
C610
X_2.2u-0805
12
11
C582
104P
13
C583
1000P
4
10
C590
104P
8
C592
1000P
7
1
2
C598
104P
8
C599
1000P
5
C611
225P/0805
C612
X_2.2u-0805
R1283 3.3/0805
R1286 0/0805
C586
105P/0805
R1294 3.3/0805
R1301 0/0805
C597
105P/0805
R1305 3.3/0805
R1307 0/0805
G
G
G
G
G
G
Q112
D S
IPD12N03L-TO252
Q114
D S
IPD07N03L-TO252
Q115
D S
IPD12N03L-TO252
Q116
D S
IPD07N03L-TO252
Q117
D S
IPD12N03L-TO252
Q118
D S
IPD07N03L-TO252
2
CHOK2
0.9UH/25A-PB
CHOK3
0.9UH/25A-PB
CHOK4
0.9UH/25A-PB
R1306
1K
Q112-1
TO252-H
C600
475P/0805
Q115-1
TO252-H
CT82
2200UF/6.3V-R
C587
0.1u
C601
X_4.7u-0805
C594
2200UF/6.3V-R
CT86
2200UF/6.3V-R
C602
475P/0805
Q117-1
TO252-H
CT83
2200UF/6.3V-R
C588
104P
CT85
2200UF/6.3V-R
CT84
1500u
1
C593
2200UF/6.3V-R
CT87
2200UF/6.3V-R
CT81
1500u
VCCP
C595
1500u
VCCP
NOTE: INSIDE ON CPU SOCKET.
R1330
5.1K
ATX12V POWER CONNECTOR
JPW1
C605
33P
3
4
YPC04
5
A A
+12V
C604
103P
1
GND
12V
2
GND
12V
VID PULL-UP RESISTORS
VCCT
RN147
8P4R-1K
VID4
1
3
5
7
R1317 1K
4
2
4
6
8
VID3
VID1
VID0
VID2
+12V VCC3 VCCT
R1313 1KST
C606
R1314 1KST
104P
RLZ3.3B-S-LL34
R1315
X_0/0805
D49
3
C607
1 2
10u-1206
2
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
11, 2002
MICRO-STAR
VRM9.1 INTERSIL HIP6301
MS-9134
1
22 35
0B
Page 23
VCC3
CB210
VCC5_SB
BMCRSTIN# <33>
0.1u
R337 4.7K
FP_RST# <12,21,33>
SPKR <12>
-12V
CB211
CB212
33pF
0.1u
PS_ON# <13,21>
VCC5
MSI/Intel Front Panel
VCC3
R1025
1K
BMCRSTIN#
C481
103P
FP_RST#
SCSILED# <24>
PD_LED <5>
SD_LED <5>
ALARM <13>
R821 2.2K
B
ATX CONNECTOR
CB213
33pF
C187
102p
CB278
0.1u
CB216
0.1u
R1026
22
R1027
0
D34 1N4148S
D31 1N4148S
D32 1N4148S
C471 470P
SPEAKER
R819 220
R820 220
C E
Q68
2N3904S
-5V
VCC5
11
3.3V
12
-12V
13
GND
14
PSON
15
GND
16
GND
17
GND
18
-5V
19
5V
20
5V
POWER
CB217
33pF
R806
330
IDE_LED
RESET#
D41 1N4148
C339 104P
SPK
1
3.3V
2
3.3V
GND
5V
GND
5V
GND
POK
5VSB
12V
1
3
5 6
7
9
CB185
0.1u
3
4
5
VCC5
6
7
8
9
10
CB218
33pF
JFP1
HDD+
HDDRESET- PWSW+
RESET+
PWSW-
NC
JFP1
IDE_LED
VCC5
SPK
CB208
33pF
CB214
0.1u
R535
1K
C189
CB219
102p
0.1u
2
PLED
4
SLED
8
IDE_LED <26,28>
BUZZER
SPEAKER1
CB209
1u-0805
CB215
33pF
PWR_LED HDD+
SUS_LED
PWRSW
PWRSW#
VCC3
VCC5
PWR_OK <21,33>
CB220
0.1u
PWR_LED <21>
SUS_LED <21>
VCC5_SB
+12V
PWRSW
PWRSW#
R1033
330
VCC5_SB
CB233
0.1u
AC_SDIN0 <12>
AC_SDIN1 <12>
AC_SDIN2 <12>
AC_BITCLK <12>
SMBDATA <12,33>
PCIRST#2 <21,25,27,29,31>
GPIO32 <12>
GPIO33 <12>
GPIO34 <12>
R1410 0
R1411 0
R1412 0
POWER BUTTON
VCC5_SB
R1029
10K
R1031 0
C482
105P
SMBCLK <12,33>
REGULATORS OUTPUT DECOUPLING CAPACITORS
VCC3_SB VCC3_SB
CB237
1u-0805
VCC3_SB
AC_SDOUT <12>
VCC3
CB310
0.1u
CB239
0.1u
CB241
0.1u
AC97_PULL
UP
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_BITCLK
VCC3
VCC5_SB
R1030
10K
R1032 10K
AC_SDOUT
U59
20
VDD
1
SCL
2
SDA
19
RST#
3
A0/GPI32
4
A1/GPI33
5
A2/GPI34
GPIO-WB-W83601R-SSOP20
2
BMCBTOUT
VCC5_SB
PWRSW
GP10
GP11
GP12
GP13
GP14
GP15
GP16
GP17
GP23
GP24
GP25
GP26
C483
10P
1 3
X_33K-0603
VCC5_SB
R1035 8.2K
R1036 10K
R1037 10K
R1038 10K
R1039 10K
IDE_ERR1
6
IDE_ERR2
7
IDE_ERR3
13
IDE_ERR4
14
PIDE_IN1
15
PIDE_IN2
16
PIDE_IN3
17
PIDE_IN4
18
8
BOOTLED
9
WARNLED
11
12
R1028
8.2K
PWRBTIN
Q100
2N3904S
BMCPTOUT <33>
PWRSW <33>
PWRBTIN <13>
R1271
X_100K-0603
R1274
R1277
X_1K-0603
R1279
X_270-0603
PIDE_IN1 <12>
PIDE_IN2 <12>
PIDE_IN3 <12>
PIDE_IN4 <12>
EXTSMI# <12,33>
VCC5_SB
R1272
X_10K-0603
C E
Q109
B
C577
X_1u-0603
A0, A1, A2 =
1,1,1
X_2N3904S
VCC3_SB
R1278
X_1K-0603
C E
Q111
B
X_2N3904S
BOOTLED
WARNLED
PIDE_IN4
PIDE_IN3
PIDE_IN2
PIDE_IN1
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
R1273
X_1K-0603
S
G
Q108
X_YFET-SI2303DS
D
R1276
X_0-0603
RSMRST#
C E
Q110
B
X_2N3904S
JSP1
1 2
BOOT EXT
3
WARN
5 6
PIDE4 IDE_E4
7 8
PIDE3 IDE_E3
9 10
PIDE2 IDE_E2
11 12
PIDE1 IDE_E1
CON6X2
F_JSP3_X-S
N31-2061051-P05
IDE_ERR1
IDE_ERR2
IDE_ERR3
IDE_ERR4
BOOTLED
WARNLED
R1275 X_1K-0603
RSM#
RSMRST# <12,21>
RN150
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
10P8R-4.7K
PIDE_IN1
PIDE_IN2
PIDE_IN3
PIDE_IN4
RN151
1 2
3 4
5 6
7 8
4.7K
MICRO-STAR INT'L CO.,LTD.
Front Panel & ATX Connector & FAN
11, 2002
MS-9134
23 35
VCC3_SB
RSM# <21>
IDE_ERR4
IDE_ERR3
IDE_ERR2
IDE_ERR1
VCC3
5
10
VCC3
0A
Page 24
VCC5
MINIPCI1
1
TIP
3
8PMJ-3
5
8PMJ-6
7
8PMJ-7
9
8PMJ-8
11
Led1_GrnP
13
Led_GrnN
15
CHSGND
17
INTB#
19
3.3V
21
REV_1
23
PCICLK1 <5>
PCICLK1
PREQ#5 <11,17> PGNT#5 <11>
PREQ#5
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
IRDY# <11,17,25,27,29,31>
SERR#
SERR# <11,17,29,31>
PERR#
PERR# <11,17,29,31>
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
GND
25
CLK
27
GND
29
REQ#
31
3.3V
33
AD31
35
AD29
37
GND
39
AD27
41
AD25
43
REV
45
C/BE3#
47
AD23
49
GND
51
AD21
53
AD19
55
GND
57
AD17
59
C/BE2#
61
IRDY#
63
3.3V
65
CLKRUN#
67
SERR#
69
GND
71
PERR#
73
C/BE1#
75
AD14
77
GND
79
AD12
81
AD10
83
GND
85
AD08
87
AD07
89
3.3V
91
AD05
93
REV
95
AD03
97
5V
99
AD01
101
GND
103
AC_SYNC
105
AC_SDATA_IN
107
AC_BIT_CLK
109
AC_CODE_ID1#
111
MOD_AUDIO_MON
113
AUDIO_GND
115
SYS_AUDIO_OUT
117
SYS_AUDIO_OGND
119
AUDIO_GND
121
REV
123
VCC5VA
127 128
GND GND
MINI PCI
LED2_YELP
LED2_YELN
AC_SDATA_OUT
AC_CODEC_ID0#
AC_RESET#
SYS_AUDIO_IN
SYS_AUDIO_IGND
AUDIO_GND
RING
8PMJ-1
8PMJ-2
8PMJ-4
8PMJ-5
REV
INTA#
REV
3.3VAUX
RST#
3.3V
GNT#
GND
PME#
REV
AD30
3.3V
AD28
AD26
AD24
IDSEL
GND
AD22
AD20
PAR
AD18
AD16
GND
FRAME#
TRDY#
STOP#
3.3V
DEVSEL#
GND
AD15
AD13
AD11
GND
AD09
C/BE0#
3.3V
AD06
AD04
AD02
AD00
REV_WIP
REV_WIP
GND
M66EN
REV
GND
MPCIACT#
3.3VAUX
2
4
6
8
10
12
14
16
18
5V
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
VCC3 VCC3
PGNT#5
PME#
AD30
AD28
AD26
AD24
R785 100
AD22
AD20
PAR
AD18
AD16
FRAME#
TRDY#
STOP#
DEVSEL#
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
VCC5
+12V
INTG# <12,17>
PCIRST#1 <8,13,17,18,21>
PME# <11,17,29,31>
PAR <11,17,25,27,29,31>
FRAME# <11,17,25,27,29,31>
TRDY# <11,17,25,27,29,31>
STOP# <11,17,25,27,29,31>
DEVSEL# <11,17,25,27,29,31>
SCSILED# <23>
AD22
JBAT1 Clear CMOS
Normal
1 - 2
2 - 3
*
Clear CMOS
BIOS_WP BIOS Update
SHORT Locked
OPEN
Unlocked
X_YJUMPER-MG
JBAT1(1-2)
YJUMPER-MG
PCI3_A
PCI-D120-WH-SN
Option :M
PCI3_B
PCI-D120-BL-SN
*
JLAN1(1-2)
JLAN1
1-2
2-3
BIOS_WP(1)
X_YJUMPER-MG
U4_1
Chipset Heatsink
U3_1
CPU Retention
P01-6526300-K10
PCB1
LAN SELECT
ENABLED
DISABLED
JFP2(4-6)
YJUMPER-MG
U4-900
FAN Header
U4-901
FAN Header
BAT1_X
BATTERY
U12_X
FLASH2M
VCC3
C747
0.1u
5
2
For Mini PCI
SP1
523
X_YJ102
C748
0.1u
C_BE#[3..0] <11,17,25,27,29,31>
AD[31..0] <11,17,25,27,29,31>
C750
C749
0.1u
3
4
4
4.7u-0805
SP2
5
523
2
X_YJ102
C751
0.1u
4
C752
0.1u
3
4
C753
0.1u
5
2
C754
4.7u-0805
SP3
523
X_YJ102
3
4
4
C_BE#[3..0]
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MINI PCI & MANUAL PARTS
11, 2002
MS-9134
24 35
0A
Page 25
5
4
3
2
1
VCC3
C_BE#[3..0] <11,17,24,27,29,31>
PCICLK4 <5>
PCIRST#2
INTE# <12,17>
PGNT#3 <11>
PREQ#3 <11,17>
FRAME# <11,17,24,27,29,31>
IRDY# <11,17,24,27,29,31>
TRDY# <11,17,24,27,29,31>
STOP# <11,17,24,27,29,31>
SECOND2 <26>
PPDIAGN2 <26>
SPDIAGN2 <26>
10U/16V/S
C567
PAR <11,17,24,27,29,31>
AD[31..0]
VCCRAA
PCICLK4
INTE#
PGNT#3
PREQ#3
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
PPDIAGN2
SPDIAGN2
R1216 100
C568
104P
VCCRAD
C570
104P
BPHD[15..0]
DRVRST#2 <26>
PINTR#2 <26>
PDMARQ2 <26>
PDMACK#2 <26>
PHIORDY2 <26>
PHIOR#2 <26>
PHIOW#2 <26>
PHCS0#2 <26>
PHCS1#2 <26>
BPHDA[2..0]
SINTR#2 <26>
SDMARQ2 <26>
SDMACK#2 <26>
SHIORDY2 <26>
SHIOR#2 <26>
SHIOW#2 <26>
SHCS0#2 <26>
SHCS1#2 <26>
10U/16V/S
C571
10_0805
L37
BPHD[15..0] <26>
CSHD[15..0] <26>
BPHDA[2..0] <26>
CSHDA[2..0] <26>
VCC3
2
ENABLE :1-2
DISABLE:2-3
JIDE1_1-2
YJUMPER-MG
R1219 X_0
AD20
IDE1EN2
R1218
100
JIDE1
1
2
3
YJ203
VCC3
C558
104P
C563
104P
104P
C560
104P
C561
104P
C557
104P
C564
Title
IDE RAID PDC20276
Size Document Number Rev
B
星期五, 十月
Date: Sheet of
11, 2002
MS-9134
1
25 35
0A
PBDSD15
PBDSD14
PBDSD13
PBDSD12
PBDSD11
PBDSD10
PBDSD9
PBDSD8
PBDSD7
PBDSD6
PBDSD5
PBDSD4
PBDSD3
PBDSD2
PBDSD1
PBDSD0
SBDSD15
SBDSD14
SBDSD13
SBDSD12
SBDSD11
SBDSD10
SBDSD9
SBDSD8
SBDSD7
SBDSD6
SBDSD5
SBDSD4
SBDSD3
SBDSD2
SBDSD1
SBDSD0
DRVRSTN
DINT0
DMARQ0
DMACK0#
PCHRDY#
PIORD#
PIOWR#
PBCS0#
PBCS1#
PBDSA0
PBDSA1
PBDSA2
DINT1
DMARQ1
DMACK1#
SCHRDY
SIORD#
SIOWR#
SBCS0#
SBCS1#
SBDSA0
SBDSA1
SBDSA2
VCCIK
GND
GND
GND
119
GNDIK
U55
59
61
63
66
71
73
75
79
80
78
74
72
70
65
62
60
90
95
97
101
103
105
107
112
111
106
104
102
100
96
94
89
50
56
58
57
69
76
67
53
51
54
55
52
86
88
87
91
93
98
83
81
84
85
82
116
PDC20276
BPHD15
BPHD14
BPHD13
BPHD12
BPHD11
BPHD10
BPHD9
BPHD8
BPHD7
BPHD6
BPHD5
BPHD4
BPHD3
BPHD2
BPHD1
BPHD0
CSHD15
CSHD14
CSHD13
CSHD12
CSHD11
CSHD10
CSHD9
CSHD8
CSHD7
CSHD6
CSHD5
CSHD4
CSHD3
CSHD2
CSHD1
CSHD0
DRVRST#2
PINTR#2
PDMARQ2
PDMACK#2
PHIORDY2
PHIOR#2
PHIOW#2
PHCS0#2
PHCS1#2
BPHDA0
BPHDA1
BPHDA2
SINTR#2
SDMARQ2
SDMACK#2
SHIORDY2
SHIOR#2
SHIOW#2
SHCS0#2
SHCS1#2
CSHDA0
CSHDA1
CSHDA2
1030436892
108
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
GND
GND
GND
GND
IDE1EN2
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
125
126
127
128
120
109
122
121
123
124
115
113
114
117
118
2
3
4
5
9
11
12
13
14
16
17
18
28
29
31
32
33
35
36
37
39
41
42
44
45
46
48
49
6
19
26
38
7
20
21
22
23
24
25
BAD31
BAD30
BAD29
BAD28
BAD27
BAD26
BAD25
BAD24
BAD23
BAD22
BAD21
BAD20
BAD19
BAD18
BAD17
BAD16
BAD15
BAD14
BAD13
BAD12
BAD11
BAD10
BAD9
BAD8
BAD7
BAD6
BAD5
BAD4
BAD3
BAD2
BAD1
BAD0
BCBE3#
BCBE2#
BCBE1#
BCBE0#
CLK
ECLK66
RESET#
INTA#
PCIGNT#
PCIREQ#
IDSEL
BFRAME#
BIRDY#
BTRDY#
BDEVSEL#
BSTOP#
PAR
BFLHCS#
PCBLID
SCBLID
AVCC
AGND
181527344047647799110
4
3
AD[31..0] <11,17,24,27,29,31>
D D
C C
VCC3
R1217
1K
PCIRST#2 <21,23,27,29,31>
C562
X_102P
B B
DEVSEL# <11,17,24,27,29,31>
VCC3
L34
10_0805
A A
5
Page 26
5
PHCS0#2 <25>
PHCS1#2 <25>
D D
PHCS0#2
BPHDA2
PHCS1#2
BPHD14
BPHD0
BPHD15 D_PHD15
BPHD7 D_PHD7
BPHD8 D_PHD8
BPHD6 D_PHD6
BPHD9
RN126
1 2
3 4
5 6
7 8
8P4R-33
RN134
1 2
3 4
5 6
7 8
8P4R-33
RN137
1 2
3 4
5 6
7 8
DRPHCS0#
DRPHDA2
DRPHCS1#
D_PHD1 BPHD1
D_PHD14
D_PHD0
D_PHD9
8P4R-33
RN135
RN138
D_PHD5 BPHD5
D_PHD10
D_PHD4
D_PHD11
DRPHIOR# PHIOR#2
DRPHDA1
DRPHDA0
BPHD10
BPHD4
BPHD11
PHIOR#2 <25>
PHIOW#2 DRPHIOW#
PHIOW#2 <25>
BPHDA1
BPHDA0
1 2
3 4
5 6
7 8
8P4R-33
1 2
3 4
5 6
7 8
8P4R-33
RN128
R1227
22
D_PHD7
D_PHD3 BPHD3
D_PHD12
D_PHD2 BPHD2
D_PHD13 BPHD13
BPHD12
C C
PDMACK#2 DRPDMACK#
PDMACK#2 <25> SDMACK#2 <25>
1 2
3 4
5 6
7 8
8P4R-33
R1425 33
B B
4
C574
22P
C572
22P
R1224
22
R1221
22
R1226
5.6K
R1222
10K
PDMARQ2 DRPDMARQ
PDMARQ2 <25> SHCS0#2 <25>
PINTR#2 DPIDEINT
PINTR#2 <25>
3
SINTR#2
SINTR#2 <25>
SDMARQ2
SDMARQ2 <25>
C575
22P
C573
22P
22
R1223
R1228
2
DSIDEINT
22
R1225
10K
DRSDMARQ
R1232
5.6K
VCC3
VCC3
R1234
4.7K
R1236
PHIORDY2 DPHIORDY2
PHIORDY2 <25>
DRVRST#2 D_DRVRST#2
DRVRST#2 <25>
D_DRVRST#2
D_PHD7 D_PHD8
D_PHD6 D_PHD9
D_PHD5 D_PHD10
D_PHD4 D_PHD11
D_PHD3 D_PHD12
D_PHD2 D_PHD13
D_PHD1 D_PHD14
D_PHD0 D_PHD15
DRPDMARQ
DRPHIOW#
DRPHIOR#
DPHIORDY2
DRPDMACK#
DPIDEINT
DRPHDA1 PPDIAGN2
DRPHDA0 DRPHDA2
DRPHCS0# DRPHCS1#
22
R1231
33RST
C761
102P
RAID1
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CYELLOW
C762
102P
D47
SHIORDY2 <25>
SECOND2 <25>
DRSDMARQ
DRSHIOW#
DRSHIOR#
DSHIORDY2
DRSDMACK#
DSIDEINT
PPDIAGN2 <25> SPDIAGN2 <25>
DRSHDA1
DRSHDA0
DRSHCS0#
SHIORDY2 DSHIORDY2
SECOND2
D_SECOND2
D_SHD7
D_SHD6
D_SHD5
D_SHD4
D_SHD3
D_SHD2
D_SHD1
D_SHD0
D48
R1235
4.7K
R1237
22
R1230
33RST
C759
102P
RAID2
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CYELLOW
D_SECOND2
D_SHD8
D_SHD9
D_SHD10
D_SHD11
D_SHD12
D_SHD13
D_SHD14
D_SHD15
DRSHDA2
DRSHCS1#
SPDIAGN2
C760
102P
CSHDA2
SHCS0#2
SHCS1#2
SHCS1#2 <25>
CSHD8 D_SHD8
CSHD7
CSHD9 D_SHD9
CSHD6 D_SHD6
SHIOR#2 <25>
SHIOW#2 SHIOW#2 DRSHIOW# DRSHIOW#
SHIOW#2 <25>
CSHD10 D_SHD10
CSHD5 D_SHD5
CSHD11 D_SHD11
CSHD4 D_SHD4
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
CSHD12 D_SHD12
CSHD3 D_SHD3
CSHD2
CSHD15
CSHD0 D_SHD0
CSHDA1
SDMACK#2 DRSDMACK#
D_SHD7
1
RN129
8P4R-33
RN133
8P4R-33
RN136
8P4R-33
RN131
8P4R-33
RN139
1 2
3 4
5 6
7 8
8P4R-33
R1413 33
R1414 33
R1416
R1415
R1229
22
R1426 33
33
33
DRSHDA2
DRSHCS0#
DRSHCS1#
D_SHD7
D_SHD14 CSHD14
D_SHD1 CSHD1
DRSHIOR# SHIOR#2
D_SHD2
D_SHD15
DRSHDA1
DRSHDA0 CSHDA0
D_SHD13 CSHD13
1N4148S
R1238
100
1N4148S
IDE_LED <23,28>
A A
BPHD[15..0] <25>
CSHD[15..0] <25>
BPHDA[2..0] <25>
CSHDA[2..0] <25>
BPHD[15..0]
CSHD[15..0]
BPHDA[2..0]
CSHDA[2..0]
5
PHCS0#2
BPHDA0
BPHDA1
PHCS1#2
CSHDA0
Title
IDE RAID CONNECTOR
Size Document Number Rev
Custom
4
3
2
Date: Sheet
MS-9134
星期五, 十月
11, 2002
26 35
1
0A
of
Page 27
5
4
3
2
1
VCC3
C_BE#[3..0] <11,17,24,25,29,31>
PCICLK5
INTF#
PGNT#4
PREQ#4
SECOND
PPDIAGN
SPDIAGN
VCCRBA
FRAME# <11,17,24,25,29,31>
IRDY# <11,17,24,25,29,31>
TRDY# <11,17,24,25,29,31>
DEVSEL# <11,17,24,25,29,31>
STOP# <11,17,24,25,29,31>
PAR <11,17,24,25,29,31>
AD[31..0]
R1043 100
C496
104P
4
IDE1EN
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
125
126
127
128
120
109
122
121
123
124
115
113
114
117
118
2
3
4
5
9
11
12
13
14
16
17
18
28
29
31
32
33
35
36
37
39
41
42
44
45
46
48
49
6
19
26
38
7
20
21
22
23
24
25
BAD31
BAD30
BAD29
BAD28
BAD27
BAD26
BAD25
BAD24
BAD23
BAD22
BAD21
BAD20
BAD19
BAD18
BAD17
BAD16
BAD15
BAD14
BAD13
BAD12
BAD11
BAD10
BAD9
BAD8
BAD7
BAD6
BAD5
BAD4
BAD3
BAD2
BAD1
BAD0
BCBE3#
BCBE2#
BCBE1#
BCBE0#
CLK
ECLK66
RESET#
INTA#
PCIGNT#
PCIREQ#
IDSEL
BFRAME#
BIRDY#
BTRDY#
BDEVSEL#
BSTOP#
PAR
BFLHCS#
PCBLID
SCBLID
AVCC
AGND
1030436892
108
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
181527344047647799110
GND
GND
3
GND
GND
GND
PBDSD15
PBDSD14
PBDSD13
PBDSD12
PBDSD11
PBDSD10
PBDSD9
PBDSD8
PBDSD7
PBDSD6
PBDSD5
PBDSD4
PBDSD3
PBDSD2
PBDSD1
PBDSD0
SBDSD15
SBDSD14
SBDSD13
SBDSD12
SBDSD11
SBDSD10
SBDSD9
SBDSD8
SBDSD7
SBDSD6
SBDSD5
SBDSD4
SBDSD3
SBDSD2
SBDSD1
SBDSD0
DRVRSTN
DMARQ0
DMACK0#
PCHRDY#
PIORD#
PIOWR#
PBCS0#
PBCS1#
PBDSA0
PBDSA1
PBDSA2
DMARQ1
DMACK1#
SCHRDY
SIORD#
SIOWR#
SBCS0#
SBCS1#
SBDSA0
SBDSA1
SBDSA2
VCCIK
GND
GND
GND
DINT0
DINT1
GND
119
GNDIK
U48
59
61
63
66
71
73
75
79
80
78
74
72
70
65
62
60
90
95
97
101
103
105
107
112
111
106
104
102
100
96
94
89
50
56
58
57
69
76
67
53
51
54
55
52
86
88
87
91
93
98
83
81
84
85
82
116
PDC20276
PHD15
PHD14
PHD13
PHD12
PHD11
PHD10
PHD9
PHD8
PHD7
PHD6
PHD5
PHD4
PHD3
PHD2
PHD1
PHD0
SHD15
SHD14
SHD13
SHD12
SHD11
SHD10
SHD9
SHD8
SHD7
SHD6
SHD5
SHD4
SHD3
SHD2
SHD1
SHD0
DRVRST#
PINTR#
PDMARQ
PDMACK#
PHIORDY
PHIOR#
PHIOW#
PHCS0#
PHCS1#
PHDA0
PHDA1
PHDA2
SINTR#
SDMARQ
SDMACK#
SHIORDY
SHIOR#
SHIOW#
SHCS0#
SHCS1#
SHDA0
SHDA1
SHDA2
VCCRBD
C498
104P
PHD[15..0]
DRVRST# <28>
PINTR# <28>
PDMARQ <28>
PDMACK# <28>
PHIORDY <28>
PHIOR# <28>
PHIOW# <28>
PHCS0# <28>
PHCS1# <28>
PHDA[2..0]
SINTR# <28>
SDMARQ <28>
SDMACK# <28>
SHIORDY <28>
SHIOR# <28>
SHIOW# <28>
SHCS0# <28>
SHCS1# <28>
SHDA[2..0]
10U/16V/S
C499
10_0805
L33
PHD[15..0] <28>
SHD[15..0] <28>
PHDA[2..0] <28>
SHDA[2..0] <28>
VCC3
2
ENABLE :1-2
DISABLE:2-3
AD21 PCIRST#2
IDE1EN
Title
IDE RAID PDC20276
Size Document Number Rev
B
星期五, 十月
Date: Sheet of
11, 2002
AD[31..0] <11,17,24,25,29,31>
D D
C C
VCC3
R1044
1K
PCICLK5 <5>
PCIRST#2 <21,23,25,29,31>
C490
X_102P
B B
VCC3
A A
5
INTF# <12,17>
PGNT#4 <11>
PREQ#4 <11,17>
SECOND <28>
PPDIAGN <28 >
SPDIAGN <28 >
10_0805
L30
10U/16V/S
C495
C491
104P
R1046 X_0
MS-9134
VCC3
C489
104P
VCC3
C492
104P
R1045
100
C485
104P
C493
104P
1
C486
104P
C494
104P
JIDE2_1-2
YJUMPER-MG
JIDE2
1
2
3
YJ203
27 35
0A
Page 28
5
RN102
PHD3
PHD12
PHD15
1 2
3 4
5 6
7 8
R_PHD3
R_PHD12
R_PHD15
8P4R-33
RN109
RN112
R_PHD5 PHD5
R_PHD10
R_PHD4
R_PHD11
RPHIOW#
RPHIOR# PHIOR#
RPHDA0
PHD10
D D
PHD4
PHD11
1 2
3 4
5 6
7 8
8P4R-33
PHD0 R_PHD0
PHIOW# <27>
PHIOR# <27>
PHIOW#
PHDA0
1 2
3 4
5 6
7 8
8P4R-33
PHD2 R_PHD2
PHD13 R_PHD13
PHD1 R_PHD1
PHD14 R_PHD14
PHD7 R_PHD7
PHD8 R_PHD8
PHD6 R_PHD6
R1456 33
R1457 33
R1458 33
R1459 33
RN111
1 2
3 4
5 6
7 8
R_PHD9 PHD9
8P4R-33
PHDA1
PHDA2
C C
PHCS1# <27>
PHCS0# <27>
PDMACK# <27>
PHCS1#
PDMACK# RPDMACK#
R1455 1K
B B
RN100
1 2
3 4
5 6
7 8
8P4R-33
R1054
22
R_PHD7
RPHDA1
RPHDA2
RPHCS1#
RPHCS0# PHCS0#
R_DRVRST#
R_PHD7 R_PHD8
R_PHD6 R_PHD9
R_PHD5 R_PHD10
R_PHD4 R_PHD11
R_PHD3 R_PHD12
R_PHD2 R_PHD13
R_PHD1 R_PHD14
R_PHD0 R_PHD15
RPDMARQ
RPHIOW#
RPHIOR#
R_PHIORDY
RPDMACK#
PIDEINT
RPHDA1
RPHDA0 RPHDA2
RPHCS0# RPHCS1#
D44
4
PDMARQ <27>
RAID3
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CYELLOW
C500
22P
R1048
22
R1051
PINTR#
PINTR# <27>
PDMARQ RPDMARQ
22
C502
22P
PHIORDY <27>
DRVRST# <27>
PHIORDY R_PHIORDY
DRVRST# R_DRVRST#
PPDIAGN
C758
102P
PIDEINT
VCC3
R1061
4.7K
R1063
22
R1058
33RST
C757
102P
PPDIAGN <27>
R1049
10K
R1053
5.6K
3
C501
22P
C503
22P
R1062
R1064
22
R1057
33RST
C755
102P
R1050
22
R1055
22
4.7K
SINTR#
SINTR# <27>
SDMARQ <27>
SDMARQ
SHIORDY RSHIORDY
SHIORDY <27>
SECOND
SECOND <27>
VCC3
2
SIDEINT
RSDMARQ
R_SECOND
R1052
10K
R1059
5.6K
1
SHD15 R_SHD15
SHD0 R_SHD0
SHCS1# <27>
RN104
1 2
3 4
5 6
7 8
RSHCS1# SHCS1#
8P4R-33
SHDA1
SHDA2
SHDA0
SHCS0#
SHCS0# <27>
SHD8 R_SHD8
SHD7 R_SHD7
SHD9 R_SHD9
SHD6 R_SHD6
SHD2 R_SHD2
SHD14 R_SHD14
SHD1 R_SHD1
SHIOR#
SHIOR# <27>
SHD10 R_SHD10
SHD5 R_SHD5
SHD11 R_SHD11
SHD4 R_SHD4
RN103
1 2
3 4
5 6
7 8
8P4R-33
RN107
1 2
3 4
5 6
7 8
8P4R-33
RN110
1 2
3 4
5 6
7 8
8P4R-33
RN105
1 2
3 4
5 6
7 8
RSHDA1
RSHDA2
RSHDA0
RSHCS0#
RSHIOR#
8P4R-33
SHD12
SHD3
SHIOW# <27>
SHIOW#
SHD13
RN113
1 2
3 4
5 6
7 8
R_SHD12
R_SHD3
RSHIOW#
R_SHD13
8P4R-33
R1056
SDMACK# RSDMACK#
22
R1454 1K
R_SHD7
R_SECOND
R_SHD7
R_SHD6
R_SHD5
R_SHD4
R_SHD3
R_SHD2
R_SHD1
R_SHD0
RSDMARQ
RSHIOW#
RSHIOR#
RSHIORDY
RSDMACK#
SIDEINT
RSHDA1
RSHDA0
RSHCS0#
RAID4
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CYELLOW
R_SHD8
R_SHD9
R_SHD10
R_SHD11
R_SHD12
R_SHD13
R_SHD14
R_SHD15
SPDIAGN
RSHDA2
RSHCS1#
C756
102P
SDMACK# <27>
SPDIAGN <27>
D45
1N4148S
R1065
100
IDE_LED <23,26>
A A
PHD[15..0] <27>
SHD[15..0] <27>
PHDA[2..0] <27>
SHDA[2..0] <27>
PHD[15..0]
SHD[15..0]
PHDA[2..0]
SHDA[2..0]
5
4
IDE_LED
1N4148S
3
Title
IDE RAID CONNECTOR
Size Document Number Rev
Custom
2
Date: Sheet
MS-9134
星期五, 十月
11, 2002
28 35
1
0A
of
Page 29
8
VCC3_SB
CB323
CB324
105P
105P
D D
VCC3_SB
C505
C506
C507
105P
105P
105P
VCC3_SB
C508
105P
C C
PREQ#1 <11,17>
PGNT#1 <11>
AD18
INT#[C]
B B
REQ#/GNT#[1]
A A
AD18
LAN1EN
ENABLE :1-2
DISABLE:2-3
PREQ#1
PGNT#1
SMBALRT_LAN <31,33>
SMBCLK_LAN <31,33>
SMBDATA_LAN <31,33>
8
R1310 X_0
R1082 2.7K
R1083 8.2K
VCC5_SB
AD[31..0] <11,17,24,25,27,31>
VCC3_SB
CAP
CLOSE TO
EEPROM
JLAN1_1-2
YJUMPER-MG
R1309
100
C_BE#[3..0] <11,17,24,25,27,31>
INTC# <11,17>
PERR# <11,17,24,31>
SERR# <11,17,24,31>
PREQ#1 <11,17>
PGNT#1 <11>
PCICLK2 <5>
PCIRST#2 <21,23,25,27,31>
LANPWROK <30>
PME# <11,17,24,31>
R1087
0
JLAN1
1
2
3
YJ203
C_BE#[3..0]
VCC5
VCC3_SB
FRAME# <11,17,24,25,27,31>
IRDY# <11,17,24,25,27,31>
TRDY# <11,17,24,25,27,31>
DEVSEL# <11,17,24,25,27,31>
STOP# <11,17,24,25,27,31>
PAR <11,17,24,25,27,31>
TP6
SMBALRT_LAN
SMBCLK_LAN
SMBDATA_LAN
7
R1074 62K
C504 104P
SMBALRT_LAN
SMBCLK_LAN
SMBDATA_LAN
7
20mil
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
INTC#
PERR#
SERR#
LAN1EN
PREQ#1
PGNT#1
PCICLK2
PCIRST#2
LANPWROK
PME#
R1086 X_5.6K
R1158 8.2K
R1161 8.2K
R1163 8.2K
G2
N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8
M4
L3
F3
C4
F2
F1
G3
H3
H1
J1
H2
J2
A2
A4
C3
J3
C2
G1
B9
A9
A6
C5
C8
B10
A10
C9
VCC3_SB
6
VCC3_SB
A3A7E1K3N6P2G5G6H5H6H7H8J5J6J7J8J9
U47
VIO
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE#0
C/BE#1
C/BE#2
C/BE#3
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
INTA#
PERR#
SERR#
IDSEL
REQ#
GNT#
M66EN
CLK
RST#
LAN_PWRGD
PME#
APM_WAKEUP
NC
SMBALRT#
SMBCLK
SMBDATA
6
VDDO
VDDO
VDDO
VDDO
VDDO
VSSPP1
VSSPP2
B3E2M6
VDDO
VSSPP3
VSSPP4
VSSPP5
N1
B7K2G14
DVDD
VSSPP6
5
DVDD
DVDD
DVDD
DVDD
VSS3
VSS4
VSS5
AVDDL
D11E4E5E6E7E8E9
1.5LVSB
K10
K11L4L5L9L10
DVDD
DVDD
DVDD
VSS7
VSS8
VSS9
DVDD
VSS10
1.5LVSB
J10
J11K4K5K6K7K8K9
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
VDDO
VSS1
VSSPL1
VSSPL2
VSSPL3
VSSPL4
K12
N12
P8
VSS2
D4D5D6D7D8
2.5LVSB
5
E12
DVDD
DVDD
DVDD
VSS11
VSS12
VSS13
E10
E11F4F5F6F7F8F9
4
A11
K13N8P12
DVDD
VDDO
VDDO
DVDD
VSS15
VSS16
VSS17
4
ZPCOMP
ZNCOMP ZPCOMP
P14
G13
NC9
DVDD
VDDO
VDDO
NC8
NC7
ZN_COMP
ZP_COMP
NC4
2.5LVSB
A14D9D10G4H4J4P1
AVDDL
A1
NC1
NC2
LINK100#
JTAG_TDI
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_RST#
JTAG_TCK
AUX_PWR
CLK_VIEW
LINK1000#
82540EM
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
DVDD
VSS31
VSS32
VSS33
F10
F11G7G8G9G10
G11H9H10
H11L6L11
C10
3
LINK#
ACT#
MDI0+
MDI0-
MDI1+
MDI1-
FL_SO
EE_SK
EE_DO
EE_DI
FL_SI
SDP7
SDP1
SDP0
XTAL1
XTAL2
MDI3+
MDI3-
AVDDL
MDI2+
MDI2-
EE_CS
FL_SCK
FL_CE#
TEST
GND
GND
AVDDL
REF
CTRL25
CTRL15
82540
1.5LVSB
3
2
VCC3_SB VCC3_SB VCC3_SB
ZNCOMP
1LINKLED
A12
1ACTLED
C11
1SPEED100
B11
1MDI0P
C13
1MDI0N
C14
1MDI1P
E13
1MDI1N
E14
P9
1ESK
M10
1EDO
N10
1EDI
P10
M11
M12
N13
P13
N14
M13
M14
L12
L13
L14
K14
J12
J13
NC
J14
H12
NC
1MDI3P
H13
1MDI3N
H14
G12
F12
NC
1MDI2P
F13
1MDI2N
F14
1ECS
P7
N9
M8
M9
A13
D13
D14
NC
D12
NC
NC
NC
B12
C12
L7
L8
B14
B13
N11
P11
1SPEED1G
R1072 33.2RST
R1073 53.6RST
1MDI0P <30>
1MDI0N <30>
1MDI1P <30>
1MDI1N <30>
R1460 3.3K
LAN1_X1
R1080 3K
LAN1_X2
1MDI3P <30>
1MDI3N <30>
1MDI2P <30>
1MDI2N <30>
R1084 3.3K
1SPEED1G <30>
2.5LVSB
R1088 2.49KST
CTRL_25 <30>
CTRL_15 <30>
Title
Document Number
1LINKLED <30>
1ACTLED <30>
1SPEED100 <30>
1EDO
1EDI
1ESK
1ECS
VCC3_SB
2.5LVSB
U50
4 5
DO GND
3
DI
2
SK
1
CS
93C66
Micro Star Restricted Secret
LAN 82540 1 1/2
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
1.5LVSB
2.5LVSB
Last Revision Date:
Sheet
ORG
NC
VCC
LAN1_X1
LAN1_X2
C509
22P
星期五, 十月
1
1.5LVSB <30>
2.5LVSB <30>
VCC3_SB
6
7
8
Y1
25MHZ
C510
22P
11, 2002
of
29 35
1
R1075
4.7K
VCC3_SB
1 2
Rev
0A
Page 30
8
103P
C511
R1095
D D
1MDI0P <29>
1MDI0N <29>
1MDI1P <29>
1MDI1N <29>
1MDI2P <29>
1MDI2N <29>
1MDI3P <29>
1MDI3N <29>
C C
GLED
1
7 3
654 2
11
49.9RST
1MDI0P
1MDI0N
1MDI1P
1MDI1N
1MDI2P
1MDI2N
1MDI3P
1MDI3N
R1103
49.9RST
YLED
COMMON MODE FILTER
COMPONENT NEAR CHIP
16
8
12 10 9
Top View
VCC3_SB
B B
R1117
5.1K
CTRL_25
CTRL_25 <29>
2.5LVSB <29>
A A
8
1
R1096
49.9RST
R1104
49.9RST
103P
C513
3 2
VR1
PNP-BCP69-S-SOT223
4
C526
C525
104P
106P/1206
7
49.9RST
49.9RST
7
R1097
R1105
2.5LVSB
C522
104P
6
103P
C512
DIFFERENTIAL PAIR TO
PAIR MORE THAN 30
MILS
R1098
49.9RST
R1106
49.9RST
103P
C514
C527
105P
C528
105P
2.5LVSB
C516
105P
CTRL_15 <29>
6
C517
105P
CTRL_15
5
1
2
3
4
5
6
7
8
9
10
11
12 13
C518
105P
R1118
5.1K
1
R1121
30.1KST
C532
106P/1206
5
TF1
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4- MX4-
H5007
MCT1
MX1+
MX1-
MCT2
MX2+
MX2-
MCT3
MX3+
MX3-
MCT4
MX4+
24
23
22
21
20
19
18
17
16
15
14
L05-0500080-P21
L1CGND
C763
C764
103P
103P
VCC3_SB VCC3_SB
R1115 1/1206
C523
C524
106P/1206
3 2
VR2
PNP-BCP69-S-SOT223
4
C533
106P/1206
1.5LVSB
C529
105P
105P
1.5LVSB
C534
106P/1206
103P C519
C530
105P
2T0P
2T0N
2T1P
2T1N
2T2P
2T2N
2T3P
2T3N
C765
103P
L1GND
4
C766
103P
C531
105P
4
R1107
75
R1108
75
C767
103P
C536
105P
R1109
75
C768
X_103P
1.5LVSB <29>
R1110
75
1.5LVSB
CB325
X_105P/0805
3
2T0P
2T0N
2T1P
2T2P
2T2N
2T1N
2T3P
2T3N
L1CGND
R1113 330
CB326
X_105P/0805
3
R1116
680
LAN1
15
1
2
3
4
5
6
7
8 9
16
RJ45/LEDx2
1ACTLED
2
2N3904S
C521
105P
2
12
11
10
U51A
14 7
1 2
74LVC07AD-SOIC14
VCC3_SB
R1111
1K
Q102
2
Q103
2N3904S
1 3
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
1ACTLEDCAP
R1094 300
CAP
1LINKLED
R1099 300
R1100 300
1SPEED100
1SPEED1G
JACT1
X_YJ102
1
1ACTLED
1ACTLED <29>
1LINKLED <29>
VCC3_SB
1SPEED100 <29>
1SPEED1G <29>
VCC3_SB
2
C779
X_102p
R1102
300
1ACTLEDCAP 1LINKLED
C780
X_102p
FOR
EMI
VCC3_SB
R1112
10K
1 3
Micro Star Restricted Secret
1SPEED100 1SPEED1G
C781
X_102p
LANPWROK
C520
104P
LANPWROK <29>
LAN 82540 1 - 2/2
Last Revision Date:
星期五, 十月
Sheet
C782
X_102p
11, 2002
30 35
1
Rev
0A
of
1
Page 31
8
VCC3_SB
CB334
105P
D D
VCC3_SB
C614
C615
C616
105P
105P
105P
VCC5_SB
AD[31..0] <11,17,24,25,27,29>
VCC3_SB
CAP
CLOSE TO
EEPROM
JLAN2_1-2
YJUMPER-MG
C C
PREQ#2
PGNT#2
8
R1349 X_0
R1348
100
C_BE#[3..0] <11,17,24,25,27,29>
R1353 2.7K
R1354 8.2K
R1358
0
VCC3_SB
SMBALRT_LAN <29,33>
SMBCLK_LAN <29,33>
SMBDATA_LAN <29,33>
INTD# <11,17>
PERR# <11,17,24,29>
SERR# <11,17,24,29>
PREQ#2 <11,17>
PGNT#2 <11>
PCICLK3 <5>
PCIRST#2 <21,23,25,27,29>
LANPWROKS <32>
PME# <11,17,24,29>
AD19
LAN2EN
ENABLE :1-2
DISABLE:2-3
PREQ#2 <11,17>
PGNT#2 <11>
AD20
INT#[F]
B B
REQ#/GNT#[3]
A A
7
JLAN2
1
2
3
YJ203
C_BE#[3..0]
VCC5
VCC3
FRAME# <11,17,24,25,27,29>
IRDY# <11,17,24,25,27,29>
TRDY# <11,17,24,25,27,29>
DEVSEL# <11,17,24,25,27,29>
STOP# <11,17,24,25,27,29>
PAR <11,17,24,25,27,29>
TP5
R1401 8.2K
R1402 8.2K
R1403 8.2K
R1404 X_0
R1405 X_0
R1406 X_0
7
20mil
R1346 62K
C613 104P
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
INTD#
PERR#
SERR#
LAN2EN
PREQ#2
PGNT#2
PCICLK3
PCIRST#2
LANPWROKS
PME#
R1357 X_5.6K
B10
A10
G2
N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8
M4
L3
F3
C4
F2
F1
G3
H3
H1
J1
H2
J2
A2
A4
C3
J3
C2
G1
B9
A9
A6
C5
C8
C9
6
VCC3_SB
A3A7E1K3N6P2G5G6H5H6H7H8J5J6J7J8J9
U61
VIO
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE#0
C/BE#1
C/BE#2
C/BE#3
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
INTA#
PERR#
SERR#
IDSEL
REQ#
GNT#
M66EN
CLK
RST#
LAN_PWRGD
PME#
APM_WAKEUP
NC
SMBALRT#
SMBCLK
SMBDATA
6
VDDO
VDDO
VDDO
VDDO
VDDO
VSSPP1
VSSPP2
B3E2M6
VDDO
VSSPP3
VSSPP4
VSSPP5
N1
B7K2G14
DVDD
VSSPP6
DVDD
DVDD
DVDD
VSSPL1
1.5LVSBS
DVDD
DVDD
DVDD
VSSPL2
VSSPL3
VSSPL4
K12
N12
P8
DVDD
DVDD
5
DVDD
DVDD
2.5LVSBS
5
J10
J11K4K5K6K7K8K9
DVDD
DVDD
DVDD
DVDD
VDDO
VSS1
VSS2
VSS3
VSS4
D4D5D6D7D8
K10
K11L4L5L9L10
DVDD
DVDD
DVDD
DVDD
DVDD
VSS5
AVDDL
VSS7
VSS8
VSS9
D11E4E5E6E7E8E9
DVDD
DVDD
VSS10
VSS11
VCC3_SB
A11
E12
DVDD
DVDD
DVDD
VSS12
VSS13
DVDD
VSS15
E10
E11F4F5F6F7F8F9
4
K13N8P12
G13
DVDD
VDDO
VDDO
VDDO
VDDO
82540EM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
F10
F11G7G8G9G10
4
VSS22
VSS23
ZPCOMPS
ZNCOMPS
P14
NC8
NC9
VSS24
VSS25
VSS26
NC7
ZN_COMP
VSS27
VSS28
G11H9H10
NC4
ZP_COMP
VSS29
DVDD
H11L6L11
2.5LVSBS 1.5LVSBS
A1
A14D9D10G4H4J4P1
NC1
NC2
AVDDL
LINK100#
JTAG_TDI
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_RST#
JTAG_TCK
AUX_PWR
FL_SCK
CLK_VIEW
FL_CE#
LINK1000#
CTRL25
CTRL15
VSS31
VSS32
VSS33
C10
1.5LVSBS
3
LINK#
ACT#
MDI0+
MDI0-
MDI1+
MDI1-
FL_SO
EE_SK
EE_DO
EE_DI
FL_SI
SDP7
SDP1
SDP0
XTAL1
XTAL2
MDI3+
MDI3-
AVDDL
MDI2+
MDI2-
EE_CS
TEST
GND
GND
AVDDL
REF
82540
3
2
VCC3_SB VCC3_SB
ZNCOMPS
ZPCOMPS
1LINKLEDS
A12
1ACTLEDS
C11
1SPEED100S
B11
1MDI0PS
C13
1MDI0NS
C14
1MDI1PS
E13
1MDI1NS
E14
P9
1ESKS
M10
1EDOS
N10
1EDIS
P10
M11
M12
N13
P13
N14
M13
M14
L12
L13
L14
K14
J12
J13
NC
J14
H12
NC
1MDI3PS
H13
1MDI3NS
H14
G12
F12
NC
1MDI2PS
F13
1MDI2NS
F14
1ECSS
P7
N9
M8
M9
A13
D13
D14
NC
D12
NC
NC
NC
B12
C12
L7
L8
B14
B13
N11
P11
1SPEED1GS
1MDI0PS <32>
1MDI0NS <32>
1MDI1PS <32>
1MDI1NS <32>
R1461 3K
LAN1_X1S
LAN1_X2S
1MDI3PS <32>
1MDI3NS <32>
1MDI2PS <32>
1MDI2NS <32>
2.5LVSBS
R1359 2.49KST
CTRL_25S <32>
CTRL_15S <32>
R1344 33.2RST
R1345 53.6RST
1LINKLEDS <32>
1ACTLEDS <32>
1SPEED100S <32>
1EDOS
1EDIS
1ESKS
1ECSS
VCC3_SB
R1351 3K
2.5LVSBS
R1355 3.3K
1SPEED1GS <32>
Title
Document Number
Micro Star Restricted Secret
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
1.5LVSBS
2.5LVSBS
U60
4 5
DO GND
3
DI
2
SK
1
CS
93C66
LAN 82540 1 1/2
Last Revision Date:
Sheet
ORG
NC
VCC
LAN1_X1S
LAN1_X2S
C618
22P
星期五, 十月
1
1.5LVSBS <32>
2.5LVSBS <32>
VCC3_SB
6
7
8
Y4
25MHZ
C619
22P
11, 2002
of
31 35
1
R1347
4.7K
VCC3_SB
1 2
Rev
0A
Page 32
8
103P
C620
R1366
D D
1MDI3PS <31>
1MDI3NS <31>
1MDI2PS <31>
1MDI2NS <31>
1MDI1PS <31>
1MDI1NS <31>
1MDI0PS <31>
1MDI0NS <31>
C C
GLED
1
7 3
654 2
11
49.9RST
1MDI3PS
1MDI3NS
1MDI2PS
1MDI2NS
1MDI1PS
1MDI1NS
1MDI0PS
1MDI0NS
R1374
49.9RST
YLED
COMMON MODE FILTER
COMPONENT NEAR CHIP
16
8
12 10 9
Top View
VCC3_SB
B B
R1388
5.1K
CTRL_25S
CTRL_25S <31>
2.5LVSBS <31>
A A
8
1
R1367
49.9RST
R1375
49.9RST
103P
C622
3 2
VR3
PNP-BCP69-S-SOT223
4
C634
C635
106P/1206
104P
7
49.9RST
49.9RST
7
R1368
R1376
2.5LVSBS
C631
104P
6
103P
C621
DIFFERENTIAL PAIR TO
PAIR MORE THAN 30
MILS
R1369
49.9RST
R1377
49.9RST
103P
C623
C636
105P
2.5LVSBS
C637
105P
C625
C624
105P
105P
CTRL_15S <31>
6
C626
105P
CTRL_15S
5
1
2
3
4
5
6
7
8
9
10
11
12 13
C627
105P
R1389
5.1K
1
R1392
30.1KST
C641
106P/1206
5
TF2
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4- MX4-
H5007
MCT1
MX1+
MX1-
MCT2
MX2+
MX2-
MCT3
MX3+
MX3-
MCT4
MX4+
24
23
22
21
20
19
18
17
16
15
14
L05-0500080-P21
103P C628
L2CGND
C771
103P
VCC3_SB VCC3_SB
R1386 1/1206
C632
C633
106P/1206
3 2
VR4
PNP-BCP69-S-SOT223
4
C642
106P/1206
1.5LVSBS
C638
105P
105P
1.5LVSBS
C643
106P/1206
C773
103P
2T3PS
2T3NS
2T2PS
2T2NS
2T1PS
2T1NS
2T0PS
2T0NS
L2GND
C770
103P
4
C640
105P
C644
105P
4
R1378
75
C769
103P
R1379
75
R1380
R1381
75
75
C774
X_103P
1.5LVSBS <31>
CB336
X_105P/0805
C772
103P
1.5LVSBS
3
2T0PS
2T0NS
2T1PS
2T2PS
2T2NS
2T1NS
2T3PS
2T3NS
L2CGND
R1384 330
CB337
X_105P/0805
3
1ACTLEDS
R1387
680
LAN2
15
1
2
3
4
5
6
7
8 9
16
RJ45/LEDx2
2
1ACTLEDSCAP
R1365 300
12
11
10
U51D
14 7
9 8
74LVC07AD-SOIC14
VCC3_SB VCC3_SB
R1382
1K
2
Q121
2
2N3904S
C630
105P
2N3904S
1 3
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
1
1ACTLEDS
1LINKLEDS
R1370 300
R1371 300
1SPEED100S
1SPEED1GS
JACT2
X_YJ102
CAP
1ACTLEDS <31>
1LINKLEDS <31>
VCC3_SB
1SPEED100S <31>
1SPEED1GS <31>
VCC3_SB
1
2
R1373
300
1ACTLEDSCAP 1LINKLEDS
C783
X_102p
C784
X_102p
FOR
EMI
C785
X_102p
R1383
10K
Q120
LANPWROKS
1 3
C629
104P
Micro Star Restricted Secret
LAN 82540 1 - 2/2
Last Revision Date:
星期五, 十月
Sheet
C786
X_102p
LANPWROKS <31>
11, 2002
32 35
of
1
1SPEED1GS 1SPEED100S
Rev
0A
Page 33
5
VCC3_SB
R1147 X_4.7K
R1148 X_4.7K
R1150 0
R1151 0
BLED1
BLEDC1
BLED2
BLEDC2
R1153 0
R1154 0
R1177 0
R1157 X_0
R1160 0
R1162 0
R1164 0
R1166 0
SMBCLK
SMBDATA
SMBCLK_LAN
SMBDATA_LAN
SMBCLK
SMBDATA
SMBALERT#
PWR_OK
R1169 0
R1170 0 R1269
R1172 X_0
R1173 X_0
RN119
1 2
3 4
5 6
7 8
LED1
LEDC1
LED2
LEDC2
SMLINK0
SMLINK1
SDONE
SBO#
SMLINK0 <12>
SMLINK1 <12>
D D
SMBCLK <12,23>
SMBDATA <12,23>
SDONE <17>
SBO# <17>
C C
8P4R-330
SMBCLK_BMC
SMBDATA_BMC
EXTSMI# <12,23>
PWR_OK <21,23>
SMBALERT#
SMBCLK_LAN
SMBDATA_LAN
SMBALRT_LAN
SMBCLK_HM
SMBDATA_HM
PWRSW
BMCRSTIN#
R1034 X_0
R1178 0
BMC_NMI#
EXTSMI#
PWR_OK
BMCPTOUT1
BMCRSTOUT#
R1186 0
R1409 0
R1187 0
LED1
LEDC1
LED2
LEDC2
SMBALERT# <12>
SMBCLK_LAN <29,31>
SMBDATA_LAN <29,31>
SMBALRT_LAN <29,31>
SMBCLK_HM <13>
SMBDATA_HM <13>
PWRSW <23>
BMCRSTIN# <23>
BMCPTOUT <23>
B B
FP_RST# <12,21,23>
5V_BMC
R1190
J3
1
2
X_YJ102
A A
NEAR FRONT PANEL
R1192
22
COMBINE TO JPF1
5
10K
103P
C552
EXTSMI#
JGS1
1
2
D1x2
SMBCLK_BMC
SMBDATA_BMC
SMBALRT_LAN
SMBCLK_LAN
SMBDATA_LAN
SMBCLK_HM
SMBDATA_HM
U54
3
SCLH
8
SCLH
2
SDAH
7
SDAH
48
SMBAH#
12
SCLN
11
SDAN
16
SMBAN#
4
SCLP
5
SDAP
35
PWBTIN#
36
RSTIN#
39
PWBTOUT#
40
RSTOUT#
41
LED1
42
LEDC1
45
LED2
46
LEDC2
38
NMI#
37
SMI#
18
PWRGD
21
DEIO1
22
DEIO2
24
DEIO3
25
DEIO4
13
TXD
14
RXD
X_NS87431
4
R1165 8.2K
R1167 8.2K
VCC5_SB 5V_BMC
R1175
0/0805
15
FANIN1
17
FANIN2
47
FANOUT1
44
FANOUT2
43
FANOUT3
19
ADCH1
20
ADCH2
23
ADCH5
26
ADCH8
33
ADCH9
34
ADCH10
10
CKI
9
CKO
6
TRIS
27
GND
32
VCC
28
AGND
31
AVCC
1
RESET#
Y3
1 2
10M-16PF
C553
15P
4
RTCX4 RTCX3
C554
15P
RTCX3
RTCX4
BMC_EN
BMCRST#
VCC3_SB
R1188 0
R1189 0
R1191
4.7K
5V_BMC
1 2
+
PWR_OK <21,23>
ICH_NMI <11>
D46
1N4148S
EC11
47U/16V/S
SMBCLK
SMBDATA
3
BMC_NMI#
ICH_NMI
3
PWR_OK
CB338
33pF
R1398
4.7K
JIPMB1
3
2
1
X_1X3-IPMB
4.7K
BMC_EN
R1394
10K
Q123
2
2N3904S
R1268
10K
5V_BMC
74AHC1G14S
1 3
5V_BMC
5V_BMC
R1400
10K
G
Q107
3904
5 3
2 4
JBMC1_1-2
YJUMPER-MG
JBMC1
1
2
3
YJ103
2
+12V
R1152
3.3K
R1159
10K
D S
Q105
2N7002S
U62
74LVC07AD-SOIC14
R1408 X_0
2
G
G
VCC3_SB VCC5_SB
14 7
3 4
1
VCC3_SB
R1149
4.7K
SMBCLK
SMBCLK <12,23>
VCC3
D S
Q104
2N7002S
R1155
X_0
SMBCLK_VCC
R1156
4.7K
SMBCLK_VCC <5,14,21>
VCC3_SB
R1171
4.7K
D S
Q106
2N7002S
SMBDATA
VCC3
R1174
X_0
SMBDATA <12,23>
R1176
4.7K
SMBDATA_VCC
SMBDATA_VCC <5,14,21>
VCCP
U51B
R1407 0
R1393
4.7K
NMI
BLEDC1
BLEDC2
NMI <6>
LED5
LED-G-R
LED6
LED-G-R
G
3 4
R
2 1
G
3 4
R
2 1
MICRO_STAR
Title
MS-9134
Size Document Number Rev
B
BMC
星期五, 十月
Date: Sheet
11, 2002
1
33 35
BLED1
BLED2
0A
of
Page 34
5
4
3
2
1
IDEX2
HDRST
MCH-G
HOST
CPURST
D D
PCIRST#1
FPRESET BMCRESET
C C
BMCRST
FPRST
MS5
SIO
FWH
PCI
IDERAID1
IDERAID2
DRVRST
RAIDX2
RAIDX2
DRVRST
B B
PCIRST#2
GIGALAN
GIGALAN2
PCIRST#
A A
5
4
3
ICH
Title
Size Document Number Rev
Date: Sheet of
MS-9134
<Doc> 0A
A
星期五, 十月
2
11, 2002
34 35
1
Page 35
8
7
6
5
4
3
2
1
Power Delivery Map
ATX P/S
with 1A Stby current
5VSB
D D
C C
B B
A A
+/-5%
5V 3.3V 12V -12V
+/-5% +/-5% +/-5% +/-10%
2.5V regulato r
VID voltage
regulator
VRM 9.1
1.5V regulator
3.3V Standby
regulator
VCCP
VDDQ
VCC_DDR
1.25V regulator
1.5V Standby
regulator
PCI Slot (per slot)
5V
3.3V
12V
3.3Vaux
-12V
8
7
6
5
5.0A
7.6A
0.5A
0.375A
0.1A
4
Processor
VCCVID
1.2V
30mA
VccCORE/Vtt
1.15V-1.75V
60A
Memory
VCC_DDR
2.5V
5.92A
Vtt
1.25V
2.1A
USB
Vdd
2.0A
BG GMCH
VccCORE
1.5V
2.46A
VccAGP
1.5V
370mA
VccHI
1.5V
90mA
VttFSB
1.15V-1.75V
2.4A
VccSM
2.5V
2.8A
VccGPIO
3.3V
30mA
Vcca_DAC
1.5V
65mA
ICH4
VccCORE
1.5V
970mA
VccHI
1.5V
90mA
Vccsus1_5
1.5V
85mA
V_CPU_IO
1.15V-1.75V
45mA
Vcc3_3
3.3V
610mA
Vccsus3_3
3.3V
70mA
CK-408
Vcc
3.3V
280mA
LPC Super I/O
Vdd
5V
25mA
FWH
Vdd
5V
3.3V
67mA
3
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Power Delivery Map
MS-6526
2
11, 2002
35 35
1
300