Page 1
5
4
3
2
1
Title
Cover Sheet
MS-9130 VER:100 ATX
D D
*Dual AMD PGA940 K8-Processor
(DDR 333)
*VIA K8T400M / VT8237 Chipset
(AGP 8X / VLink 8X)
*Winbond 83627HF LPC I/O
*BCM 5705 Giga/100/10 Bit LAN Support
*USB 2.0 support (integrated into VT8237)
Block Diagram
GPIO SPEC
Clock Synthesizer
AMD K8 -> CPU 0
System Memory
DDR DIMM 1 & 2 & 3 & 4
DDR Terminations R & C
AMD K8 -> CPU 1
NB VIA K8T400M/VER:0.4 (HT)
K8 Vcore
AGP PRO SLOT 8X
VT8237
C C
*ALC201A S/W Audio
*DDR DIMM * 4
PCI Connectors * 4
AC'97 S/W Audio
IDE ATA 66/100 Connectors * 2
Front USB Port *2
*AGP PRO SLOT * 1 ( 8X )
*PCI SLOT * 4
Rear USB Port *2
LPC I/O W83627HF & Floppy
Hardware monitor & FAN
BIOS ROM & VCORE ADJUSTING
Keyboard/Mouse Connectors
LPT/COM Port
Giga-Bit LAN BCM5705
B B
Giga-Bit LAN-RJ45
ACPI Power CONTROLLER (MS-6)
SYSTEM VOLTAGE REGULATOR
Front Panel & POWER OK CIRCUIT
Decoupling Cap.
OPTION PARTS
Page
1
2
3
4
5,6,7,8
9,10
11
12,13,14,15
16,17,18
19
20
21,22,23
24,25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
A A
Micro Star Restricted Secret
MS9130-100
5
4
3
2
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
Cover Sheet
MS-9130
Last Revision Date:
Sheet
Thursday, July 17, 2003
1 41
of
Rev
100
Page 2
5
Block Diagram
4
3
2
1
D D
AMD K8 Socket 940
HT
AMD K8 Socket 940
DDR333
CPU 0 CPU 1
HT
A
G
AGP 8X /Fast Write
C C
4 PCI Slots
P
S
L
O
T
PCI-33
B B
AC97 => S/W Audio
ALC202A / 2 channel
AC97
VIA
K8T400M
VLINK
VT8237
Dual ATA
100/133
LPC BUS
IDE Slot
==>ATA66,100,133 *2
DDR * 4
USB
SUPER I/O
Giga Bit LAN
BCM5705
A A
5
4
SERIAL ATA *2
3
USB
Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports
==> Front-Port *4 ,
Back-Port *2
W83627HF
2
FWH
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
Block Diagram
MS-9130
Last Revision Date:
Sheet
Thursday, July 17, 2003
2 41
of
Rev
100
Page 3
AD22
5
GPIO FUNCTION
4
3
2
1
PIN NAME
D D
GPO0 (VSUS33)
GPO1/SUSA#(VSUS33)
GPO2/SUSB#(VSUS33)
GPO3/SUSST1#(VSUS33)
GPO4/SUSCLK(VSUS33)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/SLP#
GPO8/GPI8/IPBIN0
GPO9/GPI9/IPBIN1
C C
GPO10/GPI10/IPBRDFR
GPO11/GPI11/IPBRDCK
GPO12/GPI12/INTE#
GPO13/GPI13/INTF#
GPO14/GPI14/INTG#
GPO15/GPI15/INTH#
GPO16/SA16/STRAP
GPO17/SA17/STRAP
GPO18/SA18/STRAP
GPO19/SA19/STRAP
B B
GPO20/GPI20
/ACSDIN2/PCS0#/EI
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/IOR#
GPO23/GPI23/DPSLP
GPO24/GPI24/GPIOA
GPO25/GPI25/GPIOC
GPO26/GPI26/SMBDT2
(VSUS33)
GPO27/GPI27/SMBCK2
(VSUS33)
GPO28/GPI28/
VIDSEL
GPO29/GPI29/
A A
VRDSLP
GPO30/GPI30/GPIOD
GPO31/GPI31/GPIOE
5
Function define
NA
NA
SUSB#
SUSST#
(Exteranl Pull up to 3VDUAL)
NA
(Exteranl Pull up to VCC3)
NA
(Exteranl Pull up to VCC3)
NA
LDTSTOP#
NA
NA
NA
NA
NA
NA
NA
NA
LDT Freq Strapping Bit0
LDT Freq Strapping Bit1
LDT Width (Low=8 Bit)
Fast Command (Low=Disable)
POWERF1
POWERF2
NA
ROMLOCK
NA
NA
SMBDATA2/Slave SMBUS
SMBCLK2/Slave SMBUS
NA
NA
NA
NA
4
VT8237 GPIO Function Define
PIN NAME Function define
GPI0
GPI1
NA
(Exteranl Pull up to VBAT)
ATADET0=>Detect IDE1 ATA100/66
GPI2/EXTSMI# EXTSMI#
GPI3/RING# RING#
GPI4/LID#
GPI5/BATLOW#
ATADET1=>Detect IDE2 ATA100/66
(Exteranl Pull up to 3VDUAL)
NA
POWERF3 GPI6/AGPBZ#
NA
GPI7/REQ#5
GPI16/INTRUDER#
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/IORDY
(Exteranl Pull up to 3VDUAL)
(Exteranl Pull up to VBAT)
NA
(Exteranl Pull up to 3VDUAL)
NA
THRM#
NA
(Exteranl Pull up to VCC3)
PCI Routing
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
Giga-Bit
LAN
INT#
INT#A
INT#B
INT#C
INT#D
INT#B
INT#C
INT#D PGNT#1
INT#A
INT#C
INT#D
INT#A
INT#B
INT#D
INT#A
INT#B
INT#C
INT#A
3
IDSEL
AD16
AD17
AD18
AD19
AD22
REQ#/GNT#
PREQ#0
PGNT#0
PREQ#1
PREQ#2
PGNT#2
PREQ#3
PGNT#3
PREQ#4
PGNT#4
CLOCK
PCICLK1
PCICLK2
PCICLK3
PCICLK4
GLAN_PCLK
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
GPIO Spec.
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
3 41
1
Rev
100
of
Page 4
5
4
3
2
1
Clock Synthesizer
CN13
7 8
5 6
3 4
1 2
8P4C-10P
C256 X_10P
C257 X_10P
C258 X_10P
C259 X_10P
CN14
7 8
5 6
3 4
1 2
X_8P4C-10P
X_8P4C-10P
1 2
3 4
5 6
7 8
CN15
CPUCLK1_H
CPUCLK1_L
Near CK-Gen in 0.5" .
CPUCLK0_H
CPUCLK0_L
C268 104P
VCLK
GCLK_NB
GCLK_SLOT
USBCLK_SB
SIO48M
SB_OSC14
APICCLK
PCICLK1
PCICLK2
PCICLK3
PCICLK4
FWH_PCI
SBPCLK
GLAN_PCLK
SIOPCLK
C624 X_5P/X7R
C625 X_5P/X7R
C266 X_5P/X7R
C267 X_5P/X7R
U20
ICS950403
46
VDD_46
9
VDD_9
16
VDD_16
19
VDD_19
38
VDD_38
35
VDD_35
10
VSS_10
47
VSS_47
15
VSS_15
20
VSS_20
34
VSS_34
39
VSS_39
32
PD#
2
VDD_2
29
VDD_29
43
VDDA
5
VSS_5
27
VSS_27
30
VSS_30
33
VSSF
42
VSSA
Only support in ICS950402
CLK_RESET# 39
CLKVCC3
FS0/REF0
FS1/REF1
FS2/REF2
XIN
XOUT
48MHZ
ModeAHTT66_0
ModeBHTT66_1
HT66_2
PCI33_9_HT66_3
PCI33_10
PCI33_0
PCI33_1
PCI33_2
PCI33_3
PCISTOP_PCI33_6
PCI33_F
PCI33_5
PCI33_4
24_48MHZ/SEL
SDATA
SCLK
CPUT_0
CPUC_0
CPUT_1
CPUC_1
SPREAD
FS0
1
FS1
48
FS2
45
CLKX1
3
CLKX2
4
31
MODEA
6
MODEB
7
8
R_PCICLK9
11
R_PCICLK10
12
R_PCICLK0
13
R_PCICLK1
14
R_PCICLK2
17
R_PCICLK3
18
R_PCICLK6 FWH_PCI
24
R_PCICLKF
23
R_PCICLK5
22
R_PCICLK4
21
SEL_24
28
SMBDATA1
26
SMBCLK1
25
41
40
37
36
44
ModeA,B=0:0 ( Set Pin 7,8 clock
-> 66 MHz Pin11->33Mhz )
"24_48MHZ/SEL" Freq.-Out select pin
=> Low->48MHz , Hi->24MHz .
( Internal pull-up via 100K ohm )
RN52 8P4R-22
RN53 8P4R-22
R_CPU_CLK
-R_CPU_CLK
MODEB
MODEA
SEL_24
R267 22
R268 22
R269 33
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
R271 33
R274 15RST
R275 15RST
R277 10K
R280 10K
R282 10K
X2 14.318MHZ
C255 10P
RN51
8P4R-22
R272 15RST
R273 15RST
SB_OSC14
APICCLK
SBPCLK
GLAN_PCLK
SIOPCLK
SB_OSC14 22
APICCLK 23
USBCLK_SB 48MHZ
VCLK
GCLK_NB
GCLK_SLOT
PCICLK1
PCICLK2
PCICLK3
PCICLK4
SIO48M
SMBDATA1 9,10,22,24,25,35,37
SMBCLK1 9,10,22,24,25,35,37
CPUCLK0_H 6
CPUCLK0_L 6
CPUCLK1_H 13
CPUCLK1_L 13
USBCLK_SB 21
VCLK 23
GCLK_NB 17
GCLK_SLOT 20
PCICLK1 24
PCICLK2 24
PCICLK3 25
PCICLK4 25
FWH_PCI 32
SBPCLK 23
GLAN_PCLK 35
SIOPCLK 30
SIO48M 30
VCC3
Decoupling Cap for CPU Clock
C248
X_104P
4.7u/0805
C262
CLKVCC3
C252
X_104P
CLKVDDA
C249
104P
C253
104P
CLKVCC3
C263
104P
C250
X_104P
C264
X_104P
C254
104P
R270 X_10K
C265
X_104P
D D
C C
VCC3
C245
104P C251 10P
C246
104P
FB10 X_120S/0805
CP22
X_COPPER
VCC3
C260
X_104P
C261
X_104P
VCC3
C247
4.7u/0805
FB11 X_120S/0805
CP23
X_COPPER
ICS950402
Strapping CPU
FS0 FS2 FS3
0 0 0 0
FS1
0 0 0
B B
0 0 0
0 0
0 0 0
0 0
0 0
0
***
1
1 1
1 1
1 1 1
1 1
1 1 1
1
1 1
1
1 1
1 1
1 1 1
0 0 0
0 0
0 0
0
0 0
0
1 1 1
1 1 1 1
100.90
1
133.90
168.00
202.00
100.20
133.50
166.70
200.40
150.00
180.00
210.00
240.00
270.00
233.33
0
266.67
300.00
MHz
HTT
PCI
MHz
MHz
67.27 33.63
66.95
33.48
67.20
33.60
67.33 66.80
33.67
33.40
66.75
33.38
66.68
33.34
66.80
33.40
60.00
33.00
60.00
33.00
70.00
35.00
60.00
30.00
67.50
33.75
66.67
33.33
66.67
33.33
75.00
37.50
"FS0~FS3" are all internal
pull-up via 100K ohm ..
FS0
FS2
FS1
48MHZ
"48MHZ" is "FS3" in ICS950402 ,
But not in cy28330 .
R276 10K
R278 10K
R279 10K
R281 10K
A A
***
ModeA ModeB
0 0
0 1
1 0
1 1
5
Pin6 Pin7
HTTCLK0
ModeA In
HTTCLK1 HTTCLK2 PCICLK10
HTTCLK1 HTTCLK2 HTTCLK3
Pin8 Pin11
PCICLK7 PCICLK8 PCICLK9 PCICLK10
ModeA In
PCICLK8 PCICLK9 PCICLK10
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
CLOCK GENERATOR
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
1
4 41
Rev
100
of
Page 5
5
HT0 is for SH0 & Golem connection
VDD_12_A
K10
VLDT_1(1)
VDD_25_SUS
R345
X_1K
R346
100K
closed to F22 pin closed to AF22 pin
J11
VLDT_1(2)
H10
VLDT_1(3)
H8
VLDT_1(4)
K14
VLDT_1(5)
J15
VLDT_1(6)
K16
VLDT_1(7)
J16
VLDT_1(8)
J9
VLDT_1(9)
E14
L1_CADIN_H(15)
E13
L1_CADIN_L(15)
C15
L1_CADIN_H(14)
D15
L1_CADIN_L(14)
E16
L1_CADIN_H(13)
E15
L1_CADIN_L(13)
C17
L1_CADIN_H(12)
D17
L1_CADIN_L(12)
C19
L1_CADIN_H(11)
D19
L1_CADIN_L(11)
E20
L1_CADIN_H(10)
E19
L1_CADIN_L(10)
C21
L1_CADIN_H(9)
D21
L1_CADIN_L(9)
E22
L1_CADIN_H(8)
E21
L1_CADIN_L(8)
C14
L1_CADIN_H(7)
B14
L1_CADIN_L(7)
A16
L1_CADIN_H(6)
A15
L1_CADIN_L(6)
C16
L1_CADIN_H(5)
B16
L1_CADIN_L(5)
A18
L1_CADIN_H(4)
A17
L1_CADIN_L(4)
A20
L1_CADIN_H(3)
A19
L1_CADIN_L(3)
C20
L1_CADIN_H(2)
B20
L1_CADIN_L(2)
A22
L1_CADIN_H(1)
A21
L1_CADIN_L(1)
C22
L1_CADIN_H(0)
B22
L1_CADIN_L(0)
E18
L1_CLKIN_H(1)
E17
L1_CLKIN_L(1)
C18
L1_CLKIN_H(0)
B18
L1_CLKIN_L(0)
A14
L1_CTLIN_H(0)
A13
L1_CTLIN_L(0)
C13
L1_RSVD1
D13
L1_RSVD2
H0_VREF0_DDR
C324
0.1u
R343
X_1K
R344
100K
U29
1
A
2
B
3 4
GND Y
SN74LVC1G08DCKR,SC-70
D D
0.22u/16V/X7R
C319
C318
1000P/50V/X7R
SOLDER SIDE
C C
TP1
TP3
B B
A A
VDD_25_SUS
C316
R339
100RST
0.1u
C322
R341
100RST
MEM_GPIO1 22
FROM CPU TO DIMM
C323
1000P/50V/X7R
0.1u
R465 0
H0_MEMRESET1_L
VDD_25_SUS
MEM_GPIO2 22
5
SledgeHammer
C325
1000P/50V/X7R
VDD_25_SUS
VCC
4
VTT_DDR_SUS
C307
4.7u/0805
U27E
L1_CADOUT_H(9)
L1_CADOUT_L(9)
L1_CADOUT_H(8)
L1_CADOUT_L(8)
L1_CADOUT_H(7)
L1_CADOUT_L(7)
L1_CADOUT_H(6)
L1_CADOUT_L(6)
L1_CADOUT_H(5)
L1_CADOUT_L(5)
L1_CADOUT_H(4)
L1_CADOUT_L(4)
L1_CADOUT_H(3)
L1_CADOUT_L(3)
L1_CADOUT_H(2)
L1_CADOUT_L(2)
L1_CADOUT_H(1)
L1_CADOUT_L(1)
L1_CADOUT_H(0)
L1_CADOUT_L(0)
L1_CLKOUT_H(1)
L1_CLKOUT_L(1)
L1_CLKOUT_H(0)
L1_CLKOUT_L(0)
L1_CTLOUT_H(0)
L1_CTLOUT_L(0)
L1_RSVD3
L1_RSVD4
D11
C11
E9
E10
D9
C9
E7
E8
E5
E6
D5
C5
E3
E4
D3
C3
A11
A12
B10
C10
A9
A10
B8
C8
B6
C6
A5
A6
B4
C4
A3
A4
D7
C7
A7
A8
B12
C12
E11
E12
TP2
TP4
L1_CADOUT_H(15)
L1_CADOUT_L(15)
L1_CADOUT_H(14)
L1_CADOUT_L(14)
L1_CADOUT_H(13)
L1_CADOUT_L(13)
L1_CADOUT_H(12)
L1_CADOUT_L(12)
L1_CADOUT_H(11)
L1_CADOUT_L(11)
L1_CADOUT_H(10)
L1_CADOUT_L(10)
VDD_25_SUS
U28
1
5
A
VCC
2
B
3 4
GND Y
5
SN74LVC1G32DBVR
H0_MEMRESET_L 9,10
modified on 1/30
4
C320
0.22u/16V/X7R
SOLDER SIDE
3
VTT_SENSE 12
3
C321
1000P/50V/X7R
VDD_25_SUS
H0_VREF0_DDR
H0_VREF0_DDR
H0_MD[127..64] 11
VTT_DDR_SUS
H0_MDQS35 11
H0_MDQS34 11
H0_MDQS33 11
H0_MDQS32 11
H0_MDQS31 11
H0_MDQS30 11
H0_MDQS29 11
H0_MDQS28 11
H0_MDQS27 11
H0_MDQS26 11
H0_MDQS25 11
H0_MDQS24 11
H0_MDQS23 11
H0_MDQS22 11
H0_MDQS21 11
H0_MDQS20 11
H0_MDQS19 11
H0_MDQS17 11
H0_MDQS16 11
H0_MDQS15 11
H0_MDQS14 11
H0_MDQS13 11
H0_MDQS12 11
H0_MDQS11 11
H0_MDQS10 11
H0_MDQS9 11
H0_MDQS8 11
H0_MDQS7 11
H0_MDQS6 11
H0_MDQS5 11
H0_MDQS4 11
H0_MDQS3 11
H0_MDQS2 11
H0_MDQS1 11
H0_MDQS0 11
VTT_DDR_SUS
AC19
VTT1
AE19
VTT2
J19
VTT3
H19
VTT4
F20
VTT5
G19
VTT6
AE18
VTT7
AC18
R333
X_51
R335 42.2RST
R336 42.2RST
H0_MD127
H0_MD126
H0_MD125
H0_MD124
H0_MD123
H0_MD122
H0_MD121
H0_MD120
H0_MD119
H0_MD118
H0_MD117
H0_MD116
H0_MD115
H0_MD114
H0_MD113
H0_MD112
H0_MD111
H0_MD110
H0_MD109
H0_MD108
H0_MD107
H0_MD105
H0_MD104
H0_MD103
H0_MD102
H0_MD101
H0_MD100
H0_MD99
H0_MD98
H0_MD97
H0_MD96
H0_MD95
H0_MD94
H0_MD93
H0_MD92
H0_MD91
H0_MD90
H0_MD89
H0_MD88
H0_MD87
H0_MD86
H0_MD85
H0_MD84
H0_MD83
H0_MD82
H0_MD81 H0_MD17
H0_MD80
H0_MD79
H0_MD78
H0_MD77
H0_MD76
H0_MD75
H0_MD74
H0_MD73
H0_MD72
H0_MD71
H0_MD70
H0_MD69
H0_MD68
H0_MD67
H0_MD66
H0_MD65
H0_MD64
H0_MDQS35
H0_MDQS34
H0_MDQS33
H0_MDQS32
H0_MDQS31
H0_MDQS30
H0_MDQS29
H0_MDQS28
H0_MDQS27
H0_MDQS26
H0_MDQS25
H0_MDQS24
H0_MDQS23
H0_MDQS22
H0_MDQS21
H0_MDQS20
H0_MDQS19
H0_MDQS18
H0_MDQS17
H0_MDQS16
H0_MDQS15
H0_MDQS14
H0_MDQS13
H0_MDQS12
H0_MDQS11
H0_MDQS10
H0_MDQS9
H0_MDQS8
H0_MDQS7
H0_MDQS6
H0_MDQS5
H0_MDQS4
H0_MDQS3
H0_MDQS2
H0_MDQS1
H0_MDQS0
AF18
AF19
AF17
AE16
AF22
AG24
AH25
AG26
AH27
AF23
AH24
AF25
AJ26
AG27
AF26
AF28
AE29
AJ29
AH29
AE27
AD26
AD27
AC26
AA26
AA28
AD28
AC27
AB29
AA27
W27
AG25
AF27
AB27
W29
AF24
AG28
AC28
AJ25
AJ30
AD29
AA31
AL25
AL29
AE31
F21
F22
Y27
Y28
V28
U26
Y26
V27
U27
P28
N29
M26
L28
P27
P26
M27
L27
K29
K27
H28
G29
L26
J28
H27
H26
F27
F26
D29
D27
G27
F28
E27
C27
C26
E25
D24
F23
E26
F25
E24
G23
R27
N27
J27
E29
F24
R28
V26
M28
J26
E28
D25
U31
M30
H30
C30
B25
T31
Y29
M29
H29
C29
C25
VTT8
VTT9
VTT10
VTT_SENSE
MEMZN
MEMZP
MEMVREF0
MEMVREF1
MEMDATA(127)
MEMDATA(126)
MEMDATA(125)
MEMDATA(124)
MEMDATA(123)
MEMDATA(122)
MEMDATA(121)
MEMDATA(120)
MEMDATA(119)
MEMDATA(118)
MEMDATA(117)
MEMDATA(116)
MEMDATA(115)
MEMDATA(114)
MEMDATA(113)
MEMDATA(112)
MEMDATA(111)
MEMDATA(110)
MEMDATA(109)
MEMDATA(108)
MEMDATA(107)
MEMDATA(106)
MEMDATA(105)
MEMDATA(104)
MEMDATA(103)
MEMDATA(102)
MEMDATA(101)
MEMDATA(100)
MEMDATA(99)
MEMDATA(98)
MEMDATA(97)
MEMDATA(96)
MEMDATA(95)
MEMDATA(94)
MEMDATA(93)
MEMDATA(92)
MEMDATA(91)
MEMDATA(90)
MEMDATA(89)
MEMDATA(88)
MEMDATA(87)
MEMDATA(86)
MEMDATA(85)
MEMDATA(84)
MEMDATA(83)
MEMDATA(82)
MEMDATA(81)
MEMDATA(80)
MEMDATA(79)
MEMDATA(78)
MEMDATA(77)
MEMDATA(76)
MEMDATA(75)
MEMDATA(74)
MEMDATA(73)
MEMDATA(72)
MEMDATA(71)
MEMDATA(70)
MEMDATA(69)
MEMDATA(68)
MEMDATA(67)
MEMDATA(66)
MEMDATA(65)
MEMDATA(64)
MEMDQS(35)
MEMDQS(34)
MEMDQS(33)
MEMDQS(32)
MEMDQS(31)
MEMDQS(30)
MEMDQS(29)
MEMDQS(28)
MEMDQS(27)
MEMDQS(26)
MEMDQS(25)
MEMDQS(24)
MEMDQS(23)
MEMDQS(22)
MEMDQS(21)
MEMDQS(20)
MEMDQS(19)
MEMDQS(18)
MEMDQS(17)
MEMDQS(16)
MEMDQS(15)
MEMDQS(14)
MEMDQS(13)
MEMDQS(12)
MEMDQS(11)
MEMDQS(10)
MEMDQS(9)
MEMDQS(8)
MEMDQS(7)
MEMDQS(6)
MEMDQS(5)
MEMDQS(4)
MEMDQS(3)
MEMDQS(2)
MEMDQS(1)
MEMDQS(0)
U27B
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
MEMCLK_UP_H(2)
MEMCLK_UP_L(2)
MEMCLK_UP_H(1)
MEMCLK_UP_L(1)
MEMCLK_UP_H(0)
MEMCLK_UP_L(0)
MEMCLK_LO_H(3)
MEMCLK_LO_L(3)
MEMCLK_LO_H(2)
MEMCLK_LO_L(2)
MEMCLK_LO_H(1)
MEMCLK_LO_L(1)
MEMCLK_LO_H(0)
MEMCLK_LO_L(0)
MEMCHECK(15)
MEMCHECK(14)
MEMCHECK(13)
MEMCHECK(12)
MEMCHECK(11)
MEMCHECK(10)
MEMCHECK(9)
MEMCHECK(8)
MEMCHECK(7)
MEMCHECK(6)
MEMCHECK(5)
MEMCHECK(4)
MEMCHECK(3)
MEMCHECK(2)
MEMCHECK(1)
MEMCHECK(0)
SledgeHammer
2
MEMCKE_UP
MEMCKE_LO
RSVD_MA(15)
RSVD_MA(14)
MEMADD(13)
MEMADD(12)
MEMADD(11)
MEMADD(10)
MEMADD(9)
MEMADD(8)
MEMADD(7)
MEMADD(6)
MEMADD(5)
MEMADD(4)
MEMADD(3)
MEMADD(2)
MEMADD(1)
MEMADD(0)
MEMDATA(63)
MEMDATA(62)
MEMDATA(61)
MEMDATA(60)
MEMDATA(59)
MEMDATA(58)
MEMDATA(57)
MEMDATA(56)
MEMDATA(55)
MEMDATA(54)
MEMDATA(53)
MEMDATA(52)
MEMDATA(51)
MEMDATA(50)
MEMDATA(49)
MEMDATA(48)
MEMDATA(47)
MEMDATA(46)
MEMDATA(45)
MEMDATA(44)
MEMDATA(43)
MEMDATA(42)
MEMDATA(41)
MEMDATA(40)
MEMDATA(39)
MEMDATA(38)
MEMDATA(37)
MEMDATA(36)
MEMDATA(35)
MEMDATA(34)
MEMDATA(33)
MEMDATA(32)
MEMDATA(31)
MEMDATA(30)
MEMDATA(29)
MEMDATA(28)
MEMDATA(27)
MEMDATA(26)
MEMDATA(25)
MEMDATA(24)
MEMDATA(23)
MEMDATA(22)
MEMDATA(21)
MEMDATA(20)
MEMDATA(19)
MEMDATA(18)
MEMDATA(17)
MEMDATA(16)
MEMDATA(15)
MEMDATA(14)
MEMDATA(13)
MEMDATA(12)
MEMDATA(11)
MEMDATA(10)
MEMDATA(9)
MEMDATA(8)
MEMDATA(7)
MEMDATA(6)
MEMDATA(5)
MEMDATA(4)
MEMDATA(3)
MEMDATA(2)
MEMDATA(1)
MEMDATA(0)
MEMRESET_L
MEMBANK(1)
MEMBANK(0)
MEMRAS_L
MEMCAS_L
MEMWE_L
MEMCS_L(7)
MEMCS_L(6)
MEMCS_L(5)
MEMCS_L(4)
MEMCS_L(3)
MEMCS_L(2)
MEMCS_L(1)
MEMCS_L(0)
2
G20
G21
AE21
AE20
H0_MEMCLK_H3
L24
H0_MEMCLK_L3
L25
H0_MEMCLK_H2
R23
H0_MEMCLK_L2
T23
H23
J23
AD21
AD20
H0_MEMCLK_H1
Y23
H0_MEMCLK_L1
AA23
H0_MEMCLK_H0
U25
H0_MEMCLK_L0
U24
H0_MCKEUP
H24
H0_MCKELO
H25
V23
M23
AE23
J24
J25
V24
K23
L23
K25
M25
M24
N25
N23
P23
T25
V25
AJ24
AK25
AK27
AJ27
AL24
AK24
AL26
AL27
AJ28
AK30
AJ31
AG29
AL28
AK28
AH31
AG30
AG31
AF30
AD31
AC30
AF29
AF31
AD30
AC29
AB31
AA29
Y31
W31
AC31
AA30
Y30
V29
P31
M31
L30
L29
P29
N31
L31
K31
J30
J29
G31
F29
J31
H31
F31
F30
D31
C31
B30
C28
E31
E30
A29
B28
B27
A26
C24
A24
A28
A27
A25
B24
H0_MEMRESET1_L
G25
W25
W23
H0_-MSRASA
Y25
H0_-MSCASA
AA25
Y24
H0_MEMCHECK15
U28
H0_MEMCHECK14
T29
H0_MEMCHECK13
P24
H0_MEMCHECK12
P25
H0_MEMCHECK11
T27
H0_MEMCHECK10
R26
H0_MEMCHECK9
R25
H0_MEMCHECK8
R24
H0_MEMCHECK7
V30
H0_MEMCHECK6
U29
H0_MEMCHECK5
R30
H0_MEMCHECK4
P30
H0_MEMCHECK3
V31
H0_MEMCHECK2
U30
H0_MEMCHECK1
R29
H0_MEMCHECK0
R31
AD23
AE25
AD24
AD25
AC24
AC25
AB25
AA24
H0_MAA13
H0_MAA12
H0_MAA11
H0_MAA10
H0_MAA9
H0_MAA8
H0_MAA7
H0_MAA6
H0_MAA5
H0_MAA4
H0_MAA3
H0_MAA2
H0_MAA1
H0_MAA0
H0_MD63
H0_MD62
H0_MD61
H0_MD60
H0_MD59
H0_MD58
H0_MD57
H0_MD56
H0_MD55
H0_MD54
H0_MD53
H0_MD52
H0_MD51
H0_MD50
H0_MD49
H0_MD48
H0_MD47
H0_MD46
H0_MD45
H0_MD44
H0_MD43
H0_MD42 H0_MD106
H0_MD41
H0_MD40
H0_MD39
H0_MD38
H0_MD37
H0_MD36
H0_MD35
H0_MD34
H0_MD33
H0_MD32
H0_MD31
H0_MD30
H0_MD29
H0_MD28
H0_MD27
H0_MD26
H0_MD25
H0_MD24
H0_MD23
H0_MD22
H0_MD21
H0_MD20
H0_MD19
H0_MD18
H0_MD16
H0_MD15
H0_MD14
H0_MD13
H0_MD12
H0_MD11
H0_MD10
H0_MD9
H0_MD8
H0_MD7
H0_MD6
H0_MD5
H0_MD4
H0_MD3
H0_MD2
H0_MD1
H0_MD0
H0_-MCS3
H0_-MCS2
H0_-MCS1
H0_-MCS0
H0_MEMCLK_H3 10
H0_MEMCLK_L3 10
H0_MEMCLK_H2 9
H0_MEMCLK_L2 9
H0_MEMCLK_H1 10
H0_MEMCLK_L1 10
H0_MEMCLK_H0 9
H0_MEMCLK_L0 9
H0_MCKEUP 11
H0_MCKELO 11
H0_MAA13 11
H0_MAA12 11
H0_MAA11 11
H0_MAA10 11
H0_MAA9 11
H0_MAA8 11
H0_MAA7 11
H0_MAA6 11
H0_MAA5 11
H0_MAA4 11
H0_MAA3 11
H0_MAA2 11
H0_MAA1 11
H0_MAA0 11
H0_MD[63..0] 11
H0_MEMBAKA1 11
H0_MEMBAKA0 11
H0_-MSRASA 11
H0_-MSCASA 11
H0_-MSWEA 11
H0_MEMCHECK15 11
H0_MEMCHECK14 11
H0_MEMCHECK13 11
H0_MEMCHECK12 11
H0_MEMCHECK11 11
H0_MEMCHECK10 11
H0_MEMCHECK9 11
H0_MEMCHECK8 11 H0_MDQS18 11
H0_MEMCHECK7 11
H0_MEMCHECK6 11
H0_MEMCHECK5 11
H0_MEMCHECK4 11
H0_MEMCHECK3 11
H0_MEMCHECK2 11
H0_MEMCHECK1 11
H0_MEMCHECK0 11
H0_-MCS3 11
H0_-MCS2 11
H0_-MCS1 11
H0_-MCS0 11
H0_MEMCLK_H3
H0_MEMCLK_L3
H0_MEMCLK_H2
H0_MEMCLK_L2
H0_MEMCLK_H1
H0_MEMCLK_L1
H0_MEMCLK_H0
H0_MEMCLK_L0
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
R332
(BOT)120RST
R334
(BOT)120RST
R337
(BOT)120RST
R338
(BOT)120RST
Micro Star Restricted Secret
CPU0_K8 DDR & HT
1
MS-9130
1
Last Revision Date:
Thursday, July 17, 2003
Sheet
5 41
Rev
100
of
Page 6
5
VDDA25
C326
4.7u/0805
D D
C327
1000P/50V/X7R
Routed differentially
with a 20/5/5/5/20.
3300p/50V/X7R
VERY CLOSE TO CPU
CLKIN0_H
R360
(BOT)169RST
PS_ON#A 39
CLKIN0_L
-LDTSTOP
PS_ON#A
5
C C
B B
A A
C328
VDD_12_A
VCC2_5
C329
0.22u/16V
-CPURST 13,39
-LDTSTOP 13,16,23
CPU_GD 13,37
R374 680
CT6
100u/10V
VDDA_25
C647 0.1u
COREFB_H 13,19
COREFB_L 13,19
CPUCLK0_H 4
CPUCLK0_L 4
R368 680
Q46
2N7002S
FB12 180nH/1210
TMS 13
TCK 13
TRST_L 13
VCC2_5
C681
33P
R351 43.2RST
R353 43.2RST
R356 0
R358 0
3900P/50V/X7R
C330
C331
TMS
TCK
TRST_L
C682
33P
4
VDDA25
TP5
3900P/50V/X7R
H0_NC_G14
H0_NC_H14
H0_TDI
H0_DBREQ_L
H0_SCANCLK1
H0_SCANCLK2
H0_SCANEN
H0_SSENA
H0_SSENB
H0_NC_T3
H0_NC_T4
H0_NC_AF13
TP9
TP10
TP11
H0_NC_AE14
TP14
TP15
TP16
TP17
TP18
TP19
TP20
4
LAYOUT:
Route VDDA trace approx. 50 mils wide
(use 2x25 mil traces to exit ball) and
500 mils long.
CLKIN0_H
CLKIN0_L
G16
H16
G14
H14
AE6
AE7
AD7
AF7
AE10
AE11
AF11
AE13
AE12
AF13
AF15
AE14
G12
F12
AG1
AH2
AJ2
AA6
AC6
C1
D2
C2
E1
D1
L7
L6
K7
J7
T3
T4
L8
K8
J6
H9
N6
VDDA1
VDDA2
VDDA3
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORESENSE_H
CLKIN_H
CLKIN_L
BYPASSCLK_H
BYPASSCLK_L
TMS
TCK
TRST_L
TDI
DBREQ_L
SCANCLK1
SCANCLK2
SCANEN
SCANSHIFTEN
SCANSHIFTENB
SCANIN_H
SCANIN_L
SINGLECHAIN
PLLCHRZ_H
PLLCHRZ_L
DCLKTWO
BURNIN_L
RESET_L
LDTSTOP_L
PWROK
FREE7
FREE11
FREE15
FREE12
FREE21
FREE1
FREE3
SledgeHammer
U27C
RSVD_SMBUSC
RSVD_SMBUSD
THERMTRIP_L
THERMDA
THERMDC
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
BP(3)
BP(2)
BP(1)
BP(0)
FBCLKOUT_H
FBCLKOUT_L
TDO
DBRDY
SCANOUT_H
SCANOUT_L
TSTOUT
ANALOG3
ANALOG2
ANALOG1
ANALOG0
3
AE15
AJ1
AH1
G9
F9
G10
H11
G11
H13
G6
F7
H12
H0_FBCLKOUT_H
G18
H18
H0_FBCLKOUT_L
AE8
H0_DBRDY
G8
V5
U5
H7
U1_T7
T7
U1_W6
W6
U1_R6
R6
U1_U6
U6
AF9
AE9
3
THERMTRIP_CPU_L
THERMDA_CPU1 30,31
VTIN_GND 13,30
R350 0
R352 0
R354 0
R355 0
R357 0
H0_BP3
H0_BP2
H0_BP1
H0_BP0
R359
80.6RST
LAYOUT:
Route FBCLKOUT_H/L differentially
with 20/5/5/5/20 for 1.5" to escape the BGA.
TP6
TP42
TP7
TP8
U1_R6
U1_U6
U1_T7
U1_W6
TP12
TP13
Routed differentially.
VID4 19
VID3 19,32
VID2 19,32
VID1 19,32
VID0 19,32
This termination
resistor should
be placed as
close to
Processor as
possible.
RN55
1 2
3 4
5 6
7 8
510_8P4R
VCC2_5
modified on 1/30
2
R348
2
1
R347 X0
1K
Q45 2N3904S
VCC2_5
THERMTRIP_CPU1 13
R349
4.7K
R444 1K
VCC2_5
Q49 2N3904S
STRAPPINGS
H0_NC_G14
H0_NC_AE14
H0_NC_AF13
H0_TDI
H0_DBREQ_L
H0_DBRDY
H0_NC_H14
H0_SCANEN
H0_SCANCLK1
H0_SCANCLK2
H0_SSENA
H0_SSENB
H0_BP3
H0_BP2
H0_BP1
H0_BP0
H0_NC_T4
H0_NC_T3
49.9RST
R361 820
R362 680
R363 680
R364 1K
R365 1K
R366 1K
R367 820
R369 680
R370 680
R371 680
R372 680
R373 680
R466 X_680
R467 X_680
R468 680
R469 680
R379
THRM# 22,30,37
R445
4.7K
R376 49.9RST
R378 X_49.9RST
R380
X_49.9RST
VCC2_5
VCC2_5
VDD_12_A
Micro Star Restricted Secret
Title
CPU0_K8 HDT & MISC
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
6 41
1
Rev
100
of
Page 7
5
4
3
2
1
VDD_12_A
N7
VLDT_0(1)
R7
VLDT_0(2)
U7
D D
H0_CADIN[15..0] 12
H0_CADIN#[15..0] 12
C C
H0_CLKIN#1 12
H0_CLKIN#0 12
B B
H0_CTLIN#0 12
CT7
C648
C649
0.22u/X7R
H0_CADIN15
H0_CADIN#15
H0_CADIN14
H0_CADIN#14
H0_CADIN13
H0_CADIN#13
H0_CADIN12
H0_CADIN#12
H0_CADIN11
H0_CADIN#11
H0_CADIN10
H0_CADIN#10
H0_CADIN9
H0_CADIN#9
H0_CADIN8
H0_CADIN#8
H0_CADIN7
H0_CADIN#7
H0_CADIN6
H0_CADIN#6
H0_CADIN5
H0_CADIN#5
H0_CADIN4
H0_CADIN#4
H0_CADIN3
H0_CADIN#3
H0_CADIN2
H0_CADIN#2
H0_CADIN1
H0_CADIN#1
H0_CADIN0
H0_CADIN#0
H0_CLKIN1
H0_CLKIN#1
H0_CLKIN0
H0_CLKIN#0
H0_CTLIN0
H0_CTLIN#0
103P
100u/10V
H0_CLKIN1 12
H0_CLKIN0 12
H0_CTLIN0 12
W7
M8
P8
AA7
V8
Y8
R5
T5
P3
P4
N5
P5
M3
M4
K3
K4
J5
K5
H3
H4
G5
H5
R3
R2
N1
P1
N3
N2
L1
M1
J1
K1
J3
J2
G1
H1
G3
G2
L5
M5
L3
L2
R1
T1
VLDT_0(3)
VLDT_0(4)
VLDT_0(5)
VLDT_0(6)
VLDT_0(7)
VLDT_0(8)
VLDT_0(9)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
VDD_12_A
C310
C309
C308
0.22u/16V/X7R
A A
5
0.22u/16V/X7R
1000P/50V/X7R
SledgeHammer
C311
1000P/50V/X7R
U27A
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
CT5
100u/10V
4
H0_CADOUT15
V4
H0_CADOUT#15
V3
H0_CADOUT14
Y5
H0_CADOUT#14
W5
H0_CADOUT13
Y4
H0_CADOUT#13
Y3
H0_CADOUT12
AB5
H0_CADOUT#12
AA5
H0_CADOUT11
AD5
H0_CADOUT#11
AC5
H0_CADOUT10
AD4
H0_CADOUT#10
AD3
H0_CADOUT9
AF5
H0_CADOUT#9
AE5
H0_CADOUT8
AF4
H0_CADOUT#8
AF3
H0_CADOUT7
V1
H0_CADOUT#7
U1
H0_CADOUT6
W2
H0_CADOUT#6
W3
H0_CADOUT5
Y1
H0_CADOUT#5
W1
H0_CADOUT4
AA2
H0_CADOUT#4
AA3
H0_CADOUT3
AC2
H0_CADOUT#3
AC3
H0_CADOUT2
AD1
H0_CADOUT#2
AC1
H0_CADOUT1
AE2
H0_CADOUT#1
AE3
H0_CADOUT0
AF1
H0_CADOUT#0
AE1
H0_CLKOUT1
AB4
H0_CLKOUT#1
AB3
H0_CLKOUT0
AB1
H0_CLKOUT#0
AA1
H0_CTLOUT0
U2
H0_CTLOUT#0
U3
H0_CADOUT[15..0] 12
H0_CADOUT#[15..0] 12
H0_CLKOUT1 12
H0_CLKOUT#1 12
H0_CLKOUT0 12
H0_CLKOUT#0 12
H0_CTLOUT0 12
H0_CTLOUT#0 12
VDD_12_A
AB10
VLDT_2(1)
AC11
VLDT_2(2)
AD10
C650
0.22u/16V/X7R
L0_CADIN15
L0_CADIN#15
L0_CADIN14
L0_CADIN#14
L0_CADIN13
L0_CADIN#13
L0_CADIN12
L0_CADIN#12
L0_CADIN11
L0_CADIN#11
L0_CADIN10
L0_CADIN#10
L0_CADIN9
L0_CADIN#9
L0_CADIN8
L0_CADIN#8
L0_CADIN7
L0_CADIN#7
L0_CADIN6
L0_CADIN#6
L0_CADIN5
L0_CADIN#5
L0_CADIN4
L0_CADIN#4
L0_CADIN3
L0_CADIN#3
L0_CADIN2
L0_CADIN#2
L0_CADIN1
L0_CADIN#1
L0_CADIN0
L0_CADIN#0
L0_CLKIN1
L0_CLKIN#1
L0_CLKIN0
L0_CLKIN#0
L0_CTLIN0
L0_CTLIN#0
C651
103P
C332
4.7u/1206
L0_CADIN[15..0] 16
L0_CADIN#[15..0] 16
L0_CLKIN1 16
L0_CLKIN#1 16
L0_CLKIN0 16
L0_CLKIN#0 16
L0_CTLIN0 16
L0_CTLIN#0 16
AB14
AC15
AB16
AC16
AG11
AG12
AH10
AG10
AK11
AH12
AD8
AC9
AJ10
AG9
AJ8
AH8
AJ6
AH6
AG5
AG6
AJ4
AH4
AG3
AG4
AJ11
AL9
AL10
AJ9
AK9
AL7
AL8
AL5
AL6
AJ5
AK5
AL3
AL4
AJ3
AK3
AG7
AG8
AJ7
AK7
AL11
AL12
AJ12
VLDT_2(3)
VLDT_2(4)
VLDT_2(5)
VLDT_2(6)
VLDT_2(7)
VLDT_2(8)
VLDT_2(9)
L2_CADIN_H(15)
L2_CADIN_L(15)
L2_CADIN_H(14)
L2_CADIN_L(14)
L2_CADIN_H(13)
L2_CADIN_L(13)
L2_CADIN_H(12)
L2_CADIN_L(12)
L2_CADIN_H(11)
L2_CADIN_L(11)
L2_CADIN_H(10)
L2_CADIN_L(10)
L2_CADIN_H(9)
L2_CADIN_L(9)
L2_CADIN_H(8)
L2_CADIN_L(8)
L2_CADIN_H(7)
L2_CADIN_L(7)
L2_CADIN_H(6)
L2_CADIN_L(6)
L2_CADIN_H(5)
L2_CADIN_L(5)
L2_CADIN_H(4)
L2_CADIN_L(4)
L2_CADIN_H(3)
L2_CADIN_L(3)
L2_CADIN_H(2)
L2_CADIN_L(2)
L2_CADIN_H(1)
L2_CADIN_L(1)
L2_CADIN_H(0)
L2_CADIN_L(0)
L2_CLKIN_H(1)
L2_CLKIN_L(1)
L2_CLKIN_H(0)
L2_CLKIN_L(0)
L2_CTLIN_H(0)
L2_CTLIN_L(0)
L2_RSVD1
L2_RSVD2
U27F
L2_CADOUT_H(15)
L2_CADOUT_L(15)
L2_CADOUT_H(14)
L2_CADOUT_L(14)
L2_CADOUT_H(13)
L2_CADOUT_L(13)
L2_CADOUT_H(12)
L2_CADOUT_L(12)
L2_CADOUT_H(11)
L2_CADOUT_L(11)
L2_CADOUT_H(10)
L2_CADOUT_L(10)
L2_CADOUT_H(9)
L2_CADOUT_L(9)
L2_CADOUT_H(8)
L2_CADOUT_L(8)
L2_CADOUT_H(7)
L2_CADOUT_L(7)
L2_CADOUT_H(6)
L2_CADOUT_L(6)
L2_CADOUT_H(5)
L2_CADOUT_L(5)
L2_CADOUT_H(4)
L2_CADOUT_L(4)
L2_CADOUT_H(3)
L2_CADOUT_L(3)
L2_CADOUT_H(2)
L2_CADOUT_L(2)
L2_CADOUT_H(1)
L2_CADOUT_L(1)
L2_CADOUT_H(0)
L2_CADOUT_L(0)
L2_CLKOUT_H(1)
L2_CLKOUT_L(1)
L2_CLKOUT_H(0)
L2_CLKOUT_L(0)
L2_CTLOUT_H(0)
L2_CTLOUT_L(0)
L2_RSVD3
L2_RSVD4
AH14
AJ14
AG16
AG15
AH16
AJ16
AG18
AG17
AG20
AG19
AH20
AJ20
AG22
AG21
AH22
AJ22
AL14
AL13
AK15
AJ15
AL16
AL15
AK17
AJ17
AK19
AJ19
AL20
AL19
AK21
AJ21
AL22
AL21
AH18
AJ18
AL18
AL17
AK13
AJ13
AG13
AG14
L0_CADOUT15
L0_CADOUT#15
L0_CADOUT14
L0_CADOUT#14
L0_CADOUT13
L0_CADOUT#13
L0_CADOUT12
L0_CADOUT#12
L0_CADOUT11
L0_CADOUT#11
L0_CADOUT10
L0_CADOUT#10
L0_CADOUT9
L0_CADOUT#9
L0_CADOUT8
L0_CADOUT#8
L0_CADOUT7
L0_CADOUT#7
L0_CADOUT6
L0_CADOUT#6
L0_CADOUT5
L0_CADOUT#5
L0_CADOUT4
L0_CADOUT#4
L0_CADOUT3
L0_CADOUT#3
L0_CADOUT2
L0_CADOUT#2
L0_CADOUT1
L0_CADOUT#1
L0_CADOUT0
L0_CADOUT#0
L0_CLKOUT1
L0_CLKOUT#1
L0_CLKOUT0
L0_CLKOUT#0
L0_CTLOUT0
L0_CTLOUT#0
L0_CADOUT[15..0] 16
L0_CADOUT#[15..0] 16
L0_CLKOUT1 16
L0_CLKOUT#1 16
L0_CLKOUT0 16
L0_CLKOUT#0 16
L0_CTLOUT0 16
L0_CTLOUT#0 16
SledgeHammer
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
CPU0_K8 HT0 & HT2
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
1
7 41
of
Rev
100
Page 8
5
D D
LAYOUT: Place solder side of processor.
VCORE
C345
X_(BOT)SP-CAP,220u/2V
C C
4.7u/1206
C347
4.7u/1206
4.7u/1206
4
C346
X_(BOT)SP-CAP,220u/2V
LAYOUT: Place clolse to socket.
C349
C350
C351
C352
4.7u/1206
4.7u/1206
4.7u/1206
4.7u/1206
4.7u/1206
3
EMI
LAYOUT:
Place 1 capacitor every 1-1.5" along VDD_CORE perimiter.
VCORE
C674
C678
4.7u/1206
BULK / Decopuling
Place on CPU Solder side
VCORE
C12
C13
0.22u/16V/X7R
C14
0.22u/16V/X7R
0.22u/16V/X7R
VCORE
C333
6.8p/50V/NPO
C334
6.8p/50V/NPO
Buck-decoupling Mid-Freq. decoupling Cap. ( 7 * 4.7uF / 1206 X7R )
4.7u/1206
VCORE
C615
C619
4.7u/1206
C353
2
C336
C335
6.8p/50V/NPO
6.8p/50V/NPO
LAYOUT:
Place 1000pF capacitors between VRM & CPU.
VCORE VCORE
C354
1000P/50V/X7R
C337
6.8p/50V/NPO
C355
1000P/50V/X7R
C338
6.8p/50V/NPO
C356
1000P/50V/X7R
C339
6.8p/50V/NPO
C357 C348
1000P/50V/X7R
C340
6.8p/50V/NPO
C341
6.8p/50V/NPO
C342
6.8p/50V/NPO
C344
C343
6.8p/50V/NPO
6.8p/50V/NPO
Buck-decoupling Mid-Freq. decoupling Cap. ( 7 * 4.7uF / 1206 X7R )
VCORE
C47
4.7u/1206
PLEASE THESE PARTS UNDER SOLDER SIDE OF U27
1
AD22
VDDIO47
VSS46
VDDIO48
VSS96
AB23
VSS47
AC23
VDDIOFB_H
AF20V6AD12H2AA4
VDDIOFB_L
VDDIO_SENSE
VSS48
VSS50
VSS51
VSS52
VSS53
VSS49
AC22Y9AB9
AD9
D10
T9
VCORE
T18
V18
Y18
K12
F19
N19
R19
U19
W19
D20
AE4
M20
P20
T20
V20
Y20
AK20
B21
AH21
AK4B5AH5K6P6T8AB6
AF6M2F6D8G7
AB8
AK8B9K18L9N9R9T2U9W9
AA9
AB18
AH9
W13
M10
P10
T10
V10Y2Y10
AB12
AF10
F11
L11
N11
R11
U11
W11
AA11
AD2
D12
M12
P12
T12
V12
Y12
AC13
AK12
B13
L13D4N13
R13
U13
AA13
AH13
J13
M14
P14
T14J4V14
Y14
AD14
AF14
F15
L15
N15
R15
U15
W15N4AA15
D16
F18
M16
P16
T16
V16
Y16
AD16
AK16U4B17
VDD1
VDD2
VDD3
VDD4
VDD5
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
VDD93
VDD94
VDD117
VDD118
VDD119
VSS54
VSS55
VSS97
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS98
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS99
VSS72
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS101
VSS90
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS100
VSS81
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS182
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS183
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS184
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS185
VSS136
VSS137
VSS138
VSS139
VSS140
J10
AD13
L10
N10
R10
U10T6AA10
AC10
AK10
B11
L14
H15J8K11
M11
P11
T11
V11
N14
Y11
AA12
N16
AF12
F13
G15
F10
AD15
K13
U14
M13
AB11
AD11
AH11
G13
J12
N12
R12
U12
R14
W12
W14
AA14
AC14
AH15
AK14
B15
K15
M15
B23
P15
T15
V15
Y15
AB15
D14
J14
H17
G24
L16
R16
U16
W18
AA16
AC17
AF16
F16
K17
N24
M17
P17
T17
V17
3
VSS141
Y17
AB17
AD17
D18
J18
W24
L18
N18
R18
U18
W10
AA18
AE17
VDD95
VSS142
VSS143
VSS144
VSS186
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
AK18
B19
G30
K19
M19
T19
V19
Y19
AB19
AH19
J20
L20
L17
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VSS187
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS188
VSS163
W30
VSS164
N20
R20
U20
W20
AA20
AC20
AF21
K21
M21
AB24
P21
T21
SledgeHammer
N17
R17
U17
W17
AA17
AH17
M18
P18
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS189
VSS172
VSS173
VSS174
VSS175
VSS176
V21
Y21
2
VSS177
AB21
D22
G22
L22
N22
B26
R22
U22
W22
AA22
AE22
AK22
J22
AG2E2P13
W16
D23
AH23
VSS5
VSS91
VSS203
VSS202
VSS200
VSS201
VSS178
VSS179
VSS180
VSS190
VSS181
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS1
VSS2
VSS3
AE24
AK26
B29
AK23
K24
VSS4
T24
AE30
AK29
D30
K30
T30
AB30
AH30
AH7V9L12
AC12
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
CPU0 _K8 POWER & GND
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
8 41
of
Rev
100
VDD_25_SUS
L19
W21
AA21
J21
M22
P22
T22
V22
Y22
AB22
AJ23
AA19
C23
E23
K26
T26
AE28
G26
N26
W26
AE26
AG23
K20
D28
K28
T28
AB28
AH28
AH26
G28
N28
W28
AB26
AB20
L21
N21
R21
U21
H22
D26
K22
A23
U23
AL23
U27D
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
B B
A A
5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS92
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS93
T13V2AB2
AF2
AK2B3AH3G4L4R4V13W4AC4F5D6H6M7
VSS22
F17
P19
N30F1F2K2P2
VDDIO32
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS94
VSS31
VSS32
VSS33
VSS34
AB7Y6AD6
J17
AK6B7F14P7V7Y7M6
VDDIO33
VSS35
VDDIO34
VSS36
VDDIO35
VDDIO36
VDDIO37
VSS37
VSS95
VSS38
Y13N8R8U8W8
VDDIO38
VSS39
VDDIO40
VSS40
VDDIO41
VSS41
AC21
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VSS42
VSS43
VSS44
VSS45
AA8
AF8F8G17K9AB13M9P9
4
Page 9
5
Registered DDR333 SDRAM
Sockets
4
3
2
1
D D
VDD_25_SUS
738467085
VDD0
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
DDR_VREF
1000P/50V/X7R
H0_DR_MD0
H0_DR_MD1
H0_DR_MD2
H0_DR_MD3
H0_DR_MD4
H0_DR_MD5
H0_DR_MD6
H0_DR_MD7
H0_DR_MD8
H0_DR_MD9
H0_DR_MD10
H0_DR_MD11
H0_DR_MD12
H0_DR_MD13
H0_DR_MD14
H0_DR_MD15
H0_DR_MD16
H0_DR_MD17
H0_DR_MD18
H0_DR_MD19
H0_DR_MD20
H0_DR_MD21
H0_DR_MD22
H0_DR_MD23
H0_DR_MD24
H0_DR_MD25
H0_DR_MD26
H0_DR_MD27
H0_DR_MD28
H0_DR_MD29
H0_DR_MD30
H0_DR_MD31
H0_DR_MD32
H0_DR_MD33
H0_DR_MD34
H0_DR_MD35
H0_DR_MD36
H0_DR_MD37
H0_DR_MD38
H0_DR_MD39
H0_DR_MD40
H0_DR_MD41
H0_DR_MD42
H0_DR_MD43
H0_DR_MD44
H0_DR_MD45
H0_DR_MD46
H0_DR_MD47
H0_DR_MD48
H0_DR_MD49
H0_DR_MD50
H0_DR_MD51
H0_DR_MD52
H0_DR_MD53
H0_DR_MD54
H0_DR_MD55
H0_DR_MD56
H0_DR_MD57
H0_DR_MD58
H0_DR_MD59
H0_DR_MD60
H0_DR_MD61
H0_DR_MD62
H0_DR_MD63
C358
VDD_25_SUS
C359
1000P/50V/X7R
H0_DR_MD[63..0] 10,11
C C
B B
H0_DR_-MSWEA 10,11
Channel A
108
120
148
168223054627796
104
112
128
136
143
156
164
172
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
184
PIN
DDR DIMM
SOCKET
SLAVE ADDRESS = 1010000B
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
3111826344250586674818993
VSS18
100
116
124
132
139
145
152
1801582
VDDQ13
VDDQ14
VSS19
VSS20
160
176
VDDQ15
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS21
VDDID
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
CKE0
CKE1
CAS#
RAS#
184
CS0#
CS1#
CS2#
CS3#
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
DDR1
DDRDIMM_184
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
SMBCLK1
SMBDATA1
H0_DR_-MCS0 11
H0_DR_-MCS1 11
H0_DR_MDQS0 10,11
H0_DR_MDQS1 10,11
H0_DR_MDQS2 10,11
H0_DR_MDQS3 10,11
H0_DR_MDQS4 10,11
H0_DR_MDQS5 10,11
H0_DR_MDQS6 10,11
H0_DR_MDQS7 10,11
H0_DR_MDQS8 10,11
H0_DR_MAA13 10,11
H0_DR_MAA0 10,11
H0_DR_MAA1 10,11
H0_DR_MAA2 10,11
H0_DR_MAA3 10,11
H0_DR_MAA4 10,11
H0_DR_MAA5 10,11
H0_DR_MAA6 10,11
H0_DR_MAA7 10,11
H0_DR_MAA8 10,11
H0_DR_MAA9 10,11
H0_DR_MAA10 10,11
H0_DR_MAA11 10,11
H0_DR_MAA12 10,11
H0_DR_MEMBAKA0 10,11
H0_DR_MEMBAKA1 10,11
SMBCLK1 4,10,22,24,25,35,37
SMBDATA1 4,10,22,24,25,35,37
H0_DR_MEMCHECK0 10,11
H0_DR_MEMCHECK1 10,11
H0_DR_MEMCHECK2 10,11
H0_DR_MEMCHECK3 10,11
H0_DR_MEMCHECK4 10,11
H0_DR_MEMCHECK5 10,11
H0_DR_MEMCHECK6 10,11
H0_DR_MEMCHECK7 10,11
H0_MEMCLK_H0 5
H0_MEMCLK_L0 5
H0_MEMRESET_L 5,10
H0_DR_MCKELO 10,11
H0_DR_MCKEUP 10,11
H0_DR_-MSCASA 10,11
H0_DR_-MSRASA 10,11
H0_DR_MDQS9 10,11
H0_DR_MDQS10 10,11
H0_DR_MDQS11 10,11
H0_DR_MDQS12 10,11
H0_DR_MDQS13 10,11
H0_DR_MDQS14 10,11
H0_DR_MDQS15 10,11
H0_DR_MDQS16 10,11
H0_DR_MDQS17 10,11
VDD_25_SUS
738467085
VDD0
VDD1
H0_DR_MD[127..64] 10,11
H0_DR_MD64
H0_DR_MD65
H0_DR_MD66
H0_DR_MD67
H0_DR_MD68
H0_DR_MD69
H0_DR_MD70
H0_DR_MD71
H0_DR_MD72
H0_DR_MD73
H0_DR_MD74
H0_DR_MD75
H0_DR_MD76
H0_DR_MD77
H0_DR_MD78
H0_DR_MD79
H0_DR_MD80
H0_DR_MD81
H0_DR_MD82
H0_DR_MD83
H0_DR_MD84
H0_DR_MD85
H0_DR_MD86
H0_DR_MD87
H0_DR_MD88
H0_DR_MD89
H0_DR_MD90
H0_DR_MD91
H0_DR_MD92
H0_DR_MD93
H0_DR_MD94
H0_DR_MD95
H0_DR_MD96
H0_DR_MD97
H0_DR_MD98
H0_DR_MD99
H0_DR_MD100
H0_DR_MD101
H0_DR_MD102
H0_DR_MD103
H0_DR_MD104
H0_DR_MD105
H0_DR_MD106
H0_DR_MD107
H0_DR_MD108
H0_DR_MD109
H0_DR_MD110
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD114
H0_DR_MD115
H0_DR_MD116
H0_DR_MD117
H0_DR_MD118
H0_DR_MD119
H0_DR_MD120
H0_DR_MD121
H0_DR_MD122
H0_DR_MD123
H0_DR_MD124
H0_DR_MD125
H0_DR_MD126
H0_DR_MD127
H0_DR_-MSWEA
DDR_VREF
1000P/50V/X7R
C360
VDD_25_SUS
C361
1000P/50V/X7R
VDD2
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
SLAVE ADDRESS = 1010001B
102
NC4
Channel B
108
120
148
168223054627796
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
DDR DIMM
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
3111826344250586674818993
VSS10
104
VDDQ5
VSS11
112
VDDQ6
VDDQ7
SOCKET
VSS12
VSS13
100
128
116
136
VDDQ8
184
VSS14
124
143
VDDQ9
VDDQ10
VSS15
VSS16
132
156
164
VDDQ11
PIN
VSS17
139
145
172
VDDQ12
VDDQ13
VSS18
VSS19
152
1801582
VDDQ14
VDDQ15
NC(RESET#)
VSS20
VSS21
160
176
VDDID
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
FETEN
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CKE0
CKE1
CAS#
RAS#
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR2
DDRDIMM_184
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
H0_DR_MCKELO
H0_DR_MCKEUP
SMBCLK1
SMBDATA1
H0_DR_-MCS0 11
H0_DR_-MCS1 11
H0_DR_MDQS18 10,11
H0_DR_MDQS19 10,11
H0_DR_MDQS20 10,11
H0_DR_MDQS21 10,11
H0_DR_MDQS22 10,11
H0_DR_MDQS23 10,11
H0_DR_MDQS24 10,11
H0_DR_MDQS25 10,11
H0_DR_MDQS26 10,11
H0_DR_MAA13 10,11
H0_DR_MAA0 10,11
H0_DR_MAA1 10,11
H0_DR_MAA2 10,11
H0_DR_MAA3 10,11
H0_DR_MAA4 10,11
H0_DR_MAA5 10,11
H0_DR_MAA6 10,11
H0_DR_MAA7 10,11
H0_DR_MAA8 10,11
H0_DR_MAA9 10,11
H0_DR_MAA10 10,11
H0_DR_MAA11 10,11
H0_DR_MAA12 10,11
H0_DR_MEMBAKA0 10,11
H0_DR_MEMBAKA1 10,11
VDD_25_SUS
H0_DR_MEMCHECK8 10,11
H0_DR_MEMCHECK9 10,11
H0_DR_MEMCHECK10 10,11
H0_DR_MEMCHECK11 10,11
H0_DR_MEMCHECK12 10,11
H0_DR_MEMCHECK13 10,11
H0_DR_MEMCHECK14 10,11
H0_DR_MEMCHECK15 10,11
H0_MEMCLK_H2 5
H0_MEMCLK_L2 5
H0_MEMRESET_L 5,10
H0_DR_-MSCASA 10,11
H0_DR_-MSRASA 10,11
H0_DR_MDQS27 10,11
H0_DR_MDQS28 10,11
H0_DR_MDQS29 10,11
H0_DR_MDQS30 10,11
H0_DR_MDQS31 10,11
H0_DR_MDQS32 10,11
H0_DR_MDQS33 10,11
H0_DR_MDQS34 10,11
H0_DR_MDQS35 10,11
DDR_VREF VDD_25_SUS
C362
R382
100RST
0.1u
C363
A A
5
4
R383
100RST
C364
1000P/50V/X7R
0.1u
Micro Star Restricted Secret
Title
CPU0 Register DDR DIMM1 & 2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
MS-9130
1
Last Revision Date:
Sheet
Thursday, July 17, 2003
9 41
of
Rev
100
Page 10
5
4
3
2
1
Registered DDR333 SDRAM
Sockets
Channel A
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
C368
101
102
1000P/50V/X7R
VDD_25_SUS
738467085
VDD0
VDD1
VDD2
VDD3
2
DQ0
4
DQ1
6
DQ2
8
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
1
VREF
9
NC2
NC3
SLAVE ADDRESS = 1010011B
NC4
VSS0
3111826344250586674818993
VDD_25_SUS
D D
H0_DR_MD[63..0] 9,11
C C
B B
H0_DR_-MSWEA 9,11
H0_DR_MD0
H0_DR_MD1
H0_DR_MD2
H0_DR_MD3
H0_DR_MD4
H0_DR_MD5
H0_DR_MD6
H0_DR_MD7
H0_DR_MD8
H0_DR_MD9
H0_DR_MD10
H0_DR_MD11
H0_DR_MD12
H0_DR_MD13
H0_DR_MD14
H0_DR_MD15
H0_DR_MD16
H0_DR_MD17
H0_DR_MD18
H0_DR_MD19
H0_DR_MD20
H0_DR_MD21
H0_DR_MD22
H0_DR_MD23
H0_DR_MD24
H0_DR_MD25
H0_DR_MD26
H0_DR_MD27
H0_DR_MD28
H0_DR_MD29
H0_DR_MD30
H0_DR_MD31
H0_DR_MD32
H0_DR_MD33
H0_DR_MD34
H0_DR_MD35
H0_DR_MD36
H0_DR_MD37
H0_DR_MD38
H0_DR_MD39
H0_DR_MD40
H0_DR_MD41
H0_DR_MD42
H0_DR_MD43
H0_DR_MD44
H0_DR_MD45
H0_DR_MD46
H0_DR_MD47
H0_DR_MD48
H0_DR_MD49
H0_DR_MD50
H0_DR_MD51
H0_DR_MD52
H0_DR_MD53
H0_DR_MD54
H0_DR_MD55
H0_DR_MD56
H0_DR_MD57
H0_DR_MD58
H0_DR_MD59
H0_DR_MD60
H0_DR_MD61
H0_DR_MD62
H0_DR_MD63
DDR_VREF
C365
1000P/50V/X7R
C366
1000P/50V/X7R
VDD_25_SUS VDD_25_SUS
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VDDQ2
VSS8
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
SLAVE ADDRESS = 1010010B
102
NC4
VSS0
VSS1
3111826344250586674818993
104
112
128
136
143
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
184 PIN
DDR DIMM
SOCKET
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
100
116
124
132
156
164
VDDQ10
VDDQ11
VSS16
VSS17
139
145
172
1801582
VDDQ12
VDDQ13
VSS18
VSS19
152
160
VDDQ14
VSS20
176
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
VSS21
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR3
DDRDIMM_184
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
SMBCLK1
SMBDATA1
H0_DR_-MCS2 11
H0_DR_MDQS0 9,11
H0_DR_MDQS1 9,11
H0_DR_MDQS2 9,11
H0_DR_MDQS3 9,11
H0_DR_MDQS4 9,11
H0_DR_MDQS5 9,11
H0_DR_MDQS6 9,11
H0_DR_MDQS7 9,11
H0_DR_MDQS8 9,11
H0_DR_MAA13 9,11
H0_DR_MAA0 9,11
H0_DR_MAA1 9,11
H0_DR_MAA2 9,11
H0_DR_MAA3 9,11
H0_DR_MAA4 9,11
H0_DR_MAA5 9,11
H0_DR_MAA6 9,11
H0_DR_MAA7 9,11
H0_DR_MAA8 9,11
H0_DR_MAA9 9,11
H0_DR_MAA10 9,11
H0_DR_MAA11 9,11
H0_DR_MAA12 9,11
H0_DR_MEMBAKA0 9,11
H0_DR_MEMBAKA1 9,11
VDD_25_SUS
H0_DR_MEMCHECK0 9,11
H0_DR_MEMCHECK1 9,11
H0_DR_MEMCHECK2 9,11
H0_DR_MEMCHECK3 9,11
H0_DR_MEMCHECK4 9,11
H0_DR_MEMCHECK5 9,11
H0_DR_MEMCHECK6 9,11
H0_DR_MEMCHECK7 9,11
H0_MEMCLK_H1 5
H0_MEMCLK_L1 5
H0_MEMRESET_L 5,9
H0_DR_MCKELO 9,11
H0_DR_MCKEUP 9,11
H0_DR_-MSCASA 9,11
H0_DR_-MSRASA 9,11
H0_DR_MDQS9 9,11
H0_DR_MDQS10 9,11
H0_DR_MDQS11 9,11
H0_DR_MDQS12 9,11
H0_DR_MDQS13 9,11
H0_DR_MDQS14 9,11
H0_DR_MDQS15 9,11
H0_DR_MDQS16 9,11
H0_DR_MDQS17 9,11
DDR_VREF
DDR_VREF
1000P/50V/X7R
H0_DR_MD64
H0_DR_MD65
H0_DR_MD66
H0_DR_MD67
H0_DR_MD68
H0_DR_MD69
H0_DR_MD70
H0_DR_MD71
H0_DR_MD72
H0_DR_MD73
H0_DR_MD74
H0_DR_MD75
H0_DR_MD76
H0_DR_MD77
H0_DR_MD78
H0_DR_MD79
H0_DR_MD80
H0_DR_MD81
H0_DR_MD82
H0_DR_MD83
H0_DR_MD84
H0_DR_MD85
H0_DR_MD86
H0_DR_MD87
H0_DR_MD88
H0_DR_MD89
H0_DR_MD90
H0_DR_MD91
H0_DR_MD92
H0_DR_MD93
H0_DR_MD94
H0_DR_MD95
H0_DR_MD96
H0_DR_MD97
H0_DR_MD98
H0_DR_MD99
H0_DR_MD100
H0_DR_MD101
H0_DR_MD102
H0_DR_MD103
H0_DR_MD104
H0_DR_MD105
H0_DR_MD106
H0_DR_MD107
H0_DR_MD108
H0_DR_MD109
H0_DR_MD110
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD114
H0_DR_MD115
H0_DR_MD116
H0_DR_MD117
H0_DR_MD118
H0_DR_MD119
H0_DR_MD120
H0_DR_MD121
H0_DR_MD122
H0_DR_MD123
H0_DR_MD124
H0_DR_MD125
H0_DR_MD126
H0_DR_MD127
C367
H0_DR_MD[127..64] 9,11
H0_DR_-MSWEA 9,11
VDD4
VSS1
108
VDD5
VSS2
120
148
168223054627796
VDD6
VDD7
VDD8
VSS3
VSS4
VSS5
Channel B
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
DDR DIMM
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
104
112
128
136
143
156
164
172
1801582
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
184 PIN
SOCKET
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
100
VSS20
116
124
132
139
145
152
160
176
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
VSS21
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR4
DDRDIMM_184
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
H0_DR_MCKELO
21
H0_DR_MCKEUP
111
65
154
97
107
119
129
149
159
169
177
140
SMBCLK1
SMBDATA1
H0_DR_-MCS2 11
H0_DR_-MCS3 11 H0_DR_-MCS3 11
H0_DR_MDQS18 9,11
H0_DR_MDQS19 9,11
H0_DR_MDQS20 9,11
H0_DR_MDQS21 9,11
H0_DR_MDQS22 9,11
H0_DR_MDQS23 9,11
H0_DR_MDQS24 9,11
H0_DR_MDQS25 9,11
H0_DR_MDQS26 9,11
H0_DR_MAA13 9,11
H0_DR_MAA0 9,11
H0_DR_MAA1 9,11
H0_DR_MAA2 9,11
H0_DR_MAA3 9,11
H0_DR_MAA4 9,11
H0_DR_MAA5 9,11
H0_DR_MAA6 9,11
H0_DR_MAA7 9,11
H0_DR_MAA8 9,11
H0_DR_MAA9 9,11
H0_DR_MAA10 9,11
H0_DR_MAA11 9,11
H0_DR_MAA12 9,11
H0_DR_MEMBAKA0 9,11
H0_DR_MEMBAKA1 9,11
SMBCLK1 4,9,22,24,25,35,37
SMBDATA1 4,9,22,24,25,35,37
VDD_25_SUS
H0_DR_MEMCHECK8 9,11
H0_DR_MEMCHECK9 9,11
H0_DR_MEMCHECK10 9,11
H0_DR_MEMCHECK11 9,11
H0_DR_MEMCHECK12 9,11
H0_DR_MEMCHECK13 9,11
H0_DR_MEMCHECK14 9,11
H0_DR_MEMCHECK15 9,11
H0_MEMCLK_H3 5
H0_MEMCLK_L3 5
H0_MEMRESET_L 5,9
H0_DR_-MSCASA 9,11
H0_DR_-MSRASA 9,11
H0_DR_MDQS27 9,11
H0_DR_MDQS28 9,11
H0_DR_MDQS29 9,11
H0_DR_MDQS30 9,11
H0_DR_MDQS31 9,11
H0_DR_MDQS32 9,11
H0_DR_MDQS33 9,11
H0_DR_MDQS34 9,11
H0_DR_MDQS35 9,11
A A
5
4
C370
0.1u
3
C371
1000P/50V/X7R
Micro Star Restricted Secret
Title
Document Number
2
CPU0 Register DDR DIMM3,4
MS-9130
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
10 41
Rev
100
of
Page 11
5
DDR Terminations
VTT_DDR_SUS VTT_DDR_SUS
RN57 22_8P4R
1 2
3 4
5 6
7 8
RN61 22_8P4R
1 2
3 4
5 6
7 8
RN65 22_8P4R
1 2
3 4
5 6
7 8
RN69 22_8P4R
1 2
3 4
5 6
7 8
RN73 22_8P4R
1 2
3 4
5 6
7 8
RN80 22_8P4R
1 2
3 4
5 6
7 8
RN83 22_8P4R
1 2
3 4
5 6
7 8
RN87 22_8P4R
1 2
3 4
5 6
7 8
RN91 22_8P4R
1 2
3 4
5 6
7 8
RN95 22_8P4R
1 2
3 4
5 6
7 8
RN99 22_8P4R
1 2
3 4
5 6
7 8
RN103 22_8P4R
1 2
3 4
5 6
7 8
RN107 22_8P4R
1 2
3 4
5 6
7 8
RN111 22_8P4R
1 2
3 4
5 6
7 8
RN115 22_8P4R
1 2
3 4
5 6
7 8
RN119 22_8P4R
1 2
3 4
5 6
7 8
RN123 22_8P4R
1 2
3 4
5 6
7 8
RN127 22_8P4R
1 2
3 4
5 6
7 8
RN131 22_8P4R
1 2
3 4
5 6
7 8
RN135 22_8P4R
1 2
3 4
5 6
7 8
RN139 22_8P4R
1 2
3 4
5 6
7 8
RN143 22_8P4R
1 2
3 4
5 6
7 8
RN147 22_8P4R
1 2
3 4
5 6
7 8
RN151 22_8P4R
1 2
3 4
5 6
7 8
RN155 22_8P4R
1 2
3 4
5 6
7 8
RN159 22_8P4R
1 2
3 4
5 6
7 8
H0_DR_MD4
H0_DR_MD0
H0_DR_MD5
H0_DR_MD1
H0_DR_MDQS9
H0_DR_MDQS0
H0_DR_MD6
H0_DR_MD2
H0_DR_MD7
H0_DR_MD3
H0_DR_MD8
H0_DR_MD12
H0_DR_MD9
H0_DR_MD13
H0_DR_MDQS1
H0_DR_MDQS10
H0_DR_MD14
H0_DR_MD15 H0_MD15
H0_DR_MD10
H0_DR_MD11
H0_DR_MCKEUP
H0_DR_MCKELO
H0_DR_MD20
H0_DR_MD16
H0_DR_MD17
H0_DR_MD21
H0_DR_MDQS2
H0_DR_MDQS11
H0_DR_MAA12
H0_DR_MAA11
H0_DR_MAA9
H0_DR_MAA7
H0_DR_MD18
H0_DR_MD22
H0_DR_MD23
H0_DR_MD19
H0_DR_MD24
H0_DR_MD28
H0_DR_MD29
H0_DR_MD25
H0_DR_MDQS3
H0_DR_MDQS12
H0_DR_MD30
H0_DR_MD26
H0_DR_MAA3
H0_DR_MAA2
H0_DR_MAA1
H0_DR_MD27
H0_DR_MD31
H0_DR_MEMCHECK4
H0_DR_MEMCHECK5
H0_DR_MEMCHECK0
H0_DR_MEMCHECK1
H0_DR_MDQS8
H0_DR_MDQS17
H0_DR_MEMCHECK2
H0_DR_MEMCHECK6
H0_DR_MEMCHECK3
H0_DR_MEMCHECK7
H0_DR_MD32
H0_DR_MD36
H0_DR_MD37
H0_DR_MD33
H0_DR_MDQS4
H0_DR_MDQS13
H0_DR_MD34
H0_DR_MD38
H0_DR_MD39
H0_DR_MD35
H0_DR_MD44
H0_DR_MD40
H0_DR_MD45
H0_DR_MD41
H0_DR_MDQS14
H0_DR_MDQS5
H0_DR_MD42
H0_DR_MD46
H0_DR_MD43
H0_DR_MD47
H0_DR_-MCS1
H0_DR_-MCS2
H0_DR_-MCS3
H0_DR_MAA13
H0_DR_MD48
H0_DR_MD52
H0_DR_MD49
H0_DR_MD53
H0_DR_MDQS15
H0_DR_MD54
H0_DR_MDQS6
H0_DR_MD55
H0_DR_MD50
H0_DR_MD51
H0_DR_MD60
H0_DR_MD61
H0_DR_MD56
H0_DR_MD57
H0_DR_MDQS16
H0_DR_MD62
H0_DR_MDQS7
H0_DR_MD63
H0_DR_MD58
H0_DR_MD59
H0_MD4
H0_MD0
H0_MD5
H0_MD1
H0_MDQS9
H0_MDQS0
D D
H0_MD6
H0_MD2
H0_MD7
H0_MD3
H0_MD8
H0_MD12
H0_MD9
H0_MD13
H0_MDQS1
H0_MDQS10
H0_MD14
H0_MD10
H0_MD11
H0_MCKEUP
H0_MCKELO
H0_MD20
H0_MD16
H0_MD17
H0_MD21
H0_MDQS2
H0_MDQS11
H0_MAA12
H0_MAA11
H0_MAA9
H0_MAA7
H0_MD18
H0_MD22
H0_MD23
H0_MD19
H0_MD24
H0_MD28
H0_MD29
H0_MD25
H0_MDQS3
H0_MDQS12
H0_MD30
H0_MD26
C C
H0_MAA3
H0_MAA2
H0_MAA1
H0_MD27
H0_MD31
H0_MEMCHECK4
H0_MEMCHECK5
H0_MEMCHECK0
H0_MEMCHECK1
H0_MDQS8
H0_MDQS17
H0_MEMCHECK2
H0_MEMCHECK6
H0_MEMCHECK3
H0_MEMCHECK7
H0_MD32
H0_MD36
H0_MD37
H0_MD33
H0_MDQS4
H0_MDQS13
H0_MD34
H0_MD38
H0_MD39
H0_MD35
H0_MD44
H0_MD40
H0_MD45
H0_MD41
H0_MDQS14
H0_MDQS5
H0_MD42
H0_MD46
H0_MD43
H0_MD47
H0_-MCS1
H0_-MCS2
H0_-MCS3
H0_MAA13
B B
H0_MD48
H0_MD52
H0_MD49
H0_MD53
H0_MDQS15
H0_MD54
H0_MDQS6
H0_MD55
H0_MD50
H0_MD51
H0_MD60
H0_MD61
H0_MD56
H0_MD57
H0_MDQS16
H0_MD62
H0_MDQS7
H0_MD63
H0_MD58
H0_MD59
H0_DR_MD4
H0_DR_MD0
H0_DR_MD5
H0_DR_MD1
H0_DR_MDQS9
H0_DR_MDQS0
H0_DR_MD6
H0_DR_MD2
H0_DR_MD7
H0_DR_MD3
H0_DR_MD8
H0_DR_MD12
H0_DR_MD9
H0_DR_MD13
H0_DR_MDQS1
H0_DR_MDQS10
H0_DR_MD14
H0_DR_MD15
H0_DR_MD10
H0_DR_MCKEUP
H0_DR_MD11
H0_DR_MCKELO
H0_DR_MD20
H0_DR_MAA12
H0_DR_MD16
H0_DR_MD17
H0_DR_MD21
H0_DR_MDQS2
H0_DR_MAA11
H0_DR_MAA9
H0_DR_MDQS11
H0_DR_MD18
H0_DR_MD22
H0_DR_MAA8
H0_DR_MD23
H0_DR_MD19
H0_DR_MD24
H0_DR_MD28
H0_DR_MD29
H0_DR_MD25
H0_DR_MDQS3
H0_DR_MDQS12
H0_DR_MAA3
H0_DR_MD30
H0_DR_MD26
H0_DR_MD27
H0_DR_MAA2
H0_DR_MD31
H0_DR_MEMCHECK4
H0_DR_MEMCHECK5
H0_DR_MAA1
H0_DR_MEMCHECK0
H0_DR_MEMCHECK1
H0_DR_MDQS8
H0_DR_MAA0
H0_DR_MDQS17
H0_DR_MAA10
H0_DR_MEMCHECK2
H0_DR_MEMCHECK6
H0_DR_MEMCHECK3
H0_DR_MEMBAKA1
H0_DR_MEMCHECK7
H0_DR_MD32
H0_DR_MD36
H0_DR_MD37
H0_DR_MD33
H0_DR_MDQS4
H0_DR_MDQS13
H0_DR_MD34
H0_DR_MD38
H0_DR_MD39
H0_DR_MEMBAKA0
H0_DR_MD35
H0_DR_MD44
H0_DR_MD40
H0_DR_MD45
H0_DR_MD41
H0_DR_MDQS14
H0_DR_MDQS5
H0_DR_MD42
H0_DR_MD46
H0_DR_MD43
H0_DR_MD47
H0_DR_MD48
H0_DR_MD52
H0_DR_MD49
H0_DR_MD53
H0_DR_MAA13
H0_DR_MDQS15
H0_DR_MD54
H0_DR_MDQS6
H0_DR_MD55
H0_DR_MD50
H0_DR_MD51
H0_DR_MD60
H0_DR_MD61
H0_DR_MD56
H0_DR_MD57
H0_DR_MDQS16
H0_DR_MD62
H0_DR_MDQS7
H0_DR_MD63
H0_DR_MD58
H0_DR_MD59
RN58 47_8P4R
1 2
3 4
5 6
7 8
RN62 47_8P4R
1 2
3 4
5 6
7 8
RN66 47_8P4R
1 2
3 4
5 6
7 8
RN70 47_8P4R
1 2
3 4
5 6
7 8
RN74 47_8P4R
1 2
3 4
5 6
7 8
RN77 47_8P4R
1 2
3 4
5 6
7 8
RN84 47_8P4R
1 2
3 4
5 6
7 8
RN88 47_8P4R
1 2
3 4
5 6
7 8
RN92 47_8P4R
1 2
3 4
5 6
7 8
RN96 47_8P4R
1 2
3 4
5 6
7 8
RN100 47_8P4R
1 2
3 4
5 6
7 8
RN104 47_8P4R
1 2
3 4
5 6
7 8
RN108 47_8P4R
1 2
3 4
5 6
7 8
RN112 47_8P4R
1 2
3 4
5 6
7 8
RN116 47_8P4R
1 2
3 4
5 6
7 8
RN120 47_8P4R
1 2
3 4
5 6
7 8
RN124 47_8P4R
1 2
3 4
5 6
7 8
RN128 47_8P4R
1 2
3 4
5 6
7 8
RN132 47_8P4R
1 2
3 4
5 6
7 8
RN136 47_8P4R
1 2
3 4
5 6
7 8
RN140 47_8P4R
1 2
3 4
5 6
7 8
RN144 47_8P4R
1 2
3 4
5 6
7 8
RN148 47_8P4R
1 2
3 4
5 6
7 8
RN152 47_8P4R
1 2
3 4
5 6
7 8
RN156 47_8P4R
1 2
3 4
5 6
7 8
RN160 47_8P4R
1 2
3 4
5 6
7 8
4
RN59 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN63 (BOT)22_8P4R
H0_DR_MDQS27
7 8
H0_DR_MDQS18
5 6
3 4
1 2
RN67 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN71 (BOT)22_8P4R
7 8
5 6
H0_DR_MDQS19
3 4
H0_DR_MDQS28
1 2
RN75 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN78 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN81 (BOT)22_8P4R
H0_DR_MDQS20
7 8
H0_DR_MDQS29
5 6
3 4
1 2
RN85 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN89 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN93 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN97 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN101 (BOT)22_8P4R
H0_DR_MEMCHECK12
7 8
H0_DR_MEMCHECK13 H0_MEMCHECK13
5 6
H0_DR_MEMCHECK8
3 4
H0_DR_MEMCHECK9
1 2
RN105 (BOT)22_8P4R
H0_DR_MDQS35
7 8
H0_DR_MDQS26
5 6
H0_DR_MEMCHECK10
3 4
H0_DR_MEMCHECK11
1 2
RN109 (BOT)22_8P4R
7 8
5 6
H0_DR_MEMBAKA1
3 4
H0_DR_MEMBAKA0 H0_MEMBAKA0
1 2
RN113 (BOT)22_8P4R
H0_DR_MEMCHECK14
7 8
H0_DR_MEMCHECK15
5 6
3 4
1 2
RN117 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN121 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN125 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN129 (BOT)22_8P4R
H0_DR_-MSWEA
7 8
H0_DR_-MSCASA
5 6
H0_DR_-MSRASA
3 4
H0_DR_-MCS0
1 2
RN133 (BOT)22_8P4R
H0_DR_MDQS32
7 8
5 6
3 4
1 2
RN137 (BOT)22_8P4R
H0_DR_MD107
7 8
H0_DR_MD111
5 6
H0_DR_MD112
3 4
H0_DR_MD113
1 2
RN141 (BOT)22_8P4R
7 8
5 6
H0_DR_MDQS33
3 4
1 2
RN145 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN149 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN153 (BOT)22_8P4R
7 8
5 6
3 4
1 2
RN157 (BOT)22_8P4R
7 8
5 6
3 4
1 2
H0_DR_MD68
H0_DR_MD64 H0_MD64
H0_DR_MD69
H0_DR_MD65
H0_DR_MD70
H0_DR_MD66
H0_DR_MD71
H0_DR_MD67
H0_DR_MD72
H0_DR_MD76
H0_DR_MD73
H0_DR_MD77
H0_DR_MD78
H0_DR_MD79
H0_DR_MD74
H0_DR_MD75
H0_DR_MD84
H0_DR_MD80 H0_MD80
H0_DR_MD81 H0_MD81
H0_DR_MD85
H0_DR_MD82
H0_DR_MD86
H0_DR_MAA8
H0_DR_MAA5
H0_DR_MAA6
H0_DR_MAA4
H0_DR_MD83
H0_DR_MD87
H0_DR_MD88
H0_DR_MD92
H0_DR_MD93
H0_DR_MD89
H0_DR_MDQS21
H0_DR_MDQS30
H0_DR_MD94
H0_DR_MD90
H0_DR_MD91
H0_DR_MD95
H0_DR_MAA0
H0_DR_MD96 H0_MD96
H0_DR_MD101
H0_DR_MD97
H0_DR_MD98 H0_MD98
H0_DR_MDQS31
H0_DR_MD102
H0_DR_MD103 H0_MD103
H0_DR_MD99
H0_DR_MD108
H0_DR_MD104
H0_DR_MD109
H0_DR_MD105
H0_DR_MDQS23
H0_DR_MD106
H0_DR_MD110
H0_DR_MD116
H0_DR_MD117
H0_DR_MD118 H0_MD118
H0_DR_MDQS24
H0_DR_MD119
H0_DR_MD114
H0_DR_MD124 H0_MD124
H0_DR_MD121
H0_DR_MDQS34
H0_DR_MD126
H0_DR_MDQS25
H0_DR_MD127
H0_DR_MD122
H0_DR_MD123
H0_MD68
H0_MD69
H0_MD65
H0_MDQS27
H0_MDQS18
H0_MD70
H0_MD66
H0_MD71
H0_MD67
H0_MD72
H0_MD76
H0_MD73
H0_MD77
H0_MDQS19
H0_MDQS28
H0_MD78
H0_MD79
H0_MD74
H0_MD75
H0_MD84
H0_MD85
H0_MDQS20
H0_MDQS29
H0_MD82
H0_MD86
H0_MAA8
H0_MAA5
H0_MAA6
H0_MAA4
H0_MD83
H0_MD87
H0_MD88
H0_MD92
H0_MD93
H0_MD89
H0_MDQS21
H0_MDQS30
H0_MD94
H0_MD90
H0_MD91
H0_MD95
H0_MEMCHECK12
H0_MEMCHECK8
H0_MEMCHECK9
H0_MDQS35
H0_MDQS26
H0_MEMCHECK10
H0_MEMCHECK11
H0_MAA0
H0_MAA10 H0_DR_MAA10
H0_MEMBAKA1
H0_MEMCHECK14
H0_MEMCHECK15
H0_MD100 H0_DR_MD100
H0_MD101
H0_MD97
H0_MDQS22 H0_DR_MDQS22
H0_MDQS31
H0_MD102
H0_MD99
H0_MD108
H0_MD104
H0_MD109
H0_MD105
H0_-MSWEA
H0_-MSCASA
H0_-MSRASA
H0_-MCS0
H0_MDQS32
H0_MDQS23
H0_MD106
H0_MD110
H0_MD107
H0_MD111
H0_MD112
H0_MD113
H0_MD116
H0_MD117
H0_MDQS33
H0_MDQS24
H0_MD119
H0_MD114
H0_MD115 H0_DR_MD115
H0_MD125 H0_DR_MD125
H0_MD120 H0_DR_MD120
H0_MD121
H0_MDQS34
H0_MD126
H0_MDQS25
H0_MD127
H0_MD122
H0_MD123
H0_DR_MD68
H0_DR_MD64
H0_DR_MD69
H0_DR_MD65
H0_DR_MDQS27
H0_DR_MDQS18
H0_DR_MD70
H0_DR_MD66
H0_DR_MD71
H0_DR_MD67
H0_DR_MD72
H0_DR_MD76
H0_DR_MD73
H0_DR_MD77
H0_DR_MDQS19
H0_DR_MDQS28
H0_DR_MD78
H0_DR_MD79
H0_DR_MD74
H0_DR_MD75
H0_DR_MD84
H0_DR_MD80
H0_DR_MD81
H0_DR_MD85
H0_DR_MDQS20
H0_DR_MDQS29
H0_DR_MD82
H0_DR_MD86
H0_DR_MAA7
H0_DR_MD83
H0_DR_MD87
H0_DR_MAA5
H0_DR_MD88
H0_DR_MAA6
H0_DR_MD92
H0_DR_MD93
H0_DR_MD89
H0_DR_MDQS21
H0_DR_MDQS30
H0_DR_MAA4
H0_DR_MD94
H0_DR_MD90
H0_DR_MD91
H0_DR_MD95
H0_DR_MEMCHECK12
H0_DR_MEMCHECK13
H0_DR_MEMCHECK8
H0_DR_MEMCHECK9
H0_DR_MDQS35
H0_DR_MDQS26
H0_DR_MEMCHECK10
H0_DR_MEMCHECK11
H0_DR_MEMCHECK14
H0_DR_MEMCHECK15
H0_DR_MD96
H0_DR_MD100
H0_DR_MD101
H0_DR_MD97
H0_DR_MDQS22
H0_DR_MD98
H0_DR_MDQS31
H0_DR_MD102
H0_DR_MD103
H0_DR_MD99
H0_DR_MD108
H0_DR_MD104
H0_DR_-MSRASA
H0_DR_MD109
H0_DR_-MSWEA
H0_DR_MD105
H0_DR_-MSCASA
H0_DR_-MCS2
H0_DR_-MCS0
H0_DR_-MCS3
H0_DR_-MCS1
H0_DR_MDQS32
H0_DR_MDQS23
H0_DR_MD106
H0_DR_MD110
H0_DR_MD107
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD116
H0_DR_MD117
H0_DR_MDQS33
H0_DR_MD118
H0_DR_MDQS24
H0_DR_MD119
H0_DR_MD114
H0_DR_MD115
H0_DR_MD124
H0_DR_MD125
H0_DR_MD120
H0_DR_MD121
H0_DR_MDQS34
H0_DR_MD126
H0_DR_MDQS25
H0_DR_MD127
H0_DR_MD122
H0_DR_MD123
RN60 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN64 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN68 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN72 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN76 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN79 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN82 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN86 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN90 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN94 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN98 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN102 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN106 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN110 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN114 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN118 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN122 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN126 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN130 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN134 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN138 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN142 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN146 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN150 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN154 (BOT)47_8P4R
7 8
5 6
3 4
1 2
RN158 (BOT)47_8P4R
7 8
5 6
3 4
1 2
3
LAYOUT:
Place alternating caps to GND and VDD_25_SUS
in a single line along VTT island.
VDD_25_SUS
VTT_DDR_SUS
VDD_25_SUS
VTT_DDR_SUS
VTT_DDR_SUS
VTT_DDR_SUS
VDD_25_SUS
C520
0.22u/16V/X7R
VTT_DDR_SUS
VDD_25_SUS
VDD_25_SUS
C400
0.1u
C434
0.1u
C466
0.1u
0.22u/16V/X7R
C543
4.7u/0805
VDD_25_SUS
C401
0.1u
C435
0.1u
C467
0.1u
C521
0.22u/16V/X7R
C535
C556
0.1u
C372
0.1u
C403
C402
0.1u
0.1u
C436
0.1u
C469
C468
0.1u
0.1u
C522
0.22u/16V/X7R
Put close to dimm
socket
C536
0.22u/16V/X7R
C544
4.7u/0805
C557
0.1u
C378
C374
C373
C376
C377
C375
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
C404
C405
C408
C407
C409
C406
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
C441
C442
C438
C440
C437
C439
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
C470
0.1u
AROUND VTT POWER RAIL BETWEEN DIMM AND CPU
C537
0.22u/16V/X7R
C545
4.7u/0805
These caps are at both
ends of dimm
C471
0.1u
C523
0.22u/16V/X7R
0.22u/16V/X7R
C546
4.7u/0805
C558
0.1u
C472
0.1u
C524
0.22u/16V/X7R
C538
C559
0.1u
C473
0.1u
C547
4.7u/0805
C474
0.1u
0.22u/16V/X7R
C539
0.22u/16V/X7R
C560
0.1u
C525
C548
4.7u/0805
C475
0.1u
2
LAYOUT:
Locate close to Sledgehammer
socket.
VTT_DDR_SUS VTT_DDR_SUS
CT8
100u/10V
C381
C383
C379
C380
0.1u
0.1u
C410
C411
0.1u
0.1u
C443
C444
0.1u
0.1u
C476
C477
0.1u
0.1u
C385
C382
C384
0.1u
0.1u
0.1u
0.1u
0.1u
C415
C416
C412
C414
C413
0.1u
0.1u
0.1u
0.1u
0.1u
C445
C446
C448
C447
C449
0.1u
0.1u
0.1u
0.1u
0.1u
C481
C478
C480
C479
C482
0.1u
0.1u
0.1u
0.1u
0.1u
LAYOUT:
Place alternating caps to GND and VDD_25_SUS
in a single line along VTT island.
VDD_25_SUS
VTT_DDR_SUS
VDD_25_SUS
VTT_DDR_SUS
VTT_DDR_SUS
VTT_DDR_SUS
C387
C386
(BOT)0.1u
(BOT)0.1u
C419
C421
C417
C418
C420
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C451
C453
C450
C452
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C487
C485
C486
C483
C484
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C388
C389
(BOT)0.1u
(BOT)0.1u
C422
C423
(BOT)0.1u
(BOT)0.1u
C454
C455
(BOT)0.1u
(BOT)0.1u
C489
C488
(BOT)0.1u
(BOT)0.1u
PLEASE ON SOLDER SIDE
C526
0.22u/16V/X7R
C527
0.22u/16V/X7R
C528
0.22u/16V/X7R
C529
0.22u/16V/X7R
VTT_DDR_SUS
VTT_DDR_SUS
CT12
4.7u/0805
C500
1000P/50V/X7R
CT13
4.7u/0805
VTT_DDR_SUS
C507
C508
C506
4.7u/6.3V/X5R-0805
4.7u/6.3V/X5R-0805
4.7u/6.3V/X5R-0805
VTT_DDR_SUS
C513
C514
0.22u/16V/X7R
0.22u/16V/X7R
0.22u/16V/X7R
These caps are along the path from
regulator to CPU
???
VTT_DDR_SUS
C540
0.22u/16V/X7R
C541
0.22u/16V/X7R
0.22u/16V
C530
0.22u/16V
C533
C531
C532
0.22u/16V
0.22u/16V
EMI components
C542
4.7u/0805
C561
C562
0.1u
0.1u
C667
4.7u/0805
C563
0.1u
C668
4.7u/0805
C669
4.7u/0805
5/14
VDD_25_SUS
4.7u/35V-1206
C553
VDD_25_SUS VDD_25_SUS
C565
C564
0.22u/16V
0.22u/16V
LAYOUT:
Locate close to Clawhammer socket.
C392
C391
C390
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C426
C424
C425
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C456
C457
C458
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C491
C490
C492
(BOT)0.1u
(BOT)0.1u
(BOT)0.1u
C510
C509
4.7u/6.3V/X5R-0805
4.7u/6.3V/X5R-0805
C515
C516
0.22u/16V/X7R
0.22u/16V/X7R
C534
0.22u/16V
1
CT11
100u/10V
C394
C393
(BOT)0.1u
(BOT)0.1u
C428
C427
(BOT)0.1u
(BOT)0.1u
C459
C460
(BOT)0.1u
(BOT)0.1u
C493
C494
(BOT)0.1u
(BOT)0.1u
C517
VTT_DDR_SUS
0.22u/16V
EC57
X_1200u/4V
C395
(BOT)0.1u
C429
(BOT)0.1u
C461
(BOT)0.1u
C495
(BOT)0.1u
C511
4.7u/6.3V/X5R-0805
C519
0.22u/16V/X7R
C501
C502
0.22u/16V
EC58
X_1200u/4V
C397
C396
(BOT)0.1u
(BOT)0.1u
C430
C431
(BOT)0.1u
(BOT)0.1u
C462
C463
(BOT)0.1u
(BOT)0.1u
C497
C496
(BOT)0.1u
(BOT)0.1u
C512
4.7u/6.3V/X5R-0805
C503
0.22u/16V
C398
(BOT)0.1u
C432
(BOT)0.1u
C464
(BOT)0.1u
C498
(BOT)0.1u
0.22u/16V/X7R
solder side
C504
0.22u/16V
EC19
1000U/6.3V
C399
(BOT)0.1u
C433
(BOT)0.1u
C465
(BOT)0.1u
C499
(BOT)0.1u
C518
C505
0.22u/16V
EC22
+
+
1000U/6.3V
Co-layout Co-layout
H0_MDQS[35..0]
H0_MDQS[35..0] 5
H0_MD[127..0]
H0_MD[127..0] 5
H0_MEMCHECK[15..0]
H0_MEMCHECK[15..0] 5
H0_MAA[13..0]
A A
5
H0_MAA[13..0] 5
H0_-MCS[3..0]
H0_-MCS[3..0] 5
H0_MCKELO 5 H0_DR_MCKELO 9,10
H0_MCKEUP
H0_MCKEUP 5
H0_MEMBAKA0
H0_MEMBAKA0 5
H0_MEMBAKA1
H0_MEMBAKA1 5
H0_-MSRASA
H0_-MSRASA 5
H0_-MSCASA
H0_-MSCASA 5
H0_-MSWEA
H0_-MSWEA 5
4
H0_DR_MEMCHECK[15..0] 9,10
H0_DR_MDQS[35..0]
H0_DR_MDQS[35..0] 9,10
H0_DR_MD[127..0]
H0_DR_MD[127..0] 9,10
H0_DR_MEMCHECK[15..0]
H0_DR_MAA[13..0]
H0_DR_MAA[13..0] 9,10
H0_DR_-MCS[3..0]
H0_DR_-MCS[3..0] 9,10
H0_DR_MCKELO H0_MCKELO
H0_DR_MCKEUP
H0_DR_MCKEUP 9,10
H0_DR_MEMBAKA0
H0_DR_MEMBAKA0 9,10
H0_DR_MEMBAKA1
H0_DR_MEMBAKA1 9,10
H0_DR_-MSRASA
H0_DR_-MSRASA 9,10
H0_DR_-MSCASA
H0_DR_-MSCASA 9,10
H0_DR_-MSWEA
H0_DR_-MSWEA 9,10
3
2
Micro Star Restricted Secret
Title
CPU DDR (termination)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
11 41
of
Rev
100
Page 12
5
VDD_12_A
K10
VLDT_1(1)
J11
VLDT_1(2)
H10
VLDT_1(3)
H8
VLDT_1(4)
K14
VLDT_1(5)
J15
VLDT_1(6)
K16
VLDT_1(7)
H0_CLKOUT1
H0_CLKOUT#1
H0_CLKOUT0
H0_CLKOUT#0
H0_CTLOUT0
H0_CTLOUT#0
J16
E14
E13
C15
D15
E16
E15
C17
D17
C19
D19
E20
E19
C21
D21
E22
E21
C14
B14
A16
A15
C16
B16
A18
A17
A20
A19
C20
B20
A22
A21
C22
B22
E18
E17
C18
B18
A14
A13
C13
D13
J9
VLDT_1(8)
VLDT_1(9)
L1_CADIN_H(15)
L1_CADIN_L(15)
L1_CADIN_H(14)
L1_CADIN_L(14)
L1_CADIN_H(13)
L1_CADIN_L(13)
L1_CADIN_H(12)
L1_CADIN_L(12)
L1_CADIN_H(11)
L1_CADIN_L(11)
L1_CADIN_H(10)
L1_CADIN_L(10)
L1_CADIN_H(9)
L1_CADIN_L(9)
L1_CADIN_H(8)
L1_CADIN_L(8)
L1_CADIN_H(7)
L1_CADIN_L(7)
L1_CADIN_H(6)
L1_CADIN_L(6)
L1_CADIN_H(5)
L1_CADIN_L(5)
L1_CADIN_H(4)
L1_CADIN_L(4)
L1_CADIN_H(3)
L1_CADIN_L(3)
L1_CADIN_H(2)
L1_CADIN_L(2)
L1_CADIN_H(1)
L1_CADIN_L(1)
L1_CADIN_H(0)
L1_CADIN_L(0)
L1_CLKIN_H(1)
L1_CLKIN_L(1)
L1_CLKIN_H(0)
L1_CLKIN_L(0)
L1_CTLIN_H(0)
L1_CTLIN_L(0)
L1_RSVD1
L1_RSVD2
D D
H0_CADOUT[15..0] 7
H0_CADOUT#[15..0] 7
H0_CLKOUT1 7
C C
H0_CLKOUT#1 7
H0_CLKOUT0 7
H0_CLKOUT#0 7
H0_CTLOUT0 7
H0_CTLOUT#0 7
H0_CADOUT15
H0_CADOUT#15
H0_CADOUT14
H0_CADOUT#14
H0_CADOUT13
H0_CADOUT#13
H0_CADOUT12
H0_CADOUT#12
H0_CADOUT11
H0_CADOUT#11
H0_CADOUT10
H0_CADOUT#10
H0_CADOUT9
H0_CADOUT#9
H0_CADOUT8
H0_CADOUT#8
H0_CADOUT7
H0_CADOUT#7
H0_CADOUT6
H0_CADOUT#6
H0_CADOUT5
H0_CADOUT#5
H0_CADOUT4
H0_CADOUT#4
H0_CADOUT3
H0_CADOUT#3
H0_CADOUT2
H0_CADOUT#2
H0_CADOUT1
H0_CADOUT#1
H0_CADOUT0
H0_CADOUT#0
U50E
L1_CADOUT_H(15)
L1_CADOUT_L(15)
L1_CADOUT_H(14)
L1_CADOUT_L(14)
L1_CADOUT_H(13)
L1_CADOUT_L(13)
L1_CADOUT_H(12)
L1_CADOUT_L(12)
L1_CADOUT_H(11)
L1_CADOUT_L(11)
L1_CADOUT_H(10)
L1_CADOUT_L(10)
L1_CADOUT_H(9)
L1_CADOUT_L(9)
L1_CADOUT_H(8)
L1_CADOUT_L(8)
L1_CADOUT_H(7)
L1_CADOUT_L(7)
L1_CADOUT_H(6)
L1_CADOUT_L(6)
L1_CADOUT_H(5)
L1_CADOUT_L(5)
L1_CADOUT_H(4)
L1_CADOUT_L(4)
L1_CADOUT_H(3)
L1_CADOUT_L(3)
L1_CADOUT_H(2)
L1_CADOUT_L(2)
L1_CADOUT_H(1)
L1_CADOUT_L(1)
L1_CADOUT_H(0)
L1_CADOUT_L(0)
L1_CLKOUT_H(1)
L1_CLKOUT_L(1)
L1_CLKOUT_H(0)
L1_CLKOUT_L(0)
L1_CTLOUT_H(0)
L1_CTLOUT_L(0)
SledgeHammer
VDD_12_A
C566
0.22u/16V/X7R
C567
0.22u/16V/X7R
C568
1000P/50V/X7R
C569
1000P/50V/X7R
C570
1000P/50V/X7R
C571
1000P/50V/X7R
SOLDER SIDE
B B
VDD_25_SUS
C574
R389
100RST
0.1u
C580
R391
100RST
A A
5
C581
1000P/50V/X7R
0.1u
L1_RSVD3
L1_RSVD4
C572
1000P/50V/X7R
C582
0.1u
D11
C11
E9
E10
D9
C9
E7
E8
E5
E6
D5
C5
E3
E4
D3
C3
A11
A12
B10
C10
A9
A10
B8
C8
B6
C6
A5
A6
B4
C4
A3
A4
D7
C7
A7
A8
B12
C12
E11
E12
4.7u/6.3V/X5R-0805
H1_VREF1_DDR
4
C573
4
H0_CADIN15
H0_CADIN#15
H0_CADIN14
H0_CADIN13
H0_CADIN12
H0_CADIN11
H0_CADIN10
H0_CADIN9
H0_CADIN8
H0_CADIN7
H0_CADIN6
H0_CADIN5
H0_CADIN4
H0_CADIN3
H0_CADIN2
H0_CADIN1
H0_CADIN#1
H0_CADIN0
H0_CADIN#0
C583
1000P/50V/X7R
closed to F22 PIN closed to AF22 PIN
H0_CADIN#14
H0_CADIN#13
H0_CADIN#12
H0_CADIN#11
H0_CADIN#10
H0_CADIN#9
H0_CADIN#8
H0_CADIN#7
H0_CADIN#6
H0_CADIN#5
H0_CADIN#4
H0_CADIN#3
H0_CADIN#2
H0_CLKIN1
H0_CLKIN#1
H0_CLKIN0
H0_CLKIN#0
H0_CTLIN0
H0_CTLIN#0
CT14
100u/10V
VTT_DDR_SUS
H0_CADIN#[15..0] 7
H0_CLKIN1 7
H0_CLKIN#1 7
H0_CLKIN0 7
H0_CLKIN#0 7
H0_CTLIN0 7
H0_CTLIN#0 7
C576
0.1u
H0_CADIN[15..0] 7
3
VTT_DDR_SUS
AC19
AE19
C578
C577
0.1u
C579
0.1u
0.1u
VTT_DDR_SUS
VDD_25_SUS
H1_VREF1_DDR
H1_VREF1_DDR
R386 X_51
R387 42.2RST
R388 42.2RST
VTT_SENSE 5
3
J19
H19
F20
G19
AE18
AC18
F21
AF18
AF19
AF17
AE16
F22
AF22
AG24
AH25
AG26
AH27
AF23
AH24
AF25
AJ26
AG27
AF26
AF28
AE29
AJ29
AH29
AE27
AD26
AD27
AC26
AA26
AA28
AD28
AC27
AB29
AA27
Y27
Y28
V28
U26
Y26
W27
V27
U27
P28
N29
M26
L28
P27
P26
M27
L27
K29
K27
H28
G29
L26
J28
H27
H26
F27
F26
D29
D27
G27
F28
E27
C27
C26
E25
D24
F23
E26
F25
E24
G23
R27
AG25
AF27
AB27
W29
N27
J27
E29
F24
R28
AF24
AG28
AC28
V26
M28
J26
E28
D25
U31
AJ25
AJ30
AD29
AA31
M30
H30
C30
B25
T31
AL25
AL29
AE31
Y29
M29
H29
C29
C25
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT_SENSE
MEMZN
MEMZP
MEMVREF0
MEMVREF1
MEMDATA(127)
MEMDATA(126)
MEMDATA(125)
MEMDATA(124)
MEMDATA(123)
MEMDATA(122)
MEMDATA(121)
MEMDATA(120)
MEMDATA(119)
MEMDATA(118)
MEMDATA(117)
MEMDATA(116)
MEMDATA(115)
MEMDATA(114)
MEMDATA(113)
MEMDATA(112)
MEMDATA(111)
MEMDATA(110)
MEMDATA(109)
MEMDATA(108)
MEMDATA(107)
MEMDATA(106)
MEMDATA(105)
MEMDATA(104)
MEMDATA(103)
MEMDATA(102)
MEMDATA(101)
MEMDATA(100)
MEMDATA(99)
MEMDATA(98)
MEMDATA(97)
MEMDATA(96)
MEMDATA(95)
MEMDATA(94)
MEMDATA(93)
MEMDATA(92)
MEMDATA(91)
MEMDATA(90)
MEMDATA(89)
MEMDATA(88)
MEMDATA(87)
MEMDATA(86)
MEMDATA(85)
MEMDATA(84)
MEMDATA(83)
MEMDATA(82)
MEMDATA(81)
MEMDATA(80)
MEMDATA(79)
MEMDATA(78)
MEMDATA(77)
MEMDATA(76)
MEMDATA(75)
MEMDATA(74)
MEMDATA(73)
MEMDATA(72)
MEMDATA(71)
MEMDATA(70)
MEMDATA(69)
MEMDATA(68)
MEMDATA(67)
MEMDATA(66)
MEMDATA(65)
MEMDATA(64)
MEMDQS(35)
MEMDQS(34)
MEMDQS(33)
MEMDQS(32)
MEMDQS(31)
MEMDQS(30)
MEMDQS(29)
MEMDQS(28)
MEMDQS(27)
MEMDQS(26)
MEMDQS(25)
MEMDQS(24)
MEMDQS(23)
MEMDQS(22)
MEMDQS(21)
MEMDQS(20)
MEMDQS(19)
MEMDQS(18)
MEMDQS(17)
MEMDQS(16)
MEMDQS(15)
MEMDQS(14)
MEMDQS(13)
MEMDQS(12)
MEMDQS(11)
MEMDQS(10)
MEMDQS(9)
MEMDQS(8)
MEMDQS(7)
MEMDQS(6)
MEMDQS(5)
MEMDQS(4)
MEMDQS(3)
MEMDQS(2)
MEMDQS(1)
MEMDQS(0)
2
SledgeHammer
2
U50B
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
MEMCLK_UP_H(2)
MEMCLK_UP_L(2)
MEMCLK_UP_H(1)
MEMCLK_UP_L(1)
MEMCLK_UP_H(0)
MEMCLK_UP_L(0)
MEMCLK_LO_H(3)
MEMCLK_LO_L(3)
MEMCLK_LO_H(2)
MEMCLK_LO_L(2)
MEMCLK_LO_H(1)
MEMCLK_LO_L(1)
MEMCLK_LO_H(0)
MEMCLK_LO_L(0)
RSVD_MA(15)
RSVD_MA(14)
MEMDATA(63)
MEMDATA(62)
MEMDATA(61)
MEMDATA(60)
MEMDATA(59)
MEMDATA(58)
MEMDATA(57)
MEMDATA(56)
MEMDATA(55)
MEMDATA(54)
MEMDATA(53)
MEMDATA(52)
MEMDATA(51)
MEMDATA(50)
MEMDATA(49)
MEMDATA(48)
MEMDATA(47)
MEMDATA(46)
MEMDATA(45)
MEMDATA(44)
MEMDATA(43)
MEMDATA(42)
MEMDATA(41)
MEMDATA(40)
MEMDATA(39)
MEMDATA(38)
MEMDATA(37)
MEMDATA(36)
MEMDATA(35)
MEMDATA(34)
MEMDATA(33)
MEMDATA(32)
MEMDATA(31)
MEMDATA(30)
MEMDATA(29)
MEMDATA(28)
MEMDATA(27)
MEMDATA(26)
MEMDATA(25)
MEMDATA(24)
MEMDATA(23)
MEMDATA(22)
MEMDATA(21)
MEMDATA(20)
MEMDATA(19)
MEMDATA(18)
MEMDATA(17)
MEMDATA(16)
MEMDATA(15)
MEMDATA(14)
MEMDATA(13)
MEMDATA(12)
MEMDATA(11)
MEMDATA(10)
MEMRESET_L
MEMCHECK(15)
MEMCHECK(14)
MEMCHECK(13)
MEMCHECK(12)
MEMCHECK(11)
MEMCHECK(10)
MEMCHECK(9)
MEMCHECK(8)
MEMCHECK(7)
MEMCHECK(6)
MEMCHECK(5)
MEMCHECK(4)
MEMCHECK(3)
MEMCHECK(2)
MEMCHECK(1)
MEMCHECK(0)
MEMCKE_UP
MEMCKE_LO
MEMADD(13)
MEMADD(12)
MEMADD(11)
MEMADD(10)
MEMADD(9)
MEMADD(8)
MEMADD(7)
MEMADD(6)
MEMADD(5)
MEMADD(4)
MEMADD(3)
MEMADD(2)
MEMADD(1)
MEMADD(0)
MEMDATA(9)
MEMDATA(8)
MEMDATA(7)
MEMDATA(6)
MEMDATA(5)
MEMDATA(4)
MEMDATA(3)
MEMDATA(2)
MEMDATA(1)
MEMDATA(0)
MEMBANK(1)
MEMBANK(0)
MEMRAS_L
MEMCAS_L
MEMWE_L
MEMCS_L(7)
MEMCS_L(6)
MEMCS_L(5)
MEMCS_L(4)
MEMCS_L(3)
MEMCS_L(2)
MEMCS_L(1)
MEMCS_L(0)
G20
G21
AE21
AE20
L24
L25
R23
T23
H23
J23
AD21
AD20
Y23
AA23
U25
U24
H24
H25
V23
M23
AE23
J24
J25
V24
K23
L23
K25
M25
M24
N25
N23
P23
T25
V25
AJ24
AK25
AK27
AJ27
AL24
AK24
AL26
AL27
AJ28
AK30
AJ31
AG29
AL28
AK28
AH31
AG30
AG31
AF30
AD31
AC30
AF29
AF31
AD30
AC29
AB31
AA29
Y31
W31
AC31
AA30
Y30
V29
P31
M31
L30
L29
P29
N31
L31
K31
J30
J29
G31
F29
J31
H31
F31
F30
D31
C31
B30
C28
E31
E30
A29
B28
B27
A26
C24
A24
A28
A27
A25
B24
G25
W25
W23
Y25
AA25
Y24
U28
T29
P24
P25
T27
R26
R25
R24
V30
U29
R30
P30
V31
U30
R29
R31
AD23
AE25
AD24
AD25
AC24
AC25
AB25
AA24
H1_MEMRESET1_L
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
CPU1_K8 DDR & HT
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
12 41
of
Rev
100
Page 13
5
4
3
2
1
H1_VDDA25
LAYOUT:
Route VDDA trace approx. 50 mils wide
(use 2x25 mil traces to exit ball) and
C585
3300p/50V/X7R
1000P/50V/X7R
C586
C584
D D
C C
B B
4.7u/6.3V/X5R-0805
CLKIN1_H
R402
(BOT)169RST
CLKIN1_L
C587
0.22u/16V
VDD_12_A
COREFB_H 6,19
COREFB_L 6,19
CPUCLK1_H 4
CPUCLK1_L 4
CT15
VDDA_25
TRST_L 6
-CPURST 6,39
-LDTSTOP 6,16,23
CPU_GD 6,37
100u/10V
TMS 6
TCK 6
500 mils long.
FB13 180nH/1210
R394 43.2RST
R396 43.2RST
R399 0
R401 0
TP21
3900P/50V/X7R
C588
C589
3900P/50V/X7R
TP37
TP38
TP39
H1_VDDA25
CLKIN1_H
CLKIN1_L
H1_NC_G14
H1_NC_H14
TMS
TCK
TRST_L
H1_TDI
H1_DBREQ_L
H1_SCANCLK1
H1_SCANCLK2
H1_SCANEN
H1_SSENA
H1_SSENB
H1_NC_T3
H1_NC_T4
H1_NC_AF13
H1_NC_AE14
AE10
AE11
AF11
AE13
AE12
AF13
AF15
AE14
G16
H16
G14
H14
AE6
AE7
AD7
AF7
G12
F12
C1
D2
C2
E1
D1
L7
L6
K7
J7
T3
T4
L8
K8
J6
VDDA1
VDDA2
VDDA3
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORESENSE_H
CLKIN_H
CLKIN_L
BYPASSCLK_H
BYPASSCLK_L
TMS
TCK
TRST_L
TDI
DBREQ_L
SCANCLK1
SCANCLK2
SCANEN
SCANSHIFTEN
SCANSHIFTENB
SCANIN_H
SCANIN_L
SINGLECHAIN
PLLCHRZ_H
PLLCHRZ_L
DCLKTWO
BURNIN_L
RESET_L
LDTSTOP_L
PWROK
U50C
THERMTRIP_L
THERMDA
THERMDC
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
FBCLKOUT_H
FBCLKOUT_L
DBRDY
SCANOUT_H
SCANOUT_L
TSTOUT
ANALOG3
ANALOG2
ANALOG1
ANALOG0
RSVD_SMBUSC
RSVD_SMBUSD
BP(3)
BP(2)
BP(1)
BP(0)
TDO
AE15
AJ1
AH1
G9
F9
G10
H11
G11
H13
G6
F7
H12
H1_FBCLKOUT_H
G18
H18
AE8
G8
V5
U5
H7
U2_T7
T7
U2_W6
W6
U2_R6
R6
U2_U6
U6
AF9
AE9
THERMTRIP_CPU_L
H1_BP3
H1_BP2
H1_BP1
H1_BP0
H1_FBCLKOUT_L
H1_DBRDY
THERMDA_CPU2 30,31
VTIN_GND 6,30
R393 0
R395 0
R397 0
R398 0
R400 0
R403
80.6RST
TP43
TP22
TP23
TP24
U2_R6
U2_T7
U2_W6
U2_U6
TP40
TP41
THERMTRIP_CPU1 6
H1_VID4 32
H1_VID3 32
H1_VID2 32
H1_VID1 32
H1_VID0 32
RN161
1 2
3 4
5 6
7 8
510_8P4R
modified on 1/30
LAYOUT:
Route FBCLKOUT_H/L differentially with
20/8/5/8/20 spacing and trace width.
STRAPPINGS
H1_NC_G14
H1_NC_AE14
H1_NC_AF13
H1_DBREQ_L
TMS
TCK
TRST_L
H1_TDI
H1_DBRDY
H1_NC_H14
H1_SCANEN
H1_SCANCLK1
H1_SCANCLK2
H1_SSENA
H1_SSENB
H1_BP0
H1_BP1
H1_BP2
H1_BP3
R404 820
R405 680
R406 680
R407 1K
R408 1K
R409 1K
R410 1K
R411 X_1K
R412 1K
R413 820
R414 680
R415 680
R416 680
R417 680
R418 680
R438 680
R439 680
R440 X_680
R441 X_680
VCC2_5
TP30
TP31
TP32
TP33
TP34
TP35
A A
5
TP36
AG1
FREE7
AH2
FREE11
H9
FREE15
AJ2
FREE12
AA6
FREE21
AC6
FREE1
N6
FREE3
SledgeHammer
4
3
H1_NC_T4
H1_NC_T3
49.9RST
R424
R422 49.9RST
R423 X_49.9RST
R425
X_49.9RST
VDD_12_A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
CPU1_K8 HDT 7 MISC
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
13 41
Rev
100
of
Page 14
5
4
3
2
1
VDD_12_A
C655 C654
1000P/50V/X7R
AB10
AC11
AD10
AD8
AB14
AC15
AB16
AC16
AC9
AG11
AG12
AJ10
AH10
AG9
AG10
AG5
AG6
AG3
AG4
AJ11
AK11
AL10
AG7
AG8
AL11
AL12
AJ12
AH12
AJ8
AH8
AJ6
AH6
AJ4
AH4
AL9
AJ9
AK9
AL7
AL8
AL5
AL6
AJ5
AK5
AL3
AL4
AJ3
AK3
AJ7
AK7
VLDT_2(1)
VLDT_2(2)
VLDT_2(3)
VLDT_2(4)
VLDT_2(5)
VLDT_2(6)
VLDT_2(7)
VLDT_2(8)
VLDT_2(9)
L2_CADIN_H(15)
L2_CADIN_L(15)
L2_CADIN_H(14)
L2_CADIN_L(14)
L2_CADIN_H(13)
L2_CADIN_L(13)
L2_CADIN_H(12)
L2_CADIN_L(12)
L2_CADIN_H(11)
L2_CADIN_L(11)
L2_CADIN_H(10)
L2_CADIN_L(10)
L2_CADIN_H(9)
L2_CADIN_L(9)
L2_CADIN_H(8)
L2_CADIN_L(8)
L2_CADIN_H(7)
L2_CADIN_L(7)
L2_CADIN_H(6)
L2_CADIN_L(6)
L2_CADIN_H(5)
L2_CADIN_L(5)
L2_CADIN_H(4)
L2_CADIN_L(4)
L2_CADIN_H(3)
L2_CADIN_L(3)
L2_CADIN_H(2)
L2_CADIN_L(2)
L2_CADIN_H(1)
L2_CADIN_L(1)
L2_CADIN_H(0)
L2_CADIN_L(0)
L2_CLKIN_H(1)
L2_CLKIN_L(1)
L2_CLKIN_H(0)
L2_CLKIN_L(0)
L2_CTLIN_H(0)
L2_CTLIN_L(0)
L2_RSVD1
L2_RSVD2
U50F
L2_CADOUT_H(15)
L2_CADOUT_L(15)
L2_CADOUT_H(14)
L2_CADOUT_L(14)
L2_CADOUT_H(13)
L2_CADOUT_L(13)
L2_CADOUT_H(12)
L2_CADOUT_L(12)
L2_CADOUT_H(11)
L2_CADOUT_L(11)
L2_CADOUT_H(10)
L2_CADOUT_L(10)
L2_CADOUT_H(9)
L2_CADOUT_L(9)
L2_CADOUT_H(8)
L2_CADOUT_L(8)
L2_CADOUT_H(7)
L2_CADOUT_L(7)
L2_CADOUT_H(6)
L2_CADOUT_L(6)
L2_CADOUT_H(5)
L2_CADOUT_L(5)
L2_CADOUT_H(4)
L2_CADOUT_L(4)
L2_CADOUT_H(3)
L2_CADOUT_L(3)
L2_CADOUT_H(2)
L2_CADOUT_L(2)
L2_CADOUT_H(1)
L2_CADOUT_L(1)
L2_CADOUT_H(0)
L2_CADOUT_L(0)
L2_CLKOUT_H(1)
L2_CLKOUT_L(1)
L2_CLKOUT_H(0)
L2_CLKOUT_L(0)
L2_CTLOUT_H(0)
L2_CTLOUT_L(0)
L2_RSVD3
L2_RSVD4
AH14
AJ14
AG16
AG15
AH16
AJ16
AG18
AG17
AG20
AG19
AH20
AJ20
AG22
AG21
AH22
AJ22
AL14
AL13
AK15
AJ15
AL16
AL15
AK17
AJ17
AK19
AJ19
AL20
AL19
AK21
AJ21
AL22
AL21
AH18
AJ18
AL18
AL17
AK13
AJ13
AG13
AG14
C653
VDD_12_A
N7
R7
U7
W7
M8
P8
AA7
V8
Y8
R5
T5
P3
P4
N5
P5
M3
M4
K3
K4
J5
K5
H3
H4
G5
H5
R3
R2
N1
P1
N3
N2
L1
M1
J1
K1
J3
J2
G1
H1
G3
G2
L5
M5
L3
L2
R1
T1
VLDT_0(1)
VLDT_0(2)
VLDT_0(3)
VLDT_0(4)
VLDT_0(5)
VLDT_0(6)
VLDT_0(7)
VLDT_0(8)
VLDT_0(9)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
U50A
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
V4
V3
Y5
W5
Y4
Y3
AB5
AA5
AD5
AC5
AD4
AD3
AF5
AE5
AF4
AF3
V1
U1
W2
W3
Y1
W1
AA2
AA3
AC2
AC3
AD1
AC1
AE2
AE3
AF1
AE1
AB4
AB3
AB1
AA1
U2
U3
4.7u/35V-1206
C591
0.22u/16V/X7R
D D
C652
0.22u/16V/X7R 1000P/50V/X7R
C C
B B
SledgeHammer
SledgeHammer
A A
Title
Document Number
5
4
3
2
Micro Star Restricted Secret
CPU1_K8_HT0 & HT2
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
14 41
1
Rev
100
of
Page 15
5
4
3
2
1
CPU
Place on inside of CPU Cavity ( 10 * 0.22uF/0603
D D
LAYOUT: Place inside of processor.
X_(BOT)SP-CAP,220u/2V
VCORE
C592
C593
X_(BOT)SP-CAP,220u/2V
C677
4.7u/1206
VCORE
4.7u/1206
C673
X7R high-freq decoupling Cap. )
BULK / Decopuling
VCORE
Place on CPU Solder side
0.22u/16V/X7R
C26
0.22u/16V/X7R
C27
0.22u/16V/X7R 6.8p/50V/NPO
EMI
VCORE
LAYOUT:
Place 1 capacitor every 1-1.5" along VDD_CORE
perimiter.
C595
C594
6.8p/50V/NPO
6.8p/50V/NPO
C596 C25
6.8p/50V/NPO
C597
6.8p/50V/NPO
C598
6.8p/50V/NPO
C599
6.8p/50V/NPO
C600
6.8p/50V/NPO
C601
C602
C603
6.8p/50V/NPO
6.8p/50V/NPO
C C
VDD_25_SUS VCORE
L19
W21
AA21
J21
M22
P22
T22
V22
Y22
AB22
AJ23
AA19
C23
E23
K26
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VSS12
VSS92
VSS13
VSS14
VSS15
VSS16
T13V2AB2
AF2
AK2B3AH3G4L4R4V13W4AC4F5D6H6M7
VDDIO13
VSS17
VDDIO14
VSS18
T26
VDDIO15
VDDIO16
VSS19
VSS20
U50D
B B
A A
F17
VDDIO1
VSS6
P19
VDDIO2
VSS7
VDDIO3
VDDIO4
VDDIO5
VSS8
VSS9
VSS10
N30F1F2K2P2
VDDIO6
VSS11
5
AE28
VDDIO17
VSS21
G26
N26
VDDIO18
VSS93
W26
VDDIO19
VDDIO20
VSS22
VSS23
VCORE
AE26
AG23
K20
D28
K28
T28
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VSS24
VSS25
VSS26
VSS27
VSS28
AB7Y6AD6
SKTOCC_1_L 32
LAYOUT: Place clolse to socket.
C609
C608
4.7u/35V-1206
4.7u/35V-1206
AB28
AH28
AH26
G28
N28
W28
AB26
AB20
L21
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VSS29
VSS30
VSS94
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
J17
AK6B7F14P7V7Y7M6
N21
R21
VDDIO35
VDDIO36
VDDIO37
VSS37
VSS95
VSS38
Y13N8R8U8W8
C610
4.7u/35V-1206
U21
H22
D26
VDDIO38
VDDIO40
VDDIO41
VSS39
VSS40
VSS41
C611
4.7u/35V-1206
K22
A23
U23
AL23
AC21
AD22
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO47
VSS42
VSS43
VSS44
VSS45
VSS46
AA8
AF8F8G17K9AB13M9P9
VDDIO48
VSS96
VSS47
C612
4.7u/35V-1206
AB23
AC23
VDDIOFB_L
VDDIOFB_H
VSS48
AF20
VDDIO_SENSE
VSS49
AC22Y9AB9
T9
4
C613
4.7u/35V-1206
VSS50
VSS51
VSS52
AD9
VSS53
4.7u/35V-1206
VSS54
D10
J10
VSS55
C614
V6
AD13
AD12H2AA4
VDD117
VSS97
L10
VDD118
VSS56
N10
VDD1
VSS57
R10
VDD2
VSS58
T18
V18
VDD3
VDD4
VSS59
VSS60
U10T6AA10
VCORE
C607
C605
C606
C604
1000P/50V/X7R
1000P/50V/X7R
VDD112
VSS168
AA17
G22
AH17
VDD113
VSS169
L22
M18
VDD114
VSS170
N22
VDD115
VSS171
P18
B26
VDD116
VSS189
R22
VSS172
U22
VSS173
SledgeHammer
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
W22
AA22
AE22
AK22
J22
AE24
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VSS180
VSS190
VSS181
AK26
B29
AK23
K24
Y18
K12
F19
N19
R19
U19
W19
D20
AE4
M20
P20
T20
V20
Y20
AK20
B21
AH21
AK4B5AH5K6P6T8AB6
AF6M2F6D8G7
AB8
VDD5
VSS61
AC10
VDD119
VSS62
AK8B9K18L9N9R9T2U9W9
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VSS63
VSS64
VSS98
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS99
VSS72
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS101
VSS90
VSS73
VSS74
VSS75
VSS76
VSS77
AK10
B11
L14
H15J8K11
M11
P11
T11
V11
N14
Y11
AA12
N16
AF12
F13
G15
F10
AD15
VSS78
K13
U14
M13
AB11
AD11
AH11
G13
J12
N12
R12
VDD35
VSS79
AA9
AB18
AH9
W13
M10
P10
T10
V10Y2Y10
AB12
AF10
F11
L11
N11
R11
U11
W11
AA11
AD2
D12
M12
P12
T12
V12
Y12
AC13
AK12
B13
L13D4N13
R13
U13
AA13
AH13
J13
M14
P14
T14J4V14
Y14
AD14
AF14
F15
L15
N15
R15
U15
W15N4AA15
D16
F18
M16
P16
T16
V16
Y16
AD16
AK16U4B17
L17
N17
R17
U17
W17
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
VDD93
VDD94
VDD95
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VSS80
VSS100
VSS81
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS182
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS183
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS184
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS185
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS186
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS187
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS188
VSS163
VSS164
VSS165
VSS166
U12
R14
W12
W14
AA14
AC14
AH15
AK14
B15
K15
M15
B23
P15
T15
V15
Y15
AB15
D14
J14
H17
G24
L16
R16
U16
W18
AA16
AC17
AF16
F16
K17
N24
M17
P17
T17
V17
Y17
AB17
AD17
D18
J18
W24
L18
N18
R18
U18
W10
AA18
AE17
AK18
B19
G30
K19
M19
T19
V19
Y19
AB19
AH19
J20
L20
W30
N20
R20
U20
W20
AA20
AC20
3
2
VSS167
AF21
K21
M21
AB24
P21
T21
V21
Y21
AB21
D22
1000P/50V/X7R
1000P/50V/X7R
AG2E2P13
W16
VSS5
VSS91
VSS203
VSS202
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS1
T24
VSS2
AE30
AK29
D30
K30
T30
AB30
AH30
AH7V9L12
Micro Star Restricted Secret
CPU1_K8 POWER & GND
MS-9130
Last Revision Date:
Sheet
1
D23
AH23
VSS200
VSS201
VSS3
VSS4
AC12
Thursday, July 17, 2003
15 41
of
Rev
100
Page 16
A
B
C
D
E
K8T400M HT Interface
VAVDD2
C242
VDD_12_A
VAVDD2
4 4
A10
A24
A25
A26
B10
B24
B26
C10
C24
C25
B23
VLDT
VLDT
B25
VLDT
VLDT
C9
VLDT
C11D9D10
VLDT
VLDT
From Claw Hammer
A9
B9
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
J10
L0_CADOUT#[15..0] 7
L0_CADOUT[15..0] 7
3 3
2 2
L0_CADOUT15
L0_CADOUT14
L0_CADOUT13
L0_CADOUT12
L0_CADOUT11
L0_CADOUT10
L0_CADOUT9
L0_CADOUT8
L0_CADOUT7
L0_CADOUT6
L0_CADOUT5
L0_CADOUT4
L0_CADOUT3
L0_CADOUT2
L0_CADOUT1
L0_CADOUT0
L0_CLKOUT1 7
L0_CLKOUT#1 7
L0_CLKOUT0 7
L0_CLKOUT#0 7
L0_CTLOUT0 7
L0_CTLOUT#0 7
L0_CADOUT#15
L0_CADOUT#14
L0_CADOUT#13
L0_CADOUT#12
L0_CADOUT#11
L0_CADOUT#10
L0_CADOUT#9
L0_CADOUT#8
L0_CADOUT#7
L0_CADOUT#6
L0_CADOUT#5
L0_CADOUT#4
L0_CADOUT#3
L0_CADOUT#2
L0_CADOUT#1
L0_CADOUT#0
L0_CLKOUT1
L0_CLKOUT#1
L0_CLKOUT0
L0_CLKOUT#0
L0_CTLOUT0
L0_CTLOUT#0
G24
RCADP15
G23
RCADN15
J22
RCADP14
H22
RCADN14
J24
RCADP13
J23
RCADN13
L22
RCADP12
K22
RCADN12
N22
RCADP11
M22
RCADN11
N24
RCADP10
N23
RCADN10
R22
RCADP9
P22
RCADN9
R24
RCADP8
R23
RCADN8
H26
RCADP7
G26
RCADN7
H24
RCADP6
H25
RCADN6
K26
RCADP5
J26
RCADN5
K24
RCADP4
K25
RCADN4
M24
RCADP3
M25
RCADN3
P26
RCADP2
N26
RCADN2
P24
RCADP1
P25
RCADN1
T26
RCADP0
R26
RCADN0
L24
RCLKP1
L23
RCLKN1
M26
RCLKP0
L26
RCLKN0
F24
RCTLP
F25
RCTLN
J18
VSS
F13
VSS
F18
VSS
K12
VSS
K13
VSS
K14
VSS
K15
VSS
K16
VSS
K17
VSS
D22
D23
D24
D11E9E10
C23
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
E22
E23
E24
F10
E11
VLDT
F15
F11
E21
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
F16
VLDT
G22
F21
F23
G21
F19
F22
H21
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
J11
VLDT
VLDT
F20
VLDT
H14
H17
C22 C21
H13
J14
VLDT
H18
J15
VLDT
NC_H14
NC_H17
NC_H13
TCADP15
TCADN15
TCADP14
TCADN14
TCADP13
TCADN13
TCADP12
TCADN12
TCADP11
TCADN11
TCADP10
TCADN10
RNCOMP
RTCOMP
RPCOMP
LDTSTOP
NC_H18
TCADP9
TCADN9
TCADP8
TCADN8
TCADP7
TCADN7
TCADP6
TCADN6
TCADP5
TCADN5
TCADP4
TCADN4
TCADP3
TCADN3
TCADP2
TCADN2
TCADP1
TCADN1
TCADP0
TCADN0
TCLKP1
TCLKN1
TCLKP0
TCLKN0
TCTLP
TCTLN
LDTRST
AVDD2 AVSS2
E20
D21
D19
C19
E18
E19
D17
C17
D15
C15
E14
E15
D13
C13
E12
E13
B20
C20
A19
A20
B18
C18
A17
A18
A15
A16
B14
C14
A13
A14
B12
C12
E16
E17
B16
C16
A21
A22
D26
C26
D25
B11
A12
U19A
X_K8T400M_#A
B01-0838505-V01
L0_CADIN#15
L0_CADIN#14
L0_CADIN#13
L0_CADIN#12
L0_CADIN#11
L0_CADIN#10
L0_CADIN#9
L0_CADIN#8
L0_CADIN#7
L0_CADIN#6
L0_CADIN#5
L0_CADIN#4
L0_CADIN#3
L0_CADIN#2
L0_CADIN#1
L0_CADIN#0
L0_CLKIN1
L0_CLKIN#1
L0_CLKIN0
L0_CLKIN#0
L0_CTLIN0
L0_CTLIN#0
PNCOMP
RTCOMP
RPCOMP
-LDTRST
-LDTSTOP
L0_CADIN15
L0_CADIN14
L0_CADIN13
L0_CADIN12
L0_CADIN11
L0_CADIN10
L0_CADIN9
L0_CADIN8
L0_CADIN7
L0_CADIN6
L0_CADIN5
L0_CADIN4
L0_CADIN3
L0_CADIN2
L0_CADIN1
L0_CADIN0
L0_CLKIN1 7
L0_CLKIN#1 7
L0_CLKIN0 7
L0_CLKIN#0 7
L0_CTLIN0 7
L0_CTLIN#0 7
-LDTRST 39
-LDTSTOP 6,13,23
J12
J13
VLDT
VLDT
X_103P
VAGND2
L0_CADIN#[15..0] 7
L0_CADIN[15..0] 7
C658
CP26 X_COPPER
104P
CP27 X_COPPER
To Claw
Hammer
FB16 X_120S/0805
FB17 X_120S/0805
PNCOMP
RTCOMP
RPCOMP
C659
104P
C243 104P
Around NB
C244
X_104P/BACK
Decoupling capacitors
at NB BGA Area (On
Solder Layer)
R264 49.9RST
R265 100RST
R266 49.9RST
VCC3
VDD_12_A
VDD_12_A
VDD_12_A
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
J16
M18
N18
J17
N21
K18
K21
L21
L18
VLDT
P18
P21
R18
T18
T21
T23
T24
T25
U18
U21
U22
U23
T22
U24
U25
VLDT
VLDT
U26
V21
V22
V23
V24
V25
V26
VLDT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K10
L10
K11
VSS
M10
N10
P10
R10
T10
U10
NC_K8
K8
L8
NC_L8
J19
NC_N19
NC_J19
N19
NC_P19
P19
NC_P2
P2
NC_P3
P3
NC_P4
P4
VDD_12_A
VAGND2
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
VT8387 PART I
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
16 41
E
Rev
100
of
Page 17
A
K8T400M AGP 8X ,V-Link, Misc. Control
VCC2_5
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
AF18
AD18
AE18
AF17
AD17
AD16
AE16
AF16
AF14
AD14
AD13
AE13
AF13
AD12
AF12
AE12
AD10
AE10
AF10
AD15
AF11
AD11
AE15
AF15
AC10
AC14
AC11
AC12
AC16
AC15
AC13
W14
W13
W12
AD9
AF9
AF8
AE9
AD8
AF6
AD7
AE6
AD5
AF5
AF4
AE4
AD4
AC2
AC3
AD1
AD2
AF2
AD3
AE3
AF3
AC7
AE7
AF7
AF1
AE1
AC5
AC4
AC9
AD6
AC1
AA3
AA2
AA1
AB1
AC6
4 4
GAD[31:0] 20
3 3
SBA0 20
SBA1 20
SBA2 20
SBA3 20
SBA4 20
SBA5 20
SBA6 20
SBA7 20
GC/BE#0 20
GC/BE#1 20
GC/BE#2 20
GC/BE#3 20
AD_STBF0 20
AD_STBS0 20
AD_STBF1 20
AD_STBS1 20
SB_STBF 20
2 2
1 1
SB_STBS 20
GFRAME 20
GIRDY 20
GTRDY 20
GDEVSEL 20
GSTOP 20
GSERR 20
AGP8XDET# 20
GCLK_NB 4
AGPVREF_GC 20
AD_STBF0
AD_STBS0
AD_STBF1
AD_STBS1
SB_STBF
SB_STBS
DBIH
DBIH 20
DBIL
DBIL 20
GPAR 20
RBF 20
WBF 20
GREQ 20
GGNT 20
ST0 20
ST1 20
ST2 20
AGPPCOMP
AGPNCOMP AGPPCOMP
AGPVREF_GC
A
A11
U1T2T3T4T5T8T9U2U3U4U5U8U9V2V3
M8
VCCQQ
N8
VCC1
VCC1
Y1
Y2
V1
W1
VDD
VDD
VDD
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
C/BE0
C/BE1
C/BE2
C/BE3
AD_STBF0
AD_STBS0
AD_STBF1
AD_STBS1
SB_STBF
SB_STBS
DBIH
DBIL
GFRAME
GIRDY
GTRDY
GDEVSEL
GSTOP
GPAR
RBF
WBF
GREQ
GGNT
GSERR
AGP8XDET
ST0
ST1
ST2
GCLK
AGPPCOMP
AGPNCOMP
AGPVREF0
AGPVREF1
VCC1
VCC1
VCC1
T1
VCC1
VCC1
VSSQQ
VCC1
VSS
P5R1R2R3R4
A8
VCC1
VSS
VCC1
VSS
VCC1
VSS
VCC1
VSS
VCC1
VSS
R5
VCC1
VSS
R21
B
VCC1
VSS
B
V4V5V8
VCC1
VSS
VCC1
VSS
W21
V9
VCC1
VSS
W22
V10
VCC1
VSS
W23
V11
VCC1
VSS
W24
V12
VCC1
VSS
W25
VDDQ
V13W2W3
VCC1
VCC1
VSS
VSS
W26
VCC1
VSS
AB2
VCC1
VSS
AB3
W4W5W9
VCC1
VSS
AB4
VCC1
VSS
AB5
Y3Y4Y5
VCC1
VSS
AB6
AB9
VCC1
VSS
AB10
AA4
VCC1
VSS
AB15
AA5
VCC1
VSS
AB16
AB7
VCC1
VSS
AC8
AB8
VCC1
VSS
AC24
AB11
VCC1
VSS
AE2
AB12
VCC1
VSS
AE5
AB13
VCC1
VSS
AE8
AB14
VCC1
VSS
AE11
VCC1
VSS
AE14
VSS
AE17
VSS
AE20
VSS
VSS
AE22
VSS
AE25
AVSS1
E26
C
C
VSUS2_5
E25
AVDD1
PWRGD
RESET
TESTIN
SUSST
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VPAR
LVREF
LCOMPP
UPCMD
DNCMD
DNSTB
DNSTB
UPSTB
UPSTB
DEBUG
PIPE#
RSVD3
RSVD0
RSVD2
RSVD6
RSVD5
NC_M5
NC_N1
NC_N2
NC_N3
NC_N4
NC_N5
NC_P1
NC_L5
NC_W8
NC_Y8
NC_Y9
NC_Y10
VAGND1
VAVDD1
AC25
VSUS25
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
AE26
AD25
AC26
AD26
V14
V15
V16
V17
W15
W16
W17
W18
AB17
AB18
AB19
AB20
AC18
AC19
AC20
AC21
AD20
AD21
AF24
AE24
AE19
AF20
AD24
AF25
AE21
AF19
AF21
AD19
AF26
AD23
AF22
AD22
AE23
AF23
AC17
M1
L3
L4
M2
M3
M4
M5
N1
N2
N3
N4
N5
P1
L5
W8
Y8
Y9
Y10
U19B
X_K8T400M_#A
B01-0838505-V01
TESTIN
LVREF_NB
LCOMPP
DEBUG
PWROK_NB# 22
PCIDEVRST# 30,32,35,37
SUSST# 22
VCC2_5
VLAD0 23
VLAD1 23
VLAD2 23
VLAD3 23
VLAD4 23
VLAD5 23
VLAD6 23
VLAD7 23
VBE0# 23
VPAR 23
UPCMD 23
DNCMD 23
DNSTB 23
DNSTB# 23
UPSTB 23
UPSTB# 23
R258 10K
VAVDD1
VAGND1
D
C656
C228
104P
X_103P
The voltage level of
LVREF_NB is
0.625V
D
FB14 X_120S/0805
CP24 X_COPPER
FB15 X_120S/0805
CP25 X_COPPER
VSUS2_5
C229
104P
VCC3
C657
104P
LAYOUT: Place caps on the bottom of NB
C232 104P/BACK
C233 104P/BACK
C234 X_104P/BACK
C235 X_104P/BACK
C236 X_104P/BACK
C237 X_104P/BACK
C238 X_104P/BACK
C239 104P/BACK
AGPVREF_GC
BOTTOM SIDE: Place caps as close NB as possible
TESTIN
VPAR
AGPNCOMP
LCOMPP
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VT8387 PART II
E
V-Link ->
LVREF=0.625 Volt
VCC2_5
R256
3KST
C230
104P
LVREF_NB
R257
1KST
SOLDER SIDE
VDDQ
C240 105P/0805
C241 105P/0805
R259 4.7K
R260 X_8.2K
R261 60.4RST
R262 60.4RST
R263 360RST
C231
104P
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
17 41
E
VCC2_5
VDDQ
Rev
100
of
Page 18
A
B
C
D
E
K8T400M Power and Ground Connections
VDD_12_A
C200 0.22u/BACK
C202 4.7U/0805/BACK
C205 0.22u/BACK
C207 X_0.22u/BACK
C209 0.22u/BACK
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
VT8387 PART III
MS-9130
Last Revision Date:
Sheet
Thursday, July 17, 2003
E
18 41
of
Rev
100
H8
J8
F9
H9
H10
H11
H12
H15
H16
K19
L19
M19
P8
R8
R19
T19
U19
V18
V19
W10
W11
W19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
AA21
AA22
AA23
AA24
AA25
AA26
AB21
AB22
AB23
AB24
AB25
AB26
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
C1
C2
C3
C4
C5
C6
C7
D1
D2
D3
D4
D5
D7
E1
E2
E3
E4
E7
F1
F2
F3
F4
F5
F6
G2
G3
G4
G5
H3
H4
H5
J1
J4
J5
VCC2_5
VCC2_5
C201 X_104P/BACK
C203 X_104P/BACK
C204 X_102P/BACK
C206 104P/BACK
C208 102P/BACK
C210 X_102P/BACK
LAYOUT : Popualte caps on the bottom side
of NB.
VDDQ
C211
104P
VDDQ
C215
1U/0805
B
C216
1U/0805
C212
X_104P
K8T400M
C214
C213
X_104P
105P
C218
C217
1U/0805
1U/0805
C
U19C
K8T400M_#A
B01-0838505-V01
VDD
NC_K1
NC_K5
K1
NC_L1
NC_A1
NC_A2
NC_A3
NC_A4
NC_A5
NC_A6
NC_A7
NC_B1
NC_B2
NC_B3
NC_B4
NC_B5
NC_B6
NC_B7
NC_C1
NC_C2
NC_C3
NC_C4
NC_C5
NC_C6
NC_C7
NC_D1
NC_D2
NC_D3
NC_D4
NC_D5
NC_D7
NC_E1
NC_E2
NC_E3
NC_E4
NC_E7
NC_F1
NC_F2
NC_F3
NC_F4
NC_F5
NC_F6
NC_G2
NC_G3
NC_G4
NC_G5
NC_H3
NC_H4
NC_H5
NC_J1
NC_J4
NC_J5
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A23
VSS
B8
VSS
B13
VSS
B15
VSS
B17
VSS
B19
AC22
AC23
VSS
B21
VSS
B22
VSS
C8
VSS
D6
VSS
D8
VSS
D12
VSS
D14
VSS
D16
VSS
D18
VSS
D20
VSS
E5
VSS
E6
VSS
E8
VSS
F7
VSS
F8
VSS
F12
VSS
F14
VSS
F17
VSS
F26
VSS
G25
VSS
H1
VSS
H23
VSS
J2
VSS
J3
VSS
J21
VSS
J25
VSS
VSS
K23
VSS
L11
VSS
L12
VSS
L13
VSS
L14
VSS
L15
VSS
L16
VSS
L17
VSS
L25
VSS
M11
VSS
M12
VSS
M13
VSS
M14
VSS
M15
VSS
M16
VSS
M17
VSS
M21
VSS
M23
VSS
N11
VSS
N12
VSS
N13
VSS
N14
VSS
N15
VSS
N16
VSS
N17
VSS
N25
VSS
P11
VSS
P12
VSS
P13
VSS
P14
VSS
P15
VSS
P16
VSS
P17
VSS
P23
VSS
R11
VSS
R12
VSS
R13
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
R25
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
VSS
VSS
G1
VSS
H2
VSS
RSVD4
RSVD1
RSVD7
K2
K3K4K5L1L2
A
4 4
3 3
2 2
1 1
Page 19
5
K8 Power Regular Module
+12V-8P
CHOK1 1.1uH-25A
C272
C271
D D
C C
VRM_OUTEN_L 32
B B
0.1u
C281 0.1u
MMBT3904
39P/50V/NPO
H0_CORE_PG
VCORE_EN# 37
VID[4..0] 6,32
VCC
PG_VCORE 37
Q40
B
E C
VCC
154KST
COREFB_H 6,13
COREFB_L 6,13
R297
R294 10K
R298 10K
R477
40.2K
C273
39P/50V/NPO
VCC2_5
Droop Compensation
VCORE
VID4 VID3 VID2 VID1 VID0 Vout
1 1 1 1 0 0.800
1 1 1 0 1 0.825
1 1 1 0 0 0.850
1 1 0 1 1 0.875
1 1 0 1 0 0.900
1 1 0 0 1 0.925
1 1 0 0 0 0.950
CT1
CT2
150u/16V
150u/16V
VID3
1 2
VID2
3 4
VID1
5 6
VID0
7 8
X_8P4R-4.7K
VID4
R289 X_4.7K
R463
2.2K
H0_CORE_PG
R295 0
H0_FS_ISL
C286 5600p/50V/X7R
H0_COMP
X_22p C289
H0_FB_ISL
R301 1K
R302 0
R306
51RST
R308
51RST
VID4
VID3
VID2
VID1
VID0
H0_VDIFF
H0_IDROOP
28
3
4
5
6
7
26
9
10
12
11
20
15
1
U23
EN
VID4
VID3
VID2
VID1
VID0
PGOOD
COMP
FB
VDIFF
IDROOP
GND
GND
GND
ISL6559CB
VID4 VID3 VID2 VID1 VID0 Vout
0 1 1 1 0 1.200
0 1 1 0 1 1.225
0 1 1 0 0 1.250
0 1 0 1 1 1.275
0 1 0 1 0 1300
0 1 0 0 1 1.325
0 1 0 0 0 1.350
RN54
0 0 1 1 1 1.375 1 0 1 1 1 0.975
1 0 1 1 0 1.000
1 0 1 0 1 1.025
A A
1 0 1 0 0 1.050
1 0 0 1 1 1.075
1 0 0 1 0 1.100
1 0 0 0 1 1.125
1 0 0 0 0 1.150
0 1 1 1 1 1.175
5
0 0 1 1 0 1.400
0 0 1 0 1 1.425
0 0 1 0 0 1.450
0 0 0 1 1 1.475
0 0 0 1 0 1.500
0 0 0 0 1 1.525
0 0 0 0 0 1.550
1 1 1 1 1 Shutdown
150u/16V
VCC2_5
VCC
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3 FS/DIS
PWM4
ISEN4
OFS
OVP
VSEN
RGND
4
CT4
150u/16V
16
22
23
21
19
17
18 27
25
24
8
2
13
14
4
VDD_12_VRM
C274
4.7u/35V-1206
H0_VDD5_I
H0_PWM1
H0_ISEN1
H0_PWM2
H0_ISEN2
H0_PWM3
H0_ISEN3
H0_PWM4
H0_ISEN4
Offset Adjustment
H0_OFS
C275 CT3
4.7u/35V-1206
VCC
R291
0
C284
1u/16V-0805
R303
2.2K
OUTPUT CAPACITOR SOURCE
1. RUBYCON C94-2220611-R07
2. NCC C94-2220611-N07
3. NICHICON C94-2220611-N10
4. PANASONIC
Low Side MOSFET
Main source:
FDB6670AL=>D03-6670ALB-F01
Second source:
IPB07N03L=> D03-07N031B-I14
SUB85N03-07P=>D03-85N030B-V02
+12V-8P
R283
5.1
H0_VDD_P1
C276
1u/16V-0805
+12V-8P
H0_VDD_P2
+12V-8P
H0_VDD_P3
+12V-8P
H0_VDD_P4
H0_ISEN1
R288
5.1
C282
1u/16V-0805
H0_PWM2
H0_ISEN2
R299
5.1
C290
1u/16V-0805
H0_PWM3
H0_ISEN3
R309
5.1
C295
1u/16V-0805
H0_PWM4
H0_ISEN4
3
U21
6
VCC
7
PVCC
4
GND
3
PWM
HIP6601B-SOIC8
R287 3KST
Close to U23
U22
6
VCC
7
PVCC
4
GND
3
PWM
HIP6601B-SOIC8
R296 3KST
Close to U23
U24
6
VCC
7
PVCC
4
GND
3
PWM
HIP6601B-SOIC8
R307 3KST
Close to U23
U25
6
VCC
7
PVCC
4
GND
3
PWM
HIP6601B-SOIC8
R313 3KST
Close to U23
3
H0_U_G1
1
U_G
H0_BOOT1
2
BOOT
8
PHASE
H0_L_G1 H0_PWM1
5
L_G
1
U_G
H0_BOOT2
2
BOOT
8
PHASE
5
L_G
1
U_G
H0_BOOT3
2
BOOT
8
PHASE
5
L_G
1
U_G
H0_BOOT4
2
BOOT
8
PHASE
H0_L_G4
5
L_G
INPUT CAPACITOR SOURCE
1. NCC C94-1521641-N07
2. RUBYCON C94-1521641-R07
3. NICHICON C94-1521641-N10
4. PANASONIC
High Side MOSFET
Main source:
IPB15N03=>D03-15N030B-I14
Second source:
FDB6035AL=>D03-6035ALB-F01
P55N02LS=>D03-55N020B-N03
H0_U_G3
H0_U_G4
R284 2.2
C277
0.1u/X7R
R286 0
R290 2.2
C283
0.1u/X7R
R293 0
R300 2.2
C291
0.1u/X7R
R305 0
R310 2.2
C296
0.1u/X7R
R312 0
VDD_12_VRM
C269
1u/16V-0805
H0_U_G1A
H0_PHASE1
H0_L_G1A
C279
1u/16V-0805
H0_U_G2A H0_U_G2
H0_PHASE2
H0_L_G2A H0_L_G2
VDD_12_VRM
C287
1u/16V-0805
H0_U_G3A
H0_PHASE3
H0_L_G3A H0_L_G3
VDD_12_VRM
C293
1u/16V-0805
H0_U_G4A
H0_PHASE4
H0_L_G4A
G
Q37
FDB7045L
G
VDD_12_VRM
G
Q39
FDB7045L
G
G
Q42
FDB7045L
G
G
Q44
FDB7045L
G
2
D S
D S
D S
D S
D S
FDB6035AL
D S
D S
Q43
FDB6035AL
D S
2
Q36
FDB6035AL
Q38
FDB6035AL
Q41
C294
0.1u
C270
0.1u
R285
4.7
C278 1000p
C280
0.1u
0.8V~1.55V/45A
R292
4.7
C285 1000p
C288
0.1u
R304
4.7
C292 1000p
R311
4.7
C297 1000p
H1
1
1
TO263-H
H4
1
1
TO263-H
L19 1.1u-35A
L20 1.1u-35A
L21 1.1u-35A
L22 1.1u-35A
2
2
2
2
EC41
EC42
820u/4V
820u/4V
EC46
820u/4V
EC51
820u/4V
EC52
820u/4V
H2
1
1
2
2
TO263-H
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
EC43
EC44
820u/4V
820u/4V
EC47
EC45
820u/4V
820u/4V
VCORE
EC48
EC49
820u/4V
820u/4V
EC53
EC54
820u/4V
820u/4V
H3
1
1
2
2
TO263-H
CPU CORE POWER
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
1
VCORE
VCORE
EC59
820u/4V
EC50
820u/4V
VCORE
EC55
820u/4V
19 41
of
Rev
100
Page 20
5
4
3
2
1
AGP PRO Connector
GREQ
ST0
ST2
RBF
DBIL
SBA0
SBA2
SB_STBF
SBA4
SBA6
3VDUAL
GAD31
GAD29
GAD27
GAD25
AD_STBF1
GAD23
GAD21
GAD19
GAD17
GC/BE#2
GIRDY
GDEVSEL
GPERR
GSERR
GC/BE#1
GAD14
GAD12
GAD10
GAD8
AD_STBF0
GAD7
GAD5
GAD3
GAD1
VREF_CG
VCC3
AGP1
D1
VCC3_3_J
D2
VCC3_3_K
D3
VCC3_3_L
D4
VCC3_3_M
D5
VCC3_3_N
D6
VCC3_3_O
D7
VCC3_3_P
D8
VCC3_3_Q
D9
PRSNT#2
D10
VDDQ
PRSNT#1
VCC
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
KEY
AGP_OVRCNT#
5V_A
5V_B
AGP_USB+
GND_Q
INTB#
AGPCLK_CONN
REQ#
VCC3_3_R
ST0
ST2
RBF#
GND_R
RESV_L
SBA0
VCC3_3_S
SBA2
SB_STB
GND_S
SBA4
SBA6
RESV_M
GND_T
3_3AUX_1
VCC3_3_T
GAD31
GAD29
VCC3_3_U
GAD27
GAD25
GND_U
AD_STB1
GAD23
VDDQ_F
GAD21
GAD19
GND_V
GAD17
C/BE#2
VDDQ_G
IRDY#
DEVSEL#
VDDQ_H
PERR#
GND_X
SERR#
C/BE#1
VDDQ_I
GAD14
GAD12
GND_Y
GAD10
GAD8
VDDQ_J
AD_STB0
GAD7
GND_Z
GAD5
GAD3
VDDQ_K
GAD1
VREFCG
KEY
RESV_O
RESV_P
GND_AA
GND_BB
GND_CC
GND_DD
GND_EE
GND_FF
GND_GG
GND_HH
GND_II
GND_JJ
GND_KK
GND_LL
J_AGP_1.5V
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt ,
8X : 0.23*1.5 =0.345 Volt
4X : 0.75V
8X : 0.35V
VREF_CG
C197
1U/0805
3
VCC3_3_A
VCC3_3_B
RESV_A
RESV_B
VCC_12V_A
TYPEDET#
RESV_C
AGP_USB-
VCC3_3_E
RESV_D
VCC3_3_F
SB_STB#
RESV_E
RESV_F
VCC3_3_G
VCC3_3_H
AD_STB1#
VDDQ_A
VDDQ_B
FRAME#
VDDQ_C
VDDQ_D
AD_STB0#
VDDQ_E
VREFGC
VCC_12V_B
VCC_12V_C
VCC_12V_D
VCC_12V_E
VCC_12V_F
VCC_12V_G
VCC_12V_H
VCC_12V_I
VCC_12V_J
VCC_12V_K
VCC_12V_L
VCC_12V_M
R250
3.32KST
C198
104P
GND_A
GND_B
GND_C
GND_D
GND_E
GND_F
GND_G
INTA#
RST#
GNT#
PIPE#
GND_H
WBF#
SBA1
SBA3
GND_I
SBA5
SBA7
GND_J
GAD30
GAD28
GAD26
GAD24
GND_K
C/BE#3
GAD22
GAD20
GND_L
GAD18
GAD16
TRDY#
STOP#
PME#
GND_N
GAD15
GAD13
GAD11
GND_O
GAD9
C/BE#0
GAD6
GND_P
GAD4
GAD2
GAD0
RESV_I
RESV_J
PAR
VDDQ
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
ST1
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
R252
1.47KST
R255
1.02KST
PRN2
PRN1
GND OPEN
VCC
C196
D D
C C
B B
+12V
JPWR2
3
12V
4
12V
D2x2
CLOSED TO AGP SLOT
A A
AGP8XDET_GC#
1 : 4X
0 : 8X
5
104P
GAD[31..0]
GAD[31..0] 17
SBA[7..0]
SBA[7..0] 17
ST[2..0]
ST[2..0] 17
GC/BE#[3..0]
GC/BE#[3..0] 17
1
GND
2
GND
+12V
R251
10K
R248
2.2K
Q35
2N3904S
GAD31
GAD30
GAD29
GAD28
GAD27
GAD26
GAD25
GAD24
GAD23
GAD22
GAD21
GAD20
GAD19
GAD18
GAD17
GAD16
GAD15
GAD14
GAD13
GAD12
GAD11
GAD10
GAD9
GAD8
GAD7
GAD6
GAD5
GAD4
GAD3
GAD2
GAD1
GAD0
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA7
ST0
ST1
ST2
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
VDDQ
R246
8.2K
GPERR
D S
Q32
2N7002S
G
R253
200RST
GND GND
4
50W
110W
AGP_PNT2# 21
AGP_PNT1# 21
AGP_PNT2#
AGP_PNT1#
PIRQ#B 21,24,25
GCLK_SLOT 4
GREQ 17
RBF 17
DBIL 17
SB_STBF 17
AD_STBF1 17
GIRDY 17
GDEVSEL 17
GSERR 17
AD_STBF0 17
VCC3
+12V
VDDQ
AGP8XDET_GC#
AGPGND
GGNT
ST1
WBF
SBA1
SBA3
SB_STBS
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STBS1
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME
GTRDY
GSTOP
AGP_PME#
GPAR SBA6
GAD15
GAD13
GAD11
GAD9
GC/BE#0
AD_STBS0
GAD6
GAD4
GAD2
GAD0
AGPVREF_GC
+12V
R249
D S
1K
AGP8XDET_GC#
G
Q33
2N7002S
1 : 4X
0 : 8X 1 : 4X
"AGP8XDET_GC#"
=>4X=High,8X=Low
3VDUAL
R244
4.7K
PIRQ#A 21,24,25,35
PCIRST# 21,37
GGNT 17
DBIH 17
WBF 17
SB_STBS 17
AD_STBS1 17
GFRAME 17
GTRDY 17
GSTOP 17
R245 X_0
GPAR 17
AD_STBS0 17
AGPVREF_GC 17
VCC3
R247
4.7K
D S
Q34
2N7002S
G
AGP8XDET#
R254
10K
3VDUAL
R243
4.7K
Q31
2N3904S
SUSB# 22,30,37
PCI_PME# 22,24,25,30,35
AGP8XDET# 17
0 : 8X
2
VDDQ
C628
104P
VDDQ
C632
1U/0805
CLOSED TO AGP SLOT
VDDQ
C221
104P
VDDQ
C224
1U/0805
CLOSED TO AGP SLOT
VCC3
C639
1U/0805
VCC3
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C629
C630
104P
104P
C633
1U/0805
C222
104P
C225
1U/0805
C640
1U/0805
C644
C643
104P
104P
EC63
X_100u/16V
Micro Star Restricted Secret
AGP PRO Slot
C226
1U/0805
+12V
+
MS-9130
1
C631
104P
C223
104P
C642
X_1U/0805/BACK
C645
104P
Last Revision Date:
Sheet
C227
X_1U/0805/BACK
C646
104P
Thursday, July 17, 2003
20 41
of
Rev
100
Page 21
A
AD[31..0] 24,25,35
4 4
3 3
2 2
1 1
AD[31..0]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
C_BE#[3..0] 24,25,35
C_BE#[3..0]
FRAME# 24,25,35
DEVSEL# 24,25,35
IRDY# 24,25,35
TRDY# 24,25,35
STOP# 24,25,35
SERR# 24,25,35
PAR 24,25,35
PERR# 24,25,35
PCIRST# 20,37
PIRQ#A 20,24,25,35
PIRQ#B 20,24,25
PIRQ#C 24,25
PIRQ#D 24,25
AGP_PNT1# 20
AGP_PNT2# 20
PREQ#0 24
PREQ#1 24
PREQ#2 25
PREQ#3 25
PREQ#4 35
PGNT#0 24
PGNT#1 24
PGNT#2 25
PGNT#3 25
PGNT#4 35
A
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
SERR#
PAR
PERR#
PCIRST#
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
S_VID0
S_VID1
AGP_PNT1#
AGP_PNT2#
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
G2
AD0
J4
AD1
J3
AD2
H3
AD3
F1
AD4
G1
AD5
H4
AD6
F2
AD7
E1
AD8
G3
AD9
E3
AD10
D1
AD11
G4
AD12
D2
AD13
D3
AD14
F3
AD15
K3
AD16
L3
AD17
K2
AD18
K1
AD19
M4
AD20
L2
AD21
N4
AD22
L1
AD23
M2
AD24
M1
AD25
P4
AD26
N3
AD27
N2
AD28
N1
AD29
P1
AD30
P2
AD31
E2
CBE0
C1
CBE1
L4
CBE2
M3
CBE3
J1
FRAME
H2
DEVSEL
J2
IRDY
H1
TRDY
K4
STOP
C2
SERR
F4
PAR
C3
PERR
R1
PCIRST
A4
INTA
B4
INTB
B5
INTC
C4
INTD
D4
INTE
E4
INTF
A3
INTG
B3
INTH
A5
REQ0
B6
REQ1
C5
REQ2
D5
REQ3
P3
REQ4
R3
REQ5
A6
GNT0
D6
GNT1
C6
GNT2
E5
GNT3
R4
GNT4
R2
GNT5
GND
A1A2B1
GND
GND
GND
E8
B
B
GND
F25
H9
GND
H23
H10
H12J8K8L8M8N8P8R8R19
H11
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
GND
GND
GND
USBGND
USBGND
J21
J25B2A17
A15
A13
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
A19
A21
B13
VCC3
VCC33
VCC33
USBGND
USBGND
B15
B17
T8
T19
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
B19
B21
U19V8V19
U8
VCC33
VCC33
USBGND
USBGND
C13
C14
VCC33
VCC33
USBGND
USBGND
C15
C16
V21W9W10
VCC33
VCC33
USBGND
USBGND
C17
C18
C19
W11
W17
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
C20
C21
W18
W19
W21
VCC33
VCC33
USBGND
USBGND
D13
D15
D17
Y21
W8
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
D19
D21
C
USBGND
USBGND
E13
E15
C
USBGND
USBGND
E17
E19
E21
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBSUS25
PLLVDDA
PLLVDDA
PLLGNDA
PLLGNDA
USBP0+
USBP0-
USBP1+
USBP1-
USBP2+
USBP2-
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBP6+
USBP6-
USBP7+
USBP7-
USBOC0
USBOC1
USBOC2
USBOC3
USBOC4
USBOC5
USBOC6
USBOC7
USBCLK
USB REXT
UDPWR
UDPWREN
KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12
USBGND
USBGND
USBGND
USBGND
H13
H15
H14
USBGND
USBGND
H16
H17
USBN4
USBP4
USBN5
USBP5
U18A
A22
B22
C22
D22
E22
F22
J13
J14
J15
J16
J17
J18
C24
A23
B23
D23
C23
E20
D20
A20
B20
E18
D18
A18
B18
D16
E16
A16
B16
D14
E14
A14
B14
C26
D24
B26
C25
B24
A24
A26
A25
E23
B25
D26
D25
W3
V1
W1
W2
USBGND
VT8237-CD
H18
8P4R-15K
7 8
5 6
3 4
1 2
RN41
CB7
+
EC40
104P
ELS10/16-B
C195
near SB
VCC2_5
USBVCCA
USBGNDA
USBP0
USBN0
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP4
USBN4
USBP5
USBN5
USBP6
USBN6
USBP7
USBN7
USB_OC#1
USB_OC#5
USBCLK_SB
USBREXT
R238 4.7KST R239 1KST
R240 10K
D
3VDUAL
CB8
104P/BACK
104P
CB11
105P
USBP0 28
USBN0 28
USBP1 28
USBN1 28
USBP2 28
USBN2 28
USBP3 28
USBN3 28
USBP4 29
USBN4 29
USBP5 29
USBN5 29
USB_OC#1 28
USB_OC#5 29
USBCLK_SB 4
KBCLK# 33
KBDAT# 33
MSCLK# 33
MSDAT# 33
D
VSUS2_5
USBP2
USBN2
USBN3
USBP3
USBP6
USBN6
USBP7
USBN7
USBP0
USBN0
USBP1
USBN1
PIRQ#B
PIRQ#A
PIRQ#C
PIRQ#D
S_VID1
S_VID0
AGP_PNT2#
AGP_PNT1#
RN42
1 2
3 4
5 6
7 8
8P4R-15K
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN44 8P4R-15K
RN45
1 2
3 4
5 6
7 8
8P4R-2.7K
RN48
1 2
3 4
5 6
7 8
8P4R-2.7K
PGNT#1 24
PGNT#2 25
PGNT#3 25
PGNT#4 35
PREQ#3 25
PREQ#2 25
PREQ#1 24
PREQ#4 35
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VCC2_5
VCC3
3VDUAL
FRAME#
PGNT#1
PGNT#2
PGNT#3
PGNT#4
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
VCC
VCC3
PGNT#0
PGNT#5
PREQ#3
PREQ#2
PREQ#1
PREQ#4
PREQ#0
PREQ#5
VT8235 Part 1
MS-9130
Last Revision Date:
Sheet
E
CB6 105P/BACK
CB4 X_103P/BACK
CB5 X_103P/BACK RN43 8P4R-15K
CB9 X_105P/BACK
CB10 X_103P/BACK
RN46
8P4R-2.7K
1 2
3 4
5 6
7 8
RN47
1 2
3 4
5 6
7 8
8P4R-2.7K
RN49
8P4R-4.7K
1 2
3 4
5 6
7 8
VCC3
R236 4.7K
R237 4.7K
RN50
8P4R-2.7K
1 2
3 4
5 6
7 8
VCC
R437 2.7K
R241 2.7K
R242 2.7K
Thursday, July 17, 2003
21 41
E
of
VCC3
Rev
100
Page 22
A
J9
J10
J11
K9L9J12
PDD[15..0] 27
4 4
3 3
Using external PHY
2 2
C191
VCC2_5
1 1
PDD[15..0] PDD0
PDREQ 27
PDDACK# 27
PDIOR# 27
PDIOW# 27
PIORDY 27
PDCS#1 27
PDCS#3 27
PDA0 27
PDA1 27
PDA2 27
IRQ14 27
SDD[15..0] 27
SDD[15..0]
SDREQ 27
SDDACK# 27
SDIOR# 27
SDIOW# 27
SIORDY 27
SDCS#1 27
SDCS#3 27
SDA0 27
SDA1 27
SDA2 27
IRQ15 27
X_104P C178
X_360RST
R223
near chipset
1 2
C192
104P/BACK
103P C180
103P C181
122P C182
122P C183
103P C184
103P C185
122P C186
122P C188
near chipset
+2.5VSATA
A
STXN_1
SRXN_1
SRXP_1
STXP_2 STXP2
FB9
X_601S
C193
105P/BACK
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDCS#1
PDCS#3
PDA0
PDA1
PDA2
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDCS#1
SDCS#3
SDA0
SDA1
SDA2
IRQ15
SIDEVREF
SIDECOMP
STXP1 STXP_1
STXN1
SRXN1
SRXP1
STXN2 STXN_2
SRXN2 SRXN_2
SRXP2 SRXP_2
AA22
PDD1
PDD2
AA26
PDD3
AA25
PDD4
AB26
PDD5
AC26
PDD6
AC23
PDD7
AD25
PDD8
AD26
PDD9
AC24
AC25
AB24
AB23
AA24
AA23
W26
W23
W24
AD24
AC20
AB20
AC21
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AD17
AD23
AF23
AE23
AF17
AF25
AF26
AF24
AC22
AE24
AE26
AC19
AB21
AB13
AC13
AF13
AE13
AB15
AC15
AF15
AE15
W12
W13
W14
W15
W16
AC17
AC11
AB17
AB11
GNDSATA
R235 0
C194
104P
Y24
Y26
Y23
V24
Y25
Y22
V22
V23
V25
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDDACK
PDIOR
PDIOW
PDRDY
PDCS1
PDCS3
PDA0
PDA1
PDA2
IRQ14
SDD0/TBC1
SDD1/VALID
SDD2
SDD3/RXD2
SDD4/RXD3
SDD5/RXD4
SDD6/RBC0
SDD7/RBC1
SDD8/RXD5
SDD9/RXD6
SDD10/RXD7
SDD11/RXD8
SDD12/RXD9
SDD13/TXD0
SDD14/TXD1
SDD15/TXD2
SDDRQ/RXD1
SDDACK/TBC0
SDIOR/TXD4
SDIOW/TXD3
SDRDY/RXD0
SDCS1/TXD8
SDCS3/TXD9
SDA0/TXD6
SDA1/TXD5
SDA2/TXD7
IRQ15
SVREF
SCOMPP
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
VDDATS
VDDATS
VDDATS
VDDATS
VDDATS
VDDAS
VDDAS
VDDAS
VDDAS
PWBTIN# PWRBTN#_S
VDD
VDD
GNDATS
GNDATS
AB14
AC14
VDD
VDD
GNDATS
GNDATS
AD12
AD13
L18
VDD
VDD
VDD
GNDATS
GNDATS
GNDATS
AD14
AD15
AD16
PWBTIN# 39
B
VCC2_5
M9
M18N9N18P9P18R9R18T9T18U9U18V9V10
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDAS
GNDAS
GNDAS
GNDAS
AF14
AE12
AE14
AE16
AF12
AF16
AC16
AC12
AB16
AB12
B
VDD
VDD
VDD
GND
F6F7J5K5P5
U18B
T1
U3
V2
U1
V3
T2
U2
T3
W4
V4
Y1
Y2
Y3
Y4
AA1
AB1
AC1
AD2
AF1
AB7
AC7
AD6
AE1
AB3
AC4
AB2
AC3
AD1
AA2
AD3
AF2
AE2
AC2
AA3
AE3
AE5
AD5
AF5
AC6
AD9
AF8
AB8
AF9
AE9
AC10
AB10
AD11
AE10
AF10
AE11
AF11
W5
V5
M16
N11
N12
N13
N14
N15
N16
VT8237-CD
C
VSUS2_5
AC_SDIN0
AC_SDIN1
POWERF1
POWERF2
ACSYNC
ACSDO
ACRST
PCI_PME#
BATLOW#
CPUMISS
RI#
SUSST#
THRM#
EXTSMI#
SMBALRT#
ATADET1
PWRBTN#_S
PWROK_NB#
CLKRUN#
CPUSTP#
PCISTP#
INTRUDER
SUSCLK
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
SUSA#
SUSB#
SUSC#
GPI0
ATADET0
MEM_GPIO1
MEM_GPIO2
GPIOA
GPIOB
GPIOC
GPIOD
SERIRQ
SPKR
SB_OSC14
TPO
TEST
VDDA0
SREXT
VDDA33
C
C174
104P/BACK
SXO
SXI
VCC3
VCC2_5
C175
104P
PCI_PME# 20,24,25,30,35
RI#
SUSST# 17
THRM# 6,30,37
EXTSMI# 39
ATADET1 27
PWROK_NB# 17
CLKRUN# 35
SMBCLK1 4,9,10,24,25,35,37
SMBDATA1 4,9,10,24,25,35,37
SUSB# 20,30,37
SUSC# 37
ATADET0 27
MEM_GPIO1 5
MEM_GPIO2 5
SERIRQ 30
SPKR 39
SB_OSC14 4
VCC2_5
C179
104P/BACK
R225
6.04KST
FB8 X_601S
1 2
C187
104P
SXO
SXI
VT8235
R231
X_4.7K
C189
15P
STXP_1
STXN_1
SRXN_1
SRXP_1
C176
104P
AC_BITCLK
RN34
7
5
3
1
8P4R-22
X1
1 2
YCRY25H
8
1
2
3
4
5
6
7
9
8
6
4
2
CP21
SATA1
C177
X_105P/BACK
AC_SYNC
AC_RST#
AC_SDOUT
VCC3
C190
15P
SATACONN
AC_BITCLK 26
AC_SDIN0 26
R232
X_4.7K
3VDUAL
VSUS2_5
AA4
AB4
AB5
AB6
T4
V11
V12
V13
V14
V15
V16
V17
V18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
L13
L14
L11
L12
R5
U4
VSUS33
VSUS33
VSUS33
VSUS33
VSUS25
ACBITCLK
ACSDIN0
ACSDIN1
ACSDIN2
ACSDIN3/SLP_BTN
ACSYNC
ACSDO
ACRST
BATLOW
CPUMISS
RING
SUSST1
AOLGP/THRM
EXTSMI
SMBALRT
PWRBTN
PWROK
CLKRUN
CPUSTP
PCISTP
INTRUDER
SUSCLK
SMBCK1
SMBDT1
SMBCK2
SMBDT2
SUSA
SUSB
SUSC
GPO0
GPO1
GPIOA/Strap1
GPIOB/Strap2
GPIOC/Strap0
GPIOD/Strap3
SERIRQ
SPKR
TEST
VDDA0
GNDA0
SREXT
SXO/Strap4
SXI/Strap5
VDDA33
GNDA33
GND
GND
GND
GND
GND
GND
L15
L16
M11
M12
M13
M14
M15
VSUS25
PME
LID
GPI0
GPI1
OSC
TPO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
K18
D
GPI0
R212 4.7K
INTRUDER
R213 1M
AC_SYNC 26
AC_RST# 26
AC_SDOUT 26
TEST
R214 4.7K
CLKRUN#
R215 4.7K
RN35
EXTSMI#
SUSA#
CPUMISS
RI#
SUSST#
PCI_PME#
BATLOW#
PWROK_NB#
ATADET1
ATADET0
SMBALRT#
SUSB#
SUSC#
SUSCLK
PWBTIN#
PCISTP#
CPUSTP#
SERIRQ
SPKR
TPO
8P4R-4.7K
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R216 X_4.7K
R217 4.7K
R218 X_4.7K
R219 4.7K
AC_SDIN0
AC_SDIN1
POWERF1
POWERF2
R220 4.7K
RN38
1
3
5
7
8P4R-4.7K
RN39 8P4R-4.7K
7 8
5 6
3 4
1 2
*"SPKR" => CPU Freq. Adjust Setting
1 - Disable (Default)
0 - Enable
STXP_2
STXN_2
SRXN_2
SRXP_2
D
RN40
8P4R-1K
1 2
3 4
5 6
7 8
SATA2
8
1
2
3
4
5
6
7
9
SATACONN
SMBDATA1
SMBCLK1
SMBDATA2
SMBCLK2
VBAT
3VDUAL
RN36
8P4R-4.7K
RN37
8P4R-4.7K
2
4
6
8
VCC3
VCC3
3VDUAL
VT8237
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
*"SA[17:16]" => LDT Frequency
00 - 200MHz (Default)
01 - 400MHz
*"SA18" => LDT Width
0 - 8-Bit (Default)
1 - 16-Bit
*"SA19" => Fast command
0 - Disable (Default)
1 - Enable
GPIOC
GPIOA
GPIOB
GPIOD
RN33
8P4R-4.7K
1 2
3 4
5 6
7 8
10 - 600MHz
11 - 800MHz
(VD[2])
(VD[3])
Strapping
*"PDA1/SDA1" => External loop test mode
0 - Disable (Default)
1 - Enable
*"PDA2/SDA2" => ROMSIP Select
0 - Disable
1 - Enable(Default)
*"-SDCS3" => Test Mode Select
0 - Disable (Default)
1 - Enable
*"EEDI/-SDCS1" => EEPROM Select
0 - BIOS Porting - ACR
1 - External EEPROM (On-board)(Default)
R221 1K
R453 X_1K
(VD[5])
R222 X_1K
VCC3
(VD[6])
(VD[7])
VCC3
VCC3
VT8237
VT8235
VT8237
VT8237
Micro Star Restricted Secret
R454 X_1K
R224 1K
R455 X_1K
R229 X_1K
R230 X_1K
R456 X_1K
R457 X_1K
PDCS#1
SDCS#1
ACSYNC
PDDACK#
ACSDO
0/1:Enable/disable auto reboot
R227 10K
R228 X_10K
R458 X_10K
R432 X_4.7K
R226 4.7K
R233 10K
R234 X_4.7K
VT8235 Part 2
MS-9130
Last Revision Date:
Sheet
E
(VD[1:0])
SA19
(VD[3])
SA17
(VD[1])
SA18
(VD[2])
SA16
(VD[0])
PDA1
VT8237
SDA1
VT8235
PDA2
VT8237
SDA2
VT8235
PDCS#3
VT8237
SDCS#3
VT8235
PDA0
VT8237
(VD[4])
SDA0
VT8235
VCC3
VCC3
VCC3
Rev
Thursday, July 17, 2003
22 41
of
100
Page 23
A
N21
N22
N23
N24
N25
N26
VCCVK
VCCVK
GND
GND
P14
P15
VCCVK
VCCVK
GND
GND
P16
R11
P22
VCCVK
VCCVK
GND
GND
R13
R12
VCCVK
GND
L21
K21
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VD8
VD9
VD10
VD11
VD12
VD13
VD14
VD15
VBE
UPCMD
DNCMD
UPSTB
UPSTB
DNSTB
DNSTB
VPAR
VLREF
VCOMPP
VCLK
VIOUT
VIIN
LAD0
LAD1
LAD2
LAD3
LFRM
LREQ0
LREQ1
PWRGD
RSMRST
VBAT
RTCX1
RTCX2
L23
VCCVK
P11
VCCVK
VCCVK
GND
GND
P12
P13
VLAD[0..7] 17
4 4
VBE0# 17
UPCMD 17
DNCMD 17
UPSTB 17
UPSTB# 17
3 3
2 2
1 1
LPC_FRAME# 30,32
ALL_PWRGD 37,39
DNSTB 17
DNSTB# 17
R196 360RST
VCLK 4
LPC_AD0 30,32
LPC_AD1 30,32
LPC_AD2 30,32
LPC_AD3 30,32
LPC_REQ# 30
RSMRST# 37
C171
10P/X7R
VPAR 17
VLREF_SB
VCOMPP_SB
VCLK
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_REQ#
ALL_PWRGD
RSMRST#
VBAT
X1
Y3
32.768KHZ
A
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0#
UPCMD
DNCMD
UPSTB
UPSTB#
DNSTB
DNSTB#
VPAR
X2
C172
10P/X7R
H25
G26
K26
F26
G25
K22
K24
E24
G23
E26
E25
M26
G24
K23
K25
H26
H24
F24
H22
F23
G22
AD8
AF7
AE7
AD7
AF6
AE6
AE8
AC5
AD4
AF4
AE4
AF3
J23
L26
L25
L24
J26
J24
J22
L22
P23
P24
VCCVK
GND
R15
R14
P25
P26
VCCVK
VCCVK
GND
GND
R16
R21
M21
M22
VCCVK
VCCVK
GND
GND
T11
T12
B
M23
VCCVK
GND
T13
B
M24
M25
VCCVK
VCCVK
GND
GND
T15
T14
L19
VCCVK
VCCVK
GND
GND
T16
M19
N19
VCCVK
GND
W22
W25
P19 AA21
VCCVK
VCCVK GND
GND
AB19
GND
AB22
GND
AB25
VSUS2_5
GND
GND
AC18
AE17
D12
E12
MIISUS25
GND
GND
AE19
AE22
D9
MIISUS25
GND
GND
GND
AE25
AA9
AB18
3VDUAL VCC2_5
E11E9E10
MIIVCC
MIIVCC
MIIVCC
MIIVCC
AGPBZ/GPI6
APICD0/APICCS
APICD1/APICACK
GND
GND
GND
GND
T21
AA10
K19
MCRS
MCOL
MTXENA
MTXD0
MTXD1
MTXD2
MTXD3
MTXCLK
MRXER
MRXCLK
MRXDV
MRXD0
MRXD1
MRXD2
MRXD3
MDCK
MDIO
PHYRST
EECS
EEDO
EEDI
EECK
RAMVCC
RAMGND
FERR
A20M
IGNNE
INIT
INTR
NMI
SMI
STPCLK
SLP
GHI
DPSLP
VGATE
VIDSEL
VRDSLP
PCICLK
APICCLK
PLLVCC
PLLGND
C
U18C
A11
B11
C11
A10
B10
B9
A9
C10
D10
C9
D8
C8
B8
A8
C7
A7
B7
D7
D11
B12
A12
C12
E7
E6
U24
U26
T24
R26
T25
T26
U25
R24
V26
R22
P21
AC9
AC8
AB9
AD10
R23
U23
R25
T23
T22
U22
VT8237-CD
C
R188 10K
+2.5VRAM
FERR#
A20M#
IGNNE#
CPUINIT#
INTR
NMI_SB
SMI#
STPCLK#
SLP#
GHI#
ROMLOCK
VGATE
VIDSEL
VRDSLP
AGPBZ#
SBPCLK
APICCLK
APICD0#
APICD1#
+2.5VSBPLL
GND_SBPLL
VT8237
"EEDI"=>Eliminate Lan EEPROM 1/0:ENABLE/DISABLE
VIA AN258
1 2
FB6
FB7
1 2
VCC2_5
-LDTSTOP 6,13,16
VCC2_5
VLREF_SB
CB2
X_105P
R202
VIDSEL 39
SBPCLK 4
APICCLK 4
CP19
CB3
104P
X_601S
VLREF_SB =>
K8T400M= 0.65V ,
K8M400= 0.45V
R191 X_2.2
0
X_601S
CP20
V-Link ->
LVREF=0.625
Volt
C170
104P
C173
104P
D
VCC2_5
D
5VSB
VBAT2
BATTERY
R210
3KST
R211
1KST
R205 1K
R206 3K
R207 1K
R209 1K
1 2
104P CB1
RN31
INTR
NMI_SB
SMI#
A20M#
VGATE
CPUINIT#
STPCLK#
IGNNE#
FERR#
SLP#
APICD0#
APICD1#
APICCLK
ROMLOCK
GHI#
VIDSEL
AGPBZ#
VRDSLP
VGATE
GHI#
X_8P4R-680
1 2
3 4
5 6
7 8
R187 4.7K
RN32
1 2
3 4
5 6
7 8
X_8P4R-680
R189 1K
R190 4.7K
R192 330
R193 330
R194 X_4.7K
R197 4.7K
R198 4.7K
R199 4.7K
R200 4.7K
R201 4.7K
R203 X_4.7K
R204 X_4.7K
D15
1N4148S
VBAT1
A C
D16
1N5817S
10U/16V/S
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VT8235 Part 3
EC62
VBAT
MS-9130
E
VCC3
VCC3
VBAT
+
wider trace
Last Revision Date:
Thursday, July 17, 2003
Sheet
E
JBAT1
1
2
YJUMPER-MG
3
YJ103
R208
1K
23 41
of
JBAT1(1-2)1
Rev
100
Page 24
5
PCI Connectors
4
AD[31..0] 21,25,35
VCC3 VCC3 VCC3
VCC VCC VCC VCC
+12V
C_BE#[3..0] 21,25,35
AD[31..0]
C_BE#[3..0]
3
2
1
VCC3
+12V
D D
-12V
PIRQ#B 20,21,25
PIRQ#D 21,25
PCICLK1 4 PCICLK2 4
PREQ#0 21
C C
DEVSEL# 21,25,35
PLOCK# 25
B B
ACK64# 25
PIRQ#B PIRQ#C
PIRQ#D
PCICLK1
PREQ#0
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
IRDY# 21,25,35
DEVSEL#
PLOCK#
PERR#
PERR# 21,25,35
SERR#
SERR# 21,25,35
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
PCI3
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
+5V
A11
A12
A13
A14
A15
A16
+5V
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
+5V
A60
A61
+5V
A62
+5V
PIRQ#A
PIRQ#A 20,21,25,35
PIRQ#C 21,25
PCISLOTRST#
PGNT#0
PCI_PME#
PCISLOTRST# 25,37
PGNT#0 21
PCI_PME# 20,22,25,30,35
PREQ#1 21
AD28
AD24
AD16 AD17
AD22
AD18
FRAME#
TRDY#
STOP#
PAR
FRAME# 21,25,35
TRDY# 21,25,35
STOP# 21,25,35
R178 0
R180 0
PAR 21,25,35
SMBCLK1
SMBDATA1
AD13
AD9
AD6
AD2
REQ64# ACK64# ACK64# REQ64#
REQ64# 25
PIRQ#C
PIRQ#A
PCICLK2
PREQ#1
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
-12V
PCI4
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
C/BE0#
+3.3V
GND
REQ64#
A1
A2
A3
A4
TDI
A5
+5V
+5V
+5V
+5V
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
PIRQ#B
A6
PIRQ#D
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
3VDUAL 3VDUAL
PCISLOTRST#
PGNT#1
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
R179 0
R181 0
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
R177 100 R176 100
PCISLOTRST# 25,37
PGNT#1 21
SMBCLK1
SMBDATA1
SMBCLK1 4,9,10,22,25,35,37
SMBDATA1 4,9,10,22,25,35,37
YSLOT120
N11-1200031-A10
VCC
PLOCK#
R182 2.7K
ACK64#
A A
5
REQ64#
R183 2.7K
R184 2.7K
4
3VDUAL
3
C169
X_104P
VCC3
+
1000U/6.3V
EC15
YSLOT120
N11-1200031-A10
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
PCI Connector 1 & 2
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
24 41
Rev
100
of
Page 25
5
4
3
2
1
PCI Connectors
VCC3 VCC3 VCC3
VCC VCC VCC VCC
D D
PIRQ#D 21,24
PIRQ#B 20,21,24
PCICLK3 4 PCICLK4 4
PREQ#2 21
C C
IRDY# 21,24,35
DEVSEL# 21,24,35
PLOCK# 24
PERR# 21,24,35
SERR# 21,24,35
B B
ACK64# 24 REQ64# 24
-12V
PIRQ#D PIRQ#A
PIRQ#B
PCICLK3
PREQ#2
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
ACK64#
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
C/BE0#
+3.3V
GND
REQ64#
TMS
TDI
+5V
+5V
+5V
+5V
PAR
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
+12V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#C
PCISLOTRST#
PGNT#2
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
R172 0
R174 0
PAR
AD13
AD9
AD6
AD2
R170 100 R171 100
AD[31..0] 21,24,35
C_BE#[3..0] 21,24,35
PIRQ#C 21,24
PIRQ#A 20,21,24,35
PCISLOTRST# 24,37
PGNT#2 21
PCI_PME# 20,22,24,30,35
FRAME# 21,24,35
TRDY# 21,24,35
STOP# 21,24,35
SMBCLK1
SMBDATA1
PAR 21,24,35
AD[31..0]
C_BE#[3..0]
VCC3
+12V
-12V
PIRQ#A
PIRQ#C
PCICLK4
PREQ#3
PREQ#3 21
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
C/BE0#
+3.3V
GND
REQ64#
A1
A2
A3
TMS
A4
TDI
A5
+5V
+5V
+5V
+5V
PAR
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
PIRQ#D
A6
PIRQ#B
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
3VDUAL 3VDUAL
PCISLOTRST#
PGNT#3
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
R173 0
R175 0
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ64# ACK64# REQ64#
PGNT#3 21
SMBCLK1
SMBDATA1
AD19 AD18
SMBCLK1 4,9,10,22,24,35,37
SMBDATA1 4,9,10,22,24,35,37
YSLOT120
N11-1200031-A10
A A
5
4
3
YSLOT120
N11-1200031-A10
2
Micro Star Restricted Secret
Title
PCI Connector 3 & 4
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
25 41
1
Rev
100
of
Page 26
5
AUDIO CODEC
C138
D D
C C
B B
22p
AC_SDOUT 22
AC_BITCLK 22
AC_SDIN0 22
AC_SYNC 22
AC_RST# 22
SPKR
SPKR 22
YJ104-B
JAUX1
R146 X_2M
C141
X_10P
1
2
3
4
C139
22p
Y2
24M-16pf-HC49S-D
R147
R431
R473
10KR
CODEC VCC3_3 NEED CAP
AS CLOSE AS POSSIBLE.
C137
104P
33
33
C686 105P
R474
2.7K
R152 1K
R156 1K
R157
4.7K
VCC3
C155 105P
C157 105P
R158
4.7K
1
2
3
4
5
6
7
8
9
10
11
12
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
4
4847464544424140394338
NC
NC
TEST6
TEST5
TEST4
AVSS2
TEST3
TEST2
TEST1
PHONE
AUXL
AUXR
VIDEOL
VIDEOR
CDLNCCDR
1314151617181920212223
MIC1
NC
MIC2
37
AVDD2
LINL
24
C156
22p
MONO
LINR
U16
LOUTR
LOUTL
VRDA
VRAD
AFILT2
AFILT1
VREF
AVSS1
AVDD1
ALC201A
AGND
C158 105P
C161 105P
C162 105P
C163 105P
3
+5VR
C140
104P
EC35 10U/16V/S
+
C147
105P
EC36 10U/16V/S
C148
105P
R155
2.7K
C160
100p
MIC97
+
R153
4.7K
36
35
34
NC
33
NC
32
31
30
29
28
NC
27
26
25
C143
104P
MICIN
R163
4.7K
C142
104P
C154
1U/0805
R159 1K
C159
100p
EC37
+
10U/16V/S
C153
1U/0805
R164
4.7K
VREFOUT
R165
4.7K
R160 1K
R161 1K
R162 1K
C149
102P
C150
102P
R149 1K
R150 1K
R154
4.7K
LINE_OUT_R
LINE_OUT_L
4
3
2
1
JCD
C144
105P
LINE_IN_R
LINE_IN_L
JCD1
YJ104-B
C145
105P
C146
470p
2
CP17 X_COPPER
CP18 X_COPPER
+12V +5VR
C151
X_104P/12V
+
L18 0/0805
1 2
EC38
100u/16V
U17
L78L00-TO92-100mA
3 1
VIN VOUT
1
AGND
AGND
GND
2
+
EC39
100u/16V
C152
104P
JAUD1
1
MS-9130
1
2
4
6
8
10
11 12
CON10B_0
Last Revision Date:
Thursday, July 17, 2003
Sheet
26 41
3
5
7
9
Rev
100
of
AUD_R_LINE_IN
MIC97
LINE_IN_R
LINE_IN_L
A A
2 1
FB2 FB120S
2 1
FB4 FB120S
470p
C165
C166
470p
AUD_R_LINE_IN
AUD_L_LINE_IN
LINE_OUT_R
LINE_OUT_L
R166 33
R167 33
R168
10k
R169
10k
2 1
FB3 FB120S
2 1
FB5 FB120S
470p
C167
C168
470p
LINE_OUT_R1
LINE_OUT_L1
2 1
FB1 FB120S
470p
C164
AUD_L_LINE_IN
LINE_OUT_R1
LINE_OUT_L1
Micro Star Restricted Secret
Title
REALTEK ALC201A
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Page 27
5
4
3
2
1
ATA 33/66/100 Connector
PRIMARY IDE CONN.
R119
D D
HDDRST# 37
IDEACTP# 39
HDDRST#
33
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
PDREQ_R
PDIOW#_R
PDIOR#_R
PIORDY_R
PDDACK#_R
IRQ14_R
PDA1_R
PDA0_R PDA2_R
PDCS#1_R
IDEACTP#
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CB
N32-2201091-H06
PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15
ATADET0_R
PDCS#3_R
R120
470
C135
X_473P
PDD[15..0] 22
PDA[2..0] 22
SDA[2..0] 22
SDD[15..0] 22
RESVD
C C
SECONDARY IDE CONN.
R125
IDEACTP#
IDEACTS#
HDDRST#
33
SDD_7
SDD_6
SDD_5
SDD_4 SDD_11
SDD_3 SDD_12
SDD_2
SDD_1 SDD_14
SDD_0 SDD_15
SDREQ_R
SDIOW#_R
SDIOR#_R
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDA0_R
SDCS#1_R
IDEACTS#
R462 10K
R129 10K
VCC
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CW
N32-2201091-H06
ATADET1_R
SDA2_R
SDCS#3_R
SDD_8
SDD_9
SDD_10
SDD_13
R126
470
C136
X_473P
RESVD
HDDRST# 37
B B
IDEACTS# 39
PDD[15..0]
PDA[2..0]
SDA[2..0]
SDD[15..0]
RN17
8P4R-22
SDA0
SDA2
IRQ14 22
SDDACK# 22
IRQ15 22
SIORDY 22
SDIOR# 22
SDIOW# 22
SDREQ 22
ATADET1 22
ATADET0 22
IRQ14
SDDACK#
SDA1
IRQ15
SIORDY SIORDY_R
SDIOR#
SDIOW#
SDREQ
SDD8
SDD6
SDCS#1 22
SDCS#3 22
SDD4
SDD11
SDD5
SDD10
SDD13 SDD_13
SDD2
SDD3
SDD12
SDD0
SDD15
SDD1
SDD14
RN19 8P4R-22
RN21 8P4R-22
RN22 8P4R-22
R123 22
R124 22
RN25 8P4R-22
RN27 8P4R-22
RN28 8P4R-22
R127 22
R128 22
SDA0_R
1 2
SDA2_R
3 4
IRQ14_R
5 6
7 8
1 2
SDDACK#_R
3 4
SDA1_R
5 6
IRQ15_R
7 8
7 8
SDIOR#_R
5 6
SDIOW#_R
3 4
SDREQ_R
1 2
SDD_9 SDD9
7 8
SDD_8
5 6
SDD_7 SDD7
3 4
SDD_6
1 2
SDCS#1_R SDCS#1
SDCS#3_R SDCS#3 PDD_3 PDD3
SDD_4
7 8
SDD_11
5 6
SDD_5
3 4
SDD_10
1 2
7 8
SDD_2
5 6
SDD_3
3 4
SDD_12
1 2
SDD_0
7 8
SDD_15
5 6
SDD_1
3 4
SDD_14
1 2
ATADET1_R ATADET1
ATADET0_R ATADET0
PDCS#1
RN18 8P4R-22
RN20 8P4R-22
R121 22
R122 22
RN23 8P4R-22
RN24 8P4R-22
RN26 8P4R-22
RN29
8P4R-22
PDREQ 22
PDIOW# 22
PDIOR# 22
PIORDY 22
PDDACK# 22
PDREQ
PDIOW#
PDIOR#
PIORDY
PDD1 PDD_1
PDD14
PDD0
PDD15
PDCS#1 22
PDCS#3 22
PDD12
PDD2
PDD13
PDD5
PDD10 PDD_10
PDD4
PDD7
PDD8
PDD6
PDD9
PDDACK#
PDA1
PDA0
PDA2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
PDREQ_R
PDIOW#_R
PDIOR#_R
PIORDY_R
PDD_14
PDD_0
PDD_15
PDCS#1_R
PDCS#3_R PDCS#3
PDD_12
PDD_2
PDD_13
PDD_5
PDD_4
PDD_11 PDD11
PDD_7
PDD_8
PDD_6
PDD_9
PDDACK#_R
PDA1_R
PDA0_R
PDA2_R
Near SB < 1" ( or Damping Rs)
PIORDY_R
SIORDY_R
A A
IRQ14_R
IRQ15_R
R136 4.7K
R138 4.7K
R140 10K
R142 10K
5
PDREQ_R
SDREQ_R
PDD7
SDD7
ATADET0_R
ATADET1_R
R137 5.6K
R139 5.6K
R141 10K
R143 10K
R144 15K
R145 15K
4
Micro Star Restricted Secret
Title
Document Number
3
2
ATA 33/66/100 Connector
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
27 41
1
Rev
100
of
Page 28
5
4
3
2
1
D D
5VDUAL
RN15 8P4R-00
L16
USBN2
USBN2 21
C C
B B
USBP2
USBP2 21
USBN3
USBN3 21
USBP3
USBP3 21
USBN1 21
USBP1 21
USBN0 21
USBP0 21
USBN1
USBN0
USBP0
8
7
6
5
X_CMC-L02-9007030-C71
RN16 X8P4R-00
L17
8
7
6
5
X_CMC-L02-9007030-C71
FRONT USB PORT
USB_OC#1 21
7 8
5 6
3 4
1 2
1
2
3
4
7 8
5 6
3 4
1 2
1
2
3
4
F2
YFUSE2.6AS-P
USB_OC#1
USB_D1ÂUSB_D1+
USB_D0ÂUSB_D0+
V_FUSB
USB_D2ÂUSB_D2+
USB_D3ÂUSB_D3+
C134
X_104P
+
KEY
USB 2.0 PIN HEADER
(BLUE)
V_FUSB
KEY
USB 2.0 PIN HEADER
(BLUE)
47K
R117
R118
56K
EC34
1000U/6.3V
JUSB1
1 2
3 4
5 6
7 8
9 10
YJ205/Blue
N31-2051131-H06
JUSB2
1 2
3 4
5 6
7 8
9 10
XYJ205/Blue
N31-2051131-H06
C133
X_104P
USB_OC#1
USB_OC#1
USB_D3ÂUSB_D3+
USB_D0ÂUSB_D0+ USBP1
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Front USB Port
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
28 41
Rev
100
of
Page 29
5
D D
4
3
2
1
REAR USB PORT
5VDUAL
F1
USB_OC#5
C132
104P
V_BUSB
USBN4 21
USBP4 21
USBN5 21
EC33
+
47K
R116
56K
USBN4
USBP4
USBN5
USBP5 21
USBP5
1000U/6.3V
RN14 X_8P4R-00
L15
8
7
6
5
CMC-L02-9007020-C71
C131
X_104P R115
7 8
5 6
3 4
1 2
1
2
3
4
USB_D4ÂUSB_D4+
USB_D5ÂUSB_D5+
YFUSE1.1AS-P
USB_OC#5 21
C C
V_BUSB
USB CONNECTOR
USB1
9
1
2
3
4
12 11
USB*2/WO-LAN
10
5
6
7
8
USB_D5ÂUSB_D5+
For EMI
CP15
B B
X_COPPER
CP16
X_COPPER
PGND
PGND
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Rear USB Port
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
29 41
Rev
100
of
Page 30
5
4
3
VCC
2
1
Super I/O
1 23 45 6
7 8
VCC
3VDUAL
RN10
1K_8P4R
D18 1N4148S
A C
PD[7..0] 34
EXTSMI# 34
FDD1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
YJ217-D
N32-2173021-H06
FLOPPY DISK HEADER
FP_WP
R428
X_2.7K
VCC3
R113
X_330R
GP26
Q27
X_N-MMBT3904_SOT23
2
JFAN1
1
2
X_YJ102
Q47
B
X_MMBT3904
E C
Power-on strap, enable 48MHz
RTSA#
DTRA#
SOUTA
VCC
VCC
IRTX
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VCC
R110
4.7K
RN11 8P4R-4.7K
7 8
5 6
3 4
1 2
C128
C129
104P
C130
104P
104P
MSI/Intel IR
HEADER
JIR1
CUT
1
NA
3
+5V
5 6
IRTX IRRX
JIR1
N31-2031031-C09
Micro Star Restricted Secret
2
4
GND
Winbond W697HF
MS-9130
SOUTB
IRRX
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
30 41
of
Rev
100
DRVDEN0
EXTSMI#
INDEX#
MOA#
DSA#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
R114 4.7K
CP14
R108
1K
PD[7..0]
RSLCT 34
RPE 34
RBUSY 34
RACK# 34
RSLIN# 34
RINIT# 34
RERR# 34
RAFD# 34
RSTB# 34
DCDA# 34
DSRA# 34
SINA 34
RTSA# 34
SOUTA 34
CTSA# 34
DTRA# 34
RIA# 34
DCDB# 34
DSRB# 34
SINB 34
RTSB# 34
SOUTB 34
CTSB# 34
DTRB# 34
RIB# 34
VTIN_GND
VCC3
D D
LPC_REQ# 23
THERMDA_CPU2 13,31
THERMDA_CPU1 6,31
C C
B B
VCC
A A
VCC
R109
4.7K
THERMDA_CPU2
THERMDA_CPU1
VCC3
RN12 8P4R-4.7K
7 8
5 6
3 4
1 2
RN13 8P4R-4.7K
7 8
5 6
3 4
1 2
5
102P
C679
PCIDEVRST# 17,32,35,37
SIOPCLK 4
SERIRQ 22
LPC_FRAME# 23,32
LPC_AD0 23,32
LPC_AD1 23,32
LPC_AD2 23,32
LPC_AD3 23,32
VREF 31
VTIN1 31
C680
102P
-12VIN 31
+12VIN 31
C124
X_104P
THRM# 6,22,37
3VDUAL
DLED1
DLED#1
DLED2
DLED#2
DLED3
DLED#3
DLED4
DLED#4
5VSB
C125
104P
BEEP 31
CHASISS 31
PCI_PME# 20,22,24,25,35
SUSB# 20,22,37
FANOUT1 31
FANOUT2 31
FANOUT3 31
R111 X_0
R426 4.7K
C126
104P
VCORE
FANIN1 31
FANIN2 31
FANIN3 31
VCC3
SIO_SMI#
DLED#4
DLED#2
DLED1
DLED4
DLED#3
DLED#1
DLED2
DLED3
FP_WP
GP26
R112 X_0
SIO48M
SIO48M 4
VBAT1
VCC
C127
104P
VAVCC 31
DLED#4 DLED4
DLED#3
DLED#2
DLED#1 DLED1
4
U15
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/P15/GP13
123
GPY1/GP15
128
GPSA1/P12/GP10
121
GPSA2/GP17
126
GPX1/P14/GP12
124
GPY2/P16/GP14
127
GPSB1/P13/GP11
122
GPSB2/GP16
120
MSO/IRQIN0/GP20
119
MSI/GP21
118
GP22
101
VREF
102
VTIN
103
CPUTIN
104
SYSTIN
93
GP26
94
GP25
95
GP24
96
GP23
97
VIN2
98
VIN1
99
VIN0
100
VCORE
105
GP55
106
VID4/GP54
107
VID3/GP53
108
VID2/GP52
109
VID1/GP51
110
VID0/GP50
116
FANOUT1
113
FANIN1
115
FANOUT2
112
FANIN2
7
FANOUT3
5
FANIN3
111
OVT#
58
Beep
76
CASEOPEN#
19
PME#
89
WDTO/GP33
91
SDA/GP31
92
SCL/GP30
67
PSOUT#/GP47
68
PSIN/GP46
64
SUSLED/GP37
90
PLED/GP32
72
PWRCTL#/GP42
73
SLP_SX#/GP41
18
CLKIN
61
VSB
74
VBAT
28
VCC3
77
GP36
12
VCC_1
48
VCC_2
114
AVCC
W83627THF
DELD
JLED
1 2
3 4
5 6
7 8
YJ205
N31-2051051-P05
SIO
RSMRST#/GP44
PWROK/GP43
Distribute near the VCC
power pin of the LPC
DLED3
DLED2
10
DRVDEN0
DRVDEN1
INDEX#
MOA#
DSA#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP34
GP45
IRTX
GP40
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
GP35
VSS1
VSS2
AGND
1
2
3
4
6
8
9
10
11
13
14
15
16
17
PD0
42
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
41
40
39
38
37
36
35
31
32
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85
59
60
63
62
66
65
70
71
86
20
55
117
PD1
PD2
PD3
PD4
PD5
PD6
PD7
IRRX
IRTX
R461 4.7K
RTSA#
SOUTA
DTRA#
RTSB#
SOUTB
DTRB#
VTIN_GND
VTIN_GND 6,13
X_COPPER
3
Page 31
5
4
3
2
1
RT1
YT103S-1N
SMD SYSTEM Thermal
D S
G
A C
D19 1N5817S
R446
4.7K
R447
1K
VCC
D S
Q24
G
2N7002S
Q21
2N7002S
R94
470
VCC
Q51
2N7002S
R105
VTIN1 30
THERMDA_CPU1 6,30
THERMDA_CPU2 13,30
R90
4.7K
R91
1K
2N-SI2303DS
A C
D20 1N5817S
R100
4.7K
R101
1K
Q22
4
2N-SI2303DS
+12V
+ EC30
Q23
2N-SI2303DS
Q20
10U/16V/S
470
R448
5
R82
10KST
R88
30KST
R89
30KST
FANOUT1 30
D S
G
470
VREF
D D
C C
FANOUT2 30
B B
FANOUT3 30
A A
Hardware Monitor
L11
1 2
1 2
+12V
L12
X_0/0805
R97
4.7K
L14
X_0/0805
Q25
X_2N-SI2303DS
EC32
+
X_10U/16V/S
1 2
X_80S/0805/2A
CP13
X_COPPER
CFAN2
3
2
1
YJ103-BO
VCC
+12V
+12V
+
+ EC29
10U/16V/S
EC31
10U/16V/S
RESVD
R92
4.7K
CFAN1
3
2
1
YJ103-BO
D12
1N4148S
CPU2 FAN
R102
4.7K
SFAN1
3
2
1
SYSTEM FAN
YJ103-BO
R107
X_4.7K
SFAN2
X_YJ103-BO
D11
1N4148S
CPU1 FAN
R98
27K
D13
1N4148S
D14
X_1N4148S
3
2
1
3
R103
VAVCC
R93
27K
27K
C123
104P
VAVCC 30
FANIN1 30
R95
10K
FANIN2 30
R99
10K
FANIN3 30
R104
10K
+12V
-12V
R81 28KST
R83 232KST
VCC
2
+12VIN 30
-12VIN 30
R87
R85
10KST
56KST
VREF
Chasiss Intrusion Header
VBAT1
R96
2M
CHASISS
JCI1
1
2
YJ102
+12V
L24
0/0805
1 2
1 2
BEEP 30
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
CHASISS 30
L13
X_0/0805
BH1X2_white
2
1
for NB chipset fan
NBFAN1
VCC
R106
10K
Q26
2N3904S
Micro Star Restricted Secret
Hardware Monitor
MS-9130
VREF 30
ALARM 39
Last Revision Date:
Thursday, July 17, 2003
Sheet
31 41
1
Rev
100
of
Page 32
5
4
3
2
1
32
27
VCC
VCCA
CLK
MODE
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
RESET_L
WE_L
OE_L
Flash256k x 8LPC
VID[0..4] 6,19
H1_VID[0..4] 13
1 2
VCC3
SYSTEM ROM
25
1
U12
VPP
VDD
GND
GND1
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
RFU
CE
21
20
19
18
17
15
14
13
22
28
16
26
LPC_DQ7
LPC_DQ6
LPC_DQ5
LPC_DQ4
LPC_AD3
LPC_AD2
LPC_AD1
R72 1K
R74 1K
VCC
R77
1K
U13A
SKTOCC_1_L 15
1
2
74F00-SOIC14
7
U13B
4
5
74F00-SOIC14
R80
4.7K
3
7
LPC_AD3 23,30
LPC_AD2 23,30
LPC_AD1 23,30
LPC_AD0 23,30
14
3
14
6
RN7
8P4R-4.7K
1 2
3 4
5 6
7 8
VCC3
C119
0.1u
CLOSED TO U28
1 2
R79 4.7K
C120
0.1u
LOW ENABLE
B
VCC
C121
0.1u
1 2
R78
8.2K
Q19
E C
MMBT3904
C122
0.1u
VRM_OUTEN_L 19
Micro Star Restricted Secret
Title
SYSTEM ROM & VCORE COMPARE
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
32 41
1
Rev
100
of
RN6 1K_8P4R
GPI3
GPI2
GPI1
GPI0
GPI4
D D
ID3
ID2
ID1
ID0
C C
VCC2_5
B B
R69 1K
RN8
X_1K_8P4R
R433 X_1K
R434 X_1K
R435 X_1K
R436 X_1K
R76 X_1K
1 2
3 4
5 6
7 8
FWH_PCI 4
1 2
3 4
5 6
7 8
VCC3
PCIDEVRST# 17,30,35,37
H1_VID1
FWH_PCI
R70 4.7K
R71 4.7K
R73 4.7K
LPC_FRAME# 23,30
R75 4.7K
VCC3
VID0
VID1
VID2
VID3
VID4
31
29
GPI4
30
GPI3
GPI2
GPI1
GPI0 LPC_AD0
ID3
ID2
ID1
ID0
3
4
5
6
7
8
9
10
11
12
2
23
24
H1_VID2
H1_VID3
H1_VID4
H1_VID0
H1_VID0
H1_VID1
H1_VID2
H1_VID3
H1_VID4
VCC3
U14A
VID2
14
1
2
7
14
4
5
7
14
9
10
7
14
12
13
7
74LCX86-SO14
U14B
74LCX86-SO14
U14C
74LCX86-SO14
U14D
74LCX86-SO14
3
6
8
11
VID0
H1_VID0
VID1
H1_VID1
H1_VID2
A A
5
VID3
H1_VID3
A C
A C
A C
A C
4
D6
1N4148S
D8
1N4148S
D9
1N4148S
D10
1N4148S
Page 33
5
4
3
2
1
Keyboard/Mouse Ports
D D
C117
104P
L7
1 2
121S/0603
L8
1 2
121S/0603
L9
1 2
121S/0603
L10
1 2
121S/0603
V_BUSB
RESVD
L6 X_80S/1206
1 2
CP10 X_COPPER
R68
X_330
XKBDAT1
XMSCLK1
XMSDAT1
XKBCLK1
XMSCLK1
XKBDAT1
XMSDAT1
C118
104P
PGND
1 2
3 4
5 6
7 8
CN9
8P4C-180P
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
13
1
5
3
15 17
PGND PGND
YMD12P-1
N56-12F0031-F02
16
10
12
8
7
11
9
PGND
V_BUSB
EC28
+
X_10U/16V/S
PGND PGND
C C
B B
KBDAT# 21
KBCLK# 21
MSCLK# 21
MSDAT# 21
KBDAT#
KBCLK# XKBCLK1
MSCLK#
MSDAT#
MSDAT#
KBDAT#
MSCLK#
KBCLK#
RN5
1 2
3 4
5 6
7 8
8P4R-4.7K
CP11 X_COPPER
CP12 X_COPPER
PGND
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
KeyBoard / Mouse Port
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
33 41
Rev
100
of
Page 34
5
4
3
2
1
LPT / COM PORTS
D D
RSTB# 30
RACK# 30
RBUSY 30
RPE 30
RSLCT 30
RAFD# 30
RINIT# 30
RERR# 30
RSLIN# 30
C C
PD[7..0]
PD[7..0] 30
RSTB#
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSLIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
R67 4.7K
RN1
7 8
5 6
3 4
1 2
8P4R-4.7K
RN2
7 8
5 6
3 4
1 2
8P4R-4.7K
RN3
8P4R-4.7K
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN4
8P4R-4.7K
VCC
D3
1N4148S
For EMI
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSLIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RSTB#
CN1
1 2
3 4
5 6
7 8
8P4C-180P
CN2
1 2
3 4
5 6
7 8
8P4C-180P
CN3
1 2
3 4
5 6
7 8
8P4C-180P
CN4
1 2
3 4
5 6
7 8
8P4C-180P
C113 180P
NDCDA# NDSRA#
NSINA
NSOUTA
NDTRA
1
2
3
4
5
11 10
COM1
6
7
8
9
COM-PORT
N51-09M0021-F02
PGND
NDCDB#
NSINB
NSOUTB
NDTRB
1
2
3
4
5
11 10
COM2
6
7
8
9
COM-PORT
N51-09M0021-F02
PGND
NSOUTB
JLCD1
1 2
3 4
5 6
CON2X3A
NRTSA
NCTSA#
NRIA#
NDSRB#
NRTSB
NCTSB#
NRIB#
NSINB
C114
0.1u
NRIA#
NRIB#
VCC
PGND
C115
104P
+12V VCC
-12V
B B
A A
C116
X_104P
D4
1N4148S
D5
1N4148S
RTSB# 30
DTRB# 30
SOUTB 30
RIB# 30
CTSB# 30
DSRB# 30
SINB 30
DCDB# 30
5
RTSA# NRTSA
RTSA# 30
DTRA# NDTRA
DTRA# 30
SOUTA NSOUTA
SOUTA 30
RIA# NRIA#
RIA# 30
CTSA# NCTSA#
CTSA# 30
DSRA# NDSRA#
DSRA# 30
SINA NSINA
SINA 30
DCDA# NDCDA#
DCDA# 30
RTSB# NRTSB
DTRB# NDTRB
SOUTB NSOUTB
RIB# NRIB#
CTSB# NCTSB#
DSRB# NDSRB#
SINB NSINB
DCDB# NDCDB#
U10
1
16
15
13
19
18
17
14
12
10
VDD(12V)
DA1
DA2
DA3
RA1
RA2
RA3
RA4
RA5
VSS(-12V)
GD75232S
VCC(5V)
GND
DY1
DY2
DY3
Multiple RS232 Drivers and Receivers
U11
1
16
15
13
19
18
17
14
12
10
VDD(12V)
DA1
DA2
DA3
RA1
RA2
RA3
RA4
RA5
VSS(-12V)
GD75232S
VCC(5V)
Multiple RS232 Drivers and Receivers
4
20
5
6
8
2
RY1
3
RY2
4
RY3
7
RY4
9
RY5
11
GND
20
5
DY1
6
DY2
8
DY3
2
RY1
3
RY2
4
RY3
7
RY4
9
RY5
11
VCC
NRTSB
NDSRB#
NCTSB#
NRIB#
NDCDB#
NSOUTB
NSINB
NDTRB
NRTSA
NDSRA#
NCTSA#
NRIA#
NDCDA#
NSOUTA
NSINA
NDTRA
RESVD
CN5
1 2
3 4
5 6
7 8
8P4C-180P
CN6
1 2
3 4
5 6
7 8
8P4C-180P
CN7
1 2
3 4
5 6
7 8
8P4C-180P
CN8
1 2
3 4
5 6
7 8
8P4C-180P
L5 X_80S/1206
1 2
CP9 X_COPPER
3
PGND
PGND
LPT1
48
LPT
N51-25F0041-F02
51
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
Title
PGND
2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
RSLCT
RPE
RBUSY
RACK#
PD7
PD6
PD5
PD4
PD3
RSLIN#
PD2
RINIT#
PD1
RERR#
PD0
RAFD#
RSTB#
Micro Star Restricted Secret
LPT / COM Port
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
34 41
of
Rev
100
Page 35
5
VCC3 VAUX_12
A7B3C5E1E4G1K3L4N6
D D
AD[31..0] 21,24,25
C C
C_BE#[3..0] 21,24,25
R55 G_4.7K
3VDUAL
PCIDEVRST# 17,30,32,37
B B
GLAN_PCLK 4
Y1
G_25MHZ-18pf/30ppm
VAUX_12
600OHM/100M
A A
VAUX_12
DEVSEL# 21,24,25
AD22
PCI_PME# 20,22,24,25,30
SMBCLK1 4,9,10,22,24,25,37
SMBDATA1 4,9,10,22,24,25,37
VAUX_25
C106 G_10P/X7R
C107 G_10P/X7R
L3
L4
600OHM/100M
PREQ#4 21
PGNT#4 21
FRAME# 21,24,25
TRDY# 21,24,25
PERR# 21,24,25
SERR# 21,24,25
PIRQ#A 20,21,24,25
R60 G_100
PREQ#4
PGNT#4
FRAME#
IRDY#
IRDY# 21,24,25
DEVSEL#
STOP#
STOP# 21,24,25
TRDY#
PAR
PAR 21,24,25
PERR#
SERR#
PIRQ#A
PCIDEVRST#
C102 X_68P
R476 X_4.7K
LAN_CLKRUN#
LOW_PWR
C109
G_2.2u/0805_X-F
C111
G_2.2u/0805_X-F
5
VAUXPRSNT
C110
G_104P_X-F
C112
G_104P_X-F
U7
VDDIO_PCI
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
C687
104P
VDDIO_PCI
N7
AD0
M7
AD1
P6
AD2
P5
AD3
N5
AD4
M5
AD5
P4
AD6
N4
AD7
P3
AD8
N3
AD9
N2
AD10
M1
AD11
M2
AD12
M3
AD13
L1
AD14
L2
AD15
K1
AD16
E3
AD17
D1
AD18
D2
AD19
D3
AD20
C1
AD21
B1
AD22
B2
AD23
B4
AD24
A5
AD25
B5
AD26
B6
AD27
C6
AD28
C7
AD29
A8
AD30
B8
AD31
M4
CBE_0#
L3
CBE_1#
F3
CBE_2#
C4
CBE_3#
J12
VAUXPRSNT
C3
REQ#
J3
GNT#
F2
FRAME#
F1
IRDY#
H3
DEVSEL#
H1
STOP#
G3
TRDY#
J1
PAR
J2
PERR#
A2
SERR#
H2
INTA#
C2
PCI_RST#
A3
PCI_CLK
A4
IDSEL
A6
PME#
C8
CSTSCHG
H4
CLKRUN#
A10
SMB_CLK
C9
SMB_DATA
M11
LOW_PWR
F4
M66EN
J14
XTALVDD
N11
XTALI
N10
XTALO
P7 L14
PLLVDD3 L14
H14
PLLVDD2
L8
L8
M9
M9
N8
N8
VSS
VSS
VSS
B7D4D5D6D7D8D9E2E5E6E7E8E9F5F6F7F8F9F10G4G5G6G7G8G9
P2
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
15mm x 15mm
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
4
H7H8J5J6J7J8J9
E12H5H6
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
BGA196
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
4
J10K5K6K7K8K9K10L5L10
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G10H9K2L6L9
VDDC
VSS
VDDC
VSS
M14
N14P8P12
VDDC
VDDC
VDDC
VDDC
BIASVDD
LINKLEDB
SPD100LEDB
SPD1000LEDB
TRAFFICLEDB
SPROMDOUT
SPROMDIN
REGSUP25
REGCTL25
REGSEN25
REGSUP12
REGCTL12
REGSEN12
VSS
VSS
VSS
VSS
M12
M13
M6
VDDC
VDDC
VDDIO
VDDIO
VDDIO
VDDIO
VESD1
VESD2
VESD3
VDDP
VDDP
VDDP
AVDD
AVDD
AVDDL
AVDDL
TRD[3]ÂTRD[3]+
TRD[2]ÂTRD[2]+
TRD[1]ÂTRD[1]+
TRD[0]ÂTRD[0]+
RDAC
GPIO0
GPIO1
GPIO2
EECLK
EEDATA
TRST#
SCLK
VSS
VSS
N1
N12
P13
P14
VDDC
VDDC
TDI
TCK
TMS
TDO
L7
K11
K4
J11
J4
H10
M8
L11
SI
SO
CS#
VSS
N13
BIASVDD
A14
A11
3VDUAL
F11
K12
L12
P1
VCC3
G2
A1
VAUX_25
K14
L13
P11
A13
F14
F12
F13
E14
E13
D14
D13
C14
C13
B14
B13
G13
LAN_LINK100_J
H13
LAN_LINK1000_J
G12
LAN_ACTIVE
G14
R54 G_1.24KST
D10
H12
EEWP#
K13
J13
EECLK
M10
EEDATA
P10
SPROMDOUT
N9
SPROMDIN
P9
R59 G_4.7K
D11
D12
C12
A12
B12
B11
VAUX_25_CTL
C11
VAUX_25
C10
B9
VAUX_12_CTL
B10
A9
L7
R61 X_G_300RST_X-F
K11
K4
J11
J4
H10
Near LAN Controllor
M8
L11
E10
G11
E11
H11
G_BCM5705
C82
104P
C684
104P
3
104P
MX3ÂMX3+
MX2ÂMX2+
MX1ÂMX1+
MX0ÂMX0+
G_BCP69_X-F
Q18
G_BCP69_X-F
CLKRUN# 22
3
L2
600OHM/100M
L25
600OHM/100M
C86
600OHM/100M
MX3- 36
MX3+ 36
MX2- 36
MX2+ 36
MX1- 36
MX1+ 36
MX0- 36
MX0+ 36
LAN_LINK100_J 36
LAN_LINK1000_J 36
LAN_ACTIVE 36
3VDUAL
3 2
1
Q17
4
3 2
1
4
+
EC27
100u/16V
3VDUAL
VAUX_25
VAUX_25
VAUX_12
L27
CLOSED TO CHIP
+
EC25
100u/16V
+
EC26
100u/16V
R64 0
R65 X_4.7K
VAUX_12
C108
G_103P
2
3VDUAL
C83
104P
SOLDER SIDE
VAUX_25
VAUX_25
C103
G_104P
R63 X_100
LAN_CLKRUN#
LOW_PWR
R66 G_0
2
C98
104P
C104
G_103P
C84
104P
C85
104P
C99
104P
SOLDER SIDE
C100
104P
1
VAUX_12
C90
C91
102P
104P
SOLDER SIDE
Place near GIGA-bits PCI controlor .
VCC3
C94
C101
X_104P
3VDUAL
R56
G_1K_X-F
EEWP#
EECLK
EEDATA
EEDATA
EECLK
SPROMDOUT
SPROMDIN
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
SOLDER SIDE
3VDUAL
R58
R57
G_1K_X-F
G_1K_X-F
G_AT24C128N/16K*8/10mS_X-F
U9
1
CSDOVCC
2
SK
3
DI
4
X_AT93C46-3GR/SIC8
Micro Star Restricted Secret
GIGA LAN
MS-9130
104P
U8
8
VCC
7
WP#
6
SCL
5 4
SDA GND
M33-2412803-A26
3VDUAL
8
7
NC
6
NC
5
GND
Last Revision Date:
Sheet
1
C97
104P
Thursday, July 17, 2003
35 41
C93
C92
104P
104P
C95
C96
104P
X_104P
1
A0
2
A1
3
A2
C105
X_104P
R62
X_0
Rev
100
of
Page 36
5
D D
4
3
2
1
U26
1
TCT1
MX0+ 35
MX0- 35
MX1+ 35
MX1- 35
C C
MX2+ 35
MX2- 35
MX3+ 35
MX3- 35
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12 13
TD4- MX4-
MCT1
MX1+
MX1ÂMCT2
MX2+
MX2ÂMCT3
MX3+
MX3ÂMCT4
MX4+
24
23
22
21
20
19
18
17
16
15
14
GA_LAN_MXI0P
GA_LAN_MXI0N
GA_LAN_MXI1P
GA_LAN_MXI1N
GA_LAN_MXI2P
GA_LAN_MXI2N
GA_LAN_MXI3P
GA_LAN_MXI3N
GA_LAN_MXI0P
GA_LAN_MXI0N
GA_LAN_MXI1P
GA_LAN_MXI2P
GA_LAN_MXI2N
GA_LAN_MXI1N
GA_LAN_MXI3P
GA_LAN_MXI3N
GS5008
R320
C298
0.1u/16V
0.1u/16V
C301
0.1u/16V
C306
0.1u/16V
B B
R321
49.9RST
R323
49.9RST
R325
49.9RST
R327
49.9RST C303
R328
49.9RST
R329
49.9RST
R330
49.9RST
R331
49.9RST
0.01u/50V/X7R
C302
0.01u/50V/X7R
0.01u/50V/X7R
C304
VAUX_25
C305
0.01u/50V/X7R
R322
R324
R326
75
75
75 C299
75
GIGA_GND
C300 0.01u/50V/X7R
JLAN1
15
1
2
3
4
5
6
7
8 9
16
RJ45GY
GIGA_GND_1
12
11
10
R314 330
R316 330
R317 330
L23
0-0805
3VDUAL
LAN_ACTIVE 35
LAN_LINK100_J 35
LAN_LINK1000_J 35
BOM is resistor
3VDUAL
1 2
A A
Title
Document Number
5
4
3
2
Micro Star Restricted Secret
RJ45 CONNECTOR
MS-9130
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Last Revision Date:
Thursday, July 17, 2003
Sheet
36 41
1
Rev
100
of
Page 37
8
3VSB MODE SELECT
3VSB MODE
D D
SINGLE MOSFET
DUAL MOSFET
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
C C
FRONT PANEL RESET BUTTON
PCIRST# INPUT
PCIRST# BUFFER OUTPUT
PCI SOLT PCIRST# BUFFER OUTPUT
B B
CONNECT TO SOUTH BRIDGE SUSB# SIGNAL
THE TWO BLOCK CHOICE ONE
SUPPORT SYSTEM POWER CONTROL
A A
8
SUSB# 20,22,30
3VDLDEC#
PULL LOW
PULL HIGH
EXTRAM
PULL LOW
PULL HIGH
PS_OUT# 39
7
R38
4.7KR
7
PLED1 39
N-MMBT3904_SOT23
SUSLED 39
N-MMBT3904_SOT23
FP_RST# 39
PCIRST# 20,21
HDDRST# 27
PCIDEVRST# 17,30,32,35
PG_VCORE 19
VCORE_EN# 19
1.25VREF 38
PCISLOTRST# 24,25
CLOSE TO CHIP
5VSB
5VSB
R36
R37
4.7KR
10K
Q13
N-MMBT3904_SOT23
PW_OK1 38
R31
4.7KR
VDDA_25
C76
C0.1U16Y
R42
X_0R
6
5VSB
R22
330R
Q6
5VSB
R26
330R
Q7
VCC3
VCC3
VCC
R30
330R
EC11
100u/16V
VCC
+
5VSB
VCC3
DDR AND DDR II VOLT SELECT
DDRTYPE
PULL LOW
PULL HIGH
6
R24
4.7KR
R28
4.7KR
R32
100R/0805
C74 C0.1U16Y
C73 C4.7U10Y0805
R39
R40
5VSB
5VSB
C75 C0.1U16Y
R29
10KR
X_4.7KR
4.7KR
R23
X_1KR
R25
R27
X_1KR
5VSB
VDIMM
10KR
EXTRAM
1
2
3
4
5
6
7
8
9
10
11
12
2.5V
1.8V
FP_RST#
PCIRST#
HDD_RST#
DEV_RST#
VDD_GD
VDD_EN
1.25VREF
VCC5
SLOT_RST#
VCC3
2.5VDDA
AGND0
5
3VDLDEC#
C664
C0.1U16Y
48
PLED1/EXTRAM
PSIN#
1314151617181920212223
C77 C0.47U10X
5
I2C_CLK
I2C_DATA
CPU_PWGD
CHIP_PWGD
PLED0/3VDLDEC#
PSOUT#
MEMBTSS5VSB
DDRTYPE
C78
C0.1U16Y
R43
2.2KR1%
C81
4
THESE OUTPUT AND INPUT PIN MUST
BE PULL HIGH
VCC2_5 3VDUAL
R442
1KR
R459 33
R460 33
5VSB
C68
C0.1U16Y
U5
C69
36
C1
35
C2
CHRPMP
AGND1
5V_DRV
VAGP_DRV
VAGP_SEN
WD_DET
WATCHING DOG TIMER SELECT
C0.1U16X
34
33
32
31
30
29
28
27
26
25
MS-6
R33
10K
X_10K
VCC2_5
S3#
S5#
5VSB
PWR_OK
RSMRST#
VDIMM_LSEN
VDIMM_LDRV
VDIMM_HSEN
VDIMM_HDRV
3VSB_SEN
3738394041424344454647
GND
5VUSB_DRV
1.2VLDT_DRV
1.2VLDT_SEN
TMP_FAULT#
3VSB_DRV
24
WD_DET
PULL HIGH
VCC3
EC14
1000U/6.3V
+
D
Q14
3055LSB
G
R44
1KR1%
X_C1U16Y0805
S
D
S
Q16
3055LSB
4
+
EC23
VDD_25_SUS
1000U/6.3V
G
LINEAR MODE
R443
4.7KR
CPU_GD 6,13
ALL_PWRGD 23,39
SMBCLK1 4,9,10,22,24,25,35
SMBDATA1 4,9,10,22,24,25,35
RSMRST# 23
SUSC# 22
SUSB# 20,22,30
PW_OK 39
CHARGE PUMP
VOLTAGE
9VSB
OUTPUT
C71
C1U16Y0805
5V_DRV
R34
R35
10K
5VSB
TIMER
OFF PULL LOW
ON
THE VDIMM_HSEN IN LINEAR MODE
DDRTYPE
DDR
DDR II
X_C2200P16X
CLOSED TO Q15
3
CPU PWR_GD OUTPUT
CHIP PWR_GD OUTPUT
CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
ATX POWER OK INPUT
I2C BUS
I2C BUS
VCC
+
+
EC7
EC8
X_1000U/6.3V
1000U/6.3V
45N03
2
5VSB
Q8 2N351AN/SOT23
D
G
45N03
S
Q10
D S
G
Q9
D S
G
Low RDS ON MOSFET
C70 X_C2200P16X
C72 X_C2200P16X
CONNECT TO CPU
C665
C0.1U16Y
R475
THRM# 6,22,30
X_0R
THE TWO MODE ONLY ONE MODE PRESENT
SINGLE MODE DUAL MODE
THIS MODE SELECT BY PIN
47 PULL HIGH 5VSB
VDIMM_HSEN
VREF
2.0V
1.7V
C670
EC17
1000U/6.3V
Q50
45N03
G
EC13
560U/4V
3VSB REGULATE BY 5VSB AND VCC3
3VDUAL
1 2
+
+
EC18
CD470U10EL11.5
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
http://www.msi.com.tw
VCC
G
VCC3
D S
VDD_12_A
EC61
+
+
1000U/6.3V
THIS MODE SELECT BY
PIN 47 PULL LOW
VCC3
Q15
5V_DRV
3VSB_DRV
1
2
3
4 5
NN-P07D03LV_SO8
Micro Star Restricted Secret
APCI POWER CONTROLLER (MS-6)
MS-9130
2
5VDUAL
1 2
+
EC10
CD470U10EL11.5
VCC3
D
Q11
3055LSB
VDDQ
S
+
1000U/6.3V
EC12
5VSB
8
7
6
+
Last Revision Date:
Thursday, July 17, 2003
Sheet
37 41
1
5VSB
+
+
EC60
EC16
1000U/6.3V
of
1
EC6
1000U/6.3V
1000U/6.3V
Rev
100
Page 38
System Voltage Regulator
9VSB
R13
1KR
1.25VREF 37
1.25VREF
C64
C0.01U10Y
PW_OK1 37
1KR1%
8 4
3
+
2
-
R16
1KR1% R17
U4A
LM358_#B
1
G
EC3
1000U/6.3V
VCC3
D
S
+
EC1
1000U/6.3V
Q2
P3055LD
VCC2_5
+
3VDUAL
DDR TERMINATION
U6
7
ENABLE
6
VCNTL
5
BOOT_SEL
W83310DS
C79
C0.1U16Y
9
HEAT
GND
VREF1
VOUT
VIN VREF2
VDD_25_SUS
1 8
2
3
4
R45
R41
100
100
VTT_DDR_SUS
1 2
1 2
+
+
EC20
EC21
C80
1000U/6.3V
C0.1U16Y
1000U/6.3V
1.25VREF
C67
C0.01U10Y
1KR1%
9VSB
U4B
8 4
LM358_#B
5
+
6
7
-
R20
1KR1% R21
5VSB
Q5
D
2N351AN/SOT23
G
S
VSUS2_5
+
EC5
100u/16V
Micro Star Restricted Secret
Title
SYSTEM VOLTAGE REGULATOR
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
38 41
Rev
100
of
Page 39
5
FRONT PANEL
4
3
2
1
R2
4.7K
VCC3
VCC
R1 330
R4 100
C59
104P
SUSLED 37
PLED1 37
ALARM 31
SPKR 22
SPKR
HDDLED
SUSLED
PLED1
For MSI / Intel Front Panel
HDD+
X_0
R10
2.2K
R7
JFP1
JFP1_Pin-Header
N31-2051011-C09
1
3
5 6
7
9
1 2
3
5
HDD+
HDDÂRESET- PWSW+
RESET+
PWSW-
NC
GND SPEAKER
SLED
PLED
VCCSPK
JFP2
JFP2_Pin-Header
N31-2041021-C09
Q1
2N3904S
PLED
SLED
BUZ+
BUZ-
R9 110/0805
R471 110/0805
2
4
R5 100
8
4
6
8
PLED1
SUSLED
PWRSW
VCC
C60
X_104P
D1
IDEACTP# 27
1N4148S
Q52
2N3904S
J7
1
2
3
4
SCSI_LED
D2
1N4148S
SCSI Hardfile
LED Header
IDEACTS# 27
C626
470p
HDDLED
D17
1N4148S
D21
X_1N4148S
R464
2.2K
VCC
C627
0.01u
R427
330
R3
22
C58
104P
PWBTIN# 22
VIDSEL
23
IBM SCSI LED HEADER
HDDLED
D D
FP_RST# 37
CLK_RESET# 4
C C
B B
POWER OK Circuits
R6
NRIA#
NRIB#
330
-LDTRST 16
ALL_PWRGD
D22
1N4148S
D23
1N4148S
VCC2_5
NRIA#
NRIB#
VSUS2_5
1 2
U2A
14 7
VSUS2_5
3 4
R472
2.2K
C683
104P
VSUS2_5
R8
14 7
U2B
330
3VDUAL
R470
10KR
Q53
2N3904S
-CPURST 6,13 ALL_PWRGD 23,37
RI#
RI#
+12V-8P
8
7
6
Micro Star Restricted Secret
Title
Front Panel &Power OK Circuits
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-9130
Last Revision Date:
Thursday, July 17, 2003
Sheet
39 41
1
Rev
100
of
3.3V
3.3V
GND1
GND2
+5V
GND3
3.3V
VCC3
VCC
1
2
3
4
5V
5
6
7
8
9
10
12V
11
12V
12
VCC
PW_OK
C637
104P
5VSB
+12V
R430
4.7K
C63
104P
PW_OK 37
3
2
JPWR1
1
GND
+12V
2
GND
+12V
3
GND
+12V
4 5
GND +12V
POWER_CONN2X4
FOR CPU VRM
VCC3
13
3.3V
-12V
SB3_3V
VCC
C636
X_102P
5
PS_OUT#
PS_OUT# 37
A A
PS_ON#A 6
R429 0
14
15
16
17
18
19
20
21
22
23
24
-12V
GND4
PS_ON
GND5
GND6
GND7
3VSBY
5V
5V
5V
GND8
POWERCONN2X12
4
JPR1
PWROK
5VSBY
Page 40
5
4
3
2
1
VCC3
C10
X_104P
C20
104P
R451
C11
X_104P
C_0
C9
C8
104P
104P
D D
VCC3
C19
104P
C C
R449
R450
C_0
C_0
For EMI
FM1
X
X_FM
F_PAD_M100
FM11
X
FM2
X
X_FM
X_FM
F_PAD_M120
FM12
B B
A A
X
X_FM
FM4
FM3
X
X
X_FM
X_FM
FM13
FM14
X
X_FM
X
X_FM
FM6
FM5
X
X
X_FM
X_FM
FM15
X
X_FM
C21
X_104P
FM16
X
X_FM
R452
FM7
VCC
C2
C3
X_104P
X_104P
VCC
C24
C23
X_104P
104P
C660
C661
X_104P
X_104P
C_0
5/13
FM8
FM9
FM10
X
X
X_FM
FM17
X
X_FM
X_FM
FM18
X
X_FM
X
X_FM
X
X_FM
C4
104P
C662
X_104P
C5
X_104P
VCC
C22
X_104P
C663
X_104P
5/13
VCC
VCC3
3VDUAL
C30
X_104P
C37
X_104P
C52
X_104P
C6
104P
C7
X_104P
C31
104P
C38
104P
C53
X_104P
C32
C33
104P
104P
C39
X_104P
+12V -12V
C54
104P
C40
104P
C34
X_104P
C41
104P
C55
104P
5VSB
C35
104P
Decoupling Cap
C42
X_104P
C36
X_104P
SYSTEM
ATX VIA-Hole * 9
MH3
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH5
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH6
1
2
3
4
5
MH8
1
2
3
4
5
1
2
3
4
5
6
GND
7
GND
8
GND
9
GND
6
GND
7
GND
8
GND
9
GND
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
MH9
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
6
7
8
9
6
7
8
9
6
7
8
9
PGND
MH2
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH4
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH7
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH10
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6
7
8
9
6
7
8
9
6
7
8
9
6
7
8
9
T1
1
2
X_YJ102
5
Impedance Test
T2
1
2
X_YJ102
T3
1
2
X_YJ102
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
BULK / Decopuling
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
40 41
Rev
100
of
Page 41
5
PCB1
D D
P01-19130100
4
3
2
1
VBAT1
JPWR1_X
type
U5_1
1 2
0436-0095
U50_X
blackplane
U50_XX
RETENSION
U50_XXX
RETENSION
YSKTBT
D06-0100101-P01
U12_1
SST49LF040-33-4C-NH
U27_X
blackplane
C C
U27_XX
RETENSION
U27_XXX
RETENSION
JPR1_X
type
type-maker
B B
CPU BACK PLATE
CPU RETENSION
U19-F1
MSI
DDR
E32-0400030-A32
U10-H1
MSI
DDR
X_NB-HEATSINK-W/O Fan
?
For 10/100 Mbit LAN
U1
X_F_BCM4401/10-100MHz
B06-0440103-B11
C1
X_F_104P/0805
C11-1042034-W08
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
OPTION PARTS
MS-9130
Last Revision Date:
Sheet
1
Thursday, July 17, 2003
41 41
Rev
100
of