MSI MS-9103 Schematic 00A

Page 1
A
FLASH
4 4
i82559
PCI SLOT
33MHz/32b
FLPY
X-BUS
PCI BUS 0
USB
SIO 417
IDE
LPC BUS
B
FOSTER FOSTER
C
U126U125
CPUCPU
D
E
MS-9103 VER:0A
CPU BUS
0811
CSB5
Thin IMB
IMB BUS
CMIC
IMB BUS
J6 J2 J7 J3 J8 J4 J43 J44
MEMORY I/F
A_IMBB_IMB
DIMMs
8
PCI BUS 3
BCM5701
(P2)
PAGE # DESCRIPTION PAGE # DESCRIPTION
24.
SDRAMCLK BUFFER
25.
SDRAM_&_IMB_CLK_DELAY_LOOPS
26.
CIOBX1_PCI(X)
27.
CIOBX1_IMB_PWR
28.
CIOBX1 STRAPPING OPTIONs
29.
30.
SCSI 7899W 1/2(PCIXS1)
31.
SCSI 7899W 2/2
32.
SCSI CHANNEL 1
33.
SCSI CHANNEL 2
34.
SCSI MISC
35.
S1 BUS TERMINATOR
36.
CIOBX2_PCIX
37.
CIOBX2_IMB_PWR
38.
CIOBX2_STRAPPING_OPTION
39
CIOBX1_CLK_BUFF
40
CIOBX2_CLK_BUFF
41
BCM5701 Signal Pins BCM5701 Power Pins
42 43
BCM5701 Power Gen.
44
CIOBX2_PCIXP2_SLOT1 CIOBX2_PCIXS2_SLOT2&3
45
THIN_IMB_TERMINATION
46
B
3 3
PCI[X]
100MHz/64b
INDEX
PAGE # DESCRIPTION
01. BLOCK DIAGRAM ( This Page )
02.
2 2
1 1
RESET & CLOCKING SCHEME DIAGRAM FOSTER_103. FOSTER_1_PWR04. FOSTER_205. FOSTER_2_PWR06. CPU_GTLREF_SMBUS_ADDR
07. VID_CONTROL
08. ITP CONNECTOR
09.
10.
CPU_LEVEL_SHIFT/TERM CMIC_FOSTER_IF
11. CMIC_CIOB_IF
12. CMIC_MEM_IF
13. CMIC_PWR
14.
15.
CMIC STRAPPINGs
16.
DIMM CONNECTOR 1, 2
17.
DIMM CONNECTOR 3, 4
18.
DIMM CONNECTOR 5, 6
19.
DIMM CONNECTOR 7, 8
20.
MEMORY TERMINATIONS - 1
21.
MEMORY TERMINATIONS - 2
22.
CLK_SYNTHESIZER
23.
PCICLK BUFFER
A
PCI BUS 4 (S2)
PCI[X]
100MHz/64b
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 VRM-2 69
C
PCI BUS 1 (P1)
PCI[X]
133MHz/64b
SWITCHING CAPs HARDWARE MONITOR SWSB5 PCI & IDE I/F SWSB5_IMB_GPORTS PCI SLOT 1 & 2 ATI RAGE XL #1 ATI RAGE XL #2 VGA CONNECTOR i82559 ETHERNET i82559 Ethernet Conn. SIO417/PPORT/FLPY/SPORT IF SIO/LPC/GPORTS BIOS ROM & PORT 80h I/F USB_PORTS & FREE GATES Thin IMD Termination FRONT PANEL IPMI POWER ON LOGIC RESET LOGIC POWER CONNECTORS VRM-1
CIOBX1CIOBX2
VDD_IMB VOLT-REG_I2C
D
PCI BUS 2 (S1)
70 71 72 73 74 75
SCSI 7899
PCI[X]
100MHz/64b
VCC25 & VTT GENERATION LOGIC47 SSTL_VREF MOUNTING HOLES I2C ADDRESS & PCIIRQ MAP REVISION HISTORY CLOCKING SCHEME DIAGRAMCIOBX1_PCIXP1_SLOT
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
BLOCK DIAGRAM & INDEX
Last Revision Date:
Thursday, August 16, 2001
Sheet
E
Rev
0A
of
175
Page 2
5
4
3
2
1
PCB
D D
BAT_X
{Value}
{Value}
U34_X
{Value}
C C
B B
A A
Title
{Title}
Size Document Number Rev
{Doc} {RevCode}
C
5
4
3
2
Date: Sheet
11Monday, August 20, 2001
1
of
Page 3
1
CMIC_LE
PCIRST#
TTL 7407
PCIRST1#
PCIRST2#
CIOBX2
#1
(P1,S1)
CIOBX2
#2
(P2,S2)
VGA
ATI Rage XL
LAN
Intel 82550
SIO
NS87417
P1_PCIRST#
S1_PCIRST#
P2_PCIRST#
S2_PCIRST#
PCI-X Slot
SCSI 7899W
PCI-X Slot
Gb BCM5701H
PCI-X Slot
PCI 33 Slots
CSB5
PCIRST3#
A A
DIMM_RST#
RESET SCHEME
PS_PWRGD#
WTX
POWER SUPPLY CONN.
RESET SWITCH
ITP_RESET#
PS_PWRGD
AND
PS_PWRGD#
INVERTER
RESET GEN
140mS PERIOD RESET Vth = 4.5V
POWERGOOD
CPU_VRM_PWRGD
PLLRST
PCIRST#
CMIC CIOB'S
SRESET#
AND
PLLRST
PCIRST#
PLLRST
PCIRST#
RSB5
7414
D I M M
IDE
......
1 to 8
D I M M
PCIRST#
P1/P2_PCIRST#
S1/S2_PCIRST#
PROC_RESET#
RESETDLY#
CPU_PWRGD
HW Monitor
RESET FOR RSB PCI BUS
RESETS FOR PCI BUSES
CPU RESET
Config RESET - 4 BCLK delay w.r.t. PROC_RESET#
POWER
t0
PSU PWR GOOD
PLL RST
POWERGOOD
VRM POWERGOOD
PROCESSOR POWERGOOD
PROCESSOR RESET
PCI RESET
CONFIG RESET
1
t0+100mS
t0+100mS
t0+50mS
t0+120mS
t0+120mS
t0+120mS+1mS
t0+120mS+1mS
t0+120mS+1mS+4 clocks
Micro Star Restricted Secret
Title
Document Number
RESET DIAGRAM
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Last Revision Date:
Thursday, August 16, 2001
Sheet
275
Rev
0A
of
Page 4
A
TP16
1
VCC_P
1K
P1_ODTEN
DON'T STUFF
VCC3
DON'T STUFF
RES_NOPOP
P1_SM_WP
.01uF
C1405
P1_VCCA10
P1_VCCIOPLL10
P1_VSSA10
PD#[0..63]5,11
R1237
R1239
HCLK1_N22
PD#[0..63]
AP#05,11 AP#15,11
HCLK122
BREQ#05,11 BREQ#15 BREQ#25 BREQ#35
A
P1VCC_SENSE
P1GND_SENSE
P1_ODTEN
U125A
A3B5D26
AA5
B27
PD#0
Y26
PD#1
AA27
PD#2
Y24
PD#3
AA25
PD#4
AD27
PD#5
Y23
PD#6
AA24
PD#7
AB26
PD#8
AB25
PD#9
AB23
PD#10
AA22
PD#11
AA21
PD#12
AB20
PD#13
AB22
PD#14
AB19
PD#15
AA19
PD#16
AE26
PD#17
AC26
PD#18
AD25
PD#19
AE25
PD#20
AC24
PD#21
AD24
PD#22
AE23
PD#23
AC23
PD#24
AA18
PD#25
AC20
PD#26
AC21
PD#27
AE22
PD#28
AE20
PD#29
AD21
PD#30
AD19
PD#31
AB17
PD#32
AB16
PD#33
AA16
PD#34
AC17
PD#35
AE13
PD#36
AD18
PD#37
AB15
PD#38
AD13
PD#39
AD14
PD#40
AD11
PD#41
AC12
PD#42
AE10
PD#43
AC11
PD#44
AE9
PD#45
AD10
PD#46
AD8
PD#47
AC9
PD#48
AA13
PD#49
AA14
PD#50
AC14
PD#51
AB12
PD#52
AB13
PD#53
AA11
PD#54
AA10
PD#55
AB10
PD#56
AC8
PD#57
AD7
PD#58
AE7
PD#59
AC6
PD#60
AC5
PD#61
AA8
PD#62
Y9
PD#63
AB6
AP#0
E10
AP#1
D9
HCLK1
Y4
HCLK1_N
W5
FOSTER
PA#[3..35]
BNR#5,10,11
BPRI#5,11
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
AP0# AP1#
BCLK0 BCLK1
ODTEN
SKTOCC#
VSSSENSE
A3#
A22
PA#3
VSSA
A4#
A20
B18
PA#4
PA#5
AD4
VCCSENSE
A5#
C18
PA#6
TP15
1
4 4
R1236
3 3
RES_NOPOP
VCC3
2 2
1 1
AB4
VCCA
VCCIOPLL
A6#
A7#
A8#
A19
C17
PA#7
PA#8
VCC3
P1_SM_TS_ADDR1
P1_SM_WP
AD29
AE29
AE28
Y29
SM_VCC
SMB_WP
SM_VCC1
A9#
A10#
A11#
D17
A13
B16
B14
PA#9
PA#10
PA#11
PA#12
B
P1_SM_ADDR0
P1_SM_ADDR1
P1_SM_ADDR2
P1_SM_TS_ADDR0
AA28
AB28
AB29
AA29
AC29
SM_DAT
SM_TS_A1
SM_TS_A0
SM_EP_A2
SM_EP_A1
SM_EP_A0
A12#
A13#
A14#
A15#
A16#
A17#
B13
A12
C15
C14
D16
PA#13
PA#14
PA#15
PA#16
PA#17
B
P1_SM_TS_ADDR[0..1] 7 P1_SM_ADDR[0..2] 7 CPU_SDA 5,69 CPU_SCL 5,69 CPU_SMBALERT# 5
45.3_1%
R1232
R1231 45.3_1%
R1233 180
P1_COMP0
P1_COMP1
AC28
AD28
E16
AD16
W6W7W8Y6AA7
COMP1
COMP0
SM_CLK
TESTHI0
TESTHI1
TESTHI2
SM_ALERT
TESTHI3
FOSTER
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
B10
PA#21
B11
PA#22
C12
PA#23
E14
PA#24
D13A9B8
PA#25
PA#26
PA#27
A28#
E13
PA#28
D15
PA#18
F15
PA#19
A10
PA#20
VCC_P
R1234 180
AD5
AE5
TESTHI4
TESTHI5
TESTHI6
A29#
A30#
A31#
A32#
A33#
A34#
D12
C11B7A6A7C9C8D20
PA#32
PA#33
PA#34
PA#29
PA#30
PA#31
DP#3
AE17
DP3#
A35#
PA#35
DP#1
DP#2
AC15
AE19
DP2#
BR0#
F12
BREQ#0
BREQ#1
DP#0
AC18
DP1#
BR1#
E11
BREQ#2
DP0#
BR2#
D10
BREQ#3
C
E19
F24
E25
C24
E24
TDI
TCK
TDO
TRDY#
THERMTRIP#
BR3#
BNR#
BPRI#
BINIT#
DBSY#
F20
D23
F11
F18
E18
BINIT#
DBSY#
DRDY#
R1240 39.2_1% R1241 39.2_1% R1242 39.2_1%
R1243 39.2_1%
PLACE AT PROC 1
C
A25
TMS
TRST#
GTLREF3 GTLREF2 GTLREF1 GTLREF0
DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
STPCLK#
PWRGD
PR0CH0T#
IGNNE#
RESET#
MCERR#
DEFER#
ADSTB0# ADSTB1#
DRDY#
DBI3# DBI2# DBI1# DBI0#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
SLP#
INIT# LINIT1 LINIT0
FERR#
A20M#
REQ0# REQ1# REQ2# REQ3# REQ4#
LOCK#
RSP# RS2# RS1# RS0#
IERR#
HITM#
ADS#
D
DP#[0..3] 5,11
P1_TDO 5,9 P1_TDI 9 P1_TCK 9 P_TRDY# 5,11 ITP_TRST# 5,9 TMS 5,9
DINV#3
AB9
DINV#2
AE12
DINV#1
AD22
DINV#0
AC27
P_VID0
F3
VID0
P_VID1
E3
VID1
P_VID2
D3
VID2
P_VID3
C3
VID3
P_VID4
B3
VID4
F9 F23 W9 W23
DSTBP#3
Y11
DSTBP#2
Y14
DSTBP#1
Y17
DSTBP#0
Y20
DSTBN#3
Y12
DSTBN#2
Y15
DSTBN#1
Y18
DSTBN#0
Y21
BPM#2
F6
BPM#3
F8
BPM#2
E7
BPM#3
F5
BPM#4
E8
BPM#5
E4
AE6 D4 C27
SMI#
F26 AB7 B25 D6 G23 B24 E27 C26 F27
Y8
HREQ#0
B19
HREQ#1
B21
HREQ#2
C21
HREQ#3
C20
HREQ#4
B22
A17 D7
C6 F21 D22 E21
P1_IERR#
E5
DEFER#
C23
HITM#
A23
HIT#
E22
HIT#
D19 F17 F14
VCC_P
ADS# ADSTB#0 ADSTB#1
Check Which CPU is close to ITP
DINV#[0..3] 5,11
P_VID[0..4] 5,8
P1_GTLREF1 7 P1_GTLREF0 7
DSTBP#[0..3] 5,11
DSTBN#[0..3] 5,11
BPM#[2..5] 5,9,10
SLP# 5,10 CPU_STPCLK# 5,10 SMI# 5,10 P1_THERMTRIP# 8 CPU1_PWRGD 64 P1_PROCHOT# 8 INIT# 5,10 LINT1 5,8,10 LINT0 5,8,10 FERR# 5,8,10 IGNNE# 5,8,10 A20M# 5,8,10
PROC_RESET# 5,9,10,12
HREQ#[0..4] 5,11
LOCK# 5,10,11 MCERR# 5,10
RSP# 5,11 RS#2 5,11 RS#1 5,11 RS#0 5,11
P1_IERR# 8 DEFER# 5,11 HITM# 5,10,11 HIT# 5,10,11 ADS# 5,11 ADSTB#0 5,11 ADSTB#1 5,11
DRDY# 5,11 DBSY# 5,11 BINIT# 5,10,11PA#[3..35]5,11
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
FOSTER_1
E
Last Revision Date:
Monday, August 20, 2001
Sheet
375
E
Rev
0A
of
Page 5
A
VCC_P
4 4
3 3
2 2
1 1
A14 A18 A24 A28
B12 B20 B26 B29
C10 C16 C22 C28
D14 D18 D24 D29
E12 E20 E26 E28
F10 F16 F22 F29
G24 G26 G28
H23 H25 H27 H29
K23 K25 K27 K29
M23 M25 M27 M29
N23 N25 N27 N29
P24 P26 P28
R23 R25
R27 W27 W25
A2 A8
B6
C2 C4
D8
E2 E6
F4
G2 G4 G6 G8
H3 H5 H7 H9
J2 J4 J6
J8 J24 J26 J28
K3
K5
K7
K9
L2
L4
L6
L8 L24 L26 L28
M3
M5
M7
M9
N3
N5
N7
N9
P2
P4
P6
P8
R3
R5
R7
R9
U125B
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
FOSTER
A
333435363738394041
EMI_GND1
EMI_GND2
EMI_GND3
EMI_GND4
EMI_GND5
EMI_GND6
EMI_GND7
FOSTER_PWR
EMI_GND10
EMI_GND11
EMI_GND12
EMI_GND13
EMI_GND14
EMI_GND15
42434445464748
VSS VSS VSS VSS
EMI_GND8
EMI_GND9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
EMI_GND16
A5 A11 A21 A27 A29 B2 B9 B15 B17 B23 B28 C7 C13 C19 C25 C29 D2 D5 D11 D21 D27 D28 E9 E15 E17 E23 E29 F2 F7 F13 F19 F25 F28 G3 G5 G7 G9 G25 G27 G29 H2 H4 H6 H8 H24 H26 H28 J3 J5 W29 Y2 Y10 Y16 Y22 AA4 AA6 AA12 AA20 AA26 AB2 AB8 AB14 AB18 AB24 AC3 AC4 AC10 AC16 AC22 AD2 AD6 AD12 AD20 AD26 AE3 AE8 AE14 AE18 AE24 R29 T2 T4 T6 T8 T24 T26 T28 U3 U5 U7 U9 U23 U25 U27 U29 V2 V4 V6 V8 V24 V26 V28
VCC_P
B
U125C
2122232425262728293031
J7
VSS
J9
VSS
J23
VSS
J25
VSS
J27
VSS
J29
MTG_GND21
MTG_GND22
MTG_GND23
MTG_GND24
MTG_GND25
VSS
K2
VSS
K4
VSS
K6
VSS
K8
VSS
K24
VSS
K26
VSS
K28
VSS
L3
VSS
L5
VSS
L7
VSS
L9
VSS
L23
VSS
L25
VSS
L27
VSS
L29
VSS
M2
VSS
M4
VSS
M6
VSS
M8
VSS
M24
VSS
M26
VSS
M28
VSS
N2
VSS
N4
VSS
N6
VSS
N8
VSS
N24
VSS
N26
VSS
N28
VSS
P3
VSS
P5
VSS
P7
VSS
P9
VSS
P23
VSS
P25
VSS
P27
VSS
P29
VSS
R2
VSS
R4
VSS
R6
VSS
R8
VSS
R24
VSS
R26
VSS
R28
VSS
T3
VSS
T5
VSS
T7
VSS
T9
VSS
T23
VSS
T25
VSS
T27
VSS
T29
VSS
U2
VSS
U4
VSS
U6
VSS
U8
VSS
U24
VSS
U26
VSS
U28
VSS
V3
VSS
V5
VSS
V7
VSS
V9
VSS
V23
VSS
V25
VSS
V27
VSS
V29
VSS
W2
VSS
W4
VSS
W24
VSS
W26
VSS
W28
VSS
Y5
VSS
Y7
VSS
Y13
VSS
Y19
VSS
Y25
VSS
AA2
VSS
AA9
VSS
AA15
VSS
AA17
VSS
AA23
VSS
AB5
VSS
AB11
VSS
AB21
VSS
AB27
VSS
AC2
VSS
AC7
VSS
AC13
VSS
AC19
VSS
AC25 AD3
VSS VSS
FOSTER
B
MTG_GND26
MTG_GND1
MTG_GND2
MTG_GND3
MTG_GND4
MTG_GND5
MTG_GND6
MTG_GND7
12345678910111213141516171819
MTG_GND27
MTG_GND28
MTG_GND29
MTG_GND30
MTG_GND8
MTG_GND9
MTG_GND10
MTG_GND11
32
MTG_GND31
MTG_GND32
FOSTER_PWR
MTG_GND12
MTG_GND13
MTG_GND14
MTG_GND15
A1
A4
GAL_VDD1 GAL_VDD2 GAL_VDD3
RSVD1
RSVD2
GAL_VDD4 GAL_VDD5 GAL_VDD6 GAL_VDD7 GAL_VDD8
GAL_VDD9 GAL_VDD10 GAL_VDD11 GAL_VDD12 GAL_VDD13 GAL_VDD14 GAL_VDD15 GAL_VDD16 GAL_VDD17 GAL_VDD18 GAL_VDD19 GAL_VDD20 GAL_VDD21 GAL_VDD22 GAL_VDD23 GAL_VDD24 GAL_VDD25 GAL_VDD26 GAL_VDD27 GAL_VDD28 GAL_VDD29 GAL_VDD30 GAL_VDD31 GAL_VDD32 GAL_VDD33 GAL_VDD34 GAL_VDD35
GAL_VSS1
GAL_VSS2
GAL_VSS3
GAL_VSS4
GAL_VSS5
GAL_VSS6
GAL_VSS7
GAL_VSS8
GAL_VSS9 GAL_VSS10 GAL_VSS11 GAL_VSS12 GAL_VSS13 GAL_VSS14 GAL_VSS15 GAL_VSS16 GAL_VSS17 GAL_VSS18 GAL_VSS19 GAL_VSS20 GAL_VSS21 GAL_VSS22 GAL_VSS23 GAL_VSS24 GAL_VSS25 GAL_VSS26 GAL_VSS27 GAL_VSS28 GAL_VSS29 GAL_VSS30 GAL_VSS31 GAL_VSS32 GAL_VSS33 GAL_VSS34
MTG_GND16
MTG_GND17
MTG_GND18
RSVD13 RSVD17 RSVD63 RSVD67 RSVD68 RSVD69 RSVD73 RSVD77 RSVD80 RSVD83 RSVD86 RSVD87 RSVD88
RSVD3 RSVD4 RSVD5 RSVD8
VSS VSS VSS VSS VSS VSS VSS VSS
MTG_GND19
MTG_GND20
20
C
VCC_P
A30 B4 B31 C30 D1 D31 E30 F1 F31 G30 H1 H31 J30 K1 K31 L30 M1 M31 N1 N31 P30 R1 R31 T30 U1 U31 V30 W1 W31 Y30 AA1 AA31 AB30 AC31 AD30
A31 B30 C1 C31 D30 E1 E31 F30 G1 G31 H30 J1 J31 K30 L1 L31 M30 N30 P1 P31 R30 T1 T31 U30 V1 V31 W30 Y1 Y31 AA30 AB1 AB31 AC30 AD31
A15 A16 A26 B1 C5 D25 W3 Y3 Y27 Y28 AA3 AB3 AC1 AD1 AE4 AE15 AE16 AE27 AE21 AE11 AE2 AD23 AD17 AD15 AD9
C
R1230
RES_NOPOP
DON'T
STUFF
12
+
C1227
560uF/4V
12
+
C1228
560uF/4V
D
C1273
0.1uF
CPU1 CORE DECOUPLING
12
12
C1229
C1230
+
+
560uF/4V
560uF/4V
CPU1 CORE DECOUPLING
22uF/10V
22uF/10V
C1237
C1238
22uF/10V
22uF/10V
C1244
C1245
22uF/10V
22uF/10V
C1251
C1252
22uF/10V
22uF/10V
C1258
C1259
PLACE AROUND P1 SOCKET
C1265
C1266
1.0uF/16V
1.0uF/16V
D
C1274
0.1uF
12
+
C1231
560uF/4V
22uF/10V
C1239
22uF/10V
C1246
22uF/10V
C1253
22uF/10V
C1260
C1267
1.0uF/16V
VCC_P
C1275
C1276
0.1uF
12
C1232
+
560uF/4V
VCC_P
22uF/10V
C1240
VCC_P
22uF/10V
C1247
VCC_P
22uF/10V
C1254
VCC_P
22uF/10V
C1261
C1268
1.0uF/16V
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
C1743
0.1uF
0.1uF
VCC_P
12
C1233
+
560uF/4V
22uF/10V
C1241
22uF/10V
C1248
22uF/10V
C1255
22uF/10V
C1262
VCC_P
C1269
1.0uF/16V
Micro Star Restricted Secret
FOSTER_1_PWR
12
+
560uF/4V
C1270
1.0uF/16V
C1234
22uF/10V
C1242
22uF/10V
C1249
22uF/10V
C1256
22uF/10V
C1263
Last Revision Date:
Sheet
E
C1744
C1745
0.1uF
0.1uF
12
C1235
+
560uF/4V
22uF/10V
C1243
22uF/10V
C1250
22uF/10V
C1257
22uF/10V
C1264
C1271
1.0uF/16V
Monday, August 20, 2001
of
475
E
12
+
C1746
0.1uF
C1236
560uF/4V
C1272
1.0uF/16V
Rev
0A
Page 6
A
TP18
1
VCC_P
DON'T STUFF
P2_ODTEN
R1227 RES_NOPOPR1228 1K
R1229
RES_NOPOP
P2_SM_WP
.01uF
C1404
P2_VCCA10
P2_VCCIOPLL10
P2_VSSA10
PD#[0..63]3,11
HCLK2_N22
A
PD#[0..63]
AP#03,11 AP#13,11
HCLK222
P2VCC_SENSE
P2GND_SENSE
P2_ODTEN
U126A
PD#0 PD#1 PD#2 PD#3 PD#4 PD#5 PD#6 PD#7 PD#8 PD#9 PD#10 PD#11 PD#12 PD#13 PD#14 PD#15 PD#16 PD#17 PD#18 PD#19 PD#20 PD#21 PD#22 PD#23 PD#24 PD#25 PD#26 PD#27 PD#28 PD#29 PD#30 PD#31 PD#32 PD#33 PD#34 PD#35 PD#36 PD#37 PD#38 PD#39 PD#40 PD#41 PD#42 PD#43 PD#44 PD#45 PD#46 PD#47 PD#48 PD#49 PD#50 PD#51 PD#52 PD#53 PD#54 PD#55 PD#56 PD#57 PD#58 PD#59 PD#60 PD#61 PD#62 PD#63
AP#0 AP#1
HCLK2 HCLK2_N
PA#[3..35]3,11
BREQ#13 BREQ#03,11 BREQ#23 BREQ#33
BNR#3,10,11
BPRI#3,11
AD27
AC26 AD25
AC24 AD24
AC23
AC20 AC21
AD21 AD19
AC17
AD18
AD13 AD14 AD11 AC12
AC11
AD10
AC14
AA27
AA25
AA24 AB26 AB25 AB23 AA22 AA21 AB20 AB22 AB19 AA19 AE26
AE25
AE23
AA18
AE22 AE20
AB17 AB16 AA16
AE13
AB15
AE10
AA13 AA14
AB12 AB13 AA11 AA10 AB10
Y26
Y24
Y23
AE9
AD8 AC9
AC8 AD7 AE7 AC6 AC5 AA8
Y9
AB6
E10
D9
Y4
W5
FOSTER
PA#[3..35]
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
AP0# AP1#
BCLK0 BCLK1
A3B5D26
ODTEN
SKTOCC#
AA5
VSSA
VSSSENSE
A3#
A4#
A22
A20
PA#4
PA#3
B27
B18
PA#5
TP17
1
4 4
3 3
VCC3
DON'T STUFF
2 2
VCC3
1 1
VCC3
AD4
AB4
VCCA
VCCIOPLL
VCCSENSE
A5#
A6#
A7#
C18
A19
C17
PA#7
PA#8
PA#6
P2_SM_WP
AD29
A8#
D17
PA#9
AE29
SMB_WP
SM_VCC1
A9#
A10#
A13
PA#10
B
P2_SM_ADDR2
P2_SM_ADDR1
P2_SM_TS_ADDR0
P2_SM_TS_ADDR1
AE28
Y29
AA28
AB28
AB29
SM_VCC
SM_TS_A1
SM_TS_A0
SM_EP_A2
SM_EP_A1
A11#
A12#
A13#
A14#
A15#
B16
B14
B13
A12
C15
PA#12
PA#14
PA#13
PA#15
PA#11
B
P2_SM_TS_ADDR[0..1] 7 P2_SM_ADDR[0..2] 7
CPU_SDA 3,69 CPU_SCL 3,69 CPU_SMBALERT# 3
45.3_1%
45.3_1%
P2_SM_ADDR0
AA29
AC29
AC28
SM_CLK
SM_DAT
SM_EP_A0
R1223
P2_COMP1
AD28
E16
SM_ALERT
P2_COMP0
AD16
COMP1
COMP0
R1224
FOSTER
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
D16
PA#17
D15
PA#18
F15
PA#19
A10
PA#20
B10
PA#21
B11
PA#22
C12
PA#23
A24#
E14
PA#24
C14
PA#16
180
R1225
W6W7W8Y6AA7
TESTHI0
TESTHI1
TESTHI2
TESTHI3
A25#
A26#
A27#
A28#
D13A9B8
E13
PA#25
PA#26
PA#27
PA#28
VCC_P
180
R1226
AD5
AE5
TESTHI4
TESTHI5
TESTHI6
A29#
A30#
A31#
A32#
A33#
A34#
D12
C11B7A6A7C9C8D20
PA#31
PA#32
PA#33
PA#34
PA#30
PA#29
A35#
PA#35
DP#3
AE17
DP#2
AC15
DP3#
BREQ#1
DP#1
AE19
DP2#
BR0#
F12
BREQ#0
DP#0
AC18
DP1#
BR1#
E11
BREQ#2
DP0#
BR2#
D10
BREQ#3
BR3#
E25
F20
BNR#
TDO
BNR#
C24
TDI
BPRI#
D23
BPRI#
C
E19
F24
A25
E24
TCK
TMS
TRST#
TRDY#
GTLREF3 GTLREF2 GTLREF1 GTLREF0
DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
STPCLK#
THERMTRIP#
PR0CH0T#
MCERR#
ADSTB0# ADSTB1#
BINIT#
DBSY#
DRDY#
F11
F18
E18
DRDY#
BINIT#
DBSY#
C
DP#[0..3] 3,11
P2_TDO 9 P1_TDO 3,9 P2_TCK 9 P_TRDY# 3,11 ITP_TRST# 3,9 TMS 3,9
DINV#3
AB9
DBI3# DBI2# DBI1# DBI0#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
PWRGD
LINIT1 LINIT0
FERR#
IGNNE#
A20M#
RESET#
REQ0# REQ1# REQ2# REQ3# REQ4#
LOCK#
RSP#
IERR#
DEFER#
HITM#
ADS#
SLP#
SMI#
INIT#
RS2# RS1# RS0#
DINV#2
AE12
DINV#1
AD22
DINV#0
AC27
P_VID0
F3
VID0
P_VID1
E3
VID1
P_VID2
D3
VID2
P_VID3
C3
VID3
P_VID4
B3
VID4
F9 F23 W9 W23
DSTBP#3
Y11
DSTBP#2
Y14
DSTBP#1
Y17
DSTBP#0
Y20
DSTBN#3
Y12
DSTBN#2
Y15
DSTBN#1
Y18
DSTBN#0
Y21
BPM#2
F6
BPM#3
F8
BPM#2
E7
BPM#3
F5
BPM#4
E8
BPM#5
E4
AE6 D4 C27 F26 AB7 B25 D6 G23 B24 E27 C26 F27
Y8
HREQ#0
B19
HREQ#1
B21
HREQ#2
C21
HREQ#3
C20
HREQ#4
B22
A17 D7
C6 F21 D22 E21
P2_IERR#
E5
DEFER#
C23
HITM#
A23
HIT#
E22
HIT#
ADS#
D19
ADSTB#0
F17
ADSTB#1
F14
Place these close to CPU2
R1296 40.2_1% R1297 40.2_1%
Check Which CPU is close to ITP
DINV#[0..3] 3,11
P_VID[0..4] 3,8
P2_GTLREF1 7 P2_GTLREF0 7
DSTBP#[0..3] 3,11
DSTBN#[0..3] 3,11
BPM#[2..5] 3,9,10
SLP# 3,10 CPU_STPCLK# 3,10 SMI# 3,10 P2_THERMTRIP# 8 CPU2_PWRGD 64 P2_PROCHOT# 8 INIT# 3,10 LINT1 3,8,10 LINT0 3,8,10 FERR# 3,8,10 IGNNE# 3,8,10 A20M# 3,8,10
PROC_RESET# 3,9,10,12
HREQ#[0..4] 3,11
LOCK# 3,10,11 MCERR# 3,10
RSP# 3,11 RS#2 3,11 RS#1 3,11 RS#0 3,11
P2_IERR# 8 DEFER# 3,11 HITM# 3,10,11 HIT# 3,10,11 ADS# 3,11 ADSTB#0 3,11 ADSTB#1 3,11
VCC_P
DRDY# 3,11 DBSY# 3,11 BINIT# 3,10,11
D
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
FOSTER_2
E
Last Revision Date:
Monday, August 20, 2001
Sheet
575
E
Rev
0A
of
Page 7
A
VCC_P
U126B
333435363738394041
A2
VCC
A8
VCC
A14
VCC
A18
VCC
A24
EMI_GND1
EMI_GND2
EMI_GND3
EMI_GND4
VCC
A28
VCC
B6
VCC
B12
VCC
B20
4 4
3 3
2 2
1 1
B26 B29
C2
C4 C10 C16 C22 C28
D8 D14 D18 D24 D29
E2
E6 E12 E20 E26 E28
F4 F10 F16 F22 F29
G2 G4 G6
G8 G24 G26 G28
H3
H5
H7
H9 H23 H25 H27 H29
J2 J4 J6
J8 J24 J26 J28
K3
K5
K7
K9
K23 K25 K27 K29
L2
L4
L6
L8
L24 L26 L28
M3 M5 M7 M9
M23 M25 M27 M29
N3 N5 N7 N9
N23 N25 N27 N29
P2
P4
P6
P8
P24 P26 P28
R3 R5 R7 R9
R23 R25
R27 W27 W25
FOSTER
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
EMI_GND5
FOSTER_PWR
EMI_GND10
EMI_GND11
EMI_GND12
EMI_GND13
42434445464748
A
EMI_GND6
EMI_GND7
EMI_GND8
EMI_GND14
EMI_GND15
EMI_GND16
VSS VSS VSS VSS
EMI_GND9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
A5 A11 A21 A27 A29 B2 B9 B15 B17 B23 B28 C7 C13 C19 C25 C29 D2 D5 D11 D21 D27 D28 E9 E15 E17 E23 E29 F2 F7 F13 F19 F25 F28 G3 G5 G7 G9 G25 G27 G29 H2 H4 H6 H8 H24 H26 H28 J3 J5 W29 Y2 Y10 Y16 Y22 AA4 AA6 AA12 AA20 AA26 AB2 AB8 AB14 AB18 AB24 AC3 AC4 AC10 AC16 AC22 AD2 AD6 AD12 AD20 AD26 AE3 AE8 AE14 AE18 AE24 R29 T2 T4 T6 T8 T24 T26 T28 U3 U5 U7 U9 U23 U25 U27 U29 V2 V4 V6 V8 V24 V26 V28
VCC_P
B
U126C
2122232425262728293031
J7
VSS
J9
VSS
J23
VSS
J25
VSS
J27
VSS
J29
MTG_GND21
MTG_GND22
MTG_GND23
MTG_GND24
MTG_GND25
VSS
K2
VSS
K4
VSS
K6
VSS
K8
VSS
K24
VSS
K26
VSS
K28
VSS
L3
VSS
L5
VSS
L7
VSS
L9
VSS
L23
VSS
L25
VSS
L27
VSS
L29
VSS
M2
VSS
M4
VSS
M6
VSS
M8
VSS
M24
VSS
M26
VSS
M28
VSS
N2
VSS
N4
VSS
N6
VSS
N8
VSS
N24
VSS
N26
VSS
N28
VSS
P3
VSS
P5
VSS
P7
VSS
P9
VSS
P23
VSS
P25
VSS
P27
VSS
P29
VSS
R2
VSS
R4
VSS
R6
VSS
R8
VSS
R24
VSS
R26
VSS
R28
VSS
T3
VSS
T5
VSS
T7
VSS
T9
VSS
T23
VSS
T25
VSS
T27
VSS
T29
VSS
U2
VSS
U4
VSS
U6
VSS
U8
VSS
U24
VSS
U26
VSS
U28
VSS
V3
VSS
V5
VSS
V7
VSS
V9
VSS
V23
VSS
V25
VSS
V27
VSS
V29
VSS
W2
VSS
W4
VSS
W24
VSS
W26
VSS
W28
VSS
Y5
VSS
Y7
VSS
Y13
VSS
Y19
VSS
Y25
VSS
AA2
VSS
AA9
VSS
AA15
VSS
AA17
VSS
AA23
VSS
AB5
VSS
AB11
VSS
AB21
VSS
AB27
VSS
AC2
VSS
AC7
VSS
AC13
VSS
AC19
VSS
AC25 AD3
VSS VSS
FOSTER
B
MTG_GND26
MTG_GND1
MTG_GND2
MTG_GND3
MTG_GND4
MTG_GND5
MTG_GND6
MTG_GND7
12345678910111213141516171819
MTG_GND27
MTG_GND28
MTG_GND29
MTG_GND30
MTG_GND8
MTG_GND9
MTG_GND10
MTG_GND11
32
MTG_GND31
MTG_GND32
FOSTER_PWR
MTG_GND12
MTG_GND13
MTG_GND14
MTG_GND15
A1
A4
GAL_VDD1 GAL_VDD2 GAL_VDD3
RSVD1
RSVD2
GAL_VDD4 GAL_VDD5 GAL_VDD6 GAL_VDD7 GAL_VDD8
GAL_VDD9 GAL_VDD10 GAL_VDD11 GAL_VDD12 GAL_VDD13 GAL_VDD14 GAL_VDD15 GAL_VDD16 GAL_VDD17 GAL_VDD18 GAL_VDD19 GAL_VDD20 GAL_VDD21 GAL_VDD22 GAL_VDD23 GAL_VDD24 GAL_VDD25 GAL_VDD26 GAL_VDD27 GAL_VDD28 GAL_VDD29 GAL_VDD30 GAL_VDD31 GAL_VDD32 GAL_VDD33 GAL_VDD34 GAL_VDD35
GAL_VSS1
GAL_VSS2
GAL_VSS3
GAL_VSS4
GAL_VSS5
GAL_VSS6
GAL_VSS7
GAL_VSS8
GAL_VSS9 GAL_VSS10 GAL_VSS11 GAL_VSS12 GAL_VSS13 GAL_VSS14 GAL_VSS15 GAL_VSS16 GAL_VSS17 GAL_VSS18 GAL_VSS19 GAL_VSS20 GAL_VSS21 GAL_VSS22 GAL_VSS23 GAL_VSS24 GAL_VSS25 GAL_VSS26 GAL_VSS27 GAL_VSS28 GAL_VSS29 GAL_VSS30 GAL_VSS31 GAL_VSS32 GAL_VSS33 GAL_VSS34
MTG_GND16
MTG_GND17
MTG_GND18
RSVD3 RSVD4 RSVD5
RSVD8 RSVD13 RSVD17 RSVD63 RSVD67 RSVD68 RSVD69 RSVD73 RSVD77 RSVD80 RSVD83 RSVD86 RSVD87 RSVD88
VSS VSS VSS VSS VSS VSS VSS VSS
MTG_GND19
MTG_GND20
20
A30 B4 B31 C30 D1 D31 E30 F1 F31 G30 H1 H31 J30 K1 K31 L30 M1 M31 N1 N31 P30 R1 R31 T30 U1 U31 V30 W1 W31 Y30 AA1 AA31 AB30 AC31 AD30
A31 B30 C1 C31 D30 E1 E31 F30 G1 G31 H30 J1 J31 K30 L1 L31 M30 N30 P1 P31 R30 T1 T31 U30 V1 V31 W30 Y1 Y31 AA30 AB1 AB31 AC30 AD31
A15 A16 A26 B1 C5 D25 W3 Y3 Y27 Y28 AA3 AB3 AC1 AD1 AE4 AE15 AE16 AE27 AE21 AE11 AE2 AD23 AD17 AD15 AD9
C
VCC_P
12
12
C1173
C1174
+
+
560uF/4V
560uF/4V
CPU2 CORE DECOUPLING
22uF/10V
C1183
22uF/10V
C1190
22uF/10V
C1197
22uF/10V
C1204
PLACE AROUND P2 SOCKET
C1211
1.0uF/16V
DON'T STUFF
R1222 RES_NOPOP
C
C1219
0.1uF
12
+
C1175
560uF/4V
D
C1220
0.1uF
CPU2 CORE DECOUPLING
12
+
22uF/10V
C1184
22uF/10V
C1191
22uF/10V
C1198
22uF/10V
C1205
C1212
1.0uF/16V
D
C1176
560uF/4V
C1221
0.1uF
22uF/10V
C1185
22uF/10V
C1192
22uF/10V
C1199
22uF/10V
C1206
C1213
1.0uF/16V
12
+
C1177
560uF/4V
VCC_P
VCC_P
VCC_P
VCC_P
C1222
0.1uF
VCC_P
22uF/10V
C1186
22uF/10V
C1193
22uF/10V
C1200
22uF/10V
C1207
C1214
1.0uF/16V
C1739
C1740
0.1uF
0.1uF
VCC_P
12
12
C1178
C1179
+
+
560uF/4V
560uF/4V
22uF/10V
22uF/10V
C1187
C1188
22uF/10V
22uF/10V
C1194
C1195
22uF/10V
22uF/10V
C1201
C1202
22uF/10V
22uF/10V
C1208
C1209
VCC_P
C1215
C1216
1.0uF/16V
1.0uF/16V
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
C1741
0.1uF
12
C1180
+
560uF/4V
22uF/10V
C1189
22uF/10V
C1196
22uF/10V
C1203
22uF/10V
C1210
C1217
1.0uF/16V
FOSTER_2_PWR
Last Revision Date:
Sheet
E
C1742
0.1uF
12
12
C1181
+
+
560uF/4V
560uF/4V
C1218
1.0uF/16V
Monday, August 20, 2001
of
675
E
C1182
Rev
0A
Page 8
A
Z = R/W bit
CPU_0 Thermal Sensor SM Bus
4 4
Addr._0 : 0011X00Z : 1001X00Z : 0101X00Z
OR OR
VCC3
R1197
RES_NOPOP
RES_NOPOP
P1_SM_TS_ADDR0 P1_SM_ADDR1 P1_SM_TS_ADDR1
DON'T STUFF
R1198
B
P1_SM_TS_ADDR[0..1] 3 P1_SM_ADDR[0..2] 3
C
VCC3
R1195
R1194
RES_NOPOP
RES_NOPOP
R1196
RES_NOPOP
P1_SM_ADDR0
P1_SM_ADDR2
D
DON'T STUFF
E
Z = R/W bit
R1199 1K
R1200 1K
VCC3
DON'T STUFF
R1204
RES_NOPOP
R1205 1K
3 3
P2_SM_TS_ADDR0 P2_SM_TS_ADDR1
P2_SM_TS_ADDR[0..1] 5
DON'T STUFF
R1206
RES_NOPOP
R1201 1K
R1203 1K
VCC3
R1207
RES_NOPOP
R1202 1K
R1208 1K
CPU_1 Thermal Sensor SM Bus
Addr._1 : 0011X01Z : 1001X01Z : 0101X01Z
2 2
1 1
A
C1157 220pF
C1163 220pF
OR OR
C1158 220pF
C1164 220pF
VCC_P
R1214 49.9_1%
R1216 100
VCC_P
R1218 49.9_1%
R1220 100
RES_NOPOP
R1209 1K
P1_GTLREF0
C1159 1.0uF/10V
P2_GTLREF0
C1165 1.0uF/10V
R1210
DON'T STUFF
P1_GTLREF0 3
P2_GTLREF0 5
PLACE EACH 220pf OF GTLREF NEAR PROC PIN
B
C1160 220pF
C1166 220pF
C1161 220pF
C1167 220pF
C
VCC_P
R1215 49.9_1%
VCC_P
R1219 49.9_1%
R1221 100 R1217 100
P1_GTLREF1
P2_GTLREF1
C1168 1.0uF/10V C1162 1.0uF/10V
R1211 1K
R1213 1K
P1_GTLREF1 3
P2_GTLREF1 5
RES_NOPOP
Addr._0 : 1010 000Z
P2_SM_ADDR0 P2_SM_ADDR1 P2_SM_ADDR2
DON'T STUFF
R1212
D
P2_SM_ADDR[0..2] 5
Addr._1 : 1010 001Z
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
CPU_GTLREF_SMBUS_ADDR
Last Revision Date:
Monday, August 20, 2001
Sheet
775
E
Rev
0A
of
Page 9
A
B
C
D
E
VCC
VCC
INTR
NMI
RESETDLY#
RSB_A20M#
VCC_P
.01uF
C1399
R1186 49.9_1%
P6_CGF2
P6_CGF3
P6_CGF4
R1187 49.9_1%
P6_CGF1
11 10 14 13
15
R1176
330
2 3 5 6
1
1 2 3 4 5
U140
1Y
1A 1B
2Y
2A 2B
3Y
3A 3B
4Y
4A 4B
A/B G
74F157
RESETDLY# 11 NMI 49
RSB_A20M# 50
4
7
9
12
L1 L2 L3 L4 R4
SW4
R1 R2 R3
DIP_SW_4
RP441
8
1 8
7
2 7
6
3 6 4 5
RP330
LINT0_3V IGNNE#_3V A20M#_3V LINT1_3V
P_VID[0..4]3,5
U139
11
GND
GND
8
VDD
GND
4 1
GTLREF DIRB-A
9
B4
10
B3
12
B2
13
B1
.01uF
C1401
A4 A3 A2 A1
GTL2005
VCC3
7 14
6 5 3 2
VCC_P
49.9_1% R1307
GTLREF_1
0.1uF
C1500
R1308
100_1%
C1501
0.1uF
4 4
VCC3
RP440
1 8 2 7 3 6 4 5
RP10K
3 3
2 2
INTR50
RSB_IGNNE#50
P1_THERMTRIP#3 P2_THERMTRIP#5
0_OHM
R1177
RSB_IGNNE#
TO OVERRIDE VIDS, REMOVE CPU JUMPERS, AND INSTALL THE APPROPRIATE FORCE JUMPERS.
P_VID0 VRM_VID0 P_VID1 P_VID2
P_VID3
P_VID4
J37
1
1
3
3
5
5
7
7
9
9
CON10A
RP442 RP0
1 8 2 7 3 6 4 5
R1173 0_OHM
2
2
4
4
6
6
8
8
10
10
PLACE THESE COMPONENTS SO THEY ARE ACCESSIBLE
R1174 1K
LINT0
LINT0 3,5,10
IGNNE#
IGNNE# 3,5,10
A20M#
A20M# 3,5,10
LINT1
LINT1 3,5,10
VCC_P
R1184 49.9_1%
330
R1178 49.9_1%
R1179 49.9_1%
R1185 49.9_1%
VCC3
R1188
P1_PROCHOT#3 P2_PROCHOT#5
P1_IERR#3 P2_IERR#5
VCC3
U141 GTL2005
2
A1
3
A2
5
A3
6
A4
14
VDD
7
GND
.01uF
C1407
B1 B2 B3 B4
GTLREFDIRB-A
GND GND
R1172 1K
1 8
2 7
3 6
4 5
RP439 RP1K
VRM_VID1 VRM_VID2 VRM_VID3
246
VRM_VID4
J38
8
10
CON10A
VRM_VID[0..4] 48,67
246810
13579
13579
VCC3
R1182 1K
R1183 1K
R1273 1K
GTLREF_1
R1181 1K
RSB_P1_PROCHOT# 50 RSB_P2_PROCHOT# 50 RSB_P1_IERR# 50 RSB_P2_IERR# 50
.01uF
C1406
13 12 10 9
41
8 11
VCC_P VCC3
1 1
FERR#3,5,10
A
FERR#
VCC_P
R1276
49.9_1%
R1275
330
R1274
330
B
RSB_FERR# 49
C
D
3
Q16
1
2
PMBT2369
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
VID_CONTROL
Last Revision Date:
Monday, August 20, 2001
Sheet
875
E
Rev
0A
of
Page 10
A
B
C
D
E
VCC_P
TCK
RES. TO BE WITHIN 1" OF ITP CONN.
R1158 680
R1168 1K
R1167 1K
R1166 1K
VCC_P VCC_P
R115339
U138
2
1A1
TCK
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
74LVCH244A
R1169 1K
R1170 1K
R1171 330
1K5_1%
VCC_P
0.1uF
R1154
TMS 3,5 ITP_TRST# 3,5
THIS NET TO BE DAISY CHAINED ALONG PROCS.
150
Within 1" of the
R1159
last device on this Net
R_P1_TCK
18
1Y1
R_P2_TCK
16
1Y2
R_FBO
14
1Y3
12
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
20
VCC
GND
C1398
VCC_P
10
FBO = TCK (to processors) + Length of BPM# trace from ITP connector to first CPU.
RES. TO BE WITHIN 1" OF ITP CONN.
4 4
BPM#23,5,10 BPM#33,5,10 BPM#43,5,10 BPM#53,5,10 PROC_RESET#3,5,10,12
CLK_100M_ITP022 CLK_100M_ITP122
CLK_100M_ITP = BCLK (to processors) + Length of BPM# trace from ITP connector to first CPU.
3 3
RES. TO BE WITHIN 1" OF ITP CONN.
2 2
JP17
HEADER_3
Place this HDR next to the CPU nearest to ITP conn.
P1_TDI
1 2
P2_TDO
3
R1150 40.2_1%
R1156 RES_NOPOP
VCC_P
R1163 150
R1146 40.2_1%
R1147 40.2_1%
FBO
R1157 RES_NOPOP
R1164 330
R1149 40.2_1%
R1148 40.2_1%
VCC_P
RES. TO BE WITHIN 1" OF ITP CONN.
R1165
75
PLACE NEAR CPU1
J36
1 3 5 7 9
11 13 15 17 19 21 23 25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
X_CON25A
P1_TDI 3 P1_TDO 3,5 P2_TDO 5
2 4 6 8 10 12 14 16 18 20 22 24
DBA#
P1_TDI
P2_TDO
RES. TO BE WITHIN 1" OF ITP CONN.
R1155 0_OHM
Place it as close to ITP Conn. as possible
R1151 150
Length of P1_TCK = P2_TCK
R1160 22
R1161 22
R1162 22
VCC3
R1152
RES_NOPOP
DON'T STUFF
FBO
NOPOP
C1154
NOPOP
C1156
ITP_RESET# 64
C1155
NOPOP
P1_TCK 3
P2_TCK 5
1 1
GND GND SIGNAL
A
Placing components from this sheet
LAYOUT NOTE:
B
BPM#[0..5], RST#, FBO, BCKN, BCKP, TCK, AND FBI ARE CRITICAL ROUTES.
C
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
ITP CONNECTOR
Last Revision Date:
Sheet
Monday, August 20, 2001
E
Rev
0A
of
975
Look at Routing guidelines while
Page 11
A
B
C
D
E
DON'T STUFF PLACE NEAR CPU2
R1122 40.2_1%
R1123 40.2_1%
R1124 40.2_1%
R1116 RES_NOPOP
R1126 RES_NOPOP
R1131 39
R1132 39
R1133 39
R1135 150
R1136 39
R1134 39
C2059 27PF
C2060 27PF
U137B
7407
U137D
7407
C2062 27PF
SMI#
INIT#
C2058 27PF
C2061 27PF
3 4
9 8
R1127 40.2_1%
BPM#5
R1128 40.2_1%
BPM#4
R1129 40.2_1%
BPM#3
R1130 40.2_1%
BPM#2
VCC_P VCC_P
C1141
0.1uF
R1137
U137A
1 2
7407
RSB_SLP#50
C1142
0.1uF
C1143
0.1uF
CPU_STPCLK#
VCC3
1K
R1138
U137C
5 6
7407
C1144
0.1uF
SLP#
C1145
0.1uF
C1140
0.1uF
PLACE THE TERM CAPS NEAR THE TERMINATION RESISTORS
VCC3
1K
RSB_STPCLK#50LOCK# 3,5,11
(Make small Cu Islands
BINIT#
R1139 1K
R1140 1K
PLACE NEAR CPU1
R1115 40.2_1%
R1114 40.2_1%
R1117 40.2_1%
R1118 RES_NOPOP
R1119 40.2_1%
VCC_P
R1120 40.2_1%
R1121 40.2_1%
VCC_P
4 4
PROC_RESET#3,5,9,12
FERR#3,5,8 BINIT#3,5,11
SMI#3,5
IGNNE#3,5,8 INIT#3,5 CPU_STPCLK#3,5 LINT03,5,8 LINT13,5,8
SLP#3,5
BPM#[2..5]3,5,9
3 3
PLACE THESE CLOSE TO CPU2
2 2
EXT_SMI#50,58
RSB_SMI#50,58
CMIC_PINIT#11,50,57
RSB_PINIT#11,50,57
KBD_INIT#11,50,57
SMI#
INIT# CPU_STPCLK#
A20M#3,5,8
SLP#
BNR#3,5,11 HIT#3,5,11 HITM#3,5,11
MCERR#3,5
VCC3
VCC25
for P1/P2_VCCA, P1/P2_VSSA
Place these Close to CPU1 Place these Close to CPU2
VCC_P VCC_P
R1142 0_OHM
1 1
R1144 0_OHM
1 2
A
L43 4.7uH
C1146
33uF/6V
C1150 33uF/6V
L45 4.7uH
1 2
R1143 0_OHM
R1145 0_OHM
12
+
+
1 2
C1147
1.0uF/10V
C1151
1.0uF/10V
P1_VCCA 3
P1_VSSA 3
P1_VCCIOPLL 3
B
L44 4.7uH
1 2
C1148
33uF/6V
C1152
33uF/6V
1 2
L46 4.7uH
C1149
1.0uF/10V
C1153
1.0uF/10V
P2_VCCA 5
P2_VSSA 5
P2_VCCIOPLL 5
12
+
+
1 2
C
and P1/P2_VCCIOPLL nets )
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
CPU_LEVEL_SHIFT_THERM
Last Revision Date:
Monday, August 20, 2001
Sheet
10 75
E
Rev
0A
of
Page 12
A
B
C
D
E
PD#0 PD#1 PD#2 PD#3 PD#4 PD#5 PD#6 PD#7 PD#8 PD#9 PD#10 PD#11 PD#12 PD#13 PD#14 PD#15 PD#16 PD#17 PD#18 PD#19 PD#20 PD#21 PD#22 PD#23 PD#24 PD#25 PD#26 PD#27 PD#28 PD#29 PD#30 PD#31 PD#32 PD#33 PD#34 PD#35 PD#36 PD#37 PD#38 PD#39 PD#40 PD#41 PD#42 PD#43 PD#44 PD#45 PD#46 PD#47 PD#48 PD#49 PD#50 PD#51 PD#52 PD#53 PD#54 PD#55 PD#56 PD#57 PD#58 PD#59 PD#60 PD#61 PD#62 PD#63
DINV#0 DINV#1 DINV#2 DINV#3
DP#0 DP#1 DP#2 DP#3
DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3
DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3
PD#[0..63]
VCC25
ALERT#15,27,37,50
VCC25
BINIT#3,5,10
PA#[3..35]
PA#3 PA#4 PA#5 PA#6 PA#7 PA#8 PA#9 PA#10 PA#11 PA#12 PA#13 PA#14 PA#15 PA#16 PA#17 PA#18 PA#19 PA#20 PA#21 PA#22 PA#23 PA#24 PA#25 PA#26 PA#27 PA#28 PA#29 PA#30 PA#31 PA#32 PA#33 PA#34 PA#35
ADSTB#03,5 ADSTB#13,5
BPRI#3,5 DBSY#3,5 DRDY#3,5
HITM#3,5,10
LOCK#3,5,10
P_TRDY#3,5
DEFER#3,5 BREQ#03,5
PS_PWRGD#27,37,50,64
RESETDLY#8
PCIRST#27,37,65
HREQ#03,5 HREQ#13,5 HREQ#23,5 HREQ#33,5 HREQ#43,5
ADSTB#0 ADSTB#1
ADS#
ADS#3,5
BNR#
BNR#3,5,10
BPRI# DBSY# DRDY# HIT#
HIT#3,5,10
HITM# LOCK# P_TRDY# DEFER# BREQ#0
RESETDLY# PCIRST#
WRMRST#
RS#0
RS#03,5
RS#1
RS#13,5
RS#2
RS#23,5
RSP#
RSP#3,5
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
AP#0
AP#03,5
AP#1
AP#13,5
R1256 4.7K
CMIC_FATAL#
R12574.7K
MEMOFFACK#
GTL_VREF_CMIC
R13844.7K
GTL_COMP_PU GTL_COMP_PD GTL_RCOMP
AE25 AE24 AF26 AE26
AF27
AF23 AD27 AE27 AG25
AG24 AG26
K15 A17 A19 B18 A18 B19
A20 G16 C19 E19 H17 H16 D19 F18 H18 G19 F19 A23 B23 A22 A21 F20 B20 A24 A25 D20 B21 E20 B25 B27 A26 C22 D22
D18 C20
H19
G2
K17
H5 C1 D1 G3
E1
F23
B1 G1
D24
E16 G15 F15 C16 H15
E23 C24
F21
H9
K18
G21 F22 H20
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35#
ADSTB0# ADSTB1#
F1
ADS# BNR# BPRI# DBSY# DRDY# HIT# HITM# LOCK#
F4
TRDY# DEFER# BREQ0#
PLLRST DLYRST PCIRST# WRMRST#
RS0# RS1#
F2
RS2# RSP#
HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#
AP0# AP1#
ALERT# BINIT# HINIT# BCLKP BCLKN FATAL#
MEMOFF# MEMOFFACK#
GTL_VREF GTL_VREF
GTL_COMP_PU GTL_COMP_PD GTL_RCOMP
U1A
C2
D0#
E3
D1#
B3
D2#
C3
D3#
F3
D4#
D4
D5#
A2
D6#
D2
D7#
D3
D8#
A3
D9#
H6
D10#
F6
D11#
G8
D12#
F5
D13#
H8
D14#
H10
D15#
F7
D16#
G9
D17#
E7
D18#
E6
D19#
A4
D20#
B4
D21#
D7
D22#
A5
D23#
G10
D24#
K11
D25#
B7
D26#
C6
D27#
F8
D28#
C7
D29#
E9
D30#
K12
D31#
D8
D32#
C8
D33#
D9
D34#
B9
D35#
E10
D36#
A7
D37#
A10
D38#
A8
D39#
B12
D40#
A11
D41#
F12
D42#
A12
D43#
G13
D44#
F13
D45#
K13
D46#
H12
D47#
B13
D48#
D12
D49#
A13
D50#
E13
D51#
C13
D52#
C14
D53#
A15
D54#
B15
D55#
D15
D56#
E14
D57#
E15
D58#
H14
D59#
K14
D60#
C15
D61#
A16
D62#
G14
D63#
G5
DINV0#
A6
DINV1#
C10
DINV2#
H13
DINV3#
C26
DP0#
B26
DP1#
E21
DP2#
E25
DP3#
G6
DSTBN0#
F9
DSTBN1#
C9
DSTBN2#
D13
DSTBN3#
H7
DSTBP0#
H11
DSTBP1#
A9
DSTBP2#
A14
DSTBP3#
PA#[3..35]3,5
4 4
VCC25
R1255 10K
MEMOFFACK#
4.7K
R1398
CMIC_PINIT#10,50,57
HCLK_CMIC22
HCLK_CMIC_N22
CMIC_FATAL#15,50
MEMOFFACK#15
3 3
VCC25
WRMRST#15
2 2
VCC25
MEMOFF#15,49
DINV#[0..3] 3,5
DP#[0..3] 3,5
DSTBN#[0..3] 3,5
DSTBP#[0..3] 3,5
PD#[0..63] 3,5
GTL_COMP_PD GTL_COMP_PU GTL_RCOMP
VCC_P
C1107 220pF
R1032249_1%
R1033249_1%
C1108 220pF
R103420.5_1%
VCC_P
49.9_1% R1096
R1099 100_1%
GTL_VREF_CMIC
C1109
1.0uF/10V
1 1
A
B
CMIC_LE
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
C
D
http://www.msi.com.tw
CMIC_FOSTER_IF
Last Revision Date:
Sheet
Monday, August 20, 2001
E
of
11 75
Rev
0A
Page 13
A
B
C
D
E
B_IMB_D_R[0..15]37
4 4
B_IMB_CON_R37 B_IMB_CLK_R_P25 B_IMB_CLK_R_N25 B_IMB_PAR_R37
B_IMB_D_T[0..15]37
3 3
B_IMB_CON_T37 B_IMB_CLK_T_P_R25 B_IMB_CLK_T_N_R25
B_IMB_PAR_T37
B_IMB_D_R0 B_IMB_D_R1 B_IMB_D_R2 B_IMB_D_R3 B_IMB_D_R4 B_IMB_D_R5 B_IMB_D_R6 B_IMB_D_R7 B_IMB_D_R8 B_IMB_D_R9 B_IMB_D_R10 B_IMB_D_R11 B_IMB_D_R12 B_IMB_D_R13 B_IMB_D_R14 B_IMB_D_R15
B_IMB_D_T0 B_IMB_D_T1 B_IMB_D_T2 B_IMB_D_T3 B_IMB_D_T4 B_IMB_D_T5 B_IMB_D_T6 B_IMB_D_T7 B_IMB_D_T8 B_IMB_D_T9 B_IMB_D_T10 B_IMB_D_T11 B_IMB_D_T12 B_IMB_D_T13 B_IMB_D_T14 B_IMB_D_T15
R_T_IMB_D_T0 R_T_IMB_D_T1 R_T_IMB_D_T2 R_T_IMB_D_T3
R_TIMB_CLK_TR R_TIMB_CON_T R_TIMB_PAR_T
IMB_VREF_CMIC
CMIC_IMB_COMP_PD CMIC_IMB_COMP_PU CMIC_IMB_RCOMP
T_IMB_D_T0 T_IMB_D_T3 T_IMB_D_T1 T_IMB_D_T2
RP452
RP22R
1 8 2 7 3 6 4 5
RP453
1 8 2 7 3 6 4 5
RP22R
R_TIMB_PAR_T R_TIMB_CLK_TR
R_TIMB_CON_T
R_T_IMB_D_T0 R_T_IMB_D_T3 R_T_IMB_D_T1 R_T_IMB_D_T2
2 2
T_IMB_PAR_T46,50 T_IMB_CLK_TR25
T_IMB_CON_T46,50
T_IMB_PAR_T T_IMB_CLK_TR
T_IMB_CON_T
T_IMB_D_T[0..3]46,50
U1B
R25
BIMBD_R0
T23
B IMBD_R1
R26
BIMBD_R2
R27
BIMBD_R3
R22
BIMBD_R4
P23
BIMBD_R5
R24
BIMBD_R6
R23
BIMBD_R7
N25
BIMBD_R8
N22
BIMBD_R9
P21
BIMBD_R10
N23
BIMBD_R11
N24
BIMBD_R12
P20
BIMBD_R13
R18
BIMBD_R14
R17
BIMBD_R15
N20
BIMBCON_R
P25
BIMBCLK_R_P
P27
BIMBCLK_R_N
N21
BMBPAR_R
U21
BIMBD_T0
U23
BIMBD_T1
T20
BIMBD_T2
U18
BIMBD_T3
U17
BIMBD_T4
V20
BIMBD_T5
U20
BIMBD_T6
T22
BIMBD_T7
T21
BIMBD_T8
R21
BIMBD_T9
T25
BIMBD_T10
U27
BIMBD_T11
T24
BIMBD_T12
U25
BIMBD_T13
T27
BIMBD_T14
T26
BIMBD_T15
R20
BIMBCON_T
W26 L25
BIMBCLK_T_P AIMBCLK_T_P
W27
BIMBCLK_T_N
V27
BIMBDPAR_T
Y22
T_IMBD_T0
AA25
T_IMBD_T1
Y21
T_IMBD_T2
Y24
T_IMBD_T3
P18
IMB_VREF
D27
IMB_COMP_PD
H21
IMB_COMP_PU
G22
IMB_RCOMP
AIMBD_R0 AIMBD_R1 AIMBD_R2 AIMBD_R3 AIMBD_R4 AIMBD_R5 AIMBD_R6 AIMBD_R7 AIMBD_R8
AIMBD_R9 AIMBD_R10 AIMBD_R11 AIMBD_R12 AIMBD_R13 AIMBD_R14 AIMBD_R15
AIMBCON_R AIMBCLK_R_P AIMBCLK_R_N
AIMBPAR_R
AIMBD_T0 AIMBD_T1 AIMBD_T2 AIMBD_T3 AIMBD_T4 AIMBD_T5 AIMBD_T6 AIMBD_T7 AIMBD_T8
AIMBD_T9 AIMBD_T10 AIMBD_T11 AIMBD_T12 AIMBD_T13 AIMBD_T14 AIMBD_T15
AIMBCON_T
AIMBCLK_T_N
AIMBPAR_T
T_IMBD_R0 T_IMBD_R1 T_IMBD_R2 T_IMBD_R3
T_IMBCLK_RT_IMBCLK_T T_IMBCON_RT_IMBCON_T T_IMBPAR_RT_IMBPAR_T
CPURST# SRESET#
TESTMODE#
SCLK
SDA
CMIC_LE
L20 L17 L18 K20 J24 H23 H22 J22 H26 F27 G24 G27 G25 E27 F24 J20
F25 H25 H24 F26
M26 M25 N27 N18 N17 M24 N26 L27 M27 L21 M22 H27 J27 K27 J26 M21
M20
M23 L23
Y26 W24 AA26 W22
Y27AA24 AA27AA23 W20AB25
C27 AF25 AD26
AE23 AG23
A_IMB_D_R0 A_IMB_D_R1 A_IMB_D_R2 A_IMB_D_R3 A_IMB_D_R4 A_IMB_D_R5 A_IMB_D_R6 A_IMB_D_R7 A_IMB_D_R8 A_IMB_D_R9 A_IMB_D_R10 A_IMB_D_R11 A_IMB_D_R12 A_IMB_D_R13 A_IMB_D_R14 A_IMB_D_R15
A_IMB_D_T0 A_IMB_D_T1 A_IMB_D_T2 A_IMB_D_T3 A_IMB_D_T4 A_IMB_D_T5 A_IMB_D_T6 A_IMB_D_T7 A_IMB_D_T8 A_IMB_D_T9 A_IMB_D_T10 A_IMB_D_T11 A_IMB_D_T12 A_IMB_D_T13 A_IMB_D_T14 A_IMB_D_T15
T_IMB_D_R0 T_IMB_D_R1 T_IMB_D_R2 T_IMB_D_R3
A_IMB_D_T[0..15]
R13484.7K
VCC25
TESTMODE# 15
RCC_SDA 15,27,37,41,48,69 RCC_SCL 15,27,37,41,48,69
A_IMB_D_R[0..15] 27
A_IMB_CON_R 27 A_IMB_CLK_R_P 25 A_IMB_CLK_R_N 25 A_IMB_PAR_R 27
A_IMB_D_T[0..15] 27
A_IMB_CON_T 27 A_IMB_CLK_T_P_R 25 A_IMB_CLK_T_N_R 25 A_IMB_PAR_T 27
T_IMB_D_R[0..3] 46,50
T_IMB_CLK_R 25,46 T_IMB_CON_R 46,50 T_IMB_PAR_R 46,50
PROC_RESET# 3,5,9,10 POWERGOOD_CMIC 15,64
VDD_IMB
R1031249_1%
R1399249_1%
R1400100_1%
1 1
CMIC_IMB_COMP_PU
CMIC_IMB_COMP_PD
CMIC_IMB_RCOMP
A
B
C1110 220pF
C1111 220pF
VDD_IMB
100_1%
R1106 100_1%
R1104
IMB_VREF_CMIC
1.0uF/10V
C1112
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
C
D
http://www.msi.com.tw
CMIC_CIOB_IF
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
12 75
Rev
0A
Page 14
A
R_A_SD0_[0..7]20
4 4
R_A_SD1_[0..7]20
R_A_SD2_[0..7]20
R_A_SD3_[0..7]20
3 3
R_A_SD4_[0..7]20
R_A_SD5_[0..7]20
R_A_SD6_[0..7]20
2 2
R_A_SD7_[0..7]20
R_A_SD8_[0..7]20
MA[0..14]16,17,18,19,20
1 1
A
R_A_SD0_0 R_A_SD0_1 R_A_SD0_2 R_A_SD0_3 R_A_SD0_4 R_A_SD0_5 R_A_SD0_6 R_A_SD0_7
R_A_SD1_0 R_A_SD1_1 R_A_SD1_2 R_A_SD1_3 R_A_SD1_4 R_A_SD1_5 R_A_SD1_6 R_A_SD1_7
R_A_SD2_0 R_A_SD2_1 R_A_SD2_2 R_A_SD2_3 R_A_SD2_4 R_A_SD2_5 R_A_SD2_6 R_A_SD2_7
R_A_SD3_0 R_A_SD3_1 R_A_SD3_2 R_A_SD3_3 R_A_SD3_4 R_A_SD3_5 R_A_SD3_6 R_A_SD3_7
R_A_SD4_0 R_A_SD4_1 R_A_SD4_2 R_A_SD4_3 R_A_SD4_4 R_A_SD4_5 R_A_SD4_6 R_A_SD4_7
R_A_SD5_0 R_A_SD5_1 R_A_SD5_2 R_A_SD5_3 R_A_SD5_4 R_A_SD5_5 R_A_SD5_6 R_A_SD5_7
R_A_SD6_0 R_A_SD6_1 R_A_SD6_2 R_A_SD6_3 R_A_SD6_4 R_A_SD6_5 R_A_SD6_6 R_A_SD6_7
R_A_SD7_0 R_A_SD7_1 R_A_SD7_2 R_A_SD7_3 R_A_SD7_4 R_A_SD7_5 R_A_SD7_6 R_A_SD7_7
R_A_SD8_0 R_A_SD8_1 R_A_SD8_2 R_A_SD8_3 R_A_SD8_4 R_A_SD8_5 R_A_SD8_6 R_A_SD8_7
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
MA12 MA13 MA14
CMIC_LE
AA22 AD22 AC19 AA18 AB23 AB19 AD19
AG22 AB15 AD16 AG21 AF19 AG17 AB16
AG14
AF13 AG12 AE14
AG13 AE13
AD10 AA12
AB10
B
R_A_DQS0_0
R_A_DQS0_1
R_A_DQS1_0
R_A_DQS1_1
R_A_DQS2_0
R_A_DQS2_1
R_A_DQS3_0
R_A_DQS3_1
R_A_DQS4_0
R_A_DQS4_1
R_A_DQS5_0
R_A_DQS5_1
R_A_DQS6_0
R_A_DQS6_1
R_A_DQS7_0
R_A_DQS7_1
R_A_DQS8_0
R_A_DQS8_1
U1C
AC20
AG20
AB13
AE9Y2T4
AC13
AF8W1P7N7H3
A_DQS2_0
A_DQS3_0
A_DQS4_0
A_DQS2_1
A_DQS3_1
B_DQS2_0
B_DQS3_0
B_DQS1_1
B_DQS2_1
B_DQS3_1
AE15
AG11
AA4P1R10L4AC9
AD15
AG10Y5P3U2M7
R_B_DQS2_0
R_B_DQS2_1
R_B_DQS3_0
R_B_DQS3_1
R_B_DQS4_0
N10H4Y11
A_DQS5_0
A_DQS4_1
A_DQS5_1
B_DQS4_0
B_DQS5_0
B_DQS4_1
R_B_DQS4_1
R_B_DQS5_0
R_B_DQS5_1
A_DQS6_0
A_DQS7_0
A_DQS6_1
B_DQS6_0
B_DQS5_1
B_DQS6_1
R_B_DQS6_0
R_B_DQS6_1
R_B_DQS7_0
V11
A_DQS8_0
A_DQS7_1
A_DQS8_1
B_DQS7_0
B_DQS8_0
B_DQS7_1
AF6
R_B_DQS7_1
R_B_DQS8_0
R_B_DQS8_1
AD20
A_SD0_0 A_SD0_1 A_SD0_2 A_SD0_3 A_SD0_4 A_SD0_5 A_SD0_6
Y16
A_SD0_7
V15
A_SD1_0 A_SD1_1 A_SD1_2 A_SD1_3 A_SD1_4 A_SD1_5 A_SD1_6 A_SD1_7
A_SD2_0
Y14
A_SD2_1 A_SD2_2 A_SD2_3 A_SD2_4
V14
A_SD2_5 A_SD2_6 A_SD2_7
Y13
A_SD3_0
AF9
A_SD3_1
AE8
A_SD3_2 A_SD3_3 A_SD3_4
AG8
A_SD3_5
AG6
A_SD3_6
AG5
A_SD3_7
T10
A_SD4_0
Y4
A_SD4_1
R11
A_SD4_2
T7
A_SD4_3
W5
A_SD4_4
Y3
A_SD4_5
U6
A_SD4_6
U1
A_SD4_7
T3
A_SD5_0
R2
A_SD5_1
R4
A_SD5_2
R5
A_SD5_3
T5
A_SD5_4
R1
A_SD5_5
K8
A_SD5_6
R6
A_SD5_7
N3
A_SD6_0
N1
A_SD6_1
M2
A_SD6_2
M4
A_SD6_3
N8
A_SD6_4
N4
A_SD6_5
L1
A_SD6_6
M3
A_SD6_7
H1
A_SD7_0
H2
A_SD7_1
L6
A_SD7_2
M10
A_SD7_3
J5
A_SD7_4
J3
A_SD7_5
L8
A_SD7_6
K10
A_SD7_7
AF3
A_SD8_0
AG2
A_SD8_1 A_SD8_2
AA9
A_SD8_3
AE6
A_SD8_4
AF5
A_SD8_5
AC8
A_SD8_6
AB9
A_SD8_7
AD5
MA0
AE5
MA1
Y10
MA2
AA8
MA3
Y9
MA4
Y7
MA5
AF1
MA6
AE2
MA7
AD3
MA8
AE3
MA9
AF2
MA10
Y8
MA11
AG19
A_DQS0_0
A_DQS1_0
A_DQS0_1
A_DQS1_1
B_DQS0_0
B_DQS1_0
B_DQS0_1
MA12
MA13
MA14
AA20
AF20
AB21
AE19
V10
AA7
AB6
R_B_DQS0_0
R_B_DQS0_1
R_B_DQS1_0
B
R_B_DQS1_1
B_SD0_0 B_SD0_1 B_SD0_2 B_SD0_3 B_SD0_4 B_SD0_5 B_SD0_6 B_SD0_7
B_SD1_0 B_SD1_1 B_SD1_2 B_SD1_3 B_SD1_4 B_SD1_5 B_SD1_6 B_SD1_7
B_SD2_0 B_SD2_1 B_SD2_2 B_SD2_3 B_SD2_4 B_SD2_5 B_SD2_6 B_SD2_7
B_SD3_0 B_SD3_1 B_SD3_2 B_SD3_3 B_SD3_4 B_SD3_5 B_SD3_6 B_SD3_7
B_SD4_0 B_SD4_1 B_SD4_2 B_SD4_3 B_SD4_4 B_SD4_5 B_SD4_6 B_SD4_7
B_SD5_0 B_SD5_1 B_SD5_2 B_SD5_3 B_SD5_4 B_SD5_5 B_SD5_6 B_SD5_7
B_SD6_0 B_SD6_1 B_SD6_2 B_SD6_3 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_7
B_SD7_0 B_SD7_1 B_SD7_2 B_SD7_3 B_SD7_4 B_SD7_5 B_SD7_6 B_SD7_7
B_SD8_0 B_SD8_1 B_SD8_2 B_SD8_3 B_SD8_4 B_SD8_5 B_SD8_6 B_SD8_7
B_DQS8_1
CS7
Y6
A_CKE B_CKE
CS6
AA6
RAS# CAS#
C
R_B_SD0_0
Y20
R_B_SD0_1
AA21
R_B_SD0_2
AA19
R_B_SD0_3
V17
R_B_SD0_4
V18
R_B_SD0_5
Y19
R_B_SD0_6
AB20
R_B_SD0_7
Y18
R_B_SD1_0
AF22
R_B_SD1_1
AE21
R_B_SD1_2
Y17
R_B_SD1_3
V16
R_B_SD1_4
AE22
R_B_SD1_5
AE20
R_B_SD1_6
AC18
R_B_SD1_7
AE18
R_B_SD2_0
AF16
R_B_SD2_1
AF15
R_B_SD2_2
AC15
R_B_SD2_3
AB14
R_B_SD2_4
AG16
R_B_SD2_5
AG15
R_B_SD2_6
AD14
R_B_SD2_7
Y15
R_B_SD3_0
AA13
R_B_SD3_1
AD13
R_B_SD3_2
AC12
R_B_SD3_3
AG9
R_B_SD3_4
V13
R_B_SD3_5
AE12
R_B_SD3_6
AF10
R_B_SD3_7
AG7
R_B_SD4_0
AB4
R_B_SD4_1
AB2
R_B_SD4_2
AA1
R_B_SD4_3
T8
R_B_SD4_4
AA3
R_B_SD4_5
AA2
R_B_SD4_6
Y1
R_B_SD4_7
AA5
R_B_SD5_0
P8
R_B_SD5_1
R3
R_B_SD5_2
P5
R_B_SD5_3
J8
R_B_SD5_4
P10
R_B_SD5_5
N2
R_B_SD5_6
N5
R_B_SD5_7
N6
R_B_SD6_0
W3
R_B_SD6_1
V1
R_B_SD6_2
T2
R_B_SD6_3
T1
R_B_SD6_4
T6
R_B_SD6_5
U4
R_B_SD6_6
R7
R_B_SD6_7
R8
R_B_SD7_0
M1
R_B_SD7_1
J1
R_B_SD7_2
M5
R_B_SD7_3
L10
R_B_SD7_4
K1
R_B_SD7_5
L2
R_B_SD7_6
M6
R_B_SD7_7
M8
R_B_SD8_0
AD9
R_B_SD8_1
AD8
R_B_SD8_2
AG4
R_B_SD8_3
AD7
R_B_SD8_4
V12
R_B_SD8_5
Y12
R_B_SD8_6
AE7
R_B_SD8_7
AG3
AB1
WE#
AC1 W8 AB8 AE4
R_CS_0
U8
CS0
R_CS_1
U10
CS1
R_CS_2
W7
CS2
R_CS_3
V8
CS3
R_CS_4
AE1
CS4
R_CS_5
AD1
CS5
R_CS_6 R_CS_7
C
R_B_SD0_[0..7] 20
R_B_SD1_[0..7] 20
R_B_SD2_[0..7] 20
R_B_SD3_[0..7] 20
R_B_SD4_[0..7] 20
R_B_SD5_[0..7] 20
R_B_SD6_[0..7] 20
R_B_SD7_[0..7] 20
R_B_SD8_[0..7] 20
WE# 16,17,18,19,20 RAS# 16,17,18,19,20 CAS# 16,17,18,19,20 A_CKE 16,17,20 B_CKE 18,19,20
CS_0
R151939
CS_1
R152039
CS_2
R152139
CS_3
R152239
CS_4
R152339
CS_5
R152439
CS_6
R152539
CS_7
R152639
D
CS_0 16,18 CS_1 16,18 CS_2 16,18 CS_3 16,18 CS_4 17,19 CS_5 17,19 CS_6 17,19 CS_7 17,19
D
R_B_DQS0_[0..1]20
R_B_DQS1_[0..1]20
R_B_DQS2_[0..1]20
R_B_DQS3_[0..1]20
R_B_DQS4_[0..1]20
R_B_DQS5_[0..1]20
R_B_DQS6_[0..1]20
R_B_DQS7_[0..1]20
R_B_DQS8_[0..1]20
R_A_DQS0_[0..1]20
R_A_DQS1_[0..1]20
R_A_DQS2_[0..1]20
R_A_DQS3_[0..1]20
R_A_DQS4_[0..1]20
R_A_DQS5_[0..1]20
R_A_DQS6_[0..1]20
R_A_DQS7_[0..1]20
R_A_DQS8_[0..1]20
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
R_B_DQS0_[0..1]
R_B_DQS1_[0..1]
R_B_DQS2_[0..1]
R_B_DQS3_[0..1]
R_B_DQS4_[0..1]
R_B_DQS5_[0..1]
R_B_DQS6_[0..1]
R_B_DQS7_[0..1]
R_B_DQS8_[0..1]
R_A_DQS0_[0..1]
R_A_DQS1_[0..1]
R_A_DQS2_[0..1]
R_A_DQS3_[0..1]
R_A_DQS4_[0..1]
R_A_DQS5_[0..1]
R_A_DQS6_[0..1]
R_A_DQS7_[0..1]
R_A_DQS8_[0..1]
Micro Star Restricted Secret
CMIC_MEM_IF
E
Last Revision Date:
Monday, August 20, 2001
Sheet
13 75
E
Rev
0A
of
Page 15
A
B
C
D
E
D
C1113
1.0uF/16V
C1423
560uF/4V
C1430
1.0uF/16V
VCC25
R1026
0
ANCHORs for CMIC_LE Heatsink
GND
GND_SIGNAL
GND SIGNAL
VCC25
C1114
1.0uF/16V
VCC_P
12
+
L41
1 2
47uH
22uF/10V C1052
JP35
2 1
HS_ANCHOR
VCC25
100_1%
R1028
C1057 220pF
C1058 220pF
C1056 0.1uF
C1115
1.0uF/16V
VCC25
R1029 100_1%
12
C1422
+
560uF/4V
VDD_IMB
+
C1092
+
C1094 270uF/4V/20mR/SP/OSCON
270uF/4V/20mR/SP/OSCON
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
CMIC_PWR
CMIC_AVDD
C1053
1.0uF/10V
MEM_VREF_CMIC
C1059 1.0uF/10V
CMIC_DCOMP
270uF/4V/20mR/SP/OSCON
Last Revision Date:
Monday, August 20, 2001
Sheet
E
JP36
1 2
HS_ANCHOR
VCC25
+
C1095
of
14 75
R1030
249_1%
Rev
0A
C1669
0.1uF
AB12 AB11 AB7 AB5 AB3 AC26 AC24 AC22 AC17 AC16 AC14 AC7 AC5 AC3 AD12 AD11 AE17 AE16 AF24 AF21 AF12 AF11 AF4
E26 G23 K19 K22 K24 K26 L22 L24 L26 M17 M19 P17 P19 P24 T17 T19 U22 U24 U26 V19 V24 V26
AB27
AC27T16
U9 W17
AG18
AD24
U19
VCC25
VDD_IMB
CMIC_AVDD
MEM_VREF_CMIC
CMIC_DCOMP
CMIC_RSVD
MEM_VREF_CMIC
CMIC_RSVD 15
C1670
C1671
0.01uF
0.1uF
VCC_P
C1649
0.01uF
C1650
0.1uF
C1651
0.01uF
C1076
0.1uF
C1077
0.1uF
C1078
0.01uF
C1079
0.01uF
C1080
0.01uF
C1081
0.01uF
C1129
0.1uF
C1128
0.1uF
VCC25
C1127
0.1uF
C1082
0.1uF
C1083
0.1uF
C1084
0.01uF
C1085
0.01uF
C1086
0.01uF
C1087
0.01uF
C1088
0.1uF
C1089
0.1uF
C1090
0.01uF
C1091
0.01uF
C1098
0.01uF
C1099
0.01uF
C1653
0.01uF
C1654
0.1uF
C1661
0.01uF
C1662
0.1uF
C1652
0.1uF
C1672
0.01uF
B
VCC_P
C1655
1.0uF/16V
V23 V25
W9 W11 W13 W15
W19 W21 W23 W25
AA10 AA11 AA14 AB17 AB18
AC2 AC4 AC6
AC10 AC11 AC21 AC23 AC25
AD2 AD4 AD6
AD17 AD18 AD21 AD23 AD25 AE10 AE11
AF7 AF14 AF17 AF18
AG1
AG27
V5
V7 R12 R14 R16 R19 T11 T13 T15 T18
U3 U5 U7
U12 U14 U16
V3 V21
P6 P11 P13 P15 P22
C1424
1.0uF/16V
GND91 GND92 GND93 GND94 GND95 GND96
GND98 GND99 GND100 GND102 GND103 GND104 GND105 GND106 GND107 GND108 GND109 GND110 GND111 GND112 GND113 GND114 GND115 GND116 GND117 GND118 GND119 GND120 GND121 GND122 GND123 GND124 GND125 GND126 GND127 GND128 GND129 GND130 GND131
GND133 GND135 GND72 GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND80 GND81 GND83
GND85 GND86 GND87
GND89 GND90 GND65 GND66 GND67 GND68 GND69
C1656
1.0uF/16V
C
U1D
C1657
1.0uF/16V
C1425
1.0uF/16V
CMIC_LE
VDD_IMBVCC25
C1658
1.0uF/16V
C1426
1.0uF/16V
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND34 GND35 GND36 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64 GND71 GND70
GND136 GND137GND139
C1427
1.0uF/16V
A1 A27 B5 B6 B10 B11 B14 C17 C18 C25 D5 D6 D10 D11 D14 D21 D23 K16 E2 E17 E18 E22 E24 F10 F11 F14 G7 G17 G18 G26 J2 J4 J6 J9 J11 J13 J15 J17 J19 J21 J23 J25 K2 K4 K6 K21 K23 K25 L9 L12 L14 L16 L19 M11 M13 M15 M18 N9 N12 N14 N16 N19 P2 R9 P26 AA17 D25J7
C1659
1.0uF/16V
C1428
1.0uF/16V
C1660
1.0uF/16V
C1429
1.0uF/16V
VCC_P
4 4
3 3
VCC25
2 2
1 1
VDD_IMB
C1664
0.01uF
AA16 AA15 AB26 AB24 AB22
U1E
B2
VTT
B8
VTT
B16
VTT
B17
VTT
B22
VTT
B24
VTT
C4
VTT
C5
VTT
C11
VTT
C12
VTT
C21
VTT
C23
VTT
D16
VTT
D17
VTT
D26
VTT
E4
VTT
E5
VTT
E8
VTT
E11
VTT
E12
VTT
F16
VTT
F17
VTT
G4
VTT
G11
VTT
G12
VTT
G20
VTT
J10
VTT
J12
VTT
J14
VTT
J16
VTT
J18
VTT
K9
VDD_2.5
K7
VDD_2.5
K5
VDD_2.5
K3
VDD_2.5
L15
VDD_2.5
L13
VDD_2.5
L11
VDD_2.5
L7
VDD_2.5
L5
VDD_2.5
L3
VDD_2.5
M16
VDD_2.5
M14
VDD_2.5
M12
VDD_2.5
M9
VDD_2.5
N15
VDD_2.5
N13
VDD_2.5
N11
VDD_2.5
P16
VDD_2.5
P14
VDD_2.5
P12
VDD_2.5
P9
VDD_2.5
P4
VDD_2.5
R15
VDD_2.5
R13
VDD_2.5
T14
VDD_2.5
T12
VDD_2.5
T9
VDD_2.5
U15
VDD_2.5
U13
VDD_2.5
U11
VDD_2.5
V22
VDD_2.5
V9
VDD_2.5
V6
VDD_2.5
V4
VDD_2.5
V2
VDD_2.5
W18
VDD_2.5
W16
VDD_2.5
W14
VDD_2.5
W12
VDD_2.5
W10
VDD_2.5
W6
VDD_2.5
W4
VDD_2.5
W2
VDD_2.5
Y25
VDD_2.5
Y23
VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5
VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5 VDD_2.5
VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB VDD_IMB
AVDD
AGNDVDD_2.5
MEM_VREF MEM_VREF
DCOMP
RSVD
T_IMB_VREF
CMIC_LE
C1665
C1666
C1667
0.1uF
0.01uF
A
0.1uF
C1668
0.01uF
Page 16
A
COMPATIBILITY IMB
1: A_IMB is Compatibility Bus 0: Thin IMB is Compatibility Bus ( Default )
4 4
JP25
HDR_1X2
VCC25
8.2K R1105
COMP_IMB
2 1
1K
R1107
POWERGOOD_CMIC12,64
B
VCC25
C1395
0.1uF
CMIC_PLL_EN# CMIC_DEFER_EN COMP_IMB IOQ_DEPTH
IMB_TRAINING IMB_CRC_PARITY ALERT# IMB_R_W_PTR_DLY
2 4 6
8 11 13 15 17
1 19
U136
1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4
1G 2G
74LVCH244A
CMIC_FATAL#
18
1Y1
WRMRST#
16
1Y2
MEMOFF#
14
1Y3
MEMOFFACK#
12
1Y4
RCC_SCLDETERMINISTIC_IMB
9
2Y1
RCC_SDA
7
2Y2
5
2Y3
TESTMODE#
3
2Y4
20
VDD
10
GND
VCC25
C
CMIC_FATAL# 11,50 WRMRST# 11 MEMOFF# 11,49 MEMOFFACK# 11 RCC_SCL 12,27,37,41,48,69 RCC_SDA 12,27,37,41,48,69 ALERT# 11,27,37,50 TESTMODE# 12
D
Thin IMB FREQ.
1 = 100 MHz 2X 0 = 200 MHz 2X
CMIC_RSVD14
CMIC_RSVD
Do not stuff
VCC25
R1100
2.2K
R1505
RES_NOPOP
E
A/B_IMB CRC or PARITY
0 : PARITY is enabled for A & B IMB buses (Default )
VCC25
1 : CRC is enabled for A & B IMB buses
IMB - DETERMINISTIC/ NON
VCC25
3 3
HDR_1X2
2 2
1 1
VCC25
DEFER ENABLE/DISABLE
OFF: Defer Enabled ( Default ) ON: Defer Disabled
JP13
R1108 8.2K
2 1
CMIC_DEFER_EN
1K
R1109
CMIC PLL ENABLE/DISABLE
1: APLL Disabled 0: APLL Enabled ( Default )
VCC25
R1110
RES_NOPOP
DO NOT STUFF
CMIC_PLL_EN#
R1112 2.2K
A
R1396
8.2K
JP38
2 1
HDR_1X2
IMB_READ/WRITE POINTER DLY
VCC25
1 : 5 CLOCKs 0 : 6 CLOCKs
R1506
2.2K
IMB_R_W_PTR_DLY
Do not stuff
R1507
RES_NOPOP
B
DETERMINISTIC
0 : Deterministic IMB 1 : Non Deterministic IMB (Default )
DETERMINISTIC_IMB
1K
R1397
( Default )
C
JP14
HDR_1X2
IOQ DEPTH
VCC25
OFF: IOQ Depth 1 ON: IOQ Depth 12 ( Default )
R1111 8.2K
IOQ_DEPTH
2 1
1K
R1113
JP37
HDR_1X2
R1102
8.2K
2 1
( In final version Use CRC on IMB buses )
IMB_CRC_PARITY
R1103
2.2K
IMB_TRAINING
VCC25
0 : IMB TRAINING Disabled 1 : IMB TRAINING Enabled ( Default )
R1094
8.2K
JP39
2 1
HDR_1X2
D
IMB_TRAINING
1K
R1097
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
CMIC STRAPPING OPTIONS
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
15 75
Rev
0A
Page 17
A
MA[0..14]13,17,18,19,20
MA0 MA1 MA2 MA3 MA4 MA5
DIMM_WP#1
DIMM_WP#2
VCC25
MA6 MA7 MA8 MA9 MA10 MA11 MA12
MA13 MA14
DIMM_WP#1
4 4
CS_013,18 CS_213,18
RAS#13,17,18,19,20 CAS#13,17,18,19,20 WE#13,17,18,19,20
CLK0_P24 CLK0_N24
A_CKE13,17,20
SSTLREF_D117,71
VCC25
VCC25
MEMB_SCL17,19,24,69 MEMB_SDA17,19,24,69
R1014
330
DIMM_WP#118
DIMM_RST#17,18,19,65
DIMM_WP#218
R16254.7K
3 3
R16264.7K
2 2
VCC25
1 1
A_DQS0_[0..1]17,20,21 A_DQS1_[0..1]17,20,21 A_DQS2_[0..1]17,20,21 A_DQS3_[0..1]17,20,21 A_DQS4_[0..1]17,20,21 A_DQS5_[0..1]17,20,21 A_DQS6_[0..1]17,20,21 A_DQS7_[0..1]17,20,21 A_DQS8_[0..1]17,20,21
A
11
665850
4234267418
89
81
48
A0
GND
GND
GND
GND
GND
GND
GND
GND
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
GND
J2
I2C ADD. - 0
B
3
139
132
124
116
100
93
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
A_SD0_[0..7]17,20,21 A_SD1_[0..7]17,20,21 A_SD2_[0..7]17,20,21 A_SD3_[0..7]17,20,21 A_SD4_[0..7]17,20,21 A_SD5_[0..7]17,20,21 A_SD6_[0..7]17,20,21 A_SD7_[0..7]17,20,21 A_SD8_[0..7]17,20,21
B
GND
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0 ECC1 ECC2 ECC3 DQS8
ECC4 ECC5 ECC6 ECC7
A_SD0_0
2
D0
A_SD0_1
4
D1
A_SD0_2
6
D2
A_SD0_3
8
D3
A_DQS0_0
5
A_DQS0_1
97
A_SD0_4
94
D4
A_SD0_5
95
D5
A_SD0_6
98
D6
A_SD0_7
99
D7
A_SD1_0
12
D8
A_SD1_1
13
D9
A_SD1_2
19
D10
A_SD1_3
20
D11
A_DQS1_0
14
A_DQS1_1
107
A_SD1_4
105
D12
A_SD1_5
106
D13
A_SD1_6
109
D14
A_SD1_7
110
D15
A_SD2_0
23
D16
A_SD2_1
24
D17
A_SD2_2
28
D18
A_SD2_3
31
D19
A_DQS2_0
25
A_DQS2_1
119
A_SD2_4
114
D20
A_SD2_5
117
D21
A_SD2_6
121
D22
A_SD2_7
123
D23
A_SD3_0
33
D24
A_SD3_1
35
D25
A_SD3_2
39
D26
A_SD3_3
40
D27
A_DQS3_0
36
A_DQS3_1
129
A_SD3_4
126
D28
A_SD3_5
127
D29
A_SD3_6
131
D30
A_SD3_7
133
D31
A_SD4_0
53
D32
A_SD4_1
55
D33
A_SD4_2
57
D34
A_SD4_3
60
D35
A_DQS4_0 A_DQS4_1
149
A_SD4_4
146
D36
A_SD4_5
147
D37
A_SD4_6
150
D38
A_SD4_7
151
D39
A_SD5_0
61
D40
A_SD5_1
64
D41
A_SD5_2
68
D42
A_SD5_3
69
D43
A_DQS5_0
67
A_DQS5_1
159
A_SD5_4
153
D44
A_SD5_5
155
D45
A_SD5_6
161
D46
A_SD5_7
162
D47
A_SD6_0
72
D48
A_SD6_1
73
D49
A_SD6_2
79
D50
A_SD6_3
80
D51
A_DQS6_0
78
A_DQS6_1
169
A_SD6_4
165
D52
A_SD6_5
166
D53
A_SD6_6
170
D54
A_SD6_7
171
D55
A_SD7_0
83
D56
A_SD7_1
84
D57
A_SD7_2
87
D58
A_SD7_3
88
D59
A_DQS7_0
86
A_DQS7_1
177
A_SD7_4
174
D60
A_SD7_5
175
D61
A_SD7_6
178
D62
A_SD7_7
179
D63
A_SD8_0
44
A_SD8_1
45
A_SD8_2
49
A_SD8_3
51
A_DQS8_0
47
A_DQS8_1
140
A_SD8_4
134
A_SD8_5
135
A_SD8_6
142
A_SD8_7
144
CS_113,18 CS_313,18
RAS#13,17,18,19,20 CAS#13,17,18,19,20 WE#13,17,18,19,20
CLK1_P24 CLK1_N24
A_CKE
SSTLREF_D1
VCC25
MEMB_SCL MEMB_SDA
R1013 330
R1015 4.7K
VCC25
DIMM_RST#
C
11
665850
116
100
93
4234267418
89
MA0
48
A0
MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12
MA13 MA14
DIMM_WP#2
VCC25
VCC25
C
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
81
GND
GND
GND
GND
GND
GND
GND
GND
GND
J3
I2C ADD. - 2
GND
GND
GND
D
A_SD0_0 A_SD0_1 A_SD0_2 A_SD0_3 A_DQS0_0 A_DQS0_1 A_SD0_4 A_SD0_5 A_SD0_6 A_SD0_7 A_SD1_0 A_SD1_1 A_SD1_2 A_SD1_3 A_DQS1_0 A_DQS1_1 A_SD1_4 A_SD1_5 A_SD1_6 A_SD1_7 A_SD2_0 A_SD2_1 A_SD2_2 A_SD2_3 A_DQS2_0 A_DQS2_1 A_SD2_4 A_SD2_5 A_SD2_6 A_SD2_7 A_SD3_0 A_SD3_1 A_SD3_2 A_SD3_3 A_DQS3_0 A_DQS3_1 A_SD3_4 A_SD3_5 A_SD3_6 A_SD3_7 A_SD4_0 A_SD4_1 A_SD4_2 A_SD4_3 A_DQS4_0 A_DQS4_1 A_SD4_4 A_SD4_5 A_SD4_6 A_SD4_7 A_SD5_0 A_SD5_1 A_SD5_2 A_SD5_3 A_DQS5_0 A_DQS5_1 A_SD5_4 A_SD5_5 A_SD5_6 A_SD5_7 A_SD6_0 A_SD6_1 A_SD6_2 A_SD6_3 A_DQS6_0 A_DQS6_1 A_SD6_4 A_SD6_5 A_SD6_6 A_SD6_7 A_SD7_0 A_SD7_1 A_SD7_2 A_SD7_3 A_DQS7_0 A_DQS7_1 A_SD7_4 A_SD7_5 A_SD7_6 A_SD7_7 A_SD8_0 A_SD8_1 A_SD8_2 A_SD8_3
A_DQS8_0 A_DQS8_1 A_SD8_4 A_SD8_5 A_SD8_6 A_SD8_7
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
VCC25
22uF/10V/20%
22uF/10V/20%
Micro Star Restricted Secret
3
139
132
124
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
D0
4
D1
6
D2
8
D3
5
DQS0
97
DM0_DQS9
94
D4
95
D5
98
D6
99
D7
12
D8
13
D9
19
D10
20
D11
14
DQS1
107
DM1_DQS10
105
D12
106
D13
109
D14
110
D15
23
D16
24
D17
28
D18
31
D19
25
DQS2
119
DM2_DQS11
114
D20
117
D21
121
D22
123
D23
33
D24
35
D25
39
D26
40
D27
36
DQS3
129
DM3_DQS12
126
D28
127
D29
131
D30
133
D31
53
D32
55
D33
57
D34
60
D35
149
DM4_DQS13
146
D36
147
D37
150
D38
151
D39
61
D40
64
D41
68
D42
69
D43
67
DQS5
159
DM5_DQS14
153
D44
155
D45
161
D46
162
D47
72
D48
73
D49
79
D50
80
D51
78
DQS6
169
DM6_DQS15
165
D52
166
D53
170
D54
171
D55
83
D56
84
D57
87
D58
88
D59
86
DQS7
177
DM7_DQS16
174
D60
175
D61
178
D62
179
D63
44
ECC0
45
ECC1
49
ECC2
51
ECC3
47
DQS8
140
DM9_DQS17
134
ECC4
135
ECC5
142
ECC6
144
ECC7
D
C1358
0.01uF
C1362
0.01uF
C1366
0.01uF
C1370
0.01uF
C1374
0.01uF
VCC25
C1378
0.01uF
22uF/10V/20%
C1380
+
22uF/10V/20%
C1383
+
DIMM_CONN_1_&_2
E
C1359
0.01uF
0.01uF
C1363
0.01uF
0.01uF
C1367
0.01uF
0.01uF
C1371
0.01uF
0.01uF
C1375
0.01uF
0.01uF
C1379
0.01uF
22uF/10V/20%
C1381
+
22uF/10V/20%
C1384
+
Last Revision Date:
Monday, August 20, 2001
Sheet
16 75
E
C1360
C1364
C1368
C1372
C1376
C1361
0.01uF
C1365
0.01uF
C1369
0.01uF
C1373
0.01uF
C1377
0.01uF
VCC25
C1382
+
C1385
+
Rev
0A
of
Page 18
A
MA[0..14]13,16,18,19,20
MA0 MA1 MA2 MA3 MA4 MA5 MA6
VCC25
R1011 330 R1012
MA7 MA8 MA9 MA10 MA11 MA12
4.7K
4 4
MA1313,16,18,19,20 MA1413,16,18,19,20
CS_413,19 CS_613,19
RAS#13,16,18,19,20 CAS#13,16,18,19,20 WE#13,16,18,19,20
CLK2_P24 CLK2_N24
A_CKE13,16,20
SSTLREF_D116,71
3 3
MEMB_SCL16,19,24,69 MEMB_SDA16,19,24,69
VCC25
DIMM_WP#319
DIMM_RST#16,18,19,65
DIMM_WP#419
VCC25
R1628 4.7K
DIMM_WP#4
DIMM_WP#3
R1627 4.7K
VCC25
2 2
A_SD1_[0..7]16,20,21 A_SD0_[0..7]16,20,21 A_SD2_[0..7]16,20,21 A_SD3_[0..7]16,20,21 A_SD4_[0..7]16,20,21
1 1
A_SD5_[0..7]16,20,21 A_SD6_[0..7]16,20,21 A_SD7_[0..7]16,20,21 A_SD8_[0..7]16,20,21 A_DQS0_[0..1]16,20,21 A_DQS1_[0..1]16,20,21 A_DQS2_[0..1]16,20,21 A_DQS3_[0..1]16,20,21 A_DQS4_[0..1]16,20,21 A_DQS5_[0..1]16,20,21 A_DQS6_[0..1]16,20,21 A_DQS7_[0..1]16,20,21 A_DQS8_[0..1]16,20,21
A
11
665850
4234267418
48
A0
GND
GND
GND
GND
GND
GND
GND
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
22uF/10V/20%
J4
I2C ADD. - 4 I2C ADD. - 6
22uF/10V/20%
C1355
+
81
GND
GND
+
100
93
89
GND
GND
GND
22uF/10V/20%
C1356
B
3
139
132
124
116
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
DQS0
DM0_DQS9
DQS1
DM1_DQS10
DQS2
DM2_DQS11
DQS3
DM3_DQS12
DM4_DQS13
DQS5
DM5_DQS14
DQS6
DM6_DQS15
DQS7
DM7_DQS16
ECC0 ECC1 ECC2 ECC3 DQS8
DM9_DQS17
ECC4 ECC5 ECC6 ECC7
D10 D11
D12 D13 D14 D15 D16 D17 D18 D19
D20 D21 D22 D23 D24 D25 D26 D27
D28 D29 D30 D31 D32 D33 D34 D35
D36 D37 D38 D39 D40 D41 D42 D43
D44 D45 D46 D47 D48 D49 D50 D51
D52 D53 D54 D55 D56 D57 D58 D59
D60 D61 D62 D63
A_SD0_0
2
D0
A_SD0_1
4
D1
A_SD0_2
6
D2
A_SD0_3
8
D3
A_DQS0_0
5
A_DQS0_1
97
A_SD0_4
94
D4
A_SD0_5
95
D5
A_SD0_6
98
D6
A_SD0_7
99
D7
A_SD1_0
12
D8
A_SD1_1
13
D9
A_SD1_2
19
A_SD1_3
20
A_DQS1_0
14
A_DQS1_1
107
A_SD1_4
105
A_SD1_5
106
A_SD1_6
109
A_SD1_7
110
A_SD2_0
23
A_SD2_1
24
A_SD2_2
28
A_SD2_3
31
A_DQS2_0
25
A_DQS2_1
119
A_SD2_4
114
A_SD2_5
117
A_SD2_6
121
A_SD2_7
123
A_SD3_0
33
A_SD3_1
35
A_SD3_2
39
A_SD3_3
40
A_DQS3_0
36
A_DQS3_1
129
A_SD3_4
126
A_SD3_5
127
A_SD3_6
131
A_SD3_7
133
A_SD4_0
53
A_SD4_1
55
A_SD4_2
57
A_SD4_3
60
A_DQS4_0 A_DQS4_1
149
A_SD4_4
146
A_SD4_5
147
A_SD4_6
150
A_SD4_7
151
A_SD5_0
61
A_SD5_1
64
A_SD5_2
68
A_SD5_3
69
A_DQS5_0
67
A_DQS5_1
159
A_SD5_4
153
A_SD5_5
155
A_SD5_6
161
A_SD5_7
162
A_SD6_0
72
A_SD6_1
73
A_SD6_2
79
A_SD6_3
80
A_DQS6_0
78
A_DQS6_1
169
A_SD6_4
165
A_SD6_5
166
A_SD6_6
170
A_SD6_7
171
A_SD7_0
83
A_SD7_1
84
A_SD7_2
87
A_SD7_3
88
A_DQS7_0
86
A_DQS7_1
177
A_SD7_4
174
A_SD7_5
175
A_SD7_6
178
A_SD7_7
179
A_SD8_0
44
A_SD8_1
45
A_SD8_2
49
A_SD8_3
51
A_DQS8_0
47
A_DQS8_1
140
A_SD8_4
134
A_SD8_5
135
A_SD8_6
142
A_SD8_7
144
C
CLK3_P24 CLK3_N24 CS_513,19 CS_713,19
A_CKE
MA0 MA1 MA2 MA3 MA4
MA5
MA6 MA7 MA8 MA9 MA10 MA11 MA12
MA13 MA14
CS_5 CS_7
RAS# CAS# WE#
CLK3_P CLK3_N
SSTLREF_D1
VCC25
MEMB_SCL MEMB_SDA
R1344 330
4.7K
R1345
VCC25
DIMM_WP#4
DIMM_RST#
VCC25
VCC25
11
4234267418
48
A0
GND
GND
GND
GND
GND
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
D
665850
93
89
81
GND
GND
GND
GND
GND
J43
3
139
132
124
116
100
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DQS0
DM0_DQS9
DQS1
DM1_DQS10
DQS2
DM2_DQS11
DQS3
DM3_DQS12
DM4_DQS13
DQS5
DM5_DQS14
DQS6
DM6_DQS15
DQS7
DM7_DQS16
ECC0 ECC1 ECC2 ECC3 DQS8
DM9_DQS17
ECC4 ECC5 ECC6 ECC7
D10 D11
D12 D13 D14 D15 D16 D17 D18 D19
D20 D21 D22 D23 D24 D25 D26 D27
D28 D29 D30 D31 D32 D33 D34 D35
D36 D37 D38 D39 D40 D41 D42 D43
D44 D45 D46 D47 D48 D49 D50 D51
D52 D53 D54 D55 D56 D57 D58 D59
D60 D61 D62 D63
A_SD0_0
2
D0
A_SD0_1
4
D1
A_SD0_2
6
D2
A_SD0_3
8
D3
A_DQS0_0
5
A_DQS0_1
97
A_SD0_4
94
D4
A_SD0_5
95
D5
A_SD0_6
98
D6
A_SD0_7
99
D7
A_SD1_0
12
D8
A_SD1_1
13
D9
A_SD1_2
19
A_SD1_3
20
A_DQS1_0
14
A_DQS1_1
107
A_SD1_4
105
A_SD1_5
106
A_SD1_6
109
A_SD1_7
110
A_SD2_0
23
A_SD2_1
24
A_SD2_2
28
A_SD2_3
31
A_DQS2_0
25
A_DQS2_1
119
A_SD2_4
114
A_SD2_5
117
A_SD2_6
121
A_SD2_7
123
A_SD3_0
33
A_SD3_1
35
A_SD3_2
39
A_SD3_3
40
A_DQS3_0
36
A_DQS3_1
129
A_SD3_4
126
A_SD3_5
127
A_SD3_6
131
A_SD3_7
133
A_SD4_0
53
A_SD4_1
55
A_SD4_2
57
A_SD4_3
60
A_DQS4_0 A_DQS4_1
149
A_SD4_4
146
A_SD4_5
147
A_SD4_6
150
A_SD4_7
151
A_SD5_0
61
A_SD5_1
64
A_SD5_2
68
A_SD5_3
69
A_DQS5_0
67
A_DQS5_1
159
A_SD5_4
153
A_SD5_5
155
A_SD5_6
161
A_SD5_7
162
A_SD6_0
72
A_SD6_1
73
A_SD6_2
79
A_SD6_3
80
A_DQS6_0
78
A_DQS6_1
169
A_SD6_4
165
A_SD6_5
166
A_SD6_6
170
A_SD6_7
171
A_SD7_0
83
A_SD7_1
84
A_SD7_2
87
A_SD7_3
88
A_DQS7_0
86
A_DQS7_1
177
A_SD7_4
174
A_SD7_5
175
A_SD7_6
178
A_SD7_7
179
A_SD8_0
44
A_SD8_1
45
A_SD8_2
49
A_SD8_3
51
A_DQS8_0
47
A_DQS8_1
140
A_SD8_4
134
A_SD8_5
135
A_SD8_6
142
A_SD8_7
144
VCC25
E
C1349
C1348
0.01uF
0.01uF
C1353
C1352
0.01uF
0.01uF
C1351
C1350
0.01uF
0.01uF
C1347
C1346
0.01uF
0.01uF
VCC25
VCC25
C1357
+
B
0.01uF
C1354
VCC25
0.01uF
C1400
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
C
D
http://www.msi.com.tw
DIMM_CONN_3_&_4
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
17 75
Rev
0A
Page 19
A
MA[0..14]13,16,17,19,20
MA0 MA1 MA2 MA3 MA4 MA5
4 4
CS_013,16 CS_213,16
RAS#13,16,17,19,20 CAS#13,16,17,19,20 WE#13,16,17,19,20
B_CKE13,19,20
3 3
MEMA_SCL69 MEMA_SDA69
MA6 MA7 MA8 MA9 MA10 MA11 MA12
MA13 MA14
CLK4_P24 CLK4_N24
SSTLREF_D219,71
VCC25
R1010
330
DIMM_WP#116
DIMM_RST#16,17,19,65
DIMM_WP#216
VCC25 VCC25
2 2
VCC25
1 1
B_SD0_[0..7]19,20,21 B_SD1_[0..7]19,20,21 B_SD2_[0..7]19,20,21 B_SD3_[0..7]19,20,21 B_SD4_[0..7]19,20,21 B_SD5_[0..7]19,20,21 B_SD6_[0..7]19,20,21 B_SD7_[0..7]19,20,21 B_SD8_[0..7]19,20,21
A
11
665850
4234267418
81
48
A0
GND
GND
GND
GND
GND
GND
GND
GND
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
J6
I2C ADD. - 0 I2C ADD. - 2
B
3
139
132
124
116
100
93
89
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
GND
B_DQS0_[0..1]19,20,21 B_DQS1_[0..1]19,20,21 B_DQS2_[0..1]19,20,21 B_DQS3_[0..1]19,20,21 B_DQS4_[0..1]19,20,21 B_DQS5_[0..1]19,20,21 B_DQS6_[0..1]19,20,21 B_DQS7_[0..1]19,20,21 B_DQS8_[0..1]19,20,21
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0 ECC1 ECC2 ECC3 DQS8
ECC4 ECC5 ECC6 ECC7
B_SD0_0
2
D0
B_SD0_1
4
D1
B_SD0_2
6
D2
B_SD0_3
8
D3
B_DQS0_0
5
B_DQS0_1
97
B_SD0_4
94
D4
B_SD0_5
95
D5
B_SD0_6
98
D6
B_SD0_7
99
D7
B_SD1_0
12
D8
B_SD1_1
13
D9
B_SD1_2
19
D10
B_SD1_3
20
D11
B_DQS1_0
14
B_DQS1_1
107
B_SD1_4
105
D12
B_SD1_5
106
D13
B_SD1_6
109
D14
B_SD1_7
110
D15
B_SD2_0
23
D16
B_SD2_1
24
D17
B_SD2_2
28
D18
B_SD2_3
31
D19
B_DQS2_0
25
B_DQS2_1
119
B_SD2_4
114
D20
B_SD2_5
117
D21
B_SD2_6
121
D22
B_SD2_7
123
D23
B_SD3_0
33
D24
B_SD3_1
35
D25
B_SD3_2
39
D26
B_SD3_3
40
D27
B_DQS3_0
36
B_DQS3_1
129
B_SD3_4
126
D28
B_SD3_5
127
D29
B_SD3_6
131
D30
B_SD3_7
133
D31
B_SD4_0
53
D32
B_SD4_1
55
D33
B_SD4_2
57
D34
B_SD4_3
60
D35
B_DQS4_0 B_DQS4_1
149
B_SD4_4
146
D36
B_SD4_5
147
D37
B_SD4_6
150
D38
B_SD4_7
151
D39
B_SD5_0
61
D40
B_SD5_1
64
D41
B_SD5_2
68
D42
B_SD5_3
69
D43
B_DQS5_0
67
B_DQS5_1
159
B_SD5_4
153
D44
B_SD5_5
155
D45
B_SD5_6
161
D46
B_SD5_7
162
D47
B_SD6_0
72
D48
B_SD6_1
73
D49
B_SD6_2
79
D50
B_SD6_3
80
D51
B_DQS6_0
78
B_DQS6_1
169
B_SD6_4
165
D52
B_SD6_5
166
D53
B_SD6_6
170
D54
B_SD6_7
171
D55
B_SD7_0
83
D56
B_SD7_1
84
D57
B_SD7_2
87
D58
B_SD7_3
88
D59
B_DQS7_0
86
B_DQS7_1
177
B_SD7_4
174
D60
B_SD7_5
175
D61
B_SD7_6
178
D62
B_SD7_7
179
D63
B_SD8_0
44
B_SD8_1
45
B_SD8_2
49
B_SD8_3
51
B_DQS8_0
47
B_DQS8_1
140
B_SD8_4
134
B_SD8_5
135
B_SD8_6
142
B_SD8_7
144
VCC25
CS_113,16 CS_313,16
CLK5_P24 CLK5_N24
MEMA_SCL MEMA_SDA
R1007 4.7K R1009 330
B_CKE
SSTLREF_D2
VCC25
DIMM_WP#2
DIMM_RST#
C
11
665850
93
4234267418
89
MA0
48
A0
MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12
MA13 MA14
RAS# CAS# WE#
C
VCC25
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
81
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
J7
D
B_SD0_0 B_SD0_1 B_SD0_2 B_SD0_3 B_DQS0_0 B_DQS0_1 B_SD0_4 B_SD0_5 B_SD0_6 B_SD0_7 B_SD1_0 B_SD1_1 B_SD1_2 B_SD1_3 B_DQS1_0 B_DQS1_1 B_SD1_4 B_SD1_5 B_SD1_6 B_SD1_7 B_SD2_0 B_SD2_1 B_SD2_2 B_SD2_3 B_DQS2_0 B_DQS2_1 B_SD2_4 B_SD2_5 B_SD2_6 B_SD2_7 B_SD3_0 B_SD3_1 B_SD3_2 B_SD3_3 B_DQS3_0 B_DQS3_1 B_SD3_4 B_SD3_5 B_SD3_6 B_SD3_7 B_SD4_0 B_SD4_1 B_SD4_2 B_SD4_3 B_DQS4_0 B_DQS4_1 B_SD4_4 B_SD4_5 B_SD4_6 B_SD4_7 B_SD5_0 B_SD5_1 B_SD5_2 B_SD5_3 B_DQS5_0 B_DQS5_1 B_SD5_4 B_SD5_5 B_SD5_6 B_SD5_7 B_SD6_0 B_SD6_1 B_SD6_2 B_SD6_3 B_DQS6_0 B_DQS6_1 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_7 B_SD7_0 B_SD7_1 B_SD7_2 B_SD7_3 B_DQS7_0 B_DQS7_1 B_SD7_4 B_SD7_5 B_SD7_6 B_SD7_7 B_SD8_0 B_SD8_1 B_SD8_2 B_SD8_3 B_DQS8_0
B_DQS8_1 B_SD8_4 B_SD8_5 B_SD8_6 B_SD8_7
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
VCC25
Micro Star Restricted Secret
3
139
132
124
116
100
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
D0
4
D1
6
D2
8
D3
5
DQS0
97
DM0_DQS9
94
D4
95
D5
98
D6
99
D7
12
D8
13
D9
19
D10
20
D11
14
DQS1
107
DM1_DQS10
105
D12
106
D13
109
D14
110
D15
23
D16
24
D17
28
D18
31
D19
25
DQS2
119
DM2_DQS11
114
D20
117
D21
121
D22
123
D23
33
D24
35
D25
39
D26
40
D27
36
DQS3
129
DM3_DQS12
126
D28
127
D29
131
D30
133
D31
53
D32
55
D33
57
D34
60
D35
149
DM4_DQS13
146
D36
147
D37
150
D38
151
D39
61
D40
64
D41
68
D42
69
D43
67
DQS5
159
DM5_DQS14
153
D44
155
D45
161
D46
162
D47
72
D48
73
D49
79
D50
80
D51
78
DQS6
169
DM6_DQS15
165
D52
166
D53
170
D54
171
D55
83
D56
84
D57
87
D58
88
D59
86
DQS7
177
DM7_DQS16
174
D60
175
D61
178
D62
179
D63
44
ECC0
45
ECC1
49
ECC2
51
ECC3
47
DQS8
140
DM9_DQS17
134
ECC4
135
ECC5
142
ECC6
144
ECC7
D
C1318
0.01uF
C1322
0.01uF
C1326
0.01uF
C1330
0.01uF
C1334
0.01uF
VCC25
C1338
0.01uF
DIMM_CONN_5_&_6
E
C1319
0.01uF
0.01uF
C1323
0.01uF
0.01uF
C1327
0.01uF
0.01uF
C1331
0.01uF
0.01uF
C1335
0.01uF
0.01uF
C1339
0.01uF
Last Revision Date:
Monday, August 20, 2001
Sheet
18 75
E
C1320
C1324
C1328
C1332
C1336
C1321
0.01uF
C1325
0.01uF
C1329
0.01uF
C1333
0.01uF
C1337
0.01uF
Rev
0A
of
Page 20
A
MA[0..14]13,16,17,18,20
MA0 MA1 MA2 MA3 MA4
4 4
MA1313,16,17,18,20 MA1413,16,17,18,20
CS_413,17 CS_613,17
RAS#13,16,17,18,20 CAS#13,16,17,18,20 WE#13,16,17,18,20
CLK6_P24 CLK6_N24
B_CKE13,18,20
MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12
SSTLREF_D218,71
3 3
MEMB_SCL16,17,24,69 MEMB_SDA16,17,24,69
VCC25
MEMA_SCL MEMA_SDA
R1005 330
R1006 4.7K
VCC25
DIMM_WP#317
DIMM_RST#16,17,18,65
DIMM_WP#417
VCC25
2 2
VCC25
B_SD0_[0..7]18,20,21 B_SD1_[0..7]18,20,21 B_SD2_[0..7]18,20,21 B_SD3_[0..7]18,20,21
1 1
B_SD4_[0..7]18,20,21 B_SD5_[0..7]18,20,21 B_SD6_[0..7]18,20,21 B_SD7_[0..7]18,20,21
B_SD8_[0..7]18,20,21 B_DQS0_[0..1]18,20,21 B_DQS1_[0..1]18,20,21 B_DQS2_[0..1]18,20,21 B_DQS3_[0..1]18,20,21 B_DQS4_[0..1]18,20,21 B_DQS5_[0..1]18,20,21 B_DQS6_[0..1]18,20,21 B_DQS7_[0..1]18,20,21 B_DQS8_[0..1]18,20,21
A
11
4234267418
48
A0
GND
GND
GND
GND
GND
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181 182 183
102 56 101
173 163
113 103
168 148 120 108
136 180 156 112 164 143 128 104
172
I2C ADD. - 4
SA0 SA1 SA2
90
WP
10
RESET_
NC1 DQS4 NC2
9
NC4 NC5 CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU BA2_NU A13_NU
VDD VDD VDD VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
96
VDDQ VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
665850
93
89
81
GND
GND
GND
GND
GND
GND
J8
B
3
139
132
124
116
100
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DQS0
DM0_DQS9
DQS1
DM1_DQS10
DQS2
DM2_DQS11
DQS3
DM3_DQS12
DM4_DQS13
DQS5
DM5_DQS14
DQS6
DM6_DQS15
DQS7
DM7_DQS16
ECC0 ECC1 ECC2 ECC3 DQS8
DM9_DQS17
ECC4 ECC5 ECC6 ECC7
VCC25 VCC25
C1314
0.01uF
B
C
CLK7_P24 CLK7_N24 CS_713,17 CS_513,17
B_SD0_0
2
D0
B_SD0_1
4
D1
B_SD0_2
6
D2
B_SD0_3
8
D3
B_DQS0_0
5
B_DQS0_1
97
B_SD0_4
94
D4
B_SD0_5
95
D5
B_SD0_6
98
D6
B_SD0_7
99
D7
B_SD1_0
12
D8
B_SD1_1
13
D9
B_SD1_2
19
D10 D11
D12 D13 D14 D15 D16 D17 D18 D19
D20 D21 D22 D23 D24 D25 D26 D27
D28 D29 D30 D31 D32 D33 D34 D35
D36 D37 D38 D39 D40 D41 D42 D43
D44 D45 D46 D47 D48 D49 D50 D51
D52 D53 D54 D55 D56 D57 D58 D59
D60 D61 D62 D63
B_SD1_3
20
B_DQS1_0
14
B_DQS1_1
107
B_SD1_4
105
B_SD1_5
106
B_SD1_6
109
B_SD1_7
110
B_SD2_0
23
B_SD2_1
24
B_SD2_2
28
B_SD2_3
31
B_DQS2_0
25
B_DQS2_1
119
B_SD2_4
114
B_SD2_5
117
B_SD2_6
121
B_SD2_7
123
B_SD3_0
33
B_SD3_1
35
B_SD3_2
39
B_SD3_3
40
B_DQS3_0
36
B_DQS3_1
129
B_SD3_4
126
B_SD3_5
127
B_SD3_6
131
B_SD3_7
133
B_SD4_0
53
B_SD4_1
55
B_SD4_2
57
B_SD4_3
60
B_DQS4_0 DIMM_WP#4 B_DQS4_1
149
B_SD4_4
146
B_SD4_5
147
B_SD4_6
150
B_SD4_7
151
B_SD5_0
61
B_SD5_1
64
B_SD5_2
68
B_SD5_3
69
B_DQS5_0
67
B_DQS5_1
159
B_SD5_4
153
B_SD5_5
155
B_SD5_6
161
B_SD5_7
162
B_SD6_0
72
B_SD6_1
73
B_SD6_2
79
B_SD6_3
80
B_DQS6_0
78
B_DQS6_1
169
B_SD6_4
165
B_SD6_5
166
B_SD6_6
170
B_SD6_7
171
B_SD7_0
83
B_SD7_1
84
B_SD7_2
87
B_SD7_3
88
B_DQS7_0
86
B_DQS7_1
177
B_SD7_4
174
B_SD7_5
175
B_SD7_6
178
B_SD7_7
179
B_SD8_0
44
B_SD8_1
45
B_SD8_2
49
B_SD8_3
51
B_DQS8_0
47
B_DQS8_1
140
B_SD8_4
134
B_SD8_5
135
B_SD8_6
142
B_SD8_7
144
C1550
0.01uF
VCC25
22uF/10V/20%
C1548
+
R1347
VCC25
B_CKE
SSTLREF_D2
VCC25
MEMA_SCL MEMA_SDA
R1346
330
4.7K
DIMM_RST#
VCC25
22uF/10V/20%
C
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12
MA13 MA14
CS_5 CS_7
RAS# CAS# WE#
CLK7_P CLK7_N
+
C1315
11
665850
4234267418
81
48
A0
GND
GND
GND
GND
GND
GND
GND
GND
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
J44
I2C ADD. - 6
VCC25
22uF/10V/20%
+
C1316
22uF/10V/20%
+
C1549
D
3
139
132
124
116
100
93
89
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
GND
DQS0
D10 D11
DQS1
D12 D13 D14 D15 D16 D17 D18 D19
DQS2
D20 D21 D22 D23 D24 D25 D26 D27
DQS3
D28 D29 D30 D31 D32 D33 D34 D35
D36 D37 D38 D39 D40 D41 D42 D43
DQS5
D44 D45 D46 D47 D48 D49 D50 D51
DQS6
D52 D53 D54 D55 D56 D57 D58 D59
DQS7
D60 D61 D62
D63 ECC0 ECC1 ECC2 ECC3 DQS8
ECC4 ECC5 ECC6 ECC7
2
D0
4
D1
6
D2
8
D3
5 97 94
D4
95
D5
98
D6
99
D7
12
D8
13
D9
19 20 14 107 105 106 109 110 23 24 28 31 25 119 114 117 121 123 33 35 39 40 36 129 126 127 131 133 53 55 57 60
149 146 147 150 151 61 64 68 69 67 159 153 155 161 162 72 73 79 80 78 169 165 166 170 171 83 84 87 88 86 177 174 175 178 179 44 45 49 51 47 140 134 135 142 144
B_SD0_0 B_SD0_1 B_SD0_2 B_SD0_3 B_DQS0_0 B_DQS0_1 B_SD0_4 B_SD0_5 B_SD0_6 B_SD0_7 B_SD1_0 B_SD1_1 B_SD1_2 B_SD1_3 B_DQS1_0 B_DQS1_1 B_SD1_4 B_SD1_5 B_SD1_6 B_SD1_7 B_SD2_0 B_SD2_1 B_SD2_2 B_SD2_3 B_DQS2_0 B_DQS2_1 B_SD2_4 B_SD2_5 B_SD2_6 B_SD2_7 B_SD3_0 B_SD3_1 B_SD3_2 B_SD3_3 B_DQS3_0 B_DQS3_1 B_SD3_4 B_SD3_5 B_SD3_6 B_SD3_7 B_SD4_0 B_SD4_1 B_SD4_2 B_SD4_3 B_DQS4_0 B_DQS4_1 B_SD4_4 B_SD4_5 B_SD4_6 B_SD4_7 B_SD5_0 B_SD5_1 B_SD5_2 B_SD5_3 B_DQS5_0 B_DQS5_1 B_SD5_4 B_SD5_5 B_SD5_6 B_SD5_7 B_SD6_0 B_SD6_1 B_SD6_2 B_SD6_3 B_DQS6_0 B_DQS6_1 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_7 B_SD7_0 B_SD7_1 B_SD7_2 B_SD7_3 B_DQS7_0 B_DQS7_1 B_SD7_4 B_SD7_5 B_SD7_6 B_SD7_7 B_SD8_0 B_SD8_1 B_SD8_2 B_SD8_3 B_DQS8_0 B_DQS8_1 B_SD8_4 B_SD8_5 B_SD8_6 B_SD8_7
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
E
VCC25
DIMM_CONN_7_&_8
Last Revision Date:
Monday, August 20, 2001
Sheet
E
C1544
0.01uF
C1546
0.01uF
19 75
C1308
0.01uF
C1312
0.01uF
C1306
0.01uF
C1310
0.01uF
C1545
0.01uF
0.01uF
of
C1547
C1309
0.01uF
C1313
0.01uF
C1307
0.01uF
C1311
0.01uF
Rev
0A
Page 21
A
RP25
R_A_SD2_5 R_A_SD2_1 R_A_SD2_4 R_A_SD2_0 R_A_SD2_7 R_A_SD2_3 R_A_SD2_6 R_A_SD2_2 R_A_SD1_5 R_A_SD1_4 R_A_SD1_1 R_A_SD1_0 R_A_SD1_2 R_A_SD1_3 R_A_SD1_7 R_A_SD1_6 R_A_SD0_5 R_A_SD0_1 R_A_SD0_4 R_A_SD0_0 R_A_SD0_7 R_A_SD0_3 R_A_SD0_6 R_A_SD0_2
R_A_SD3_4 R_A_SD3_0 R_A_SD3_1 R_A_SD3_5 R_A_SD3_3 R_A_SD3_7 R_A_SD3_6 R_A_SD3_2 R_A_SD8_1
R_A_SD8_5 R_A_SD8_3 R_A_SD8_7 R_A_SD8_6 R_A_SD8_2 A_DQS3_0 A_DQS3_1 A_DQS1_0 A_DQS1_1 A_DQS0_0 A_DQS0_1 A_DQS2_0 A_DQS2_1 A_DQS8_0 A_DQS8_1
A_SD2_5
RP1 RP15R
A_SD2_1 A_SD2_4 A_SD2_0 A_SD2_7 A_SD2_3 A_SD2_6 A_SD2_2 A_SD1_5 A_SD1_4 A_SD1_1
4 4
3 3
A_SD1_0 A_SD1_2 A_SD1_3 A_SD1_7 A_SD1_6 A_SD0_5 A_SD0_1 A_SD0_4 A_SD0_0 A_SD0_7 A_SD0_3 A_SD0_6 A_SD0_2
A_SD3_4 A_SD3_0 A_SD3_1 A_SD3_5 A_SD3_3 A_SD3_7 A_SD3_6 A_SD3_2 A_SD8_1 A_SD8_0 R_A_SD8_0 A_SD8_4 R_A_SD8_4 A_SD8_5 A_SD8_3 A_SD8_7 A_SD8_6 A_SD8_2 R_A_DQS3_0 R_A_DQS3_1 R_A_DQS1_0 R_A_DQS1_1 R_A_DQS0_0 R_A_DQS0_1 R_A_DQS2_0 R_A_DQS2_1 R_A_DQS8_0 R_A_DQS8_1
1 8 2 7 3 6 4 5
RP3 RP15R
1 8 2 7 3 6 4 5
RP9 RP15R
1 8 2 7 3 6 4 5
RP11 RP15R
1 8 2 7 3 6 4 5
RP17 RP15R
1 8 2 7 3 6 4 5
RP19 RP15R
1 8 2 7 3 6 4 5
4 5 3 6 2 7 1 8 1 8 2 7 3 6 4 5
RP33
1 8
RP15R
2 7 3 6 4 5
RP35
1 8
RP15R
2 7 3 6
4 5
R17 12 R18 12 R9 12 R10 12 R13 12 R14 12 R5 12 R6 12 R21 12 R22 12
RP27 RP15R
B
RP42
A_SD4_0 A_SD4_4 A_SD4_1 A_SD4_5 A_SD4_2 R_A_SD4_2 A_SD4_6 A_SD4_3 A_SD4_7 A_SD5_5 A_SD5_1 A_SD5_4 A_SD5_0 A_SD5_6 A_SD5_7 A_SD5_2 A_SD5_3 A_SD6_4 A_SD6_5 A_SD6_1 A_SD6_0 A_SD6_3 A_SD6_7 A_SD6_6 A_SD6_2 A_SD7_0 A_SD7_1 A_SD7_5 A_SD7_4 A_SD7_7 A_SD7_3 A_SD7_2 A_SD7_6 R_A_DQS4_0 R_A_DQS4_1 R_A_DQS5_0 R_A_DQS5_1 R_A_DQS7_0 R_A_DQS7_1 R_A_DQS6_0 R_A_DQS6_1
RP50
RP52 RP15R
RP58 RP15R
RP60 RP15R
RP66 RP15R
RP68 RP15R
RP44
4 5 3 6 2 7
RP15R
1 8 4 5 3 6 2 7 1 8
RP15R
1 8 2 7
RP15R
3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5
R29 12 R30 12 R33 12 R34 12 R37 12 R38 12 R41 12 R42 12
R_A_SD4_0 R_A_SD4_4 R_A_SD4_1 R_A_SD4_5
R_A_SD4_6 R_A_SD4_3 R_A_SD4_7 R_A_SD5_5 R_A_SD5_1 R_A_SD5_4 R_A_SD5_0 R_A_SD5_6 R_A_SD5_7 R_A_SD5_2 R_A_SD5_3 R_A_SD6_4 R_A_SD6_5 R_A_SD6_1 R_A_SD6_0 R_A_SD6_3 R_A_SD6_7 R_A_SD6_6 R_A_SD6_2 R_A_SD7_0 R_A_SD7_1 R_A_SD7_5 R_A_SD7_4 R_A_SD7_7 R_A_SD7_3 R_A_SD7_2 R_A_SD7_6 A_DQS4_0 A_DQS4_1 A_DQS5_0 A_DQS5_1 A_DQS7_0
A_DQS7_1
A_DQS6_0 A_DQS6_1
C
RP5
RP15R RP7
RP15R
RP15R
RP15R
RP15R
RP31
RP15R
RP15R
R_B_SD1_5
18
R_B_SD1_1
27
R_B_SD1_4
36
R_B_SD1_0
45
R_B_SD1_3
18
R_B_SD1_2
27
R_B_SD1_7
36
R_B_SD1_6
45
R_B_SD0_1
18
R_B_SD0_5
27 36
R_B_SD0_0
45
R_B_SD0_2
45
R_B_SD0_6
36
R_B_SD0_7
27
R_B_SD0_3
18
R_B_SD2_5
18
R_B_SD2_1
27
R_B_SD2_0
36
R_B_SD2_4
45
R_B_SD2_7
18
R_B_SD2_3
27
R_B_SD2_6
36
R_B_SD2_2
45
R_B_SD3_0
45
R_B_SD3_4B_SD3_4
36
R_B_SD3_1
27
R_B_SD3_5
18
R_B_SD3_7
18
R_B_SD3_3
27
R_B_SD3_6
36
R_B_SD3_2
45
R_B_SD8_1
18
R_B_SD8_0
27
R_B_SD8_5
36
R_B_SD8_4
45
R_B_SD8_7
18 27
R_B_SD8_6
36
R_B_SD8_2
45
B_DQS2_0 B_DQS2_1 B_DQS1_0 B_DQS1_1 B_DQS0_0 B_DQS0_1 B_DQS3_0 B_DQS3_1
B_DQS8_0 B_DQS8_1
B_SD1_5 B_SD1_1 B_SD1_4 B_SD1_0 B_SD1_3 B_SD1_2 B_SD1_7 B_SD1_6
RP13
B_SD0_1 B_SD0_5 B_SD0_4 R_B_SD0_4 B_SD0_0
RP15 RP15R
B_SD0_2 B_SD0_6 B_SD0_7 B_SD0_3
RP21
B_SD2_5 B_SD2_1 B_SD2_0 B_SD2_4
RP23
B_SD2_7 B_SD2_3 B_SD2_6 B_SD2_2
RP29 RP15R
B_SD3_0
B_SD3_1 B_SD3_5 B_SD3_7 B_SD3_3 B_SD3_6 B_SD3_2
RP74
B_SD8_1 B_SD8_0 B_SD8_5 B_SD8_4 B_SD8_7 B_SD8_3 R_B_SD8_3 B_SD8_6 B_SD8_2 R_B_DQS2_0 R_B_DQS2_1 R_B_DQS1_0 R_B_DQS1_1 R_B_DQS0_0 R_B_DQS0_1 R_B_DQS3_0 R_B_DQS3_1 R_B_DQS8_0 R_B_DQS8_1
RP76
R15 12 R16 12 R7 12 R8 12 R11 12 R12 12 R19 12 R20 12 R46 12 R47 12
RP15R
D
B_SD4_0
RP46
B_SD4_4
RP15R
B_SD4_1
RP48
B_SD4_2
RP15R
B_SD4_6 B_SD4_7 B_SD4_3
RP54
B_SD6_0
RP15R
B_SD6_4 B_SD6_1 B_SD6_5
RP56
B_SD6_6
RP15R
B_SD6_2 B_SD6_7 B_SD6_3
RP62
B_SD7_4
RP15R
B_SD7_0 B_SD7_5 B_SD7_1
RP64
B_SD7_6
RP15R
B_SD7_2
B_SD7_7
RP70
B_SD5_1 B_SD5_5 B_SD5_4 B_SD5_0 B_SD5_7 B_SD5_6 B_SD5_3 B_SD5_2 R_B_DQS4_0 R_B_DQS4_1 R_B_DQS5_0 R_B_DQS5_1 R_B_DQS7_0 R_B_DQS7_1 R_B_DQS6_0 R_B_DQS6_1
RP72
RP15R
R31 12
RP15R R32 12 R35 12 R36 12 R39 12 R40 12 R43 12 R44 12
E
R_B_SD4_0
45
R_B_SD4_4
36
R_B_SD4_5B_SD4_5
27
R_B_SD4_1
18
R_B_SD4_2
45
R_B_SD4_6
36
R_B_SD4_7
27
R_B_SD4_3
18
R_B_SD5_0
45
R_B_SD5_4
36
R_B_SD5_1
27
R_B_SD5_5
18
R_B_SD5_6
45
R_B_SD5_2
36
R_B_SD5_7
27
R_B_SD5_3
18
R_B_SD7_4
45
R_B_SD7_0
36
R_B_SD7_5
27
R_B_SD7_1
18
R_B_SD7_6
45
R_B_SD7_2
36
R_B_SD7_3B_SD7_3
27
R_B_SD7_7
18
R_B_SD6_1
18
R_B_SD6_5
27
R_B_SD6_4
36
R_B_SD6_0
45
R_B_SD6_7
18
R_B_SD6_6
27
R_B_SD6_3
36
R_B_SD6_2
45
B_DQS4_0 B_DQS4_1 B_DQS6_0 B_DQS6_1 B_DQS7_0 B_DQS7_1 B_DQS5_0 B_DQS5_1
A_VTT
B_SD0_[0..7]18,19,21 B_SD1_[0..7]18,19,21 B_SD2_[0..7]18,19,21 B_SD3_[0..7]18,19,21 B_SD4_[0..7]18,19,21 B_SD5_[0..7]18,19,21 B_SD6_[0..7]18,19,21 B_SD7_[0..7]18,19,21
2 2
1 1
A
B_SD8_[0..7]18,19,21
B_DQS0_[0..1]18,19,21 B_DQS1_[0..1]18,19,21 B_DQS2_[0..1]18,19,21 B_DQS3_[0..1]18,19,21 B_DQS4_[0..1]18,19,21 B_DQS5_[0..1]18,19,21 B_DQS6_[0..1]18,19,21 B_DQS7_[0..1]18,19,21 B_DQS8_[0..1]18,19,21
A_SD0_[0..7]16,17,21 A_SD1_[0..7]16,17,21 A_SD2_[0..7]16,17,21 A_SD3_[0..7]16,17,21 A_SD4_[0..7]16,17,21 A_SD5_[0..7]16,17,21 A_SD6_[0..7]16,17,21 A_SD7_[0..7]16,17,21 A_SD8_[0..7]16,17,21
A_DQS0_[0..1]16,17,21 A_DQS1_[0..1]16,17,21 A_DQS2_[0..1]16,17,21 A_DQS3_[0..1]16,17,21 A_DQS4_[0..1]16,17,21 A_DQS5_[0..1]16,17,21 A_DQS6_[0..1]16,17,21 A_DQS7_[0..1]16,17,21 A_DQS8_[0..1]16,17,21
MA[0..14]13,16,17,18,19
A_CKE13,16,17 B_CKE13,18,19
WE#13,16,17,18,19 RAS#13,16,17,18,19 CAS#13,16,17,18,19
B
R_B_SD0_[0..7]13 R_B_SD1_[0..7]13 R_B_SD2_[0..7]13 R_B_SD3_[0..7]13 R_B_SD4_[0..7]13 R_B_SD5_[0..7]13 R_B_SD6_[0..7]13 R_B_SD7_[0..7]13 R_B_SD8_[0..7]13
R_B_DQS0_[0..1]13 R_B_DQS1_[0..1]13 R_B_DQS2_[0..1]13 R_B_DQS3_[0..1]13 R_B_DQS4_[0..1]13 R_B_DQS5_[0..1]13 R_B_DQS6_[0..1]13 R_B_DQS7_[0..1]13 R_B_DQS8_[0..1]13
R_A_SD0_[0..7]13 R_A_SD1_[0..7]13 R_A_SD2_[0..7]13 R_A_SD3_[0..7]13 R_A_SD4_[0..7]13 R_A_SD5_[0..7]13 R_A_SD6_[0..7]13 R_A_SD7_[0..7]13 R_A_SD8_[0..7]13
R_A_DQS0_[0..1]13 R_A_DQS1_[0..1]13 R_A_DQS2_[0..1]13 R_A_DQS3_[0..1]13 R_A_DQS4_[0..1]13 R_A_DQS5_[0..1]13 R_A_DQS6_[0..1]13 R_A_DQS7_[0..1]13 R_A_DQS8_[0..1]13
Title
Document Number
C
D
RP200 RP47R
CAS# WE# RAS# MA13
MA6 MA4 MA3 MA2 MA5 MA8 MA7 MA9 A_CKE B_CKE MA12 MA11 MA14 MA10 MA0 MA1
1 8 2 7 3 6 4 5
RP226 RP47R
1 8 2 7 3 6 4 5
RP228 RP47R
1 8 2 7 3 6 4 5
RP230 RP47R
1 8 2 7 3 6 4 5
RP232 RP47R
1 8 2 7 3 6 4 5
Micro Star Restricted Secret
MEMORY_TERMINATIONS-1
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Last Revision Date:
Monday, August 20, 2001
Sheet
20 75
E
Rev
0A
of
Page 22
A
B
C
D
E
A_VTT
A_SD0_3
RP2 RP22R
A_SD0_7
4 4
3 3
2 2
A_SD0_2 A_SD0_6 A_SD0_1 A_SD0_5 A_SD0_4 A_SD0_0 A_SD1_6 A_SD1_7 A_SD1_2 A_SD1_3 A_SD1_5 A_SD1_4 A_SD1_1 A_SD1_0 B_SD2_5 A_SD2_5 B_SD2_1 B_SD2_0 A_SD2_6 B_SD2_2 A_SD2_2 B_SD2_6 A_SD2_3 A_SD3_3 A_SD3_7 B_SD3_3 A_SD3_2 B_SD3_6 A_SD3_6 A_SD3_5 A_SD3_4 B_SD3_0 A_SD3_0 A_SD4_5 A_SD4_1 A_SD4_4 A_SD4_0 A_SD4_3 A_SD4_7 A_SD4_6 A_SD4_2 A_SD5_1 A_SD5_5 A_SD5_0 A_SD5_4 A_SD5_7 A_SD5_3 A_SD5_6 A_SD5_2 A_SD6_3 A_SD6_7 A_SD6_2 A_SD6_6 A_SD6_1 A_SD6_5 A_SD6_4 A_SD6_0 A_SD7_1 A_SD7_0 A_SD7_5 A_SD7_4 A_SD7_3 A_SD7_2 A_SD7_7 A_SD7_6 A_SD8_2 A_SD8_6 B_SD8_6 B_SD8_2 A_SD8_7 A_SD8_3 B_SD8_7 B_SD8_3
1 8 2 7 3 6 4 5
RP4 RP22R
1 8 2 7 3 6 4 5
RP6 RP22R
1 8 2 7 3 6 4 5
RP8 RP22R
1 8 2 7 3 6 4 5
RP10 RP22R
1 8 2 7 3 6 4 5
RP12 RP22R
1 8 2 7 3 6 4 5
RP14 RP22R
1 8 2 7 3 6 4 5
RP16 RP22R
1 8 2 7 3 6 4 5
RP18 RP22R
1 8 2 7 3 6 4 5
RP20 RP22R
1 8 2 7 3 6 4 5
RP22 RP22R
1 8 2 7 3 6 4 5
RP24 RP22R
1 8 2 7 3 6 4 5
RP26 RP22R
1 8 2 7 3 6 4 5
RP28 RP22R
1 8 2 7 3 6 4 5
RP30 RP22R
1 8 2 7 3 6 4 5
RP32 RP22R
1 8 2 7 3 6 4 5
RP34 RP22R
1 8 2 7 3 6 4 5
RP36 RP22R
1 8 2 7 3 6 4 5
B_SD0_2 B_SD0_6 B_SD0_7 B_SD0_3 B_SD0_0 B_SD0_4 B_SD0_5 B_SD0_1 B_SD1_2 B_SD1_7 B_SD1_6 A_SD2_4 B_SD1_0 B_SD1_4 B_SD1_1 B_SD1_5 B_SD2_4 A_SD2_1 A_SD2_0 B_SD1_3 B_SD2_7 B_SD2_3 A_SD2_7
B_SD3_7 B_SD3_2
A_SD3_1 B_SD3_4 B_SD3_1 B_SD3_5 B_SD4_0 B_SD4_4 B_SD4_1 B_SD4_5 B_SD4_2 B_SD4_6 B_SD4_7 B_SD4_3 B_SD5_4 B_SD5_0 B_SD5_5 B_SD5_1 B_SD5_2 B_SD5_3 B_SD5_6 B_SD5_7 B_SD6_0 B_SD6_1 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_2 B_SD6_7 B_SD6_3 B_SD7_6 B_SD7_7 B_SD7_2 B_SD7_3 B_SD7_4 B_SD7_5 B_SD7_0 B_SD7_1 B_SD8_0 A_SD8_0 B_SD8_1 A_SD8_1 A_SD8_5 B_SD8_5 A_SD8_4 B_SD8_4
RP43 RP22R
1 8 2 7 3 6 4 5
RP45 RP22R
1 8 2 7 3 6 4 5
RP47 RP22R
1 8 2 7 3 6 4 5
RP49 RP22R
1 8 2 7 3 6 4 5
RP51 RP22R
1 8 2 7 3 6 4 5
RP53 RP22R
1 8 2 7 3 6 4 5
RP55 RP22R
1 8 2 7 3 6 4 5
RP57 RP22R
1 8 2 7 3 6 4 5
RP59 RP22R
1 8 2 7 3 6 4 5
RP61 RP22R
1 8 2 7 3 6 4 5
RP63 RP22R
1 8 2 7 3 6 4 5
RP65 RP22R
1 8 2 7 3 6 4 5
RP67 RP22R
1 8 2 7 3 6 4 5
RP69 RP22R
1 8 2 7 3 6 4 5
RP71 RP22R
1 8 2 7 3 6 4 5
RP73 RP22R
1 8 2 7 3 6 4 5
RP75 RP22R
1 8 2 7 3 6 4 5
RP77 RP22R
1 8 2 7 3 6 4 5
A_VTT
C364 0.1uF
C366 0.1uF
C368 0.1uF
C370 0.1uF
C372 0.1uF
C374 0.1uF
C376 0.1uF
C378 0.1uF
C380 0.1uF
C382 0.1uF
C384 0.1uF
C386 0.1uF
C388 0.1uF
C390 0.1uF
C392 0.1uF
C394 0.1uF
C396 0.1uF
C398 0.1uF
C400 0.1uF
C402 0.1uF
A_VTT
C1723 0.1uF
C1724 0.1uF
C1725 0.1uF
C1726 0.1uF
C1727 0.1uF
C1728 0.1uF
C1729 0.1uF
C1730 0.1uF
C1731 0.1uF
C1732 0.1uF
C1733 0.1uF
C1734 0.1uF
C1735 0.1uF
C1736 0.1uF
C1737 0.1uF
C1738 0.1uF
A_SD0_[0..7]16,17,20 A_SD1_[0..7]16,17,20 A_SD2_[0..7]16,17,20 A_SD3_[0..7]16,17,20 A_SD4_[0..7]16,17,20 A_SD5_[0..7]16,17,20 A_SD6_[0..7]16,17,20 A_SD7_[0..7]16,17,20 A_SD8_[0..7]16,17,20
A_DQS0_[0..1]16,17,20 A_DQS1_[0..1]16,17,20 A_DQS2_[0..1]16,17,20 A_DQS3_[0..1]16,17,20 A_DQS4_[0..1]16,17,20 A_DQS5_[0..1]16,17,20 A_DQS6_[0..1]16,17,20 A_DQS7_[0..1]16,17,20 A_DQS8_[0..1]16,17,20
B_SD0_[0..7]18,19,20 B_SD1_[0..7]18,19,20 B_SD2_[0..7]18,19,20 B_SD3_[0..7]18,19,20 B_SD4_[0..7]18,19,20 B_SD5_[0..7]18,19,20 B_SD6_[0..7]18,19,20 B_SD7_[0..7]18,19,20 B_SD8_[0..7]18,19,20
B_DQS0_[0..1]18,19,20 B_DQS1_[0..1]18,19,20 B_DQS2_[0..1]18,19,20 B_DQS3_[0..1]18,19,20 B_DQS4_[0..1]18,19,20 B_DQS5_[0..1]18,19,20 B_DQS6_[0..1]18,19,20 B_DQS7_[0..1]18,19,20 B_DQS8_[0..1]18,19,20
R194 22
A_DQS0_1
R195 22
A_DQS0_0
R196 22
A_DQS1_1
R197 22
A_DQS1_0
R198 22 R199 22
A_DQS2_1
R200 22
A_DQS3_0
R201 22
A_DQS3_1
R202 22
A_DQS4_0
R203 22
A_DQS4_1
R204 22
A_DQS5_0
R205 22
1 1
A
R206 22 R207 22 R208 22 R209 22 R210 22 R211 22
A_DQS5_1
A_DQS6_0
A_DQS6_1
A_DQS7_0
A_DQS7_1
A_DQS8_0
A_DQS8_1
B
R212 22 R213 22 R214 22 R215 22 R216 22 R217 22 R218 22 R219 22 R220 22 R221 22 R222 22 R223 22 R224 22 R225 22 R226 22 R227 22
R228 22
R229 22
B_DQS0_0 B_DQS0_1 B_DQS1_0 B_DQS1_1 A_DQS2_0B_DQS2_0 B_DQS2_1 B_DQS3_1 B_DQS3_0 B_DQS4_1 B_DQS4_0 B_DQS5_0 B_DQS5_1 B_DQS6_0 B_DQS6_1 B_DQS7_0 B_DQS7_1 B_DQS8_0 B_DQS8_1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
C
D
http://www.msi.com.tw
MEMORY_TERMINATIONS-2
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
21 75
Rev
0A
Page 23
A
SYN_XTAL_X1
SYN_XTAL_X2
C2218
FB_11_OHM_100Mhz
L37
1 2
4.7uF/10V/20%
FB_11_OHM_100MHz
L38
1 2
0.1uF
C1049
0.01uF
Y8
14.318MHZ
10P
C1044
C2219
USBCLK48M49 SIOCLK48M58
C1043
+
4.7uF/10V/20%
10P
C1045
REF_CLK_33MHZ23
RSB_CLK_14MHZ50
C1035
0.1uF
+
HWM_14.318M48
R979
475_1%
C1036
0.1uF
C1046
0.0033uF
4 4
3 3
VCC3
C1034
+
4.7uF/10V/20%
VCC3
C1048
4.7uF/10V/20%
C1042
0.01uF
+
B
RSB_CLK_14MHZ R_REFCLK_14
C1037
C1038
0.0033uF
0.00039uF
C1047
0.00039uF
USBCLK48M
VCC3
C1039
0.1uF
C1040
0.1uF
R2099
R967 22
R971 22
R975 22 R976 22
R985 10K
CLK_SYNTH_VDD1
C1041
0.1uF
CLK_SYNTH_VDD2
22
SYN_XTAL_X1 SYN_XTAL_X2
R_REF_CLK_33
SEL
R_USBCLK R_SIOCLK
MULT_SEL_0 MULT_SEL_1
SPREAD#
C
OPEN: 133MHz SHORT: 100MHz
R964
1K
U134
22
XTALI
23
XTALO
1
CLK33
48
SEL100/133
19
REFCLK
26
IREF
3
48MHZ/SELA
4
48MHZ_/SELB
30
MULTSEL0
29
MULTSEL1
20
SPREAD#
44
PWRDN#
2
VDD
6
VDD
12
VDD
18
VDD
24
VDD
31
VDD
37
VDD
43
VDD
25
VDDA
46
VDDA
SYSTEM_CLOCK_GENERATOR_CDC950
HCLK0
HCLK0_bar
HCLK1
HCLK1_bar
HCLK2
HCLK2_bar
HCLK3
HCLK3_bar
HCLK4
HCLK4_bar
HCLK5
HCLK5_bar
HCLK6
HCLK6_bar
HCLK7
HCLK7_bar
GNDA GNDAVSS
VCC3
JP12
1 2
DEFAULT - CLOSE
HCLKITPRP
7
HCLKITPRN
8
HCLKR2P
10
HCLKR2N
11
HCLKR3P
13
HCLKR3N
14
16 17
HCLKCMICRP
42
HCLKCMICRN
41
HCLKR1P
39
HCLKR1N
38
DIMMPLLRP
36
DIMMPLLRN
35
33 32
5
GND
9
GND
15
GND
28
GND
34
GND
40
GND
47
GND
27 4521
R963 10K
SEL
R965 22 R966 22
R968 22 R969 22
R970 22 R972 22
R977 22 R978 22
R982 22 R983 22
R984 22 R986 22
D
PROBE_HDR_CLK_P PROBE_HDR_CLK_N
R99149.9_1%
R124849.9_1%
R124749.9_1%
R99249.9_1%
R99349.9_1%
R99449.9_1%
R99549.9_1%
R99649.9_1%
R99749.9_1%
R99849.9_1%
R99949.9_1%
R100049.9_1%
E
CLK_100M_ITP0 9 CLK_100M_ITP1 9
HCLK2 5 HCLK2_N 5
HCLK_CMIC 11 HCLK_CMIC_N 11
HCLK1 3 HCLK1_N 3
DIMM_PLL_P 24 DIMM_PLL_N 24
2 2
PROBE_HDR_CLK_P PROBE_HDR_CLK_N
VCC3
R1001
J35
R1003 1K
2 1
HDR_1X2
DEFAULT - OPEN
1 1
10K
SPREAD#
VCC3
RES_NOPOP
R1002
R1004 10K
R_USBCLK
R_SIOCLK
MULT_SEL_0
MULT_SEL_1
R1249 1K
R1250 1K
R1252 1K
R1253
RES_NOPOP
For Test Probe Only
DO NOT STUFF
A
B
C
D
JP26
1 2
Title
Document Number
Micro Star Restricted Secret
CLK_SYNTHESIZER
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Last Revision Date:
Monday, August 20, 2001
Sheet
22 75
E
Rev
0A
of
Page 24
A
4 4
B
C
D
E
DO NO STUFF
C1028
0.1uF
R951 0_OHM
VCC3
CAP_NOPOP C1031
FB_PCICLK33_BUFF
R1246 4.7K
RES_NOPOP
C1021
0.1uF
B
R962
REF_CLK_33MHZ22
+
80 OHM
FB_11_OHM_100MHz
L35
1 2
C1017
C1023
0.1uF
0.01uF
A
C1018
+
4.7uF/10V/20%
C1019
0.0033uF
VDD_PCICLK_BUFF_5
C1020
0.00039uF
VCC3
3 3
C1022
4.7uF/10V/20%
2 2
1 1
RESERVE C BYPASS ?
U132
24
CLK
13
FBIN
2
VCC
10
VCC
14
VCC
22
VCC
1
AGND
23
AVCC
6
GND
7
GND
18
GND
19
GND
11
G
FBOUT
IDT2510C
PCICLK_CIOB1R
3
Y0
PCICLK_CIOB2R
4
Y1
PCICLK_IRQ1R
5
Y2
PCICLK_VGA
8
Y3
R_PCICLK_ETHER2
9
Y4
D_PCICLKR1
15
Y5
PCICLK_IRQ0R
16
Y6
D_PCICLKR2
17
Y7
LPC_CLK_SIO_R
20
Y8
PCICLK_RSBR
21
Y9
12
R1349 22
C
R948 33
R949 33
R950 33
R952 33
R953 33
R961 33
R956 33
R2601 33
R960 33
R959 33
FB_PCICLK33_BUFF
PCICLK_CIOB1 27
PCICLK_CIOB2 37
PCICLK_IRQ1 50
PCICLK_VGA 52
PCICLK_ETHER2 55
D_PCICLK1 51
PCICLK_IRQ0 50
D_PCICLK2 51
LPC_CLK_SIO 58
PCICLK_RSB 49
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
PCICLK_BUFFER
Last Revision Date:
Sheet
Monday, August 20, 2001
E
of
23 75
Rev
0A
Page 25
A
B
C
D
E
4 4
DIMM_PLL_P22
DIMM_PLL_N22
FBOUT0_P25 FBOUT0_N25
VCC25
FB16
1 2
80S/0805
FB17
1 2
80S/0805
+
C1001
3 3
4.7uF/10V/20%
2 2
C1002
0.1uF
0.00039uF
C1277
MEM_CLK_PLL_VDD1
MEM_CLK_PLL_VDD2
C1278
0.1uF
C1003
4.7uF/10V/20%
MEMB_SDA16,17,19,69 MEMB_SCL16,17,19,69
C999
C1000
0.0033uF
0.1uF
C1004
0.0033uF
VCC3
C1279
0.1uF
C1005
0.00039uF
+
VCC3
C1006
0.1uF
CLK0_P & N - DIMM1 CLK1_P & N - DIMM2 CLK2_P & N - DIMM3 CLK3_P & N - DIMM4 CLK4_P & N - DIMM5 CLK5_P & N - DIMM6 CLK6_P & N - DIMM7 CLK7_P & N - DIMM8
R913 120_1%
C1007
0.1uF
FBOUT0_P
FBOUT0_N
U130
13
CLKIN_P
14
CLKIN_N
35
FBIN_P
36
FBIN_N
37
SDA
12
SCK
15
VDD_I2C
16
AVCC
17
AGND
4
VDDQ
11
VDDQ
21
VDDQ
28
VDDQ
34
VDDQ
38
VDDQ
45
VDDQ
1
GND
7
GND
8
GND
18
GND
24
GND
25
GND
31
GND
41
GND
42
GND
48
GND
RCC_SPLL_CDCV850
CLK0_P CLK0_N
CLK1_P CLK1_N
CLK2_P CLK2_N
CLK3_N CLK3_P
CLK4_P CLK4_N
CLK5_P CLK5_N
CLK6_P CLK6_N
CLK7_P CLK7_N
CLK8_P CLK8_N
CLK9_P CLK9_N
FBOUT_P FBOUT_N
RESERVE R FILTER!?
3 2
5 6
10 9
19 20
22 23
46 47
44 43
39 40
29 30
27 26
R_FBOUT0_PR FBOUT0_PR
33 32
R927 0_OHM R928 0_OHM
HDR_CLK_N
HDR_CLK_P
HDR_CLK_P HDR_CLK_N
FBOUT0_NRR_FBOUT0_NR
JP10
1 2
Header for Logic Analyzer clock
CLK7_P 19 CLK7_N 19
CLK6_P 19 CLK6_N 19
CLK1_P 16 CLK1_N 16
CLK0_N 16 CLK0_P 16
CLK4_P 18 CLK4_N 18
CLK3_P 17 CLK3_N 17
CLK2_P 17 CLK2_N 17
CLK5_P 18 CLK5_N 18
FBOUT0_PR 25 FBOUT0_NR 25
TO DIMMs
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
SDRAM_CLK_BUFFER
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
24 75
Rev
0A
Page 26
A
B
C
D
E
4 4
CENTRE PATH TO BE SAME LENGTH AS DIMCLK
R2629 0
0 ohm instead of R_DLY1
T_IMB_CLK_TR12 T_IMB_CLK_T 46,50
T_IMB_CLK_RR50 T_IMB_CLK_R 12,46
3 3
A_IMB_CLK_R_N_R27 A_IMB_CLK_R_N 12
A_IMB_CLK_T_P_R12
R2630 0
0 ohm instead of R_DLY2
R2631 0
0 ohm instead of R_DLY3
R2632 0
0 ohm instead of R_DLY4
R2633 0
0 ohm instead of R_DLY5
R2634 0
0 ohm instead of R_DLY6
R2635 0
0 ohm instead of R_DLY7
R2636 0
0 ohm instead of R_DLY8
2 2
R2637 0
0 ohm instead of R_DLY9
R2638 0
0 ohm instead of R_DLY10
R860 0_OHM R869 0_OHM R870 0_OHMR859 0_OHM
A_IMB_CLK_T_N 27A_IMB_CLK_T_N_R12
A_IMB_CLK_R_P 12A_IMB_CLK_R_P_R27
A_IMB_CLK_T_P 27
B_IMB_CLK_R_P 12B_IMB_CLK_R_P_R37
B_IMB_CLK_T_P 37B_IMB_CLK_T_P_R12
B_IMB_CLK_R_N 12B_IMB_CLK_R_N_R37
B_IMB_CLK_T_N 37B_IMB_CLK_T_N_R12
FBOUT0_P 24FBOUT0_PR24
FBOUT0_NR FBOUT0NL2 FBOUT0_NFBOUT0_PR FBOUT0PL2
CENTRE PATH TO BE SAME LENGTH AS DIMCLK
FBOUT0_N 24FBOUT0_NR24
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
SDRAM_&_IMB_CLK_DELAY_LOOPS
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
25 75
Rev
0A
Page 27
A
P1_AD[0..63]29
4 4
3 3
2 2
P1_PCIXCAP29
TP13
1
1 1
JP8
JP9
ON : Force PCI Only Mode
R808 5.1K
S1_PCIXCAP
12
12
A
P1_AD0 P1_AD1 P1_AD2 P1_AD3 P1_AD4 P1_AD5 P1_AD6 P1_AD7 P1_AD8 P1_AD9 P1_AD10 P1_AD11 P1_AD12 P1_AD13 P1_AD14 P1_AD15 P1_AD16 P1_AD17 P1_AD18 P1_AD19 P1_AD20 P1_AD21 P1_AD22 P1_AD23 P1_AD24 P1_AD25 P1_AD26 P1_AD27 P1_AD28 P1_AD29 P1_AD30 P1_AD31 P1_AD32 P1_AD33 P1_AD34 P1_AD35 P1_AD36 P1_AD37 P1_AD38 P1_AD39 P1_AD40 P1_AD41 P1_AD42 P1_AD43 P1_AD44 P1_AD45 P1_AD46 P1_AD47 P1_AD48 P1_AD49 P1_AD50 P1_AD51 P1_AD52 P1_AD53 P1_AD54 P1_AD55 P1_AD56 P1_AD57 P1_AD58 P1_AD59 P1_AD60 P1_AD61 P1_AD62 P1_AD63
VCC3
R811 2KR819 10K
R809 5.1K
R818 2K R810 10K
U127A
N23
P_AD0
R25
P_AD1
N25
P_AD2
U22
P_AD3
M22
P_AD4
P24
P_AD5
K21
P_AD6
R22
P_AD7
P22
P_AD8
L22
P_AD9
N22
P_AD10
J22
P_AD11
M24
P_AD12
J25
P_AD13
M25
P_AD14
H22
P_AD15
E23
P_AD16
F24
P_AD17
D24
P_AD18
F25
P_AD19
C25
P_AD20
G21
P_AD21
B25
P_AD22
E22
P_AD23
A23
P_AD24
C24
P_AD25
A24
P_AD26
D23
P_AD27
B23
P_AD28
C22
P_AD29
A21
P_AD30
A22
P_AD31
T21
P_AD32
W21
P_AD33
T22
P_AD34
U25
P_AD35
P25
P_AD36
W22
P_AD37
R23
P_AD38
W23
P_AD39
U23
P_AD40
W25
P_AD41
T25
P_AD42
AA22
P_AD43
V22
P_AD44
AA23
P_AD45
V24
P_AD46
AA25
P_AD47
V25
P_AD48
AB20
P_AD49
Y22
P_AD50
AC24
P_AD51
Y24
P_AD52
AC25
P_AD53
Y25
P_AD54
AC21
P_AD55
AB23
P_AD56
AE24
P_AD57
AB24
P_AD58
AD22
P_AD59
AB25
P_AD60
AE23
P_AD61
AB21
P_AD62
AE22
P_AD63
CIOBX2
VCC
U129
3
Vin
12
GND
6
2N
7
2P
4
1N
5
1P
8
3N
9
3P
10
4N
11
4P
LM339A
2Y
1Y
3Y
4Y
B
P_GNT#0 P_GNT#1 P_GNT#2 P_GNT#3 P_GNT#4 P_GNT#5 P_GNT#6
P_REQ#0 P_REQ#1 P_REQ#2 P_REQ#3 P_REQ#4 P_REQ#5 P_REQ#6
P_CBE#0 P_CBE#1 P_CBE#2 P_CBE#3 P_CBE#4 P_CBE#5 P_CBE#6 P_CBE#7
P_FRAME#
P_DEVSEL#
P_IRDY#
P_TRDY#
P_STOP# P_SERR# P_PERR#
P_REQ64#
P_PAR64
P_ACK64#
P_LOCK#
P_M66EN
P_PCIRST#
P_PCICAP1 P_PCICAP2
1
2
14
13
B
P_PAR
P_SOR#
P_SIL#
P_SOD
P1_PCIXCAP2
P1_PCIXCAP1
S1_PCIXCAP2
S1_PCIXCAP1
C
P1_GNT#0
D21
P1_GNT#1
B18
P1_GNT#2
A17
P1_GNT#3
A16
P1_GNT#4
A15
P1_GNT#5
B14
P1_GNT#6
A14
P1_REQ#0
B20 A20 A19 C19 B22 A18 D20
L25 L23 H24 D25 AE21 AD25 AD20 AD23
E25 K22 H25 F22 G23 G22 K24 K25
N21 AC22 T24 J23
D16 C15 C17 D19
D18
C21 E19
P1_REQ#1 P1_REQ#2 P1_REQ#3 P1_REQ#4 P1_REQ#5 P1_REQ#6
P1_REQ#0 29 P1_REQ#1 29 P1_REQ#2 29 P1_REQ#3 29 P1_REQ#4 29 P1_REQ#5 29 P1_REQ#6 29
P1_CBE#0 P1_CBE#1 P1_CBE#2 P1_CBE#3 P1_CBE#4 P1_CBE#5 P1_CBE#6 P1_CBE#7
R1620 4.7K
P1_PCIXCAP/ S1_PCIXCAP
P1_CBE#[0..7] 29
P1_FRAME# 29 P1_DEVSEL# 29 P1_IRDY# 29 P1_TRDY# 29 P1_PAR 29 P1_STOP# 29 P1_SERR# 29,50 P1_PERR# 29,50
P1_REQ64# 29 P1_PAR64# 29 P1_ACK64# 29 P1_PLOCK# 29
VCC3
P1_M66EN 29
P1_PCIRST#
P1_PCIRST# 29
P1_PCIXCAP1 P1_PCIXCAP2
P1_PCIXCAP2/
P1_GNT#5/ S1_GNT#3
S1_PCIXCAP2
S1_M66EN
Gnd 0 X 0 0 PCI - 33
Gnd 1 X 0 0 PCI - 66
P1_PCIXCAP1/ S1_PCIXCAP1
Pull Down X 0 1X PCI-X - 66
N.C. ( 1 )
N.C. ( 1 ) X 0 1 1 PCI-X - 133
X 1 1 1 PCI-X - 100
N.C. ( 1 ) - Not Connected , Logic Value = 1
C
D
VCC3 VCC3
S_GNT#0 S_GNT#1 S_GNT#2 S_GNT#3 S_GNT#4 S_GNT#5
S_REQ#0 S_REQ#1 S_REQ#2 S_REQ#3 S_REQ#4 S_REQ#5
S_CBE#0 S_CBE#1 S_CBE#2 S_CBE#3 S_CBE#4 S_CBE#5 S_CBE#6 S_CBE#7
S_FRAME#
S_DEVSEL#
S_IRDY#
S_TRDY#
S_PAR S_STOP# S_SERR# S_PERR#
S_REQ64#
S_PAR64
S_ACK64#
S_LOCK#
S_SOR#
S_SIL# S_M66EN
S_SOD
S_PCIRST#
S_PCIXCAP1 S_PCIXCAP2
4.7KR2096
X_100R2097
D12 A12 C13 B12 A13 D13
D11 D9 C11 E10 A11 D10
K4 A2 C4 A9 W4 AC1 Y1 AD1
F4 B4 A5 F2 F1 D1 B3 A3
M1 AC2 H4 E4
E13 D15 D3 B16
C9
E16 D14
S1_GNT#0 S1_GNT#1 S1_GNT#2 S1_GNT#3 S1_GNT#4 S1_GNT#5
S1_REQ#0 S1_REQ#1 S1_REQ#2 S1_REQ#3 S1_REQ#4 S1_REQ#5
S1_PLOCK#
R1619 4.7K
S1_M66EN
S1_PCIRST#
S1_PCIXCAP1 S1_PCIXCAP2
S1_PLOCK#
S1_REQ#0 30 S1_REQ#1 35 S1_REQ#2 35 S1_REQ#3 35 S1_REQ#4 35 S1_REQ#5 35
S1_FRAME# 30,35 S1_DEVSEL# 30,35 S1_IRDY# 30,35 S1_TRDY# 30,35 S1_PAR# 30,35 S1_STOP# 30,35 S1_SERR# 30,35,50 S1_PERR# 30,35,50
S1_REQ64# 30,35 S1_PAR64# 30,35 S1_ACK64# 30,35
VCC3
S1_PCIRST# 31
P1_PCIXCAP2
P1_PCIXCAP1
S1_PCIXCAP2
S1_PCIXCAP1
S1_M66EN
U127B
M2
S_AD0
G1
S_AD1
L1
S_AD2
G4
S_AD3
L4
S_AD4
E3
S_AD5
K1
S_AD6
E1
S_AD7
D2
S_AD8
K5
S_AD9
C1
S_AD10
H1
S_AD11
B1
S_AD12
H2
S_AD13
C2
S_AD14
G3
S_AD15
A4
S_AD16
B6
S_AD17
G5
S_AD18
A7
S_AD19
C5
S_AD20
D5
S_AD21
A6
S_AD22
B8
S_AD23
C7
S_AD24
D6
S_AD25
D7
S_AD26
A10
S_AD27
A8
S_AD28
E7
S_AD29
D8
S_AD30
B10
S_AD31
N5
S_AD32
J4
S_AD33
N4
S_AD34
J1
S_AD35
P4
S_AD36
J3
S_AD37
P2
S_AD38
K2
S_AD39
P1
S_AD40
L3
S_AD41
R3
S_AD42
M4
S_AD43
T2
S_AD44
N3
S_AD45
U4
S_AD46
N1
S_AD47
U1
S_AD48
R4
S_AD49
V2
S_AD50
R1
S_AD51
W3
S_AD52
T5
S_AD53
W1
S_AD54
T1
S_AD55
Y2
S_AD56
T4
S_AD57
AA1
S_AD58
U3
S_AD59
AB2
S_AD60
V1
S_AD61
AB1
S_AD62
V4
S_AD63
CIOBX2
FREQ. ( MHz )P1_M66EN/
S1_PCIRST#
P1_PCIRST#
E
4.7KR2098
S1_GNT#[0..5] 28,29,30P1_GNT#[0..6] 28,29
VCC3
R803 5.1K
R804 5.1K
R805 5.1K
R807 5.1K
R2602 4.7K
R2603 4.7K
Conv. PCI
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
CIOBX1_PCI-X
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
26 75
Rev
0A
Page 28
A
VDD_IMB
U127D
AA17
A25
A1 B21 B19 B17
4 4
B15 B13 B11
B9
B7
B5
C23
C3 E24 E21 E18 E14 E11
E8 E5 E2
G24
G2
H21
H5 J24
J2 L24 L21 L15 L14 L13 L12
3 3
L11
L5
L2
M15 M14 M13 M12 M11 N24 N15 N14 N13 N12 N11
N2 P21 P15 P14 P13 P12 P11
P5
R24
R15 R14 R13 R12 R11
2 2
R2
U24
U2 V21
V5
W24
W2
AA24 AA21 AA18 AA16 AA14 AA12 AA10
AA8 AA5
AA2 AC23 AC20
AC3 AD19 AD17
AE5
CIOBX2
1 1
AA15
GND GND GND
VDD1.5 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND
GND
GND
GND
GND
AD15
AD13
AD11
AD9
AD7
AE25
AA13
VDD1.5
GND
AE1
A
AA11
VDD1.5
VDD1.5
GND
VCC25
AA9
VDD1.5
AA7
VDD1.5
AC18
VDD1.5
AC16
VDD1.5
R787 1K
AC14
AC12
VDD1.5
AC10
VDD1.5
VDD1.5
AC8
VDD1.5
AC6
VDD1.5
AC5
TESTMODE#
G25
AE20
AE12
AB13
AC13
RSVD
RSVD
IMBCOMP1
IMBCOMP2
CIOBX2_IMB_RCOMP CIOBX2_IMB_COMP_PD CIOBX2_IMB_COMP_PU
B24
VCC3
B2
VCC3
C20
VCC3
C18
VCC3
C16
IMBCOMP0
VCC3
C14
VCC3
C12
VCC3
C10
VCC3
C8
VCC3
C6
VCC3
D22
VCC3
D4
VCC3
E20
VCC3
E17
VCC3
E15
VCC3
E12
VCC3
E9
VCC3
E6
VCC3
F23
VCC3
F21
VCC3
F5
VCC3
F3
VCC3
H23
VCC3
H3
VCC3
J21
VCC3
J5
VCC3
K23
VCC3
K3
VCC3
M23
VCC3
M21
VCC3
M5
VCC3
M3
VCC3
P23
VCC3
P3
VCC3
R21
VCC3
R5
VCC3
T23
VCC3
T3
VCC3
U21
VCC3
U5
VCC3
V23
VCC3
V3
VCC3
Y23
VCC3
Y21
VCC3
Y5
VCC3
Y3
VCC3
AA20
VCC3
AB22
VCC3
AB4
VCC3
AD24
VCC3
AD21
VCC3
AD2
VCC3
K16
VDD25
K15
VDD25
K14
VDD25
K13
VDD25
K12
VDD25
K11
VDD25
K10
VDD25
L16
VDD25
L10
VDD25
M16
VDD25
M10
VDD25
N16
VDD25
N10
VDD25
P16
VDD25
P10
VDD25
R10
VDD25
T16
VDD25
T15
VDD25
T14
VDD25
T13
VDD25
T12
VDD25
T11
VDD25
T10
VDD25
R16
VDD25
B
B
R1504 100_1%
R789 249_1%
VCC3
VCC25
R790 249_1%
A_IMB_D_T[0..15]12
A_IMB_D_R[0..15]12
C988 220pF
C991
0.1uF
C989 220pF
C992
0.1uF
VDD_IMB
R791
100_1%
R792 100_1%
VDD_IMB
C976
0.1uF
VREF_IMB_CIOB
C990
1.0uF/10V
C972
1.0uF/16V
C993
0.1uF
C
A_IMB_D_T0 A_IMB_D_T1 A_IMB_D_T2 A_IMB_D_T3 A_IMB_D_T4 A_IMB_D_T5 A_IMB_D_T6 A_IMB_D_T7 A_IMB_D_T8 A_IMB_D_T9 A_IMB_D_T10 A_IMB_D_T11 A_IMB_D_T12 A_IMB_D_T13 A_IMB_D_T14 A_IMB_D_T15
A_IMB_D_R0 A_IMB_D_R1 A_IMB_D_R2 A_IMB_D_R3 A_IMB_D_R4 A_IMB_D_R5 A_IMB_D_R6 A_IMB_D_R7 A_IMB_D_R8 A_IMB_D_R9 A_IMB_D_R10 A_IMB_D_R11 A_IMB_D_R12 A_IMB_D_R13 A_IMB_D_R14 A_IMB_D_R15
C973
1.0uF/16V
VCC3
C994
0.1uF
C
C977
0.1uF
Route AVDD as two traces, One going to each pin.
Route AGND like AVDD, each pin having its own trace Connected to GND pin of Filter Ckt.'s Cap.
D
U127C
AE19 AE18 AB17 AB19 AA19 AB18 AC19 AE17 AD18 AB15 AE13 AD14 AB16 AE15 AE14 AC15
AB11 AB12 AC11 AB10 AE10
AD10 AE11
IMBD_ R0 IMBD_ R1 IMBD_R2 IMBD_ R3 IMBD_R4 IMBD_R5 IMBD_ R6 IMBD_R7 IMBD_ R8 IMBD_R9 IMBD_ R10 IMBD_R11 IMBD_R12 IMBD_R13 IMBD_R14 IMBD_R15
IMBD_ T0 IMBD_ T1 IMBD_T2 IMBD_ T3 IMBD_T4
AE9
IMBD_ T5 IMBD_ T6 IMBD_T7
AC9
IMBD_T8
AD6
IMBD_T9
AE6
IMBD_ T10
AB9
IMBD_T11
AE7
IMBD_ T12
AB8
IMBD_ T13
AB7
IMBD_T14
AA6
IMBD_ T15
IMBCLK_R_P IMBCLK_R_N
IMBCLK_T_P
IMBCLK_T_N
IMBPAR_T
IMBPAR_R IMBCON_T IMBCON_R
AGND1 AGND2
AVDD1 AVDD2
SCLK
PCLKFB
SCLK_FB
CLKIN SCLK_O PCLK_O
PCIRST#
PLLRST
ALERT
VREFIMB0
AD16 AE16 AE8 AD8
AC7 AC17 AB6 AB14
AE3 AD4
AE4 AD5
W5
SDA
Y4
AD3 AE2 AC4
S1CLKO_R
AB3
P1CLKO_R
AA4
PCIRST1#
D17 AA3
AB5
VREF_IMB_CIOB
AD12
AVDD_CIOB1_PLL
R784 22 R786 22
R1706 0_OHM
ALERT# 11,15,37,50
A_IMB_CLK_T_P 25 A_IMB_CLK_T_N 25 A_IMB_CLK_R_P_R 25 A_IMB_CLK_R_N_R 25
A_IMB_PAR_R 12 A_IMB_PAR_T 12 A_IMB_CON_R 12 A_IMB_CON_T 12
CIOBX2
VCC25
C978
0.1uF
C979
0.1uF
C980
0.01uF
C981
0.01uF
C982
0.01uF
C983
0.01uF
+
VCC3
C984
1.0uF/16V
C985
1.0uF/16V
C986
1.0uF/16V
C987
1.0uF/16V
C1643
0.1uF
VCC25
C974
C975
+
+
C966
330uF/6.3V/NHG/PANASONIC
C998
C997
0.01uF
0.01uF
C967
330uF/6.3V/NHG/PANASONIC
+
+
C1721
C1722
330uF/6.3V/NHG/PANASONIC
D
330uF/6.3V/NHG/PANASONIC
1.0uF/16V
C995
0.01uF
1.0uF/16V
C996
0.01uF
RCC_SDA 12,15,37,41,48,69 RCC_SCL 12,15,37,41,48,69
P1FBCLK 39 S1FBCLK 39 PCICLK_CIOB1 23 S1CLKO 39 P1CLKO 39
PCIRST1# 11,37,65 PS_PWRGD# 11,37,50,64
C968
0.01uF
C1639
C1638
1.0uF/16V
270uF/4V/20mR/SP/OSCON
VDD_IMB
C1645
C1644
0.1uF
0.01uF
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
CIOBX1_IMB_PWR
C969
0.01uF
C1640
1.0uF/16V
C1646
0.01uF
VDD_IMB
Last Revision Date:
Sheet
E
VCC25
R783
0
R_AVDD_CIOB1_PLL
L33 47uH
1 2
22uF/10V C964
VCC25
C970
0.1uF
C1641
1.0uF/16V
C1647
0.01uF
Monday, August 20, 2001
of
27 75
E
C971
1.0uF/16V
C1642
1.0uF/16V
C1648
0.1uF
Rev
0A
Page 29
A
B
C
D
E
VCC3
R798
VCC3
R796 RES_NOPOP
R795 2.2K
RES_NOPOP
R799 2.2K
R793 2.2K
RES_NOPOP
4 4
Do not stuff
3 3
2 2
P1_GNT#0
R794
R797 RES_NOPOP
P1_GNT#1 P1_GNT#2 P1_GNT#3
R800 2.2K
1: APLL Enabled 0: APLL Disabled
Do not stuff
CIOB I2C Bus ID ID = 1
P1_GNT#1 26,29 P1_GNT#2 26,29 P1_GNT#3 26,29
VCC3
JP28
R1616 8.2KR1618 1K
2 1
HDR_1X2
( * )
P1_GNT#5
0 = PCI-X 133 1 = PCI-X 100
[ Refer to table on sheet #27 ]
P1_GNT#5
P1_GNT#5 26,29
P1_GNT#0 26,29
VCC3
R814
RES_NOPOP
Do not stuff
2.2K
R816
P1_GNT#6
0 = Disable Pri Hot-Plug Controller (Default)
1 = Enable Pri Hot-Plug Controller
P1_GNT#6
HDR_1X2
P1_GNT#6 26,29
VCC3
JP27
2 1
R1617 1K R1615 8.2K
S1_GNT#3
0 = PCI-X 133 1 = PCI-X 100
[ Refer to table on sheet #27 ]
S1_GNT#3
S1_GNT#3 26,29
P1_GNT#0 :
VCC3
R813
Do not stuff
S1_GNT#5
0 = Disable Sec Hot-Plug Controller (Default)
1 = Enable Sec Hot-Plug Controller
RES_NOPOP
S1_GNT#5
R815 2.2K
VCC3
R1682 2.2K
S1_GNT#1
RES_NOPOP
Do not stuff
S1_GNT#5 26,29
S1_GNT#1
1: Prim. PCI func. registers will be accessed at Func.#0 and Sec. PCI at Func.#2
0: Prim. PCI func. registers will be accessed at Func.#2 and Sec. PCI at Func.#0
S1_GNT#1 26,29
R1683
Please refer to 'CMIC STRAPPING OPTIONS' sheet for following strappings in CIOB-x1 and CIOB-x2
IMB - DETERMINISTIC/ NON
: -
DETERMINISTIC
IMB CRC or PARITY
: -
IMB_TRAINING Enable/Disable
: -
VCC3
1 1
RES_NOPOP
Do not stuff
S1_GNT#0
1: All bits of Func. # used for reg. access 0: Only bit 0 of Func. # used for reg. access
R812 2.2K
S1_GNT#0
R817
A
S1_GNT#0 26,29,30
VCC3
S1_GNT#2
IMB_READ/WRITE POINTER DLY
1 : 5 CLOCKs 0 : 6 CLOCKs
R1613 2.2K
S1_GNT#2
R1614
RES_NOPOP
B
C
( Default )
S1_GNT#2 26,29
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
CIOBX1_STRAPPING_OPTIONS
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
28 75
Rev
0A
Page 30
A
VCC VCC
PDOWN1
R685
4 4
3 3
2 2
1 1
PCIIRQ#750
PCICLK_P1_SLT139
P1_REQ#026
P1_IRDY#26
P1_DEVSEL#26
P1_PCIXCAP26
P1_PLOCK#26
P1_PERR#26,50
P1_SERR#26,50
P1_M66EN26
C825
0.01uF
P1_ACK64#26 P1_REQ64# 26
1K
PCIIRQ#7
P1_SL2_PRSNT#1
P1_SL2_PRSNT#2
PCICLK_P1_SLT1
P1_REQ#0
P1_AD31 P1_AD29
P1_AD27 P1_AD25
P1_AD23
P1_AD21 P1_AD19
P1_AD17
P1_CBE#2
P1_IRDY#
P1_DEVSEL#
P1_PCIXCAP
P1_PLOCK# P1_PERR#
P1_SERR#
P1_CBE#1
P1_AD14
P1_AD12 P1_AD10
P1_M66EN
P1_AD8
P1_AD7
P1_AD5 P1_AD3
P1_AD1
P1_ACK64#
P1_CBE#6 P1_CBE#4
P1_AD63
-12V +12V_IO
P1_AD61
P1_AD59 P1_AD57
P1_AD55 P1_AD53
P1_AD51 P1_AD49
P1_AD47 P1_AD45
P1_AD43 P1_AD41
P1_AD39 P1_AD37
P1_AD35 P1_AD33
P1_AD[0..63]26
A
B
PCI_SLOT2
J23
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
B6
A6
B7
A7
B8
A8
B9 B10 B11
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94
A9 A10 A11
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94
CONN_PCI64_3_3V_SOCKET
B
VCC3VCC3
R682 8.2K
PDOWN1
PCIIRQ#6
P1_PCIRST#
P1_GNT#0
P1_PCI_PME#
P1_AD30
P1_AD28 P1_AD26
P1_AD24 P1_IDSEL0P1_CBE#3
P1_AD22 P1_AD20
P1_AD18 P1_AD16
P1_FRAME#
P1_TRDY#
P1_STOP#
P1_SDONE P1_SBO#
P1_PAR
P1_AD15
P1_AD13 P1_AD11
P1_AD9
P1_CBE#0
P1_AD6 P1_AD4
P1_AD2 P1_AD0
P1_REQ64#
P1_CBE#7 P1_CBE#5
P1_PAR64
P1_AD62
P1_AD60 P1_AD58
P1_AD56 P1_AD54
P1_AD52 P1_AD50
P1_AD48 P1_AD46
P1_AD44 P1_AD42
P1_AD40 P1_AD38
P1_AD36 P1_AD34
P1_AD32
3VSB
P1_PCIRST# 26
P1_GNT#0 26,28
P1_PCI_PME# 58
VCC
PCIIRQ#6 50
R687
2K
P1_FRAME# 26
P1_TRDY# 26
P1_STOP# 26
P1_PAR 26
P1_PAR64# 26
P1_AD18
P1_CBE#[0..7]26
C
D
E
VCC3
4.7K
R1437
P1_M66EN
P1_REQ64#
R1702
R1703
P1_PAR64
P1_SL2_PRSNT#2 P1_SL2_PRSNT#1
RP311
VCC3
P1_REQ#026
P1_REQ#126
P1_REQ#226
P1_REQ#526 P1_REQ#326 P1_REQ#626 P1_REQ#426
P1_GNT#0 P1_GNT#1 P1_GNT#2 P1_GNT#3
P1_GNT#4
P1_GNT#5
P1_GNT#6
S1_GNT#0 S1_GNT#1 S1_GNT#2 S1_GNT#3
S1_GNT#4
S1_GNT#5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
2.7K
2.7K
2.7K
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
C2192 X_104P
1 2 3 4 5 6 7 8
R2100 4.7K
R2101 4.7K
R2102 4.7K
1 2 3 4 5 6 7 8
R2103 4.7K
R2104 4.7K
RP312
RP314
RP315
RP2K7
RP316
P1_PERR# P1_SDONE P1_PLOCK# P1_STOP#
P1_REQ#0
P1_REQ#1
P1_REQ#2
P1_REQ#5 P1_REQ#3 P1_REQ#6 P1_REQ#4
P1_DEVSEL# P1_TRDY# P1_IRDY# P1_FRAME#
P1_ACK64# P1_PAR P1_SERR# P1_SBO#
P1_PCIRST#
RN29 8P4R-4.7K
RN30 8P4R-4.7K
Micro Star Restricted Secret
CIOBX1_PCIXP1_SLOT
Last Revision Date:
Tuesday, August 21, 2001
Sheet
29 75
E
2.7K
2.7K
RP2K7
R1911
R1912
R1913
VCC3
RP2K7
18 27 36 45
RP2K7
RP2K7
VCC3
Rev
0A
of
EC57
+
1000U/6.3V
EC58
+
1000U/6.3V
VCCVCC3
EC55
+
1000U/6.3V
EC56
+
1000U/6.3V
3VSB
+
EC54 100U/16V
VCC3
0.01uF
0.01uF
C827
C832
0.01uF
0.01uF
C828
C833
0.01uF
0.01uF
C829
C834
0.01uF
0.01uF
C830
0.01uF
C835
0.01uF
C826
C831
VCC
C838
C837
P1_AD[0..63]26
P1_AD32 P1_AD34 P1_AD33 P1_AD35
P1_AD36 P1_AD37 P1_AD38 P1_AD39
P1_AD40 P1_AD42 P1_AD41 P1_AD43
P1_AD44 P1_AD45 P1_AD46 P1_AD47
P1_AD48 P1_AD50 P1_AD49 P1_AD51
P1_AD52 P1_AD53 P1_AD54 P1_AD55
P1_AD56 P1_AD57 P1_AD58 P1_AD59
P1_AD60 P1_AD61 P1_AD63 P1_AD62
P1_CBE#4 P1_CBE#5 P1_CBE#6 P1_CBE#7
RP317
1 8 2 7 3 6 4 5
RP318
1 8 2 7 3 6 4 5
RP319
1 8 2 7 3 6 4 5
RP320
1 8 2 7 3 6 4 5
RP321
1 8 2 7 3 6 4 5
RP322
1 8 2 7 3 6 4 5
RP323
1 8 2 7 3 6 4 5
RP324
1 8 2 7 3 6 4 5
RP325
1 8 2 7 3 6 4 5
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
P1_CBE#0 P1_CBE#1 P1_CBE#2 P1_CBE#3 P1_CBE#4 P1_CBE#5 P1_CBE#6 P1_CBE#7
P1_CBE#[0..7]26
C
0.01uF
C839
0.01uF
C840
0.01uF
0.01uF
VCC3
P1_GNT#[0..6]26,28
S1_GNT#[0..5]26,28,30
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
Page 31
8
7
6
5
4
3
2
1
AF10 AF14 AF19 AF22
AA22
AB17 AB18 AB21 AB22
U205C
AIC-7899W
E11
VCC1
E12
VCC2
L22
VCC3
M22
VCC4
R5
VCC5
R22
VCC6
T5
VCC7
T22
VCC8
W22
VCC9
Y22
VCC10
E15
SVCCA1
E16
SVCCA2
E19
SVCCA3
E20
SVCCA4
G22
SVCCA5
H22
SVCCA6
E7
SVCCA7
E8 G5 H5
L5
M5
C3
C23
D4
G26
A4
A16 D23 H26
K1 A1
AF2 AF7
A7
A14 C17
P1
W5
AA2 AA3 T11 T12 T13 T14 T15 T16
N5
N22
P5
P22
U5
U22
V5
V22 AA5
AB5 AB6
SVCCA8 SVCCA9 SVCCB1 SVCCB2 SVCCB3
SVCC33A SVCC33B SVCC33C SVCC33D
SVCC50A SVCC50B SVCC50C SVCC50D SVCC50E SVCC50F PVCC1 PVCC2 PVCC3 PVCC4 PVCC5 PVCC6 PVCC7 PVCC8 PVCC9
PXVCC18
VDPCI/VIO
PZV33 PZV33_A GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64 GND69 GND70 GND71 GND72
PWR/ GND
7899W
D14
VCC11
K25
VCC12
L1
VCC13
L26
VCC14
M1
VCC15
R1
VCC16
R26
VCC17
V26
VCC18
W1
VCC19
AA1
VCC20
AA26
VCC21
AF6
VCC22
AF9
VCC23
AF12
VCC24
AF15
VCC25
AF18
VCC26
AF21
VCC27
A8
AVCC18A
C13
AGNDE
C14
AGNDF
E5
GND1
E6
GND2
E9
GND3
E10
GND4
E13
GND5
E14
GND6
E17
GND7
E18
GND8
E21
GND9
E22
GND10
F5
GND11
F22
GND12
J5
GND13
J22
GND14
K5
GND15
K22
GND16
L11
GND17
L12
GND18
L13
GND19
L14
GND20
L15
GND21
L16
GND22
M11
GND23
M12
GND24
M13
GND25
M14
GND26
M15
GND27
M16
GND28
N11
GND29
N12
GND30
N13
GND31
N14
GND32
N15
GND33
N16
GND34
P11
GND35
P12
GND36
P13
GND37
P14
GND38
P15
GND39
P16
GND40
R11
GND41
R12
GND42
R13
GND43
R14
GND44
R15
GND45
R16
GND46
AB9
GND65
AB10
GND66
AB13
GND67
AB14
GND68
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
3
http://www.msi.com.tw
2
AIC 7899W/7902 1/2 (PCIXS1)
Last Revision Date:
Monday, August 20, 2001
Sheet
30 75
of
1
Rev
0A
AC17 AD17 AE17 AF17 AC18 AD18 AE18 AC19 AD19 AE19 AC20 AD20 AE20 AF20 AC21 AD21 AE21 AC22 AD22 AE22 AD23 AE23 AF23 AD24 AF24 AE24 AF26 AF25 AE26 AE25 AD26 AD25
AC10 AD10 AE10 AC11 AD11 AE11 AF11 AC12 AE12 AC13 AD13 AE13 AF13 AC14 AD14 AE14
U205B
AIC-7899W
T1
PCLK
R3
TRST
AE1
GNT
AE4
IDSEL
AB3
IRQA
AB2
IRQB
AB4
IDDQ
T4
PCI
TCK
U4
TMS
P4
TDI
AD63 AD62 AD61 AD60 AD59 AD58 AD57 AD56 AD55 AD54 AD53 AD52 AD51 AD50 AD49 AD48 AD47 AD46 AD45 AD44
MEMORY
AD43 AD42 AD41 AD40 AD39 AD38 AD37 AD36 AD35 AD34 AD33 AD32
AC2
AD31
AD2
AD30
AE2
AD29
AC3
AD28
AD3
AD27
AE3
AD26
AF3
AD25
AC4
AD24
AF4
AD23
AC5
AD22
AD5
AD21
AE5
AD20
AF5
AD19
AC6
AD18
AD6
AD17
AE6
AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
7899W
D D
S1_REQ#0
S1_GNT#0
C C
B B
A A
PCICLK_S1_SLT139
S1_GNT#026,28,29
PCIIRQ#850 PCIIRQ#950
R1961 2.7K
R1962 8.2K
VCC3
PCICLK_S1_SLT1
S1_GNT#0
PCIIRQ#8 PCIIRQ#9
VIO8VIO9 VIO7 VIO6 VIO5 VIO4 VIO3 VIO2 VIO1
PREQ
ACK64
REQ64
PAR64
FRAME
IRDY
DEVSEL
TRDY STOP PERR SERR
CBE7 CBE6 CBE5 CBE4 CBE3 CBE2 CBE1 CBE0
TERMPWRA TERMPWRB
ROMOE
SEECS
MWE RAMCS ROMCS
EXTARBREQ EXTARBACK
BRDWE
BRDOE RAMPS
MDP
MA15
MA14
MA13
MA12
MA11
MA10
SEECK
SEEDI
SEEDO
AB7Y5 AB8 AB11 AB12 AB15 AB16 AB19 AB20
S1_REQ#0
AF1
R4
TD0
AC15 AD15 AF16 AD7 AE7 AD9
PAR
AD8 AC8 AE8 AF8 AC9
AE15 AC16 AD16 AE16 AD4 AC7 AE9 AD12
H23 D12
P24 AC26 T23 W4 N23 AB25 AB26 AB24 AB23 V4
T24
T25 R25 R24 T26 P25 P23 P26
MA9
R23
MA8
U23
MA7
U24
MA6
U25
MA5
U26
MA4
V23
MA3
V24
MA2
V25
MA1
W23
MA0
AA23
MD7
Y26
MD6
Y25
MD5
Y24
MD4
Y23
MD3
W26
MD2
W25
MD1
W24
MD0
AC25 AC23 AC24
S1_REQ#0 26
POWER TRACE
全部走
8
7
6
5
20mil
4
Page 32
8
D D
C C
B B
S1_PCIRST#
C2193 X_104P
Note :
THE CHIP WILL LOAD 6-BYTE OF ID DATA FROM DIFFERENT LOCATION OF THE SEEPROM BASED ON THE LOGIC LEVEL AT
A A
THE SIGNAL LDALTIDA OF CHANNEL A AND THE SIGNAL IDALTIDB OF CHANNEL B.
DEPENDING ON THE LADLTIDA AND LADLTIDB STATUS, ONE OF THE TWO POSSIBLE ID VALUES FROM THE PREDETERMINED LOCATION OF THE SEEPROM WILL BE EXTRACTED.
8
7
DIFFSENSEA32 DIFFSENSEB33
S1_PCIRST#26
AIC_CLKINP34 AIC_CLKINM34
7
6
LVCSDAPHP32
LVCSDAPLP32
LVATNAP32 LVBSYAP32 LVACKAP32 LVRSTAP32
LVMSGAP32
LVSELAP32
LVCDAP32
LVREQAP32
LVIOAP32
LVCSDBPHP33
LVCSDBPLP33
LVBSYBP33 LVACKBP33 LVATNBP33 LVRSTBP33
LVMSGBP33
LVSELBP33
LVCDBP33
LVREQBP33
LVIOBP33
R1965 0 R1967 0
7899W=0 Ohm 7902 =10K
6
LVSCDAP15 LVSCDAP14 LVSCDAP13 LVSCDAP12 LVSCDAP11 LVSCDAP10
LVSCDAP8 LVSCDAP7 LVSCDAP6 LVSCDAP5 LVSCDAP4 LVSCDAP3 LVSCDAP2 LVSCDAP1 LVSCDAP0
LVSCDBP15 LVSCDBP14 LVSCDBP13 LVSCDBP12 LVSCDBP11 LVSCDBP10 LVSCDBP9 LVSCDBM9 LVSCDBP8 LVSCDBP7 LVSCDBP6 LVSCDBP5 LVSCDBP4 LVSCDBP3 LVSCDBP2 LVSCDBP1 LVSCDBP0
S1_PCIRST#
0 R1972
D17 B16 D15 A15 G24
F23
F25 E23 C21 A21 C20 A20 C19 A19 C18 A18
A17 A22 C22 A23 A24 A26 B25 C26 D26 D24 E25
M2 M4
N1 N3 D6 B6 D5 B5 G1 G3 H1 H3 J1 J3 K2 K4
L2 F3 E3 E1 F1 D2 C2 B1 B2 B3 C4
H25
D9
AD1
J25
K23
J24 K24 M26 M24 H24 B11 B10
D8 B8 A9
AC1
T2
T3 U1 U2 V1 V2
W2 AB1 A13 B14 D10
5
SCDAP15 SCDAP14 SCDAP13 SCDAP12 SCDAP11 SCDAP10 SCDAP9 SCDAP8 SCDAP7 SCDAP6 SCDAP5 SCDAP4 SCDAP3 SCDAP2 SCDAP1 SCDAP0
SCDAPHP SCDAPLP ATNAP BSYAP ACKAP RESETAP MSGAP SELAP CDAP REQAP IOAP
SCDBP15 SCDBP14 SCDBP13 SCDBP12 SCDBP11 SCDBP10 SCDBP9 SCDBP8 SCDBP7 SCDBP6 SCDBP5 SCDBP4 SCDBP3 SCDBP2 SCDBP1 SCDBP0
SCDBPHP SCDBPLP BSYBP ACKBP ATNBP RESETBP MSGBP SELBP CDBP REQBP IOBP
DIFFSENSEA DIFFSENSEB
PCIRST
EXTXCVRA EXTXCVRB EXPACTA EXPACTB IDDATA IDDATB SCLKIN SCLKINP SCLKINM SRAGARDV AVCC33A AVCC33B PAGARDV PCAVCC33A PCAVCC33B PXAVCC33A PXAVCC33B PCAGNDA PCAGNDB PXAGNDA PAGARDG AGNDA AGNDB STAGARD
U205A
5
AIC-7899W
SCSI
MISC
7899W
SCDAM15 SCDAM14 SCDAM13 SCDAM12 SCDAM11 SCDAM10
SCDAM9 SCDAM8 SCDAM7 SCDAM6 SCDAM5 SCDAM4 SCDAM3 SCDAM2 SCDAM1 SCDAM0
SCDAPHM
SCDAPLM
ATNAM BSYAM ACKAM
RESETAM
MSGAM
SELAM
CDAM
REQAM
IOAM
SCDBM15 SCDBM14 SCDBM13 SCDBM12 SCDBM11 SCDBM10
SCDBM9 SCDBM8 SCDBM7 SCDBM6 SCDBM5 SCDBM4 SCDBM3 SCDBM2 SCDBM1 SCDBM0
SCDBPHM
SCDBPLM
BSYBM ACKBM ATNBM
RESETBM
MSGBM
SELBM
CDBM
REQBM
IOBM
LVREXT1 LVREXT2 EXREXT1 EXREXT2
PCIRSTOUT
LEDA LEDB
STPWCTLA STPWCTLB
WIDEPSA WIDEPSB
TESTMODE
LDALTIDA LDALTIDB
STAGARDV
AVCC33C AVCC33D
AVCC33E
AGNDC AGNDD
STAGARDG
PXAVCC18
AVCC18A AVCC18B
AVCC18D
PXAGNDB
4
D16 C16 C15 B15 G25 F24 F26 E24 D21 B21 D20 B20 D19 B19 D18 B18
B17 B22 D22 B23 B24 A25 C24 B26 C25 D25 E26
M3 N4 N2 P3 C6 A6 C5 A5 G2 G4 H2 H4 J2 J4 K3 L4
L3 F4 E4 E2 F2 D3 D1 C1 A2 A3 B4
C9 B9
6.19KRST R1968
B13 B12 N26 K26 L25
J26 L24
0 R1969
J23 L23
AA4 M25 M23
C8 A10 A11 A12 C11 C12 C10 Y1 B7 C7 D7 Y2
4
LVSCDAM15 LVSCDAM14 LVSCDAM13 LVSCDAM12 LVSCDAM11 LVSCDAM10 LVSCDAM9LVSCDAP9 LVSCDAM8 LVSCDAM7 LVSCDAM6 LVSCDAM5 LVSCDAM4
LVSCDAM3
LVSCDAM2 LVSCDAM1 LVSCDAM0
LVSCDBM15 LVSCDBM14 LVSCDBM13 LVSCDBM12 LVSCDBM11 LVSCDBM10
LVSCDBM8 LVSCDBM7 LVSCDBM6 LVSCDBM5 LVSCDBM4 LVSCDBM3 LVSCDBM2 LVSCDBM1 LVSCDBM0
4.99KRST R1966
0R1970
LVCSDAPHM 32 LVCSDAPLM 32 LVATNAM 32 LVBSYAM 32 LVACKAM 32 LVRSTAM 32 LVMSGAM 32 LVSELAM 32 LVCDAM 32 LVREQAM 32 LVIOAM 32
LVCSDBPHM 33 LVCSDBPLM 33 LVBSYBM 33 LVACKBM 33 LVATNBM 33 LVRSTBM 33 LVMSGBM 33 LVSELBM 33 LVCDBM 33 LVREQBM 33 LVIOBM 33
20 MIL
SCSILED1 65 SCSILED2 65
STPWCTLA 32 STPWCTLB 33
3
KEEP TRACE SHORT
7899W=6.19K 7902 =Open
4.7KR1971
4.7KR1974
3
VCC3
LVSCDAM[15..0] LVSCDAP[15..0]
LVSCDBM[15..0] LVSCDBP[15..0]
Title
Document Number
2
LVSCDAM[15..0] 32 LVSCDAP[15..0] 32
LVSCDBM[15..0] 33 LVSCDBP[15..0] 33
R1973
7899W=0 Ohm
0
7902 =Open
Micro Star Restricted Secret
AIC 7899W/7902 2/2
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
2
1
Last Revision Date:
Monday, August 20, 2001
Sheet
31 75
1
Rev
0A
of
Page 33
8
D D
DIFFSENSEA31
220K not call out in Dallas
C C
datasheets. It's use for setting initial state of the terminators
B B
A A
8
DIFFSENSEA
STPWCTLA31
7
+
EC21 10U/16V/S
LVSCDAP11 LVSCDAP10 LVSCDAP9 LVSCDAP8 LVIOAP LVIOAM
LVIOAP31 LVIOAM 31
LVREQAP LVREQAM
LVREQAP31 LVREQAM 31
LVCDAP LVCDAM
LVCDAP31 LVCDAM 31
LVSELAP LVSELAM
LVSELAP31 LVSELAM 31
LVMSGAP LVMSGAM
LVMSGAP31
R1975 221K
LVBSYAP
LVBSYAP31
LVATNAP
LVATNAP31
LVACKAP
LVACKAP31
LVRSTAP
LVRSTAP31
LVSCDAPLP
LVCSDAPLP31
LVSCDAP7 LVSCDAP6 LVSCDAP5 LVSCDAP4
1 2
1N4148S D61
LVSCDAP3 LVSCDAM3 LVSCDAP2 LVSCDAM2 LVSCDAP1 LVSCDAM1 LVSCDAP0 LVSCDAM0 LVSCDAPHP LVSCDAPHM
LVCSDAPHP31 LVCSDAPHM 31
LVSCDAP15 LVSCDAP14 LVSCDAP13 LVSCDAP12
7
R1978 10K
R1976
20K
C2099 104P
C2094 104P
16
11 18 20 23 25
17
22
14
16
11 18 20 23 25
17
22
14
16
11 18 20 23 25
17
22
14
2 4 7 9
6
2 4 7 9
6
2 4 7 9
6
6
U206
D_SNS
+R1 +R2 +R3 +R4 +R5 +R6 +R7 +R8 +R9
DIFF_CAP
HSGND2 HSGND1 GND
DS2119M
U207
D_SNS
+R1 +R2 +R3 +R4 +R5 +R6 +R7 +R8 +R9
DIFF_CAP
HSGND2 HSGND1 GND
DS2119M
U208
D_SNS
+R1 +R2 +R3 +R4 +R5 +R6 +R7 +R8 +R9
DIFF_CAP
HSGND2 HSGND1 GND
DS2119M
6
LVTRMPWR_A
50MIL
TPWR
TPWR1
-R1
-R2
-R3
-R4
-R5
-R6
-R7
-R8
-R9
ISO
M_S
VREF
TPWR
TPWR1
-R1
-R2
-R3
-R4
-R5
-R6
-R7
-R8
-R9
ISO
M_S
VREF
TPWR
TPWR1
-R1
-R2
-R3
-R4
-R5
-R6
-R7
-R8
-R9
ISO
M_S
VREF
5
28 27 3 5 8 10 12 19 21 24 26
13 15 1
28 27 3 5 8 10 12 19 21 24 26
13 15 1
28 27 3 5 8 10 12 19 21 24 26
13 15 1
LVSCDAM11 LVSCDAM10 LVSCDAM9 LVSCDAM8
LVBSYAM LVATNAM LVACKAM LVRSTAM LVSCDAPLM LVSCDAM7 LVSCDAM6 LVSCDAM5 LVSCDAM4
LVSCDAM15 LVSCDAM14 LVSCDAM13 LVSCDAM12
5
C2095 104P
C2097 104P
C2100 104P
LVMSGAM 31
C2096 475P/0805
LVBSYAM 31 LVATNAM 31 LVACKAM 31 LVRSTAM 31 LVCSDAPLM 31
4.7KR1977
C2098 475P/0805
C2101 475P/0805
4
VCC
12
D60
YDIMBRS340T3S
F1
D08-040020X-R02
3
LVSCDAM[15..0] LVSCDAP[15..0]
LVTRMPWR_A
LVSCDAP12 LVSCDAP13 LVSCDAP14 LVSCDAP15 LVSCDAPHP LVSCDAP0 LVSCDAP1 LVSCDAP2 LVSCDAP3 LVSCDAP4 LVSCDAP5 LVSCDAP6 LVSCDAP7 LVSCDAPLP
DIFFSENSEA
LVATNAP
LVBSYAP LVACKAP LVRSTAP LVMSGAP LVSELAP LVCDAP LVREQAP LVIOAP LVSCDAP8 LVSCDAP9 LVSCDAP10 LVSCDAP11
50MIL
2
LVSCDAM[15..0] 31 LVSCDAP[15..0] 31
SCSI1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
YSCSI68-P
1
LVTRMPWR_A
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
LVSCDAM12 LVSCDAM13 LVSCDAM14 LVSCDAM15 LVSCDAPHM LVSCDAM0 LVSCDAM1 LVSCDAM2 LVSCDAM3 LVSCDAM4 LVSCDAM5 LVSCDAM6 LVSCDAM7 LVSCDAPLM
LVATNAM
LVBSYAM LVACKAM LVRSTAM LVMSGAM LVSELAM LVCDAM LVREQAM LVIOAM LVSCDAM8 LVSCDAM9 LVSCDAM10 LVSCDAM11
POWER TRACE
全部走
4
20mil
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
3
http://www.msi.com.tw
SCSI CHANNEL 1
Last Revision Date:
Monday, August 20, 2001
2
Sheet
32 75
of
1
Rev
0A
Page 34
8
D D
DIFFSENSEB31
220K not call out in Dallas
C C
datasheets. It's use for setting initial state of the terminators
B B
A A
8
DIFFSENSEB
STPWCTLB31
7
+
EC22 10U/16V/S
LVSCDBP11 LVSCDBP10 LVSCDBP9 LVSCDBP8 LVIOBP LVIOBM
LVIOBP31 LVIOBM 31
LVREQBP LVREQBM
LVREQBP31 LVREQBM 31
LVCDBP LVCDBM
LVCDBP31 LVCDBM 31
LVSELBP
LVSELBP31
LVMSGBP
LVMSGBP31
R1979 221K
LVBSYBP
LVBSYBP31
LVATNBP
LVATNBP31
LVACKBP
LVACKBP31
LVRSTBP
LVRSTBP31
LVSCDBPLP
LVCSDBPLP31
LVSCDBP7 LVSCDBP6 LVSCDBP5 LVSCDBP4
1 2
1N4148S
D63
LVSCDBP3 LVSCDBM3 LVSCDBP2 LVSCDBM2 LVSCDBP1 LVSCDBM1 LVSCDBP0 LVSCDBM0 LVSCDBPHP LVSCDBP15 LVSCDBP14 LVSCDBP13 LVSCDBP12
7
R1982 10K
R1980 20K
C2107 104P
C2102 104P
16
11 18 20 23 25
17
22
14
16
11 18 20 23 25
17
22
14
16
11 18 20 23 25
17
22
14
2 4 7 9
6
2 4 7 9
6
2 4 7 9
6
6
U223
D_SNS
+R1 +R2 +R3 +R4 +R5 +R6 +R7 +R8 +R9
DIFF_CAP
HSGND2 HSGND1 GND
DS2119M
U224
D_SNS
+R1 +R2 +R3 +R4 +R5 +R6 +R7 +R8 +R9
DIFF_CAP
HSGND2 HSGND1 GND
DS2119M
U225
D_SNS
+R1 +R2 +R3 +R4 +R5 +R6 +R7 +R8 +R9
DIFF_CAP
HSGND2 HSGND1 GND
DS2119M
6
LVTRMPWR_B
50MIL
TPWR
TPWR1
M_S
VREF
TPWR
TPWR1
M_S
VREF
TPWR
TPWR1
M_S
VREF
5
28 27 3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15 1
28 27 3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15 1
28 27 3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15 1
LVSCDBM11 LVSCDBM10 LVSCDBM9 LVSCDBM8
LVSELBM LVMSGBM
LVBSYBM LVATNBM LVACKBM LVRSTBM LVSCDBPLM LVSCDBM7 LVSCDBM6 LVSCDBM5 LVSCDBM4
LVSCDBPHM LVSCDBM15 LVSCDBM14 LVSCDBM13 LVSCDBM12
5
C2103 104P
C2105 104P
C2108 104P
LVSELBM 31 LVMSGBM 31
C2104 475P/0805
LVBSYBM 31 LVATNBM 31 LVACKBM 31 LVRSTBM 31 LVCSDBPLM 31
4.7KR1981
C2106 475P/0805
LVCSDBPHM 31LVCSDBPHP31
C2109 475P/0805
4
VCC
12
D62
YDIMBRS340T3S
F2
D08-040020X-R02
3
LVTRMPWR_B
LVSCDBP12 LVSCDBP13 LVSCDBP14 LVSCDBP15 LVSCDBPHP LVSCDBP0 LVSCDBP1 LVSCDBP2 LVSCDBP3 LVSCDBP4 LVSCDBP5 LVSCDBP6 LVSCDBP7 LVSCDBPLP
DIFFSENSEB
LVATNBP
LVBSYBP LVACKBP LVRSTBP LVMSGBP LVSELBP LVCDBP LVREQBP LVIOBP LVSCDBP8 LVSCDBP9 LVSCDBP10 LVSCDBP11
LVSCDBM[15..0] LVSCDBP[15..0]
2
50MIL
SCSI2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
YSCSI68-P-90
LVSCDBM[15..0] 31 LVSCDBP[15..0] 31
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
LVSCDBM12 LVSCDBM13 LVSCDBM14 LVSCDBM15 LVSCDBPHM LVSCDBM0 LVSCDBM1 LVSCDBM2 LVSCDBM3 LVSCDBM4 LVSCDBM5 LVSCDBM6 LVSCDBM7 LVSCDBPLM
LVATNBM
LVBSYBM LVACKBM LVRSTBM LVMSGBM LVSELBM LVCDBM LVREQBM LVIOBM LVSCDBM8 LVSCDBM9 LVSCDBM10 LVSCDBM11
1
LVTRMPWR_B
POWER TRACE
全部走
4
20mil
3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
SCSI CHANNEL 2
2
Last Revision Date:
Monday, August 20, 2001
Sheet
33 75
1
Rev
0A
of
Page 35
8
D D
C C
B B
7
6
5
4
3
2
1
VCC3
8
VCC
OUT+
C2120 103P
A A
8
40MHZOSC1
80 Mhz OSC for 7902 (Differential) 40 Mhz OSC for 7899W
R1991 22
5
14
OUT-GND
7
AIC_CLKINP 31
AIC_CLKINM 31
7899W=Reserved 7902 =SCLKINM
POWER TRACE
全部走
6
20mil
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
5
4
3
http://www.msi.com.tw
2
SCSI MISE.
Last Revision Date:
Monday, August 20, 2001
Sheet
of
34 75
1
Rev
0A
Page 36
8
7
6
5
4
3
2
1
VCC3
S1_REQ64#
S1_REQ64#26,30
S1_PAR64
S1_PAR64#26,30
S1_ACK64#
S1_ACK64#26,30
S1_REQ#1
S1_REQ#126
D D
S1_REQ#326 S1_REQ#526 S1_REQ#226 S1_REQ#426
S1_FRAME#26,30
S1_IRDY#26,30
S1_TRDY#26,30
S1_DEVSEL#26,30
S1_STOP#26,30 S1_PERR#26,30,50 S1_SERR#26,30,50
S1_PAR#26,30
C C
B B
RN1
S1_REQ#3 S1_REQ#5 S1_REQ#2 S1_REQ#4
RN2
S1_FRAME# S1_IRDY# S1_TRDY# S1_DEVSEL#
RN3
S1_STOP# S1_PERR# S1_SERR# S1_PAR
RN4
8P4R-2.7K
8P4R-2.7K
8P4R-2.7K
8P4R-2.7K
12 34 56 78
12 34 56 78
12 34 56 78
12 34 56 78
A A
8
7
6
5
4
3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
2
S1 BUS TERMINATOR
Last Revision Date:
Monday, August 20, 2001
Sheet
35 75
of
1
Rev
0A
Page 37
A
P2_AD[0..63]41,44
4 4
3 3
2 2
R771 5.1K
P2_PCIXCAP44
S2_PCIXCAP45
1 1
JP5
12
JP6
12
ON : Force PCI-X incapable
A
P2_AD[0..63]
P2_AD0 P2_AD1 P2_AD2 P2_AD3 P2_AD4 P2_AD5 P2_AD6 P2_AD7 P2_AD8 P2_AD9 P2_AD10 P2_AD11 P2_AD12 P2_AD13 P2_AD14 P2_AD15 P2_AD16 P2_AD17 P2_AD18 P2_AD19 P2_AD20 P2_AD21 P2_AD22 P2_AD23 P2_AD24 P2_AD25 P2_AD26 P2_AD27 P2_AD28 P2_AD29 P2_AD30 P2_AD31 P2_AD32 P2_AD33 P2_AD34 P2_AD35 P2_AD36 P2_AD37 P2_AD38 P2_AD39 P2_AD40 P2_AD41 P2_AD42 P2_AD43 P2_AD44 P2_AD45 P2_AD46 P2_AD47 P2_AD48 P2_AD49 P2_AD50 P2_AD51 P2_AD52 P2_AD53 P2_AD54 P2_AD55 P2_AD56 P2_AD57 P2_AD58 P2_AD59 P2_AD60 P2_AD61 P2_AD62 P2_AD63
VCC3
VCC
U101
3
Vin
12
R773 10K
R772 5.1K
R782 10K R774 2K
R781 2K
GND
6
2N
7
2P
4
1N
5
1P
8
3N
9
3P
10
4N
11
4P
LM339A
B
U100A
N23
P_AD0
R25
P_AD1
N25
P_AD2
U22
P_AD3
M22
P_AD4
P24
P_AD5
K21
P_AD6
R22
P_AD7
P22
P_AD8
L22
P_AD9
N22
P_AD10
J22
P_AD11
M24
P_AD12
J25
P_AD13
M25
P_AD14
H22
P_AD15
E23
P_AD16
F24
P_AD17
D24
P_AD18
F25
P_AD19
C25
P_AD20
G21
P_AD21
B25
P_AD22
E22
P_AD23
A23
P_AD24
C24
P_AD25
A24
P_AD26
D23
P_AD27
B23
P_AD28
C22
P_AD29
A21
P_AD30
A22
P_AD31
T21
P_AD32
W21
P_AD33
T22
P_AD34
U25
P_AD35
P25
P_AD36
W22
P_AD37
R23
P_AD38
W23
P_AD39
U23
P_AD40
W25
P_AD41
T25
P_AD42
AA22
P_AD43
V22
P_AD44
AA23
P_AD45
V24
P_AD46
AA25
P_AD47
V25
P_AD48
AB20
P_AD49
Y22
P_AD50
AC24
P_AD51
Y24
P_AD52
AC25
P_AD53
Y25
P_AD54
AC21
P_AD55
AB23
P_AD56
AE24
P_AD57
AB24
P_AD58
AD22
P_AD59
AB25
P_AD60
AE23
P_AD61
AB21
P_AD62
AE22
P_AD63
CIOBX2
VCC
C1394
0.1uF
P2_PCIXCAP2
1
2Y
P2_PCIXCAP1
2
1Y
S2_PCIXCAP2
14
3Y
S2_PCIXCAP1
13
4Y
P_FRAME#
P_DEVSEL#
P_REQ64#
P_ACK64#
P_PCIRST#
P_PCICAP1 P_PCICAP2
P2_GNT#0
D21
P_GNT#0
P2_GNT#1
B18
P_GNT#1
P2_GNT#2
A17
P_GNT#2
P2_GNT#3
A16
P_GNT#3
P2_GNT#4
A15
P_GNT#4
P2_GNT#5
B14
P_GNT#5
P2_GNT#6
A14
P_GNT#6
P2_REQ#0
B20
P_REQ#0
P2_REQ#1
A20
P_REQ#1
P2_REQ#2
A19
P_REQ#2
P2_REQ#3
C19
P_REQ#3
P2_REQ#4
B22
P_REQ#4
P2_REQ#5
A18
P_REQ#5
P2_REQ#6
D20
P_REQ#6
P_CBE#0 P_CBE#1 P_CBE#2 P_CBE#3 P_CBE#4 P_CBE#5 P_CBE#6 P_CBE#7
P_IRDY#
P_TRDY#
P_STOP# P_SERR# P_PERR#
P_PAR64
P_LOCK#
P_SOR#
P_M66EN
P2_PCIXCAP/ S2_PCIXCAP
P2_CBE#0
L25
P2_CBE#1
L23
P2_CBE#2
H24
P2_CBE#3
D25
P2_CBE#4
AE21
P2_CBE#5
AD25
P2_CBE#6
AD20
P2_CBE#7
AD23
E25 K22 H25 F22 G23
P_PAR
G22 K24 K25
N21 AC22 T24 J23
R1392 4.7K
D16 C15
P_SIL#
C17 D19
P_SOD
P2_PCIRST#
D18
P2_PCIXCAP1
C21
P2_PCIXCAP2
E19
P2_M66EN/ S2_M66EN
Gnd
Gnd
Pull Down PCI-X - 66
N.C. ( 1 )
1
X
X
X
N.C. ( 1 ) - Not Connected , Logic Value = 1
B
C
P2_GNT#[0..6] 38,41,44
P2_REQ#[0..6] 41,44
P2_CBE#[0..7] 41,44
P2_FRAME# 41,44 P2_DEVSEL# 41,44 P2_IRDY# 41,44 P2_TRDY# 41,44 P2_PAR 41,44 P2_STOP# 41,44 P2_SERR# 41,44,50 P2_PERR# 41,44,50
P2_REQ64# 41,44 P2_PAR64 41,44 P2_ACK64# 44 P2_PLOCK# 44
VCC3
P2_M66EN 41,44
P2_PCIRST# 41,44
P2_GNT#5/ S2_GNT#3
X
X
X
C
S2_AD[0..63]45
P2_PCIXCAP2/ S2_PCIXCAP2
0
0
0
1
S2_AD[0..63]
P2_PCIXCAP1/ S2_PCIXCAP1
00
0
1
1
1N.C. ( 1 )
D
U100B
S_PAR
S_SIL#
S_SOD
D12 A12 C13 B12 A13 D13
D11 D9 C11 E10 A11 D10
K4 A2 C4 A9 W4 AC1 Y1 AD1
F4 B4 A5 F2 F1 D1 B3 A3
M1 AC2 H4 E4
E13 D15 D3 B16
C9
E16 D14
S2_GNT#0 S2_GNT#1 S2_GNT#2 S2_GNT#3 S2_GNT#4 S2_GNT#5
S2_REQ#0 S2_REQ#1 S2_REQ#2 S2_REQ#3 S2_REQ#4 S2_REQ#5
S2_CBE#0 S2_CBE#1 S2_CBE#2 S2_CBE#3S2_AD17 S2_CBE#4 S2_CBE#5 S2_CBE#6
R1393 4.7K
S2_PCIRST#
S2_PCIXCAP1 S2_PCIXCAP2
S2_AD0
M2
S2_AD1 S2_AD2 S2_AD3 S2_AD4 S2_AD5 S2_AD6 S2_AD7 S2_AD8 S2_AD9 S2_AD10 S2_AD11 S2_AD12 S2_AD13 S2_AD14 S2_AD15 S2_AD16
S2_AD18 S2_AD19 S2_AD20 S2_AD21 S2_CBE#7 S2_AD22 S2_AD23 S2_AD24 S2_AD25 S2_AD26 S2_AD27 S2_AD28 S2_AD29 S2_AD30 S2_AD31 S2_AD32 S2_AD33 S2_AD34 S2_AD35 S2_AD36 S2_AD37 S2_AD38 S2_AD39 S2_AD40 S2_AD41 S2_AD42 S2_AD43 S2_AD44 S2_AD45 S2_AD46 S2_AD47 S2_AD48 S2_AD49 S2_AD50 S2_AD51 S2_AD52 S2_AD53 S2_AD54 S2_AD55 S2_AD56 S2_AD57 S2_AD58 S2_AD59 S2_AD60 S2_AD61 S2_AD62 S2_AD63
S_AD0
G1
S_AD1
L1
S_AD2
G4
S_AD3
L4
S_AD4
E3
S_AD5
K1
S_AD6
E1
S_AD7
D2
S_AD8
K5
S_AD9
C1
S_AD10
H1
S_AD11
B1
S_AD12
H2
S_AD13
C2
S_AD14
G3
S_AD15
A4
S_AD16
B6
S_AD17
G5
S_AD18
A7
S_AD19
C5
S_AD20
D5
S_AD21
A6
S_AD22
B8
S_AD23
C7
S_AD24
D6
S_AD25
D7
S_AD26
A10
S_AD27
A8
S_AD28
E7
S_AD29
D8
S_AD30
B10
S_AD31
N5
S_AD32
J4
S_AD33
N4
S_AD34
J1
S_AD35
P4
S_AD36
J3
S_AD37
P2
S_AD38
K2
S_AD39
P1
S_AD40
L3
S_AD41
R3
S_AD42
M4
S_AD43
T2
S_AD44
N3
S_AD45
U4
S_AD46
N1
S_AD47
U1
S_AD48
R4
S_AD49
V2
S_AD50
R1
S_AD51
W3
S_AD52
T5
S_AD53
W1
S_AD54
T1
S_AD55
Y2
S_AD56
T4
S_AD57
AA1
S_AD58
U3
S_AD59
AB2
S_AD60
V1
S_AD61
AB1
S_AD62
V4
S_AD63
CIOBX2
S_GNT#0 S_GNT#1 S_GNT#2 S_GNT#3 S_GNT#4 S_GNT#5
S_REQ#0 S_REQ#1 S_REQ#2 S_REQ#3 S_REQ#4 S_REQ#5
S_CBE#0 S_CBE#1 S_CBE#2 S_CBE#3 S_CBE#4 S_CBE#5 S_CBE#6 S_CBE#7
S_FRAME#
S_DEVSEL#
S_IRDY#
S_TRDY#
S_STOP# S_SERR# S_PERR#
S_REQ64#
S_PAR64
S_ACK64#
S_LOCK#
S_SOR#
S_M66EN
S_PCIRST#
S_PCIXCAP1 S_PCIXCAP2
FREQ. ( MHz )
PCI - 33
PCI - 66
PCI-X - 10011
PCI-X - 1330
Conv. PCI
D
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
S2_REQ#0 45 S2_REQ#1 45 S2_REQ#2 45 S2_REQ#3 45 S2_REQ#4 45 S2_REQ#5 45
P2_PCIXCAP2
P2_PCIXCAP1
S2_PCIXCAP2
S2_PCIXCAP1
P2_PCIRST#
S2_PCIRST#
CIOBX2_PCIX
E
S2_GNT#[0..5] 38,44,45
S2_CBE#[0..7] 45
S2_FRAME# 45 S2_DEVSEL# 45 S2_IRDY# 45 S2_TRDY# 45 S2_PAR# 45 S2_STOP# 45 S2_SERR# 45,50 S2_PERR# 45,50
S2_REQ64# 45 S2_PAR64# 45 S2_ACK64# 45 S2_PLOCK# 45
VCC3
S2_M66EN 45
S2_PCIRST# 45
R766 5.1K
R767 5.1K
R769 5.1K
R770 5.1K
R2604 4.7K
R2605 4.7K
Last Revision Date:
Monday, August 20, 2001
Sheet
36 75
E
VCC3
Rev
0A
of
Page 38
A
VDD_IMB
U100D
AA17
A25
GND
A1
GND
B21
AA24 AA21 AA18 AA16 AA14 AA12 AA10
AC23 AC20
AD19 AD17
GND
B19
GND
B17
GND
B15
GND
B13
GND
B11
GND
B9
GND
B7
GND
B5
GND
C23
GND
C3
GND
E24
GND
E21
GND
E18
GND
E14
GND
E11
GND
E8
GND
E5
GND
E2
GND
G24
GND
G2
GND
H21
GND
H5
GND
J24
GND
J2
GND
L24
GND
L21
GND
L15
GND
L14
GND
L13
GND
L12
GND
L11
GND
L5
GND
L2
GND
M15
GND
M14
GND
M13
GND
M12
GND
M11
GND
N24
GND
N15
GND
N14
GND
N13
GND
N12
GND
N11
GND
N2
GND
P21
GND
P15
GND
P14
GND
P13
GND
P12
GND
P11
GND
P5
GND
R24
GND
R15
GND
R14
GND
R13
GND
R12
GND
R11
GND
R2
GND
U24
GND
U2
GND
V21
GND
V5
GND
W24
GND
W2
GND GND GND GND GND GND GND GND
AA8
GND
AA5
GND
AA2
GND GND GND
AC3
GND GND GND
AE5
GND
GND
GND
GND
GND
AD15
AD13
AD11
AD9
AD7
4 4
3 3
2 2
1 1
AA15
VDD1.5
VDD1.5
GND
GND
AE25
AA13
VDD1.5
GND
AE1
AA11
VDD1.5
VCC25
AA9
VDD1.5
AA7
AC18
VDD1.5
VDD1.5
R1493 1K
AC16
AC14
AC12
AC10
AC8
VDD1.5
VDD1.5
VDD1.5
VDD1.5
AC6
VDD1.5
VDD1.5
AC5
TESTMODE#
CIOB2_RCOMP
CIOB2_COMP_PD
CIOB2_COMP_PU
G25
AE20
AE12
AB13
AC13
RSVD
RSVD
IMBCOMP0
IMBCOMP1
IMBCOMP2
CIOBX2
A
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25
B24 B2 C20 C18 C16 C14 C12 C10 C8 C6 D22 D4 E20 E17 E15 E12 E9 E6 F23 F21 F5 F3 H23 H3 J21 J5 K23 K3 M23 M21 M5 M3 P23 P3 R21 R5 T23 T3 U21 U5 V23 V3 Y23 Y21 Y5 Y3 AA20 AB22 AB4 AD24 AD21 AD2
K16 K15 K14 K13 K12 K11 K10 L16 L10 M16 M10 N16 N10 P16 P10 R10 T16 T15 T14 T13 T12 T11 T10 R16
B
VDD_IMB
R1491 249_1%
R1490 100_1%
R1492 249_1%
VCC3
VDD_IMB
C1621
1.0uF/16V
C1622
1.0uF/16V
C1620
1.0uF/16V
VCC25
VDD_IMB
100_1%
R1317
VREF_IMB_CIOB2
C1505 220pF
C1506 220pF
R1318 100_1%
C1507
CIOB2_COMP_PD
CIOB2_RCOMP
CIOB2_COMP_PU
B_IMB_D_T[0..15]12
B_IMB_D_R[0..15]12
C1623
1.0uF/16V
1.0uF/10V
C
C948
1.0uF/16V
C956
0.1uF
D
Route AVDD as two traces, One going to each pin.
Route AGND like AVDD, each pin having its own trace Connected to GND pin of Filter Ckt.'s Cap.
U100C
B_IMB_D_T0
AE19
PS_PWRGD#
PCIRST1#
AE18 AB17 AB19 AA19 AB18 AC19 AE17 AD18 AB15 AE13 AD14 AB16 AE15 AE14 AC15
AB11 AB12 AC11 AB10 AE10
AD10 AE11
IMBD_ R0 IMBD_ R1 IMBD_R2 IMBD_ R3 IMBD_R4 IMBD_R5 IMBD_ R6 IMBD_R7 IMBD_ R8 IMBD_R9 IMBD_ R10 IMBD_R11 IMBD_R12 IMBD_R13 IMBD_R14 IMBD_R15
IMBD_ T0 IMBD_ T1 IMBD_T2 IMBD_ T3 IMBD_T4
AE9
IMBD_ T5 IMBD_ T6 IMBD_T7
AC9
IMBD_T8
AD6
IMBD_T9
AE6
IMBD_ T10
AB9
IMBD_T11
AE7
IMBD_ T12
AB8
IMBD_ T13
AB7
IMBD_T14
AA6
IMBD_ T15
CIOBX2
B_IMB_D_T1 B_IMB_D_T2 B_IMB_D_T3 B_IMB_D_T4 B_IMB_D_T5 B_IMB_D_T6 B_IMB_D_T7 B_IMB_D_T8 B_IMB_D_T9 B_IMB_D_T10 B_IMB_D_T11 B_IMB_D_T12 B_IMB_D_T13 B_IMB_D_T14 B_IMB_D_T15
B_IMB_D_R0 B_IMB_D_R1B_IMB_D_R1 B_IMB_D_R2B_IMB_D_R2B_IMB_D_R2 B_IMB_D_R3 B_IMB_D_R4B_IMB_D_R4 B_IMB_D_R5 B_IMB_D_R6B_IMB_D_R6 B_IMB_D_R7 B_IMB_D_R8 B_IMB_D_R9 B_IMB_D_R10B_IMB_D_R10 B_IMB_D_R11 B_IMB_D_R12B_IMB_D_R12 B_IMB_D_R13 B_IMB_D_R14B_IMB_D_R14 B_IMB_D_R15
PS_PWRGD#11,27,50,64
PCIRST1#11,27,65
IMBCLK_R_P IMBCLK_R_N IMBCLK_T_P IMBCLK_T_N
IMBPAR_T
IMBPAR_R IMBCON_T IMBCON_R
AGND1 AGND2
AVDD1 AVDD2
SCLK
PCLKFB
SCLK_FB
CLKIN SCLK_O PCLK_O
PCIRST#
PLLRST
ALERT
VREFIMB0
R1931 0
AD16 AE16 AE8 AD8
AC7 AC17 AB6 AB14
AE3 AD4
AE4 AD5
W5
SDA
Y4
AD3 AE2 AC4 AB3 AA4
D17 AA3
AB5
AD12
S2CLKO_R P2CLKO_R
AVDD_CIOB2_PLL
VREF_IMB_CIOB2
B_IMB_CLK_T_P 25 B_IMB_CLK_T_N 25 B_IMB_CLK_R_P_R 25 B_IMB_CLK_R_N_R 25
B_IMB_PAR_R 12 B_IMB_PAR_T 12 B_IMB_CON_R 12 B_IMB_CON_T 12
RCC_SDA 12,15,27,41,48,69 RCC_SCL 12,15,27,41,48,69
R749 22 R750 22
ALERT# 11,15,27,50
E
P2FBCLK 40 S2FBCLK 40 PCICLK_CIOB2 23
S2CLKO 40 P2CLKO 40
VCC25
R746 0
R_AVDD_CIOB2_PLL
L31 47uH
1 2
22uF/10V C932
VDD_IMB
C957
0.1uF
C1624
0.1uF
C949
1.0uF/16V
C1625
0.1uF
VCC25
C958
0.1uF
C950
1.0uF/16V
C1626
0.1uF
VCC25
C951
1.0uF/16V
C959
0.1uF
C1627
C1628
0.1uF
0.1uF
+
C947
330uF/6.3V/NHG/PANASONIC
C960
0.01uF
C961
0.01uF
+
C946
C1630
C1629
0.01uF
0.1uF
VDD_IMB
+
330uF/6.3V/NHG/PANASONIC
330uF/6.3V/NHG/PANASONIC
C963
C962
0.01uF
0.01uF
C1719
C1631
0.01uF
C934
1.0uF/16V
C952
0.01uF
C1632
0.01uF
C935
1.0uF/16V
C953
0.01uF
C1633
0.01uF
VCC3
VCC25
C1634
0.01uF
C936
1.0uF/16V
C954
0.1uF
C937
1.0uF/16V
C955
1.0uF/16V
VCC3
C940
0.1uF
C941
0.1uF
C943
0.01uF
C944
0.01uF
C942
0.01uF
C
C945
0.01uF
C1720
+
+
330uF/6.3V/NHG/PANASONIC
330uF/6.3V/NHG/PANASONIC
D
C1637
C939
C938
0.1uF
0.1uF
B
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
CIOBX2_IMB_PWR
Last Revision Date:
Monday, August 20, 2001
Sheet
37 75
E
Rev
0A
of
Page 39
A
VCC3
P2_GNT#0
1: APLL Enabled
4 4
Do not stuff
VCC3
0: APLL Disabled
R756 2.2K
P2_GNT#0
R757
RES_NOPOP
Do not stuff
( * )
P2_GNT#0 36,44
B
VCC3
R775
RES_NOPOP
Do not stuff
P2_GNT#6
2.2K
R779
C
0 = Disable Pri Hot-Plug Controller (Default)
1 = Enable Pri Hot-Plug Controller
P2_GNT#6 36,44
D
R776
Do not stuff
S2_GNT#5P2_GNT#6
VCC3
0 = Disable Sec Hot-Plug Controller (Default)
1 = Enable Sec Hot-Plug Controller
RES_NOPOP
S2_GNT#5
R778
2.2K
E
S2_GNT#5 36,44
CIOB ID For I2C Bus
3 3
R758
RES_NOPOP
R760 RES_NOPOPR763 2.2K
2.2K
R761
R762NOPOP R759 2.2K
2 2
GNT1=LOW, GNT2=HIGH, GNT3=LOW, ID=2
P2_GNT#1 P2_GNT#2 P2_GNT#3
Do not stuff
P2_GNT#1 36,41,44 P2_GNT#2 36,44 P2_GNT#3 36,44
JP30
HDR_1X2
P2_GNT#5
VCC3
0 = PCI-X 133 1 = PCI-X 100
[ Refer to table on sheet #30 ]
R1394 8.2K
P2_GNT#5
2 1
R1395 1K
P2_GNT#5 36,44
JP29
HDR_1X2
2 1
R1350 8.2K
R1351 1K
VCC3
S2_GNT#3
S2_GNT#3
0 = PCI-X 133 1 = PCI-X 100
[ Refer to table on sheet #30 ]
S2_GNT#3 36,44
Please refer to 'CMIC STRAPPING OPTIONS' sheet for following strappings in CIOB-x2
IMB - DETERMINISTIC/ NON
: -
DETERMINISTIC
IMB CRC or PARITY
: -
IMB_TRAINING Enable/Disable
: -
S2_GNT#1
1: Prim. PCI func. registers
VCC3
1 1
R1845
will be accessed at Func.#0 and Sec. PCI at Func.#2
0: Prim. PCI func. registers will be accessed at Func.#2 and Sec. PCI at Func.#0
R1844 2.2K
S2_GNT#1
RES_NOPOP
S2_GNT#1 36,44,45
A
Do not stuff
S2_GNT#0
VCC3
1: All bits of Func. # used for reg. access 0: Only bit 0 of Func. # used for reg. access
R777 2.2K
S2_GNT#0
R780
RES_NOPOP
B
S2_GNT#0 36,44,45
VCC3
S2_GNT#2
IMB_READ/WRITE POINTER DLY
1 : 5 CLOCKs 0 : 6 CLOCKs
R1352 2.2K
S2_GNT#2
R1353
RES_NOPOP
C
( Default )
S2_GNT#2 36,44
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
CIOBX2_STRAPPING_OPTIONS
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
38 75
Rev
0A
Page 40
A
B
C
D
E
4 4
P1CLKO27
VCC3
C920
4.7uF/10V/20%
+
FB_11_OHM_100MHz
L29
1 2
C921
0.01uF
0.1uF
VCC3
C915
P1CLKO
R729 1K
PCICLK_BUFF1_VDD
U98
1
CLKIN
2
OE
6
VCC3
4
GND
P1FBCLKR P1FBCLK
3
1Y0
P1SL1CLKR
5
1Y1
P1SL2CLKR
7
1Y2
8
1Y3
R731 22
R730 22
R732 100
PCICLK_P1_SLT1
P1FBCLK 27
PCICLK_P1_SLT1 29
CDCV304
R735 100
3 3
S1CLKO27
C929
4.7uF/10V/20%
VCC3
+
FB_11_OHM_100MHz
L30
1 2
C931
0.01uF
0.1uF
PCICLK_BUFF2_VDD
C925
2 2
S1CLKO
VCC3
R738 1K
U99
1
CLKIN
2
OE
6
VCC3
4
GND
S1FBCLKR
3
1Y0
S1SL1CLKR
5
1Y1
S1SL2CLKR
7
1Y2
8
1Y3
R740 22
R739 22
R741 22
S1FBCLK
PCICLK_S1_SLT1
S1FBCLK 27
PCICLK_S1_SLT1 30
CDCV304
R744 100
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
CIOBX1_CLK_BUFF
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
39 75
Rev
0A
Page 41
A
B
C
D
E
4 4
VCC3
FB_11_OHM_100MHz
L27
1 2
C906
4.7uF/10V/20%
3 3
2 2
C912
4.7uF/10V/20%
+
VCC3
C907
0.01uF
+
0.1uF
FB_11_OHM_100MHz
L28
1 2
C914
0.01uF
C901
0.1uF
C908
P2CLKO37 P2FBCLK 37
VCC3
R715 1K
PCICLK_BUFF3_VDD
S2CLKO37 S2FBCLK 37
S2CLKO
VCC3
R722 1K
PCICLK_BUFF4_VDD
U96
1
CLKIN
2
OE
6
VCC3
4
GND
P2CLKFBRP2CLKO
3
1Y0
P2SL1CLKR PCICLK_P2_SLT1
5
1Y1
1Y2
1Y3
BCMCLKR
7
8
CDCV304
U97
1
CLKIN
2
OE
6
VCC3
4
GND
S2FBCLKR
3
1Y0
S2SL1CLKR
5
1Y1
S2SL2CLKR
7
1Y2
8
1Y3
R724 22
CDCV304
R717 22
R721 100
R728
100
R716 22
R718 22
R723 22
R725 22
P2FBCLK
BCM5701_PCICLK
PCICLK_S2_SLT1
PCICLK_S2_SLT2
S2FBCLK
PCICLK_P2_SLT1 44
BCM5701_PCICLK 41
PCICLK_S2_SLT1 45
PCICLK_S2_SLT2 45
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
CIOBX2_CLK_BUFF
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
40 75
Rev
0A
Page 42
R1941
200
C2042 15PF
R1887 330K
C2045 15PF
P2_CBE#[0..7] 36,44
BCM5701_PME# 58 P2_M66EN 36,44 P2_PCIRST# 36,44 P2_FRAME# 36,44 P2_DEVSEL# 36,44 P2_IRDY# 36,44 P2_PERR# 36,44,50 P2_TRDY# 36,44 P2_SERR# 36,44,50 P2_PAR 36,44 P2_STOP# 36,44 P2_REQ64# 36,44 P2_PAR64 36,44 P2_ACK64# 36,44
5
P2_AD[0..63]36,44
P2_AD5
P2_AD6
P2_AD4
P2_AD2
P2_AD1
P2_AD0
P2_AD7
P2_AD3
P2_AD8
N2R2M4R1N3M2N1M1L5L3L4J5K3L2H1G1A2H4F3E2F2A1F4F5B2D4E4E5D3D5B5A4U9W9V9
U197A
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
C_BE_1
C_BE_2
C_BE_3
P2_CBE#2
P2_CBE#3
P2_CBE#4
2.7K R1992
8.2K R1993
C_BE_4
C_BE_5
P2_CBE#5
C_BE_6
C_BE_7
PME#
P2_CBE#6
P2_CBE#7
BCM5701_PME#
X_10PC2121
AD8
REQ#
PCI_CLK
P2_REQ#1
BCM5701_PCICLK
PCIIRQ#0
P2_REQ#1
P2_GNT#1
BCM5701_PCICLK
V16
RXD9
Y18
RXD8
Y20
RXD7
V17
RXD6
W20
RXD5
U16
RXD4
W19
RXD3
V18
RXD2
Y16
RXD0
V15
RXD1
Y17
RXCLK0
U14
RXCLK1
P18
CRS
P17
COL
T14
TXD9
W13
TXD8
Y13
TXD7
V12
TXD6
W12
TXD5
V11
TXD4
T12
TXD3
W11
TXD2
Y14
TX_CLKIN
Y15
TX_CLKOUT
T13
TXD0
V13
TXD1
E1
NC1
N17
MDIO
P20
MDC
J2
NC2
P19
R1888
1.24K_1%
LINKRDY
K17
XTALI
K18
XTALO
D15
RDAC
C_BE_0
K1K4B1E3V1P3P2P5C8C5E7C6H3G4B4E6C1H5G5J4D1F1J3K5T1P4U1
P2_CBE#0
P2_CBE#1
VCC3
XTALI
XTALORXTALO
5

D D
C C
12
Y4
B B
25MHZ_CRYSTAL
Place Y1 close to BCM5701
P2_CBE#0 P2_CBE#1 P2_CBE#2 P2_CBE#3 P2_CBE#4 P2_CBE#5 P2_CBE#6 P2_CBE#7
BCM5701_PME# P2_M66EN
P2_PCIRST#
P2_FRAME#
P2_DEVSEL#
P2_IRDY# P2_PERR# P2_TRDY#
A A
P2_SERR# P2_PAR P2_STOP# P2_REQ64# P2_PAR64 P2_ACK64#
P2_AD9
P2_AD10
P2_AD11
AD9
AD10
AD11
PCI_RST#
FRAME#
IDSEL
P2_PCIRST#
P2_FRAME#
GB_EN
P2_AD12
P2_AD13
AD12
AD13
GNT#
INTA#
PCIIRQ#0
P2_GNT#1
P2_AD14
P2_DEVSEL#
4
P2_AD15
P2_AD16
P2_AD17
P2_AD18
P2_AD19
AD14
AD15
AD16
AD17
AD18
AD19
DEVSEL#
IRDY#
PERR#
TRDY#
PAR
SERR#
P2_TRDY#
P2_IRDY#
P2_PAR
P2_SERR#
P2_PERR#
PCIIRQ#0 50
P2_REQ#1 36,44
P2_GNT#1 36,38,44
BCM5701_PCICLK 40
4
P2_AD20
P2_AD21
P2_AD22
AD20
AD21
STOP#
M66EN
P2_REQ64#
P2_M66EN
P2_STOP#
P2_AD23
P2_AD24
P2_AD25
P2_AD26
AD22
AD23
AD24
AD25
BCM5701_300H2BGA
REQ64#
PAR64
ACK64#
P2_ACK64#
P2_PAR64
P2_AD28
P2_AD27
P2_AD35
P2_AD36
P2_AD38
P2_AD30
P2_AD37
P2_AD34
P2_AD31
P2_AD32
P2_AD29
AD26
AD27
AD28
AD29
AD30
MODE0
MODE1
MODE2
F20
G19
F17
MODE1
R1894
1K
P2_AD40
P2_AD41
P2_AD42
P2_AD39
P2_AD43
P2_AD44
U10U8Y8Y6W7T6T10Y5U7Y3Y4T5Y2W3W4V4U6Y1U5U4R5T4T3V2R4U3W1T2R3
AD35
AD36
AD37
AD38
AD39
AD40
AD41
AD42
AD43
AD44
TMS
TRST#
TDI
TCLK
TDO
C9D8E10D9E8
JTDO
JTCLK
JTDI
JTRST#
JTMS
R1896 4.7K
R1898 4.7K
R1897 4.7K
R1895 4.7K
BCM5701_GPIO043 BCM5701_GPIO243
BCM5701_GPIO1
JTDO
P2_PCIRST#
C2194 X_104P
F19
AD31
MODE3
AD32
P2_AD33
AD33
AD34
P2_AD45
P2_AD46
AD45
AD46
P2_AD47
P2_AD48
AD47
AD48
P2_AD50
P2_AD49
AD49
TP11
TP12
AD50
3
P2_AD53
P2_AD51
P2_AD52
P2_AD54
AD51
AD52
AD53
AD54
GPIO0
GPIO1
GPIO2
D20
G18
G17
BCM5701_GPIO0
BCM5701_GPIO1
BCM5701_GPIO2
1
1
3
P2_AD55
P2_AD56
AD55
0
P2_AD57
AD56
AD57
SMB_DATA
R20
R1890
P2_AD58
P2_AD59
P2_AD60
P2_AD61
P2_AD62
P2_AD63
AD58
AD59
AD60
AD61
AD62
AD63
Link_Led_B
Spd1000ledb
Spd100ledb
Trafficledb
regpnp_sense_I_1_3v
regpnp_cnt_I_1_3v
regpnp_supply_I_1_3v
regpnp_sense_I_1_8v
regpnp_cnt_I_1_8v
regpnp_supply_I_1_8v
regpnp_sense_I_2_5v
regpnp_cnt_I_2_5v
regpnp_supply_I_2_5v
SMB_CLK
EE_DATA
EE_CLK
U15
H16
G16
0
R1891
GB_EN
TRD3N TRD3P TRD2N TRD2P TRD1N TRD1P TRD0N TRD0P
A13 A12 B12 B13 A15 A14 B14 B15
B10
E9
E11
D10
J18
J20
J19
H18
H19
H17
B11
D11
C11
R1899
1K
BCM_EE_SCL
BCM_EE_SDA
R1900 2 K
R1862
R1863
49.9
49.9
TRD3-
TRD3+
TRD2-
LINK
LINK1000
LINK100
TRAFFIC
REGCTL18
V33_1
C2046
.01uF
RCC_SDA 12,15,27,37,48,69 RCC_SCL 12,15,27,37,48,69
P2_AD19
JGb_1-2
YJUMPER-MG
2
RESs place next to BCM5701 Pins
R1865
R1864
49.9
49.9
TRD2+
TRD1-
TRD1+
TRD0-
TRD0+
U199
1
8
A0
VCC
2
7
A1
WP
3
6
A2
SCL
4
5
GND
SDA
AT24C512
JGB1
1 2 3
YJ103
2
R1866
49.9
VCC25
R1869
R1868
R1867
49.9
CTD
1 2 3 4 5 6 7 8
9 10 11 12
H5007
CAPS place next to CT pins
C2027
C2028
1000pF
1_8V OUT
C
4
Q33MJD45H11_CASE369A-13
3
E
+
C2038
10UF
CTD3 TRD3­TRD3+ CTD2 TRD2­TRD2+ CTD1 TRD1­TRD1+ CTD0 TRD0­TRD0+
T1
1000pF
V33_1
C2029
TRL3+
TRL2+
TRL1+
TRL0+
C2039
.01uF
CTL3 TRL3-
CTL2 TRL2-
CTL1 TRL1-
CTL0 TRL0-
49.9
49.9
1000pF
Layout Require at least 1 Square inch of Copper at Pin 2 and 4 for heat dissipation.
DPAK SIZE
1
B
1000pF
C2030
C2036
10UF
CTL3
24
TRLM3
23
TRLP3
22
CTL2
21
TRLM2
20
TRLP2
19
CTL1
18
TRLM1
17
TRLP1
16
CTL0
15
TRLM0
14
TRLP0
13
+
Place all LEDs at the edge of NIC card
LED1000LINK1000
R1886 150
LINK1000
LINK100
R1889 150
LINK100
LINK
R1936 150
LINK10
R1893 150
TRAFFIC LED
ESD1,ESD2 are optional protection diodes for cable ESD
TRD1-
TRD1+
TRD0-
TRD0+
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
LEDTRAFFICTRAFFIC
D53
X_BAV70_NOPOP D54
X_BAV70_NOPOP
Micro Star Restricted Secret
BCM5701 SIGNAL PINS
1
V18_1
C2037
LED100
LEDLINK
ESD1
ESD2
1
R187175R1870
R1872
75
75
.01uF
D49
D50
D57
D52
V33_1
POP Value: BAV70
Last Revision Date:
Tuesday, August 21, 2001
Sheet
X_RJ45_SMT
J52
8 7 6 5 4 3 2 1
R1873
75
C2031 X_1000PF_3KV
21
21
21
21
41 75
of
11
V33_1
Rev
12
9
10
0A
Page 43
5
VCC25
Place CAP close to BIASVDD pin
R1859 0
C1962 .1uF
D D
V13_1
C C
B B
3V_STBY
AVDD25
VCC3
R19304.7K
B6M5T7D7D14
E13
VESD1
VESD2
A18
VESD3
GND1
A19
Vaux_Prsnt
GND2
GND3
A20
GND4
B16
C1971
1000pF
AVDD25_1
AVDD25_2
GND5
GND6
B17
B18
E14
AVDD25_3
GND7
B19
U197B
M16
LVDD1
M17
LVDD2
M18
LVDD3
M19
LVDD4
N16
LVDD5
N19
LVDD6
N20
LVDD7
U12
LVDD8
U11
LVDD9
V14
LVDD10
W17
LVDD11
Place these CAPs close to power pins of BCM5701
B20
GND8
C12
C1972
1000pF
AVDD18
A16
C13
AVDD18_1
AVDD18_2
GND9
GND10
GND11
C16
C17
C14
D12
AVDD18_3
AVDD18_4
GND12
GND13
C18
C19
C1973
100PF
D13
AVDD18_5
GND14
GND15
C20C4D16
A17A6A8
GND16
D17
C1974
100PF
BIASVDD
GND17
GND18
D18
D19
VDDCORE1
GND19
GND20
E15
E16
3V_STBY
100PF
C1994
100PF
A11B9D6
VDDCORE2
VDDCORE3
GND21
GND22
E17
E18
C2217 103P
C1975
E12G2J16K2L16
VDDCORE4
VDDCORE5
VDDCORE6
GND23
GND24
GND25
E19
F16
C1976
.1uF
C1995
100PF
4
V18_1
L17
L18
L19M3N5V6V7V8Y7Y9Y12
VDDCORE7
VDDCORE8
VDDCORE9
VDDCORE10
VDDCORE11
VDDCORE12
VDDCORE13
VDDCORE14
VDDCORE15
VDDCORE16
VDDCORE17
VDDCORE18
VDDCORE19
BCM5701_300H2BGA
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
F18
P16
R16
R17
C1977
.1uF
Place these CAPs close to power pins of BCM5701
C1996
100PF
GND38
R18
R19
T15
T16
T17
T18
T19
T20
U17
U18
C1979
C1978
.1uF
.1uF
C1997
C1998
.01uF
.1uF
3
VCC3
Y19A3A5B3C2C3D2G3H2J1L1N4P1T8T9U2V3V5W2W5W6W8A9
PCIVDDIO1
PCIVDDIO2
PCIVDDIO3
PCIVDDIO4
PCIVDDIO5
PCIVDDIO6
PCIVDDIO7
PCIVDDIO8
PCIVDDIO9
PCIVDDIO10
PCIVDDIO11
PCIVDDIO12
PCIVDDIO13
PCIVDDIO14
PCIVDDIO15
PCIVDDIO16
PCIVDDIO17
PCIVDDIO18
PCIVDDIO19
PCIVDDIO20
XTALGND
K16
PCIVDDIO21
VDDCPRE20
VDDCPRE21
VDDCPRE22
GND39
GND40
GND41
U19
U20
V19
GND42
GND43
V20
BIASGND
C15
GMAC_AGND_1
GPHY_PLLGND
W10
J17
A7
PCIPLL_AGND_1
V18_1
C1981
C1980
C1982
EC59
+
.1uF
.1uF
C1999
.1uF
C2000
.1uF
47U/10V/S
.1uF
C2004
C2003
C2001
C2002
.1uF
.1uF
C2005
.1uF
.1uF
.1uF
C1984
.1uF
V33_1
V33_1
A10
C10
VDDIO1
VDDIO2
VDDIO3
PCIPLL_TVCOI
GPHY_TVCOI
C1985
.1uF
EC60
+
47U/10V/S
E20
G20
H20
M20
N18
U13
W14
W15
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
GMAC_AVDD_PLLVDD3
GPHY_PLLVDD2
PCIPLL_AVDD_PLLVDD1
XTALVDD_VDDC
GMAC_TVCOI
T11C7K19
V13_1
C1987
C1986
.1uF
.1uF
Place these CAPs close to power pins of BCM5701
W16
W18
Y10
Y11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
PCIPLL_A3VDD
2
1
V18_PLL
V10
VCC3
K20
B8
B7
L20
V18_1
V18_PLL
AVDD18
AVDD25
2_2UF
Place these CAPs and L2 close to power pins of BCM5701
V18_1
R1858 0
L62
1 2
600Ohm_100Mhz
C1965
C1964
C1963
100PF
1000pF
1000pF
V18_1
R1860 0
L63
1 2
600Ohm_100Mhz
C1967
C1968
C1966
100PF
1000pF
1000pF
VCC25
R1861 0
L64
1 2
600Ohm_100Mhz
C1970
+
C1969
1000pF
Place these CAPs and L3 close to power pins of BCM5701
Place these CAPs and L4 close to power pins of BCM5701
A A
C2008
.1uF
C2009
.1uF
5
C2012
.1uF
.1uF
.01uF
.1uF
C2013
C2011
C2010
C2014
C2015
.01uF
.01uF
Place these CAPs close to power pins of BCM5701
C2017
C2016
.01uF
.01uF
4
C2018
C2019
.01uF
.01uF
C2020
C2021
C2022
.01uF
.01uF
.01uF
C2023
C2024
.01uF
3
VCC3
C2025
.01uF
EC61
+
.01uF
47U/10V/S
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
BCM5701 POWER PINS
Last Revision Date:
Monday, August 20, 2001
Sheet
1
42 75
of
Rev
0A
Page 44
5
4
3
2
1
VCC3
Q25
SD
1
8
2
7
3
6
132
GS
R1850
100K
VAUXIN_EN*
Q29 2N7002
VAUX18_EN*
D
1
132
GS
Q27
Q28A
S
G
2
D
5
G
SI4465
4
2N7002
VAUXM
7 8
D
SI4965DY
Q31 MOSF1N02
R1849
4.7K
Q28B
563
D
D
132
GS
D D
R1848
4.7K
BCM5701_GPIO241
3V_STBY
C1961
+
C1960
2_2UF
C C
BCM5701_GPIO041
1000pF
132
GS
R1857 10K
R1855
4.7K
D
V18_1
V33_1
S
R1853
G
4.7K
4
VCC3
R1856
Q30 2N7002
4.7K
B B
Option for WOL Circuit
Need to use an External Voltage Regulator only for Pass1 of BCM5701, attached items can be removed on the next pass.
V13_1
VCC25
U201
8
IN
5
C2054
C2055
+
0.01uF 10UF
A A
5
SHDN_N
7
GND0
4 3
NC GND1
LT1963ES8
SENSE/ADJ
GND2
OUT
V13_OUT
1
V13_ADJ
2 6
R1935
1K _1%
VOUT=1.21(1+R2/R1)+(IADJ)(R2) IADJ=3 UA at 25
4
50Ohm_100Mhz
L65
1 2
R193475RST
C2056
1000pF
C2057
10UF
+
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
BCM5701 POWER GEN
Last Revision Date:
Tuesday, August 21, 2001
Sheet
1
43 75
of
Rev
0A
Page 45
A
VCC3
PDOWN0
VCC
R698
1K
PCIIRQ#11
4 4
3 3
2 2
1 1
PCIIRQ#1150
P2_SL1_PRSNT#1
P2_SL1_PRSNT#2
PCICLK_P2_SLT140
P2_DEVSEL#36,41
P2_PCIXCAP36
P2_M66EN36,41
P2_ACK64#36
PCICLK_P2_SLT1
P2_REQ#0
P2_AD31 P2_AD29
P2_AD27 P2_AD25
P2_CBE#3
P2_AD23
P2_AD21 P2_AD20 P2_AD19
P2_AD17
P2_CBE#2
P2_IRDY#36,41
P2_PLOCK#36
P2_PERR#36,41,50
P2_SERR#36,41,50
C868
0.01uF
P2_IRDY#
P2_DEVSEL# P2_PCIXCAP
P2_PLOCK# P2_PERR#
P2_SERR#
P2_CBE#1
P2_AD14
P2_AD12 P2_AD10
P2_M66EN
P2_AD8
P2_AD7
P2_AD5 P2_AD3
P2_AD1
P2_ACK64#
P2_CBE#4
P2_AD63
P2_AD61
P2_AD59 P2_AD57
P2_AD55 P2_AD53
P2_AD51 P2_AD49
P2_AD47 P2_AD45
P2_AD43 P2_AD41
P2_AD39 P2_AD37
P2_AD35 P2_AD33
P2_AD[0..63]36,41
A
PCI SLOT6
-12V
J27
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94
CONN_PCI64_3_3V_SOCKET
B
VCC3
VCC
+12V_IO
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94
B
R697 8.2K
PDOWN0
PCIIRQ#10
P2_PCIRST#
P2_GNT#0
P2_PCI_PME#
P2_AD30
P2_AD28 P2_AD26
P2_AD24 P2_IDSEL0
P2_AD22
P2_AD18 P2_AD16
P2_FRAME#
P2_TRDY#
P2_STOP#
P2_SDONE P2_SBO#
P2_PAR
P2_AD15
P2_AD13 P2_AD11
P2_AD9
P2_CBE#0
P2_AD6 P2_AD4
P2_AD2 P2_AD0
P2_REQ64#
P2_CBE#7 P2_CBE#5P2_CBE#6
P2_PAR64
P2_AD62
P2_AD60 P2_AD58
P2_AD56 P2_AD54
P2_AD52 P2_AD50
P2_AD48 P2_AD46
P2_AD44 P2_AD42
P2_AD40 P2_AD38
P2_AD36 P2_AD34
P2_AD32
VCC
PCIIRQ#10 50
P2_PCIRST# 36,41
P2_GNT#0 36,38
P2_PCI_PME# 58
R699
2K
P2_FRAME# 36,41
P2_TRDY# 36,41
P2_STOP# 36,41
P2_PAR 36,41
P2_REQ64# 36,41
P2_PAR64 36,41
P2_AD18
P2_GNT#[0..6]36,38,41
C
P2_REQ#[0..6]36,41
VCCVCC33VSB
EC62
C870
C875
C880
0.01uF
0.01uF
0.01uF
+
1000U/6.3V
C871
0.01uF
C876
0.01uF
C881
0.01uF
EC63
+
1000U/6.3V
EC64
+
1000U/6.3V
P2_CBE#[0..7]36,41
RN31 8P4R-4.7K
P2_GNT#0 P2_GNT#2 P2_GNT#3 P2_GNT#1
P2_GNT#4
P2_GNT#5
S2_GNT#[0..5]36,38,45
C
P2_GNT#6
S2_GNT#2 S2_GNT#3 S2_GNT#1 S2_GNT#0
S2_GNT#4
S2_GNT#5
1 2 3 4 5 6 7 8
R2105 4.7K
R2106 4.7K
R2107 4.7K
RN32 8P4R-4.7K
1 2 3 4 5 6 7 8
R2108 4.7K
R2109 4.7K
P2_REQ#0 P2_REQ#1 P2_REQ#2 P2_REQ#4 P2_REQ#6 P2_REQ#3 P2_REQ#5
C872
0.01uF
C877
0.01uF
C882
0.01uF
P2_CBE#0 P2_CBE#1 P2_CBE#2 P2_CBE#3 P2_CBE#4 P2_CBE#5 P2_CBE#6 P2_CBE#7
C873
C878
C883
0.01uF
0.01uF
0.01uF
VCC3
D
VCC3
D
C874
C879
C884
0.01uF
0.01uF
0.01uF
E
VCC3
2K7
P2_REQ#1 P2_REQ#2 P2_M66EN
P2_PAR64
P2_REQ#0
P2_SL1_PRSNT#2 P2_SL1_PRSNT#1
P2_REQ64# P2_ACK64#
P2_PAR P2_SERR# P2_SBO#
P2_REQ#4 P2_REQ#6 P2_REQ#3 P2_REQ#5
P2_DEVSEL# P2_TRDY# P2_IRDY# P2_FRAME#
P2_SDONE P2_PERR# P2_PLOCK# P2_STOP#
VCC
P2_AD35 P2_AD33 P2_AD34 P2_AD32
P2_AD37 P2_AD36 P2_AD38 P2_AD39
P2_AD40 P2_AD42 P2_AD41 P2_AD43
P2_AD44 P2_AD45 P2_AD46 P2_AD47
P2_AD48 P2_AD50 P2_AD49 P2_AD51
P2_AD52 P2_AD53 P2_AD54 P2_AD55
P2_AD56 P2_AD57 P2_AD58 P2_AD59
P2_AD60 P2_AD61 P2_AD63 P2_AD62
P2_CBE#4 P2_CBE#5 P2_CBE#6 P2_CBE#7
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
R1902
2K7
R1903
2K7
R696
R1842
2K7
RP2K7
RP341
1 8 2 7 3 6 4 5
RP2K7
RP342
1 8 2 7 3 6 4 5
RP2K7
RP343
1 8 2 7 3 6 4 5
RP2K7
RP344
1 8 2 7 3 6 4 5
RP2K7
RP345
1 8 2 7 3 6 4 5
RP2K7
RP346
1 8 2 7 3 6 4 5
RP8K2
RP347
1 8 2 7 3 6 4 5
RP8K2
RP348
1 8 2 7 3 6 4 5
RP8K2
RP349
1 8 2 7 3 6 4 5
RP8K2
RP350
1 8 2 7 3 6 4 5
RP8K2
RP351
1 8 2 7 3 6 4 5
RP8K2
RP352
1 8 2 7 3 6 4 5
RP8K2
RP353
1 8 2 7 3 6 4 5
RP8K2
RP354
1 8 2 7 3 6 4 5
RP8K2
RP355
1 8 2 7 3 6 4 5
CIOBX2_PCIXP2_SLOT1
Last Revision Date:
Tuesday, August 21, 2001
Sheet
E
of
44 75
Rev
0A
Page 46
A
VCC3
VCC VCC3
PDOWN3
R692
1K
4 4
PCICLK_S2_SLT140
3 3
S2_IRDY#36
S2_DEVSEL#36
S2_PCIXCAP36
S2_PLOCK#36
S2_PERR#36,50
S2_SERR#36,50
S2_M66EN36
S2_ACK64#36
2 2
1 1
PCIIRQ#1550
S2_REQ#036
C847
0.01uF
PCIIRQ#15
S2_SL1_PRSNT#1
S2_SL1_PRSNT#2
PCICLK_S2_SLT1
S2_REQ#0
S2_AD31 S2_AD29
S2_AD27 S2_AD25
S2_CBE#3
S2_AD23
S2_AD21 S2_AD19
S2_AD17
S2_CBE#2
S2_IRDY#
S2_DEVSEL#
S2_PLOCK#
S2_PERR#
S2_SERR#
S2_CBE#1
S2_AD14
S2_AD12 S2_AD10
S2_M66EN
S2_AD8
S2_AD7
S2_AD5 S2_AD3
S2_AD1
S2_ACK64#
S2_CBE#6 S2_CBE#4
S2_AD63 S2_AD61
S2_AD59 S2_AD57
S2_AD55 S2_AD53
S2_AD51 S2_AD49
S2_AD47 S2_AD45
S2_AD43 S2_AD41
S2_AD39 S2_AD37
S2_AD35 S2_AD33
S2_AD[0..63]36
PCI SLOT4
-12V
J25
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94
CONN_PCI64_3_3V_SOCKET
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94
S2_CBE#[0..7]36
A
+12V_IO
VCC
B
VCC3
B
R690 8.2K
PDOWN3
PCIIRQ#14
3VSB
S2_PCIRST#
S2_GNT#0
S2_PCI_PME#
S2_AD30
S2_AD28 S2_AD26
S2_AD24 S2_IDSEL0
S2_AD22 S2_AD20
S2_AD18 S2_AD16
S2_FRAME#
S2_TRDY#
S2_STOP#
S2_SDONE S2_SBO#
S2_PAR
S2_AD15
S2_AD13 S2_AD11
S2_AD9
S2_CBE#0
S2_AD6 S2_AD4
S2_AD2 S2_AD0
S2_REQ64#
S2_CBE#7 S2_CBE#5
S2_PAR64
S2_AD62
S2_AD60 S2_AD58
S2_AD56 S2_AD54
S2_AD52 S2_AD50
S2_AD48 S2_AD46
S2_AD44 S2_AD42
S2_AD40 S2_AD38
S2_AD36 S2_AD34
S2_AD32
VCC
PCIIRQ#14 50
S2_PCIRST# 36
S2_GNT#0 36,38,44
S2_PCI_PME# 58
S2_AD18
R1772
2K
S2_FRAME# 36
S2_TRDY# 36
S2_STOP# 36
S2_PAR# 36
S2_REQ64# 36
S2_PAR64# 36
C848
C849
0.01uF
C854
C858
C859
0.01uF
S2_CBE#0 S2_CBE#1 S2_CBE#2 S2_CBE#3 S2_CBE#4 S2_CBE#5 S2_CBE#6 S2_CBE#7
0.01uF
0.01uF
0.01uF
C850
0.01uF
C855
0.01uF
C860
0.01uF
EC67
+
1000U/6.3V
C
PCIIRQ#1350
PCICLK_S2_SLT240
S2_REQ#136
C1946
0.01uF
VCC3
C852
C851
0.01uF
0.01uF
C856
C857
0.01uF
0.01uF
VCC
C862
C861
0.01uF
0.01uF
VCC3
EC68
+
1000U/6.3V
C
PDOWN4
R1770
1K
PCIIRQ#13
S2_SL2_PRSNT#1
S2_SL2_PRSNT#2
PCICLK_S2_SLT2
S2_REQ#1
S2_AD31 S2_AD29
S2_AD27 S2_AD25
S2_CBE#3
S2_AD23
S2_AD21 S2_AD19
S2_AD17
S2_CBE#2
S2_IRDY#
S2_DEVSEL#
S2_PCIXCAP
S2_PLOCK# S2_PERR#
S2_SERR#
S2_CBE#1
S2_AD14
S2_AD12 S2_AD10
S2_M66EN
S2_AD8
S2_AD7
S2_AD5 S2_AD3
S2_AD1
S2_ACK64#
S2_CBE#6 S2_CBE#4
S2_AD63 S2_AD61
S2_AD59 S2_AD57
S2_AD55 S2_AD53
S2_AD51 S2_AD49
S2_AD47 S2_AD45
S2_AD43 S2_AD41
S2_AD39 S2_AD37
S2_AD35 S2_AD33
VCC
EC65
+
1000U/6.3V
VCC3
VCC
PCI SLOT5
-12V +12V_IO
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92
3VSB
+
B93 B94
CONN_PCI64_3_3V_SOCKET
S2_PCIRST#
EC66 100U/16V
J26
D
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94
C2195 X_104P
D
VCC
VCC3
R1769 8.2K
PDOWN4
PCIIRQ#12
3VSB
S2_PCIRST#
S2_GNT#1
S2_PCI_PME#
S2_AD30
S2_AD28 S2_AD26
S2_AD24 S2_IDSEL1
S2_AD22 S2_AD20
S2_AD18 S2_AD16
S2_FRAME#
S2_TRDY#
S2_STOP#
S2_SDONE S2_SBO#
S2_PAR
S2_AD15
S2_AD13 S2_AD11
S2_AD9
S2_CBE#0
S2_AD6 S2_AD4
S2_AD2 S2_AD0
S2_REQ64#
S2_CBE#7 S2_CBE#5
S2_PAR64
S2_AD62
S2_AD60 S2_AD58
S2_AD56 S2_AD54
S2_AD52 S2_AD50
S2_AD48 S2_AD46
S2_AD44 S2_AD42
S2_AD40 S2_AD38
S2_AD36 S2_AD34
S2_AD32
VCC
S2_M66EN
PCIIRQ#12 50
S2_GNT#1 36,38,44
2K
R1771
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
S2_PAR64
S2_SL1_PRSNT#2 S2_SL2_PRSNT#2 S2_SL2_PRSNT#1 S2_SL1_PRSNT#1
S2_ACK64# S2_REQ64# S2_SBO# S2_SDONE
S2_FRAME# S2_REQ#1 S2_REQ#0
S2_AD19
S2_REQ#4
S2_REQ#536
S2_REQ#2
S2_REQ#236
S2_REQ#5
S2_REQ#436
S2_REQ#3
S2_REQ#336
S2_STOP# S2_DEVSEL# S2_TRDY# S2_IRDY#
S2_PAR S2_SERR# S2_PERR# S2_PLOCK#
Micro Star Restricted Secret
CIOBX2_PCIXP2_SLOT2&3
E
R689 R1843
RP326
1 8 2 7 3 6 4 5
R1904 R1905 R1906 R1910
R1907 R1908 R1909
RP329
1 8 2 7 3 6 4 5
RP330
1 8 2 7 3 6 4 5
RP331
1 8 2 7 3 6 4 5
S2_AD32 S2_AD34 S2_AD33 S2_AD35
S2_AD36 S2_AD37 S2_AD38 S2_AD39
S2_AD40 S2_AD42 S2_AD41 S2_AD43
S2_AD44 S2_AD45 S2_AD46 S2_AD47
S2_AD48 S2_AD50 S2_AD49 S2_AD51
S2_AD52 S2_AD53 S2_AD54 S2_AD55
S2_AD56 S2_AD57 S2_AD58 S2_AD59
S2_AD60 S2_AD61 S2_AD63 S2_AD62
S2_CBE#4 S2_CBE#5 S2_CBE#6 S2_CBE#7
Last Revision Date:
Tuesday, August 21, 2001
Sheet
E
2K7 2K7
RP2K7
2K7 2K7 2K7 2K7
RP2K7
RP2K7
RP2K7
RP332
1 8 2 7 3 6 4 5
RP333
1 8 2 7 3 6 4 5
RP334
1 8 2 7 3 6 4 5
RP335
1 8 2 7 3 6 4 5
RP336
1 8 2 7 3 6 4 5
RP337
1 8 2 7 3 6 4 5
RP338
1 8 2 7 3 6 4 5
RP339
1 8 2 7 3 6 4 5
RP340
1 8 2 7 3 6 4 5
45 75
2K7 2K7 2K7
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
RP8K2
Rev
0A
of
Page 47
A
4 4
B
C
D
E
PLACE THESE CLOSE TO CMIC
VCC25
VCC3
RP356
RP357
3 3
T_IMB_D_R0 T_IMB_D_R2 T_IMB_D_R1 T_IMB_D_R3
T_IMB_PAR_R T_IMB_CLK_R T_IMB_CON_R
T_IMB_D_T0
T_IMB_D_T3 T_IMB_D_T2
T_IMB_PAR_T T_IMB_CLK_T T_IMB_CON_T
2 2
T_IMB_D_R[0..3] 12,50
T_IMB_PAR_R 12,50 T_IMB_CLK_R 12,25 T_IMB_CON_R 12,50
T_IMB_D_T[0..3] 12,50
T_IMB_PAR_T 12,50 T_IMB_CLK_T 25,50 T_IMB_CON_T 12,50
VCC3
RP358 RP100R
RP359 RP100R
18 27 36 45 18 27
RP100R
36 45
RP100R
PLACE THESE CLOSE TO CSB5
1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5
T_IMB_D_R0 T_IMB_D_R2 T_IMB_D_R1 T_IMB_D_R3 T_IMB_PAR_R T_IMB_CLK_R T_IMB_CON_R
T_IMB_D_T1 T_IMB_D_T3
T_IMB_D_T2 T_IMB_PAR_TT_IMB_D_T1 T_IMB_D_T0 T_IMB_CLK_T T_IMB_CON_T
RP443
RP444
RP100R
RP100R
RP445 RP100R
1 8 2 7 3 6 4 5
RP446 RP100R
1 8 2 7 3 6 4 5
18 27 36 45 18 27 36 45
VCC25
C892
0.1uF
C894
0.1uF
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
THIN_IMB_TERMINATION
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
46 75
Rev
0A
Page 48
A
B
C
D
E
VCC25
VCC3
C1541
C1542
C1864
C1508
C1509
C1510
C1511
C1512
C1513
4 4
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
C1514
0.01uF
0.01uF
0.01uF
0.01uF
C1543
0.01uF
V33_1
VCC_P
VCC3
3 3
2 2
C1515
0.01uF
C1516
0.01uF
C1517
0.01uF
C1518
0.01uF
C1519
0.01uF
C1521
0.01uF
C1522
0.01uF
VCC3
C1533
0.01uF
C1535
0.01uF
C1536
0.01uF
VCC_P
C1538
0.01uF
C1525
0.01uF
VCC25
VDD_IMBVDD_IMB
C1523
0.01uF
C1526
0.01uF
C1524
0.01uF
C1527
0.01uF
VCC25
VCC3
C1865
0.01uF
C1866
0.01uF
C1867
0.01uF
C1530
0.01uF
C1868
0.01uF
C1869
0.01uF
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
SWITCHING CAPs
Last Revision Date:
Sheet
Monday, August 20, 2001
E
of
47 75
Rev
0A
Page 49
8
7
6
5
4
3
2
1
R2023
10K
R2030
10K
R2021
R2029
232KRST
5.1KRST
120KRST
VCC3
R2019
4.7K
27K
R2028
4.7K
27K
VRM_VID[0..4]
VCCP1D
VCC1_5D
VCC3_3D
VCCP2D
VBATDD
J53
1 2
YJ102
R322
-12VIN
R2003
5VSBD
R2006
-5VIN
R2008 X_0
R2009 X_0
R2012 4.7K
R2013 4.7K
D64
1N4148S
3 2 1
CPUFAN1 YJ103-BO
D66
1N4148S
3 2 1
CPUFAN3 YJ103-BO
7
VREF782
56KRST
GNDA
7.5KRST
VREF782
56KRST
VCC
SM Bus Slave Address = 00101A2A1A0 = 00101101b
+12V
Q35
SI2303DS-S-SOT23
+
EC42 X_10U/16V
+12V
Q39
SI2303DS-S-SOT23
+
EC44 X_10U/16V
Winbond W782D Hardware Monitor
VCC
L71 80S/0805
L72 80S/0805
VREF782
T3
T1 RCC_SCL
VRM_VID0
R2014
4.7K
R2016 4.7K
1K
R2017
R2026 4.7K
1K
R2027
6
GNDA
HWM_14.318M22
37 38 39 40 41 42 43 44 45 46 47 48
VCC
R2015 4.7K
DS
DS
C2122 104P
VREF VTIN3/PIITD3 VTIN2/PIITD2 VTIN1/PIITD1 VID0 OVT# ARDMSEL SMI# SA2/IA2 SA1/IA1 SA0/IA0 CS#
Q37 YFET-NDS7002AS
G
R2091 470
Q40 YFET-NDS7002AS
G
R2093 470
36
-5VIN
5VSB
VBAT
+5VIN
VINR0
-12VIN
+12VIN
+3.3VIN
VCOREA
IOR#
IOW#
CLKIND7D6D5D4D3D2
1234567891011
PWMOUT1
5
VRM_VID3
2526272829303132333435
VID3
GNDA
GPO#/BBEP
PWMOUT1
FAN1 FAN2
FAN3/PWMOUT2
CASEOPEN
GNDD
D1/PWMOUT4
D0/PWMOUT3
VID1
12
82WI782D
VRM_VID1 PWMOUT2 PWMOUT3
VCCP1D VCC1_5D VCC3_3D VCCP2D
-12VIN VBATDD 5VSBD
-5VIN GNDA BEEP/GPO#
VID2
SDA
SCL
VID4
MR
VCC
U213
VRM_VID2
24
PWMOUT1
23
RCC_SDA
22 21
FAN1IN
20
FAN2IN
19
FAN3IN
18
VRM_VID4
17
CASEOPEN
16 15 14 13
VCC
R1994
4.7K
ACTICE HIGH
BEEP/GPO#
R1997 510
VREF782
R2004 10KRST
R2007
D65
VREF782T2
R2090
VREF782 GNDA
10KRST
+12V
R2018 4.7K
R2020
Q36
+
EC43 X_10U/16V
SI2303DS-S-SOT23
CPUFAN2 YJ103-BO
3
3 2 1
RCC_SDA 12,15,27,37,41,69 RCC_SCL 12,15,27,37,41,69
R2011 10M
FAN3IN PWMOUT3
4
RSTDRV 65
VCC
C2124 104P
R2022
4.7K
R2024
27K
R2025
10K
RTCVCC
1N4148S
B
30KRST
1K
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
2
ALARM 62
C
Q34
E
2N3904S
RT2
GNDA
YT103S-1N
T1
RT3
T2
RT1
T3
Q38
DS
YFET-NDS7002AS
G
SYSTEM
GNDA
YT103S-1N
YT103S-1N
SYSTEM
R2092 470
Micro Star Restricted Secret
HARDWARE MONITOR
Last Revision Date:
Tuesday, August 21, 2001
Sheet
48 75
of
1
Rev
0A
VRM_VID[0..4]8,67
R1995 10K
D D
C C
B B
A A
VCC_P
R1996 10K
VCC25
R1998 10K
VCC3
R1999 10K
VDD_IMB
R2000
-12V
R2001 10K
RTCVCC
R2002
5VSB
TP14
R2005
1
SM_SMI_OUT#50
SM_TEMP_ALERT#50
CASEOPEN
FAN1IN
FAN2IN PWMOUT2
8
Page 50
A
B
C
D
E
VCC3
DO NOT STUFF
D_CBE#0 D_CBE#1 D_CBE#2 D_CBE#3
PCIRST3#
D_GNT#0 D_GNT#1 D_GNT#2
D_REQ#0 D_REQ#1 D_REQ#2
R1329 0_OHM
IRQ14
IRQ15
R1244 10K
NMI 8
D_AD[0..31] 51,52,55
D_AD0
T4
D_AD1
V1
D_AD2
U2
D_AD3
T3
D_AD4
U1
D_AD5
T2
D_AD6
P4
D_AD7
T1
D_AD8
P3
D_AD9
R1
D_AD10
P2
D_AD11
P1
D_AD12
N3
D_AD13
N2
D_AD14
N1
D_AD15
M4
D_AD16
J2
D_AD17
J3
D_AD18
H1
D_AD19
H2
D_AD20
H3
D_AD21
G1
D_AD22
G2
D_AD23
G3
D_AD24
F2
D_AD25
G4
D_AD26
F3
D_AD27
E3
D_AD28
D1
D_AD29
C1
D_AD30
E4
D_AD31
D3
R3 M2
J1 F1
M1 K1
L4 L3 J4
K3
L1
L2 V7 C2
Y6 V9
V4 U5
Y3
W5
Y5 V6
A6 C7 B6
C16
B4 A3
Y18
Y10
B
U63A
PCIAD0 PCIAD1 PCIAD2 PCIAD3 PCIAD4 PCIAD5 PCIAD6 PCIAD7 PCIAD8 PCIAD9 PCIAD10 PCIAD11 PCIAD12 PCIAD13 PCIAD14 PCIAD15 PCIAD16 PCIAD17 PCIAD18 PCIAD19 PCIAD20 PCIAD21 PCIAD22 PCIAD23 PCIAD24 PCIAD25 PCIAD26 PCIAD27 PCIAD28 PCIAD29 PCIAD30 PCIAD31
CBE#(0) CBE#[1] CBE#[2] CBE#[3]
FRAME# DEVSEL# IRDY# TRDY# PAR STOP# SERR# PERR# FERR PCILOCK#
PCIRST# PCICLK
PGNT#[0]/XARB_STRAP PGNT#[1]/XROM_STRAP PGNT#[2]/IMB_STRAP
PCIREQ#[0]/IDE_GNT# PCIREQ#[1]/IDE_REQ# PCIREQ#[2]
SERIRQ PIRQ0 PIRQ1 PIRQ_LATCH
P_IDEIRQ S_IDEIRQ
MEMOFF#/APICCLK
NMI
ROSB5
USB_PWREN
R2031 1K
DD_P(0) DD_P(1) DD_P(2) DD_P(3) DD_P(4) DD_P(5) DD_P(6) DD_P(7) DD_P(8)
DD_P(9) DD_P(10) DD_P(11) DD_P(12) DD_P(13) DD_P(14) DD_P(15)
DD_S(0)
DD_S(1)
DD_S(2)
DD_S(3)
DD_S(4)
DD_S(5)
DD_S(6)
DD_S(7)
DD_S(8)
DD_S(9) DD_S(10) DD_S(11) DD_S(12) DD_S(13) DD_S(14) DD_S(15)
IDEDAKP# IDEDRQ_P
P_IDE_IOR
P_IDE_IOW
P_IDECS#(0)
P_IDECS01
IDEDAKS# IDEDRQ_S
S_IDE_IOR
S_IDE_IOW
S_IDECS00 S_IDECS10
IDE_DA(0) IDE_DA(1) IDE_DA(2)
IN_IORDY_S IN_IORDY_P
USBCLK
USBP2P USBP2N USBP3P USBP3N
USBP1N
USBP1P USBPON USBPOP
PWREN
USB_IN_EN
USB_OVRCUR
VCC3
F18 E19 D20 E18 G18 C20 E17 D18 C18 B19 A20 A19 B18 B17 C17 D16
C13 B13 A13 D12 C12 B12 B11 C11 A11 A10 B10 C10 D10 A9 C9 D9
D14 A17
E20 G17 H18 F19
B15 C14
B14 A14 B8 C8
G20 G19 F20
A8 A18
W12
V13 Y14 Y13 W13
W15 V14 Y15 W14 W18 W17 V18
PIDE_DR0 PIDE_DR1 PIDE_DR2 PIDE_DR3 PIDE_DR4 PIDE_DR5 PIDE_DR6 PIDE_DR7 PIDE_DR8 PIDE_DR9 PIDE_DR10 PIDE_DR11 PIDE_DR12 PIDE_DR13 PIDE_DR14 PIDE_DR15
SIDE_DR0 SIDE_DR1 SIDE_DR2 SIDE_DR3 SIDE_DR4 SIDE_DR5 SIDE_DR6 SIDE_DR7 SIDE_DR8 SIDE_DR9 SIDE_DR10 SIDE_DR11 SIDE_DR12 SIDE_DR13 SIDE_DR14 SIDE_DR15
R_PIDE_IOR# R_PIDE_IOW# R_PIDE_CS0# R_PIDE_CS1#
R_SIDE_DACK# SIDE_DRQ
R_SIDE_IOR# R_SIDE_IOW# R_SIDE_CS0# R_SIDE_CS1#
R_PIDE_A0 R_PIDE_A1
R_PIDE_A2
IDE_CHRDY_S IDE_CHRDY_P
USB_PWREN
VCC3
R_IDE_CHRDY_P R_IDE_CHRDY_S
C
PCIRST3#
PIDE_D7
R_PIDE_IOR# R_PIDE_A2 R_PIDE_A0
PIDE_DR0 R_PIDE_CS1# PIDE_DR3 PIDE_DR1 PIDE_DR6 PIDE_DR7 PIDE_DR8 PIDE_DR9 PIDE_DR14 PIDE_DR12 PIDE_DR13 PIDE_DR15
SIDE_DR0 R_SIDE_IOR# R_SIDE_IOW# SIDE_DR1 SIDE_DR6 SIDE_DR7 SIDE_DR3 SIDE_DR11 SIDE_DR9 SIDE_DR10 SIDE_DR13 SIDE_DR12 SIDE_DR14 R_SIDE_CS0# R_SIDE_CS1# SIDE_DR15
R606
PIDE_DR11 PIDE_DR10 PIDE_DR5 PIDE_DR2
R607
1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5
33
PIDE_DACK#R_PIDE_DACK# PIDE_DRQ
1 8 2 7 3 6 4 5
RP287
33
SIDE_DACK# SIDE_DRQ
SIDE_DR2 SIDE_DR5 SIDE_DR4 SIDE_D4 SIDE_DR8
R_PIDE_CS0# R_PIDE_IOW# PIDE_DR4 R_PIDE_A1
RP279
RP33R
RP280
RP33R
RP281
RP33R
RP282
RP33R
RP283
RP284
RP285
RP286
RP288
1 8 2 7
RP33R
3 6 4 5
RP289
1 8
RP33R
2 7 3 6 4 5
PIDE_IOR#
PIDE_A2
PIDE_D0
PIDE_CS1# PIDE_D15
PIDE_D3 PIDE_D1 PIDE_D6 PIDE_D7 PIDE_D8 PIDE_D9 PIDE_D14 PIDE_D12 PIDE_D13 PIDE_D15
RP33R
SIDE_D0 SIDE_IOR# SIDE_IOW# SIDE_D1
RP33R
SIDE_D6 SIDE_D7 SIDE_D3 SIDE_D11
RP33R
SIDE_D9 SIDE_D10 SIDE_D13 SIDE_D12
RP33R
SIDE_D14 SIDE_CS0# SIDE_CS1# SIDE_D15
PIDE_D11 PIDE_D10 PIDE_D5 PIDE_D2
RP33R
SIDE_D2 SIDE_D5
SIDE_D8
PIDE_CS0#
PIDE_IOW# PIDE_D4
PIDE_A1
PIDE_D6 PIDE_D5 PIDE_D4 PIDE_D3PIDE_A0 PIDE_D2 PIDE_D1 PIDE_D0
R_IDE_DRQ_P
PIDE_IOW# PIDE_IOR#
R_IDE_CHRDY_P
PIDE_DACK#
R_IRQ_P
PIDE_A1
PIDE_A0 PIDE_CS0#
PCIRST3# SIDE_D7 SIDE_D6 SIDE_D5 SIDE_D4 SIDE_D3 SIDE_D2 SIDE_D1 SIDE_D0
R_IDE_DRQ_S
SIDE_IOW# SIDE_IOR#
R_IDE_CHRDY_S
SIDE_DACK#
R_IRQ_S
PIDE_A1
PIDE_A0
USBCLK48M 22 IDE_LED 62,65
USBP2P 60 USBP2N 60 USBP3P 60 USBP3N 60
USBP1N 60 USBP1P 60 USBP0N 60 USBP0P 60
PCIRST3#
R624
R623
4.7K
4.7K
Place these components close to CSB
R613 2.2K R615 2.2K
PCIRST3# 65
R_IDE_DRQ_P
R_IDE_DRQ_S
R626
R625
VCC3
5.6K
5.6K
D
IRQ14
IDE_CHRDY_P
PIDE_DRQ
IRQ15
IDE_CHRDY_S
SIDE_DRQ
R599
8.2K
4 4
R602
RES_NOPOP
D_PCIGNT#
CSB_PGNT#1
CSB_PGNT#2
3 3
R601
R600
8.2K
RES_NOPOP
R603
1K
0 = Enable External Arbiter (Disable internal Arbiter)
1 = Disable External Arbiter (Enable internal Arbiter)*
0 = Enable X-Bus Logic *
1 = Disable X-Bus Logic
1 = Enable IMB Logic *
0 = Disable IMB Logic
D_GNT#0 D_GNT#1 D_GNT#2
DO NOT STUFF
R604
RES_NOPOP
STRAPPING OPTION
* = Used in this design
D_CBE#[0..3]51,52,55
D_FRAME#51,52,55
D_DEVSEL#51,52,55
D_IRDY#51,52,55
D_TRDY#51,52,55
D_PAR51,52,55
D_STOP#51,52,55 D_SERR#50,51,55 D_PERR#50,51,55
RSB_FERR#8
D_PLOCK#51
PCIRST3#65
PCICLK_RSB23
D_GNT#051
D_GNT#151
D_GNT#255
SER_ISA_IRQ0_1558 SER_PCI_IRQ0_1550
PIRQ_LTCH50
VCC25
R620 4.7K
D_REQ#051
D_REQ#151
D_REQ#255
MEMOFF#11,15
2 2
VCC3
R1517 4.7K
R610 4.7K
R611 4.7K
VCC3
1 1
VCC
C1393
0.1uF
A
PIDE_D[0..15]
J18
1 2
12
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
HEADER_2X20_PIN
SIDE_D[0..15]
J19
1 2
12
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
HEADER_2X20_PIN
Place these components close to OSB
R612 80
R614 80
R619 80
R622 80
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
R_IDE_CHRDY_P
R616 80
R_IRQ_S
R_IDE_CHRDY_S
R621 80
R_IDE_DRQ_S
Micro Star Restricted Secret
SWSB5_PCI_&_IDE_INTERFACE
PIDE_D8 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14
R605 150
PIDE_A2
PIDE_CS1#
SIDE_D8 SIDE_D9 SIDE_D10 SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14 SIDE_D15
R608 150
PIDE_A2
SIDE_CS1#SIDE_CS0#
R_IRQ_P
R_IDE_DRQ_P
Last Revision Date:
Monday, August 20, 2001
Sheet
E
PIDE_D7 SIDE_D7
10K
R617
of
49 75
10K
R618
Rev
0A
Page 51
A
CMIC_FATAL#
CMIC_FATAL#11,15
ALERT#11,15,27,37
P1_SERR#26,29 P1_PERR#26,29
D_PERR#49,51,55 D_SERR#49,51,55
RSB_P2_PROCHOT#8
4 4
R574
4.7K
3 3
T_IMB_D_R[0..3]
2,46
2 2
VCC3
VCC3
DPLL ENABLE STRAPPING
VCC3
R588 4.7K
SM_SMI_OUT#48
R1919 2.7K R1920 2.7K
R1339 4.7K
RSB_P2_IERR#8
SM_TEMP_ALERT#48
T_IMB_D_T[0..3]12,46
T_IMB_CON_T12,46
T_IMB_D_R[0..3]
T_IMB_D_R1 T_IMB_D_R3 T_IMB_D_R0 T_IMB_D_R2
R582 10K
VCC3
LPC_DRQ#58
LPC_FRAME#58,63
RSB_A20M#
RP272 RP2K7
RSB_SCL69 RSB_SDA69
T_IMB_PAR_T12,46
T_IMB_CON_R12,46
T_IMB_PAR_R12,46
T_IMB_CLK_T25,46
T_IMB_CLK_RR25
RSB_STPCLK#10
LPC_AD[0..3]58,63
VCC3
RSB_P1_PROCHOT#8
1 8 2 7 3 6 4 5
RP277
1 8
RP39R
2 7 3 6 4 5
KBD_A20M#57
RSB_PINIT#10,11,57 RSB_A20M#8
XALAT#[0..2]59
VCC3
R1281 4.7K
CMOS_CLR#
1 1
JP23 BER_1X2
33
R1282
VCC3
0.1uF C1433
0.1uF C1434
0.1uF C1435
0.1uF C1436
C1437
0.01uF
A
R564 0_OHM
R1417 0_OHM
P1_SERR# P1_PERR# D_PERR# D_SERR#
P2_PERR#
P2_SERR# S2_PERR# P1_SERR# S2_SERR# P1_PERR# SM_SMI_OUT# PORT_80_CS#
RSB_P1_IERR#8
RSB_SCL RSB_SDA
T_IMB_CLK_RR TIMB_CLKRR
SPKR62
XAD[0..7]59
T_IMB_D_T0 T_IMB_D_T1 T_IMB_D_T2 T_IMB_D_T3
TIMB_DRR1 TIMB_DRR3 TIMB_DRR0 TIMB_DRR2
R578 39 R579 39
R580 39
RSB_A20M#
XWC#59
XRC#59
CMOS_CLR# S1_SERR# D_PERR# S1_PERR#
SM_TEMP_ALERT#
ROM_CS# D_SERR#
R1943 0 R1944 0
TIMB_DRR0 TIMB_DRR1 TIMB_DRR2 TIMB_DRR3
TIMB_CONRR TIMB_PARRR
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
R583 10K
R584 10K
R585 10K
XALAT#0 XALAT#1XALAT#1 XALAT#2 XAD0 XAD1 XAD2 XAD3 XAD4 XAD5 XAD6
XAD7 XWC# XRC#
Don't Populate
C1438
C1439
C1440
0.01uF
0.01uF
0.01uF
0.01uF
C1441
VCC3
B
V3
GEVENT_0
W1
GEVENT_1
W2
GEVENT_2
W3
GEVENT_3
W4
GEVENT_4
Y4
GEVENT_5
Y1
GEVENT_6
Y2
GEVENT_7
Y19
GPCS0L/GEVENT_8
V17
GPCS1L/GEVENT_9
U16
GPCS2L/GEVENT_10
V15
GPM0/GEVENT_11
T20
GPM1/GEVENT_12
T19
GPM2/GEVENT_13
T18
GPM3/GEVENT_14
U18
GPOC3/GEVENT_15
Y16
GEVENT(16)
V12
USBTO1/GEVENT_17
U12
USBIRQ/GEVENT_18
V19
GEVENT_19/PICD0
W20
GEVENT_20/PICD1
U14
FRWP#/GEVENT_21
Y20
ROM_CS#/GEVENT_22
U19
GEVENT_23
U20
GPOC0
V20
GPOC1
T17
GPOC2
L18
I_DATA(0)
M20
I_DATA(1)
M19
I_DATA(2)
M18
I_DATA(3)
K20
I_CONTRO#
L20
I_PARITY
J17
O_DATA(0)
K19
O_DATA(1)
K17
O_DATA(2)
K18
O_DATA(3)
H19
O_CONTROL
H20
O_PARITY
L19
I_CLOCK
J18
O_CLOCK
U11
STPCLK#/SCKREQ#
P17
LAD00X
P19
LAD(1)
R20
LAD02X
P18
LAD03X
N20
LDRQ0
M17
LDRQ1
N18
LFRAME#
V2
FLUSHREQ#
W6
MEMACK#
Y17
KBD_A20#
W9
SPKR
C15
INIT
A15
A20M#
U7
XALAT#[0]
Y7
XALAT#[1]
Y11
XALAT#[2]
A7
XAD[0]
B7
XAD[1]
D5
XAD[2]
C4
XAD[3]
B3
XAD[4]
B2
XAD[5]
A2
XAD[6]
C3
XAD[7]
Y12
XWC#
V11
XRC#
R593 RES_NOPOP R594 RES_NOPOP R595 RES_NOPOP R596 RES_NOPOP R598 RES_NOPOP
C1491
C1492
0.01uF
0.01uF
B
0.01uF
FID1
FID2
257
258
C1493
RSB_CLK_14MHZ22
U63B
NC_R1
NC_R2
NC_R3
D7C6B5A4C5
C1494
0.01uF
NC_R4
ROM_CS#59
NC_R5
M9
0.1uF
GND25
M10
GND26
M11
C1495
GND27
M12
GND28
L9
0.1uF
ROM_CS#
PCIGNT#4 PCIREQ#4
SIO_WAKEUP
SLPBTTNX
SLPX#
SLP_S1 SLP_S3# SLP_S5#
PLLRST
AGND
AVDD
INTR
EXTEVENT
IGNNE#
CPUGNT# CPUREQ#
VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9
VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16
VDD25_1 VDD25_2 VDD25_3 VDD25_4 VDD25_5 VDD25_6 VDD25_7 VDD25_8
VDD25_9 VDD25_10 VDD25_11 VDD25_12
VDD5_1 VDD5_2
IMB_VREF
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20
GND21
GND22
GND23
GND24
L10
L11
L12
VCC25
0.1uF
C1496
OSC
SMI#
ROSB5
C1497
W8
Y8 U9
C19
D2 B1 R19 B16 R18
B20 V10 W10
P20 V8 Y9 V16
U3 M3
A1 A12 A16 A5 B9 D19 E2 J19 N19
W11 W16 W19 W7 K2 R2
D11 D15 D6 F17 F4 K4 L17 R4 U10 U15 U6 R17
V5 E1
J20
D4 D8 D13 D17 H4 H17 N4 N17 U4 U8 U13 U17 J9 J10 J11 J12 K9 K10 K11 K12
VREF_T_IMB
C745 220pF
D_GNT#4 D_REQ#4
R569 1K R570 1K
AVDD_RSB_PLL
R573 150
R575 8.2K
R576 8.2K
VCC3
VREF_T_IMB
VCC25
R597 100_1% R589
C
VCC25
VCC
100_1%
C7461.0uF/10V
C
D_GNT#4 52 D_REQ#4 52
SOFF#
R1708 0_OHM
INTR 8
VCC3
AVDD_RSB_PLL
C1490 22UF_10V
R1306 0
C7470.1uF
S1_SERR#26,30,35 S1_PERR#26,30,35
S2_SERR#36,45 S2_PERR#36,45
P2_SERR#36,41,44 P2_PERR#36,41,44
VCC3
VCC3
22uF/10V/20%
1 2
C1442
+
S1_SERR# S1_PERR#
S2_SERR# S2_PERR#
P2_SERR# P2_PERR#
SIO_WAKEUP 58
SLP_BTN# 62 RSB_SLP# 10
SOFF# 62,64
PS_PWRGD# 11,27,37,64
R577 4.7K
R572 4.7K
RSB_IGNNE# 8 RSB_SMI# 10,58
R571 2.7K
L51 47UH
PCICLK_IRQ123
C1443
+
22uF/10V/20%
VCC3
VCC3
CAP_NOPOP
DO NOT STUFF
C743
CAP_NOPOP
DO NOT STUFF
22uF/10V/20%
D
PCICLK_IRQ023
PIRQ_LTCH49
C742
PIRQ_LTCH
RES_NOPOP
R587
VCC25
C1444
+
D
RES_NOPOP
R581
PCIIRQ#7 PCIIRQ#6 PCIIRQ#5 PCIIRQ#4 PCIIRQ#3 PCIIRQ#2 PCIIRQ#1 PCIIRQ#0
C1499
+
22uF/10V/20%
PCIIRQ#15 PCIIRQ#14 PCIIRQ#13 PCIIRQ#12 PCIIRQ#11 PCIIRQ#10 PCIIRQ#9 PCIIRQ#8
PCIIRQ#351 PCIIRQ#251 PCIIRQ#155 PCIIRQ#041
PCIIRQ#452 PCIIRQ#551 PCIIRQ#629 PCIIRQ#729
PCIIRQ#1144 PCIIRQ#1044
PCIIRQ#930 PCIIRQ#830
PCIIRQ#1245 PCIIRQ#1345 PCIIRQ#1445 PCIIRQ#1545
VCC3
R1516
2.7K
10 11 12 13 14
15
10 11 12 13 14
15
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
E
SOFF#
PCIIRQ#3 PCIIRQ#2 PCIIRQ#1 PCIIRQ#0
PCIIRQ#4 PCIIRQ#5 PCIIRQ#6 PCIIRQ#7
PCIIRQ#11 PCIIRQ#10 PCIIRQ#9 PCIIRQ#8
PCIIRQ#12 PCIIRQ#13 PCIIRQ#14 PCIIRQ#15
R2692
RP263
RP2K7
RP264
1 8 2 7 3 6 4 5
RP266
RP2K7
RP269
1 8 2 7 3 6 4 5
4.7K
C1389
VCC3
U64
SER
16
VCC
A B
8
GND
C D
3
E
4
F
5
G
6
2
1
3 4 5 6
2
1
H
CLK INH SH/LD
74LV165
U66
SER A B C D E F G H
CLK INH SH/LD
74LV165
9
QH
7
QH
VCC3
16
VCC
8
GND
9
7
SER_PCI_IRQ0_15 49
QH
QH
Micro Star Restricted Secret
SWSB5_IMB_GPORTS
Last Revision Date:
Monday, August 20, 2001
Sheet
E
18 27 36 45
RP2K7
18 27 36 45
RP2K7
VCC3
0.1uF
50 75
VCC3
0.1uF C1390
Rev
0A
of
Page 52
A
VCC3
VCC VCC
-12V
4 4
PCIIRQ#3
PCIIRQ#350
D_PCICLK123
3 3
D_DEVSEL#49,52,55
D_PLOCK#49
2 2
D_AD[0..31]49,52,55
D_CBE#[0..3]49,52,55
VCC VCC3
For EMI Requested
C2196
C2197
104P
104P
1 1
C2206
X_10P
D_PCICLK1
D_REQ#0
D_REQ#049
D_AD31 D_AD30 D_AD29
D_AD27 D_AD26 D_AD25
D_CBE#3
D_CBE#349,52,55
D_AD23
D_AD21 D_AD20 D_AD19
D_AD17 D_AD16 D_CBE#2
D_CBE#249,52,55
D_IRDY#
D_IRDY#49,52,55
D_DEVSEL#
D_PLOCK# D_PERR# SDONE1
D_PERR#49,50,55
D_SERR#
D_SERR#49,50,55
D_CBE#1 D_AD15
D_CBE#149,52,55
D_AD14
D_AD12 D_AD11 D_AD10
D_AD8 D_CBE#0 D_AD7
D_AD5 D_AD4 D_AD3
D_AD1 D_AD0
D_AD[0..31]
D_CBE#[0..3]
C2199
C2198
104P
104P
D_PCICLK1
D_PCICLK2
C2207
X_10P
A
C2200
104P
PCI32_1
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
YSLOT120
AD18 INT#[1,2,3,4] REQ#/GNT#[0]
C2201
104P
EC45
+
1000U/6.3V
C2202
104P
C2203
104P
EC46
+
1000U/6.3V
TRST#
RSVD1
RSVD3
RSVD4
RSVD6
IDSEL#
FRAME#
TRDY#
STOP#
SDONE
C/BE0#
REQ64#
C2204
104P
VCC3VCC
+12V
TMS
TDI
+5V INTA# INTC#
+5V
+5V
GND GND
RST#
+5V GNT#
GND
AD30
+3.3V
AD28 AD26
GND
AD24
+3.3V
AD22 AD20
GND AD18 AD16
+3.3V
GND
GND
+3.3V
SBO#
GND
PAR
AD15
+3.3V
AD13 AD11
GND
AD9
+3.3V
AD6 AD4
GND
AD2 AD0
+5V
+5V +5V
EC47
+
1000U/6.3V
B
C2205
104P
B
C
VCC3
+12V
VCC
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
R2606
5.6K
PCIIRQ#2
3VSB
PCIRST2#
D_GNT#0
IO_PCIPME#
D_AD28
D_AD24
R2608 100
D_AD22
D_AD18
D_FRAME#
D_TRDY#
STOP#
SBO#1
D_PAR
D_AD13
D_AD9
D_AD6
D_AD2
1REQ64#1ACK64#
PCIIRQ#2 50
PCIRST2# 52,55,58,65
D_GNT#0 49
IO_PCIPME# 58
D_AD18
D_FRAME# 49,52,55
D_TRDY# 49,52,55
D_STOP# 49,52,55
D_PAR 49,52,55
D_CBE#0 49,52,55
D_REQ#0
D_GNT#0
D_REQ#1
R2612 2.7K
D_GNT#1
R2613 8.2K
R2610 2.7K R2611 8.2K
PCIIRQ#550
D_PCICLK223
D_REQ#149
VCC VCC3
VCC VCC3
VCC3
VCC VCC
-12V
B1 B2 B3 B4 B5
PCIIRQ#5 PCIIRQ#5
D_PCICLK2
D_REQ#1
D_AD31 D_AD30 D_AD29
D_AD27 D_AD26 D_AD25
D_CBE#3 D_AD23
D_AD21 D_AD20 D_AD19
D_AD17 D_AD16 D_CBE#2
D_IRDY#
D_DEVSEL#
D_PLOCK# D_PERR#
D_SERR#
D_CBE#1 D_AD15 D_AD14
D_AD12 D_AD11 D_AD10
D_AD8 D_CBE#0 D_AD7
D_AD5 D_AD4 D_AD3
D_AD1 D_AD0
2ACK64# 2REQ64#
B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
VCC
EC48
+
1000U/6.3V
3VSB
+
EC69 100U/16V
1REQ64# 1ACK64# SDONE1 SBO#1
SDONE2 SBO#2 2ACK64# 2REQ64#
1 2 3 4 5 6 7 8
RN34
1 2 3 4 5 6 7 8
RN35
C
8P4R-2.7K
8P4R-2.7K
D_DEVSEL# D_TRDY# D_IRDY# D_FRAME# D_SERR# D_PERR# D_PLOCK# D_STOP#
PCI32_2
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT1# RSVD2 PRSNT2# GND GND RSVD5 GND CLK GND REQ# +5V AD31 AD29 GND AD27 AD25 +3.3V C/BE3# AD23 GND AD21 AD19 +3.3V AD17 C/BE2# GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE1# AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V ACK64# +5V +5V
YSLOT120
1 2 3 4 6 7 8 9
D
RP455
1 2 3 4 6 7 8 9510
10P8R-2.7K
D
TRST#
INTA# INTC#
RSVD1
RSVD3
RSVD4
RST#
GNT#
RSVD6
AD30 +3.3V AD28 AD26
AD24
IDSEL#
+3.3V AD22 AD20
AD18 AD16 +3.3V
FRAME#
TRDY#
STOP#
+3.3V
SDONE
SBO#
AD15 +3.3V AD13 AD11
C/BE0#
+3.3V
REQ64#
5
10
+12V TMS
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
E
VCC3
+12V
VCC
A1 A2 A3 A4
TDI
A5
+5V
A6 A7 A8
+5V
A9 A10
+5V
A11 A12 A13 A14 A15 A16
+5V
A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43
PAR
A44 A45 A46 A47 A48 A49
AD9
A52 A53 A54
AD6
A55
AD4
A56 A57
AD2
A58
AD0
A59
+5V
A60 A61
+5V
A62
+5V
R2607
5.6K
PCIIRQ#5 PCIIRQ#5
3VSB
PCIRST2#
D_PCIGNT#
IO_PCIPME#
D_AD28
D_AD24
R2609 100
D_AD22
D_AD18
D_FRAME#
D_TRDY#
STOP#
SDONE2 SBO#2
D_PAR
D_AD13
D_AD9
D_AD6
D_AD2
PCIRST2# 52,55,58,65
D_GNT#1 49
D_AD19
VCC
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
PCI SLOT 1 & 2
Last Revision Date:
Tuesday, August 21, 2001
Sheet
E
of
51 75
Rev
0A
Page 53
5
4
3
2
1
D D
D_AD[0..31]49,51,55
C C
B B
A A
5
D_AD0 D_AD1 D_AD2 D_AD3 D_AD4 D_AD5 D_AD6 D_AD7 D_AD8 D_AD9 D_AD10 D_AD11 D_AD12 D_AD13 D_AD14 D_AD15 D_AD16 D_AD17 D_AD18 D_AD19 D_AD20 D_AD21 D_AD22 D_AD23 D_AD24 D_AD25 D_AD26 D_AD27 D_AD28 D_AD29 D_AD30 D_AD31
D_CBE#049,51,55 D_CBE#149,51,55 D_CBE#249,51,55 D_CBE#349,51,55
PCICLK_VGA23
PCIRST2#51,55,58,65
PCIIRQ#450
D_REQ#450
D_FRAME#49,51,55
D_IRDY#49,51,55
D_TRDY#49,51,55
D_DEVSEL#49,51,55
D_STOP#49,51,55
D_PAR49,51,55
D_GNT#450
PCI33EN53
VGAEN
D_REQ#4
D_GNT#4 PCI33EN
V16
W16
V15 Y16
W15
Y15 V14
W14
Y14 V12 Y13
W12
Y12 V11 Y11
W11
V8 W8 W7
Y7
V7
Y6 W5
Y5 W3
Y3
V3
Y2 W2
Y1
V2 W1
V13
W10
Y8 W4
V1
U2
U3
U1 W9
Y9
V9
Y10 V10 U10
T2
U16
T1 T3
R2
N2
N3
P2
P3
P1
V5 W6
V6
R3
W13
Y4
R1
U4
V4
U5
U13
U215A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3 PCICLK RESET# INTA# REQ# FRAME# IRDY# TRDY# DEVSEL# STOP# PAR GNT# PCI33EN/M66EN/BIOSFFCLK/HAD1 ST0 ST1 ST2
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6
IDSEL/SBA7 NC/RBF#
ADSTB0 ADSTB1
SBSTB
NC/AGPGPIO0/CLKRUN# NC/AGPGPIO1/STP_AGP# NC/AGPGPIO2 NC/AGPGPIO3
RAGE XL
RESET VALUE R92
RAGE XL 365
RAGE 128 374
4
SAD0/HCLK
SAD1 SAD2/HAD2 SAD3/HAD3 SAD4/HAD4 SAD5/HAD5 SAD6/HAD6 SAD7/HAD7
DS/VIPCLK
AS/HCNTL
SRDY/INT/HAD0
DVS/PDATA0 DVS/PDATA1 DVS/PDATA2 DVS/PDATA3 DVS/PDATA4 DVS/PDATA5 DVS/PDATA6 DVS/PDATA7
DVS/PCLK
BYTCLK
NC/ZVHREF/LCD0
LPVDD/ZVVSYNC/LCD1
LPVSS/UV0/LCD2
NC/UV1/LCD3
NC/UV2/LCD4 TXVSSR/UV3/LCD5 TXVDDR/UV4/LCD6
TXCP/UV5/LCD7
TXCM/UV6/LCD8
NC/UV7/LCD9
TXVSSR/SDS/LCD10
TX0P/SAS/LCD11
TX0M/SSAD0/LCD12
NC/SSAD1/LCD13
TXVDDR/SSAD2/LCD14
TX1P/SSAD3/LCD15
TX1M/SSAD4/LCD16
TXVSSR/SSAD5/LCD17
TX2P/SSAD6/LCD18
TX2M/SSAD7/LCD19
MONID3/LCD23 MONID2/LCD22 MONID1/LCD21 MONID0/LCD20
MONDET/LCDPE
NC/LCDCLK
AGPCLAMP
GIOCLAMP
TESTEN
XTALIN
XTALOUT
HSYNC
VSYNC
RSET
AVDD
AVSS AVSS
PVDD
PVSS
G1 G2 G3 F2 F1 F3 E3 E2
R2034 47K
H2
R2035 47K
J1
R2036 47K
H3
D1 C1 C2 B2 A2 C3 B3 A3 E1
H1 C9 B9 A9 C8 B8 A8 C7 B7 A7 D6 C6 B6 A6 D5 C5 B5 A5 C4 B4 A4 J4
MONID2
K3
MONID1
K2 K1 E4 D2
R2039 47K
J3
SDA SCL
R2040 47K
J2
R2041 22
U8
R2043 22
F4
R2044 10K
U15
XTALIN
A1
XTALOUT
B1
RED
L1
R
GREEN
M1
G
BLUE
N1
B
HSYNC#
M2
VSYNC#
M3
R2047 365
L2
N4 K4 L4
L3 M4
C2129
104P
TXVSSR
RED 54 GREEN 54 BLUE 54 HSYNC# 54 VSYNC# 54
VCC
MONID2 54 MONID1 54
VCC
VCC3
C2130 103P
AVSS
C2128
104P
LPVSS
C2132 103P
PVSS
3
VCC
+
EC71 10U/16V/S
L73 80S/0805
AVDD25
AVDD AVDD25
L74 80S/0805
20mil
+
EC31 100U/16V
3 2
VIN OUT
104P C2125
LT1117-2.5V
2
VOUT
ADJ/GND
LX8117SU214
4
1
JVGA1_1-2
YJUMPER-MG
VGAEN
AVDD25
104P C2126
R2032 100RST
R2033 100RST
20mil
R2042 2.2K
MONID2
R2045 2.2K
MONID1
D_REQ#4
R2037 2.7K
D_GNT#4
R2038 8.2K
D_AD21
R1960 100
(29.498928 MHz or 14.31818 MHz)
C2131
22P
C2133 22P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
+
103P C2127
R2048 1M
ATI RAGE XL #1
EC30 100U/16V
VCC
VCC VCC3
JP40
1 2 3
YJ103
XTALIN
Y6
29.498928MHz
2 1
XTALOUT
Last Revision Date:
Monday, August 20, 2001
Sheet
52 75
1
Rev
0A
of
Page 54
5
4
3
2
1
1.U1至U2 trace
2.trace/space 5/10 mil
3.clock trace/space 5/15 mil
D D
VCC3
C C
+
EC32 10U/16V/S
AVDD25
+
B B
Read BIOS straps
Don't Read BIOS
ROMCS#
Use System BIOS
A A
VDDR I/O power for Memory & muitimedia
VDDP Power for PCI or AGP Interface
VDDC Graphic controllor power
AVDD Analog DAC Power - 2.5 V
PVDD Phase Lock Loop Power - 2.5 V
等長
C2135
104P
104P
C2134
20mil
Close
Open
104P C2138
VCC3
C2139
104P
EC33 10U/16V/S
Current provided by VDDC is 600 mA
R2053 X_10K
5
C2136
105P
C2140
105P
U215B
A20 B19
DQ31 DQ32
B20
DQ30
C20
DQ29
C19
DQ28
C18
DQ27
D20
DQ26
D19
DQ25
D18
DQ24
D17
DQ23
E20
DQ22
E19
DQ21
E18
DQ20
E17
DQ19
F20
DQ18
F19
DQ17
F18
DQ16
F17
DQ15
G20
DQ14
G19
DQ13
G18
DQ12
G17
DQ11
H20
DQ10
H19
DQ9
H18
DQ8
J20
DQ7
J19
DQ6
J18
DQ5
K20
DQ4
K19
DQ3
K18
DQ2
L19
DQ1
L18
DQ0
T4
VPP/VDDQ
U6
VPP/VDDQ
U9
VPP/VDDQ
U14
VPP/VDDQ
M17
VDDR/1
K17
VDDR/1
H17
VDDR/1
D16
VDDR/1
D10
VDDR/1
D7
VDDR/2
D4
VDDR/2
G4
VDDR/2
L17
VDDC
D8
VDDC
P4
VDDC
U11
VDDC
J9
VSS
J10
VSS
J11
VSS
J12
VSS
K9
VSS
K10
VSS
K11
VSS
K12
VSS
L9
VSS
L10
VSS
L11
VSS
L12
VSS
M9
VSS
M10
VSS
M11
VSS
M12
VSS
T17
VSS
J17
VSS
D15
VSS
D9
VSS
H4
VSS
R4
VSS
U7
VSS
U12
VSS
RAGE XL
VMA0 VMA6
PCI 33MHz / 3.3V
PCI 33MHz / 5V111
PCI 66MHz
AGP 1/2X
AGP Test Mode
Bus Clock Select Bus Type
4
C2137
104P
VMD31 VMD30 VMD29 VMD28 VMD27 VMD26 VMD25 VMD24 VMD23 VMD22 VMD21 VMD20 VMD19 VMD18 VMD17 VMD16 VMD15 VMD14 VMD13 VMD12 VMD11 VMD10 VMD9 VMD8 VMD7 VMD6 VMD5 VMD4 VMD3 VMD2 VMD1 VMD0
A19
DQ33
B18
DQ34
A18
DQ35
C17
DQ36
B17
DQ37
A17
DQ38
C16
DQ39
B16
DQ40
A16
DQ41
C15
DQ42
B15
DQ43
A15
DQ44
D14
DQ45
C14
DQ46
B14
DQ47
A14
DQ48
D13
DQ49
C13
DQ50
B13
DQ51
A13
DQ52
D12
DQ53
C12
DQ54
B12
DQ55
A12
DQ56
D11
DQ57
C11
DQ58
B11
DQ59
A11
DQ60
C10
DQ61
B10
DQ62
A10
DQ63
D3
ROMCS#
A0
Y18
A0
A1
Y19
A1
A2
Y20
A2
A3
W18
A3
A4
W19
A4
A5
W20
A5
A6
V18
A6
A7
V19
A7
A8
V20
A8
A9
U18
A9
A10
U19
A10
A11
U20
A11/CKE
M#0
P19
DQM#0
M#1
P18
DQM#1
M#2
R20
DQM#2
M#3
R19
DQM#3
R18
DQM#4
T20
DQM#5
T19
DQM#6
T18
DQM#7
MRAS#
P20
RAS#
MCAS#
L20
CAS#
MWE#
R17
WE#
MCS#0
W17
CS0/BA0
Y17
CS1/BA1
NC/CS3/QS3
CKE/QS0
DFPCLK/QS1
MCLK/CLK0
NC/CLK0#
NC/CLK1
NC/CLK1#
VREF
V17 U17 N18
M18
P17
DSF
N20 N19 M20 M19
N17
DFPDAT/CS2/QS2
Only support LVTTL
PCI33EN
0
0
000
10
1
Don't care
1
1
0
INT Enable
INT Disable
INTERRUPT always enable
VGA Enable
VGA Disable
VGA always enable
ROMCS#
A0 A1 A2 A3 A7 A6 A5
A4 A8 A9 A10 A11
M#0 M#1 M#2 M#3
MWE# MCAS# MRAS# MCS#0
VCKE
Only support RAGE XL
DSF
R2050 22
Close to Chip
VCC3
C2147
104P
20mil
3
VMA8
Open
Close
VMA7
Open
Close
Close to Chip
RN14 8P4R-22
1 2 3 4 5 6 7 8
RN15 22
1 2 3 4 5 6 7 8
RN16 8P4R-22
1 2 3 4 5 6 7 8
RN17 8P4R-22
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
RN18 8P4R-22
R2049 150
STRAPPING RESISTORS
PCI33EN52
R2051 100
PCI33EN
VMA0
VMA6
VMA0 VMA1 VMA2 VMA3 VMA7 VMA6 VMA5 VMA4 VMA8 VMA9 VMA10 VMA11
VDQM#0 VDQM#1 VDQM#2 VDQM#3
VWE# VCAS# VRAS# VCS#0
VCC3
VCLK0
R2054 10K
R2055 10K
R2056 10K
8MBytes SDRAM (64Mbit, 512Kx32x4)
VCC3
3935414955758111529
U216
VMA0
25
EC29 100U/16V
VCC3
26 27 60 61 62 63 64 65 66 24 22 23
16 71 28 59
17 18 19 20 67 68
14 21 30 57 69 70 73
C2141
104P
A0
VDDQ
VDDQ
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA0 BA1
DQM0 DQM1 DQM2 DQM3
WE# CAS# RAS# CS# CKE CLK
NC NC NC NC NC NC NC
VSSQ
VSSQ
612323846527884445872
C2142
104P
VDDQ
VSSQ
VMA1 VMA2 VMA3 VMA4 VMA5 VMA6 VMA7 VMA8 VMA9 VMA10 VMA11 DSF
VDQM#0 VDQM#1 VDQM#2 VDQM#3
VWE# VCAS# VRAS# VCS#0 VCKE VCLK0
+
One cap for two power pin
VCC3
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
2
http://www.msi.com.tw
43
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
86
C2143
C2144
104P
104P
VMA5
1
IDSEL Enable Open
IDSEL Disable
DQ31
2
VSSQ
Micro Star Restricted Secret
ATI RAGE XL #2
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
74
DQ8
76
DQ9
77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56
512Kx32x4 - TSOP86
C2145
104P
R2052 10K
J54 YJ102
VMA5
Close
Last Revision Date:
Monday, August 20, 2001
Sheet
1
VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31
C2146
104P
53 75
of
VCC3
Rev
0A
Page 55
8
Video Connector
RED52
D D
GREEN52
BLUE52
C C
B B
7
NOTE: D4,D5,D7,D8,D12 LIBRARY ERROR
MONID252
VSYNC#52
HSYNC#52
MONID152
VSYNC# MONID2 HSYNC#
MONID1
VCC VCC
L75
1 2
80S/0603
L77
1 2
80S/0603
L79
1 2
80S/0603
Place ferrite bead
close to Chip
Place clamping diodes close to connector
3
1
D70
X_YDI1PS226S
6
C2148 47P
C2150 47P
C2152 47P
2
1
D71
X_YDI1PS226S
5
D67
X_YDI1PS226S
1
VCC
D68
X_YDI1PS226S
1
VCC
D69
X_YDI1PS226S
1
VCC
Place clamping diodes close to connector
MONID1 RMONID1
HSYNC# VSYNC#
3
2
3
3
3
2
2
2
RN19
1 2 3 4 5 6 7 8
8P4R-33
4
CRT_R
R2057 75RST
R2058 75RST
CRT_B
R2059 75RST
Place Termination Resistor close to VGA connector.
VCC
RMONID2
RVSYNC#
L81
1 2
X_80S/0805
RMONID2MONID2
RVSYNC#RHSYNC#
RHSYNC#
RMONID1
For EMI Suppression
3
Place the PI-Filter in close proximity to the VGA connector
VGAVCC
C2154 104P
123456
78
L76
1 2
80S/0603
L78
1 2
80S/0603
L80
1 2
80S/0603
CN1 X_8P4C-100P
2
C2149 47P
For EMI Suppression
C2151 47P
For EMI Suppression
C2153 47P
For EMI Suppression
VGA Connector
JVGA1
15 10 14
9
13
8
12
7
11
6
YCN15F-003-1
1
ROUT
GOUTCRT_G
BOUT
17
5
4
3
2
1
16
R,G,B,Hsync,Vsync
以㆖訊號走 並包
GND
A A
8
7
10/20/10 mil
6
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
5
4
3
http://www.msi.com.tw
VGA CONNECTOR
Last Revision Date:
Monday, August 20, 2001
2
Sheet
54 75
of
1
Rev
0A
Page 56
A
VCC
B
3V_STBY
C
D
E
R473
R484
D_AD0 D_AD1 D_AD2 D_AD3 D_AD4 D_AD5 D_AD6 D_AD7 D_AD8 D_AD9 D_AD10 D_AD11 D_AD12 D_AD13 D_AD14 D_AD15 D_AD16 D_AD17 D_AD18 D_AD19 D_AD20 D_AD21 D_AD22 D_AD23 D_AD24 D_AD25 D_AD26 D_AD27 D_AD28 D_AD29 D_AD30 D_AD31
D_CBE#0 D_CBE#1 D_CBE#2 D_CBE#3
LANEN D_REQ#2 D_GNT#2
10K
10K
R485
10K
4 4
3 3
D_AD[0..31]49,51,52
D_CBE#[0..3]49,51,52
D_FRAME#49,51,52
D_IRDY#49,51,52 D_TRDY#49,51,52
D_DEVSEL#49,51,52
D_STOP#49,51,52
D_PAR49,51,52 PCIIRQ#150 D_PERR#49,50,51 D_SERR#49,50,51
D_REQ#249 D_GNT#249
PCIRST2#51,52,58,65
PCICLK_ETHER223
POWERGOOD64
2 2
3V_STBY
3V_STBY_PWRGD65
ETHER2_PME#58
R2110 2.7K R2111 4.7K
D_REQ#2 D_GNT#2
3V_STBY
1 1
C662
C664
C663
0.01uF
0.1uF
0.1uF
A
+
EC70
47U/10V/S
G13
K13N8P12
G2 A12
N7 M7 P6 P5 N5 M5 P4 N4 P3 N3 N2 M1 M2 M3
L1
L2 K1 E3 D1 D2 D3 C1 B1 B2 B4 A5 B5 B6 C6 C7 A8 B8
M4
L3
F3 C4
F2
F1 G3 H3 H1
J1 H2
J2 A2 A4 C3
J3 C2 G1 B9 A9 A6 C5 C8
B10 A10
C9
R486
10K
DECOUPLING CAPS FOR 82559
A11A3A7E1K3N6G6H5H6H7H8J5J6J7J8J9J10K5K6K7K8K9K10G5K4
VIO LILED
AD0
VCCPL1
VCCPL2
VCCPL3
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3# FRAME# IRDY# TRDY# DEVSEL# STOP# PAR INTA# PERR# SERR# IDSEL REQ# GNT# RST# CLK ISOLATE# ALTRSt# PME# CSTSCHG/WOL CLKRUN#
SMBALRT# SMBCLK SMBD
VCC1
VCCPT
VCCPL4
VCCPP1
VCCPP2
VCCPP3
VCCPP4
VCCPP5
VSSPT
VSSPL1
VSSPL2
VSSPL3
VSSPL4
VSSPP1
C10
G14
K12
N12P8B3B7E2K2M6N1E5E6E7E8E9
VCC2
VCC3
VSSPP2
VSSPP3
VCC4
VCC5
VCC6
82559
VSSPP4
VSSPP5
VSSPP6
VCC7
VCC8
VSS1
VCC9
VSS2
VCC10
VSS3
VCC11
VSS4
3V_STBY
C666
0.01uF
C667
0.01uF
C669
C668
0.01uF
B
0.01uF
C670
0.1uF
C661
0.1uF
C671
0.1uF
K11L4L5L9L10
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
E10F5F6F7F8F9F10G7G8G9G10H9H10
JLAN1_1-2
YJUMPER-MG
LANEN
C
VCC23
VSS16
J11
VCC24
VSS17
VCC25
VSS18TOVSS19
E12P2A1
VCC26
VCC27
VSS20
VSS21
D4D5D6D7D8
R474
22
A14D9D10G4H4J4P1
NC1
NC2
NC3
NC4
VSS22
VSS23
VSS24
VSS25
D11E4E11F4F11
NC5
NC6
NC7
FLA12/MCNTSM#
FLA10/MRING#
FLA8/IOCHRDY
FLA1/AUXPWR
FLA0/PCIMODE#
VSS26
VSS27
VSS28
G11
D_AD20
P14
NC8
NC9
ACTLED
SPEEDLED
FLA16/CLK25
FLA15/EESK FLA14/EEDO
FLA13/EEDI
FLA11/MINT
FLA9/MRST
FLA7/CLKEN
FLCS#/AEN
RBIAS10
RBIAS100
VSS29
VSS30
VSS31
H11L6L11
U46
EECS
FLOE#
FLWE#
TEST
TEXEC
VREF
VSS32
JLAN1
YJ103
FLA6 FLA5 FLA4 FLA3 FLA2
FLD7 FLD6 FLD5 FLD4 FLD3 FLD2 FLD1 FLD0
4.7K
R477 R478 R479 R480
D
2.2K
549
619
Y7
25M-18pf-HC49S-D
C2155 22P
2LINKLED 56 2ACTLED 56 2SPEEDLED 56
2_TDP 56
2_TDN 56
2_RDP 56
2_RDN 56
EEDO
EEDI
EESK
EECS
3V_STBY
10K 10K 10K 10K
STRAPPING OPTION
FLA1 - Pullup for STANDBY Voltage Present FLA0 - Pulldown for PCI Bus system
U47
4 5
DO GND
3
DI
2
SK
1
CS
93C66
0A:93C46S 0B:93C66S
12
C2156 22P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
ETHERNET_82559
3V_STBY
R482
4.7K
6
ORG
7
NC
8
VCC
C660
0.1uF
Last Revision Date:
Monday, August 20, 2001
Sheet
55 75
E
Rev
0A
of
C11 B11
C13
TDP
C14
TDN
E13
RDP
E14
RDN
P9
EESK
M10
EEDO
N10
EEDI
P10 M11 M12 N13 P13 N14 M13 M14 L12 L13 L14 K14
R475
J12 J13 J14
R476
H12 H13 H14 G12 F12 F13 F14
EECS
P7 N9
M8 M9
A13 D13 D14
TCK
D12
TI
B12
C12
R481
B14
R483
B13
LAN1_X1
N11
X1
LAN1_X2
P11
X2
LAN1_X1 LAN1_X2
1 2 3
Page 57
A
B
C
D
E
4 4
T2
C2231 22P
1
TD+
2
TDC
3
TD-
6
RD+
8
RD-
7
RDC
1:1-TX
2_TDP55
R2656 100RST
2_TDN55
2_RDP55
R2659 120RST
3 3
2_RDN55
Place registers as close to chip as possiable
靠近
chip
12
C2230 22P
FLOAT PLANE(CONNECT TO CHASSIS GROUND BY 1500P CAP)
16
TX+
15
CMT
14
TX-
11
RX+
9
RX-
10
RXC
123456
15
1 2 3 4 5 6 7 8 9
78
RN45 75
16
YLED
15 16
1
JLAN2
R2657 300
12 11
10
2SPEEDLED
RJ45+LEDx2-D12-ML
GLED
73
6542
8
12109
Top View
R2658 300
RJ45
AMP
2ACTLED 2LINKLED
3VSB
2SPEEDLED 55
2ACTLED 55 2LINKLED 55
50 MIL GROUND TRACE
2 2
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
ETHERNET_82559_CONN
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
56 75
Rev
0A
Page 58
A
B
C
D
E
VCC3
VCC
Strapping option
RES_NOPOP
(Do not Stuff)
R455
R449
0_OHM
VCC3
VCC
R450 0_OHM
A_TXD A_CTS# A_RTS# A_DTR# A_DSR# A_RXD A_DCD#
CN7
8P4C-180P
CN8
8P4C-180P
CN10
8P4C-180P
CN13
8P4C-180P
0.1uF
C649
C639
0.1uF
U41
12
ROUT5
B_TXD
13
DIN3
B_CTS#
14
ROUT4
B_RTS#
15
DIN2
B_DTR#
16
DIN1
B_DSR#
17
ROUT3
B_RXD
18
ROUT2
B_DCD#A_RTS#
19
ROUT1
20
C640
0.1uF
VCC
GD75232
VCC
C645
U42
12
ROUT5
13
DIN3
14
ROUT4
15
DIN2
16
DIN1
17
ROUT3
18
ROUT2
19
ROUT1
20
VCC
N12VGND RIN5
DOUT3
RIN4 DOUT2 DOUT1
RIN3
RIN2
RIN1
P12V
1011 9 8 7 6 5 4 3 2 1
SERIAL PORT1
0.1uF
GD75232
0.1uF
C650
N12VGND
RIN5
DOUT3
RIN4 DOUT2 DOUT1
RIN3
RIN2
RIN1
P12V
A_EIARI
A_EIATXD A_EIACTS A_EIARTS
A_EIADTR
A_EIADSR A_EIARXD A_EIACD
1011 9 8 7 6 5 4 3 2 1
-12V
+12V_IO
-12V
SERIAL PORT2
B_EIARI
B_EIATXD B_EIACTS B_EIARTS
B_EIADTR
B_EIADSR
B_EIARXD
B_EIACD
+12V_IO
C641
0.1uF
SERIAL PORT2
A_EIACD A_EIARXD A_EIATXD A_EIADTR
COM2
12 34 56 78 9
YJ205-CW
SERIAL PORT1
1 6 2 7 3 8 4 9 5 10
Dtype-9pin
COM1
16 27 38 49 510
11
11
B_EIARXD
B_EIADSR
A_EIADSR A_EIARTS A_EIACTS A_EIARI
Micro Star Restricted Secret
SIO417_PPORT_FLPY_SPORT IF
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
57 75
Rev
0A
A_EIADTR
12
A_EIADSR
34
A_EIARXD
56
A_EIACD
78
A_EIARI
12
A_EIATXD
34
A_EIACTS
56
A_EIARTS
78
B_EIACD
12
B_EIATXD
34
B_EIARTS
56
B_EIARI
78
B_EIARXD
12
B_EIADTR
34
B_EIADSR
56
B_EIACTS
78
D
B_EIACD
B_EIATXD B_EIADTR
B_EIARTS B_EIACTS B_EIARI
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
B_RI#
KBCLK 61 KBDATA 61
MSCLK 61 MSDATA 61
KBD_INIT# 10,11,50 KBD_A20M# 50
R452
4.7K
VCC
D81 1N4148S
RES_NOPOP
R454
R448
45 36 27 18
DENSEL
C652
0.1uF
1K
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
RPE
RINIT# RERR# RACK# RBUSY RAFD# RSTB# RSLCT RSLIN#
U40B
74
DENSEL
72
INDEX_N
71
MTR0_N
70
DR1_N/P16
67
DR0_N
66
MTR1_N/P17
65
DIR_N
64
STEP_N
63
WDATA_N
62
WGATE_N
61
TRK0_N
60
WP_N
59
RDATA_N
58
HDSEL_N
57
DSKCHG_N
73
DRATE0
79
PD7
80
PD6
81
PD5
82
PD4
83
PD3
85
PD2
87
PD1
89
PD0
76
PE
86
INIT_N
88
ERR_N
78
ACK_N
77
BUSY_WAIT_N
90
AFD_N_DSTRB_N
91
STB_N_WRITE_N
75
SLCT
84
SLIN_N_ASTRB_N
DTR2_N_BOUT2
CTS2_N RTS2_N DSR2_N
SOUT2
DCD2_N
RI2_N
DTR1_N_BOUT1/BADDR
CTS1_N
RTS1_N/TRIS
DSR1_N
SOUT1
SIN1_N
DCD1_N
RI1_N
GPIO01/KBCLK
GPIO02/KBDAT
GPIO03/MCLK GPIO04/MDAT
P12/PPDIS
KBRST_N
GA20
108 107 105 103 106 104
SIN2
102 109
100 99 97 95 98 96 94 101
125 126
127 128
121 122 123
A_DTR# A_CTS#
A_DSR# A_TXD A_RXD A_DCD# A_RI#
R1340 1K
A_DTR#
A_RTS#
4 4
J12
1 2
12
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
CON_2X17_NO_PIN5
FLOPPY
3 3
VCC
DRATE0_J DRATE0#
RES_NOPOP
MSEN0 58
R451
INDEX# MTR0# DRV1# DRV0# MTR1# DIR STEP# WDATA# WGATE# TRK0#
RDATA# HDSEL# DSKCHG#
RP253
RP1K
FOR TESTING PURPOSE ONLY. ( DONNT' STUFF FOR NORMAL OPERATION )
VCC VCC
C651
0.1uF
LPT1
ACK# BUSY PE SLCT
PRND4 PRND5 PRND6 PRND7
PRND0 PRND1 PRND2 PRND3
AFD# ERR# XINIT# SLIN#
SIO417
1 2 3 4 5 6 7 8
CN9
1 2 3 4 5 6 7 8
CN11
1 2 3 4 5 6 7 8
CN12
1 2 3 4 5 6 7 8
CN14
8P4C-180P
8P4C-180P
8P4C-180P
8P4C-180P
103PC2229R2654 33
STB#
SLCT PE BUSY ACK#
PRND7 PRND6 PRND5 PRND4
PRND3 PRND2 PRND1 PRND0
SLIN#
XINIT# ERR#
AFD#
C
R2655 2.7K
RN38 8P4R-2.7K
1 2 3 4 5 6 7 8
RN40 8P4R-2.7K
1 2 3 4 5 6 7 8
RN42 8P4R-2.7K
1 2 3 4 5 6 7 8
RN44 8P4R-2.7K
1 2 3 4 5 6 7 8
2 2
1 1
YCN25F-001-1
51
SLCT
13 25
PE
12 24
BUSY
11 23
ACK#
10 22
PRND7
9 21
PRND6
8 20
PRND5
7 19
PRND4
6 18
PRND3
5
SLIN#
17
PRND2
4
XINIT#
16
PRND1
3
ERR#
15
PRND0
2
AFD#
14
STB#
1
52
A
RSTB#
RSLCT RPE RBUSY RACK#
PD7 PD6 PD5 PD4
PD3 PD2 PD1 PD0
RSLIN# RINIT# RERR# RAFD#
8P4R-33
8P4R-33
8P4R-33
8P4R-33
RN37
1 2 3 4 5 6 7 8
RN39
1 2 3 4 5 6 7 8
RN41
1 2 3 4 5 6 7 8
RN43
1 2 3 4 5 6 7 8
SLCT PE BUSY ACK#
PRND7 PRND6 PRND5 PRND4
PRND3 PRND2 PRND1 PRND0
SLIN# XINIT# ERR# AFD#
STB#
B
48
Page 59
A
4 4
SPIO_XO
1 2
32_768KHz
C631 15P
SPIO_XIN
Y1
SPIO_XIN1
C630 27P
JBAT1
1 2 3
YJ103 R2642 1K
JBAT_1_1-2
YJUMPER-MG
R439 10M
VBAT
5VSB
12
R2639 2K
R2640
5.6K
A C
R2643
1K
BAT1 BATTERY
D74
1N4148S
D75
1N5817S
RTCVCC
R2641 1K
C2220 104P
3 3
2 2
R440 47K
B
LPC_AD0 LPC_AD1 LPC_AD3 LPC_AD2
SER_ISA_IRQ0_15
LPC_FRAME#
LPC_AD[0..3]50,63
RP251 RP4.7K
1 8 2 7 3 6 4 5
R437 4.7K
R1341 4.7K U40A
LPC_CLK_SIO23
LPC_DRQ#50
LPC_FRAME#50,63
PCIRST2#51,52,55,65
SER_ISA_IRQ0_1549
MSEN057
SIOCLK48M22
PS_ON#63,66
3V_STBY
3V_STBY
V_BAT
VCC3
SER_ISA_IRQ0_15
R438 10M
R1330 0_OHM
R441 4.7K
RES_NOPOP
R442
Strapping
Do not Stuff
VCC3
3V_STBY
LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
PCIRST2#
C
110
LAD3
111
LAD2
112
LAD1
113
LAD0
114
LCLK
118
LDRQ_N
117
LFRAME_N
120
LRESET_N
119
SERIRQ
44
32KX2
42
32KX1
45
GPIO53/LFCKOUT
56
GPIO55/CLKIN
13
GPIO7/HFCOUT
39
ONCTL
49
GPIO43/PWBTOUT_N
54
GPIO54/VDDFALL
47
ACBCLK
46
ACBDAT
55
GPIO64/CKIN48
124
GPIO00/CLKRUN_N
9
GPIO05/XRDY
10
GPIO06/XIRQ
41
VBAT
69
VDD1
92
VDD2
116
VDD3
11
VSS1
43
VSS2
68
VSS3
93
VSS4
115
VSS5
12
VSB1
40
VSB2
SIO417
GPIO22/XA3 GPIO23/XA2 GPIO24/XA1 GPIO25/XA0
GPIO10/XA11 GPIO11/XA10
GPIO12/XA9 GPIO13/XA8 GPIO14/XA7 GPIO15/XA6 GPIO16/XA5 GPIO17/XA4
GPIO30/XD7 GPIO31/XD6 GPIO32/XD5 GPIO33/XD4 GPIO34/XD3 GPIO35/XD2 GPIO36/XD1 GPIO37/XD0
GPIO40/XCS3_N GPIO41/XCS2_N GPIO26/XCS1_N GPIO27/XCS0_N
GPO60/XSTB2/XCNF2 GPIO61/XSTB1/XCNF1 GPIO62/XSTB0/XCNF0
GPIO21/XWR_XRW
GPIO20/XRD_XEN
GPIO42/SLBTIN_N
GPIO50/PWBTIN_N
GPIO51/SIOSMI_N
GPIO52/PWUREQ_SCI
GPIO63/ACBSA
GPIO44
GPIO45 GPIO46/SLP3# GPIO47/SLP5#
R1342 10K
D
16 17 18 19
ETHER1_PME#
1
ETHER2_PME#
2
P1_PCI_PME#
3
S1_PCI_PME#
4
IO_PCIPME#
5
P2_PCI_PME#
6
S2_PCI_PME#
7
BCM5701_PME#
8
24 25 26 27 28 29 30 31
20 21 22 23
32 33 34
15 14
35 36 37 38
48
50 51 52 53
R1343 10K
SLEDEN
EXTFAN
R1279 0_OHM
3V_STBY
ETHER2_PME# 55 P1_PCI_PME# 29
IO_PCIPME# 51 P2_PCI_PME# 44 S2_PCI_PME# 45 BCM5701_PME# 41
SLEDEN 65
EXTFAN 65
R443 4.7K
EXT_SMI#
R444 4.7K
PLED 62 SUSLED 62
S1_PCI_PME#
IO_PCIPME#
ETHER1_PME#
ETHER2_PME#
P1_PCI_PME#
S2_PCI_PME#
P2_PCI_PME#
BCM5701_PME#
EXTFAN
3V_STBY
R1385 10K
R1386 10K
R446 10K
R447 10K
R1937 10K
R1938 10K
R1939 10K
R1940 10K
R2615 4.7K
3V_STBY
SIO_SWITCH# 63,64 EXT_SMI# 10,50 SIO_WAKEUP 50
Do not Stuff (For testing only )
R445 RES_NOPOP
E
3V_STBY
3V_STBY 3VSB
3V_STBY
VCC3
C1465
C1466
0.1uF
C1470
0.1uF
C1467
0.1uF
1 1
A
B
0.1uF
3V_STBY
C1469
0.1uF
C
C1464
+
22uF/10V/20%
C1468
+
22uF/10V/20%
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
SIO_LPC IF_GPORTS
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
58 75
Rev
0A
Page 60
A
B
C
D
E
XA20
XA22
XALAT#[0..2] 50
TP7
1
TP9
1
System BIOS FLASH RAM
XA0 XA1 XA2 XA3 XA4 XA5 XA6 XA7 XA8 XA9 XA10 XA11 XA12 XA13 XA14 XA15 XA16 XA17
ROM_CS#50
XA18
XRC#50
XWC#
XWC#50
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
1
A18
22
CE
24
OE
31
WE
AM29F040_PLCC
U34
XAD0
13
DQ0
XAD1
14
DQ1
XAD2
15
DQ2
XAD3
17
DQ3
XAD4
18
DQ4
XAD5
19
DQ5
XAD6
20
DQ6
XAD7
21
DQ7
VCCVCC
C629
0.1uF
C624
0.1uF
XALAT#0 XALAT#1
XAD[0..7]
XAD[0..7]50
4 4
XALAT#0
XALAT#1
3 3
XALAT#2
XAD0 XAD1 XAD2 XAD3 XAD4 XAD5 XAD6 XAD7
XAD0 XAD1 XAD2 XAD3 XAD4 XAD5 XAD6 XAD7
XAD0 XAD1 XAD2 XAD3 XAD4 XAD5 XAD6 XAD7
VCC VCC
C626
0.1uF
2 2
0.1uF
C628
R424
0_OHM
U33
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
11
CLK
1
OC
74F574
U35
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
11
CLK
1
OC
74F574
U36
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
11
CLK
1
OC
74F574
XA0
19
Q1
XA1
18
Q2
XA2
17
Q3
XA3
16
Q4
XA4
15
Q5
XA5
14
Q6
XA6
13
Q7
XA7
12
Q8
XA8
19
Q1
XA9
18
Q2
XA10
17
Q3
XA11
16
Q4
XA12
15
Q5
XA13
14
Q6
XA14
13
Q7
XA15
12
Q8
XA16
19
Q1
XA17
18
Q2
XA18
17
Q3
XA19
16
Q4
XA20
15
Q5
XA21
14
Q6
XA22
13
Q7
XA23
12
Q8
XALAT#2
POWER LEDs
D25
680
1 1
R435
R436
X_DS4J1
D26
680
X_DS4J1
A
VCC5V_STBY
12
Micro Star Restricted Secret
12
B
C
D
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
FLASH_PORT80
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
59 75
Rev
0A
Page 61
A
VCC
4 4
B
F4
YFUSE1.1AS-P
L02-8008044
L82 80S/0805
C
USB Connectors
+
EC34
C2157
1000U/6.3V
104P
D
E
STACKED USB CONNECTOR
L85
1 2
80S/0603
USB0N USB0P
78
7 8 5 6 3 4 1 2
CN2
X_8P4C-47P
RN46
8P4R-27
USB1P USB1N USB0P USB0N
RN20 8P4R-15K
1 2
3 4
5 6
7 8
USBP0N
USBP0N49
USBP0P
USBP0P49
USBP1N
USBP1N49
USBP1P
3 3
USBP1P49
USBP1P USBP1N USBP0P
USBP0N
123456
L89
1 2
80S/0603
CN3 8P4C-47P
1 2
3 4
5 6
7 8
RESVD
VCC
2 2
USBP2N49
USBP2P49
USBP3N49
USBP3P49
1 1
F5
YFUSE1.1AS-P
123456
78
7 8 5 6 3 4 1 2
CN5
X_8P4C-47P
RN21
8P4R-27
RESVD
123456
L91 80S/0805
78
RN22
8P4R-15K
USB2N USB2P USB3N USB3P
+
EC35 1000U/6.3V
C2159 104P
USBGND2
L92
1 2
80S/0603 L93
1 2
80S/0603
L94
1 2
80S/0603 L95
1 2
80S/0603
FOR EMI
R2064
X_47K
USB2#
USB2+
USB3#
USB3+
USBGND2
USB2#
USB2+
Place close to OSB4.
A
B
C
1
2
3
4
9
10
JUSB1
1
5
7
9
YJ205
USB1
VCC
DATA0-
DATA0+
GND
CGND
CGND
USBx2-D8-BK
VCC1
USB2P
GND1
GND2
CN4
7 8 5 6 3 4 1 2
8P4C-47P
GND3
GND4USB2N
USB3P
USB3N
VCC2
DATA1-
DATA1+
CGND
CGND
USB3# USB3+ USB2+ USB2#
5
VCC
6
7
8
GND
11
12
2
USBGND2
43
USB3+
6
USB3#
8
10
D
L86
1 2
L88
80S/0603
1 2
80S/0603
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
USB_PORT_and_FREE_GATES
USB1N
USB1P
Last Revision Date:
Tuesday, August 21, 2001
Sheet
60 75
E
Rev
0A
of
Page 62
8
7
6
5
4
3
2
1
Keyboard/Mouse Ports
D D
5VSB
J55_1-2
JC-D2-GN
C C
J55
3 2 1
KBDATA57
MSCLK57
+
KBCLK57
EC2
10U/16V/S
D1x3-BK
VCC
F3
YFUSE1.1AS-P
KBDATA
KBCLK XKBCLK1
MSCLK
L96 80S/0805
L97 80S/0805
L98 80S/0805
L99 80S/0805
XKBDAT1
XMSCLK1
KBVCC
C2161 104P
R2067 X_47K
FOR EMI
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
13
1
5
3
15 17
YMD12P-1
KBGND via Screw Hold connect to System GND
16
10
12
8
7
11
9
MSDATA KBDATA KBCLK MSCLK
MSDATA
B B
MSDATA57
RN23
1 2 3 4 5 6 7 8
8P4R-4.7K
L100 80S/0805
KBVCC
XMSCLK1 XKBCLK1 XKBDAT1 XMSDAT1
XMSDAT1
CN6
1 2 3 4 5 6 7 8
8P4C-180P
Place Close to Connector
A A
8
7
6
5
4
3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
IO KB/MOUSE CONNECTOR
2
Last Revision Date:
Monday, August 20, 2001
Sheet
61 75
1
Rev
0A
of
Page 63
5
JFP1
1
KEYLOCK
D D
VCC
PWRSW#
PWRSW#64
R2071 330
R2073 330
HDD+
PLED2
PLED1
ALARM48
1N4148S
IPMI_SPKR
D73
R2076 2.2K
C C
SPKR50
IPMI_SPKR63
GNDK
NC NC
3
HDD+
4
GNDL
5
SLED2
6
PLED1
7
PWSW+
8
PWSW-
NC29
YJ2090013
SPEAKER
VCCSPK
RESET
GNDR
RN26
1 2 3 4 5 6 7 8
8P4R-150
Q32 2N3904S
HDD-
BUZ+
BUZ-
VCC
R2077
4.7K
JGLBTN1
R2078
1 2
YJ102
B B
1 2
330
21
C2165
4.7U/0805
4
R107
10
11
IDE_LED
12
13
14
BUZZER#
15
R2074
16
17
R2075 330
18
C2164 104P
VCC
147
13 12
U228F 74HC14
330
IDE_LED 49,65
330
FP_RST#
VCC
VCC
FP_RST# 64
IDE_LED
PLED
SLP_BTN# 50
3
C2162
101P
C2163
101P
R2072
X_0
JFP1_14-15
21
YJUMPER-MG
BZ1 BUZZER
VCC
PLED
PLED58
SOFF#50,64
3VSB
3 4
5 6
RN24B 8P4R-4.7K
RN25C
8P4R-4.7K
2
RN24D
7 8
8P4R-4.7K
5VSB
5VSB
1 2
RN25A 8P4R-4.7K
Q44 2N3904S
RN24A 8P4R-4.7K
1 2
Q42 2N3904S
RN25B
3 4
8P4R-4.7K
RN24C
5 6
8P4R-4.7K
Q43 2N3904S
PLED2
PLED1
Q41 2N3904S
1
VCC
5VSBVCC
R2069
R2070
330
330
JGL1
1 2 3
X_YJ103
3VSB
Q45 2N3904S
PLED2
SCSI LED Control
SCSILED Enable
GPIO28
1
0SCSILED Disable
RN25D
RN27A 8P4R-4.7K
1 2
RN27C
SUSLED58
5 6
8P4R-4.7K
7 8
8P4R-4.7K
Q46 2N3904S
RN27B
3 4
8P4R-4.7K
A A
Micro Star Restricted Secret
Title
FRONT PANEL
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Last Revision Date:
Monday, August 20, 2001
Sheet
1
62 75
of
Rev
0A
Page 64
8
7
6
5
4
3
2
1
D D
5VSB 3VSB
C2209
104P
EC49 10u
+
104P
C2208
C2210
104P
104P
C2211
EC50 10u
+
5VSB
IPMI_PSON# PS_ON#
5VSB 3VSB
IPMI1
R2617
6
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
YJ220-CB
4.7K
R2618
10K
IPMI_PSON# IPMI_PWRBTN# IPMI_ATXPOK#
C2213
105P
5
RSMRST#
IPMI_PWRBTN#
IPMI_ATXPOK#
5VSB
IPMI_PSON# IPMI_PWRBTN# IPMI_ATXPOK#
4
1 2 3 4 5 6 7 8
RN36
8P4R-2.7K
3
C C
IPMI_SPKR62
B B
IPMI_SPKR
LPC_FRAME#50,58
LPC_AD050,58 LPC_AD150,58 LPC_AD250,58 LPC_AD350,58
RTCVCC
1N4148S D72
LPC_FRAME#
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
RSMRST#
5VSB
R2616
22M
A A
8
C2212
105P
7
5VSB
14
9 8
U232D
7
74LVC07S
14
1 2
U232A
7
74LVC07S
5VSB
14
3 4
U232B
7
74LVC07S
5VSB
14
5 6
U232C
7
74LVC07S
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
PS_ON# 58,66
SIO_SWITCH#
PS_PWRGD
SIO_SWITCH# 58,64
PS_PWRGD 64,66
Micro Star Restricted Secret
IPMI
Last Revision Date:
Monday, August 20, 2001
2
Sheet
63 75
of
1
Rev
0A
Page 65
A
B
C
D
E
+5VSB
4 4
From Front Panel
From SIO417
3 3
FP_RST#62
From Front Panel
2 2
PS_PWRGD63,66
1 1
CPU1_VRM_PWRGD67
5V_STBY
ON/OFF SWITCH
PWRSW#62
5VSB
To ITP
VCC
VCC
VCC
R2115 10K
1 2
21
C2185 105P
VCC
R2080 0
POWERGOOD
C1PWRGD
R1389 X_4.7K
C2PWRGD
5 6
25ns
7 14
ITP_RESET#
1 2
U228A 74HC14
R1942 4.7K
R407 2.7K
SOFF#50,62
ITP_RESET#9
C1PWRGD C2PWRGD
A
U226C 74HC14
VCC
147
5VSB5VSB
U230A
74HC08
R2113 10K
1 2
21
C2183 105P
1
2
POWERGOOD
1 2
3 4
U228B 74HC14
U228D 74HC14
VCC
147
4
5
5VSB 5VSB
U226A 74HC14
5VSB
147
18ns
3 4
6
U227B 74HC08
12
13
VCC
5 6
U228C 74HC14
U229C
5 6
U229D
9 8
25ns 25ns
7 14
4
5
VCC 5VSB
147
25ns
VCC
147
9 8
3
VCC
147
6
U230B 74HC08
B
5VSB
147
1
U226B 74HC14
7 14
5VSB
9 8
25ns
U226D 74HC14
7 14
147
18ns
147
74F07S
74F07S
PS_PWRGD
P_DELAY
11
U227D 74HC08
R2652
X_0_OHM
R2653
0_OHM
ON_3VSB 66
R406 39
R1388 39
U229B
3 4
CPU1_PWRGD 3
CPU2_PWRGD 5
18ns
2
U28
4
RESET#
VCC
3
MR
MAX6315
RESET TIMEOUT = 140ms RESET THRESHOLD =
4.5V
CPU_VRM_OEN 67
R409 1K
PS_PWRGD#PS_PWRGD
74F07S
VCC_P
VCC_P
C
GND
3
U227A 74HC08
2
1
R2114 1K
1 2
R412 1K
VCC25
PS_PWRGD# 11,27,37,50
VCC25
21
C2184 105P
PS_PWRGD
D
SIO_SWITCH# 58,63
To SIO417
5VSB
147
9
18ns
10
8
U227C 74HC08
Title
Document Number
POWERGOOD
U229A
1 2
POWERGOOD 55
74F07S
R1373 75
Micro Star Restricted Secret
POWER_ON_LOGIC
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
POWERGOOD_CMIC 12,15
VCC25
Last Revision Date:
Tuesday, August 21, 2001
Sheet
E
of
64 75
Rev
0A
Page 66
A
B
C
D
E
C2214
X_104P
C2215
X_104P
C2216
X_104P
2
1
+12V
R2620 4.7K
Q60
SI2303DS-S-SOT23
+
EC51 10U/16V
+12V
R2623 4.7K
Q62
SI2303DS-S-SOT23
+
EC52 10U/16V
+12V
R2626 4.7K
Q64
SI2303DS-S-SOT23
+
EC53 10U/16V
R4081K
3V_STBY
3V_STBY_PWRGD 55
RESET TIMEOUT = 140ms RESET THRESHOLD =
4.5V
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
RESET_LOGIC
3 2 1
SFAN1 YJ103-BO
3 2 1
SFAN2 YJ103-BO
3 2 1
SFAN3 YJ103-BO
Last Revision Date:
Monday, August 20, 2001
Sheet
65 75
E
Rev
0A
of
+12V
R2621 1K
Q61
YFET-NDS7002AS
R2624 1K
Q63
YFET-NDS7002AS
R2627 1K
Q65
YFET-NDS7002AS
U26
4
VCC
3
MR
MAX6315
D
R2619 4.7K
R2622 4.7K
R2625 4.7K
RESET#
GND
R2095
Q59
C
E
2N3904S
Q58
C
E
2N3904S
B
VCC3
1 2
3 4
5 6
R2117 4.7K
VCC
147
25ns
7 8
4.7K
Q57
C
E
2N3904S
RN33 8P4R-1K
PCIRST1#
To CMIC_LE, 2 *CIOB_X2
To IDE,TTL
To VGA,82550,SIO, P33slot
To DIMM
PCIRST1# 11,27,37
PCIRST3#
PCIRST3# 49
PCIRST2#
PCIRST2# 51,52,55,58
VCC25
DIMM_RST#
DIMM_RST# 16,17,18,19
RSTDRV 48
W83782D/PC97317
B
VCC
R2116 330
IDE_LED 49,62
IDE DISK_ACTIVITY LED
EXTFAN58
PCIRST1#
PCIRST3#
PCIRST2#
PCIRST#
DIMM_RST#
JP1
1 2
HEADER 2
C2187 X_104P
C2188 X_104P
C2189 X_104P
C2190 X_104P
C2191 X_104P
C
R2628 330
C615
0.01uF
3V_STBY
4 4
SCSILED2
SCSILED231
SCSILED1
SCSILED131
SLEDEN58
3 3
VCC3
R2614
4.7K
PCIRST#
PCIRST#49
2 2
1 1
A
B
B
VCC3
C2186
104P
VCC3
14
1 2
2.6ns
U231A
7
74LVC07S
VCC3
14
3 4
2.6ns
U231B
7
74LVC07S
VCC3
14
5 6
2.6ns
U231C
7
74LVC07S
VCC3
14
9 8
2.6ns
U231D
7
74LVC07S
PCIRST3# RSTDRV
11 10
U228E 74HC14
Page 67
A
B
C
D
E
+5V_STBY 5V_STBY
4 4
5VSB
U143
1
3.3V
2
3.3V
3
3.3V
4
GND1
5
GND2
6
+5V
7
5VAUX
8
5VSB
9 10 11 12
GND3 GND4 GND5 POWER GOOD +3.3V
RN28A 8P4R-4.7K
POWERCONN2X12
5VSB
R2079
4.7K
3 3
PS_PWRGD63,64
C1431
0.1uF
3V_STBY
R1268 X_4.7K
1 2
2 2
PS_ON#58,63
PS_ON#
RN28B
3 4
8P4R-4.7K
Q48 2N3904S
GND6 GND7
On/Off
GND8
+12V +12V
3.3V
3.3V
+5V +5V +5V
-12V
5VSB
7 8
13 14 15 16 17 18 19 20 21 22 23 24
RN27D 8P4R-4.7K
Q47 2N3904S
VCC3VCC3 VCC VCC +12V
-12V
XPS_ON#
C2166 X_104P
C1498
22uF/10V
ON_3VSB64
100uF/10V/20%
FOR EMI
+12V
U144
1
+12V
2
+12V
3
+12V
4
+12V
1 1
A
COM COM COM COM
POWERCONN2X4
5 6 7 8
+12V +12V_IO
B
C
+5VSB
+
R2647 4.7K
C594
+
+12V_IO
100uF/16V/20%
5VSB
+
22uF/10V
C1471
+12V
VCC3
+
VCC 3SBY Voltage Regulator
5VSB
EC72
+
10U/16V/S
R2646
4.7K
Q67 2N3904S
C595
+
100uF/16V/20%
100uF/10V/20%
C602
C596
+
+
100uF/16V/20%
D
VR1 YLT1087S-0.8A
3 2
VIN VOUT
C2221 104P
3VALWAYS
Q66
P-CH
YFET-SI2303DS
SOT-23
43
CR6 YFET-CEU603ALS
1
TO-252
N-CH
VCC3
C597
+
100uF/10V/20%
C603
+
100uF/16V/20%
ADJ
1
C609
R2644 187RST
R2645 332RST
AC
D76
1N5817S
+
EC74 1000U/6.3V
C598
C599
+
100uF/10V/20%
+
100uF/10V/20%
-12V+12V
C605
+
22uF/25V/20%
VCC
C610
C611
+
100uF/16V/20%
+
100uF/16V/20%
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
3VALWAYS
EC73
+
10U/16V/S
C2222 104P
3V_STBY
3VSB
+
C2223 104P
C600
+
100uF/10V/20%
C612
C613
+
22uF/10V
+
100uF/16V/20%
WTX_POWER_CONNECTORS
Last Revision Date:
Tuesday, August 21, 2001
Sheet
66 75
E
C572
22uF/10V
22uF/10V
of
C614
+
Rev
0A
Page 68
5
D D
C C
B B
VRM_VID[0..4]8,48
VCC_P
VRM_VID[0..4]
R2082
1.62KRST
C2169
C2170
120p
2200p
C2168
0.1u
TP_6301_VRM_R4
4
VCC
R2693
20.5_1%
C2167 105P
R2083 15K
HIP6301_COMP
VRM_VID4 VRM_VID3 VRM_VID2 VRM_VID1 VRM_VID0
HIP6301_FB
3
U218
20
VCC
10
VSEN
6
COMPFBFS/EN
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
7
9
GND
VCC
R2088 330K
R2089 X_2K
HIP6301
PGOOD
PWM4 PWM3 PWM2 PWM1
ISEN4 ISEN3 ISEN2 ISEN1
2
VCC3
R2081 120KRST
CPU1_VRM_PWRGD 64
C2228 X_104P
ISEN4_C ISEN3_C ISEN2_C ISEN1_C
R2094
120KRST
PWM4_C 68 PWM3_C 68 PWM2_C 68 PWM1_C 68
R2084 4.32K
R2085
R2086
R2087
4.32K
4.32K
4.32K
Q68 YFET-NDS7002AS
PHASE3_C 68
PHASE4_C 68
PHASE2_C 68
PHASE1_C 68
19
8
18 11 14 15
17 12 13 16
VCC
R2600 X_1K
DO NOT POP
CPU_VRM_OEN 64
CPU_VRM_OEN HIGH: DISABLE VRM LOW : ENABLE VRM
1
A A
5
4
3
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
VRM-1
Last Revision Date:
Tuesday, August 21, 2001
Sheet
67 75
1
Rev
0A
of
Page 69
5
D D
C2171
0.1u
PWM_BOOT_1
PWM_H_G_1
D77
1N5817S
AC
U219
6
VCC
1
UGATE
8
PHASE
C C
PWM1_C67
3
PWM
2
BOOT
4
GND
PVCC
LGATE
7 5
HIP6601
PHASE1_C67
+12V
C2178
PWM_BOOT_3
0.1u
B B
PWM_H_G_3
D80
1N5817S
AC
U222
6
VCC
1
UGATE
8
PHASE
3
PWM3_C67
PWM
2
BOOT
4
GND
PVCC
LGATE
7 5
HIP6601
PHASE3_C67
A A
5
+12V
R2650 0/0805
PWM_L_G_3
C2181 105P/0805
4
R2648 0/0805
PWM_L_G_1
C2182 105P/0805
1
1
4
1
1
43
Q54 FDB6035AL
43
Q56 FDB7045L
43
Q49 FDB6035AL
43
Q51 FDB7045L
C2179 105P/0805
COIL_P12V_CPU
+12V
C2172 105P/0805
COIL_P12V_CPU
1 2
C2224 X_104P
L105
1.1UH/25A/68-8
1 2
C2226 X_104P
L102
1.1UH/25A/68-8
VCC_P
VCC_P
EC75 1800u-16V
PHASE4_C67
3
L101
1 2
2.5uH/20A
EC36 1800u-16V
EC37 1800u-16V
2
1
COIL_P12V_CPU
EC38 1800u-16V
EC39 1800u-16V
EC40 1800u-16V
EC41 1800u-16V
+12V
C2173
PWM_BOOT_2
0.1u
PWM_H_G_2
PWM2_C67
D78
AC
C2174 105P/0805
1N5817S
COIL_P12V_CPU
43
R2649
U220
6
VCC
1
UGATE
8
PHASE
3
PWM
2
BOOT
4
GND
PVCC
LGATE
0/0805
7
PWM_L_G_2
5
C2175 105P/0805
Q50 FDB6035AL
1
1
43
Q52 FDB7045L
1 2
C2225 X_104P
L103
1.1UH/25A/68-8
VCC_P
HIP6601
PHASE2_C67
+12V
C2176
PWM_BOOT_4
0.1u
PWM_H_G_4
PWM4_C67
D79
AC
C2177 105P/0805
1N5817S
COIL_P12V_CPU
43
U221
6
VCC
1
UGATE
8
PHASE
3
PWM
2
BOOT
4
GND
PVCC
LGATE
R2651 0/0805
7
PWM_L_G_4
5
C2180 105P/0805
Q53 FDB6035AL
1
1
43
Q55 FDB7045L
1 2
C2227 X_104P
L104
1.1UH/25A/68-8
VCC_P
HIP6601
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
VRM-2
Last Revision Date:
Tuesday, August 21, 2001
Sheet
1
68 75
of
Rev
0A
Page 70
A
J51
SDA
GND
SCL
4 4
MOLEX0022447031
3 3
RSB_SDA
1
2
RSB_SCL
3
VCC3
ADD. : 1110 001z
Z - R/W BIT
VCC3 VCC3
R372
R373
4.7K
4.7K
RSB_SDA50 RSB_SCL50
R382 100
R383 100
R384 100
VCC3
B
VCC3
C1432
0.1uF
VCC25
R374
R375
R376
R377
4.7K
4.7K
U15
19
SDA
18
SCL
1
A0
2
A1
3
A2
20
VDD
10
VSS
PCA9544
SDA0
SCL0
SDA1
SCL1
SDA2
SCL2
SDA3
SCL3
INTOUT
5 6
8 9
12 13
15 16
4
INT0
7
INT1
11
INT2
14
INT3
17
R378
4.7K
4.7K
4.7K
C
R379
R380
4.7K
4.7K
PLACE NEAR LOAD
R381
4.7K
CPU_SDA 3,5 CPU_SCL 3,5
22uF/10V
C1560
22uF/10V
C1562
VDD_IMB
22uF/10V
C561
D
RCC_SDA 12,15,27,37,41,48 RCC_SCL 12,15,27,37,41,48
MEMA_SDA 18 MEMA_SCL 18
MEMB_SDA 16,17,19,24 MEMB_SCL 16,17,19,24
E
VDD_CMIC VCC25
1.5V @ 8 A
C2252 1u
U234
VCC
CS-
CS+
PGND DH
SC1101CS
R2687
4.7
CR7 YFET-CEU603ALS
4 3
1
8
GND
7
FB
6
BST
R2680
4.7
1
SBG1040CT-S-TO263
C2258
104P
C
L110
3.3UH
43
D88
VDD_IMB
R2684
24
R2686
120RST
C2257 1u
R2691
YCUNI-004
EC90
EC91
820UF_6.3V
820UF_6.3V
Title
Document Number
D
VCC
2 2
1 1
A
C22491uC2250
VCC
R2681
10
C2255 1u
L109 3.3UH
1u
R2682
1K
R2685
R2683
C2256 1u
EC89 1000U/6.3V
1K
B
+12V
C2251 1u
1
2
3
4 5
EC88 1000U/6.3V
2K
VDD_IMB
C2254
C2253
1u
1u
Micro Star Restricted Secret
VDD_IMB VOLT.-REG_and_I2C
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Last Revision Date:
Tuesday, August 21, 2001
Sheet
69 75
E
Rev
0A
of
Page 71
A
EC76
+12V
4 4
L106
C22351uC2236
1u
1.6u/30A
R2666
2.2K
R2668
1800u-16V
C2238
0.047u
C2239
0.1u
C2241
1K
0.1u
U233
FB_VCC2_5
1
FB1
2
COMP1
3
NC1
4
FB_VTT
REGDRV
R2672
3 3
BG
5
FB2
6
COMP2
7
REGDRV
8
ENABLE
0
9
PHASE2
10
DRVH2
11
BSTH2
12
DRVL2
13
BSTL2
14
VCC
SC2450ISW-SO28
VCC_SC2450_DDR
C2245
EC82 10u
1u
2 2
D87
1N5817S
R2675
10RST
RREF
AGND
CLKOUT EXTCLK
OC-1 OC-2
PGND
PHASE1
DRVH1 BSTH1 DRVL1
BSTL1
NC2
OC+
B
EC77 1800u-16V
2.5V AND 1.25V
28 27 26 25 24 23 22 21 20 19 18 17 16 15
REGDRV
C22321uC2233
VCC_SC2450_DDR
R2671
75KRST
C2244
47p
VCC_DDRVCC_SC2450_DDR
VCC_DDR
EC83 10u
B
R2673
5.1K
C
Q72
E
1u
2N3904S
C
R2660
0.005-2512
R2661
51RST
C2234 100p
R2663 68RST
C2237
100p
C
Q70
B
E
2N3904S
R2669
3.01KRST
R2664 4.7
R2667 2.2
D82
A C
RB051L-40-S-SOD106
R2670
4.7
VCC_DDR
C2240
0.1u
43
Q69 FDB6035AL
1
43
Q71 FDB7045L
1
D83
RB051L-40-S-SOD106
A C
D
EC78 150U/TANT
FB_VCC2_5
L107
1.1u/30A
VCC25
EC79
820U_4V
R2662
1.5KRST
R2665 1KRST
EC80
820U_4V
EC81
820U_4V
VCC25
C2242
0.1u
C2243
0.1u
E
A_VTT
R2674
D84
1N5817S
A C
FB_VTT
255
R2676 1KRST
VCC_DDR
EC87
820U_4V
C2246
A_VTT
EC92
EC93
+
560uF/4V
12
+
0.1u
560uF/4V
12
C2247
0.1u
R2677
4.7
R2678
2.2
D86
A C
RB051L-40-S-SOD106
R2679
4.7
C2248
43
Q73 FDB6030L1B
1
DPAK
0.1u
43
Q74 FDB6030L1B
1
EC84 150U/TANT
D85
RB051L-40-S-SOD106
A C
4u
EC85
560uF/4V
EC86
12
12
+
+
560uF/4V
L108
A C
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
VCC25_VTT_GENERATION
Last Revision Date:
Tuesday, August 21, 2001
Sheet
E
of
70 75
Rev
0A
Page 72
A
B
C
D
E
PLACE THESE CLOSE TO DIMMs
4 4
3 3
2 2
VCC25 VCC25
C1291
C1290 220pF/50V
C463 220pF/50V
R338 100
C464 220pF/50V
R341 100
1uF/10V
SSTLREF_D1 16,17
C465 1uF/10V
C1292 220pF/50V
C457 220pF/50V
R336 100
C458 220pF/50V
C1293
1uF/10V
SSTLREF_D2 18,19
C459 1uF/10V
R339 100
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
SSTL_VREF
Last Revision Date:
Monday, August 20, 2001
Sheet
E
of
71 75
Rev
0A
Page 73
1
M1
GND1 GND3 GND5 GND7
MNT_HOLE_8PIN
M5
GND1 GND3 GND5 GND7
MNT_HOLE_8PIN
M9
GND1 GND3 GND5 GND7
MNT_HOLE_8PIN
M12
GND1 GND3 GND5 GND7
MNT_HOLE_8PIN
FM1
1
X_F_PADS FM3
1
X_F_PADS FM5
1
X_F_PADS FM7
1
X_F_PADS
2
GND2
4
GND4
6
GND6
8
GND8
2
GND2
4
GND4
6
GND6
8
GND8
2
GND2
4
GND4
6
GND6
8
GND8
2
GND2
4
GND4
6
GND6
8
GND8
FM2
1
X_F_PADS FM4
1
X_F_PADS FM6
1
X_F_PADS FM8
1
X_F_PADS
1 3 5 7
1 3 5 7
1 3 5 7
A A
1 3 5 7
M2
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
M6
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
M10
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
M13
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
J56
X_CON2
J57
X_CON2
J58
X_CON2
J59
X_CON2
J60
X_CON2
GND2 GND4 GND6 GND8
GND2 GND4 GND6 GND8
GND2 GND4 GND6 GND8
GND2 GND4 GND6 GND8
1 2
1 2
1 2
1 2
1 2
2 4 6 8
2 4 6 8
2 4 6 8
2 4 6 8
7 mil , 50 ohn
5.5 mil , 50 ohm
5.5 mil , 50 ohm
5.5 mil , 50 ohm
7 mil , 50 ohn
M7
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
M11
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
M14
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
2
GND2
4
GND4
6
GND6
8
GND8
2
GND2
4
GND4
6
GND6
8
GND8
2
GND2
4
GND4
6
GND6
8
GND8
at Top side
at S1 side
at S2 side
at S3 side
at Bottom side
TTOP0 TTOP1
SSS10 SSS11
SSS20 SSS21
SSS30 SSS31
BBOT0 BOTT1
M4
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
M8
1
GND1
3
GND3
5
GND5
7
GND7
MNT_HOLE_8PIN
2
GND2
4
GND4
6
GND6
8
GND8
2
GND2
4
GND4
6
GND6
8
GND8
VCC3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
1
http://www.msi.com.tw
MOUNTING HOLES
Last Revision Date:
Sheet
Tuesday, August 21, 2001
72 75
of
Rev
0A
Page 74
BCM5701
A
PCI RESOURCE TABLE
B
C
D
E
I2C ADDRESS Map
(TO BE CHECKED)
DEVICE/
4 4
SLOT
CSB5-PCI SLOT 1
CSB5-PCI SLOT 2 PCIIRQ5# D_REQ#1
ETHERNET-2(i82559) D_REQ#2
PCIIRQ REQ# GNT# PCIRESET IDSEL
PCIIRQ2# PCIRST# PCIIRQ3#
D_REQ#0
PCIIRQ1#
D_GNT#0
D_GNT#1
D_GNT#2
PCIRST#
D_AD18
D_AD19
D_AD20
D_REQ#4 D_GNT#4PCIIRQ4#ATI Rage XL D_AD21
PCIIRQ8# S1_REQ#0
CIOB-1-S_SCSI
CIOB-1-P_PCI SLT -1
3 3
CIOB-2-P_PCI SLT -1
BCM5701
PCIIRQ9#
PCIIRQ6# PCIIRQ7#
PCIIRQ10# PCIIRQ11#
PCIIRQ0#
P2_REQ#0
P2_REQ#1 P2_GNT#1 P2_PCIRST# P2_AD19
S1_GNT#0
P2_GNT#0
S1_PCIRST#
P2_PCIRST#
S1_AD18
P1_AD18P1_PCIRST#P1_REQ#0 P1_GNT#0
P2_AD18
Bus/Num Signal Address Device
CPU_SCL/SDA
CPU/0
CPU_SCL/SDA
CPU/0
CPU_SCL/SDA
CPU/0
CPU_SCL/SDA
CPU/0
RCC_SCL/SDA
RCC_SCL/SDA
RCC/1
RCC_SCL/SDA
RCC/1
RCC_SCL/SDA
RCC/1
RCC_SCL/SDA
RCC/1
RSB_SCL/SDA
RCC/1 80 RSB5
MEMA_SCL/SDA
MEMA/2 A0 DIMM1
MEMA_SCL/SDA
MEMA/2
MEMA_SCL/SDA
MEMA/2
MEMA_SCL/SDA
MEMA/2
MEMB_SCL/SDA
MEMB/3 A0
MEMB_SCL/SDA
MEMB/3
MEMB_SCL/SDA
MEMB/3
MEMB_SCL/SDA
MEMB/3
MEMORY CPU 1
A0
THERMAL SNSR CPU 1
30
A232MEMORY CPU 2
THERMAL SNSR CPU 2
CMIC FUNCTION 0RCC/1 C0
C0C0CMIC FUNCTION 1
CMIC FUNCTION 2
C8CACIOB 1
CIOB 2
DIMM2
A2
DIMM3
A4
DIMM4
A6
DIMM5
A2
DIMM6
A4
DIMM7
A6
DIMM8
CIOB-2-S_PCI SLT -1
CIOB-2-S_PCI SLT -2
2 2
PCIIRQ14# PCIIRQ15#
PCIIRQ12# PCIIRQ13#
S2_REQ#0
S2_REQ#1
S2_GNT#0
S2_GNT#1 S2_PCIRST#
S2_PCIRST#
S2_AD18
S2_AD19
Power Supply Symbols & Usage
SYMBOL
VCC_P VCC25
A_VTT VCC3
1 1
VCC +12V
-12V 5V_STBY 3V_STBY VDD_IMB 1.5V CMIC, CIOBs
A
VALUE
Set by VID
+2.5V
+1.25V +3.3V +5V +12V
-12V +5V +3.3V
LOGIC
PROCESSORS, CMIC GTL TERMINATION CORE Power for - CMIC, CIOB & CSB5
and Power for DIMMs
SSTL Termination Power for Memory Bus CSB5 , PCI Connectors and MISC. PCI Connectors and MISC. CPU VRM Modules & PCI Connectors PCI Connectors Misc. Misc.
B
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
C
D
http://www.msi.com.tw
I2C ADDRESS & PCIIRQ MAP
Last Revision Date:
Thursday, August 16, 2001
Sheet
E
of
73 75
Rev
0A
Page 75
4 :- Add 0 Ohm Res to Isolate I2C From OSB.
A
B
C
D
E
REV-A1
1 :- Initial Release
4 4
CHANGES: REV-A3 TO REV-A4
1 :- Sync. Elca. Schematics and North_Dome (Date:04-20-01).
2 :- Change "Do Not Stuff Comp" to NOPOP.
3 :- Change IDSEL Res Value to 2K.
4 :- ADD 0 Ohm Series Res to PLLRST(PS_PWGD#) U100 , U127 & U63.
5 :- Change R1154 to 1.5K, Page 9.
6 :- Change R1339 to 4.7K; Page 48.
7 :- Change C1314, C1338, C1339, C1354, C1378, C1379, C1400 & C1550 from V33 to V25.
8 :- Change Q33 to MJD45H11, (Old Sym has a wrong pin out and MMJT9435 is EOL), Page 41.
9 :- Change 150 Ohm Termination Res for HIT#, HITM#, BNR#, BINIT#, and MCERR# to a 40 OHM Res, & 27PF cap. (Page 10)
10 :- Add Pull-up to P2_PCI_PME#, S2_PCI_PM#, P1_PCI_PME# & BCM5701_PME# pins. (Page 54)
11 :- Add LED/Res for LINK pin, Switch the place of Res and LED for LINK, LINK1000, LINK100 & Traffic Pins. (Page 41)
3 3
12 :- Add Series 200 OHM Res between U197-K18 and Y4-2. (Page 41)
13 :- Change R1118 to NOPOP, (Page 10).
CHANGES since 0423 Release to Vendor.
1 :- Change Memory CS to allow three configuration:1,2 Way Interleave, and No Interleave.(Page16,17,18.19)
2 :- Change C1983 PKG to C1210.
3 :- Remove R1125 Page 10.
CHANGES since 0430 Release to Vendor.
1 :- Add 4.7K pull-up to PS_PWRGD (Page 57).
2 :- Add Jumper for CMIC Strapping pins instead of Nopop.
3 :- CMIC has I2C=C0, change the I2C address for CIOBX to C2 and C4.
4 :- Add 0 Ohm Res to Isolate OSB5 I2C from CIOBX2, CMIC, if it is needed.
5 :- Add QS for BCM_SDA and BCM_SCL (Page 40).
6 :- Compare BCM logic and update the pinouts.
2 2
7 :- Page 57, Add Delay Reset Logic For Pass1 CIOBX2 FIB Part.
8 :- Page 22, Add Qswitch to be able to Switch between 12Mhz and 14Mhz.
9 :- Page 48, Add GIOP to control the Qswitch in page 22.
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
REV_HISTORY
Last Revision Date:
Thursday, August 16, 2001
Sheet
E
of
74 75
Rev
0A
Page 76
A
4 4
3 3
B
C
D
E
CLOCKING SCHEME
- CPU 0
- CPU1
- CMIC
- DIMM PLL
- ITP Connector
- PROBE Header
CLK SYNTH.
2 2
14.318 MHz X-TAL
BCLK BCLK#
33MHz
48MHz
48MHz
14MHz
6 Pairs of 100MHz Differential CLOCKs
From CLK SYNTH.
33MHz Low Skew Buffer
n
48MHz USB CLK to RSB
1 1
48MHz CLK to SIO
14 MHz CLK to RSB
A
B
BCLK
BCLK#
DIMM PLL
33MHz
FBOUT#
FBOUT
33MHz CLOCK TO RSB and DEVICES behind it.
CIOB
P1_CLKO
S1_CLKO
C
8 Pairs of 100MHz Differential CLOCKs for 8 DIMMs
P1_FBCLK
PCI-X PLLs
S1_FBCLK
33MHz
CIOB
TO PCI CONNs.
TO PCI CONNs.
P1_FBCLK
P1_CLKO
S1_CLKO
TO PCI CONNs.
PCI-X PLLs
TO PCI CONNs.
S1_FBCLK
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
D
http://www.msi.com.tw
CLOCK_BLOCK DIAGRAM
Last Revision Date:
Thursday, August 16, 2001
Sheet
E
of
75 75
Rev
0A
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