MSI MS-9103 Schematic 00A

A

FLASH

SP

4 4

i82559

PCI SLOT

33MHz/32b

PP

FLPY

X-BUS

PCI BUS 0

USB

SIO
417

IDE

LPC
BUS

B

FOSTER FOSTER

C

U126U125

CPUCPU

D

E

MS-9103 VER:0A

CPU BUS

0811

CSB5

Thin
IMB

IMB
BUS

CMIC

IMB
BUS

J6 J2 J7 J3 J8 J4 J43 J44

MEMORY I/F

A_IMBB_IMB

DIMMs

8

PCI BUS 3

BCM5701

(P2)

PAGE # DESCRIPTION PAGE # DESCRIPTION

24.

SDRAMCLK BUFFER

25.

SDRAM_&_IMB_CLK_DELAY_LOOPS

26.

CIOBX1_PCI(X)

27.

CIOBX1_IMB_PWR

28.

CIOBX1 STRAPPING OPTIONs

29.

30.

SCSI 7899W 1/2(PCIXS1)

31.

SCSI 7899W 2/2

32.

SCSI CHANNEL 1

33.

SCSI CHANNEL 2

34.

SCSI MISC

35.

S1 BUS TERMINATOR

36.

CIOBX2_PCIX

37.

CIOBX2_IMB_PWR

38.

CIOBX2_STRAPPING_OPTION

39

CIOBX1_CLK_BUFF

40

CIOBX2_CLK_BUFF

41

BCM5701 Signal Pins
BCM5701 Power Pins

42
43

BCM5701 Power Gen.

44

CIOBX2_PCIXP2_SLOT1
CIOBX2_PCIXS2_SLOT2&3

45

THIN_IMB_TERMINATION

46

B

3 3

PCI[X]

100MHz/64b

INDEX

PAGE # DESCRIPTION

01. BLOCK DIAGRAM ( This Page )

02.

2 2

1 1

RESET & CLOCKING SCHEME DIAGRAM
FOSTER_103.
FOSTER_1_PWR04.
FOSTER_205.
FOSTER_2_PWR06.
CPU_GTLREF_SMBUS_ADDR

07.
VID_CONTROL

08.
ITP CONNECTOR

09.

10.

CPU_LEVEL_SHIFT/TERM
CMIC_FOSTER_IF

11.
CMIC_CIOB_IF

12.
CMIC_MEM_IF

13.
CMIC_PWR

14.

15.

CMIC STRAPPINGs

16.

DIMM CONNECTOR 1, 2

17.

DIMM CONNECTOR 3, 4

18.

DIMM CONNECTOR 5, 6

19.

DIMM CONNECTOR 7, 8

20.

MEMORY TERMINATIONS - 1

21.

MEMORY TERMINATIONS - 2

22.

CLK_SYNTHESIZER

23.

PCICLK BUFFER

A

PCI BUS 4
(S2)

PCI[X]

100MHz/64b

48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68 VRM-2
69

C

PCI BUS 1
(P1)

PCI[X]

133MHz/64b

SWITCHING CAPs
HARDWARE MONITOR
SWSB5 PCI & IDE I/F
SWSB5_IMB_GPORTS
PCI SLOT 1 & 2
ATI RAGE XL #1
ATI RAGE XL #2
VGA CONNECTOR
i82559 ETHERNET
i82559 Ethernet Conn.
SIO417/PPORT/FLPY/SPORT IF
SIO/LPC/GPORTS
BIOS ROM & PORT 80h I/F
USB_PORTS & FREE GATES
Thin IMD Termination
FRONT PANEL
IPMI
POWER ON LOGIC
RESET LOGIC
POWER CONNECTORS
VRM-1

CIOBX1CIOBX2

VDD_IMB VOLT-REG_I2C

D

PCI BUS 2
(S1)

70
71
72
73
74
75

SCSI
7899

PCI[X]

100MHz/64b

VCC25 & VTT GENERATION LOGIC47
SSTL_VREF
MOUNTING HOLES
I2C ADDRESS & PCIIRQ MAP
REVISION HISTORY
CLOCKING SCHEME DIAGRAMCIOBX1_PCIXP1_SLOT

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

BLOCK DIAGRAM & INDEX

Last Revision Date:

Thursday, August 16, 2001

Sheet

E

Rev

0A

of

175

5

4

3

2

1

PCB

D D

BAT_X

{Value}

{Value}

U34_X

{Value}

C C

B B

A A

Title

{Title}

Size Document Number Rev

{Doc} {RevCode}

C

5

4

3

2

Date: Sheet

11Monday, August 20, 2001

1

of

1

CMIC_LE

PCIRST#

TTL
7407

PCIRST1#

PCIRST2#

CIOBX2

#1

(P1,S1)

CIOBX2

#2

(P2,S2)

VGA

ATI Rage XL

LAN

Intel 82550

SIO

NS87417

P1_PCIRST#

S1_PCIRST#

P2_PCIRST#

S2_PCIRST#

PCI-X Slot

SCSI 7899W

PCI-X Slot

Gb BCM5701H

PCI-X Slot

PCI 33 Slots

CSB5

PCIRST3#

A A

DIMM_RST#

RESET SCHEME

PS_PWRGD#

WTX

POWER
SUPPLY
CONN.

RESET SWITCH

ITP_RESET#

PS_PWRGD

AND

PS_PWRGD#

INVERTER

RESET GEN

140mS PERIOD
RESET Vth = 4.5V

POWERGOOD

CPU_VRM_PWRGD

PLLRST

PCIRST#

CMIC CIOB'S

SRESET#

AND

PLLRST

PCIRST#

PLLRST

PCIRST#

RSB5

7414

D
I
M
M

IDE

......

1 to 8

D
I
M
M

PCIRST#

P1/P2_PCIRST#

S1/S2_PCIRST#

PROC_RESET#

RESETDLY#

CPU_PWRGD

HW
Monitor

RESET FOR RSB
PCI BUS

RESETS FOR PCI
BUSES

CPU RESET

Config RESET - 4
BCLK delay w.r.t.
PROC_RESET#

POWER

t0

PSU PWR GOOD

PLL RST

POWERGOOD

VRM POWERGOOD

PROCESSOR POWERGOOD

PROCESSOR RESET

PCI RESET

CONFIG RESET

1

t0+100mS

t0+100mS

t0+50mS

t0+120mS

t0+120mS

t0+120mS+1mS

t0+120mS+1mS

t0+120mS+1mS+4 clocks

Micro Star Restricted Secret

Title

Document Number

RESET DIAGRAM

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Thursday, August 16, 2001

Sheet

275

Rev

0A

of

A

TP16

1

VCC_P

1K

P1_ODTEN

DON'T STUFF

VCC3

DON'T STUFF

RES_NOPOP

P1_SM_WP

.01uF

C1405

P1_VCCA10

P1_VCCIOPLL10

P1_VSSA10

PD#[0..63]5,11

R1237

R1239

HCLK1_N22

PD#[0..63]

AP#05,11
AP#15,11

HCLK122

BREQ#05,11
BREQ#15
BREQ#25
BREQ#35

A

P1VCC_SENSE

P1GND_SENSE

P1_ODTEN

U125A

A3B5D26

AA5

B27

PD#0

Y26

PD#1

AA27

PD#2

Y24

PD#3

AA25

PD#4

AD27

PD#5

Y23

PD#6

AA24

PD#7

AB26

PD#8

AB25

PD#9

AB23

PD#10

AA22

PD#11

AA21

PD#12

AB20

PD#13

AB22

PD#14

AB19

PD#15

AA19

PD#16

AE26

PD#17

AC26

PD#18

AD25

PD#19

AE25

PD#20

AC24

PD#21

AD24

PD#22

AE23

PD#23

AC23

PD#24

AA18

PD#25

AC20

PD#26

AC21

PD#27

AE22

PD#28

AE20

PD#29

AD21

PD#30

AD19

PD#31

AB17

PD#32

AB16

PD#33

AA16

PD#34

AC17

PD#35

AE13

PD#36

AD18

PD#37

AB15

PD#38

AD13

PD#39

AD14

PD#40

AD11

PD#41

AC12

PD#42

AE10

PD#43

AC11

PD#44

AE9

PD#45

AD10

PD#46

AD8

PD#47

AC9

PD#48

AA13

PD#49

AA14

PD#50

AC14

PD#51

AB12

PD#52

AB13

PD#53

AA11

PD#54

AA10

PD#55

AB10

PD#56

AC8

PD#57

AD7

PD#58

AE7

PD#59

AC6

PD#60

AC5

PD#61

AA8

PD#62

Y9

PD#63

AB6

AP#0

E10

AP#1

D9

HCLK1

Y4

HCLK1_N

W5

FOSTER

PA#[3..35]

BNR#5,10,11

BPRI#5,11

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

AP0#
AP1#

BCLK0
BCLK1

ODTEN

SKTOCC#

VSSSENSE

A3#

A22

PA#3

VSSA

A4#

A20

B18

PA#4

PA#5

AD4

VCCSENSE

A5#

C18

PA#6

TP15

1

4 4

R1236

3 3

RES_NOPOP

VCC3

2 2

1 1

AB4

VCCA

VCCIOPLL

A6#

A7#

A8#

A19

C17

PA#7

PA#8

VCC3

P1_SM_TS_ADDR1

P1_SM_WP

AD29

AE29

AE28

Y29

SM_VCC

SMB_WP

SM_VCC1

A9#

A10#

A11#

D17

A13

B16

B14

PA#9

PA#10

PA#11

PA#12

B

P1_SM_ADDR0

P1_SM_ADDR1

P1_SM_ADDR2

P1_SM_TS_ADDR0

AA28

AB28

AB29

AA29

AC29

SM_DAT

SM_TS_A1

SM_TS_A0

SM_EP_A2

SM_EP_A1

SM_EP_A0

A12#

A13#

A14#

A15#

A16#

A17#

B13

A12

C15

C14

D16

PA#13

PA#14

PA#15

PA#16

PA#17

B

P1_SM_TS_ADDR[0..1] 7
P1_SM_ADDR[0..2] 7
CPU_SDA 5,69
CPU_SCL 5,69
CPU_SMBALERT# 5

45.3_1%

R1232

R1231 45.3_1%

R1233 180

P1_COMP0

P1_COMP1

AC28

AD28

E16

AD16

W6W7W8Y6AA7

COMP1

COMP0

SM_CLK

TESTHI0

TESTHI1

TESTHI2

SM_ALERT

TESTHI3

FOSTER

A18#

A19#

A20#

A21#

A22#

A23#

A24#

A25#

A26#

A27#

B10

PA#21

B11

PA#22

C12

PA#23

E14

PA#24

D13A9B8

PA#25

PA#26

PA#27

A28#

E13

PA#28

D15

PA#18

F15

PA#19

A10

PA#20

VCC_P

R1234 180

AD5

AE5

TESTHI4

TESTHI5

TESTHI6

A29#

A30#

A31#

A32#

A33#

A34#

D12

C11B7A6A7C9C8D20

PA#32

PA#33

PA#34

PA#29

PA#30

PA#31

DP#3

AE17

DP3#

A35#

PA#35

DP#1

DP#2

AC15

AE19

DP2#

BR0#

F12

BREQ#0

BREQ#1

DP#0

AC18

DP1#

BR1#

E11

BREQ#2

DP0#

BR2#

D10

BREQ#3

C

E19

F24

E25

C24

E24

TDI

TCK

TDO

TRDY#

THERMTRIP#

BR3#

BNR#

BPRI#

BINIT#

DBSY#

F20

D23

F11

F18

E18

BINIT#

DBSY#

DRDY#

R1240 39.2_1%
R1241 39.2_1%
R1242 39.2_1%

R1243 39.2_1%

PLACE AT PROC 1

C

A25

TMS

TRST#

GTLREF3
GTLREF2
GTLREF1
GTLREF0

DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

STPCLK#

PWRGD

PR0CH0T#

IGNNE#

RESET#

MCERR#

DEFER#

ADSTB0#
ADSTB1#

DRDY#

DBI3#
DBI2#
DBI1#
DBI0#

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

SLP#

INIT#
LINIT1
LINIT0

FERR#

A20M#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

LOCK#

RSP#
RS2#
RS1#
RS0#

IERR#

HITM#

ADS#

D

DP#[0..3] 5,11

P1_TDO 5,9
P1_TDI 9
P1_TCK 9
P_TRDY# 5,11
ITP_TRST# 5,9
TMS 5,9

DINV#3

AB9

DINV#2

AE12

DINV#1

AD22

DINV#0

AC27

P_VID0

F3

VID0

P_VID1

E3

VID1

P_VID2

D3

VID2

P_VID3

C3

VID3

P_VID4

B3

VID4

F9
F23
W9
W23

DSTBP#3

Y11

DSTBP#2

Y14

DSTBP#1

Y17

DSTBP#0

Y20

DSTBN#3

Y12

DSTBN#2

Y15

DSTBN#1

Y18

DSTBN#0

Y21

BPM#2

F6

BPM#3

F8

BPM#2

E7

BPM#3

F5

BPM#4

E8

BPM#5

E4

AE6
D4
C27

SMI#

F26
AB7
B25
D6
G23
B24
E27
C26
F27

Y8

HREQ#0

B19

HREQ#1

B21

HREQ#2

C21

HREQ#3

C20

HREQ#4

B22

A17
D7

C6
F21
D22
E21

P1_IERR#

E5

DEFER#

C23

HITM#

A23

HIT#

E22

HIT#

D19
F17
F14

VCC_P

ADS#
ADSTB#0
ADSTB#1

Check Which CPU is
close to ITP

DINV#[0..3] 5,11

P_VID[0..4] 5,8

P1_GTLREF1 7
P1_GTLREF0 7

DSTBP#[0..3] 5,11

DSTBN#[0..3] 5,11

BPM#[2..5] 5,9,10

SLP# 5,10
CPU_STPCLK# 5,10
SMI# 5,10
P1_THERMTRIP# 8
CPU1_PWRGD 64
P1_PROCHOT# 8
INIT# 5,10
LINT1 5,8,10
LINT0 5,8,10
FERR# 5,8,10
IGNNE# 5,8,10
A20M# 5,8,10

PROC_RESET# 5,9,10,12

HREQ#[0..4] 5,11

LOCK# 5,10,11
MCERR# 5,10

RSP# 5,11
RS#2 5,11
RS#1 5,11
RS#0 5,11

P1_IERR# 8
DEFER# 5,11
HITM# 5,10,11
HIT# 5,10,11
ADS# 5,11
ADSTB#0 5,11
ADSTB#1 5,11

DRDY# 5,11
DBSY# 5,11
BINIT# 5,10,11PA#[3..35]5,11

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

D

http://www.msi.com.tw

FOSTER_1

E

Last Revision Date:

Monday, August 20, 2001

Sheet

375

E

Rev

0A

of

A

VCC_P

4 4

3 3

2 2

1 1

A14
A18
A24
A28

B12
B20
B26
B29

C10
C16
C22
C28

D14
D18
D24
D29

E12
E20
E26
E28

F10
F16
F22
F29

G24
G26
G28

H23
H25
H27
H29

K23
K25
K27
K29

M23
M25
M27
M29

N23
N25
N27
N29

P24
P26
P28

R23
R25

R27
W27
W25

A2
A8

B6

C2
C4

D8

E2
E6

F4

G2
G4
G6
G8

H3
H5
H7
H9

J2
J4
J6

J8
J24
J26
J28

K3

K5

K7

K9

L2

L4

L6

L8
L24
L26
L28

M3

M5

M7

M9

N3

N5

N7

N9

P2

P4

P6

P8

R3

R5

R7

R9

U125B

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

FOSTER

A

333435363738394041

EMI_GND1

EMI_GND2

EMI_GND3

EMI_GND4

EMI_GND5

EMI_GND6

EMI_GND7

FOSTER_PWR

EMI_GND10

EMI_GND11

EMI_GND12

EMI_GND13

EMI_GND14

EMI_GND15

42434445464748

VSS
VSS
VSS
VSS

EMI_GND8

EMI_GND9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

EMI_GND16

A5
A11
A21
A27
A29
B2
B9
B15
B17
B23
B28
C7
C13
C19
C25
C29
D2
D5
D11
D21
D27
D28
E9
E15
E17
E23
E29
F2
F7
F13
F19
F25
F28
G3
G5
G7
G9
G25
G27
G29
H2
H4
H6
H8
H24
H26
H28
J3
J5
W29
Y2
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28

VCC_P

B

U125C

2122232425262728293031

J7

VSS

J9

VSS

J23

VSS

J25

VSS

J27

VSS

J29

MTG_GND21

MTG_GND22

MTG_GND23

MTG_GND24

MTG_GND25

VSS

K2

VSS

K4

VSS

K6

VSS

K8

VSS

K24

VSS

K26

VSS

K28

VSS

L3

VSS

L5

VSS

L7

VSS

L9

VSS

L23

VSS

L25

VSS

L27

VSS

L29

VSS

M2

VSS

M4

VSS

M6

VSS

M8

VSS

M24

VSS

M26

VSS

M28

VSS

N2

VSS

N4

VSS

N6

VSS

N8

VSS

N24

VSS

N26

VSS

N28

VSS

P3

VSS

P5

VSS

P7

VSS

P9

VSS

P23

VSS

P25

VSS

P27

VSS

P29

VSS

R2

VSS

R4

VSS

R6

VSS

R8

VSS

R24

VSS

R26

VSS

R28

VSS

T3

VSS

T5

VSS

T7

VSS

T9

VSS

T23

VSS

T25

VSS

T27

VSS

T29

VSS

U2

VSS

U4

VSS

U6

VSS

U8

VSS

U24

VSS

U26

VSS

U28

VSS

V3

VSS

V5

VSS

V7

VSS

V9

VSS

V23

VSS

V25

VSS

V27

VSS

V29

VSS

W2

VSS

W4

VSS

W24

VSS

W26

VSS

W28

VSS

Y5

VSS

Y7

VSS

Y13

VSS

Y19

VSS

Y25

VSS

AA2

VSS

AA9

VSS

AA15

VSS

AA17

VSS

AA23

VSS

AB5

VSS

AB11

VSS

AB21

VSS

AB27

VSS

AC2

VSS

AC7

VSS

AC13

VSS

AC19

VSS

AC25 AD3

VSS VSS

FOSTER

B

MTG_GND26

MTG_GND1

MTG_GND2

MTG_GND3

MTG_GND4

MTG_GND5

MTG_GND6

MTG_GND7

12345678910111213141516171819

MTG_GND27

MTG_GND28

MTG_GND29

MTG_GND30

MTG_GND8

MTG_GND9

MTG_GND10

MTG_GND11

32

MTG_GND31

MTG_GND32

FOSTER_PWR

MTG_GND12

MTG_GND13

MTG_GND14

MTG_GND15

A1

A4

GAL_VDD1
GAL_VDD2
GAL_VDD3

RSVD1

RSVD2

GAL_VDD4
GAL_VDD5
GAL_VDD6
GAL_VDD7
GAL_VDD8

GAL_VDD9
GAL_VDD10
GAL_VDD11
GAL_VDD12
GAL_VDD13
GAL_VDD14
GAL_VDD15
GAL_VDD16
GAL_VDD17
GAL_VDD18
GAL_VDD19
GAL_VDD20
GAL_VDD21
GAL_VDD22
GAL_VDD23
GAL_VDD24
GAL_VDD25
GAL_VDD26
GAL_VDD27
GAL_VDD28
GAL_VDD29
GAL_VDD30
GAL_VDD31
GAL_VDD32
GAL_VDD33
GAL_VDD34
GAL_VDD35

GAL_VSS1

GAL_VSS2

GAL_VSS3

GAL_VSS4

GAL_VSS5

GAL_VSS6

GAL_VSS7

GAL_VSS8

GAL_VSS9
GAL_VSS10
GAL_VSS11
GAL_VSS12
GAL_VSS13
GAL_VSS14
GAL_VSS15
GAL_VSS16
GAL_VSS17
GAL_VSS18
GAL_VSS19
GAL_VSS20
GAL_VSS21
GAL_VSS22
GAL_VSS23
GAL_VSS24
GAL_VSS25
GAL_VSS26
GAL_VSS27
GAL_VSS28
GAL_VSS29
GAL_VSS30
GAL_VSS31
GAL_VSS32
GAL_VSS33
GAL_VSS34

MTG_GND16

MTG_GND17

MTG_GND18

RSVD13
RSVD17
RSVD63
RSVD67
RSVD68
RSVD69
RSVD73
RSVD77
RSVD80
RSVD83
RSVD86
RSVD87
RSVD88

RSVD3
RSVD4
RSVD5
RSVD8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MTG_GND19

MTG_GND20

20

C

VCC_P

A30
B4
B31
C30
D1
D31
E30
F1
F31
G30
H1
H31
J30
K1
K31
L30
M1
M31
N1
N31
P30
R1
R31
T30
U1
U31
V30
W1
W31
Y30
AA1
AA31
AB30
AC31
AD30

A31
B30
C1
C31
D30
E1
E31
F30
G1
G31
H30
J1
J31
K30
L1
L31
M30
N30
P1
P31
R30
T1
T31
U30
V1
V31
W30
Y1
Y31
AA30
AB1
AB31
AC30
AD31

A15
A16
A26
B1
C5
D25
W3
Y3
Y27
Y28
AA3
AB3
AC1
AD1
AE4
AE15
AE16
AE27
AE21
AE11
AE2
AD23
AD17
AD15
AD9

C

R1230

RES_NOPOP

DON'T

STUFF

12

+

C1227

560uF/4V

12

+

C1228

560uF/4V

D

C1273

0.1uF

CPU1 CORE
DECOUPLING

12

12

C1229

C1230

+

+

560uF/4V

560uF/4V

CPU1 CORE
DECOUPLING

22uF/10V

22uF/10V

C1237

C1238

22uF/10V

22uF/10V

C1244

C1245

22uF/10V

22uF/10V

C1251

C1252

22uF/10V

22uF/10V

C1258

C1259

PLACE AROUND P1 SOCKET

C1265

C1266

1.0uF/16V

1.0uF/16V

D

C1274

0.1uF

12

+

C1231

560uF/4V

22uF/10V

C1239

22uF/10V

C1246

22uF/10V

C1253

22uF/10V

C1260

C1267

1.0uF/16V

VCC_P

C1275

C1276

0.1uF

12

C1232

+

560uF/4V

VCC_P

22uF/10V

C1240

VCC_P

22uF/10V

C1247

VCC_P

22uF/10V

C1254

VCC_P

22uF/10V

C1261

C1268

1.0uF/16V

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C1743

0.1uF

0.1uF

VCC_P

12

C1233

+

560uF/4V

22uF/10V

C1241

22uF/10V

C1248

22uF/10V

C1255

22uF/10V

C1262

VCC_P

C1269

1.0uF/16V

Micro Star Restricted Secret

FOSTER_1_PWR

12

+

560uF/4V

C1270

1.0uF/16V

C1234

22uF/10V

C1242

22uF/10V

C1249

22uF/10V

C1256

22uF/10V

C1263

Last Revision Date:

Sheet

E

C1744

C1745

0.1uF

0.1uF

12

C1235

+

560uF/4V

22uF/10V

C1243

22uF/10V

C1250

22uF/10V

C1257

22uF/10V

C1264

C1271

1.0uF/16V

Monday, August 20, 2001

of

475

E

12

+

C1746

0.1uF

C1236

560uF/4V

C1272

1.0uF/16V

Rev

0A

A

TP18

1

VCC_P

DON'T STUFF

P2_ODTEN

R1227 RES_NOPOPR1228 1K

R1229

RES_NOPOP

P2_SM_WP

.01uF

C1404

P2_VCCA10

P2_VCCIOPLL10

P2_VSSA10

PD#[0..63]3,11

HCLK2_N22

A

PD#[0..63]

AP#03,11
AP#13,11

HCLK222

P2VCC_SENSE

P2GND_SENSE

P2_ODTEN

U126A

PD#0
PD#1
PD#2
PD#3
PD#4
PD#5
PD#6
PD#7
PD#8
PD#9
PD#10
PD#11
PD#12
PD#13
PD#14
PD#15
PD#16
PD#17
PD#18
PD#19
PD#20
PD#21
PD#22
PD#23
PD#24
PD#25
PD#26
PD#27
PD#28
PD#29
PD#30
PD#31
PD#32
PD#33
PD#34
PD#35
PD#36
PD#37
PD#38
PD#39
PD#40
PD#41
PD#42
PD#43
PD#44
PD#45
PD#46
PD#47
PD#48
PD#49
PD#50
PD#51
PD#52
PD#53
PD#54
PD#55
PD#56
PD#57
PD#58
PD#59
PD#60
PD#61
PD#62
PD#63

AP#0
AP#1

HCLK2
HCLK2_N

PA#[3..35]3,11

BREQ#13
BREQ#03,11
BREQ#23
BREQ#33

BNR#3,10,11

BPRI#3,11

AD27

AC26
AD25

AC24
AD24

AC23

AC20
AC21

AD21
AD19

AC17

AD18

AD13
AD14
AD11
AC12

AC11

AD10

AC14

AA27

AA25

AA24
AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26

AE25

AE23

AA18

AE22
AE20

AB17
AB16
AA16

AE13

AB15

AE10

AA13
AA14

AB12
AB13
AA11
AA10
AB10

Y26

Y24

Y23

AE9

AD8
AC9

AC8
AD7
AE7
AC6
AC5
AA8

Y9

AB6

E10

D9

Y4

W5

FOSTER

PA#[3..35]

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

AP0#
AP1#

BCLK0
BCLK1

A3B5D26

ODTEN

SKTOCC#

AA5

VSSA

VSSSENSE

A3#

A4#

A22

A20

PA#4

PA#3

B27

B18

PA#5

TP17

1

4 4

3 3

VCC3

DON'T STUFF

2 2

VCC3

1 1

VCC3

AD4

AB4

VCCA

VCCIOPLL

VCCSENSE

A5#

A6#

A7#

C18

A19

C17

PA#7

PA#8

PA#6

P2_SM_WP

AD29

A8#

D17

PA#9

AE29

SMB_WP

SM_VCC1

A9#

A10#

A13

PA#10

B

P2_SM_ADDR2

P2_SM_ADDR1

P2_SM_TS_ADDR0

P2_SM_TS_ADDR1

AE28

Y29

AA28

AB28

AB29

SM_VCC

SM_TS_A1

SM_TS_A0

SM_EP_A2

SM_EP_A1

A11#

A12#

A13#

A14#

A15#

B16

B14

B13

A12

C15

PA#12

PA#14

PA#13

PA#15

PA#11

B

P2_SM_TS_ADDR[0..1] 7
P2_SM_ADDR[0..2] 7

CPU_SDA 3,69
CPU_SCL 3,69
CPU_SMBALERT# 3

45.3_1%

45.3_1%

P2_SM_ADDR0

AA29

AC29

AC28

SM_CLK

SM_DAT

SM_EP_A0

R1223

P2_COMP1

AD28

E16

SM_ALERT

P2_COMP0

AD16

COMP1

COMP0

R1224

FOSTER

A16#

A17#

A18#

A19#

A20#

A21#

A22#

A23#

D16

PA#17

D15

PA#18

F15

PA#19

A10

PA#20

B10

PA#21

B11

PA#22

C12

PA#23

A24#

E14

PA#24

C14

PA#16

180

R1225

W6W7W8Y6AA7

TESTHI0

TESTHI1

TESTHI2

TESTHI3

A25#

A26#

A27#

A28#

D13A9B8

E13

PA#25

PA#26

PA#27

PA#28

VCC_P

180

R1226

AD5

AE5

TESTHI4

TESTHI5

TESTHI6

A29#

A30#

A31#

A32#

A33#

A34#

D12

C11B7A6A7C9C8D20

PA#31

PA#32

PA#33

PA#34

PA#30

PA#29

A35#

PA#35

DP#3

AE17

DP#2

AC15

DP3#

BREQ#1

DP#1

AE19

DP2#

BR0#

F12

BREQ#0

DP#0

AC18

DP1#

BR1#

E11

BREQ#2

DP0#

BR2#

D10

BREQ#3

BR3#

E25

F20

BNR#

TDO

BNR#

C24

TDI

BPRI#

D23

BPRI#

C

E19

F24

A25

E24

TCK

TMS

TRST#

TRDY#

GTLREF3
GTLREF2
GTLREF1
GTLREF0

DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

STPCLK#

THERMTRIP#

PR0CH0T#

MCERR#

ADSTB0#
ADSTB1#

BINIT#

DBSY#

DRDY#

F11

F18

E18

DRDY#

BINIT#

DBSY#

C

DP#[0..3] 3,11

P2_TDO 9
P1_TDO 3,9
P2_TCK 9
P_TRDY# 3,11
ITP_TRST# 3,9
TMS 3,9

DINV#3

AB9

DBI3#
DBI2#
DBI1#
DBI0#

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

PWRGD

LINIT1
LINIT0

FERR#

IGNNE#

A20M#

RESET#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

LOCK#

RSP#

IERR#

DEFER#

HITM#

ADS#

SLP#

SMI#

INIT#

RS2#
RS1#
RS0#

DINV#2

AE12

DINV#1

AD22

DINV#0

AC27

P_VID0

F3

VID0

P_VID1

E3

VID1

P_VID2

D3

VID2

P_VID3

C3

VID3

P_VID4

B3

VID4

F9
F23
W9
W23

DSTBP#3

Y11

DSTBP#2

Y14

DSTBP#1

Y17

DSTBP#0

Y20

DSTBN#3

Y12

DSTBN#2

Y15

DSTBN#1

Y18

DSTBN#0

Y21

BPM#2

F6

BPM#3

F8

BPM#2

E7

BPM#3

F5

BPM#4

E8

BPM#5

E4

AE6
D4
C27
F26
AB7
B25
D6
G23
B24
E27
C26
F27

Y8

HREQ#0

B19

HREQ#1

B21

HREQ#2

C21

HREQ#3

C20

HREQ#4

B22

A17
D7

C6
F21
D22
E21

P2_IERR#

E5

DEFER#

C23

HITM#

A23

HIT#

E22

HIT#

ADS#

D19

ADSTB#0

F17

ADSTB#1

F14

Place these close to CPU2

R1296 40.2_1%
R1297 40.2_1%

Check Which CPU is
close to ITP

DINV#[0..3] 3,11

P_VID[0..4] 3,8

P2_GTLREF1 7
P2_GTLREF0 7

DSTBP#[0..3] 3,11

DSTBN#[0..3] 3,11

BPM#[2..5] 3,9,10

SLP# 3,10
CPU_STPCLK# 3,10
SMI# 3,10
P2_THERMTRIP# 8
CPU2_PWRGD 64
P2_PROCHOT# 8
INIT# 3,10
LINT1 3,8,10
LINT0 3,8,10
FERR# 3,8,10
IGNNE# 3,8,10
A20M# 3,8,10

PROC_RESET# 3,9,10,12

HREQ#[0..4] 3,11

LOCK# 3,10,11
MCERR# 3,10

RSP# 3,11
RS#2 3,11
RS#1 3,11
RS#0 3,11

P2_IERR# 8
DEFER# 3,11
HITM# 3,10,11
HIT# 3,10,11
ADS# 3,11
ADSTB#0 3,11
ADSTB#1 3,11

VCC_P

DRDY# 3,11
DBSY# 3,11
BINIT# 3,10,11

D

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

D

http://www.msi.com.tw

FOSTER_2

E

Last Revision Date:

Monday, August 20, 2001

Sheet

575

E

Rev

0A

of

A

VCC_P

U126B

333435363738394041

A2

VCC

A8

VCC

A14

VCC

A18

VCC

A24

EMI_GND1

EMI_GND2

EMI_GND3

EMI_GND4

VCC

A28

VCC

B6

VCC

B12

VCC

B20

4 4

3 3

2 2

1 1

B26
B29

C2

C4
C10
C16
C22
C28

D8
D14
D18
D24
D29

E2

E6
E12
E20
E26
E28

F4
F10
F16
F22
F29

G2
G4
G6

G8
G24
G26
G28

H3

H5

H7

H9
H23
H25
H27
H29

J2
J4
J6

J8
J24
J26
J28

K3

K5

K7

K9

K23
K25
K27
K29

L2

L4

L6

L8

L24
L26
L28

M3
M5
M7
M9

M23
M25
M27
M29

N3
N5
N7
N9

N23
N25
N27
N29

P2

P4

P6

P8

P24
P26
P28

R3
R5
R7
R9

R23
R25

R27
W27
W25

FOSTER

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

EMI_GND5

FOSTER_PWR

EMI_GND10

EMI_GND11

EMI_GND12

EMI_GND13

42434445464748

A

EMI_GND6

EMI_GND7

EMI_GND8

EMI_GND14

EMI_GND15

EMI_GND16

VSS
VSS
VSS
VSS

EMI_GND9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

A5
A11
A21
A27
A29
B2
B9
B15
B17
B23
B28
C7
C13
C19
C25
C29
D2
D5
D11
D21
D27
D28
E9
E15
E17
E23
E29
F2
F7
F13
F19
F25
F28
G3
G5
G7
G9
G25
G27
G29
H2
H4
H6
H8
H24
H26
H28
J3
J5
W29
Y2
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28

VCC_P

B

U126C

2122232425262728293031

J7

VSS

J9

VSS

J23

VSS

J25

VSS

J27

VSS

J29

MTG_GND21

MTG_GND22

MTG_GND23

MTG_GND24

MTG_GND25

VSS

K2

VSS

K4

VSS

K6

VSS

K8

VSS

K24

VSS

K26

VSS

K28

VSS

L3

VSS

L5

VSS

L7

VSS

L9

VSS

L23

VSS

L25

VSS

L27

VSS

L29

VSS

M2

VSS

M4

VSS

M6

VSS

M8

VSS

M24

VSS

M26

VSS

M28

VSS

N2

VSS

N4

VSS

N6

VSS

N8

VSS

N24

VSS

N26

VSS

N28

VSS

P3

VSS

P5

VSS

P7

VSS

P9

VSS

P23

VSS

P25

VSS

P27

VSS

P29

VSS

R2

VSS

R4

VSS

R6

VSS

R8

VSS

R24

VSS

R26

VSS

R28

VSS

T3

VSS

T5

VSS

T7

VSS

T9

VSS

T23

VSS

T25

VSS

T27

VSS

T29

VSS

U2

VSS

U4

VSS

U6

VSS

U8

VSS

U24

VSS

U26

VSS

U28

VSS

V3

VSS

V5

VSS

V7

VSS

V9

VSS

V23

VSS

V25

VSS

V27

VSS

V29

VSS

W2

VSS

W4

VSS

W24

VSS

W26

VSS

W28

VSS

Y5

VSS

Y7

VSS

Y13

VSS

Y19

VSS

Y25

VSS

AA2

VSS

AA9

VSS

AA15

VSS

AA17

VSS

AA23

VSS

AB5

VSS

AB11

VSS

AB21

VSS

AB27

VSS

AC2

VSS

AC7

VSS

AC13

VSS

AC19

VSS

AC25 AD3

VSS VSS

FOSTER

B

MTG_GND26

MTG_GND1

MTG_GND2

MTG_GND3

MTG_GND4

MTG_GND5

MTG_GND6

MTG_GND7

12345678910111213141516171819

MTG_GND27

MTG_GND28

MTG_GND29

MTG_GND30

MTG_GND8

MTG_GND9

MTG_GND10

MTG_GND11

32

MTG_GND31

MTG_GND32

FOSTER_PWR

MTG_GND12

MTG_GND13

MTG_GND14

MTG_GND15

A1

A4

GAL_VDD1
GAL_VDD2
GAL_VDD3

RSVD1

RSVD2

GAL_VDD4
GAL_VDD5
GAL_VDD6
GAL_VDD7
GAL_VDD8

GAL_VDD9
GAL_VDD10
GAL_VDD11
GAL_VDD12
GAL_VDD13
GAL_VDD14
GAL_VDD15
GAL_VDD16
GAL_VDD17
GAL_VDD18
GAL_VDD19
GAL_VDD20
GAL_VDD21
GAL_VDD22
GAL_VDD23
GAL_VDD24
GAL_VDD25
GAL_VDD26
GAL_VDD27
GAL_VDD28
GAL_VDD29
GAL_VDD30
GAL_VDD31
GAL_VDD32
GAL_VDD33
GAL_VDD34
GAL_VDD35

GAL_VSS1

GAL_VSS2

GAL_VSS3

GAL_VSS4

GAL_VSS5

GAL_VSS6

GAL_VSS7

GAL_VSS8

GAL_VSS9
GAL_VSS10
GAL_VSS11
GAL_VSS12
GAL_VSS13
GAL_VSS14
GAL_VSS15
GAL_VSS16
GAL_VSS17
GAL_VSS18
GAL_VSS19
GAL_VSS20
GAL_VSS21
GAL_VSS22
GAL_VSS23
GAL_VSS24
GAL_VSS25
GAL_VSS26
GAL_VSS27
GAL_VSS28
GAL_VSS29
GAL_VSS30
GAL_VSS31
GAL_VSS32
GAL_VSS33
GAL_VSS34

MTG_GND16

MTG_GND17

MTG_GND18

RSVD3
RSVD4
RSVD5

RSVD8
RSVD13
RSVD17
RSVD63
RSVD67
RSVD68
RSVD69
RSVD73
RSVD77
RSVD80
RSVD83
RSVD86
RSVD87
RSVD88

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MTG_GND19

MTG_GND20

20

A30
B4
B31
C30
D1
D31
E30
F1
F31
G30
H1
H31
J30
K1
K31
L30
M1
M31
N1
N31
P30
R1
R31
T30
U1
U31
V30
W1
W31
Y30
AA1
AA31
AB30
AC31
AD30

A31
B30
C1
C31
D30
E1
E31
F30
G1
G31
H30
J1
J31
K30
L1
L31
M30
N30
P1
P31
R30
T1
T31
U30
V1
V31
W30
Y1
Y31
AA30
AB1
AB31
AC30
AD31

A15
A16
A26
B1
C5
D25
W3
Y3
Y27
Y28
AA3
AB3
AC1
AD1
AE4
AE15
AE16
AE27
AE21
AE11
AE2
AD23
AD17
AD15
AD9

C

VCC_P

12

12

C1173

C1174

+

+

560uF/4V

560uF/4V

CPU2 CORE
DECOUPLING

22uF/10V

C1183

22uF/10V

C1190

22uF/10V

C1197

22uF/10V

C1204

PLACE AROUND P2 SOCKET

C1211

1.0uF/16V

DON'T STUFF

R1222 RES_NOPOP

C

C1219

0.1uF

12

+

C1175

560uF/4V

D

C1220

0.1uF

CPU2 CORE
DECOUPLING

12

+

22uF/10V

C1184

22uF/10V

C1191

22uF/10V

C1198

22uF/10V

C1205

C1212

1.0uF/16V

D

C1176

560uF/4V

C1221

0.1uF

22uF/10V

C1185

22uF/10V

C1192

22uF/10V

C1199

22uF/10V

C1206

C1213

1.0uF/16V

12

+

C1177

560uF/4V

VCC_P

VCC_P

VCC_P

VCC_P

C1222

0.1uF

VCC_P

22uF/10V

C1186

22uF/10V

C1193

22uF/10V

C1200

22uF/10V

C1207

C1214

1.0uF/16V

C1739

C1740

0.1uF

0.1uF

VCC_P

12

12

C1178

C1179

+

+

560uF/4V

560uF/4V

22uF/10V

22uF/10V

C1187

C1188

22uF/10V

22uF/10V

C1194

C1195

22uF/10V

22uF/10V

C1201

C1202

22uF/10V

22uF/10V

C1208

C1209

VCC_P

C1215

C1216

1.0uF/16V

1.0uF/16V

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C1741

0.1uF

12

C1180

+

560uF/4V

22uF/10V

C1189

22uF/10V

C1196

22uF/10V

C1203

22uF/10V

C1210

C1217

1.0uF/16V

FOSTER_2_PWR

Last Revision Date:

Sheet

E

C1742

0.1uF

12

12

C1181

+

+

560uF/4V

560uF/4V

C1218

1.0uF/16V

Monday, August 20, 2001

of

675

E

C1182

Rev

0A

A

Z = R/W bit

CPU_0 Thermal Sensor SM Bus

4 4

Addr._0 : 0011X00Z
: 1001X00Z
: 0101X00Z

OR
OR

VCC3

R1197

RES_NOPOP

RES_NOPOP

P1_SM_TS_ADDR0 P1_SM_ADDR1
P1_SM_TS_ADDR1

DON'T STUFF

R1198

B

P1_SM_TS_ADDR[0..1] 3 P1_SM_ADDR[0..2] 3

C

VCC3

R1195

R1194

RES_NOPOP

RES_NOPOP

R1196

RES_NOPOP

P1_SM_ADDR0

P1_SM_ADDR2

D

DON'T STUFF

E

Z = R/W bit

R1199 1K

R1200 1K

VCC3

DON'T STUFF

R1204

RES_NOPOP

R1205 1K

3 3

P2_SM_TS_ADDR0
P2_SM_TS_ADDR1

P2_SM_TS_ADDR[0..1] 5

DON'T STUFF

R1206

RES_NOPOP

R1201 1K

R1203 1K

VCC3

R1207

RES_NOPOP

R1202 1K

R1208 1K

CPU_1 Thermal Sensor SM Bus

Addr._1 : 0011X01Z
: 1001X01Z
: 0101X01Z

2 2

1 1

A

C1157 220pF

C1163 220pF

OR
OR

C1158 220pF

C1164 220pF

VCC_P

R1214 49.9_1%

R1216 100

VCC_P

R1218 49.9_1%

R1220 100

RES_NOPOP

R1209 1K

P1_GTLREF0

C1159 1.0uF/10V

P2_GTLREF0

C1165 1.0uF/10V

R1210

DON'T STUFF

P1_GTLREF0 3

P2_GTLREF0 5

PLACE EACH 220pf OF
GTLREF NEAR PROC PIN

B

C1160 220pF

C1166 220pF

C1161 220pF

C1167 220pF

C

VCC_P

R1215 49.9_1%

VCC_P

R1219 49.9_1%

R1221 100 R1217 100

P1_GTLREF1

P2_GTLREF1

C1168 1.0uF/10V C1162 1.0uF/10V

R1211 1K

R1213 1K

P1_GTLREF1 3

P2_GTLREF1 5

RES_NOPOP

Addr._0 : 1010 000Z

P2_SM_ADDR0
P2_SM_ADDR1
P2_SM_ADDR2

DON'T STUFF

R1212

D

P2_SM_ADDR[0..2] 5

Addr._1 : 1010 001Z

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

CPU_GTLREF_SMBUS_ADDR

Last Revision Date:

Monday, August 20, 2001

Sheet

775

E

Rev

0A

of

A

B

C

D

E

VCC

VCC

INTR

NMI

RESETDLY#

RSB_A20M#

VCC_P

.01uF

C1399

R1186 49.9_1%

P6_CGF2

P6_CGF3

P6_CGF4

R1187 49.9_1%

P6_CGF1

11
10
14
13

15

R1176

330

2
3
5
6

1

1
2
3
4 5

U140

1Y

1A
1B

2Y

2A
2B

3Y

3A
3B

4Y

4A
4B

A/B
G

74F157

RESETDLY# 11
NMI 49

RSB_A20M# 50

4

7

9

12

L1
L2
L3
L4 R4

SW4

R1
R2
R3

DIP_SW_4

RP441

8

1 8

7

2 7

6

3 6
4 5

RP330

LINT0_3V
IGNNE#_3V
A20M#_3V
LINT1_3V

P_VID[0..4]3,5

U139

11

GND

GND

8

VDD

GND

4 1

GTLREF DIRB-A

9

B4

10

B3

12

B2

13

B1

.01uF

C1401

A4
A3
A2
A1

GTL2005

VCC3

7
14

6
5
3
2

VCC_P

49.9_1%
R1307

GTLREF_1

0.1uF

C1500

R1308

100_1%

C1501

0.1uF

4 4

VCC3

RP440

1 8
2 7
3 6
4 5

RP10K

3 3

2 2

INTR50

RSB_IGNNE#50

P1_THERMTRIP#3
P2_THERMTRIP#5

0_OHM

R1177

RSB_IGNNE#

TO OVERRIDE VIDS, REMOVE CPU JUMPERS, AND
INSTALL THE APPROPRIATE FORCE JUMPERS.

P_VID0 VRM_VID0
P_VID1
P_VID2

P_VID3

P_VID4

J37

1

1

3

3

5

5

7

7

9

9

CON10A

RP442 RP0

1 8
2 7
3 6
4 5

R1173 0_OHM

2

2

4

4

6

6

8

8

10

10

PLACE THESE COMPONENTS SO THEY ARE ACCESSIBLE

R1174 1K

LINT0

LINT0 3,5,10

IGNNE#

IGNNE# 3,5,10

A20M#

A20M# 3,5,10

LINT1

LINT1 3,5,10

VCC_P

R1184 49.9_1%

330

R1178 49.9_1%

R1179 49.9_1%

R1185 49.9_1%

VCC3

R1188

P1_PROCHOT#3
P2_PROCHOT#5

P1_IERR#3
P2_IERR#5

VCC3

U141 GTL2005

2

A1

3

A2

5

A3

6

A4

14

VDD

7

GND

.01uF

C1407

B1
B2
B3
B4

GTLREFDIRB-A

GND
GND

R1172 1K

1 8

2 7

3 6

4 5

RP439 RP1K

VRM_VID1
VRM_VID2
VRM_VID3

246

VRM_VID4

J38

8

10

CON10A

VRM_VID[0..4] 48,67

246810

13579

13579

VCC3

R1182 1K

R1183 1K

R1273 1K

GTLREF_1

R1181 1K

RSB_P1_PROCHOT# 50
RSB_P2_PROCHOT# 50
RSB_P1_IERR# 50
RSB_P2_IERR# 50

.01uF

C1406

13
12
10
9

41

8
11

VCC_P VCC3

1 1

FERR#3,5,10

A

FERR#

VCC_P

R1276

49.9_1%

R1275

330

R1274

330

B

RSB_FERR# 49

C

D

3

Q16

1

2

PMBT2369

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

VID_CONTROL

Last Revision Date:

Monday, August 20, 2001

Sheet

875

E

Rev

0A

of

A

B

C

D

E

VCC_P

TCK

RES. TO BE WITHIN
1" OF ITP CONN.

R1158 680

R1168 1K

R1167 1K

R1166 1K

VCC_P VCC_P

R115339

U138

2

1A1

TCK

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

1

1G

19

2G

74LVCH244A

R1169 1K

R1170 1K

R1171 330

1K5_1%

VCC_P

0.1uF

R1154

TMS 3,5
ITP_TRST# 3,5

THIS NET TO BE DAISY
CHAINED ALONG PROCS.

150

Within 1" of the

R1159

last device on this
Net

R_P1_TCK

18

1Y1

R_P2_TCK

16

1Y2

R_FBO

14

1Y3

12

1Y4

9

2Y1

7

2Y2

5

2Y3

3

2Y4

20

VCC

GND

C1398

VCC_P

10

FBO = TCK (to
processors) + Length of
BPM# trace from ITP
connector to first CPU.

RES. TO BE WITHIN
1" OF ITP CONN.

4 4

BPM#23,5,10
BPM#33,5,10
BPM#43,5,10
BPM#53,5,10
PROC_RESET#3,5,10,12

CLK_100M_ITP022
CLK_100M_ITP122

CLK_100M_ITP = BCLK (to
processors) + Length of
BPM# trace from ITP
connector to first CPU.

3 3

RES. TO BE WITHIN
1" OF ITP CONN.

2 2

JP17

HEADER_3

Place this HDR next to the
CPU nearest to ITP conn.

P1_TDI

1
2

P2_TDO

3

R1150 40.2_1%

R1156 RES_NOPOP

VCC_P

R1163 150

R1146 40.2_1%

R1147 40.2_1%

FBO

R1157 RES_NOPOP

R1164 330

R1149 40.2_1%

R1148 40.2_1%

VCC_P

RES. TO BE WITHIN
1" OF ITP CONN.

R1165

75

PLACE NEAR CPU1

J36

1
3
5
7
9

11
13
15
17
19
21
23
25

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

X_CON25A

P1_TDI 3
P1_TDO 3,5
P2_TDO 5

2
4
6
8
10
12
14
16
18
20
22
24

DBA#

P1_TDI

P2_TDO

RES. TO BE WITHIN
1" OF ITP CONN.

R1155 0_OHM

Place it as
close to ITP
Conn. as
possible

R1151 150

Length of
P1_TCK =
P2_TCK

R1160 22

R1161 22

R1162 22

VCC3

R1152

RES_NOPOP

DON'T STUFF

FBO

NOPOP

C1154

NOPOP

C1156

ITP_RESET# 64

C1155

NOPOP

P1_TCK 3

P2_TCK 5

1 1

GND GND SIGNAL

A

Placing components from this
sheet

LAYOUT NOTE:

B

BPM#[0..5], RST#, FBO, BCKN, BCKP, TCK, AND FBI
ARE CRITICAL ROUTES.

C

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

D

http://www.msi.com.tw

ITP CONNECTOR

Last Revision Date:

Sheet

Monday, August 20, 2001

E

Rev

0A

of

975

Look at Routing guidelines while

A

B

C

D

E

DON'T STUFF PLACE NEAR CPU2

R1122 40.2_1%

R1123 40.2_1%

R1124 40.2_1%

R1116 RES_NOPOP

R1126 RES_NOPOP

R1131 39

R1132 39

R1133 39

R1135 150

R1136 39

R1134 39

C2059 27PF

C2060 27PF

U137B

7407

U137D

7407

C2062 27PF

SMI#

INIT#

C2058 27PF

C2061 27PF

3 4

9 8

R1127 40.2_1%

BPM#5

R1128 40.2_1%

BPM#4

R1129 40.2_1%

BPM#3

R1130 40.2_1%

BPM#2

VCC_P VCC_P

C1141

0.1uF

R1137

U137A

1 2

7407

RSB_SLP#50

C1142

0.1uF

C1143

0.1uF

CPU_STPCLK#

VCC3

1K

R1138

U137C

5 6

7407

C1144

0.1uF

SLP#

C1145

0.1uF

C1140

0.1uF

PLACE THE TERM CAPS NEAR THE TERMINATION
RESISTORS

VCC3

1K

RSB_STPCLK#50LOCK# 3,5,11

(Make small Cu Islands

BINIT#

R1139 1K

R1140 1K

PLACE NEAR CPU1

R1115 40.2_1%

R1114 40.2_1%

R1117 40.2_1%

R1118 RES_NOPOP

R1119 40.2_1%

VCC_P

R1120 40.2_1%

R1121 40.2_1%

VCC_P

4 4

PROC_RESET#3,5,9,12

FERR#3,5,8
BINIT#3,5,11

SMI#3,5

IGNNE#3,5,8
INIT#3,5
CPU_STPCLK#3,5
LINT03,5,8
LINT13,5,8

SLP#3,5

BPM#[2..5]3,5,9

3 3

PLACE THESE CLOSE TO CPU2

2 2

EXT_SMI#50,58

RSB_SMI#50,58

CMIC_PINIT#11,50,57

RSB_PINIT#11,50,57

KBD_INIT#11,50,57

SMI#

INIT#
CPU_STPCLK#

A20M#3,5,8

SLP#

BNR#3,5,11
HIT#3,5,11
HITM#3,5,11

MCERR#3,5

VCC3

VCC25

for P1/P2_VCCA,
P1/P2_VSSA

Place these Close to CPU1 Place these Close to CPU2

VCC_P VCC_P

R1142 0_OHM

1 1

R1144 0_OHM

1 2

A

L43 4.7uH

C1146

33uF/6V

C1150
33uF/6V

L45 4.7uH

1 2

R1143 0_OHM

R1145 0_OHM

12

+

+

1 2

C1147

1.0uF/10V

C1151

1.0uF/10V

P1_VCCA 3

P1_VSSA 3

P1_VCCIOPLL 3

B

L44 4.7uH

1 2

C1148

33uF/6V

C1152

33uF/6V

1 2

L46 4.7uH

C1149

1.0uF/10V

C1153

1.0uF/10V

P2_VCCA 5

P2_VSSA 5

P2_VCCIOPLL 5

12

+

+

1 2

C

and P1/P2_VCCIOPLL nets )

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

D

http://www.msi.com.tw

CPU_LEVEL_SHIFT_THERM

Last Revision Date:

Monday, August 20, 2001

Sheet

10 75

E

Rev

0A

of

A

B

C

D

E

PD#0
PD#1
PD#2
PD#3
PD#4
PD#5
PD#6
PD#7
PD#8
PD#9
PD#10
PD#11
PD#12
PD#13
PD#14
PD#15
PD#16
PD#17
PD#18
PD#19
PD#20
PD#21
PD#22
PD#23
PD#24
PD#25
PD#26
PD#27
PD#28
PD#29
PD#30
PD#31
PD#32
PD#33
PD#34
PD#35
PD#36
PD#37
PD#38
PD#39
PD#40
PD#41
PD#42
PD#43
PD#44
PD#45
PD#46
PD#47
PD#48
PD#49
PD#50
PD#51
PD#52
PD#53
PD#54
PD#55
PD#56
PD#57
PD#58
PD#59
PD#60
PD#61
PD#62
PD#63

DINV#0
DINV#1
DINV#2
DINV#3

DP#0
DP#1
DP#2
DP#3

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

PD#[0..63]

VCC25

ALERT#15,27,37,50

VCC25

BINIT#3,5,10

PA#[3..35]

PA#3
PA#4
PA#5
PA#6
PA#7
PA#8
PA#9
PA#10
PA#11
PA#12
PA#13
PA#14
PA#15
PA#16
PA#17
PA#18
PA#19
PA#20
PA#21
PA#22
PA#23
PA#24
PA#25
PA#26
PA#27
PA#28
PA#29
PA#30
PA#31
PA#32
PA#33
PA#34
PA#35

ADSTB#03,5
ADSTB#13,5

BPRI#3,5
DBSY#3,5
DRDY#3,5

HITM#3,5,10

LOCK#3,5,10

P_TRDY#3,5

DEFER#3,5
BREQ#03,5

PS_PWRGD#27,37,50,64

RESETDLY#8

PCIRST#27,37,65

HREQ#03,5
HREQ#13,5
HREQ#23,5
HREQ#33,5
HREQ#43,5

ADSTB#0
ADSTB#1

ADS#

ADS#3,5

BNR#

BNR#3,5,10

BPRI#
DBSY#
DRDY#
HIT#

HIT#3,5,10

HITM#
LOCK#
P_TRDY#
DEFER#
BREQ#0

RESETDLY#
PCIRST#

WRMRST#

RS#0

RS#03,5

RS#1

RS#13,5

RS#2

RS#23,5

RSP#

RSP#3,5

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

AP#0

AP#03,5

AP#1

AP#13,5

R1256 4.7K

CMIC_FATAL#

R12574.7K

MEMOFFACK#

GTL_VREF_CMIC

R13844.7K

GTL_COMP_PU
GTL_COMP_PD
GTL_RCOMP

AE25
AE24
AF26
AE26

AF27

AF23
AD27
AE27
AG25

AG24
AG26

K15
A17
A19
B18
A18
B19

A20
G16
C19
E19
H17
H16
D19
F18
H18
G19
F19
A23
B23
A22
A21
F20
B20
A24
A25
D20
B21
E20
B25
B27
A26
C22
D22

D18
C20

H19

G2

K17

H5
C1
D1
G3

E1

F23

B1
G1

D24

E16
G15
F15
C16
H15

E23
C24

F21

H9

K18

G21
F22
H20

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

ADSTB0#
ADSTB1#

F1

ADS#
BNR#
BPRI#
DBSY#
DRDY#
HIT#
HITM#
LOCK#

F4

TRDY#
DEFER#
BREQ0#

PLLRST
DLYRST
PCIRST#
WRMRST#

RS0#
RS1#

F2

RS2#
RSP#

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#

AP0#
AP1#

ALERT#
BINIT#
HINIT#
BCLKP
BCLKN
FATAL#

MEMOFF#
MEMOFFACK#

GTL_VREF
GTL_VREF

GTL_COMP_PU
GTL_COMP_PD
GTL_RCOMP

U1A

C2

D0#

E3

D1#

B3

D2#

C3

D3#

F3

D4#

D4

D5#

A2

D6#

D2

D7#

D3

D8#

A3

D9#

H6

D10#

F6

D11#

G8

D12#

F5

D13#

H8

D14#

H10

D15#

F7

D16#

G9

D17#

E7

D18#

E6

D19#

A4

D20#

B4

D21#

D7

D22#

A5

D23#

G10

D24#

K11

D25#

B7

D26#

C6

D27#

F8

D28#

C7

D29#

E9

D30#

K12

D31#

D8

D32#

C8

D33#

D9

D34#

B9

D35#

E10

D36#

A7

D37#

A10

D38#

A8

D39#

B12

D40#

A11

D41#

F12

D42#

A12

D43#

G13

D44#

F13

D45#

K13

D46#

H12

D47#

B13

D48#

D12

D49#

A13

D50#

E13

D51#

C13

D52#

C14

D53#

A15

D54#

B15

D55#

D15

D56#

E14

D57#

E15

D58#

H14

D59#

K14

D60#

C15

D61#

A16

D62#

G14

D63#

G5

DINV0#

A6

DINV1#

C10

DINV2#

H13

DINV3#

C26

DP0#

B26

DP1#

E21

DP2#

E25

DP3#

G6

DSTBN0#

F9

DSTBN1#

C9

DSTBN2#

D13

DSTBN3#

H7

DSTBP0#

H11

DSTBP1#

A9

DSTBP2#

A14

DSTBP3#

PA#[3..35]3,5

4 4

VCC25

R1255 10K

MEMOFFACK#

4.7K

R1398

CMIC_PINIT#10,50,57

HCLK_CMIC22

HCLK_CMIC_N22

CMIC_FATAL#15,50

MEMOFFACK#15

3 3

VCC25

WRMRST#15

2 2

VCC25

MEMOFF#15,49

DINV#[0..3] 3,5

DP#[0..3] 3,5

DSTBN#[0..3] 3,5

DSTBP#[0..3] 3,5

PD#[0..63] 3,5

GTL_COMP_PD
GTL_COMP_PU
GTL_RCOMP

VCC_P

C1107 220pF

R1032249_1%

R1033249_1%

C1108 220pF

R103420.5_1%

VCC_P

49.9_1%
R1096

R1099 100_1%

GTL_VREF_CMIC

C1109

1.0uF/10V

1 1

A

B

CMIC_LE

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

C

D

http://www.msi.com.tw

CMIC_FOSTER_IF

Last Revision Date:

Sheet

Monday, August 20, 2001

E

of

11 75

Rev

0A

A

B

C

D

E

B_IMB_D_R[0..15]37

4 4

B_IMB_CON_R37
B_IMB_CLK_R_P25
B_IMB_CLK_R_N25
B_IMB_PAR_R37

B_IMB_D_T[0..15]37

3 3

B_IMB_CON_T37
B_IMB_CLK_T_P_R25
B_IMB_CLK_T_N_R25

B_IMB_PAR_T37

B_IMB_D_R0
B_IMB_D_R1
B_IMB_D_R2
B_IMB_D_R3
B_IMB_D_R4
B_IMB_D_R5
B_IMB_D_R6
B_IMB_D_R7
B_IMB_D_R8
B_IMB_D_R9
B_IMB_D_R10
B_IMB_D_R11
B_IMB_D_R12
B_IMB_D_R13
B_IMB_D_R14
B_IMB_D_R15

B_IMB_D_T0
B_IMB_D_T1
B_IMB_D_T2
B_IMB_D_T3
B_IMB_D_T4
B_IMB_D_T5
B_IMB_D_T6
B_IMB_D_T7
B_IMB_D_T8
B_IMB_D_T9
B_IMB_D_T10
B_IMB_D_T11
B_IMB_D_T12
B_IMB_D_T13
B_IMB_D_T14
B_IMB_D_T15

R_T_IMB_D_T0
R_T_IMB_D_T1
R_T_IMB_D_T2
R_T_IMB_D_T3

R_TIMB_CLK_TR
R_TIMB_CON_T
R_TIMB_PAR_T

IMB_VREF_CMIC

CMIC_IMB_COMP_PD
CMIC_IMB_COMP_PU
CMIC_IMB_RCOMP

T_IMB_D_T0
T_IMB_D_T3
T_IMB_D_T1
T_IMB_D_T2

RP452

RP22R

1 8
2 7
3 6
4 5

RP453

1 8
2 7
3 6
4 5

RP22R

R_TIMB_PAR_T
R_TIMB_CLK_TR

R_TIMB_CON_T

R_T_IMB_D_T0
R_T_IMB_D_T3
R_T_IMB_D_T1
R_T_IMB_D_T2

2 2

T_IMB_PAR_T46,50
T_IMB_CLK_TR25

T_IMB_CON_T46,50

T_IMB_PAR_T
T_IMB_CLK_TR

T_IMB_CON_T

T_IMB_D_T[0..3]46,50

U1B

R25

BIMBD_R0

T23

B IMBD_R1

R26

BIMBD_R2

R27

BIMBD_R3

R22

BIMBD_R4

P23

BIMBD_R5

R24

BIMBD_R6

R23

BIMBD_R7

N25

BIMBD_R8

N22

BIMBD_R9

P21

BIMBD_R10

N23

BIMBD_R11

N24

BIMBD_R12

P20

BIMBD_R13

R18

BIMBD_R14

R17

BIMBD_R15

N20

BIMBCON_R

P25

BIMBCLK_R_P

P27

BIMBCLK_R_N

N21

BMBPAR_R

U21

BIMBD_T0

U23

BIMBD_T1

T20

BIMBD_T2

U18

BIMBD_T3

U17

BIMBD_T4

V20

BIMBD_T5

U20

BIMBD_T6

T22

BIMBD_T7

T21

BIMBD_T8

R21

BIMBD_T9

T25

BIMBD_T10

U27

BIMBD_T11

T24

BIMBD_T12

U25

BIMBD_T13

T27

BIMBD_T14

T26

BIMBD_T15

R20

BIMBCON_T

W26 L25

BIMBCLK_T_P AIMBCLK_T_P

W27

BIMBCLK_T_N

V27

BIMBDPAR_T

Y22

T_IMBD_T0

AA25

T_IMBD_T1

Y21

T_IMBD_T2

Y24

T_IMBD_T3

P18

IMB_VREF

D27

IMB_COMP_PD

H21

IMB_COMP_PU

G22

IMB_RCOMP

AIMBD_R0
AIMBD_R1
AIMBD_R2
AIMBD_R3
AIMBD_R4
AIMBD_R5
AIMBD_R6
AIMBD_R7
AIMBD_R8

AIMBD_R9
AIMBD_R10
AIMBD_R11
AIMBD_R12
AIMBD_R13
AIMBD_R14
AIMBD_R15

AIMBCON_R
AIMBCLK_R_P
AIMBCLK_R_N

AIMBPAR_R

AIMBD_T0
AIMBD_T1
AIMBD_T2
AIMBD_T3
AIMBD_T4
AIMBD_T5
AIMBD_T6
AIMBD_T7
AIMBD_T8

AIMBD_T9
AIMBD_T10
AIMBD_T11
AIMBD_T12
AIMBD_T13
AIMBD_T14
AIMBD_T15

AIMBCON_T

AIMBCLK_T_N

AIMBPAR_T

T_IMBD_R0
T_IMBD_R1
T_IMBD_R2
T_IMBD_R3

T_IMBCLK_RT_IMBCLK_T
T_IMBCON_RT_IMBCON_T
T_IMBPAR_RT_IMBPAR_T

CPURST#
SRESET#

TESTMODE#

SCLK

SDA

CMIC_LE

L20
L17
L18
K20
J24
H23
H22
J22
H26
F27
G24
G27
G25
E27
F24
J20

F25
H25
H24
F26

M26
M25
N27
N18
N17
M24
N26
L27
M27
L21
M22
H27
J27
K27
J26
M21

M20

M23
L23

Y26
W24
AA26
W22

Y27AA24
AA27AA23
W20AB25

C27
AF25
AD26

AE23
AG23

A_IMB_D_R0
A_IMB_D_R1
A_IMB_D_R2
A_IMB_D_R3
A_IMB_D_R4
A_IMB_D_R5
A_IMB_D_R6
A_IMB_D_R7
A_IMB_D_R8
A_IMB_D_R9
A_IMB_D_R10
A_IMB_D_R11
A_IMB_D_R12
A_IMB_D_R13
A_IMB_D_R14
A_IMB_D_R15

A_IMB_D_T0
A_IMB_D_T1
A_IMB_D_T2
A_IMB_D_T3
A_IMB_D_T4
A_IMB_D_T5
A_IMB_D_T6
A_IMB_D_T7
A_IMB_D_T8
A_IMB_D_T9
A_IMB_D_T10
A_IMB_D_T11
A_IMB_D_T12
A_IMB_D_T13
A_IMB_D_T14
A_IMB_D_T15

T_IMB_D_R0
T_IMB_D_R1
T_IMB_D_R2
T_IMB_D_R3

A_IMB_D_T[0..15]

R13484.7K

VCC25

TESTMODE# 15

RCC_SDA 15,27,37,41,48,69
RCC_SCL 15,27,37,41,48,69

A_IMB_D_R[0..15] 27

A_IMB_CON_R 27
A_IMB_CLK_R_P 25
A_IMB_CLK_R_N 25
A_IMB_PAR_R 27

A_IMB_D_T[0..15] 27

A_IMB_CON_T 27
A_IMB_CLK_T_P_R 25
A_IMB_CLK_T_N_R 25
A_IMB_PAR_T 27

T_IMB_D_R[0..3] 46,50

T_IMB_CLK_R 25,46
T_IMB_CON_R 46,50
T_IMB_PAR_R 46,50

PROC_RESET# 3,5,9,10
POWERGOOD_CMIC 15,64

VDD_IMB

R1031249_1%

R1399249_1%

R1400100_1%

1 1

CMIC_IMB_COMP_PU

CMIC_IMB_COMP_PD

CMIC_IMB_RCOMP

A

B

C1110 220pF

C1111 220pF

VDD_IMB

100_1%

R1106 100_1%

R1104

IMB_VREF_CMIC

1.0uF/10V

C1112

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

C

D

http://www.msi.com.tw

CMIC_CIOB_IF

Last Revision Date:

Monday, August 20, 2001

Sheet

E

of

12 75

Rev

0A

A

R_A_SD0_[0..7]20

4 4

R_A_SD1_[0..7]20

R_A_SD2_[0..7]20

R_A_SD3_[0..7]20

3 3

R_A_SD4_[0..7]20

R_A_SD5_[0..7]20

R_A_SD6_[0..7]20

2 2

R_A_SD7_[0..7]20

R_A_SD8_[0..7]20

MA[0..14]16,17,18,19,20

1 1

A

R_A_SD0_0
R_A_SD0_1
R_A_SD0_2
R_A_SD0_3
R_A_SD0_4
R_A_SD0_5
R_A_SD0_6
R_A_SD0_7

R_A_SD1_0
R_A_SD1_1
R_A_SD1_2
R_A_SD1_3
R_A_SD1_4
R_A_SD1_5
R_A_SD1_6
R_A_SD1_7

R_A_SD2_0
R_A_SD2_1
R_A_SD2_2
R_A_SD2_3
R_A_SD2_4
R_A_SD2_5
R_A_SD2_6
R_A_SD2_7

R_A_SD3_0
R_A_SD3_1
R_A_SD3_2
R_A_SD3_3
R_A_SD3_4
R_A_SD3_5
R_A_SD3_6
R_A_SD3_7

R_A_SD4_0
R_A_SD4_1
R_A_SD4_2
R_A_SD4_3
R_A_SD4_4
R_A_SD4_5
R_A_SD4_6
R_A_SD4_7

R_A_SD5_0
R_A_SD5_1
R_A_SD5_2
R_A_SD5_3
R_A_SD5_4
R_A_SD5_5
R_A_SD5_6
R_A_SD5_7

R_A_SD6_0
R_A_SD6_1
R_A_SD6_2
R_A_SD6_3
R_A_SD6_4
R_A_SD6_5
R_A_SD6_6
R_A_SD6_7

R_A_SD7_0
R_A_SD7_1
R_A_SD7_2
R_A_SD7_3
R_A_SD7_4
R_A_SD7_5
R_A_SD7_6
R_A_SD7_7

R_A_SD8_0
R_A_SD8_1
R_A_SD8_2
R_A_SD8_3
R_A_SD8_4
R_A_SD8_5
R_A_SD8_6
R_A_SD8_7

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11

MA12
MA13
MA14

CMIC_LE

AA22
AD22
AC19
AA18
AB23
AB19
AD19

AG22
AB15
AD16
AG21
AF19
AG17
AB16

AG14

AF13
AG12
AE14

AG13
AE13

AD10
AA12

AB10

B

R_A_DQS0_0

R_A_DQS0_1

R_A_DQS1_0

R_A_DQS1_1

R_A_DQS2_0

R_A_DQS2_1

R_A_DQS3_0

R_A_DQS3_1

R_A_DQS4_0

R_A_DQS4_1

R_A_DQS5_0

R_A_DQS5_1

R_A_DQS6_0

R_A_DQS6_1

R_A_DQS7_0

R_A_DQS7_1

R_A_DQS8_0

R_A_DQS8_1

U1C

AC20

AG20

AB13

AE9Y2T4

AC13

AF8W1P7N7H3

A_DQS2_0

A_DQS3_0

A_DQS4_0

A_DQS2_1

A_DQS3_1

B_DQS2_0

B_DQS3_0

B_DQS1_1

B_DQS2_1

B_DQS3_1

AE15

AG11

AA4P1R10L4AC9

AD15

AG10Y5P3U2M7

R_B_DQS2_0

R_B_DQS2_1

R_B_DQS3_0

R_B_DQS3_1

R_B_DQS4_0

N10H4Y11

A_DQS5_0

A_DQS4_1

A_DQS5_1

B_DQS4_0

B_DQS5_0

B_DQS4_1

R_B_DQS4_1

R_B_DQS5_0

R_B_DQS5_1

A_DQS6_0

A_DQS7_0

A_DQS6_1

B_DQS6_0

B_DQS5_1

B_DQS6_1

R_B_DQS6_0

R_B_DQS6_1

R_B_DQS7_0

V11

A_DQS8_0

A_DQS7_1

A_DQS8_1

B_DQS7_0

B_DQS8_0

B_DQS7_1

AF6

R_B_DQS7_1

R_B_DQS8_0

R_B_DQS8_1

AD20

A_SD0_0
A_SD0_1
A_SD0_2
A_SD0_3
A_SD0_4
A_SD0_5
A_SD0_6

Y16

A_SD0_7

V15

A_SD1_0
A_SD1_1
A_SD1_2
A_SD1_3
A_SD1_4
A_SD1_5
A_SD1_6
A_SD1_7

A_SD2_0

Y14

A_SD2_1
A_SD2_2
A_SD2_3
A_SD2_4

V14

A_SD2_5
A_SD2_6
A_SD2_7

Y13

A_SD3_0

AF9

A_SD3_1

AE8

A_SD3_2
A_SD3_3
A_SD3_4

AG8

A_SD3_5

AG6

A_SD3_6

AG5

A_SD3_7

T10

A_SD4_0

Y4

A_SD4_1

R11

A_SD4_2

T7

A_SD4_3

W5

A_SD4_4

Y3

A_SD4_5

U6

A_SD4_6

U1

A_SD4_7

T3

A_SD5_0

R2

A_SD5_1

R4

A_SD5_2

R5

A_SD5_3

T5

A_SD5_4

R1

A_SD5_5

K8

A_SD5_6

R6

A_SD5_7

N3

A_SD6_0

N1

A_SD6_1

M2

A_SD6_2

M4

A_SD6_3

N8

A_SD6_4

N4

A_SD6_5

L1

A_SD6_6

M3

A_SD6_7

H1

A_SD7_0

H2

A_SD7_1

L6

A_SD7_2

M10

A_SD7_3

J5

A_SD7_4

J3

A_SD7_5

L8

A_SD7_6

K10

A_SD7_7

AF3

A_SD8_0

AG2

A_SD8_1
A_SD8_2

AA9

A_SD8_3

AE6

A_SD8_4

AF5

A_SD8_5

AC8

A_SD8_6

AB9

A_SD8_7

AD5

MA0

AE5

MA1

Y10

MA2

AA8

MA3

Y9

MA4

Y7

MA5

AF1

MA6

AE2

MA7

AD3

MA8

AE3

MA9

AF2

MA10

Y8

MA11

AG19

A_DQS0_0

A_DQS1_0

A_DQS0_1

A_DQS1_1

B_DQS0_0

B_DQS1_0

B_DQS0_1

MA12

MA13

MA14

AA20

AF20

AB21

AE19

V10

AA7

AB6

R_B_DQS0_0

R_B_DQS0_1

R_B_DQS1_0

B

R_B_DQS1_1

B_SD0_0
B_SD0_1
B_SD0_2
B_SD0_3
B_SD0_4
B_SD0_5
B_SD0_6
B_SD0_7

B_SD1_0
B_SD1_1
B_SD1_2
B_SD1_3
B_SD1_4
B_SD1_5
B_SD1_6
B_SD1_7

B_SD2_0
B_SD2_1
B_SD2_2
B_SD2_3
B_SD2_4
B_SD2_5
B_SD2_6
B_SD2_7

B_SD3_0
B_SD3_1
B_SD3_2
B_SD3_3
B_SD3_4
B_SD3_5
B_SD3_6
B_SD3_7

B_SD4_0
B_SD4_1
B_SD4_2
B_SD4_3
B_SD4_4
B_SD4_5
B_SD4_6
B_SD4_7

B_SD5_0
B_SD5_1
B_SD5_2
B_SD5_3
B_SD5_4
B_SD5_5
B_SD5_6
B_SD5_7

B_SD6_0
B_SD6_1
B_SD6_2
B_SD6_3
B_SD6_4
B_SD6_5
B_SD6_6
B_SD6_7

B_SD7_0
B_SD7_1
B_SD7_2
B_SD7_3
B_SD7_4
B_SD7_5
B_SD7_6
B_SD7_7

B_SD8_0
B_SD8_1
B_SD8_2
B_SD8_3
B_SD8_4
B_SD8_5
B_SD8_6
B_SD8_7

B_DQS8_1

CS7

Y6

A_CKE
B_CKE

CS6

AA6

RAS#
CAS#

C

R_B_SD0_0

Y20

R_B_SD0_1

AA21

R_B_SD0_2

AA19

R_B_SD0_3

V17

R_B_SD0_4

V18

R_B_SD0_5

Y19

R_B_SD0_6

AB20

R_B_SD0_7

Y18

R_B_SD1_0

AF22

R_B_SD1_1

AE21

R_B_SD1_2

Y17

R_B_SD1_3

V16

R_B_SD1_4

AE22

R_B_SD1_5

AE20

R_B_SD1_6

AC18

R_B_SD1_7

AE18

R_B_SD2_0

AF16

R_B_SD2_1

AF15

R_B_SD2_2

AC15

R_B_SD2_3

AB14

R_B_SD2_4

AG16

R_B_SD2_5

AG15

R_B_SD2_6

AD14

R_B_SD2_7

Y15

R_B_SD3_0

AA13

R_B_SD3_1

AD13

R_B_SD3_2

AC12

R_B_SD3_3

AG9

R_B_SD3_4

V13

R_B_SD3_5

AE12

R_B_SD3_6

AF10

R_B_SD3_7

AG7

R_B_SD4_0

AB4

R_B_SD4_1

AB2

R_B_SD4_2

AA1

R_B_SD4_3

T8

R_B_SD4_4

AA3

R_B_SD4_5

AA2

R_B_SD4_6

Y1

R_B_SD4_7

AA5

R_B_SD5_0

P8

R_B_SD5_1

R3

R_B_SD5_2

P5

R_B_SD5_3

J8

R_B_SD5_4

P10

R_B_SD5_5

N2

R_B_SD5_6

N5

R_B_SD5_7

N6

R_B_SD6_0

W3

R_B_SD6_1

V1

R_B_SD6_2

T2

R_B_SD6_3

T1

R_B_SD6_4

T6

R_B_SD6_5

U4

R_B_SD6_6

R7

R_B_SD6_7

R8

R_B_SD7_0

M1

R_B_SD7_1

J1

R_B_SD7_2

M5

R_B_SD7_3

L10

R_B_SD7_4

K1

R_B_SD7_5

L2

R_B_SD7_6

M6

R_B_SD7_7

M8

R_B_SD8_0

AD9

R_B_SD8_1

AD8

R_B_SD8_2

AG4

R_B_SD8_3

AD7

R_B_SD8_4

V12

R_B_SD8_5

Y12

R_B_SD8_6

AE7

R_B_SD8_7

AG3

AB1

WE#

AC1
W8
AB8
AE4

R_CS_0

U8

CS0

R_CS_1

U10

CS1

R_CS_2

W7

CS2

R_CS_3

V8

CS3

R_CS_4

AE1

CS4

R_CS_5

AD1

CS5

R_CS_6
R_CS_7

C

R_B_SD0_[0..7] 20

R_B_SD1_[0..7] 20

R_B_SD2_[0..7] 20

R_B_SD3_[0..7] 20

R_B_SD4_[0..7] 20

R_B_SD5_[0..7] 20

R_B_SD6_[0..7] 20

R_B_SD7_[0..7] 20

R_B_SD8_[0..7] 20

WE# 16,17,18,19,20
RAS# 16,17,18,19,20
CAS# 16,17,18,19,20
A_CKE 16,17,20
B_CKE 18,19,20

CS_0

R151939

CS_1

R152039

CS_2

R152139

CS_3

R152239

CS_4

R152339

CS_5

R152439

CS_6

R152539

CS_7

R152639

D

CS_0 16,18
CS_1 16,18
CS_2 16,18
CS_3 16,18
CS_4 17,19
CS_5 17,19
CS_6 17,19
CS_7 17,19

D

R_B_DQS0_[0..1]20

R_B_DQS1_[0..1]20

R_B_DQS2_[0..1]20

R_B_DQS3_[0..1]20

R_B_DQS4_[0..1]20

R_B_DQS5_[0..1]20

R_B_DQS6_[0..1]20

R_B_DQS7_[0..1]20

R_B_DQS8_[0..1]20

R_A_DQS0_[0..1]20

R_A_DQS1_[0..1]20

R_A_DQS2_[0..1]20

R_A_DQS3_[0..1]20

R_A_DQS4_[0..1]20

R_A_DQS5_[0..1]20

R_A_DQS6_[0..1]20

R_A_DQS7_[0..1]20

R_A_DQS8_[0..1]20

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

R_B_DQS0_[0..1]

R_B_DQS1_[0..1]

R_B_DQS2_[0..1]

R_B_DQS3_[0..1]

R_B_DQS4_[0..1]

R_B_DQS5_[0..1]

R_B_DQS6_[0..1]

R_B_DQS7_[0..1]

R_B_DQS8_[0..1]

R_A_DQS0_[0..1]

R_A_DQS1_[0..1]

R_A_DQS2_[0..1]

R_A_DQS3_[0..1]

R_A_DQS4_[0..1]

R_A_DQS5_[0..1]

R_A_DQS6_[0..1]

R_A_DQS7_[0..1]

R_A_DQS8_[0..1]

Micro Star Restricted Secret

CMIC_MEM_IF

E

Last Revision Date:

Monday, August 20, 2001

Sheet

13 75

E

Rev

0A

of

A

B

C

D

E

D

C1113

1.0uF/16V

C1423

560uF/4V

C1430

1.0uF/16V

VCC25

R1026

0

ANCHORs for
CMIC_LE Heatsink

GND

GND_SIGNAL

GND SIGNAL

VCC25

C1114

1.0uF/16V

VCC_P

12

+

L41

1 2

47uH

22uF/10V
C1052

JP35

2
1

HS_ANCHOR

VCC25

100_1%

R1028

C1057 220pF

C1058 220pF

C1056 0.1uF

C1115

1.0uF/16V

VCC25

R1029 100_1%

12

C1422

+

560uF/4V

VDD_IMB

+

C1092

+

C1094
270uF/4V/20mR/SP/OSCON

270uF/4V/20mR/SP/OSCON

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

CMIC_PWR

CMIC_AVDD

C1053

1.0uF/10V

MEM_VREF_CMIC

C1059 1.0uF/10V

CMIC_DCOMP

270uF/4V/20mR/SP/OSCON

Last Revision Date:

Monday, August 20, 2001

Sheet

E

JP36

1
2

HS_ANCHOR

VCC25

+

C1095

of

14 75

R1030

249_1%

Rev

0A

C1669

0.1uF

AB12
AB11
AB7
AB5
AB3
AC26
AC24
AC22
AC17
AC16
AC14
AC7
AC5
AC3
AD12
AD11
AE17
AE16
AF24
AF21
AF12
AF11
AF4

E26
G23
K19
K22
K24
K26
L22
L24
L26
M17
M19
P17
P19
P24
T17
T19
U22
U24
U26
V19
V24
V26

AB27

AC27T16

U9
W17

AG18

AD24

U19

VCC25

VDD_IMB

CMIC_AVDD

MEM_VREF_CMIC

CMIC_DCOMP

CMIC_RSVD

MEM_VREF_CMIC

CMIC_RSVD 15

C1670

C1671

0.01uF

0.1uF

VCC_P

C1649

0.01uF

C1650

0.1uF

C1651

0.01uF

C1076

0.1uF

C1077

0.1uF

C1078

0.01uF

C1079

0.01uF

C1080

0.01uF

C1081

0.01uF

C1129

0.1uF

C1128

0.1uF

VCC25

C1127

0.1uF

C1082

0.1uF

C1083

0.1uF

C1084

0.01uF

C1085

0.01uF

C1086

0.01uF

C1087

0.01uF

C1088

0.1uF

C1089

0.1uF

C1090

0.01uF

C1091

0.01uF

C1098

0.01uF

C1099

0.01uF

C1653

0.01uF

C1654

0.1uF

C1661

0.01uF

C1662

0.1uF

C1652

0.1uF

C1672

0.01uF

B

VCC_P

C1655

1.0uF/16V

V23
V25

W9
W11
W13
W15

W19
W21
W23
W25

AA10
AA11
AA14
AB17
AB18

AC2
AC4
AC6

AC10
AC11
AC21
AC23
AC25

AD2
AD4
AD6

AD17
AD18
AD21
AD23
AD25
AE10
AE11

AF7
AF14
AF17
AF18

AG1

AG27

V5

V7
R12
R14
R16
R19
T11
T13
T15
T18

U3
U5
U7

U12
U14
U16

V3
V21

P6
P11
P13
P15
P22

C1424

1.0uF/16V

GND91
GND92
GND93
GND94
GND95
GND96

GND98
GND99
GND100
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120
GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131

GND133
GND135
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND83

GND85
GND86
GND87

GND89
GND90
GND65
GND66
GND67
GND68
GND69

C1656

1.0uF/16V

C

U1D

C1657

1.0uF/16V

C1425

1.0uF/16V

CMIC_LE

VDD_IMBVCC25

C1658

1.0uF/16V

C1426

1.0uF/16V

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND71
GND70

GND136
GND137GND139

C1427

1.0uF/16V

A1
A27
B5
B6
B10
B11
B14
C17
C18
C25
D5
D6
D10
D11
D14
D21
D23
K16
E2
E17
E18
E22
E24
F10
F11
F14
G7
G17
G18
G26
J2
J4
J6
J9
J11
J13
J15
J17
J19
J21
J23
J25
K2
K4
K6
K21
K23
K25
L9
L12
L14
L16
L19
M11
M13
M15
M18
N9
N12
N14
N16
N19
P2
R9
P26
AA17
D25J7

C1659

1.0uF/16V

C1428

1.0uF/16V

C1660

1.0uF/16V

C1429

1.0uF/16V

VCC_P

4 4

3 3

VCC25

2 2

1 1

VDD_IMB

C1664

0.01uF

AA16
AA15
AB26
AB24
AB22

U1E

B2

VTT

B8

VTT

B16

VTT

B17

VTT

B22

VTT

B24

VTT

C4

VTT

C5

VTT

C11

VTT

C12

VTT

C21

VTT

C23

VTT

D16

VTT

D17

VTT

D26

VTT

E4

VTT

E5

VTT

E8

VTT

E11

VTT

E12

VTT

F16

VTT

F17

VTT

G4

VTT

G11

VTT

G12

VTT

G20

VTT

J10

VTT

J12

VTT

J14

VTT

J16

VTT

J18

VTT

K9

VDD_2.5

K7

VDD_2.5

K5

VDD_2.5

K3

VDD_2.5

L15

VDD_2.5

L13

VDD_2.5

L11

VDD_2.5

L7

VDD_2.5

L5

VDD_2.5

L3

VDD_2.5

M16

VDD_2.5

M14

VDD_2.5

M12

VDD_2.5

M9

VDD_2.5

N15

VDD_2.5

N13

VDD_2.5

N11

VDD_2.5

P16

VDD_2.5

P14

VDD_2.5

P12

VDD_2.5

P9

VDD_2.5

P4

VDD_2.5

R15

VDD_2.5

R13

VDD_2.5

T14

VDD_2.5

T12

VDD_2.5

T9

VDD_2.5

U15

VDD_2.5

U13

VDD_2.5

U11

VDD_2.5

V22

VDD_2.5

V9

VDD_2.5

V6

VDD_2.5

V4

VDD_2.5

V2

VDD_2.5

W18

VDD_2.5

W16

VDD_2.5

W14

VDD_2.5

W12

VDD_2.5

W10

VDD_2.5

W6

VDD_2.5

W4

VDD_2.5

W2

VDD_2.5

Y25

VDD_2.5

Y23

VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5

VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5

VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB

AVDD

AGNDVDD_2.5

MEM_VREF
MEM_VREF

DCOMP

RSVD

T_IMB_VREF

CMIC_LE

C1665

C1666

C1667

0.1uF

0.01uF

A

0.1uF

C1668

0.01uF

A

COMPATIBILITY IMB

1: A_IMB is Compatibility Bus
0: Thin IMB is Compatibility Bus
( Default )

4 4

JP25

HDR_1X2

VCC25

8.2K
R1105

COMP_IMB

2
1

1K

R1107

POWERGOOD_CMIC12,64

B

VCC25

C1395

0.1uF

CMIC_PLL_EN#
CMIC_DEFER_EN
COMP_IMB
IOQ_DEPTH

IMB_TRAINING
IMB_CRC_PARITY ALERT#
IMB_R_W_PTR_DLY

2
4
6

8
11
13
15
17

1
19

U136

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1G
2G

74LVCH244A

CMIC_FATAL#

18

1Y1

WRMRST#

16

1Y2

MEMOFF#

14

1Y3

MEMOFFACK#

12

1Y4

RCC_SCLDETERMINISTIC_IMB

9

2Y1

RCC_SDA

7

2Y2

5

2Y3

TESTMODE#

3

2Y4

20

VDD

10

GND

VCC25

C

CMIC_FATAL# 11,50
WRMRST# 11
MEMOFF# 11,49
MEMOFFACK# 11
RCC_SCL 12,27,37,41,48,69
RCC_SDA 12,27,37,41,48,69
ALERT# 11,27,37,50
TESTMODE# 12

D

Thin IMB FREQ.

1 = 100 MHz 2X
0 = 200 MHz 2X

CMIC_RSVD14

CMIC_RSVD

Do not stuff

VCC25

R1100

2.2K

R1505

RES_NOPOP

E

A/B_IMB CRC or PARITY

0 : PARITY is enabled for A & B IMB buses (Default )

VCC25

1 : CRC is enabled for A & B IMB buses

IMB - DETERMINISTIC/ NON

VCC25

3 3

HDR_1X2

2 2

1 1

VCC25

DEFER ENABLE/DISABLE

OFF: Defer Enabled ( Default )
ON: Defer Disabled

JP13

R1108 8.2K

2
1

CMIC_DEFER_EN

1K

R1109

CMIC PLL ENABLE/DISABLE

1: APLL Disabled
0: APLL Enabled
( Default )

VCC25

R1110

RES_NOPOP

DO NOT STUFF

CMIC_PLL_EN#

R1112 2.2K

A

R1396

8.2K

JP38

2
1

HDR_1X2

IMB_READ/WRITE POINTER DLY

VCC25

1 : 5 CLOCKs
0 : 6 CLOCKs

R1506

2.2K

IMB_R_W_PTR_DLY

Do not stuff

R1507

RES_NOPOP

B

DETERMINISTIC

0 : Deterministic IMB
1 : Non Deterministic IMB (Default )

DETERMINISTIC_IMB

1K

R1397

( Default )

C

JP14

HDR_1X2

IOQ DEPTH

VCC25

OFF: IOQ Depth 1
ON: IOQ Depth
12 ( Default )

R1111 8.2K

IOQ_DEPTH

2
1

1K

R1113

JP37

HDR_1X2

R1102

8.2K

2
1

( In final version Use CRC on IMB buses )

IMB_CRC_PARITY

R1103

2.2K

IMB_TRAINING

VCC25

0 : IMB TRAINING Disabled
1 : IMB TRAINING Enabled ( Default )

R1094

8.2K

JP39

2
1

HDR_1X2

D

IMB_TRAINING

1K

R1097

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

CMIC STRAPPING OPTIONS

Last Revision Date:

Monday, August 20, 2001

Sheet

E

of

15 75

Rev

0A

A

MA[0..14]13,17,18,19,20

MA0
MA1
MA2
MA3
MA4
MA5

DIMM_WP#1

DIMM_WP#2

VCC25

MA6
MA7
MA8
MA9
MA10
MA11
MA12

MA13
MA14

DIMM_WP#1

4 4

CS_013,18
CS_213,18

RAS#13,17,18,19,20
CAS#13,17,18,19,20
WE#13,17,18,19,20

CLK0_P24
CLK0_N24

A_CKE13,17,20

SSTLREF_D117,71

VCC25

VCC25

MEMB_SCL17,19,24,69
MEMB_SDA17,19,24,69

R1014

330

DIMM_WP#118

DIMM_RST#17,18,19,65

DIMM_WP#218

R16254.7K

3 3

R16264.7K

2 2

VCC25

1 1

A_DQS0_[0..1]17,20,21
A_DQS1_[0..1]17,20,21
A_DQS2_[0..1]17,20,21
A_DQS3_[0..1]17,20,21
A_DQS4_[0..1]17,20,21
A_DQS5_[0..1]17,20,21
A_DQS6_[0..1]17,20,21
A_DQS7_[0..1]17,20,21
A_DQS8_[0..1]17,20,21

A

11

665850

4234267418

89

81

48

A0

GND

GND

GND

GND

GND

GND

GND

GND

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

GND

J2

I2C ADD. - 0

B

3

139

132

124

116

100

93

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

DM0_DQS9

DM1_DQS10

DM2_DQS11

DM3_DQS12

DM4_DQS13

DM5_DQS14

DM6_DQS15

DM7_DQS16

DM9_DQS17

A_SD0_[0..7]17,20,21
A_SD1_[0..7]17,20,21
A_SD2_[0..7]17,20,21
A_SD3_[0..7]17,20,21
A_SD4_[0..7]17,20,21
A_SD5_[0..7]17,20,21
A_SD6_[0..7]17,20,21
A_SD7_[0..7]17,20,21
A_SD8_[0..7]17,20,21

B

GND

DQS0

DQS1

DQS2

DQS3

DQS5

DQS6

DQS7

ECC0
ECC1
ECC2
ECC3
DQS8

ECC4
ECC5
ECC6
ECC7

A_SD0_0

2

D0

A_SD0_1

4

D1

A_SD0_2

6

D2

A_SD0_3

8

D3

A_DQS0_0

5

A_DQS0_1

97

A_SD0_4

94

D4

A_SD0_5

95

D5

A_SD0_6

98

D6

A_SD0_7

99

D7

A_SD1_0

12

D8

A_SD1_1

13

D9

A_SD1_2

19

D10

A_SD1_3

20

D11

A_DQS1_0

14

A_DQS1_1

107

A_SD1_4

105

D12

A_SD1_5

106

D13

A_SD1_6

109

D14

A_SD1_7

110

D15

A_SD2_0

23

D16

A_SD2_1

24

D17

A_SD2_2

28

D18

A_SD2_3

31

D19

A_DQS2_0

25

A_DQS2_1

119

A_SD2_4

114

D20

A_SD2_5

117

D21

A_SD2_6

121

D22

A_SD2_7

123

D23

A_SD3_0

33

D24

A_SD3_1

35

D25

A_SD3_2

39

D26

A_SD3_3

40

D27

A_DQS3_0

36

A_DQS3_1

129

A_SD3_4

126

D28

A_SD3_5

127

D29

A_SD3_6

131

D30

A_SD3_7

133

D31

A_SD4_0

53

D32

A_SD4_1

55

D33

A_SD4_2

57

D34

A_SD4_3

60

D35

A_DQS4_0
A_DQS4_1

149

A_SD4_4

146

D36

A_SD4_5

147

D37

A_SD4_6

150

D38

A_SD4_7

151

D39

A_SD5_0

61

D40

A_SD5_1

64

D41

A_SD5_2

68

D42

A_SD5_3

69

D43

A_DQS5_0

67

A_DQS5_1

159

A_SD5_4

153

D44

A_SD5_5

155

D45

A_SD5_6

161

D46

A_SD5_7

162

D47

A_SD6_0

72

D48

A_SD6_1

73

D49

A_SD6_2

79

D50

A_SD6_3

80

D51

A_DQS6_0

78

A_DQS6_1

169

A_SD6_4

165

D52

A_SD6_5

166

D53

A_SD6_6

170

D54

A_SD6_7

171

D55

A_SD7_0

83

D56

A_SD7_1

84

D57

A_SD7_2

87

D58

A_SD7_3

88

D59

A_DQS7_0

86

A_DQS7_1

177

A_SD7_4

174

D60

A_SD7_5

175

D61

A_SD7_6

178

D62

A_SD7_7

179

D63

A_SD8_0

44

A_SD8_1

45

A_SD8_2

49

A_SD8_3

51

A_DQS8_0

47

A_DQS8_1

140

A_SD8_4

134

A_SD8_5

135

A_SD8_6

142

A_SD8_7

144

CS_113,18
CS_313,18

RAS#13,17,18,19,20
CAS#13,17,18,19,20
WE#13,17,18,19,20

CLK1_P24
CLK1_N24

A_CKE

SSTLREF_D1

VCC25

MEMB_SCL
MEMB_SDA

R1013 330

R1015 4.7K

VCC25

DIMM_RST#

C

11

665850

116

100

93

4234267418

89

MA0

48

A0

MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12

MA13
MA14

DIMM_WP#2

VCC25

VCC25

C

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

81

GND

GND

GND

GND

GND

GND

GND

GND

GND

J3

I2C ADD. - 2

GND

GND

GND

D

A_SD0_0
A_SD0_1
A_SD0_2
A_SD0_3
A_DQS0_0
A_DQS0_1
A_SD0_4
A_SD0_5
A_SD0_6
A_SD0_7
A_SD1_0
A_SD1_1
A_SD1_2
A_SD1_3
A_DQS1_0
A_DQS1_1
A_SD1_4
A_SD1_5
A_SD1_6
A_SD1_7
A_SD2_0
A_SD2_1
A_SD2_2
A_SD2_3
A_DQS2_0
A_DQS2_1
A_SD2_4
A_SD2_5
A_SD2_6
A_SD2_7
A_SD3_0
A_SD3_1
A_SD3_2
A_SD3_3
A_DQS3_0
A_DQS3_1
A_SD3_4
A_SD3_5
A_SD3_6
A_SD3_7
A_SD4_0
A_SD4_1
A_SD4_2
A_SD4_3
A_DQS4_0
A_DQS4_1
A_SD4_4
A_SD4_5
A_SD4_6
A_SD4_7
A_SD5_0
A_SD5_1
A_SD5_2
A_SD5_3
A_DQS5_0
A_DQS5_1
A_SD5_4
A_SD5_5
A_SD5_6
A_SD5_7
A_SD6_0
A_SD6_1
A_SD6_2
A_SD6_3
A_DQS6_0
A_DQS6_1
A_SD6_4
A_SD6_5
A_SD6_6
A_SD6_7
A_SD7_0
A_SD7_1
A_SD7_2
A_SD7_3
A_DQS7_0
A_DQS7_1
A_SD7_4
A_SD7_5
A_SD7_6
A_SD7_7
A_SD8_0
A_SD8_1
A_SD8_2
A_SD8_3

A_DQS8_0
A_DQS8_1
A_SD8_4
A_SD8_5
A_SD8_6
A_SD8_7

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

VCC25

22uF/10V/20%

22uF/10V/20%

Micro Star Restricted Secret

3

139

132

124

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

2

D0

4

D1

6

D2

8

D3

5

DQS0

97

DM0_DQS9

94

D4

95

D5

98

D6

99

D7

12

D8

13

D9

19

D10

20

D11

14

DQS1

107

DM1_DQS10

105

D12

106

D13

109

D14

110

D15

23

D16

24

D17

28

D18

31

D19

25

DQS2

119

DM2_DQS11

114

D20

117

D21

121

D22

123

D23

33

D24

35

D25

39

D26

40

D27

36

DQS3

129

DM3_DQS12

126

D28

127

D29

131

D30

133

D31

53

D32

55

D33

57

D34

60

D35

149

DM4_DQS13

146

D36

147

D37

150

D38

151

D39

61

D40

64

D41

68

D42

69

D43

67

DQS5

159

DM5_DQS14

153

D44

155

D45

161

D46

162

D47

72

D48

73

D49

79

D50

80

D51

78

DQS6

169

DM6_DQS15

165

D52

166

D53

170

D54

171

D55

83

D56

84

D57

87

D58

88

D59

86

DQS7

177

DM7_DQS16

174

D60

175

D61

178

D62

179

D63

44

ECC0

45

ECC1

49

ECC2

51

ECC3

47

DQS8

140

DM9_DQS17

134

ECC4

135

ECC5

142

ECC6

144

ECC7

D

C1358

0.01uF

C1362

0.01uF

C1366

0.01uF

C1370

0.01uF

C1374

0.01uF

VCC25

C1378

0.01uF

22uF/10V/20%

C1380

+

22uF/10V/20%

C1383

+

DIMM_CONN_1_&_2

E

C1359

0.01uF

0.01uF

C1363

0.01uF

0.01uF

C1367

0.01uF

0.01uF

C1371

0.01uF

0.01uF

C1375

0.01uF

0.01uF

C1379

0.01uF

22uF/10V/20%

C1381

+

22uF/10V/20%

C1384

+

Last Revision Date:

Monday, August 20, 2001

Sheet

16 75

E

C1360

C1364

C1368

C1372

C1376

C1361

0.01uF

C1365

0.01uF

C1369

0.01uF

C1373

0.01uF

C1377

0.01uF

VCC25

C1382

+

C1385

+

Rev

0A

of

A

MA[0..14]13,16,18,19,20

MA0
MA1
MA2
MA3
MA4
MA5
MA6

VCC25

R1011 330
R1012

MA7
MA8
MA9
MA10
MA11
MA12

4.7K

4 4

MA1313,16,18,19,20
MA1413,16,18,19,20

CS_413,19
CS_613,19

RAS#13,16,18,19,20
CAS#13,16,18,19,20
WE#13,16,18,19,20

CLK2_P24
CLK2_N24

A_CKE13,16,20

SSTLREF_D116,71

3 3

MEMB_SCL16,19,24,69
MEMB_SDA16,19,24,69

VCC25

DIMM_WP#319

DIMM_RST#16,18,19,65

DIMM_WP#419

VCC25

R1628 4.7K

DIMM_WP#4

DIMM_WP#3

R1627 4.7K

VCC25

2 2

A_SD1_[0..7]16,20,21
A_SD0_[0..7]16,20,21
A_SD2_[0..7]16,20,21
A_SD3_[0..7]16,20,21
A_SD4_[0..7]16,20,21

1 1

A_SD5_[0..7]16,20,21
A_SD6_[0..7]16,20,21
A_SD7_[0..7]16,20,21
A_SD8_[0..7]16,20,21
A_DQS0_[0..1]16,20,21
A_DQS1_[0..1]16,20,21
A_DQS2_[0..1]16,20,21
A_DQS3_[0..1]16,20,21
A_DQS4_[0..1]16,20,21
A_DQS5_[0..1]16,20,21
A_DQS6_[0..1]16,20,21
A_DQS7_[0..1]16,20,21
A_DQS8_[0..1]16,20,21

A

11

665850

4234267418

48

A0

GND

GND

GND

GND

GND

GND

GND

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

22uF/10V/20%

J4

I2C ADD. - 4 I2C ADD. - 6

22uF/10V/20%

C1355

+

81

GND

GND

+

100

93

89

GND

GND

GND

22uF/10V/20%

C1356

B

3

139

132

124

116

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

DQS0

DM0_DQS9

DQS1

DM1_DQS10

DQS2

DM2_DQS11

DQS3

DM3_DQS12

DM4_DQS13

DQS5

DM5_DQS14

DQS6

DM6_DQS15

DQS7

DM7_DQS16

ECC0
ECC1
ECC2
ECC3
DQS8

DM9_DQS17

ECC4
ECC5
ECC6
ECC7

D10
D11

D12
D13
D14
D15
D16
D17
D18
D19

D20
D21
D22
D23
D24
D25
D26
D27

D28
D29
D30
D31
D32
D33
D34
D35

D36
D37
D38
D39
D40
D41
D42
D43

D44
D45
D46
D47
D48
D49
D50
D51

D52
D53
D54
D55
D56
D57
D58
D59

D60
D61
D62
D63

A_SD0_0

2

D0

A_SD0_1

4

D1

A_SD0_2

6

D2

A_SD0_3

8

D3

A_DQS0_0

5

A_DQS0_1

97

A_SD0_4

94

D4

A_SD0_5

95

D5

A_SD0_6

98

D6

A_SD0_7

99

D7

A_SD1_0

12

D8

A_SD1_1

13

D9

A_SD1_2

19

A_SD1_3

20

A_DQS1_0

14

A_DQS1_1

107

A_SD1_4

105

A_SD1_5

106

A_SD1_6

109

A_SD1_7

110

A_SD2_0

23

A_SD2_1

24

A_SD2_2

28

A_SD2_3

31

A_DQS2_0

25

A_DQS2_1

119

A_SD2_4

114

A_SD2_5

117

A_SD2_6

121

A_SD2_7

123

A_SD3_0

33

A_SD3_1

35

A_SD3_2

39

A_SD3_3

40

A_DQS3_0

36

A_DQS3_1

129

A_SD3_4

126

A_SD3_5

127

A_SD3_6

131

A_SD3_7

133

A_SD4_0

53

A_SD4_1

55

A_SD4_2

57

A_SD4_3

60

A_DQS4_0
A_DQS4_1

149

A_SD4_4

146

A_SD4_5

147

A_SD4_6

150

A_SD4_7

151

A_SD5_0

61

A_SD5_1

64

A_SD5_2

68

A_SD5_3

69

A_DQS5_0

67

A_DQS5_1

159

A_SD5_4

153

A_SD5_5

155

A_SD5_6

161

A_SD5_7

162

A_SD6_0

72

A_SD6_1

73

A_SD6_2

79

A_SD6_3

80

A_DQS6_0

78

A_DQS6_1

169

A_SD6_4

165

A_SD6_5

166

A_SD6_6

170

A_SD6_7

171

A_SD7_0

83

A_SD7_1

84

A_SD7_2

87

A_SD7_3

88

A_DQS7_0

86

A_DQS7_1

177

A_SD7_4

174

A_SD7_5

175

A_SD7_6

178

A_SD7_7

179

A_SD8_0

44

A_SD8_1

45

A_SD8_2

49

A_SD8_3

51

A_DQS8_0

47

A_DQS8_1

140

A_SD8_4

134

A_SD8_5

135

A_SD8_6

142

A_SD8_7

144

C

CLK3_P24
CLK3_N24
CS_513,19
CS_713,19

A_CKE

MA0
MA1
MA2
MA3
MA4

MA5

MA6
MA7
MA8
MA9
MA10
MA11
MA12

MA13
MA14

CS_5
CS_7

RAS#
CAS#
WE#

CLK3_P
CLK3_N

SSTLREF_D1

VCC25

MEMB_SCL
MEMB_SDA

R1344 330

4.7K

R1345

VCC25

DIMM_WP#4

DIMM_RST#

VCC25

VCC25

11

4234267418

48

A0

GND

GND

GND

GND

GND

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

D

665850

93

89

81

GND

GND

GND

GND

GND

J43

3

139

132

124

116

100

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

DQS0

DM0_DQS9

DQS1

DM1_DQS10

DQS2

DM2_DQS11

DQS3

DM3_DQS12

DM4_DQS13

DQS5

DM5_DQS14

DQS6

DM6_DQS15

DQS7

DM7_DQS16

ECC0
ECC1
ECC2
ECC3
DQS8

DM9_DQS17

ECC4
ECC5
ECC6
ECC7

D10
D11

D12
D13
D14
D15
D16
D17
D18
D19

D20
D21
D22
D23
D24
D25
D26
D27

D28
D29
D30
D31
D32
D33
D34
D35

D36
D37
D38
D39
D40
D41
D42
D43

D44
D45
D46
D47
D48
D49
D50
D51

D52
D53
D54
D55
D56
D57
D58
D59

D60
D61
D62
D63

A_SD0_0

2

D0

A_SD0_1

4

D1

A_SD0_2

6

D2

A_SD0_3

8

D3

A_DQS0_0

5

A_DQS0_1

97

A_SD0_4

94

D4

A_SD0_5

95

D5

A_SD0_6

98

D6

A_SD0_7

99

D7

A_SD1_0

12

D8

A_SD1_1

13

D9

A_SD1_2

19

A_SD1_3

20

A_DQS1_0

14

A_DQS1_1

107

A_SD1_4

105

A_SD1_5

106

A_SD1_6

109

A_SD1_7

110

A_SD2_0

23

A_SD2_1

24

A_SD2_2

28

A_SD2_3

31

A_DQS2_0

25

A_DQS2_1

119

A_SD2_4

114

A_SD2_5

117

A_SD2_6

121

A_SD2_7

123

A_SD3_0

33

A_SD3_1

35

A_SD3_2

39

A_SD3_3

40

A_DQS3_0

36

A_DQS3_1

129

A_SD3_4

126

A_SD3_5

127

A_SD3_6

131

A_SD3_7

133

A_SD4_0

53

A_SD4_1

55

A_SD4_2

57

A_SD4_3

60

A_DQS4_0
A_DQS4_1

149

A_SD4_4

146

A_SD4_5

147

A_SD4_6

150

A_SD4_7

151

A_SD5_0

61

A_SD5_1

64

A_SD5_2

68

A_SD5_3

69

A_DQS5_0

67

A_DQS5_1

159

A_SD5_4

153

A_SD5_5

155

A_SD5_6

161

A_SD5_7

162

A_SD6_0

72

A_SD6_1

73

A_SD6_2

79

A_SD6_3

80

A_DQS6_0

78

A_DQS6_1

169

A_SD6_4

165

A_SD6_5

166

A_SD6_6

170

A_SD6_7

171

A_SD7_0

83

A_SD7_1

84

A_SD7_2

87

A_SD7_3

88

A_DQS7_0

86

A_DQS7_1

177

A_SD7_4

174

A_SD7_5

175

A_SD7_6

178

A_SD7_7

179

A_SD8_0

44

A_SD8_1

45

A_SD8_2

49

A_SD8_3

51

A_DQS8_0

47

A_DQS8_1

140

A_SD8_4

134

A_SD8_5

135

A_SD8_6

142

A_SD8_7

144

VCC25

E

C1349

C1348

0.01uF

0.01uF

C1353

C1352

0.01uF

0.01uF

C1351

C1350

0.01uF

0.01uF

C1347

C1346

0.01uF

0.01uF

VCC25

VCC25

C1357

+

B

0.01uF

C1354

VCC25

0.01uF

C1400

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

C

D

http://www.msi.com.tw

DIMM_CONN_3_&_4

Last Revision Date:

Monday, August 20, 2001

Sheet

E

of

17 75

Rev

0A

A

MA[0..14]13,16,17,19,20

MA0
MA1
MA2
MA3
MA4
MA5

4 4

CS_013,16
CS_213,16

RAS#13,16,17,19,20
CAS#13,16,17,19,20
WE#13,16,17,19,20

B_CKE13,19,20

3 3

MEMA_SCL69
MEMA_SDA69

MA6
MA7
MA8
MA9
MA10
MA11
MA12

MA13
MA14

CLK4_P24
CLK4_N24

SSTLREF_D219,71

VCC25

R1010

330

DIMM_WP#116

DIMM_RST#16,17,19,65

DIMM_WP#216

VCC25 VCC25

2 2

VCC25

1 1

B_SD0_[0..7]19,20,21
B_SD1_[0..7]19,20,21
B_SD2_[0..7]19,20,21
B_SD3_[0..7]19,20,21
B_SD4_[0..7]19,20,21
B_SD5_[0..7]19,20,21
B_SD6_[0..7]19,20,21
B_SD7_[0..7]19,20,21
B_SD8_[0..7]19,20,21

A

11

665850

4234267418

81

48

A0

GND

GND

GND

GND

GND

GND

GND

GND

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

J6

I2C ADD. - 0 I2C ADD. - 2

B

3

139

132

124

116

100

93

89

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

B

GND

GND

DM0_DQS9

DM1_DQS10

DM2_DQS11

DM3_DQS12

DM4_DQS13

DM5_DQS14

DM6_DQS15

DM7_DQS16

DM9_DQS17

GND

B_DQS0_[0..1]19,20,21
B_DQS1_[0..1]19,20,21
B_DQS2_[0..1]19,20,21
B_DQS3_[0..1]19,20,21
B_DQS4_[0..1]19,20,21
B_DQS5_[0..1]19,20,21
B_DQS6_[0..1]19,20,21
B_DQS7_[0..1]19,20,21
B_DQS8_[0..1]19,20,21

DQS0

DQS1

DQS2

DQS3

DQS5

DQS6

DQS7

ECC0
ECC1
ECC2
ECC3
DQS8

ECC4
ECC5
ECC6
ECC7

B_SD0_0

2

D0

B_SD0_1

4

D1

B_SD0_2

6

D2

B_SD0_3

8

D3

B_DQS0_0

5

B_DQS0_1

97

B_SD0_4

94

D4

B_SD0_5

95

D5

B_SD0_6

98

D6

B_SD0_7

99

D7

B_SD1_0

12

D8

B_SD1_1

13

D9

B_SD1_2

19

D10

B_SD1_3

20

D11

B_DQS1_0

14

B_DQS1_1

107

B_SD1_4

105

D12

B_SD1_5

106

D13

B_SD1_6

109

D14

B_SD1_7

110

D15

B_SD2_0

23

D16

B_SD2_1

24

D17

B_SD2_2

28

D18

B_SD2_3

31

D19

B_DQS2_0

25

B_DQS2_1

119

B_SD2_4

114

D20

B_SD2_5

117

D21

B_SD2_6

121

D22

B_SD2_7

123

D23

B_SD3_0

33

D24

B_SD3_1

35

D25

B_SD3_2

39

D26

B_SD3_3

40

D27

B_DQS3_0

36

B_DQS3_1

129

B_SD3_4

126

D28

B_SD3_5

127

D29

B_SD3_6

131

D30

B_SD3_7

133

D31

B_SD4_0

53

D32

B_SD4_1

55

D33

B_SD4_2

57

D34

B_SD4_3

60

D35

B_DQS4_0
B_DQS4_1

149

B_SD4_4

146

D36

B_SD4_5

147

D37

B_SD4_6

150

D38

B_SD4_7

151

D39

B_SD5_0

61

D40

B_SD5_1

64

D41

B_SD5_2

68

D42

B_SD5_3

69

D43

B_DQS5_0

67

B_DQS5_1

159

B_SD5_4

153

D44

B_SD5_5

155

D45

B_SD5_6

161

D46

B_SD5_7

162

D47

B_SD6_0

72

D48

B_SD6_1

73

D49

B_SD6_2

79

D50

B_SD6_3

80

D51

B_DQS6_0

78

B_DQS6_1

169

B_SD6_4

165

D52

B_SD6_5

166

D53

B_SD6_6

170

D54

B_SD6_7

171

D55

B_SD7_0

83

D56

B_SD7_1

84

D57

B_SD7_2

87

D58

B_SD7_3

88

D59

B_DQS7_0

86

B_DQS7_1

177

B_SD7_4

174

D60

B_SD7_5

175

D61

B_SD7_6

178

D62

B_SD7_7

179

D63

B_SD8_0

44

B_SD8_1

45

B_SD8_2

49

B_SD8_3

51

B_DQS8_0

47

B_DQS8_1

140

B_SD8_4

134

B_SD8_5

135

B_SD8_6

142

B_SD8_7

144

VCC25

CS_113,16
CS_313,16

CLK5_P24
CLK5_N24

MEMA_SCL
MEMA_SDA

R1007 4.7K
R1009 330

B_CKE

SSTLREF_D2

VCC25

DIMM_WP#2

DIMM_RST#

C

11

665850

93

4234267418

89

MA0

48

A0

MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12

MA13
MA14

RAS#
CAS#
WE#

C

VCC25

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

81

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

J7

D

B_SD0_0
B_SD0_1
B_SD0_2
B_SD0_3
B_DQS0_0
B_DQS0_1
B_SD0_4
B_SD0_5
B_SD0_6
B_SD0_7
B_SD1_0
B_SD1_1
B_SD1_2
B_SD1_3
B_DQS1_0
B_DQS1_1
B_SD1_4
B_SD1_5
B_SD1_6
B_SD1_7
B_SD2_0
B_SD2_1
B_SD2_2
B_SD2_3
B_DQS2_0
B_DQS2_1
B_SD2_4
B_SD2_5
B_SD2_6
B_SD2_7
B_SD3_0
B_SD3_1
B_SD3_2
B_SD3_3
B_DQS3_0
B_DQS3_1
B_SD3_4
B_SD3_5
B_SD3_6
B_SD3_7
B_SD4_0
B_SD4_1
B_SD4_2
B_SD4_3
B_DQS4_0
B_DQS4_1
B_SD4_4
B_SD4_5
B_SD4_6
B_SD4_7
B_SD5_0
B_SD5_1
B_SD5_2
B_SD5_3
B_DQS5_0
B_DQS5_1
B_SD5_4
B_SD5_5
B_SD5_6
B_SD5_7
B_SD6_0
B_SD6_1
B_SD6_2
B_SD6_3
B_DQS6_0
B_DQS6_1
B_SD6_4
B_SD6_5
B_SD6_6
B_SD6_7
B_SD7_0
B_SD7_1
B_SD7_2
B_SD7_3
B_DQS7_0
B_DQS7_1
B_SD7_4
B_SD7_5
B_SD7_6
B_SD7_7
B_SD8_0
B_SD8_1
B_SD8_2
B_SD8_3
B_DQS8_0

B_DQS8_1
B_SD8_4
B_SD8_5
B_SD8_6
B_SD8_7

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

VCC25

Micro Star Restricted Secret

3

139

132

124

116

100

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

2

D0

4

D1

6

D2

8

D3

5

DQS0

97

DM0_DQS9

94

D4

95

D5

98

D6

99

D7

12

D8

13

D9

19

D10

20

D11

14

DQS1

107

DM1_DQS10

105

D12

106

D13

109

D14

110

D15

23

D16

24

D17

28

D18

31

D19

25

DQS2

119

DM2_DQS11

114

D20

117

D21

121

D22

123

D23

33

D24

35

D25

39

D26

40

D27

36

DQS3

129

DM3_DQS12

126

D28

127

D29

131

D30

133

D31

53

D32

55

D33

57

D34

60

D35

149

DM4_DQS13

146

D36

147

D37

150

D38

151

D39

61

D40

64

D41

68

D42

69

D43

67

DQS5

159

DM5_DQS14

153

D44

155

D45

161

D46

162

D47

72

D48

73

D49

79

D50

80

D51

78

DQS6

169

DM6_DQS15

165

D52

166

D53

170

D54

171

D55

83

D56

84

D57

87

D58

88

D59

86

DQS7

177

DM7_DQS16

174

D60

175

D61

178

D62

179

D63

44

ECC0

45

ECC1

49

ECC2

51

ECC3

47

DQS8

140

DM9_DQS17

134

ECC4

135

ECC5

142

ECC6

144

ECC7

D

C1318

0.01uF

C1322

0.01uF

C1326

0.01uF

C1330

0.01uF

C1334

0.01uF

VCC25

C1338

0.01uF

DIMM_CONN_5_&_6

E

C1319

0.01uF

0.01uF

C1323

0.01uF

0.01uF

C1327

0.01uF

0.01uF

C1331

0.01uF

0.01uF

C1335

0.01uF

0.01uF

C1339

0.01uF

Last Revision Date:

Monday, August 20, 2001

Sheet

18 75

E

C1320

C1324

C1328

C1332

C1336

C1321

0.01uF

C1325

0.01uF

C1329

0.01uF

C1333

0.01uF

C1337

0.01uF

Rev

0A

of

A

MA[0..14]13,16,17,18,20

MA0
MA1
MA2
MA3
MA4

4 4

MA1313,16,17,18,20
MA1413,16,17,18,20

CS_413,17
CS_613,17

RAS#13,16,17,18,20
CAS#13,16,17,18,20
WE#13,16,17,18,20

CLK6_P24
CLK6_N24

B_CKE13,18,20

MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12

SSTLREF_D218,71

3 3

MEMB_SCL16,17,24,69
MEMB_SDA16,17,24,69

VCC25

MEMA_SCL
MEMA_SDA

R1005 330

R1006 4.7K

VCC25

DIMM_WP#317

DIMM_RST#16,17,18,65

DIMM_WP#417

VCC25

2 2

VCC25

B_SD0_[0..7]18,20,21
B_SD1_[0..7]18,20,21
B_SD2_[0..7]18,20,21
B_SD3_[0..7]18,20,21

1 1

B_SD4_[0..7]18,20,21
B_SD5_[0..7]18,20,21
B_SD6_[0..7]18,20,21
B_SD7_[0..7]18,20,21

B_SD8_[0..7]18,20,21
B_DQS0_[0..1]18,20,21
B_DQS1_[0..1]18,20,21
B_DQS2_[0..1]18,20,21
B_DQS3_[0..1]18,20,21
B_DQS4_[0..1]18,20,21
B_DQS5_[0..1]18,20,21
B_DQS6_[0..1]18,20,21
B_DQS7_[0..1]18,20,21
B_DQS8_[0..1]18,20,21

A

11

4234267418

48

A0

GND

GND

GND

GND

GND

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181
182
183

102 56
101

173
163

113
103

168
148
120
108

136
180
156
112
164
143
128
104

172

I2C ADD. - 4

SA0
SA1
SA2

90

WP

10

RESET_

NC1 DQS4
NC2

9

NC4
NC5
CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU
BA2_NU
A13_NU

VDD
VDD
VDD
VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

96

VDDQ
VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

665850

93

89

81

GND

GND

GND

GND

GND

GND

J8

B

3

139

132

124

116

100

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

DQS0

DM0_DQS9

DQS1

DM1_DQS10

DQS2

DM2_DQS11

DQS3

DM3_DQS12

DM4_DQS13

DQS5

DM5_DQS14

DQS6

DM6_DQS15

DQS7

DM7_DQS16

ECC0
ECC1
ECC2
ECC3
DQS8

DM9_DQS17

ECC4
ECC5
ECC6
ECC7

VCC25 VCC25

C1314

0.01uF

B

C

CLK7_P24
CLK7_N24
CS_713,17
CS_513,17

B_SD0_0

2

D0

B_SD0_1

4

D1

B_SD0_2

6

D2

B_SD0_3

8

D3

B_DQS0_0

5

B_DQS0_1

97

B_SD0_4

94

D4

B_SD0_5

95

D5

B_SD0_6

98

D6

B_SD0_7

99

D7

B_SD1_0

12

D8

B_SD1_1

13

D9

B_SD1_2

19

D10
D11

D12
D13
D14
D15
D16
D17
D18
D19

D20
D21
D22
D23
D24
D25
D26
D27

D28
D29
D30
D31
D32
D33
D34
D35

D36
D37
D38
D39
D40
D41
D42
D43

D44
D45
D46
D47
D48
D49
D50
D51

D52
D53
D54
D55
D56
D57
D58
D59

D60
D61
D62
D63

B_SD1_3

20

B_DQS1_0

14

B_DQS1_1

107

B_SD1_4

105

B_SD1_5

106

B_SD1_6

109

B_SD1_7

110

B_SD2_0

23

B_SD2_1

24

B_SD2_2

28

B_SD2_3

31

B_DQS2_0

25

B_DQS2_1

119

B_SD2_4

114

B_SD2_5

117

B_SD2_6

121

B_SD2_7

123

B_SD3_0

33

B_SD3_1

35

B_SD3_2

39

B_SD3_3

40

B_DQS3_0

36

B_DQS3_1

129

B_SD3_4

126

B_SD3_5

127

B_SD3_6

131

B_SD3_7

133

B_SD4_0

53

B_SD4_1

55

B_SD4_2

57

B_SD4_3

60

B_DQS4_0 DIMM_WP#4
B_DQS4_1

149

B_SD4_4

146

B_SD4_5

147

B_SD4_6

150

B_SD4_7

151

B_SD5_0

61

B_SD5_1

64

B_SD5_2

68

B_SD5_3

69

B_DQS5_0

67

B_DQS5_1

159

B_SD5_4

153

B_SD5_5

155

B_SD5_6

161

B_SD5_7

162

B_SD6_0

72

B_SD6_1

73

B_SD6_2

79

B_SD6_3

80

B_DQS6_0

78

B_DQS6_1

169

B_SD6_4

165

B_SD6_5

166

B_SD6_6

170

B_SD6_7

171

B_SD7_0

83

B_SD7_1

84

B_SD7_2

87

B_SD7_3

88

B_DQS7_0

86

B_DQS7_1

177

B_SD7_4

174

B_SD7_5

175

B_SD7_6

178

B_SD7_7

179

B_SD8_0

44

B_SD8_1

45

B_SD8_2

49

B_SD8_3

51

B_DQS8_0

47

B_DQS8_1

140

B_SD8_4

134

B_SD8_5

135

B_SD8_6

142

B_SD8_7

144

C1550

0.01uF

VCC25

22uF/10V/20%

C1548

+

R1347

VCC25

B_CKE

SSTLREF_D2

VCC25

MEMA_SCL
MEMA_SDA

R1346

330

4.7K

DIMM_RST#

VCC25

22uF/10V/20%

C

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12

MA13
MA14

CS_5
CS_7

RAS#
CAS#
WE#

CLK7_P
CLK7_N

+

C1315

11

665850

4234267418

81

48

A0

GND

GND

GND

GND

GND

GND

GND

GND

GND

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141

A10

118

A11

115

A12

59

BA0

52

BA1

157

CS0_

158

CS1_

154

RAS_

65

CAS_

63

WE_

137

CLK0_P

138

CLK0_N

21

CLKE0

111

CLKE1

167

FETEN

1

VREF

184

VDDSPD

82

VDDID

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

90

WP

10

RESET_

102 56

NC1 DQS4

101

NC2

9

NC4

173

NC5

163

CS3_NU

71

CS2_NU

75

CLK2_N_DU

76

CLK2_P_DU

17

CLK1_N_DU

16

CLK1_P_DU

113

BA2_NU

103

A13_NU

168

VDD

148

VDD

120

VDD

108

VDD

85

VDD

70

VDD

46

VDD

38

VDD

7

VDD

136

VDDQ

180

VDDQ

156

VDDQ

112

VDDQ

164

VDDQ

143

VDDQ

128

VDDQ

104

VDDQ

96

VDDQ

172

VDDQ

77

VDDQ

62

VDDQ

54

VDDQ

30

VDDQ

22

VDDQ

15

VDDQ

J44

I2C ADD. - 6

VCC25

22uF/10V/20%

+

C1316

22uF/10V/20%

+

C1549

D

3

139

132

124

116

100

93

89

145

160

176

152

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

D

GND

GND

DM0_DQS9

DM1_DQS10

DM2_DQS11

DM3_DQS12

DM4_DQS13

DM5_DQS14

DM6_DQS15

DM7_DQS16

DM9_DQS17

GND

DQS0

D10
D11

DQS1

D12
D13
D14
D15
D16
D17
D18
D19

DQS2

D20
D21
D22
D23
D24
D25
D26
D27

DQS3

D28
D29
D30
D31
D32
D33
D34
D35

D36
D37
D38
D39
D40
D41
D42
D43

DQS5

D44
D45
D46
D47
D48
D49
D50
D51

DQS6

D52
D53
D54
D55
D56
D57
D58
D59

DQS7

D60
D61
D62

D63
ECC0
ECC1
ECC2
ECC3
DQS8

ECC4
ECC5
ECC6
ECC7

2

D0

4

D1

6

D2

8

D3

5
97
94

D4

95

D5

98

D6

99

D7

12

D8

13

D9

19
20
14
107
105
106
109
110
23
24
28
31
25
119
114
117
121
123
33
35
39
40
36
129
126
127
131
133
53
55
57
60

149
146
147
150
151
61
64
68
69
67
159
153
155
161
162
72
73
79
80
78
169
165
166
170
171
83
84
87
88
86
177
174
175
178
179
44
45
49
51
47
140
134
135
142
144

B_SD0_0
B_SD0_1
B_SD0_2
B_SD0_3
B_DQS0_0
B_DQS0_1
B_SD0_4
B_SD0_5
B_SD0_6
B_SD0_7
B_SD1_0
B_SD1_1
B_SD1_2
B_SD1_3
B_DQS1_0
B_DQS1_1
B_SD1_4
B_SD1_5
B_SD1_6
B_SD1_7
B_SD2_0
B_SD2_1
B_SD2_2
B_SD2_3
B_DQS2_0
B_DQS2_1
B_SD2_4
B_SD2_5
B_SD2_6
B_SD2_7
B_SD3_0
B_SD3_1
B_SD3_2
B_SD3_3
B_DQS3_0
B_DQS3_1
B_SD3_4
B_SD3_5
B_SD3_6
B_SD3_7
B_SD4_0
B_SD4_1
B_SD4_2
B_SD4_3
B_DQS4_0
B_DQS4_1
B_SD4_4
B_SD4_5
B_SD4_6
B_SD4_7
B_SD5_0
B_SD5_1
B_SD5_2
B_SD5_3
B_DQS5_0
B_DQS5_1
B_SD5_4
B_SD5_5
B_SD5_6
B_SD5_7
B_SD6_0
B_SD6_1
B_SD6_2
B_SD6_3
B_DQS6_0
B_DQS6_1
B_SD6_4
B_SD6_5
B_SD6_6
B_SD6_7
B_SD7_0
B_SD7_1
B_SD7_2
B_SD7_3
B_DQS7_0
B_DQS7_1
B_SD7_4
B_SD7_5
B_SD7_6
B_SD7_7
B_SD8_0
B_SD8_1
B_SD8_2
B_SD8_3
B_DQS8_0
B_DQS8_1
B_SD8_4
B_SD8_5
B_SD8_6
B_SD8_7

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

E

VCC25

DIMM_CONN_7_&_8

Last Revision Date:

Monday, August 20, 2001

Sheet

E

C1544

0.01uF

C1546

0.01uF

19 75

C1308

0.01uF

C1312

0.01uF

C1306

0.01uF

C1310

0.01uF

C1545

0.01uF

0.01uF

of

C1547

C1309

0.01uF

C1313

0.01uF

C1307

0.01uF

C1311

0.01uF

Rev

0A

A

RP25

R_A_SD2_5
R_A_SD2_1
R_A_SD2_4
R_A_SD2_0
R_A_SD2_7
R_A_SD2_3
R_A_SD2_6
R_A_SD2_2
R_A_SD1_5
R_A_SD1_4
R_A_SD1_1
R_A_SD1_0
R_A_SD1_2
R_A_SD1_3
R_A_SD1_7
R_A_SD1_6
R_A_SD0_5
R_A_SD0_1
R_A_SD0_4
R_A_SD0_0
R_A_SD0_7
R_A_SD0_3
R_A_SD0_6
R_A_SD0_2

R_A_SD3_4
R_A_SD3_0
R_A_SD3_1
R_A_SD3_5
R_A_SD3_3
R_A_SD3_7
R_A_SD3_6
R_A_SD3_2
R_A_SD8_1

R_A_SD8_5
R_A_SD8_3
R_A_SD8_7
R_A_SD8_6
R_A_SD8_2
A_DQS3_0
A_DQS3_1
A_DQS1_0
A_DQS1_1
A_DQS0_0
A_DQS0_1
A_DQS2_0
A_DQS2_1
A_DQS8_0
A_DQS8_1

A_SD2_5

RP1 RP15R

A_SD2_1
A_SD2_4
A_SD2_0
A_SD2_7
A_SD2_3
A_SD2_6
A_SD2_2
A_SD1_5
A_SD1_4
A_SD1_1

4 4

3 3

A_SD1_0
A_SD1_2
A_SD1_3
A_SD1_7
A_SD1_6
A_SD0_5
A_SD0_1
A_SD0_4
A_SD0_0
A_SD0_7
A_SD0_3
A_SD0_6
A_SD0_2

A_SD3_4
A_SD3_0
A_SD3_1
A_SD3_5
A_SD3_3
A_SD3_7
A_SD3_6
A_SD3_2
A_SD8_1
A_SD8_0 R_A_SD8_0
A_SD8_4 R_A_SD8_4
A_SD8_5
A_SD8_3
A_SD8_7
A_SD8_6
A_SD8_2
R_A_DQS3_0
R_A_DQS3_1
R_A_DQS1_0
R_A_DQS1_1
R_A_DQS0_0
R_A_DQS0_1
R_A_DQS2_0
R_A_DQS2_1
R_A_DQS8_0
R_A_DQS8_1

1 8
2 7
3 6
4 5

RP3 RP15R

1 8
2 7
3 6
4 5

RP9 RP15R

1 8
2 7
3 6
4 5

RP11 RP15R

1 8
2 7
3 6
4 5

RP17 RP15R

1 8
2 7
3 6
4 5

RP19 RP15R

1 8
2 7
3 6
4 5

4 5
3 6
2 7
1 8
1 8
2 7
3 6
4 5

RP33

1 8

RP15R

2 7
3 6
4 5

RP35

1 8

RP15R

2 7
3 6

4 5

R17 12
R18 12
R9 12
R10 12
R13 12
R14 12
R5 12
R6 12
R21 12
R22 12

RP27
RP15R

B

RP42

A_SD4_0
A_SD4_4
A_SD4_1
A_SD4_5
A_SD4_2 R_A_SD4_2
A_SD4_6
A_SD4_3
A_SD4_7
A_SD5_5
A_SD5_1
A_SD5_4
A_SD5_0
A_SD5_6
A_SD5_7
A_SD5_2
A_SD5_3
A_SD6_4
A_SD6_5
A_SD6_1
A_SD6_0
A_SD6_3
A_SD6_7
A_SD6_6
A_SD6_2
A_SD7_0
A_SD7_1
A_SD7_5
A_SD7_4
A_SD7_7
A_SD7_3
A_SD7_2
A_SD7_6
R_A_DQS4_0
R_A_DQS4_1
R_A_DQS5_0
R_A_DQS5_1
R_A_DQS7_0
R_A_DQS7_1
R_A_DQS6_0
R_A_DQS6_1

RP50

RP52
RP15R

RP58
RP15R

RP60
RP15R

RP66
RP15R

RP68
RP15R

RP44

4 5
3 6
2 7

RP15R

1 8
4 5
3 6
2 7
1 8

RP15R

1 8
2 7

RP15R

3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5

R29 12
R30 12
R33 12
R34 12
R37 12
R38 12
R41 12
R42 12

R_A_SD4_0
R_A_SD4_4
R_A_SD4_1
R_A_SD4_5

R_A_SD4_6
R_A_SD4_3
R_A_SD4_7
R_A_SD5_5
R_A_SD5_1
R_A_SD5_4
R_A_SD5_0
R_A_SD5_6
R_A_SD5_7
R_A_SD5_2
R_A_SD5_3
R_A_SD6_4
R_A_SD6_5
R_A_SD6_1
R_A_SD6_0
R_A_SD6_3
R_A_SD6_7
R_A_SD6_6
R_A_SD6_2
R_A_SD7_0
R_A_SD7_1
R_A_SD7_5
R_A_SD7_4
R_A_SD7_7
R_A_SD7_3
R_A_SD7_2
R_A_SD7_6
A_DQS4_0
A_DQS4_1
A_DQS5_0
A_DQS5_1
A_DQS7_0

A_DQS7_1

A_DQS6_0
A_DQS6_1

C

RP5

RP15R
RP7

RP15R

RP15R

RP15R

RP15R

RP31

RP15R

RP15R

R_B_SD1_5

18

R_B_SD1_1

27

R_B_SD1_4

36

R_B_SD1_0

45

R_B_SD1_3

18

R_B_SD1_2

27

R_B_SD1_7

36

R_B_SD1_6

45

R_B_SD0_1

18

R_B_SD0_5

27
36

R_B_SD0_0

45

R_B_SD0_2

45

R_B_SD0_6

36

R_B_SD0_7

27

R_B_SD0_3

18

R_B_SD2_5

18

R_B_SD2_1

27

R_B_SD2_0

36

R_B_SD2_4

45

R_B_SD2_7

18

R_B_SD2_3

27

R_B_SD2_6

36

R_B_SD2_2

45

R_B_SD3_0

45

R_B_SD3_4B_SD3_4

36

R_B_SD3_1

27

R_B_SD3_5

18

R_B_SD3_7

18

R_B_SD3_3

27

R_B_SD3_6

36

R_B_SD3_2

45

R_B_SD8_1

18

R_B_SD8_0

27

R_B_SD8_5

36

R_B_SD8_4

45

R_B_SD8_7

18
27

R_B_SD8_6

36

R_B_SD8_2

45

B_DQS2_0
B_DQS2_1
B_DQS1_0
B_DQS1_1
B_DQS0_0
B_DQS0_1
B_DQS3_0
B_DQS3_1

B_DQS8_0
B_DQS8_1

B_SD1_5
B_SD1_1
B_SD1_4
B_SD1_0
B_SD1_3
B_SD1_2
B_SD1_7
B_SD1_6

RP13

B_SD0_1
B_SD0_5
B_SD0_4 R_B_SD0_4
B_SD0_0

RP15 RP15R

B_SD0_2
B_SD0_6
B_SD0_7
B_SD0_3

RP21

B_SD2_5
B_SD2_1
B_SD2_0
B_SD2_4

RP23

B_SD2_7
B_SD2_3
B_SD2_6
B_SD2_2

RP29 RP15R

B_SD3_0

B_SD3_1
B_SD3_5
B_SD3_7
B_SD3_3
B_SD3_6
B_SD3_2

RP74

B_SD8_1
B_SD8_0
B_SD8_5
B_SD8_4
B_SD8_7
B_SD8_3 R_B_SD8_3
B_SD8_6
B_SD8_2
R_B_DQS2_0
R_B_DQS2_1
R_B_DQS1_0
R_B_DQS1_1
R_B_DQS0_0
R_B_DQS0_1
R_B_DQS3_0
R_B_DQS3_1
R_B_DQS8_0
R_B_DQS8_1

RP76

R15 12
R16 12
R7 12
R8 12
R11 12
R12 12
R19 12
R20 12
R46 12
R47 12

RP15R

D

B_SD4_0

RP46

B_SD4_4

RP15R

B_SD4_1

RP48

B_SD4_2

RP15R

B_SD4_6
B_SD4_7
B_SD4_3

RP54

B_SD6_0

RP15R

B_SD6_4
B_SD6_1
B_SD6_5

RP56

B_SD6_6

RP15R

B_SD6_2
B_SD6_7
B_SD6_3

RP62

B_SD7_4

RP15R

B_SD7_0
B_SD7_5
B_SD7_1

RP64

B_SD7_6

RP15R

B_SD7_2

B_SD7_7

RP70

B_SD5_1
B_SD5_5
B_SD5_4
B_SD5_0
B_SD5_7
B_SD5_6
B_SD5_3
B_SD5_2
R_B_DQS4_0
R_B_DQS4_1
R_B_DQS5_0
R_B_DQS5_1
R_B_DQS7_0
R_B_DQS7_1
R_B_DQS6_0
R_B_DQS6_1

RP72

RP15R

R31 12

RP15R
R32 12
R35 12
R36 12
R39 12
R40 12
R43 12
R44 12

E

R_B_SD4_0

45

R_B_SD4_4

36

R_B_SD4_5B_SD4_5

27

R_B_SD4_1

18

R_B_SD4_2

45

R_B_SD4_6

36

R_B_SD4_7

27

R_B_SD4_3

18

R_B_SD5_0

45

R_B_SD5_4

36

R_B_SD5_1

27

R_B_SD5_5

18

R_B_SD5_6

45

R_B_SD5_2

36

R_B_SD5_7

27

R_B_SD5_3

18

R_B_SD7_4

45

R_B_SD7_0

36

R_B_SD7_5

27

R_B_SD7_1

18

R_B_SD7_6

45

R_B_SD7_2

36

R_B_SD7_3B_SD7_3

27

R_B_SD7_7

18

R_B_SD6_1

18

R_B_SD6_5

27

R_B_SD6_4

36

R_B_SD6_0

45

R_B_SD6_7

18

R_B_SD6_6

27

R_B_SD6_3

36

R_B_SD6_2

45

B_DQS4_0
B_DQS4_1
B_DQS6_0
B_DQS6_1
B_DQS7_0
B_DQS7_1
B_DQS5_0
B_DQS5_1

A_VTT

B_SD0_[0..7]18,19,21
B_SD1_[0..7]18,19,21
B_SD2_[0..7]18,19,21
B_SD3_[0..7]18,19,21
B_SD4_[0..7]18,19,21
B_SD5_[0..7]18,19,21
B_SD6_[0..7]18,19,21
B_SD7_[0..7]18,19,21

2 2

1 1

A

B_SD8_[0..7]18,19,21

B_DQS0_[0..1]18,19,21
B_DQS1_[0..1]18,19,21
B_DQS2_[0..1]18,19,21
B_DQS3_[0..1]18,19,21
B_DQS4_[0..1]18,19,21
B_DQS5_[0..1]18,19,21
B_DQS6_[0..1]18,19,21
B_DQS7_[0..1]18,19,21
B_DQS8_[0..1]18,19,21

A_SD0_[0..7]16,17,21
A_SD1_[0..7]16,17,21
A_SD2_[0..7]16,17,21
A_SD3_[0..7]16,17,21
A_SD4_[0..7]16,17,21
A_SD5_[0..7]16,17,21
A_SD6_[0..7]16,17,21
A_SD7_[0..7]16,17,21
A_SD8_[0..7]16,17,21

A_DQS0_[0..1]16,17,21
A_DQS1_[0..1]16,17,21
A_DQS2_[0..1]16,17,21
A_DQS3_[0..1]16,17,21
A_DQS4_[0..1]16,17,21
A_DQS5_[0..1]16,17,21
A_DQS6_[0..1]16,17,21
A_DQS7_[0..1]16,17,21
A_DQS8_[0..1]16,17,21

MA[0..14]13,16,17,18,19

A_CKE13,16,17
B_CKE13,18,19

WE#13,16,17,18,19
RAS#13,16,17,18,19
CAS#13,16,17,18,19

B

R_B_SD0_[0..7]13
R_B_SD1_[0..7]13
R_B_SD2_[0..7]13
R_B_SD3_[0..7]13
R_B_SD4_[0..7]13
R_B_SD5_[0..7]13
R_B_SD6_[0..7]13
R_B_SD7_[0..7]13
R_B_SD8_[0..7]13

R_B_DQS0_[0..1]13
R_B_DQS1_[0..1]13
R_B_DQS2_[0..1]13
R_B_DQS3_[0..1]13
R_B_DQS4_[0..1]13
R_B_DQS5_[0..1]13
R_B_DQS6_[0..1]13
R_B_DQS7_[0..1]13
R_B_DQS8_[0..1]13

R_A_SD0_[0..7]13
R_A_SD1_[0..7]13
R_A_SD2_[0..7]13
R_A_SD3_[0..7]13
R_A_SD4_[0..7]13
R_A_SD5_[0..7]13
R_A_SD6_[0..7]13
R_A_SD7_[0..7]13
R_A_SD8_[0..7]13

R_A_DQS0_[0..1]13
R_A_DQS1_[0..1]13
R_A_DQS2_[0..1]13
R_A_DQS3_[0..1]13
R_A_DQS4_[0..1]13
R_A_DQS5_[0..1]13
R_A_DQS6_[0..1]13
R_A_DQS7_[0..1]13
R_A_DQS8_[0..1]13

Title

Document Number

C

D

RP200 RP47R

CAS#
WE#
RAS#
MA13

MA6
MA4
MA3
MA2
MA5
MA8
MA7
MA9
A_CKE
B_CKE
MA12
MA11
MA14
MA10
MA0
MA1

1 8
2 7
3 6
4 5

RP226 RP47R

1 8
2 7
3 6
4 5

RP228 RP47R

1 8
2 7
3 6
4 5

RP230 RP47R

1 8
2 7
3 6
4 5

RP232 RP47R

1 8
2 7
3 6
4 5

Micro Star Restricted Secret

MEMORY_TERMINATIONS-1

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Monday, August 20, 2001

Sheet

20 75

E

Rev

0A

of

A

B

C

D

E

A_VTT

A_SD0_3

RP2 RP22R

A_SD0_7

4 4

3 3

2 2

A_SD0_2
A_SD0_6
A_SD0_1
A_SD0_5
A_SD0_4
A_SD0_0
A_SD1_6
A_SD1_7
A_SD1_2
A_SD1_3
A_SD1_5
A_SD1_4
A_SD1_1
A_SD1_0
B_SD2_5
A_SD2_5
B_SD2_1
B_SD2_0
A_SD2_6
B_SD2_2
A_SD2_2
B_SD2_6 A_SD2_3
A_SD3_3 A_SD3_7
B_SD3_3
A_SD3_2
B_SD3_6 A_SD3_6
A_SD3_5
A_SD3_4
B_SD3_0
A_SD3_0
A_SD4_5
A_SD4_1
A_SD4_4
A_SD4_0
A_SD4_3
A_SD4_7
A_SD4_6
A_SD4_2
A_SD5_1
A_SD5_5
A_SD5_0
A_SD5_4
A_SD5_7
A_SD5_3
A_SD5_6
A_SD5_2
A_SD6_3
A_SD6_7
A_SD6_2
A_SD6_6
A_SD6_1
A_SD6_5
A_SD6_4
A_SD6_0
A_SD7_1
A_SD7_0
A_SD7_5
A_SD7_4
A_SD7_3
A_SD7_2
A_SD7_7
A_SD7_6
A_SD8_2
A_SD8_6
B_SD8_6
B_SD8_2
A_SD8_7
A_SD8_3
B_SD8_7
B_SD8_3

1 8
2 7
3 6
4 5

RP4 RP22R

1 8
2 7
3 6
4 5

RP6 RP22R

1 8
2 7
3 6
4 5

RP8 RP22R

1 8
2 7
3 6
4 5

RP10 RP22R

1 8
2 7
3 6
4 5

RP12 RP22R

1 8
2 7
3 6
4 5

RP14 RP22R

1 8
2 7
3 6
4 5

RP16 RP22R

1 8
2 7
3 6
4 5

RP18 RP22R

1 8
2 7
3 6
4 5

RP20 RP22R

1 8
2 7
3 6
4 5

RP22 RP22R

1 8
2 7
3 6
4 5

RP24 RP22R

1 8
2 7
3 6
4 5

RP26 RP22R

1 8
2 7
3 6
4 5

RP28 RP22R

1 8
2 7
3 6
4 5

RP30 RP22R

1 8
2 7
3 6
4 5

RP32 RP22R

1 8
2 7
3 6
4 5

RP34 RP22R

1 8
2 7
3 6
4 5

RP36 RP22R

1 8
2 7
3 6
4 5

B_SD0_2
B_SD0_6
B_SD0_7
B_SD0_3
B_SD0_0
B_SD0_4
B_SD0_5
B_SD0_1
B_SD1_2
B_SD1_7
B_SD1_6
A_SD2_4
B_SD1_0
B_SD1_4
B_SD1_1
B_SD1_5
B_SD2_4
A_SD2_1
A_SD2_0
B_SD1_3
B_SD2_7
B_SD2_3
A_SD2_7

B_SD3_7
B_SD3_2

A_SD3_1
B_SD3_4
B_SD3_1
B_SD3_5
B_SD4_0
B_SD4_4
B_SD4_1
B_SD4_5
B_SD4_2
B_SD4_6
B_SD4_7
B_SD4_3
B_SD5_4
B_SD5_0
B_SD5_5
B_SD5_1
B_SD5_2
B_SD5_3
B_SD5_6
B_SD5_7
B_SD6_0
B_SD6_1
B_SD6_4
B_SD6_5
B_SD6_6
B_SD6_2
B_SD6_7
B_SD6_3
B_SD7_6
B_SD7_7
B_SD7_2
B_SD7_3
B_SD7_4
B_SD7_5
B_SD7_0
B_SD7_1
B_SD8_0
A_SD8_0
B_SD8_1
A_SD8_1
A_SD8_5
B_SD8_5
A_SD8_4
B_SD8_4

RP43 RP22R

1 8
2 7
3 6
4 5

RP45 RP22R

1 8
2 7
3 6
4 5

RP47 RP22R

1 8
2 7
3 6
4 5

RP49 RP22R

1 8
2 7
3 6
4 5

RP51 RP22R

1 8
2 7
3 6
4 5

RP53 RP22R

1 8
2 7
3 6
4 5

RP55 RP22R

1 8
2 7
3 6
4 5

RP57 RP22R

1 8
2 7
3 6
4 5

RP59 RP22R

1 8
2 7
3 6
4 5

RP61 RP22R

1 8
2 7
3 6
4 5

RP63 RP22R

1 8
2 7
3 6
4 5

RP65 RP22R

1 8
2 7
3 6
4 5

RP67 RP22R

1 8
2 7
3 6
4 5

RP69 RP22R

1 8
2 7
3 6
4 5

RP71 RP22R

1 8
2 7
3 6
4 5

RP73 RP22R

1 8
2 7
3 6
4 5

RP75 RP22R

1 8
2 7
3 6
4 5

RP77 RP22R

1 8
2 7
3 6
4 5

A_VTT

C364 0.1uF

C366 0.1uF

C368 0.1uF

C370 0.1uF

C372 0.1uF

C374 0.1uF

C376 0.1uF

C378 0.1uF

C380 0.1uF

C382 0.1uF

C384 0.1uF

C386 0.1uF

C388 0.1uF

C390 0.1uF

C392 0.1uF

C394 0.1uF

C396 0.1uF

C398 0.1uF

C400 0.1uF

C402 0.1uF

A_VTT

C1723 0.1uF

C1724 0.1uF

C1725 0.1uF

C1726 0.1uF

C1727 0.1uF

C1728 0.1uF

C1729 0.1uF

C1730 0.1uF

C1731 0.1uF

C1732 0.1uF

C1733 0.1uF

C1734 0.1uF

C1735 0.1uF

C1736 0.1uF

C1737 0.1uF

C1738 0.1uF

A_SD0_[0..7]16,17,20
A_SD1_[0..7]16,17,20
A_SD2_[0..7]16,17,20
A_SD3_[0..7]16,17,20
A_SD4_[0..7]16,17,20
A_SD5_[0..7]16,17,20
A_SD6_[0..7]16,17,20
A_SD7_[0..7]16,17,20
A_SD8_[0..7]16,17,20

A_DQS0_[0..1]16,17,20
A_DQS1_[0..1]16,17,20
A_DQS2_[0..1]16,17,20
A_DQS3_[0..1]16,17,20
A_DQS4_[0..1]16,17,20
A_DQS5_[0..1]16,17,20
A_DQS6_[0..1]16,17,20
A_DQS7_[0..1]16,17,20
A_DQS8_[0..1]16,17,20

B_SD0_[0..7]18,19,20
B_SD1_[0..7]18,19,20
B_SD2_[0..7]18,19,20
B_SD3_[0..7]18,19,20
B_SD4_[0..7]18,19,20
B_SD5_[0..7]18,19,20
B_SD6_[0..7]18,19,20
B_SD7_[0..7]18,19,20
B_SD8_[0..7]18,19,20

B_DQS0_[0..1]18,19,20
B_DQS1_[0..1]18,19,20
B_DQS2_[0..1]18,19,20
B_DQS3_[0..1]18,19,20
B_DQS4_[0..1]18,19,20
B_DQS5_[0..1]18,19,20
B_DQS6_[0..1]18,19,20
B_DQS7_[0..1]18,19,20
B_DQS8_[0..1]18,19,20

R194 22

A_DQS0_1

R195 22

A_DQS0_0

R196 22

A_DQS1_1

R197 22

A_DQS1_0

R198 22
R199 22

A_DQS2_1

R200 22

A_DQS3_0

R201 22

A_DQS3_1

R202 22

A_DQS4_0

R203 22

A_DQS4_1

R204 22

A_DQS5_0

R205 22

1 1

A

R206 22
R207 22
R208 22
R209 22
R210 22
R211 22

A_DQS5_1

A_DQS6_0

A_DQS6_1

A_DQS7_0

A_DQS7_1

A_DQS8_0

A_DQS8_1

B

R212 22
R213 22
R214 22
R215 22
R216 22
R217 22
R218 22
R219 22
R220 22
R221 22
R222 22
R223 22
R224 22
R225 22
R226 22
R227 22

R228 22

R229 22

B_DQS0_0
B_DQS0_1
B_DQS1_0
B_DQS1_1
A_DQS2_0B_DQS2_0
B_DQS2_1
B_DQS3_1
B_DQS3_0
B_DQS4_1
B_DQS4_0
B_DQS5_0
B_DQS5_1
B_DQS6_0
B_DQS6_1
B_DQS7_0
B_DQS7_1
B_DQS8_0
B_DQS8_1

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

C

D

http://www.msi.com.tw

MEMORY_TERMINATIONS-2

Last Revision Date:

Monday, August 20, 2001

Sheet

E

of

21 75

Rev

0A

A

SYN_XTAL_X1

SYN_XTAL_X2

C2218

FB_11_OHM_100Mhz

L37

1 2

4.7uF/10V/20%

FB_11_OHM_100MHz

L38

1 2

0.1uF

C1049

0.01uF

Y8

14.318MHZ

10P

C1044

C2219

USBCLK48M49
SIOCLK48M58

C1043

+

4.7uF/10V/20%

10P

C1045

REF_CLK_33MHZ23

RSB_CLK_14MHZ50

C1035

0.1uF

+

HWM_14.318M48

R979

475_1%

C1036

0.1uF

C1046

0.0033uF

4 4

3 3

VCC3

C1034

+

4.7uF/10V/20%

VCC3

C1048

4.7uF/10V/20%

C1042

0.01uF

+

B

RSB_CLK_14MHZ R_REFCLK_14

C1037

C1038

0.0033uF

0.00039uF

C1047

0.00039uF

USBCLK48M

VCC3

C1039

0.1uF

C1040

0.1uF

R2099

R967 22

R971 22

R975 22
R976 22

R985 10K

CLK_SYNTH_VDD1

C1041

0.1uF

CLK_SYNTH_VDD2

22

SYN_XTAL_X1
SYN_XTAL_X2

R_REF_CLK_33

SEL

R_USBCLK
R_SIOCLK

MULT_SEL_0
MULT_SEL_1

SPREAD#

C

OPEN: 133MHz
SHORT:
100MHz

R964

1K

U134

22

XTALI

23

XTALO

1

CLK33

48

SEL100/133

19

REFCLK

26

IREF

3

48MHZ/SELA

4

48MHZ_/SELB

30

MULTSEL0

29

MULTSEL1

20

SPREAD#

44

PWRDN#

2

VDD

6

VDD

12

VDD

18

VDD

24

VDD

31

VDD

37

VDD

43

VDD

25

VDDA

46

VDDA

SYSTEM_CLOCK_GENERATOR_CDC950

HCLK0

HCLK0_bar

HCLK1

HCLK1_bar

HCLK2

HCLK2_bar

HCLK3

HCLK3_bar

HCLK4

HCLK4_bar

HCLK5

HCLK5_bar

HCLK6

HCLK6_bar

HCLK7

HCLK7_bar

GNDA
GNDAVSS

VCC3

JP12

1 2

DEFAULT - CLOSE

HCLKITPRP

7

HCLKITPRN

8

HCLKR2P

10

HCLKR2N

11

HCLKR3P

13

HCLKR3N

14

16
17

HCLKCMICRP

42

HCLKCMICRN

41

HCLKR1P

39

HCLKR1N

38

DIMMPLLRP

36

DIMMPLLRN

35

33
32

5

GND

9

GND

15

GND

28

GND

34

GND

40

GND

47

GND

27
4521

R963
10K

SEL

R965 22
R966 22

R968 22
R969 22

R970 22
R972 22

R977 22
R978 22

R982 22
R983 22

R984 22
R986 22

D

PROBE_HDR_CLK_P
PROBE_HDR_CLK_N

R99149.9_1%

R124849.9_1%

R124749.9_1%

R99249.9_1%

R99349.9_1%

R99449.9_1%

R99549.9_1%

R99649.9_1%

R99749.9_1%

R99849.9_1%

R99949.9_1%

R100049.9_1%

E

CLK_100M_ITP0 9
CLK_100M_ITP1 9

HCLK2 5
HCLK2_N 5

HCLK_CMIC 11
HCLK_CMIC_N 11

HCLK1 3
HCLK1_N 3

DIMM_PLL_P 24
DIMM_PLL_N 24

2 2

PROBE_HDR_CLK_P PROBE_HDR_CLK_N

VCC3

R1001

J35

R1003 1K

2
1

HDR_1X2

DEFAULT - OPEN

1 1

10K

SPREAD#

VCC3

RES_NOPOP

R1002

R1004 10K

R_USBCLK

R_SIOCLK

MULT_SEL_0

MULT_SEL_1

R1249 1K

R1250 1K

R1252 1K

R1253

RES_NOPOP

For Test Probe Only

DO NOT STUFF

A

B

C

D

JP26

1 2

Title

Document Number

Micro Star Restricted Secret

CLK_SYNTHESIZER

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Monday, August 20, 2001

Sheet

22 75

E

Rev

0A

of