Page 1
1
MS-9102 0D
Dual Intel Foster Processor
ServerWorks GCLE + CIOB-X2 + CIOB-G + CSB5 Chipset
National Semiconductor PC87417 LPC IO Chip
Cover Sheet 1
Block Diagram
Clock & Reset Map
2
3
4,5,6,7 Foster CPU #1 & #2
CPU GTLREF & SMBus Address 8
ITP Connector
A A
Ratio & Level Shift Circuit
CPU Level Shift & SMI Circuit
CMIC-LE
9
10
11
12,13,14,15,16
DDR Module 1/2/3/4/5/6 17,18,19
Memory Termination #1 & #2
Clock Synthesizer
PCI 33 Clock Buffer
DDR Clock Buffer
CIOB-X2
20,21
22
23
24,25,26
27,28 CIOB-G
HW/AUDIO
PCI 64 Slot 1/3 (66MHz/64Bit)
29
31
30
32 PCI 64 Slot 2 (66MHz/64Bit)
SCSI AIC7899W/7902
AGP Pro Slot
PCI-X Slot 1/2
33-37
38
39
CSB5
INT MAPING
LAN BCM5702
USB Connector
ATA-HDD Connector
NS PC87417 SIO & NVRAM & IO CONN
XAD Bus/Flash ROM
IO COM /PS2
Hardware Monitor & CPU FAN
Hardware Monitor 2 & SYS FAN
POWER RESUME STATUS
I2C Switching & BOSS
VCC25 & AVTT
VRM 9.x for CPU1 & CPU2
VDD_AGP & VAGP_CARD & V_IMB
Front Panel
Power OK Circuit
Reset Ckt & 3VSB/USB Power
Note
40,41
42
43,44
45
46
47-48
49
50
51
52
53
54
55
56
57
58
59
60
61 Manual Part
62-68
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
1
http://www.msi.com.tw
Micro Star Restricted Secret
Cover Sheet
Last Revision Date:
Thursday, March 21, 2002
Sheet
1 68
Rev
0D
of
Page 2
MS-9102 Block Diagram
Full ATX - 12"*13"*8 Layers (10 MTHole)
BLOCK DIAGRAM
Scoket 604 CPU1
CTRL
ADDR
DATA
ADDR
CTRL
1
Scoket 604 CPU2 VRM
CTRL
ADDR
GTL BUS
DATA
FSB Suport 100/133MHz Foster/Gullatin CPU Support VRM9.0
DATA
6 DDR
DIMM
Modules
Support Register ECC DDR
DIMM Only (Up to 12GB)
66MHz/64Bit or 33MHz/32Bit Support
P64 PCI CONN
2
P64 PCI CONN
1
P64 PCI CONN
3
PCI 66MHz/64Bit Bus
ServerWorks
CIOB-X2
A-IMB Bus
SM BUS
ServerWorks
CMIC-LE
Dual Channel
AIC 7899W/7902
Ultra160/320 SCSI
Ultra 160/320
EMRL
Ultra 160/320
PCI-X Bus
PCI-X CONN
1
PCI-X Bus (Up to 133MHz)
PCI-X CONN
2
Thin IMB
Bus
B-IMB Bus
ServerWorks
CIOB-G
CTRL
ADDR
DATA
AGP Pro Slot
A A
IDE Primary
IDE Secondary
USB Port 1/2/3
USB Port 4
W83782D HWM
W8378785R HWM
Ultra DMA100
USB 1.1
SM BUS
SM BUS
ServerWorks
CSB5 2.0
LPC
LPC
LPC
XAD Bus
FLASH ROM
PCI32 Bus
CREATIVE 5880
H/W AUDIO
BCM 5702
GIGA LAN
Floopy
NS
PC87417
Keyboard
Mouse
Serial 1
Serial 2
1
Parallel
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Micro Star Restricted Secret
Block Diagram
Last Revision Date:
Thursday, March 21, 2002
Sheet
2 68
Rev
0D
of
Page 3
1
RESET SCHEME
WTX
POWER
PS_PWRGD
SUPPLY
CONN.
RESET SWITCH
ITP_RESET#
AND
INVERTER
RESET GEN
140mS PERIOD
RESET Vth =
4.5V
PS_PWRGD#
CPU_VRM_PWRGD
POWERGOOD
PS_PWRGD#
PLLRST
PCIRST#
CMIC CIOB'S
SRESET#
AND
RSB5
PLLRST
PCIRST#
PLLRST
PCIRST#
PCIRST#
P1/P2_PCIRST#
S1/S2_PCIRST#
RESET FOR RSB
PCI BUS
RESETS FOR PCI
BUSES
PROC_RESET# CPU RESET
RESETDLY# Config RESET - 4
BCLK delay w.r.t.
PROC_RESET#
CPU_PWRGD
POWER
t0
PSU PWR GOOD
PLL RST
t0+100mS
POWERGOOD
VRM POWERGOOD
PROCESSOR POWERGOOD
PROCESSOR RESET
PCI RESET
CONFIG RESET
t0+100mS
t0+50mS
t0+120mS
t0+120mS
t0+120mS+1mS
t0+120mS+1mS
t0+120mS+1mS+4 clocks
CLOCKING SCHEME
- CPU 0
- CPU1
- CMIC
- DIMM PLL
A A
14.318 MHz
X-TAL
CLK SYNTH.
BCLK
BCLK#
33MHz
48MHz
48MHz
14MHz
- ITP Connector
- PROBE Header
6 Pairs of 100MHz
Differential
CLOCKs
From CLK
SYNTH.
33MHz Low Skew
Buffer
DIMM PLL
BCLK
BCLK#
FBOUT#
FBOUT
8 Pairs of 100MHz
Differential CLOCKs
for 8 DIMMs
33MHz
CIOB
P1_CLKO
S1_CLKO
P1_FBCLK
TO PCI
CONNs.
PCI-X PLLs
n
33MHz CLOCK TO RSB and
DEVICES behind it.
S1_FBCLK
TO PCI
CONNs.
48MHz USB CLK to RSB
48MHz CLK to SIO
14 MHz CLK to RSB
33MHz
CIOB-G
FBCLK
66MHz
AGP CONN.
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
1
http://www.msi.com.tw
Micro Star Restricted Secret
Clock & Reset Map
Last Revision Date:
Thursday, March 21, 2002
Sheet
3 68
Rev
0D
of
Page 4
A
B
C
D
E
P1_SM_ADDR[0..2] 8 CPU_SDA 6,51,54
VCC_P
VCC3
VCC3
P1_SM_TS_ADDR[0..1] 8
R752
1K
R745
X_R
R535
X_R
C395
1000P-0805
P1_VCCIOPLL 11
FSB_VCC_SENSE 6
FSB_GND_SENSE 6
Enable
P1_ODTEN
Disable
OnDie
Termination
P1_SM_WP
4 4
3 3
2 2
1 1
P1_SM_ADDR[0..2]
P1_SM_TS_ADDR[0..1]
PD#[0..63]
PD#[0..63] 6,12
P1_VCCA 11
P1_VSSA 11
P1_ODTEN
TP6
1
CPU1A
PD#0
Y26
PGA-S603
AA27
AA25
AD27
AA24
AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26
AC26
AD25
AE25
AC24
AD24
AE23
AC23
AA18
AC20
AC21
AE22
AE20
AD21
AD19
AB17
AB16
AA16
AC17
AE13
AD18
AB15
AD13
AD14
AD11
AC12
AE10
AC11
AD10
AA13
AA14
AC14
AB12
AB13
AA11
AA10
AB10
D0#
D1#
Y24
D2#
D3#
D4#
Y23
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
AE9
D44#
D45#
AD8
D46#
AC9
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
AC8
D56#
AD7
D57#
AE7
D58#
AC6
D59#
AC5
D60#
AA8
D61#
Y9
D62#
AB6
D63#
E10
AP0#
D9
AP1#
Y4
BCLK0
W5
BCLK1
PD#1
PD#2
PD#3
PD#4
PD#5
PD#6
PD#7
PD#8
PD#9
PD#10
PD#11
PD#12
PD#13
PD#14
PD#15
PD#16
PD#17
PD#18
PD#19
PD#20
PD#21
PD#22
PD#23
PD#24
PD#25
PD#26
PD#27
PD#28
PD#29
PD#30
PD#31
PD#32
PD#33
PD#34
PD#35
PD#36
PD#37
PD#38
PD#39
PD#40
PD#41
PD#42
PD#43
PD#44
PD#45
PD#46
PD#47
PD#48
PD#49
PD#50
PD#51
PD#52
PD#53
PD#54
PD#55
PD#56
PD#57
PD#58
PD#59
PD#60
PD#61
PD#62
PD#63
AP#0
AP#0 6,12
AP#1
AP#1 6,12
HCLK1
HCLK1 22
HCLK1_N
HCLK1_N 22
PA#[3..35]
PA#[3..35] 6,12
BREQ#0 6,12
BREQ#1 6
BREQ#2 6
BREQ#3 6
BNR# 6,11,12
BPRI# 6,12
A3B5D26
ODTEN
SKTOCC#
AA5
B27
VSSA
VSSSENSE
A3#
A4#
A22
A20
B18
PA#3
PA#4
PA#5
AD4
AB4
VCCA
VCCIOPLL
VCCSENSE
A5#
A6#
A7#
C18
A19
PA#6
PA#7
VCC3
P1_SM_WP
AD29
SMB_WP
A8#
A9#
C17
D17
PA#8
PA#9
P1_SM_TS_ADDR0
P1_SM_TS_ADDR1
AE29
AE28
Y29
AA28
SM_VCC
SM_VCC1
SM_TS_A1
SM_TS_A0
A10#
A11#
A12#
A13#
A13
B16
B14
B13
PA#10
PA#11
PA#12
PA#13
P1_SM_ADDR0
P1_SM_ADDR1
P1_SM_ADDR2
AB28
AB29
AA29
AC29
AC28
AD28
SM_CLK
SM_DAT
SM_EP_A2
SM_EP_A1
SM_EP_A0
SM_ALERT
FOSTER
A14#
A15#
A16#
A17#
A18#
A19#
A12
C15
C14
D16
D15
F15
A10
PA#14
PA#15
PA#16
PA#17
PA#18
PA#19
PA#20
R748 43
E16
A20#
B10
R537 43
P1_COMP0
P1_COMP1
AD16
COMP1
COMP0
A21#
A22#
A23#
B11
C12
PA#21
PA#22
PA#23
VCC_P
W6W7W8Y6AA7
TESTHI0
TESTHI1
A24#
A25#
A26#
E14
D13A9B8
PA#24
PA#25
PA#26
R539 180
TESTHI2
A27#
E13
PA#27
CPU_SCL 6,51,54
CPU1_SMBALERT# 51
R538 180
DP#3
AE17
AD5
AE5
TESTHI3
TESTHI4
TESTHI5
TESTHI6
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
D12
C11B7A6A7C9C8D20
PA#28
PA#29
PA#30
PA#31
PA#32
PA#33
PA#34
PA#35
DP#2
AC15
DP3#
BREQ#0
DP#1
AE19
DP2#
BR0#
F12
BREQ#1
DP#0
AC18
DP1#
BR1#
E11
BREQ#2
DP0#
BR2#
E25
TDO
BR3#
BNR#
D10
F20
BREQ#3
E19
C24
E24
TDI
TCK
TRDY#
BPRI#
BINIT#
DBSY#
D23
F11
F18
BINIT#
DBSY#
R747 39.2
R749 39.2
R750 39.2
R751 39.2
PLACE AT PROC 1
HREQ#[0..4]
DSTBP#[0..3]
DSTBN#[0..3]
BPM#[2..5]
VRM_VID[0..4]
DINV#[0..3]
DP#[0..3]
F24
A25
TMS
TRST#
DBI3#
DBI2#
DBI1#
DBI0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
STPCLK#
THERMTRIP#
PWRGD
PR0CH0T#
LINIT1
LINIT0
FERR#
IGNNE#
A20M#
RESET#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
LOCK#
MCERR#
RSP#
RS2#
RS1#
RS0#
IERR#
DEFER#
HITM#
ADS#
ADSTB0#
ADSTB1#
DRDY#
E18
DRDY#
HREQ#[0..4] 6,12
DSTBP#[0..3] 6,12
DSTBN#[0..3] 6,12
BPM#[2..5] 6,9,11
VRM_VID[0..4] 6,51,56
DINV#[0..3] 6,12
DP#[0..3] 6,12
P1_TDO 6,9
P1_TDI 9
P1_TCK 9
P_TRDY# 6,12
ITP_TRST# 6,9
TMS 6,9
DINV#3
AB9
DINV#2
AE12
DINV#1
AD22
DINV#0
AC27
VRM_VID0
F3
VID0
E3
VID1
VRM_VID2
D3
VID2
VRM_VID3
C3
VID3
VRM_VID4
B3
VID4
F9
F23
W9
W23
DSTBP#3
Y11
DSTBP#2
Y14
DSTBP#1
Y17
DSTBP#0
Y20
DSTBN#3
Y12
DSTBN#2
Y15
DSTBN#1
Y18
DSTBN#0
Y21
BPM#2
F6
BPM#3
F8
BPM#2
E7
BPM#3
F5
BPM#4
E8
BPM#5
E4
AE6
SLP#
D4
C27
SMI#
F26
AB7
B25
D6
INIT#
G23
B24
E27
C26
F27
Y8
HREQ#0
B19
HREQ#1
B21
HREQ#2
C21
HREQ#3
C20
HREQ#4
B22
A17
D7
C6
F21
D22
E21
P1_IERR#
E5
DEFER#
C23
HITM#
A23
HIT#
E22
HIT#
ADS#
D19
ADSTB#0
F17
ADSTB#1
F14
VCC_P
Check Which CPU is
close to ITP
P1_GTLREF1 8
P1_GTLREF0 8
SLP# 6,11
CPU_STPCLK# 6,11
SMI# 6,11
P1_THERMTRIP# 10,41
CPU1_PWRGD 59
P1_PROCHOT# 10
INIT# 6,11
LINT1 6,10,11
LINT0 6,10,11
FERR# 6,10,11
IGNNE# 6,10,11
A20M# 6,10,11
PROC_RESET# 6,9,11,13
LOCK# 6,11,12
MCERR# 6,11
RSP# 6,12
RS#2 6,12
RS#1 6,12
RS#0 6,12
P1_IERR# 10
DEFER# 6,12
HITM# 6,11,12
HIT# 6,11,12
ADS# 6,12
ADSTB#0 6,12
ADSTB#1 6,12
DRDY# 6,12
DBSY# 6,12
BINIT# 6,11,12
PLACE NEAR CENTER OF VCC_FSB PLANES
FSB_VCC_SENSE 6
FSB_GND_SENSE 6
ALL SENSE LINES MEET AT CENTRES OF PLANES
Route FSB_VCC/GND_SENSE,
VRM_ISHARE signals in 25/50
Mils trace width
VRM_VID0
VRM_VID1
VRM_VID2
VRM_VID3
VRM_VID4
FSB_VCC_SENSE VRM_VID1
FSB_GND_SENSE
RN105 1K
R746 1K
Philips/Vishay Iz=5mA
R732 0
TP8
1
TP7
1
R731 0
VCC3
1 2
3 4
5 6
7 8
VCC_P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
Foster CPU #1
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
4 68
of
Rev
0D
Page 5
A
B
C
D
E
4 4
3 3
2 2
VCC_P
A14
A18
A24
A28
B12
B20
B26
B29
C10
C16
C22
C28
D14
D18
D24
D29
E12
E20
E26
E28
F10
F16
F22
F29
G24
G26
G28
H23
H25
H27
H29
J24
J26
J28
K23
K25
K27
K29
L24
L26
L28
M23
M25
M27
M29
N23
N25
N27
N29
P24
P26
P28
R23
R25
R27
W27
W25
PGA-S603
A2
A8
B6
C2
C4
D8
E2
E6
F4
G2
G4
G6
G8
H3
H5
H7
H9
J2
J4
J6
J8
K3
K5
K7
K9
L2
L4
L6
L8
M3
M5
M7
M9
N3
N5
N7
N9
P2
P4
P6
P8
R3
R5
R7
R9
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GN33
GN34
GN35
GN36
GN37
GN38
GN39
EMI_GND1
EMI_GND2
EMI_GND3
EMI_GND4
EMI_GND5
EMI_GND6
EMI_GND7
FOSTER_PWR
EMI_GND10
EMI_GND11
EMI_GND12
EMI_GND13
EMI_GND14
EMI_GND15
GN42
GN43
GN44
GN45
GN46
GN47
GN40
GN41
EMI_GND8
EMI_GND9
EMI_GND16
GN48
CPU1C
GN21
GN22
GN23
GN24
GN25
MTG_GND21
MTG_GND22
MTG_GND1
MTG_GND2
MTG_GND3
GN1
GN2
GN3
MTG_GND23
MTG_GND24
MTG_GND25
MTG_GND4
MTG_GND5
MTG_GND6
GN4
GN5
GN6
GN26
MTH_GND26
MTG_GND7
GN7
A5
VSS
A11
VSS
A21
VSS
A27
VSS
A29
VSS
B2
VSS
B9
VSS
B15
VSS
B17
VSS
B23
VSS
B28
VSS
C7
VSS
C13
VSS
C19
VSS
C25
VSS
C29
VSS
D2
VSS
D5
VSS
D11
VSS
D21
VSS
D27
VSS
D28
VSS
E9
VSS
E15
VSS
E17
VSS
E23
VSS
E29
VSS
F2
VSS
F7
VSS
F13
VSS
F19
VSS
F25
VSS
F28
VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS
G25
VSS
G27
VSS
G29
VSS
H2
VSS
H4
VSS
H6
VSS
H8
VSS
H24
VSS
H26
VSS
H28
VSS
J3
VSS
J5
VSS
W29
VCC
Y2
VCC
Y10
VCC
Y16
VCC
Y22
VCC
AA4
VCC
AA6
VCC
AA12
VCC
AA20
VCC
AA26
VCC
AB2
VCC
AB8
VCC
AB14
VCC
AB18
VCC
AB24
VCC
AC3
VCC
AC4
VCC
AC10
VCC
AC16
VCC
AC22
VCC
AD2
VCC
AD6
VCC
AD12
VCC
AD20
VCC
AD26
VCC
AE3
VCC
AE8
VCC
AE14
VCC
AE18
VCC
AE24
VCC
R29
VCC
T2
VCC
T4
VCC
T6
VCC
T8
VCC
T24
VCC
T26
VCC
T28
VCC
U3
VCC
U5
VCC
U7
VCC
U9
VCC
U23
VCC
U25
VCC
U27
VCC
U29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC_P
V2
V4
V6
V8
V24
V26
V28
J7
VSS
J9
VSS
J23
VSS
J25
VSS
J27
VSS
J29
VSS
K2
VSS
K4
VSS
K6
VSS
K8
VSS
K24
VSS
K26
VSS
K28
VSS
L3
VSS
L5
VSS
L7
VSS
L9
VSS
L23
VSS
L25
VSS
L27
VSS
L29
VSS
M2
VSS
M4
VSS
M6
VSS
M8
VSS
M24
VSS
M26
VSS
M28
VSS
N2
VSS
N4
VSS
N6
VSS
N8
VSS
N24
VSS
N26
VSS
N28
VSS
P3
VSS
P5
VSS
P7
VSS
P9
VSS
P23
VSS
P25
VSS
P27
VSS
P29
VSS
R2
VSS
R4
VSS
R6
VSS
R8
VSS
R24
VSS
R26
VSS
R28
VSS
T3
VSS
T5
VSS
T7
VSS
T9
VSS
T23
VSS
T25
VSS
T27
VSS
T29
VSS
U2
VSS
U4
VSS
U6
VSS
U8
VSS
U24
VSS
U26
VSS
U28
VSS
V3
VSS
V5
VSS
V7
VSS
V9
VSS
V23
VSS
V25
VSS
V27
VSS
V29
VSS
W2
VSS
W4
VSS
W24
VSS
W26
VSS
W28
VSS
Y5
VSS
Y7
VSS
Y13
VSS
Y19
VSS
Y25
VSS
AA2
VSS
AA9
VSS
AA15
VSS
AA17
VSS
AA23
VSS
AB5
VSS
AB11
VSS
AB21
VSS
AB27
VSS
AC2
VSS
AC7
VSS
AC13
VSS
AC19
VSS
AC25 AD3
VSS VSS
PGA-S603
GN27
GN28
GN29
MTG_GND27
MTG_GND28
MTG_GND29
MTG_GND8
MTG_GND9
MTG_GND10
GN8
GN9
GN10
GN30
GN31
GN32
MTG_GND30
MTG_GND31
MTG_GND32
FOSTER_PWR
MTG_GND11
MTG_GND12
MTG_GND13
MTG_GND14
GN11
GN12
GN13
GN14
A1
A4
GAL_VDD1
GAL_VDD2
GAL_VDD3
RSVD1
RSVD2
GAL_VDD4
GAL_VDD5
GAL_VDD6
GAL_VDD7
GAL_VDD8
GAL_VDD9
GAL_VDD10
GAL_VDD11
GAL_VDD12
GAL_VDD13
GAL_VDD14
GAL_VDD15
GAL_VDD16
GAL_VDD17
GAL_VDD18
GAL_VDD19
GAL_VDD20
GAL_VDD21
GAL_VDD22
GAL_VDD23
GAL_VDD24
GAL_VDD25
GAL_VDD26
GAL_VDD27
GAL_VDD28
GAL_VDD29
GAL_VDD30
GAL_VDD31
GAL_VDD32
GAL_VDD33
GAL_VDD34
GAL_VDD35
GAL_VSS1
GAL_VSS2
GAL_VSS3
GAL_VSS4
GAL_VSS5
GAL_VSS6
GAL_VSS7
GAL_VSS8
GAL_VSS9
GAL_VSS10
GAL_VSS11
GAL_VSS12
GAL_VSS13
GAL_VSS14
GAL_VSS15
GAL_VSS16
GAL_VSS17
GAL_VSS18
GAL_VSS19
GAL_VSS20
GAL_VSS21
GAL_VSS22
GAL_VSS23
GAL_VSS24
GAL_VSS25
GAL_VSS26
GAL_VSS27
GAL_VSS28
GAL_VSS29
GAL_VSS30
GAL_VSS31
GAL_VSS32
GAL_VSS33
GAL_VSS34
MTG_GND15
MTG_GND16
MTG_GND17
GN15
GN16
GN17
GN18
RSVD13
RSVD17
RSVD63
RSVD67
RSVD68
RSVD69
RSVD73
RSVD77
RSVD80
RSVD83
RSVD86
RSVD87
RSVD88
MTG_GND18
GN19
RSVD3
RSVD4
RSVD5
RSVD8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MTG_GND19
MTG_GND20
GN20
A30
B4
B31
C30
D1
D31
E30
F1
F31
G30
H1
H31
J30
K1
K31
L30
M1
M31
N1
N31
P30
R1
R31
T30
U1
U31
V30
W1
W31
Y30
AA1
AA31
AB30
AC31
AD30
A31
B30
C1
C31
D30
E1
E31
F30
G1
G31
H30
J1
J31
K30
L1
L31
M30
N30
P1
P31
R30
T1
T31
U30
V1
V31
W30
Y1
Y31
AA30
AB1
AB31
AC30
AD31
A15
A16
A26
B1
C5
D25
W3
Y3
Y27
Y28
AA3
AB3
AC1
AD1
AE4
AE15
AE16
AE27
AE21
AE11
AE2
AD23
AD17
AD15
AD9
VCC_P
BSEL0
BSEL1
R620
X_R
DON'T STUFF
BSEL0 22
R972
X_R
CPU1 CORE DECOUPLING
22U
C396
22U
22U
C439
C453
22U
22U
C584
C550
22U
22U
C527
C517
PLACE AROUND P1 SOCKET
C457
1U
C462
C459
1U
1U
22U
22U
C469
C397
22U
22U
C477
C460
22U
22U
C583
C582
22U
22U
C479
C487
C483
C492
1U
1U
C458
0.1U
CPU1_THERMDA1 51
CPU1_THERMDC1 51
VCC_P
22U
C398
22U
22U
C400
C399
VCC_P
22U
22U
C488
22U
C518
C526
VCC_P
22U
C470
22U
22U
C580
C581
VCC_P
22U
22U
C456
22U
C452
C438
VCC_P
C494
C463
1U
C484
1U
1U
VCC_P
C493
C468
0.1U
C471
0.1U
0.1U
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
Foster CPU #1 PWR
Last Revision Date:
Thursday, March 21, 2002
Sheet
E
5 68
of
Rev
0D
Page 6
A
B
C
D
E
4 4
3 3
2 2
1 1
VCC_P
VCC3
VCC3
P2_SM_ADDR[0..2] 8
P2_SM_TS_ADDR[0..1] 8
FSB_VCC_SENSE 4
FSB_GND_SENSE 4
R532
X_R
DON'T STUFF
P2_ODTEN
R530
1K
OnDie
Termination
R742
X_R
DON'T STUFF
P2_SM_WP
1000P-0805
C576
P2_VCCIOPLL 11
Enable
Disable
P2_SM_ADDR[0..2]
P2_SM_TS_ADDR[0..1]
PD#[0..63]
PD#[0..63] 4,12
P2_VCCA 11
P2_VSSA 11
P2_ODTEN
TP18
1
CPU2A
PD#0
Y26
PD#1
PD#2
PD#3
PD#4
PD#5
PD#6
PD#7
PD#8
PD#9
PD#10
PD#11
PD#12
PD#13
PD#14
PD#15
PD#16
PD#17
PD#18
PD#19
PD#20
PD#21
PD#22
PD#23
PD#24
PD#25
PD#26
PD#27
PD#28
PD#29
PD#30
PD#31
PD#32
PD#33
PD#34
PD#35
PD#36
PD#37
PD#38
PD#39
PD#40
PD#41
PD#42
PD#43
PD#44
PD#45
PD#46
PD#47
PD#48
PD#49
PD#50
PD#51
PD#52
PD#53
PD#54
PD#55
PD#56
PD#57
PD#58
PD#59
PD#60
PD#61
PD#62
PD#63
AP#0
AP#0 4,12
AP#1
AP#1 4,12
HCLK2
HCLK2 22
HCLK2_N
HCLK2_N 22
D0#
AA27
D1#
Y24
D2#
AA25
D3#
AD27
D4#
Y23
D5#
AA24
D6#
AB26
D7#
AB25
D8#
AB23
D9#
AA22
D10#
AA21
D11#
AB20
D12#
AB22
D13#
AB19
D14#
AA19
D15#
AE26
D16#
AC26
D17#
AD25
D18#
AE25
D19#
AC24
D20#
AD24
D21#
AE23
D22#
AC23
D23#
AA18
D24#
AC20
D25#
AC21
D26#
AE22
D27#
AE20
D28#
AD21
D29#
AD19
D30#
AB17
D31#
AB16
D32#
AA16
D33#
AC17
D34#
AE13
D35#
AD18
D36#
AB15
D37#
AD13
D38#
AD14
D39#
AD11
D40#
AC12
D41#
AE10
D42#
AC11
D43#
AE9
D44#
AD10
D45#
AD8
D46#
AC9
D47#
AA13
D48#
AA14
D49#
AC14
D50#
AB12
D51#
AB13
D52#
AA11
D53#
AA10
D54#
AB10
D55#
AC8
D56#
AD7
D57#
AE7
D58#
AC6
D59#
AC5
D60#
AA8
D61#
Y9
D62#
AB6
D63#
E10
AP0#
D9
AP1#
Y4
BCLK0
W5
BCLK1
PGA-S603
PA#[3..35]
PA#[3..35] 4,12
BREQ#1 4
BREQ#0 4,12
BREQ#2 4
BREQ#3 4
BNR# 4,11,12
BPRI# 4,12
A3B5D26
ODTEN
SKTOCC#
AA5
B27
VSSA
VSSSENSE
A3#
A4#
A22
A20
B18
PA#3
PA#4
PA#5
AD4
AB4
VCCA
VCCIOPLL
VCCSENSE
A5#
A6#
A7#
C18
A19
C17
PA#6
PA#7
VCC3
P2_SM_WP
AD29
SMB_WP
A8#
A9#
D17
PA#8
PA#9
P2_SM_ADDR2
P2_SM_TS_ADDR1
P2_SM_TS_ADDR0
AE29
AE28
Y29
AA28
AB28
SM_VCC
SM_VCC1
SM_TS_A1
SM_TS_A0
A10#
A11#
A12#
A13#
A13
B16
B14
B13
A12
PA#10
PA#11
PA#12
PA#13
PA#14
P2_SM_ADDR1
AB29
SM_EP_A2
A14#
C15
PA#15
CPU_SDA 4,51,54
CPU_SCL 4,51,54
CPU2_SMBALERT# 51
R533 43
R740 43
P2_SM_ADDR0
P2_COMP0
P2_COMP1
AA29
AC29
AC28
AD28
E16
AD16
COMP1
COMP0
SM_CLK
SM_DAT
SM_EP_A1
SM_EP_A0
SM_ALERT
FOSTER
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
C14
D16
D15
F15
A10
B10
B11
C12
PA#16
PA#17
PA#18
PA#19
PA#20
PA#21
PA#22
PA#23
W6W7W8Y6AA7
A23#
A24#
E14
D13A9B8
PA#24
PA#25
VCC_P
TESTHI0
TESTHI1
A25#
A26#
PA#26
R738 180
TESTHI2
A27#
PA#27
R739 180
AD5
AE5
TESTHI3
TESTHI4
TESTHI5
TESTHI6
A28#
A29#
A30#
A31#
A32#
E13
D12
C11B7A6A7C9C8D20
PA#28
PA#29
PA#30
PA#31
PA#32
A33#
PA#33
A34#
PA#34
A35#
PA#35
DP#3
AE17
DP#2
AC15
DP3#
BREQ#1
DP#1
AE19
DP2#
BR0#
F12
BREQ#0
DP1#
BR1#
DP#0
AC18
DP0#
BR2#
E11
D10
BREQ#2
BREQ#3
BR3#
E25
TDO
BNR#
F20
BNR#
C24
D23
BPRI#
TDI
BPRI#
E24
TCK
HREQ#[0..4]
DSTBP#[0..3]
DSTBN#[0..3]
BPM#[2..5]
VRM_VID[0..4]
DINV#[0..3]
DP#[0..3]
E19
F24
TRST#
TRDY#
THERMTRIP#
BINIT#
DBSY#
DRDY#
F11
F18
E18
DRDY#
BINIT#
DBSY#
HREQ#[0..4] 4,12
DSTBP#[0..3] 4,12
DSTBN#[0..3] 4,12
BPM#[2..5] 4,9,11
VRM_VID[0..4] 4,51,56
DINV#[0..3] 4,12
DP#[0..3] 4,12
P2_TDO 9
P1_TDO 4,9
P2_TCK 9
P_TRDY# 4,12
ITP_TRST# 4,9
TMS 4,9
A25
TMS
AB9
DBI3#
AE12
DBI2#
AD22
DBI1#
AC27
DBI0#
F3
VID0
E3
VID1
D3
VID2
C3
VID3
B3
VID4
F9
GTLREF3
F23
GTLREF2
W9
GTLREF1
W23
GTLREF0
Y11
DSTBP3#
Y14
DSTBP2#
Y17
DSTBP1#
Y20
DSTBP0#
Y12
DSTBN3#
Y15
DSTBN2#
Y18
DSTBN1#
Y21
DSTBN0#
F6
BPM0#
F8
BPM1#
E7
BPM2#
F5
BPM3#
E8
BPM4#
E4
BPM5#
AE6
SLP#
D4
STPCLK#
C27
SMI#
F26
AB7
PWRGD
B25
PR0CH0T#
D6
INIT#
G23
LINIT1
B24
LINIT0
E27
FERR#
C26
IGNNE#
F27
A20M#
Y8
RESET#
B19
REQ0#
B21
REQ1#
C21
REQ2#
C20
REQ3#
B22
REQ4#
A17
LOCK#
D7
MCERR#
C6
RSP#
F21
RS2#
D22
RS1#
E21
RS0#
E5
IERR#
C23
DEFER#
A23
HITM#
E22
HIT#
D19
ADS#
F17
ADSTB0#
F14
ADSTB1#
Place these close to CPU2
R531 40.2
R649 40.2
Check Which CPU is
close to ITP
DINV#3
DINV#2
DINV#1
DINV#0
VRM_VID0
VRM_VID1
VRM_VID2
VRM_VID3
VRM_VID4
DSTBP#3
DSTBP#2
DSTBP#1
DSTBP#0
DSTBN#3
DSTBN#2
DSTBN#1
DSTBN#0
BPM#2
BPM#3
BPM#2
BPM#3
BPM#4
BPM#5
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
P2_IERR#
DEFER#
HITM#
HIT#
ADS#
ADSTB#0
ADSTB#1
P2_GTLREF1 8
P2_GTLREF0 8
SLP# 4,11
CPU_STPCLK# 4,11
SMI# 4,11
P2_THERMTRIP# 10,41
CPU2_PWRGD 59
P2_PROCHOT# 10
INIT# 4,11
LINT1 4,10,11
LINT0 4,10,11
FERR# 4,10,11
IGNNE# 4,10,11
A20M# 4,10,11
PROC_RESET# 4,9,11,13
LOCK# 4,11,12
MCERR# 4,11
RSP# 4,12
RS#2 4,12
RS#1 4,12
RS#0 4,12
P2_IERR# 10
DEFER# 4,12
HITM# 4,11,12
HIT# 4,11,12
ADS# 4,12
ADSTB#0 4,12
ADSTB#1 4,12
VCC_P
DRDY# 4,12
DBSY# 4,12
BINIT# 4,11,12
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
Foster CPU #2
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
6 68
of
Rev
0D
Page 7
A
VCC_P
CPU2B
GN33
GN34
GN35
GN36
GN37
GN38
GN39
GN40
EMI_GND1
EMI_GND2
EMI_GND3
EMI_GND4
EMI_GND5
EMI_GND6
EMI_GND7
FOSTER_PWR
EMI_GND10
EMI_GND11
EMI_GND12
EMI_GND13
EMI_GND14
EMI_GND15
GN42
GN43
GN44
GN45
GN46
GN47
GN41
EMI_GND8
EMI_GND9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
EMI_GND16
GN48
A5
VSS
A11
VSS
A21
VSS
A27
VSS
A29
VSS
B2
VSS
B9
VSS
B15
VSS
B17
VSS
B23
VSS
B28
VSS
C7
VSS
C13
VSS
C19
VSS
C25
VSS
C29
VSS
D2
VSS
D5
VSS
D11
VSS
D21
VSS
D27
VSS
D28
VSS
E9
VSS
E15
VSS
E17
VSS
E23
VSS
E29
VSS
F2
VSS
F7
VSS
F13
VSS
F19
VSS
F25
VSS
F28
VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS
G25
VSS
G27
VSS
G29
VSS
H2
VSS
H4
VSS
H6
VSS
H8
VSS
H24
VSS
H26
VSS
H28
VSS
J3
VSS
J5
VSS
W29
Y2
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28
A2
VCC
A8
VCC
PGA-S603
A14
VCC
A18
VCC
A24
VCC
A28
VCC
B6
VCC
B12
VCC
B20
VCC
B26
VCC
B29
VCC
C2
VCC
C4
VCC
C10
VCC
C16
VCC
C22
VCC
C28
VCC
D8
VCC
D14
VCC
D18
VCC
D24
VCC
D29
VCC
E2
VCC
E6
VCC
E12
VCC
E20
VCC
E26
VCC
E28
VCC
F4
VCC
F10
VCC
F16
VCC
F22
VCC
F29
VCC
G2
VCC
G4
VCC
G6
VCC
G8
VCC
G24
VCC
G26
VCC
G28
VCC
H3
VCC
H5
VCC
H7
VCC
H9
VCC
H23
VCC
H25
VCC
H27
VCC
H29
VCC
J2
VCC
J4
VCC
J6
VCC
J8
VCC
J24
VCC
J26
VCC
J28
VCC
K3
VCC
K5
VCC
K7
VCC
K9
VCC
K23
VCC
K25
VCC
K27
VCC
K29
VCC
L2
VCC
L4
VCC
L6
VCC
L8
VCC
L24
VCC
L26
VCC
L28
VCC
M3
VCC
M5
VCC
M7
VCC
M9
VCC
M23
VCC
M25
VCC
M27
VCC
M29
VCC
N3
VCC
N5
VCC
N7
VCC
N9
VCC
N23
VCC
N25
VCC
N27
VCC
N29
VCC
P2
VCC
P4
VCC
P6
VCC
P8
VCC
P24
VCC
P26
VCC
P28
VCC
R3
VCC
R5
VCC
R7
VCC
R9
VCC
R23
VCC
R25
VCC
R27
VCC
W27
VCC
W25
VCC
4 4
3 3
2 2
VCC_P
B
CPU2C
GN21
GN22
GN23
GN24
GN25
GN26
GN27
GN28
GN29
GN30
GN31
MTG_GND24
MTG_GND25
MTG_GND26
MTG_GND5
MTG_GND6
MTG_GND7
GN5
GN6
GN7
GN8
MTG_GND27
MTG_GND28
MTG_GND29
MTG_GND30
MTG_GND8
MTG_GND9
MTG_GND10
MTG_GND11
GN9
GN10
GN11
GN32
MTG_GND31
MTG_GND32
MTG_GND12
MTG_GND13
GN12
GN13
J7
VSS
J9
VSS
J23
VSS
J25
VSS
J27
VSS
MTG_GND21
MTG_GND22
J29
K2
K4
K6
K8
K24
K26
K28
L23
L25
L27
L29
M2
M4
M6
M8
M24
M26
M28
N2
N4
N6
N8
N24
N26
N28
P3
P5
P7
P9
P23
P25
P27
P29
R2
R4
R6
R8
R24
R26
R28
T3
T5
T7
T9
T23
T25
T27
T29
U2
U4
U6
U8
U24
U26
U28
V3
V5
V7
V9
V23
V25
V27
V29
W2
W4
W24
W26
W28
Y5
Y7
Y13
Y19
Y25
AA2
AA9
AA15
AA17
AA23
AB5
AB11
AB21
AB27
AC2
AC7
AC13
AC19
AC25 AD3
PGA-S603
MTG_GND23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L3
VSS
L5
VSS
L7
VSS
L9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
MTG_GND1
MTG_GND2
MTG_GND3
MTG_GND4
GN1
GN2
GN3
GN4
A1
A4
GAL_VDD1
GAL_VDD2
GAL_VDD3
RSVD1
RSVD2
GAL_VDD4
GAL_VDD5
GAL_VDD6
GAL_VDD7
GAL_VDD8
GAL_VDD9
GAL_VDD10
GAL_VDD11
GAL_VDD12
GAL_VDD13
GAL_VDD14
GAL_VDD15
GAL_VDD16
GAL_VDD17
GAL_VDD18
GAL_VDD19
GAL_VDD20
GAL_VDD21
GAL_VDD22
GAL_VDD23
GAL_VDD24
GAL_VDD25
GAL_VDD26
GAL_VDD27
GAL_VDD28
GAL_VDD29
GAL_VDD30
GAL_VDD31
GAL_VDD32
GAL_VDD33
GAL_VDD34
GAL_VDD35
GAL_VSS1
GAL_VSS2
GAL_VSS3
GAL_VSS4
GAL_VSS5
GAL_VSS6
GAL_VSS7
GAL_VSS8
GAL_VSS9
GAL_VSS10
GAL_VSS11
GAL_VSS12
GAL_VSS13
GAL_VSS14
GAL_VSS15
GAL_VSS16
GAL_VSS17
GAL_VSS18
GAL_VSS19
GAL_VSS20
FOSTER_PWR
GAL_VSS21
GAL_VSS22
GAL_VSS23
GAL_VSS24
GAL_VSS25
GAL_VSS26
GAL_VSS27
GAL_VSS28
GAL_VSS29
GAL_VSS30
GAL_VSS31
GAL_VSS32
GAL_VSS33
GAL_VSS34
RSVD3
RSVD4
RSVD5
RSVD8
RSVD13
RSVD17
RSVD63
RSVD67
RSVD68
RSVD69
RSVD73
RSVD77
RSVD80
RSVD83
RSVD86
RSVD87
RSVD88
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MTG_GND14
MTG_GND15
MTG_GND16
MTG_GND17
MTG_GND18
MTG_GND19
MTG_GND20
GN14
GN15
GN16
GN17
GN18
GN19
GN20
A30
B4
B31
C30
D1
D31
E30
F1
F31
G30
H1
H31
J30
K1
K31
L30
M1
M31
N1
N31
P30
R1
R31
T30
U1
U31
V30
W1
W31
Y30
AA1
AA31
AB30
AC31
AD30
A31
B30
C1
C31
D30
E1
E31
F30
G1
G31
H30
J1
J31
K30
L1
L31
M30
N30
P1
P31
R30
T1
T31
U30
V1
V31
W30
Y1
Y31
AA30
AB1
AB31
AC30
AD31
A15
A16
A26
B1
C5
D25
W3
Y3
Y27
Y28
AA3
AB3
AC1
AD1
AE4
AE15
AE16
AE27
AE21
AE11
AE2
AD23
AD17
AD15
AD9
VCC_P
C
R736
X_R
DON'T STUFF
CPU2 CORE
DECOUPLING
22U
C575
22U
C544
22U
C389
PLACE AROUND P2 SOCKET
C515
C513
1U
1U
CPU2_THERMDA1 51
CPU2_THERMDC1 51
D
E
VCC_P
22U
C574
22U
22U
C572
C573
22U
22U
C570
C498
VCC_P
22U
22U
C519
C522
22U
22U
C478
C486
22U
22U
C448
C454
VCC_P
22U
22U
C391
C390
22U
22U
C499
C392
22U
22U
C394
C393
VCC_P
22U
22U
C450
22U
C455
C489
22U
22U
C541
C523
VCC_P
C503
C481
1U
C507
1U
1U
C476
C482
1U
C474
1U
1U
VCC_P
C475
C514
0.1U
C495
0.1U
C497
0.1U
0.1U
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
Foster CPU #2 PWR
Last Revision Date:
Thursday, March 21, 2002
Sheet
E
7 68
of
Rev
0D
Page 8
A
4 4
B
C
D
E
DON'T STUFF
VCC3
R568
X_R
R569
1K
VCC3
R718
X_R
R719
1K
R576
X_R
R5771KR605
R708
X_R
R709
1K
VCC_P
R561
51
C426
C418
0.1U
0.1U
R604
X_R
DON'T STUFF
P1_SM_ADDR0
P1_SM_ADDR1 P1_SM_TS_ADDR0
P1_SM_ADDR2
1K
Addr._0 : 1010 000Z
Z = R/W bit
R696
1K
P2_SM_ADDR0
P2_SM_ADDR1
P2_SM_ADDR2
R697
X_R
DON'T STUFF
P1_GTLREF1
C414
R585
1U
100
P1_SM_ADDR[0..2]
P2_SM_ADDR[0..2]
P1_SM_TS_ADDR[0..1]
P2_SM_TS_ADDR[0..1]
Addr._1 : 1010 001Z
P1_GTLREF1 4 P1_GTLREF0 4
P1_SM_ADDR[0..2] 4
P2_SM_ADDR[0..2] 6
P1_SM_TS_ADDR[0..1] 4
P2_SM_TS_ADDR[0..1] 6
Z = R/W bit
CPU_0 Thermal Sensor SM Bus
Addr._0 : 0011X00Z
: 1001X00Z
: 0101X00Z
3 3
CPU_1 Thermal Sensor SM Bus
Addr._1 : 0011X01Z
: 1001X01Z
: 0101X01Z
2 2
OR
OR
OR
OR
R687
X_R
DON'T STUFF
R688
1K
VCC3
R615
X_R
R6141KR589
1K
VCC3
1K
VCC_P
R543
51
C383
0.1U
R588
DON'T STUFF
X_R
P1_SM_TS_ADDR1
R700
P2_SM_TS_ADDR0
P2_SM_TS_ADDR1
R701
X_R
DON'T STUFF
C384
R536
0.1U
100
P1_GTLREF0
C385
1U
VCC_P
R737
51
P2_GTLREF0 P2_GTLREF1
C587
R741
C586
0.1U
0.1U
1 1
A
B
C585
1U
100
PLACE EACH 220pf OF
GTLREF NEAR PROC
PIN
C
VCC_P
R690
51
P2_GTLREF1 6 P2_GTLREF0 6
C551
C557
R707
0.1U
C562
0.1U
100
1U
Micro Star Restricted Secret
Title
CPU GTLREF & SM Bus Slave Address
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
8 68
of
Rev
0D
Page 9
A
4 4
B
C
D
E
VCC_P
VCC_P
VCC_P
RES. TO BE WITHIN
1" OF ITP CONN.
R480 40.2
BPM#2 4,6,11
BPM#3 4,6,11
BPM#4 4,6,11
BPM#5 4,6,11
PROC_RESET# 4,6,11,13
CLK_100M_ITP0 22
CLK_100M_ITP1 22
3 3
2 2
CLK_100M_ITP = BCLK (to
processors) + Length of
BPM# trace from ITP
connector to first CPU.
RES. TO BE WITHIN
1" OF ITP CONN.
JP8
1
2
3
D1X3-BK
Place this HDR next to the
CPU nearest to ITP conn.
JP8_23
JC-D2-GN
FBO
R505
X_R
VCC_P
R441
150
PLACE NEAR CPU1
R495 40.2
R541 40.2
R542 40.2
R540 40.2
R506
X_R R493
R418
330
P1_TDI
P1_TDO
P2_TDO
VCC_P
R393
75
J3
1
2
1
2
3
4
3
4
5
6
5
6
7
8
7
8
9
10
9
10
11
13
15
17
19
21
23
25
12
11
12
14
13
14
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
25
X_CON25A_1
RES. TO BE WITHIN
1" OF ITP CONN.
P1_TDI 4
P1_TDO 4,6
P2_TDO 6
RES. TO BE WITHIN
1" OF ITP CONN.
DBA#
P1_TDI
R494 0
Place it as close to
P2_TDO
ITP Conn. as
possible
R400 1K
R499 1K
TCK
R497
680
TCK
R397 1K
R399 1K
R496
39.2
RES. TO BE WITHIN
1" OF ITP CONN.
TCK
R943 0
R944 0
R945 0
U26
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
X_74LVC244A-SO20
R396 1K
R484 330
R498
1K
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
VCC
GND
VCC3
R_P1_TCK
R_P2_TCK
R_FBO
R_P1_TCK
R_P2_TCK
R_FBO
VCC_P
R516
DON'T STUFF
X_R
ITP_RESET# 59
TMS 4,6
ITP_TRST# 4,6
THIS NET TO BE DAISY
CHAINED ALONG PROCS.
Within 1" of the last
150
device on this Net
R403 22
R404 22
R398 22
VCC_P
C308
0.1U
FBO = TCK (to
processors) + Length of
BPM# trace from ITP
connector to first CPU.
Length of
P1_TCK =
P2_TCK
FBO
P1_TCK 4
P2_TCK 6
C340
C352
X_22P
X_22P
C351
X_22P
R517
150
18
16
14
12
9
7
5
3
20
10
Look at Routing guidelines while
Placing components from this
sheet
LAYOUT NOTE:
1 1
A
B
BPM#[0..5], RST#, FBO, BCKN, BCKP, TCK, AND FBI
ARE CRITICAL ROUTES.
C
Micro Star Restricted Secret
Title
CPU GTLREF & SM Bus Slave Address
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
9 68
of
Rev
0D
Page 10
5
D D
4
3
2
1
VCC3
RN108
1 2
3 4
5 6
7 8
330
INTR
INTR 41
RSB_IGNNE#
RSB_IGNNE# 41
R762
C C
B B
0
P1_THERMTRIP# 4,41
P2_THERMTRIP# 6,41
P1_PROCHOT# 4
P2_PROCHOT# 6
P1_IERR# 4
P2_IERR# 6
NMI
RESETDLY#
RSB_A20M#
P6_CGF1
P6_CGF3
P6_CGF2
P6_CGF4
R727
330
VCC_P
11
10
14
13
15
R689 51
VCC
16 8
2
1A
3
VCC GND
1B
5
2A
6
2B
3A
3B
4A
4B
1
A/B
G
RESETDLY# 12
NMI 40
RSB_A20M# 41
VCC_P
R683 51
R679 51
R684 51
R680 51
VCC3
R695
330
SW1
B1
B2
B3
B4
D4P-D-SB
U45
4
1Y
7
2Y
9
3Y
12
4Y
74F157-SOIC16
R626 51
VCC3
A1
A2
A3
A4
LINT0_3V
IGNNE#_3V
A20M#_3V
LINT1_3V
GTLREF_1
C549
1000P-0805
U38
2
3
5
6
14
7
GTLREF_1
A1
A2
A3
A4
VDD
GND
GTL2005
C558
1000P-0805
GTLREF DIRB-A
GND
GND
11
8
4 1
9
10
12
13
C577
1000P-0805
VCC_P
C559
0.1U
13
B1
12
B2
10
B3
9
B4
4 1
8
11
U39
GND
GND
GTLREF DIRB-A
B4
B3
B2
B1
GTL2005
VCC3 VCC
R699
51
GTLREF_1
100
VCC3
1 23 45 6
GTLREF_1
GND
VDD
A4
A3
A2
A1
C566
1000P-0805
7 8
7
14
6
5
3
2
C556
0.1U
VCC3
RN104
1K
C545
1000P-0805
GTLREF_1
R711
1K
LINT0
LINT0 4,6,11
IGNNE#
IGNNE# 4,6,11
A20M#
A20M# 4,6,11
LINT1
LINT1 4,6,11
RSB_P1_PROCHOT# 41
RSB_P2_PROCHOT# 41
RSB_P1_IERR# 41
RSB_P2_IERR# 41
NMI A20M# IGNNE# INTR
LINT1
LINT0
X8 H H H H
X9/X23 H H H L
X20 H H L H
X10 H H L L
X12 H L H H
X13 H L H L
X14 H L L H
X15 H L L L
X16 L H H H
X17 L H H L
X18 L H L H
X19 L H L L
X20 L L H H
X21 L L H L
X22 L L L H
X24 L L L L
R717
330
VCC3
R725
330
Q45
NPN-PMBT2369-SOT23
VCC_P
VCC_P
R712
330 R694
FERR# 4,6,11
RSB_FERR# 40
A A
Micro Star Restricted Secret
Title
Ratio & Level Shift Circuit
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
10 68
of
Rev
0D
Page 11
A
B
C
D
E
DON'T STUFF PLACE NEAR CPU2
40.2
40.2
40.2
40.2
X_R
X_R
R715
R706
R1042
180
R1129 X_0
R730
180
R629
R724
R704
R607
BPM#4
VCC_P
150
R622
1U
X_R
R691
150
R599
R586
C779
C780
1U
U46C
5 6
DM7407-SOIC14
U46D
9 8
DM7407-SOIC14
150
150
R621
C7811UC782
1U
VCC_P VCC_P
40.2
40.2
40.2
40.2
R616
R606
R623
R617
BPM#2
BPM#3
BPM#4
BPM#5
150
150
R609
R598
C783
C784
1U
1U
SMI#
INIT#
C432
C436
0.1U
PLACE THE TERM CAPS NEAR THE TERMINATION
RESISTORS
C427
0.1U
C419
0.1U
0.1U
RSB_STPCLK# 41
RSB_SLP# 41 MCERR# 4,6
C440
0.1U
VCC3
VCC3
R744
150
R753
150
C382
0.1U
U46A
1 2
DM7407-SOIC14
U46B
3 4
DM7407-SOIC14
CPU_STPCLK#
SLP#
VCC
C579
0.1U
4 4
3 3
2 2
VCC_P
PROC_RESET# 4,6,9,13
FERR# 4,6,10
BINIT# 4,6,12
SMI#
SMI# 4,6
IGNNE# 4,6,10
INIT#
INIT# 4,6
CPU_STPCLK# 4,6
CPU_STPCLK#
LINT0 4,6,10
LINT1 4,6,10
A20M# 4,6,10
SLP#
SLP# 4,6
BPM#[2..5] 4,6,9
40.2
R642
BNR# 4,6,12
HIT# 4,6,12
HITM# 4,6,12
LOCK# 4,6,12
EXT_SMI# 41
SIO_SMI# 41,47
CMIC_PINIT# 12,41,48
PLACE NEAR CPU1
40.2
40.2
40.2
40.2
40.2
R713
R685
R720
R698
R702
PLACE THESE
CLOSE TO
CPU2
BINIT#
VCC3
VCC25
(Make small Cu Islands for P1/P2_VCCA, P1/P2_VSSA and P1/P2_VCCIOPLL nets )
Place these Close to CPU1
VCC_P VCC_P
R524 0
R551 0
1 2
L23 4.7U_1206
1 2
L24 4.7U_1206
22U
C722
22U
C724
C380
1U
C387
1U
P1_VCCA 4
P1_VSSA 4
P1_VCCIOPLL 4
Place these Close to CPU2
1 2
R758 0
R759 0
L32 4.7U_1206
1 2
L33 4.7U_1206
22U
C594
1U
C723
C595
22U
1U
C725
P2_VCCA 6
P2_VSSA 6
P2_VCCIOPLL 6
U46F
1 1
A
B
C
13 12
DM7407-SOIC14
D
Micro Star Restricted Secret
Title
CPU Level Shift Circuit
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
11 68
Rev
0D
of
Page 12
A
4 4
3 3
PCIRST_X# 60
2 2
R306
VCC25
R299
VCC25
R307
VCC25
R308
VCC25
R310
VCC25
VCC_P
R373 100
R346 255
R343 20
*** Difference
with Rev:A1.0
Ckt
DSTBN#[0..3] 4,6
DSTBP#[0..3] 4,6
PA#[3..35] 4,6
PD#[0..63] 4,6
DINV#[0..3] 4,6
DP#[0..3] 4,6
R305
C240
22p
4.7K
10K
4.7K
4.7K
4.7K
MEMOFFACK#
WRMRST#
CMIC_FATAL#
MEMOFF#
CMIC_ALERT#
GTL_COMP_PD
GTL_COMP_PU
GTL_RCOMP
B
PA#[3..35]
PD#[0..63]
DINV#[0..3]
DP#[0..3]
DSTBN#[0..3]
DSTBP#[0..3]
22
C
AE25
AE24
AF26
AE26
AF27
AF23
AD27
AE27
AG25
AG24
AG26
K15
A17
A19
B18
A18
B19
A20
G16
C19
E19
H17
H16
D19
F18
H18
G19
F19
A23
B23
A22
A21
F20
B20
A24
A25
D20
B21
E20
B25
B27
A26
C22
D22
D18
C20
H19
G2
K17
H5
C1
D1
G3
F23
G1
D24
E16
G15
F15
C16
H15
E23
C24
F21
H9
K18
G21
F22
H20
F1
F4
E1
B1
F2
U20A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB0#
ADSTB1#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HIT#
HITM#
LOCK#
TRDY#
DEFER#
BREQ0#
PLLRST
DLYRST
PCIRST#
WRMRST#
RS0#
RS1#
RS2#
RSP#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
AP0#
AP1#
ALERT#
BINIT#
HINIT#
BCLKP
BCLKN
FATAL#
MEMOFF#
MEMOFFACK#
GTL_VREF
GTL_VREF
GTL_COMP_PU
GTL_COMP_PD
GTL_RCOMP
DINV0#
DINV1#
DINV2#
DINV3#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DP0#
DP1#
DP2#
DP3#
PD#0
C2
D0#
PD#1
E3
D1#
PD#2
B3
D2#
PD#3
C3
D3#
PD#4
F3
D4#
PD#5
D4
D5#
PD#6
A2
D6#
PD#7
D2
D7#
PD#8
D3
D8#
PD#9
A3
D9#
PD#10
H6
PD#11
F6
PD#12
G8
PD#13
F5
PD#14
H8
PD#15
H10
PD#16
F7
PD#17
G9
PD#18
E7
PD#19
E6
PD#20
A4
PD#21
B4
PD#22
D7
PD#23
A5
PD#24
G10
PD#25
K11
PD#26
B7
PD#27
C6
PD#28
F8
PD#29
C7
PD#30
E9
PD#31
K12
PD#32
D8
PD#33
C8
PD#34
D9
PD#35
B9
PD#36
E10
PD#37
A7
PD#38
A10
PD#39
A8
PD#40
B12
PD#41
A11
PD#42
F12
PD#43
A12
PD#44
G13
PD#45
F13
PD#46
K13
PD#47
H12
PD#48
B13
PD#49
D12
PD#50
A13
PD#51
E13
PD#52
C13
PD#53
C14
PD#54
A15
PD#55
B15
PD#56
D15
PD#57
E14
PD#58
E15
PD#59
H14
PD#60
K14
PD#61
C15
PD#62
A16
PD#63
G14
DINV#0
G5
DINV#1
A6
DINV#2
C10
DINV#3
H13
DP#0
C26
DP#1
B26
DP#2
E21
DP#3
E25
DSTBN#0
G6
DSTBN#1
F9
DSTBN#2
C9
DSTBN#3
D13
DSTBP#0
H7
DSTBP#1
H11
DSTBP#2
A9
DSTBP#3
A14
CMIC-WS
+
EC50
470u/4V
C262
1000p-0805
C274
1000p-0805
C901
4.7u
C902
4.7u
C251
1u
PA#3
PA#4
PA#5
PA#6
PA#7
PA#8
PA#9
PA#10
PA#11
PA#12
PA#13
PA#14
PA#15
PA#16
PA#17
PA#18
PA#19
PA#20
PA#21
PA#22
PA#23
PA#24
PA#25
PA#26
PA#27
PA#28
PA#29
PA#30
PA#31
PA#32
PA#33
PA#34
PA#35
ADSTB#0
ADSTB#0 4,6
ADSTB#1
ADSTB#1 4,6
ADS#
ADS# 4,6
BNR#
BNR# 4,6,11
BPRI#
BPRI# 4,6
DBSY#
DBSY# 4,6
DRDY#
DRDY# 4,6
HIT#
HIT# 4,6,11
HITM#
HITM# 4,6,11
LOCK#
LOCK# 4,6,11
P_TRDY#
P_TRDY# 4,6
DEFER#
DEFER# 4,6
BREQ#0
BREQ#0 4,6
PS_PWRGD# 25,27,41,59
RESETDLY# 10
CMIC_ALERT# 16,41
CMIC_PINIT# 11,41,48
HCLK_CMIC 22
HCLK_CMIC_N 22
CMIC_FATAL# 16,41
MEMOFFACK# 16
RESETDLY#
R_PCIRST_X#
WRMRST#
WRMRST# 16
RS#0
RS#0 4,6
RS#1
RS#1 4,6
RS#2
RS#2 4,6
RSP#
RSP# 4,6
HREQ#0
HREQ#0 4,6
HREQ#1
HREQ#1 4,6
HREQ#2
HREQ#2 4,6
HREQ#3
HREQ#3 4,6
HREQ#4
HREQ#4 4,6
AP#0
AP#0 4,6
AP#1
AP#1 4,6
CMIC_ALERT#
BINIT# 4,6,11
CMIC_FATAL#
MEMOFF#
MEMOFF# 16,40
MEMOFFACK#
GTL_VREF_CMIC
GTL_COMP_PU
GTL_COMP_PD
GTL_RCOMP
VCC25
1 2
D
E
VCC_P
R349
GTL_VREF_CMIC
C2711uC269
0.1u
51
R347
100
VCC25
C241
0.1u
C238
C242
C236
0.1u
0.1u
C237
0.1u
C256
0.1u
0.1u
VCC25
C259
1u
PUT THESE C AS CLOSE CMIC AS POSSIBLE
1 1
Micro Star Restricted Secret
Title
CMIC Foster Interface
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
12 68
of
Rev
0D
Page 13
A
B
C
D
E
B_IMB_D_R[0..15] 27
4 4
3 3
2 2
B_IMB_D_T[0..15] 27
A_IMB_D_R[0..15] 25
A_IMB_D_T[0..15] 25
T_IMB_D_R[0..3] 41
T_IMB_D_T[0..3] 41
T_IMB_CLK_T 41
T_IMB_CON_T 41
T_IMB_PAR_T 41
B_IMB_D_R[0..15]
B_IMB_D_T[0..15]
A_IMB_D_R[0..15]
A_IMB_D_T[0..15]
T_IMB_D_R[0..3]
T_IMB_D_T[0..3]
T_IMB_D_T0
T_IMB_D_T1
T_IMB_D_T3
B_IMB_CON_R 27
B_IMB_CLK_R_P 27
B_IMB_CLK_R_N 27
B_IMB_PAR_R 27
B_IMB_CON_T 27
B_IMB_CLK_T_P_R 27
B_IMB_CLK_T_N_R 27
B_IMB_PAR_T 27
R322 33
R314 33
R325 33
R335 33
R323 33
R326 33
R311 33
IMB_VREF_CMIC
B_IMB_D_R0
B_IMB_D_R1
B_IMB_D_R2
B_IMB_D_R3
B_IMB_D_R4
B_IMB_D_R5
B_IMB_D_R6
B_IMB_D_R7
B_IMB_D_R8
B_IMB_D_R9
B_IMB_D_R10
B_IMB_D_R11
B_IMB_D_R12
B_IMB_D_R13
B_IMB_D_R14
B_IMB_D_R15
B_IMB_D_T0
B_IMB_D_T1
B_IMB_D_T2
B_IMB_D_T3
B_IMB_D_T4
B_IMB_D_T5
B_IMB_D_T6
B_IMB_D_T7
B_IMB_D_T8
B_IMB_D_T9
B_IMB_D_T10
B_IMB_D_T11
B_IMB_D_T12
B_IMB_D_T13
B_IMB_D_T14
B_IMB_D_T15
R930 0
R932 0
R_TIMB_D_T0
R_TIMB_D_T1
R_TIMB_D_T2 T_IMB_D_T2
R_TIMB_D_T3
R_TIMB_CLKT
R_TIMB_CONT
R_TIMB_PART
IMB_VREF_CMIC
CMIC_IMB_COMP_PD
CMIC_IMB_COMP_PU
CMIC_IMB_RCOMP
U20B
R25
BIMBD_R0
T23
B IMBD_R1
R26
BIMBD_R2
R27
BIMBD_R3
R22
BIMBD_R4
P23
BIMBD_R5
R24
BIMBD_R6
R23
BIMBD_R7
N25
BIMBD_R8
N22
BIMBD_R9
P21
BIMBD_R10
N23
BIMBD_R11
N24
BIMBD_R12
P20
BIMBD_R13
R18
BIMBD_R14
R17
BIMBD_R15
N20
BIMBCON_R
P25
BIMBCLK_R_P
P27
BIMBCLK_R_N
N21
BMBPAR_R
U21
BIMBD_T0
U23
BIMBD_T1
T20
BIMBD_T2
U18
BIMBD_T3
U17
BIMBD_T4
V20
BIMBD_T5
U20
BIMBD_T6
T22
BIMBD_T7
T21
BIMBD_T8
R21
BIMBD_T9
T25
BIMBD_T10
U27
BIMBD_T11
T24
BIMBD_T12
U25
BIMBD_T13
T27
BIMBD_T14
T26
BIMBD_T15
R20
BIMBCON_T
W26 L25
BIMBCLK_T_P AIMBCLK_T_P
W27
BIMBCLK_T_N
V27
BIMBDPAR_T
Y22
T_IMBD_T0
AA25
T_IMBD_T1
Y21
T_IMBD_T2
Y24
T_IMBD_T3
P18
IMB_VREF
D27
IMB_COMP_PD
H21
IMB_COMP_PU
G22
IMB_RCOMP
AIMBD_R0
AIMBD_R1
AIMBD_R2
AIMBD_R3
AIMBD_R4
AIMBD_R5
AIMBD_R6
AIMBD_R7
AIMBD_R8
AIMBD_R9
AIMBD_R10
AIMBD_R11
AIMBD_R12
AIMBD_R13
AIMBD_R14
AIMBD_R15
AIMBCON_R
AIMBCLK_R_P
AIMBCLK_R_N
AIMBPAR_R
AIMBD_T0
AIMBD_T1
AIMBD_T2
AIMBD_T3
AIMBD_T4
AIMBD_T5
AIMBD_T6
AIMBD_T7
AIMBD_T8
AIMBD_T9
AIMBD_T10
AIMBD_T11
AIMBD_T12
AIMBD_T13
AIMBD_T14
AIMBD_T15
AIMBCON_T
AIMBCLK_T_N
AIMBPAR_T
T_IMBD_R0
T_IMBD_R1
T_IMBD_R2
T_IMBD_R3
T_IMBCLK_R T_IMBCLK_T
T_IMBCON_R T_IMBCON_T
T_IMBPAR_R T_IMBPAR_T
CPURST#
SRESET#
TESTMODE#
SCLK
SDA
CMIC-WS
L20
L17
L18
K20
J24
H23
H22
J22
H26
F27
G24
G27
G25
E27
F24
J20
F25
H25
H24
F26
M26
M25
N27
N18
N17
M24
N26
L27
M27
L21
M22
H27
J27
K27
J26
M21
M20
M23
L23
Y26
W24
AA26
W22
Y27 AA24
AA27 AA23
W20 AB25
C27
AF25
AD26
AE23
AG23
A_IMB_D_R0
A_IMB_D_R1
A_IMB_D_R2
A_IMB_D_R3
A_IMB_D_R4
A_IMB_D_R5
A_IMB_D_R6
A_IMB_D_R7
A_IMB_D_R8
A_IMB_D_R9
A_IMB_D_R10
A_IMB_D_R11
A_IMB_D_R12
A_IMB_D_R13
A_IMB_D_R14
A_IMB_D_R15
A_IMB_D_T0
A_IMB_D_T1
A_IMB_D_T2
A_IMB_D_T3
A_IMB_D_T4
A_IMB_D_T5
A_IMB_D_T6
A_IMB_D_T7
A_IMB_D_T8
A_IMB_D_T9
A_IMB_D_T10
A_IMB_D_T11
A_IMB_D_T12
A_IMB_D_T13
A_IMB_D_T14
A_IMB_D_T15
R931 0
R933 0
T_IMB_D_R0
T_IMB_D_R1
T_IMB_D_R2
T_IMB_D_R3
R318 1K
A_IMB_CON_R 25
A_IMB_CLK_R_P 25
A_IMB_CLK_R_N 25
A_IMB_PAR_R 25
A_IMB_CON_T 25
A_IMB_CLK_T_P_R 25
A_IMB_CLK_T_N_R 25
A_IMB_PAR_T 25
T_IMB_CLK_R 41
T_IMB_CON_R 41
T_IMB_PAR_R 41
PROC_RESET# 4,6,9,11
POWERGOOD_CMIC 16,59
VCC25
TESTMODE# 16
RCC_SDA 16,25,27,49,51,52,54
RCC_SCL 16,25,27,49,51,52,54
VDD_IMB
CMIC_IMB_COMP_PD
R372 X_255
CMIC_IMB_RCOMP
R350 100
CMIC_IMB_COMP_PU
R883 100
CMIC_IMB_COMP_PD
R884 255
CMIC_IMB_COMP_PU
R358 X_255
*** Difference with
Rev:A1.0 Ckt
1 1
A
B
IMB_VREF_CMIC
IMB_VREF_CMIC
C2701uC273
VDD_IMB
R340
100
C277
1000p-0805
C
R334
100
Micro Star Restricted Secret
Title
CMIC IMB Interface
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
13 68
of
Rev
0D
0.1u
Page 14
A
B
C
D
E
4 4
R_A_SD0_0
AA22
R_A_SD0_1
AD22
R_A_SD0_2
AC19
R_A_SD0_3
AA18
R_A_SD0_4
AB23
R_A_SD0_5
AB19
R_A_SD0_6
AD19
R_A_SD0_7
Y16
R_A_SD1_0
V15
R_A_SD1_1
AG22
R_A_SD1_2
AB15
R_A_SD1_3
AD16
R_A_SD1_4
AG21
R_A_SD1_5
AF19
R_A_SD1_6
AG17
R_A_SD1_7
AB16
R_A_SD2_0
AG14
R_A_SD2_1
Y14
R_A_SD2_2
AF13
R_A_SD2_3
AG12
R_A_SD2_4
AE14
R_A_SD2_5
V14
R_A_SD2_6
AG13
R_A_SD2_7
AE13
R_A_SD3_0
Y13
R_A_SD3_1
AF9
R_A_SD3_2
AE8
R_A_SD3_3
3 3
2 2
1 1
R_A_SD3_4
R_A_SD3_5
R_A_SD3_6
R_A_SD3_7
R_A_SD4_0
R_A_SD4_1
R_A_SD4_2
R_A_SD4_3
R_A_SD4_4
R_A_SD4_5
R_A_SD4_6
R_A_SD4_7
R_A_SD5_0
R_A_SD5_1
R_A_SD5_2
R_A_SD5_3
R_A_SD5_4
R_A_SD5_5
R_A_SD5_6
R_A_SD5_7
R_A_SD6_0
R_A_SD6_1
R_A_SD6_2
R_A_SD6_3
R_A_SD6_4
R_A_SD6_5
R_A_SD6_6
R_A_SD6_7
R_A_SD7_0
R_A_SD7_1
R_A_SD7_2
R_A_SD7_3
R_A_SD7_4
R_A_SD7_5
R_A_SD7_6
R_A_SD7_7
R_A_SD8_0
R_A_SD8_1
R_A_SD8_2
R_A_SD8_3
R_A_SD8_4
R_A_SD8_5
R_A_SD8_6
R_A_SD8_7
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
AD10
AA12
AG8
AG6
AG5
T10
Y4
R11
T7
W5
Y3
U6
U1
T3
R2
R4
R5
T5
R1
K8
R6
N3
N1
M2
M4
N8
N4
L1
M3
H1
H2
L6
M10
J5
J3
L8
K10
AF3
AG2
AB10
AA9
AE6
AF5
AC8
AB9
AD5
AE5
Y10
AA8
Y9
Y7
AF1
AE2
AD3
AE3
AF2
Y8
CMIC-WS
U20C
A_SD0_0
A_SD0_1
A_SD0_2
A_SD0_3
A_SD0_4
A_SD0_5
A_SD0_6
A_SD0_7
A_SD1_0
A_SD1_1
A_SD1_2
A_SD1_3
A_SD1_4
A_SD1_5
A_SD1_6
A_SD1_7
A_SD2_0
A_SD2_1
A_SD2_2
A_SD2_3
A_SD2_4
A_SD2_5
A_SD2_6
A_SD2_7
A_SD3_0
A_SD3_1
A_SD3_2
A_SD3_3
A_SD3_4
A_SD3_5
A_SD3_6
A_SD3_7
A_SD4_0
A_SD4_1
A_SD4_2
A_SD4_3
A_SD4_4
A_SD4_5
A_SD4_6
A_SD4_7
A_SD5_0
A_SD5_1
A_SD5_2
A_SD5_3
A_SD5_4
A_SD5_5
A_SD5_6
A_SD5_7
A_SD6_0
A_SD6_1
A_SD6_2
A_SD6_3
A_SD6_4
A_SD6_5
A_SD6_6
A_SD6_7
A_SD7_0
A_SD7_1
A_SD7_2
A_SD7_3
A_SD7_4
A_SD7_5
A_SD7_6
A_SD7_7
A_SD8_0
A_SD8_1
A_SD8_2
A_SD8_3
A_SD8_4
A_SD8_5
A_SD8_6
A_SD8_7
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
R_A_DQS0_0
R_A_DQS0_1
R_A_DQS1_0
R_A_DQS1_1
R_A_DQS2_0
R_A_DQS2_1
R_A_DQS3_0
R_A_DQS3_1
R_A_DQS4_0
R_A_DQS4_1
R_A_DQS5_0
R_A_DQS5_1
R_A_DQS6_0
R_A_DQS6_1
R_A_DQS7_0
R_A_DQS7_1
R_A_DQS8_0
R_A_DQS8_1
AC20
AG20
AB13
AE9Y2T4
AC13
AF8W1P7N7H3
A_DQS2_0
A_DQS3_0
A_DQS2_1
A_DQS3_1
B_DQS2_0
B_DQS3_0
B_DQS1_1
B_DQS2_1
AE15
AG11
AE19
AD15
AG10Y5P3U2M7
R_B_DQS1_1
R_B_DQS2_0
R_B_DQS2_1
R_B_DQS3_0
R_B_DQS3_1
N10H4Y11
A_DQS4_0
A_DQS5_0
A_DQS6_0
A_DQS7_0
A_DQS4_1
A_DQS5_1
A_DQS6_1
A_DQS7_1
B_DQS4_0
B_DQS5_0
B_DQS6_0
B_DQS7_0
B_DQS3_1
B_DQS4_1
B_DQS5_1
B_DQS6_1
AA4P1R10L4AC9
R_B_DQS4_0
R_B_DQS4_1
R_B_DQS5_0
R_B_DQS5_1
R_B_DQS6_0
R_B_DQS6_1
R_B_DQS7_0
V11
A_DQS8_0
B_DQS7_1
R_B_DQS7_1
R_B_DQS8_0
A_DQS8_1
B_DQS8_0
B_DQS8_1
AF6
R_B_DQS8_1
TP2
CS7
Y6
TP3
1
B_SD0_0
B_SD0_1
B_SD0_2
B_SD0_3
B_SD0_4
B_SD0_5
B_SD0_6
B_SD0_7
B_SD1_0
B_SD1_1
B_SD1_2
B_SD1_3
B_SD1_4
B_SD1_5
B_SD1_6
B_SD1_7
B_SD2_0
B_SD2_1
B_SD2_2
B_SD2_3
B_SD2_4
B_SD2_5
B_SD2_6
B_SD2_7
B_SD3_0
B_SD3_1
B_SD3_2
B_SD3_3
B_SD3_4
B_SD3_5
B_SD3_6
B_SD3_7
B_SD4_0
B_SD4_1
B_SD4_2
B_SD4_3
B_SD4_4
B_SD4_5
B_SD4_6
B_SD4_7
B_SD5_0
B_SD5_1
B_SD5_2
B_SD5_3
B_SD5_4
B_SD5_5
B_SD5_6
B_SD5_7
B_SD6_0
B_SD6_1
B_SD6_2
B_SD6_3
B_SD6_4
B_SD6_5
B_SD6_6
B_SD6_7
B_SD7_0
B_SD7_1
B_SD7_2
B_SD7_3
B_SD7_4
B_SD7_5
B_SD7_6
B_SD7_7
B_SD8_0
B_SD8_1
B_SD8_2
B_SD8_3
B_SD8_4
B_SD8_5
B_SD8_6
B_SD8_7
RAS#
CAS#
A_CKE
B_CKE
CS6
AA6
1
R_B_SD0_0
Y20
R_B_SD0_1
AA21
R_B_SD0_2
AA19
R_B_SD0_3
V17
R_B_SD0_4
V18
R_B_SD0_5
Y19
R_B_SD0_6
AB20
R_B_SD0_7
Y18
R_B_SD1_0
AF22
R_B_SD1_1
AE21
R_B_SD1_2
Y17
R_B_SD1_3
V16
R_B_SD1_4
AE22
R_B_SD1_5
AE20
R_B_SD1_6
AC18
R_B_SD1_7
AE18
R_B_SD2_0
AF16
R_B_SD2_1
AF15
R_B_SD2_2
AC15
R_B_SD2_3
AB14
R_B_SD2_4
AG16
R_B_SD2_5
AG15
R_B_SD2_6
AD14
R_B_SD2_7
Y15
R_B_SD3_0
AA13
R_B_SD3_1
AD13
R_B_SD3_2
AC12
R_B_SD3_3
AG9
R_B_SD3_4
V13
R_B_SD3_5
AE12
R_B_SD3_6
AF10
R_B_SD3_7
AG7
R_B_SD4_0
AB4
R_B_SD4_1
AB2
R_B_SD4_2
AA1
R_B_SD4_3
T8
R_B_SD4_4
AA3
R_B_SD4_5
AA2
R_B_SD4_6
Y1
R_B_SD4_7
AA5
R_B_SD5_0
P8
R_B_SD5_1
R3
R_B_SD5_2
P5
R_B_SD5_3
J8
R_B_SD5_4
P10
R_B_SD5_5
N2
R_B_SD5_6
N5
R_B_SD5_7
N6
R_B_SD6_0
W3
R_B_SD6_1
V1
R_B_SD6_2
T2
R_B_SD6_3
T1
R_B_SD6_4
T6
R_B_SD6_5
U4
R_B_SD6_6
R7
R_B_SD6_7
R8
R_B_SD7_0
M1
R_B_SD7_1
J1
R_B_SD7_2
M5
R_B_SD7_3
L10
R_B_SD7_4
K1
R_B_SD7_5
L2
R_B_SD7_6
M6
R_B_SD7_7
M8
R_B_SD8_0
AD9
R_B_SD8_1
AD8
R_B_SD8_2
AG4
R_B_SD8_3
AD7
R_B_SD8_4
V12
R_B_SD8_5
Y12
R_B_SD8_6
AE7
R_B_SD8_7
AG3
WE#
AB1
WE#
RAS#
AC1
CAS#
W8
A_CKE
AB8
B_CKE
AE4
R_CS_0
U8
CS0
R_CS_1
U10
CS1
R_CS_2
W7
CS2
R_CS_3
V8
CS3
R_CS_4
AE1
CS4
R_CS_5
AD1
CS5
CS_0
R342 39.2
R344 39.2
R336 39.2
R339 39.2
R917 39.2
R918 39.2
CS_1
CS_2
CS_3
CS_4
CS_5
CS_0 17,18
CS_1 17,18
CS_2 17,18
CS_3 17,18
CS_4 19
CS_5 19
AD20
AG19
A_DQS0_0
A_DQS1_0
A_DQS0_1
A_DQS1_1
B_DQS0_0
B_DQS1_0
B_DQS0_1
MA12
MA13
MA14
AA20
AF20
AB21
V10
AA7
AB6
R_B_DQS0_0
R_B_DQS0_1
R_B_DQS1_0
R_B_SD0_[0..7] 20
R_B_SD1_[0..7] 20
R_B_SD2_[0..7] 20
R_B_SD3_[0..7] 20
R_B_SD4_[0..7] 20
R_B_SD5_[0..7] 20
R_B_SD6_[0..7] 20
R_B_SD7_[0..7] 20
R_B_SD8_[0..7] 20
R_B_DQS0_[0..1] 20
R_B_DQS1_[0..1] 20
R_B_DQS2_[0..1] 20
R_B_DQS3_[0..1] 20
R_B_DQS4_[0..1] 20
R_B_DQS5_[0..1] 20
R_B_DQS6_[0..1] 20
R_B_DQS7_[0..1] 20
R_B_DQS8_[0..1] 20
R_A_SD0_[0..7] 20
R_A_SD1_[0..7] 20
R_A_SD2_[0..7] 20
R_A_SD3_[0..7] 20
R_A_SD4_[0..7] 20
R_A_SD5_[0..7] 20
R_A_SD6_[0..7] 20
R_A_SD7_[0..7] 20
R_A_SD8_[0..7] 20
R_A_DQS0_[0..1] 20
R_A_DQS1_[0..1] 20
R_A_DQS2_[0..1] 20
R_A_DQS3_[0..1] 20
R_A_DQS4_[0..1] 20
R_A_DQS5_[0..1] 20
R_A_DQS6_[0..1] 20
R_A_DQS7_[0..1] 20
R_A_DQS8_[0..1] 20
R_B_SD0_[0..7]
R_B_SD1_[0..7]
R_B_SD2_[0..7]
R_B_SD3_[0..7]
R_B_SD4_[0..7]
R_B_SD5_[0..7]
R_B_SD6_[0..7]
R_B_SD7_[0..7]
R_B_SD8_[0..7]
R_B_DQS0_[0..1]
R_B_DQS1_[0..1]
R_B_DQS2_[0..1]
R_B_DQS3_[0..1]
R_B_DQS4_[0..1]
R_B_DQS5_[0..1]
R_B_DQS6_[0..1]
R_B_DQS7_[0..1]
R_B_DQS8_[0..1]
R_A_SD0_[0..7]
R_A_SD1_[0..7]
R_A_SD2_[0..7]
R_A_SD3_[0..7]
R_A_SD4_[0..7]
R_A_SD5_[0..7]
R_A_SD6_[0..7]
R_A_SD7_[0..7]
R_A_SD8_[0..7]
R_A_DQS0_[0..1]
R_A_DQS1_[0..1]
R_A_DQS2_[0..1]
R_A_DQS3_[0..1]
R_A_DQS4_[0..1]
R_A_DQS5_[0..1]
R_A_DQS6_[0..1]
R_A_DQS7_[0..1]
R_A_DQS8_[0..1]
MA[0..14]
MA[0..14] 17,18,19,21
A_CKE
A_CKE 17,19,21
B_CKE
B_CKE 18,19,21
WE#
WE# 17,18,19,21
RAS#
RAS# 17,18,19,21
CAS#
CAS# 17,18,19,21
Micro Star Restricted Secret
Title
CMIC DDR Interface
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
14 68
of
Rev
0D
Page 15
A
B
C
D
E
AGND VDD_2.5
C898
4.7u
AVDD
RSVD
AB12
AB11
AB7
AB5
AB3
AC26
AC24
AC22
AC17
AC16
AC14
AC7
AC5
AC3
AD12
AD11
AE17
AE16
AF24
AF21
AF12
AF11
AF4
E26
G23
K19
K22
K24
K26
L22
L24
L26
M17
M19
P17
P19
P24
T17
T19
U22
U24
U26
V19
V24
V26
AB27
AC27 T16
U9
W17
AG18
AD24
U19
VCC25
VDD_IMB
CMIC_AVDD
MEM_VREF_CMIC
CMIC_DCOMP
CMIC_RSVD
MEM_VREF_CMIC
22u
MEM_VREF_CMIC
CMIC_RSVD 16
MEM_VREF_CMIC
V23
V25
W9
W11
W13
W15
W19
W21
W23
W25
AA10
AA11
AA14
AB17
AB18
AC2
AC4
AC6
AC10
AC11
AC21
AC23
AC25
AD2
AD4
AD6
AD17
AD18
AD21
AD23
AD25
AE10
AE11
AF7
AF14
AF17
AF18
AG1
AG27
R12
R14
R16
R19
T11
T13
T15
T18
U12
U14
U16
V21
P11
P13
P15
P22
VCC_P
C283
1u
VCC_P
SC20
0.1u
Put on Solder Side
U20D
GND91
GND92
GND93
GND94
GND95
GND96
GND98
GND99
GND100
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120
GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131
V5
GND133
V7
GND135
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
U3
GND80
U5
GND81
U7
GND83
GND85
GND86
GND87
V3
GND89
GND90
P6
GND65
GND66
GND67
GND68
GND69
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND71
GND70
GND136
GND137 GND139
A1
A27
B5
B6
B10
B11
B14
C17
C18
C25
D5
D6
D10
D11
D14
D21
D23
K16
E2
E17
E18
E22
E24
F10
F11
F14
G7
G17
G18
G26
J2
J4
J6
J9
J11
J13
J15
J17
J19
J21
J23
J25
K2
K4
K6
K21
K23
K25
L9
L12
L14
L16
L19
M11
M13
M15
M18
N9
N12
N14
N16
N19
P2
R9
P26
AA17
D25 J7
VCC25
R321
4.7
1 2
CMIC_DCOMP
R303 255
L17
47u
MEM_VREF_CMIC
+
EC54
10u
MEM_VREF_CMIC
C258
C255
1u
0.1u
VCC25
VCC25
CMIC_AVDD
C254
1u
R332
100
R327
100
CMIC-WS
VCC_P
1 2
+
EC64
C299
C300
C301
1u
1u
SC21
22u
0.01u
SC50
470u/4V
1u
22u
SC51
VCC25
SC1
0.1u
SC2
0.1u
Put on Solder Side
SC5
0.01u
SC4
0.01u
22u
C907
4 4
3 3
VCC_P
VCC25
2 2
U20E
B2
VTT
B8
VTT
B16
VTT
B17
VTT
B22
VTT
B24
VTT
C4
VTT
C5
VTT
C11
VTT
C12
VTT
C21
VTT
C23
VTT
D16
VTT
D17
VTT
D26
VTT
E4
VTT
E5
VTT
E8
VTT
E11
VTT
E12
VTT
F16
VTT
F17
VTT
G4
VTT
G11
VTT
G12
VTT
G20
VTT
J10
VTT
J12
VTT
J14
VTT
J16
VTT
J18
VTT
K9
VDD_2.5
K7
VDD_2.5
K5
VDD_2.5
K3
VDD_2.5
L15
VDD_2.5
L13
VDD_2.5
L11
VDD_2.5
L7
VDD_2.5
L5
VDD_2.5
L3
VDD_2.5
M16
VDD_2.5
M14
VDD_2.5
M12
VDD_2.5
M9
VDD_2.5
N15
VDD_2.5
N13
VDD_2.5
N11
VDD_2.5
P16
VDD_2.5
P14
VDD_2.5
P12
VDD_2.5
P9
VDD_2.5
P4
VDD_2.5
R15
VDD_2.5
R13
VDD_2.5
T14
VDD_2.5
T12
VDD_2.5
T9
VDD_2.5
U15
VDD_2.5
U13
VDD_2.5
U11
VDD_2.5
V22
VDD_2.5
V9
VDD_2.5
V6
VDD_2.5
V4
VDD_2.5
V2
VDD_2.5
W18
VDD_2.5
W16
VDD_2.5
W14
VDD_2.5
W12
VDD_2.5
W10
VDD_2.5
W6
VDD_2.5
W4
VDD_2.5
W2
VDD_2.5
Y25
VDD_2.5
Y23
VDD_2.5
AA16
VDD_2.5
AA15
VDD_2.5
AB26
VDD_2.5
AB24
VDD_2.5
AB22
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_2.5
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
VDD_IMB
MEM_VREF
MEM_VREF
DCOMP
T_IMB_VREF
CMIC-WS
VDD_IMB
C265
C298
1000p-0805
C279
0.1u
0.1u
VDD_IMB
SC3
SC19
SC6
1 1
0.01u C908
0.1u
0.1u
C900
4.7u
PUT THESE C AS CLOSE CMIC AS POSSIBLE
C897
4.7u
Put on Solder Side
Micro Star Restricted Secret
Title
CMIC Power
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
15 68
of
Rev
0D
Page 16
A
B
C
D
E
1 : 5 CLOCKs
0 : 6 CLOCKs
VCC25
R286
2.7K
DETERMINISTIC_IMB
R285
X_R
Do not stuff
CMIC_RSVD 15
VCC25
R265
2.7K
R264
X_R
Do not stuff
( Default )
CMIC_RSVD
IMB_R_W_PTR_DLY
VCC25
R304
2.7K
Do not stuff
R313
X_R
4 4
VCC25
R275
X_8.2K
COMP_IMB
R292
2.7K
COMPATIBILITY IMB
NOT STUFF R292: A_IMB is Compatibility Bus
STUFF R292: Thin IMB is Compatibility Bus ( Default )
3 3
DEFER ENABLE/DISABLE
NOT STUFF R276: Defer Enabled ( Default )
STUFF R276: Defer Disabled
2 2
VCC25
VCC25
R263
8.2K
CMIC_DEFER_EN
R276
X_1K
R259
X_R
DO NOT STUFF
CMIC_PLL_EN#
R261
CMIC PLL ENABLE/DISABLE
2.7K
1: APLL Disabled
0: APLL Enabled
( Default )
CMIC_PLL_EN#
CMIC_DEFER_EN
COMP_IMB
IOQ_DEPTH
IMB_TRAINING
IMB_CRC_PARITY CMIC_ALERT#
IMB_R_W_PTR_DLY TESTMODE#
POWERGOOD_CMIC 13,59
VCC25
R287
X_8.2K
IOQ_DEPTH
R298
1K
IOQ DEPTH
NOT STUFF R298: IOQ Depth 1
STUFF R298: IOQ Depth 12 ( Default
)
U15
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
74LVC244A-SO20
TSSOP-20
VCC25
C209
0.1U
CMIC_FATAL#
18
1Y1
WRMRST#
16
1Y2
MEMOFF#
14
1Y3
MEMOFFACK#
12
1Y4
RCC_SCL DETERMINISTIC_IMB
9
2Y1
RCC_SDA
7
2Y2
5
2Y3
3
2Y4
20
VDD
10
GND
VCC25
R273
2.7K
IMB_CRC_PARITY
R272
X_R
Do not stuff
VCC25
CMIC_FATAL# 12,41
WRMRST# 12
MEMOFF# 12,40
MEMOFFACK# 12
RCC_SCL 13,25,27,49,51,52,54
RCC_SDA 13,25,27,49,51,52,54
CMIC_ALERT# 12,41
TESTMODE# 13
A/B_IMB CRC or PARITY
0 : PARITY is enabled for A & B IMB buses (Default )
1 : CRC is enabled for A & B IMB buses
( In final version Use CRC on IMB buses )
VCC25
R281
2.7K
IMB_TRAINING
R282
X_R
Do not stuff
IMB_TRAINING
0 : IMB TRAINING Disabled
1 : IMB TRAINING Enabled
( Default )
IMB_READ/WRITE POINTER DLY
IMB - DETERMINISTIC/ NON
DETERMINISTIC
0 : Deterministic IMB
1 : Non Deterministic
IMB (Default )
Thin IMB FREQ.
1 = 100 MHz 2X
0 = 200 MHz 2X
1 1
Micro Star Restricted Secret
Title
CMIC Strapping Option
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
16 68
of
Rev
0D
Page 17
A
B
C
D
E
VCC25 VCC25
+
EC155
+
EC156
1000U
11
665850
4234267418
89
MA0
48
A0
MA1
4 4
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
CS_0
CS_0 14,18 CS_2 14,18
CS_1 CS_3
CS_1 14,18
RAS#
CAS#
WE#
CLK0_P 23
CLK0_N 23
A_CKE
SSTLREF_D1 SSTLREF_D1
VCC25
MEMB_SCL
MEMB_SCL 19,23,54
MEMB_SDA
3 3
MEMB_SDA 19,23,54
R392 330
DIMM_WP#1 DIMM_WP#2
DIMM_RST#
VCC25
DIMM_WP#1
R370 4.7K
DIMM_WP#2
R375 4.7K
2 2
VCC25 VCC25
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
GND
GND
GND
GND
GND
GND
GND
I2C ADD. - 0
81
GND
GND
GND
Pair 0
A_SD0_[0..7] 19,20,21
A_SD1_[0..7] 19,20,21
A_SD2_[0..7] 19,20,21
A_SD3_[0..7] 19,20,21
A_SD4_[0..7] 19,20,21
A_SD5_[0..7] 19,20,21
A_SD6_[0..7] 19,20,21
A_SD7_[0..7] 19,20,21
A_SD8_[0..7] 19,20,21
A_DQS0_[0..1] 19,20,21
A_DQS1_[0..1] 19,20,21
A_DQS2_[0..1] 19,20,21
A_DQS3_[0..1] 19,20,21
A_DQS4_[0..1] 19,20,21
1 1
A_DQS5_[0..1] 19,20,21
A_DQS6_[0..1] 19,20,21
A_DQS7_[0..1] 19,20,21
A_DQS8_[0..1] 19,20,21
116
100
93
GND
GND
GND
A_SD0_[0..7]
A_SD1_[0..7]
A_SD2_[0..7]
A_SD3_[0..7]
A_SD4_[0..7]
A_SD5_[0..7]
A_SD6_[0..7]
A_SD7_[0..7]
A_SD8_[0..7]
A_DQS0_[0..1]
A_DQS1_[0..1]
A_DQS2_[0..1]
A_DQS3_[0..1]
A_DQS4_[0..1]
A_DQS5_[0..1]
A_DQS6_[0..1]
A_DQS7_[0..1]
A_DQS8_[0..1]
3
139
132
124
145
176
GND
GND
GND
GND
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
Slave Address : A0h
160
152
DIMM1
GND
GND
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0
ECC1
ECC2
ECC3
DQS8
ECC4
ECC5
ECC6
ECC7
A_SD0_0
2
D0
A_SD0_1
4
D1
A_SD0_2
6
D2
A_SD0_3
8
D3
A_DQS0_0
5
A_DQS0_1
97
A_SD0_4
94
D4
A_SD0_5
95
D5
A_SD0_6
98
D6
A_SD0_7
99
D7
A_SD1_0
12
D8
A_SD1_1
13
D9
A_SD1_2
19
D10
A_SD1_3
20
D11
A_DQS1_0
14
A_DQS1_1
107
A_SD1_4
105
D12
A_SD1_5
106
D13
A_SD1_6
109
D14
A_SD1_7
110
D15
A_SD2_0
23
D16
A_SD2_1
24
D17
A_SD2_2
28
D18
A_SD2_3
31
D19
A_DQS2_0
25
A_DQS2_1
119
A_SD2_4
114
D20
A_SD2_5
117
D21
A_SD2_6
121
D22
A_SD2_7
123
D23
A_SD3_0
33
D24
A_SD3_1
35
D25
A_SD3_2
39
D26
A_SD3_3
40
D27
A_DQS3_0
36
A_DQS3_1
129
A_SD3_4
126
D28
A_SD3_5
127
D29
A_SD3_6
131
D30
A_SD3_7
133
D31
A_SD4_0
53
D32
A_SD4_1
55
D33
A_SD4_2
57
D34
A_SD4_3
60
D35
A_DQS4_0
A_DQS4_1
149
A_SD4_4
146
D36
A_SD4_5
147
D37
A_SD4_6
150
D38
A_SD4_7
151
D39
A_SD5_0
61
D40
A_SD5_1
64
D41
A_SD5_2
68
D42
A_SD5_3
69
D43
A_DQS5_0
67
A_DQS5_1
159
A_SD5_4
153
D44
A_SD5_5
155
D45
A_SD5_6
161
D46
A_SD5_7
162
D47
A_SD6_0
72
D48
A_SD6_1
73
D49
A_SD6_2
79
D50
A_SD6_3
80
D51
A_DQS6_0
78
A_DQS6_1
169
A_SD6_4
165
D52
A_SD6_5
166
D53
A_SD6_6
170
D54
A_SD6_7
171
D55
A_SD7_0
83
D56
A_SD7_1
84
D57
A_SD7_2
87
D58
A_SD7_3
88
D59
A_DQS7_0
86
A_DQS7_1
177
A_SD7_4
174
D60
A_SD7_5
175
D61
A_SD7_6
178
D62
A_SD7_7
179
D63
A_SD8_0
44
A_SD8_1
45
A_SD8_2
49
A_SD8_3
51
A_DQS8_0
47
A_DQS8_1
140
A_SD8_4
134
A_SD8_5
135
A_SD8_6
142
A_SD8_7
144
VCC25
CS_3 14,18
CLK1_P 23
CLK1_N 23
A_CKE
VCC25
MEMB_SCL
MEMB_SDA
R402 330
R401 4.7K
DIMM_RST#
MA[0..14] 14,18,19,21
A_CKE 14,19,21
WE# 14,18,19,21
RAS# 14,18,19,21
CAS# 14,18,19,21
DIMM_WP#2 18
DIMM_WP#1 18
DIMM_RST# 18,19,60
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
CS_2
RAS#
CAS#
WE#
11
665850
124
116
100
93
4234267418
89
48
A0
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
MA[0..14]
A_CKE
WE#
RAS#
CAS#
DIMM_WP#2
DIMM_WP#1
DIMM_RST#
GND
GND
GND
GND
GND
GND
GND
GND
I2C ADD. - 2
Pair 1
VCC25
R125
100
R115
100
81
GND
GND
GND
GND
C90
1000P-0805
C89
1000P-0805
GND
GND
1000U
3
139
132
145
160
176
152
GND
GND
GND
GND
GND
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
Slave Address : A4h
C88
1U
SSTLREF_D1
C74
C82
1U
0.1U
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0
ECC1
ECC2
ECC3
DQS8
ECC4
ECC5
ECC6
ECC7
DIMM3
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
A_SD0_0
2
A_SD0_1
4
A_SD0_2
6
A_SD0_3
8
A_DQS0_0
5
A_DQS0_1
97
A_SD0_4
94
A_SD0_5
95
A_SD0_6
98
A_SD0_7
99
A_SD1_0
12
A_SD1_1
13
A_SD1_2
19
A_SD1_3
20
A_DQS1_0
14
A_DQS1_1
107
A_SD1_4
105
A_SD1_5
106
A_SD1_6
109
A_SD1_7
110
A_SD2_0
23
A_SD2_1
24
A_SD2_2
28
A_SD2_3
31
A_DQS2_0
25
A_DQS2_1
119
A_SD2_4
114
A_SD2_5
117
A_SD2_6
121
A_SD2_7
123
A_SD3_0
33
A_SD3_1
35
A_SD3_2
39
A_SD3_3
40
A_DQS3_0
36
A_DQS3_1
129
A_SD3_4
126
A_SD3_5
127
A_SD3_6
131
A_SD3_7
133
A_SD4_0
53
A_SD4_1
55
A_SD4_2
57
A_SD4_3
60
A_DQS4_0
A_DQS4_1
149
A_SD4_4
146
A_SD4_5
147
A_SD4_6
150
A_SD4_7
151
A_SD5_0
61
A_SD5_1
64
A_SD5_2
68
A_SD5_3
69
A_DQS5_0
67
A_DQS5_1
159
A_SD5_4
153
A_SD5_5
155
A_SD5_6
161
A_SD5_7
162
A_SD6_0
72
A_SD6_1
73
A_SD6_2
79
A_SD6_3
80
A_DQS6_0
78
A_DQS6_1
169
A_SD6_4
165
A_SD6_5
166
A_SD6_6
170
A_SD6_7
171
A_SD7_0
83
A_SD7_1
84
A_SD7_2
87
A_SD7_3
88
A_DQS7_0
86
A_DQS7_1
177
A_SD7_4
174
A_SD7_5
175
A_SD7_6
178
A_SD7_7
179
A_SD8_0
44
A_SD8_1
45
A_SD8_2
49
A_SD8_3
51
A_DQS8_0
47
A_DQS8_1
140
A_SD8_4
134
A_SD8_5
135
A_SD8_6
142
A_SD8_7
144
VCC25
VCC25
VCC25
VCC25
VCC25
C97
1000P-0805
C140
1000P-0805
C196
1000P-0805
C230
1000P-0805
C341
1000P-0805
C101
1000P-0805
C156
1000P-0805
C195
1000P-0805
C249
1000P-0805
C123
1000P-0805
C177
1000P-0805
C210
1000P-0805
C263
1000P-0805
C287
1000P-0805
C138
1000P-0805
C211
1000P-0805
C212
1000P-0805
C285
1000P-0805
C323
1000P-0805
Micro Star Restricted Secret
Title
DIMM1 & DIMM3
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
17 68
of
Rev
0D
Page 18
A
B
C
D
E
VCC25 VCC25
+
EC157
1000U
11
665850
4234267418
89
4 4
3 3
2 2
MEMA_SCL 19,54
MEMA_SDA 19,54
MA0
48
GND
A0
MA1
43
A1
MA2
41
A2
MA3
130
A3
MA4
37
A4
MA5
32
A5
MA6
125
A6
MA7
29
A7
MA8
122
A8
MA9
27
A9
MA10
141
A10
MA11
118
A11
MA12
115
A12
MA13
59
BA0
MA14
52
BA1
CS_0 14,17
CS_1 14,17
CLK2_P 23
CLK2_N 23
VCC25 VCC25
R374 330
DIMM_WP#1
DIMM_RST#
157
CS0_
158
CS1_
RAS#
154
RAS_
CAS#
65
CAS_
WE#
63
WE_
137
CLK0_P
138
B_CKE
SSTLREF_D2
MEMA_SCL
MEMA_SDA
VCC25 VCC25
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
81
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I2C ADD. - 0 I2C ADD. - 2
Pair 0 Pair 1
B_SD0_[0..7] 19,20,21
B_SD1_[0..7] 19,20,21
B_SD2_[0..7] 19,20,21
B_SD3_[0..7] 19,20,21
B_SD4_[0..7] 19,20,21
B_SD5_[0..7] 19,20,21
B_SD6_[0..7] 19,20,21
B_SD7_[0..7] 19,20,21
B_SD8_[0..7] 19,20,21
B_DQS0_[0..1] 19,20,21
1 1
A
B_DQS1_[0..1] 19,20,21
B_DQS2_[0..1] 19,20,21
B_DQS3_[0..1] 19,20,21
B_DQS4_[0..1] 19,20,21
B_DQS5_[0..1] 19,20,21
B_DQS6_[0..1] 19,20,21
B_DQS7_[0..1] 19,20,21
B_DQS8_[0..1] 19,20,21
B_SD0_[0..7]
B_SD1_[0..7]
B_SD2_[0..7]
B_SD3_[0..7]
B_SD4_[0..7]
B_SD5_[0..7]
B_SD6_[0..7]
B_SD7_[0..7]
B_SD8_[0..7]
B_DQS0_[0..1]
B_DQS1_[0..1]
B_DQS2_[0..1]
B_DQS3_[0..1]
B_DQS4_[0..1]
B_DQS5_[0..1]
B_DQS6_[0..1]
B_DQS7_[0..1]
B_DQS8_[0..1]
B
3
139
132
124
116
100
93
145
160
176
152
DIMM2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0
ECC1
ECC2
ECC3
DQS8
ECC4
ECC5
ECC6
ECC7
B_SD0_0
2
D0
B_SD0_1
4
D1
B_SD0_2
6
D2
B_SD0_3
8
D3
B_DQS0_0
5
B_DQS0_1
97
B_SD0_4
94
D4
B_SD0_5
95
D5
B_SD0_6
98
D6
B_SD0_7
99
D7
B_SD1_0
12
D8
B_SD1_1
13
D9
B_SD1_2
19
D10
B_SD1_3
20
D11
B_DQS1_0
14
B_DQS1_1
107
B_SD1_4
105
D12
B_SD1_5
106
D13
B_SD1_6
109
D14
B_SD1_7
110
D15
B_SD2_0
23
D16
B_SD2_1
24
D17
B_SD2_2
28
D18
B_SD2_3
31
D19
B_DQS2_0
25
B_DQS2_1
119
B_SD2_4
114
D20
B_SD2_5
117
D21
B_SD2_6
121
D22
B_SD2_7
123
D23
B_SD3_0
33
D24
B_SD3_1
35
D25
B_SD3_2
39
D26
B_SD3_3
40
D27
B_DQS3_0
36
B_DQS3_1
129
B_SD3_4
126
D28
B_SD3_5
127
D29
B_SD3_6
131
D30
B_SD3_7
133
D31
B_SD4_0
53
D32
B_SD4_1
55
D33
B_SD4_2
57
D34
B_SD4_3
60
D35
B_DQS4_0
B_DQS4_1
149
B_SD4_4
146
D36
B_SD4_5
147
D37
B_SD4_6
150
D38
B_SD4_7
151
D39
B_SD5_0
61
D40
B_SD5_1
64
D41
B_SD5_2
68
D42
B_SD5_3
69
D43
B_DQS5_0
67
B_DQS5_1
159
B_SD5_4
153
D44
B_SD5_5
155
D45
B_SD5_6
161
D46
B_SD5_7
162
D47
B_SD6_0
72
D48
B_SD6_1
73
D49
B_SD6_2
79
D50
B_SD6_3
80
D51
B_DQS6_0
78
B_DQS6_1
169
B_SD6_4
165
D52
B_SD6_5
166
D53
B_SD6_6
170
D54
B_SD6_7
171
D55
B_SD7_0
83
D56
B_SD7_1
84
D57
B_SD7_2
87
D58
B_SD7_3
88
D59
B_DQS7_0
86
B_DQS7_1
177
B_SD7_4
174
D60
B_SD7_5
175
D61
B_SD7_6
178
D62
B_SD7_7
179
D63
B_SD8_0
44
B_SD8_1
45
B_SD8_2
49
B_SD8_3
51
B_DQS8_0
47
B_DQS8_1
140
B_SD8_4
134
B_SD8_5
135
B_SD8_6
142
B_SD8_7
144
Slave Address : A0h Slave Address : A4h
VCC25
CS_2 14,17
CS_3 14,17
CLK3_P 23
CLK3_N 23
+
1000U
R432 4.7K
R458 330
DIMM_WP#2
DIMM_RST#
DIMM_WP#2 17
DIMM_WP#1 17
DIMM_RST# 17,19,60
C
EC158
11
665850
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
RAS#
CAS#
WE#
B_CKE
SSTLREF_D2
MEMA_SCL
MEMA_SDA
4234267418
48
GND
GND
GND
GND
GND
GND
GND
GND
GND
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
VCC25
MA[0..14]
MA[0..14] 14,17,19,21
B_CKE
B_CKE 14,19,21
WE#
WE# 14,17,19,21
RAS#
RAS# 14,17,19,21
CAS#
CAS# 14,17,19,21
DIMM_WP#2
DIMM_WP#1
DIMM_RST#
R112
100
R117
100
3
139
132
124
116
100
93
89
81
145
160
176
152
DIMM4
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C85
1000P-0805
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0
ECC1
ECC2
ECC3
DQS8
ECC4
ECC5
ECC6
ECC7
B_SD0_0
2
D0
B_SD0_1
4
D1
B_SD0_2
6
D2
B_SD0_3
8
D3
B_DQS0_0
5
B_DQS0_1
97
B_SD0_4
94
D4
B_SD0_5
95
D5
B_SD0_6
98
D6
B_SD0_7
99
D7
B_SD1_0
12
D8
B_SD1_1
13
D9
B_SD1_2
19
D10
B_SD1_3
20
D11
B_DQS1_0
14
B_DQS1_1
107
B_SD1_4
105
D12
B_SD1_5
106
D13
B_SD1_6
109
D14
B_SD1_7
110
D15
B_SD2_0
23
D16
B_SD2_1
24
D17
B_SD2_2
28
D18
B_SD2_3
31
D19
B_DQS2_0
25
B_DQS2_1
119
B_SD2_4
114
D20
B_SD2_5
117
D21
B_SD2_6
121
D22
B_SD2_7
123
D23
B_SD3_0
33
D24
B_SD3_1
35
D25
B_SD3_2
39
D26
B_SD3_3
40
D27
B_DQS3_0
36
B_DQS3_1
129
B_SD3_4
126
D28
B_SD3_5
127
D29
B_SD3_6
131
D30
B_SD3_7
133
D31
B_SD4_0
53
D32
B_SD4_1
55
D33
B_SD4_2
57
D34
B_SD4_3
60
D35
B_DQS4_0
B_DQS4_1
149
B_SD4_4
146
D36
B_SD4_5
147
D37
B_SD4_6
150
D38
B_SD4_7
151
D39
B_SD5_0
61
D40
B_SD5_1
64
D41
B_SD5_2
68
D42
B_SD5_3
69
D43
B_DQS5_0
67
B_DQS5_1
159
B_SD5_4
153
D44
B_SD5_5
155
D45
B_SD5_6
161
D46
B_SD5_7
162
D47
B_SD6_0
72
D48
B_SD6_1
73
D49
B_SD6_2
79
D50
B_SD6_3
80
D51
B_DQS6_0
78
B_DQS6_1
169
B_SD6_4
165
D52
B_SD6_5
166
D53
B_SD6_6
170
D54
B_SD6_7
171
D55
B_SD7_0
83
D56
B_SD7_1
84
D57
B_SD7_2
87
D58
B_SD7_3
88
D59
B_DQS7_0
86
B_DQS7_1
177
B_SD7_4
174
D60
B_SD7_5
175
D61
B_SD7_6
178
D62
B_SD7_7
179
D63
B_SD8_0
44
B_SD8_1
45
B_SD8_2
49
B_SD8_3
51
B_DQS8_0
47
B_DQS8_1
140
B_SD8_4
134
B_SD8_5
135
B_SD8_6
142
B_SD8_7
144
C83
1U
VCC25
VCC25
VCC25
VCC25
VCC25
C100
1000P-0805
C139
1000P-0805
C175
1000P-0805
C247
1000P-0805
C286
1000P-0805
C124
1000P-0805
C173
1000P-0805
C231
1000P-0805
C276
1000P-0805
C264
1000P-0805
C129
1000P-0805
C155
1000P-0805
C250
1000P-0805
C275
1000P-0805
C229
1000P-0805
C157
1000P-0805
C194
1000P-0805
C268
1000P-0805
C278
1000P-0805
C329
1000P-0805
SSTLREF_D2
C91
C73
C78
1000P-0805
1U
0.1U
Micro Star Restricted Secret
Title
DIMM2 & DIMM4
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
18 68
of
Rev
0D
Page 19
A
4 4
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
CS_4
CS_4 14
CS_5
CS_5 14
RAS#
CAS#
WE#
CLK4_P 23
CLK4_N 23
A_CKE
SSTLREF_D3
3 3
VCC25 VCC25
MEMB_SCL 17,23,54
MEMB_SDA 17,23,54
R923 330
R925 4.7K
VCC25
MEMB_SCL
MEMB_SDA
DIMM_WP#3
DIMM_RST#
VCC25
DIMM_WP#3
R927 4.7K
VCC25
2 2
1 1
A
11
48
A0
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
B
116
100
93
GND
GND
GND
A_SD0_[0..7]
A_SD1_[0..7]
A_SD2_[0..7]
A_SD3_[0..7]
A_SD4_[0..7]
A_SD5_[0..7]
A_SD6_[0..7]
A_SD7_[0..7]
A_SD8_[0..7]
A_DQS0_[0..1]
A_DQS1_[0..1]
A_DQS2_[0..1]
A_DQS3_[0..1]
A_DQS4_[0..1]
A_DQS5_[0..1]
A_DQS6_[0..1]
A_DQS7_[0..1]
A_DQS8_[0..1]
3
139
132
124
145
160
176
GND
GND
GND
GND
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
Slave Address : A8h
152
DIMM5
GND
GND
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0
ECC1
ECC2
ECC3
DQS8
ECC4
ECC5
ECC6
ECC7
A_SD0_0
2
D0
A_SD0_1
4
D1
A_SD0_2
6
D2
A_SD0_3
8
D3
A_DQS0_0
5
A_DQS0_1
97
A_SD0_4
94
D4
A_SD0_5
95
D5
A_SD0_6
98
D6
A_SD0_7
99
D7
A_SD1_0
12
D8
A_SD1_1
13
D9
A_SD1_2
19
D10
A_SD1_3
20
D11
A_DQS1_0
14
A_DQS1_1
107
A_SD1_4
105
D12
A_SD1_5
106
D13
A_SD1_6
109
D14
A_SD1_7
110
D15
A_SD2_0
23
D16
A_SD2_1
24
D17
A_SD2_2
28
D18
A_SD2_3
31
D19
A_DQS2_0
25
A_DQS2_1
119
A_SD2_4
114
D20
A_SD2_5
117
D21
A_SD2_6
121
D22
A_SD2_7
123
D23
A_SD3_0
33
D24
A_SD3_1
35
D25
A_SD3_2
39
D26
A_SD3_3
40
D27
A_DQS3_0
36
A_DQS3_1
129
A_SD3_4
126
D28
A_SD3_5
127
D29
A_SD3_6
131
D30
A_SD3_7
133
D31
A_SD4_0
53
D32
A_SD4_1
55
D33
A_SD4_2
57
D34
A_SD4_3
60
D35
A_DQS4_0
A_DQS4_1
149
A_SD4_4
146
D36
A_SD4_5
147
D37
A_SD4_6
150
D38
A_SD4_7
151
D39
A_SD5_0
61
D40
A_SD5_1
64
D41
A_SD5_2
68
D42
A_SD5_3
69
D43
A_DQS5_0
67
A_DQS5_1
159
A_SD5_4
153
D44
A_SD5_5
155
D45
A_SD5_6
161
D46
A_SD5_7
162
D47
A_SD6_0
72
D48
A_SD6_1
73
D49
A_SD6_2
79
D50
A_SD6_3
80
D51
A_DQS6_0
78
A_DQS6_1
169
A_SD6_4
165
D52
A_SD6_5
166
D53
A_SD6_6
170
D54
A_SD6_7
171
D55
A_SD7_0
83
D56
A_SD7_1
84
D57
A_SD7_2
87
D58
A_SD7_3
88
D59
A_DQS7_0
86
A_DQS7_1
177
A_SD7_4
174
D60
A_SD7_5
175
D61
A_SD7_6
178
D62
A_SD7_7
179
D63
A_SD8_0
44
A_SD8_1
45
A_SD8_2
49
A_SD8_3
51
A_DQS8_0
47
A_DQS8_1
140
A_SD8_4
134
A_SD8_5
135
A_SD8_6
142
A_SD8_7
144
665850
4234267418
89
81
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pair 2
A_SD0_[0..7] 17,20,21
A_SD1_[0..7] 17,20,21
A_SD2_[0..7] 17,20,21
A_SD3_[0..7] 17,20,21
A_SD4_[0..7] 17,20,21
A_SD5_[0..7] 17,20,21
A_SD6_[0..7] 17,20,21
A_SD7_[0..7] 17,20,21
A_SD8_[0..7] 17,20,21
A_DQS0_[0..1] 17,20,21
A_DQS1_[0..1] 17,20,21
A_DQS2_[0..1] 17,20,21
A_DQS3_[0..1] 17,20,21
A_DQS4_[0..1] 17,20,21
A_DQS5_[0..1] 17,20,21
A_DQS6_[0..1] 17,20,21
A_DQS7_[0..1] 17,20,21
A_DQS8_[0..1] 17,20,21
B
MEMA_SCL 18,54
MEMA_SDA 18,54
MA[0..14] 14,17,18,21
A_CKE 14,17,21
WE# 14,17,18,21
RAS# 14,17,18,21
CAS# 14,17,18,21
DIMM_WP#2 17,18
DIMM_WP#1 17,18
DIMM_RST# 17,18,60
MEMA_SCL
MEMA_SDA
CLK5_P 23
CLK5_N 23
VCC25
R924 330
DIMM_WP#3
R926
DIMM_RST#
MA[0..14]
A_CKE
WE#
RAS#
CAS#
DIMM_WP#2
DIMM_WP#1
DIMM_RST#
C
11
665850
4234267418
MA0
48
A0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
CS_4
CS_5
RAS#
CAS#
WE#
B_CKE
SSTLREF_D3
MEMA_SCL
MEMA_SDA
4.7K
VCC25
C
GND
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS0_
158
CS1_
154
RAS_
65
CAS_
63
WE_
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
10
RESET_
102 56
NC1 DQS4
101
NC2
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
75
CLK2_N_DU
76
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD
148
VDD
120
VDD
108
VDD
85
VDD
70
VDD
46
VDD
38
VDD
7
VDD
136
VDDQ
180
VDDQ
156
VDDQ
112
VDDQ
164
VDDQ
143
VDDQ
128
VDDQ
104
VDDQ
96
VDDQ
172
VDDQ
77
VDDQ
62
VDDQ
54
VDDQ
30
VDDQ
22
VDDQ
15
VDDQ
GND
GND
GND
GND
GND
GND
Pair 2
VCC25
81
GND
GND
R928
100
R929
100
D
3
139
132
124
116
100
93
89
145
160
176
152
DIMM6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM9_DQS17
DQS0
DQS1
DQS2
DQS3
DQS5
DQS6
DQS7
ECC0
ECC1
ECC2
ECC3
DQS8
ECC4
ECC5
ECC6
ECC7
B_SD0_0
2
D0
B_SD0_1
4
D1
B_SD0_2
6
D2
B_SD0_3
8
D3
B_DQS0_0
5
B_DQS0_1
97
B_SD0_4
94
D4
B_SD0_5
95
D5
B_SD0_6
98
D6
B_SD0_7
99
D7
B_SD1_0
12
D8
B_SD1_1
13
D9
B_SD1_2
19
D10
B_SD1_3
20
D11
B_DQS1_0
14
B_DQS1_1
107
B_SD1_4
105
D12
B_SD1_5
106
D13
B_SD1_6
109
D14
B_SD1_7
110
D15
B_SD2_0
23
D16
B_SD2_1
24
D17
B_SD2_2
28
D18
B_SD2_3
31
D19
B_DQS2_0
25
B_DQS2_1
119
B_SD2_4
114
D20
B_SD2_5
117
D21
B_SD2_6
121
D22
B_SD2_7
123
D23
B_SD3_0
33
D24
B_SD3_1
35
D25
B_SD3_2
39
D26
B_SD3_3
40
D27
B_DQS3_0
36
B_DQS3_1
129
B_SD3_4
126
D28
B_SD3_5
127
D29
B_SD3_6
131
D30
B_SD3_7
133
D31
B_SD4_0
53
D32
B_SD4_1
55
D33
B_SD4_2
57
D34
B_SD4_3
60
D35
B_DQS4_0
B_DQS4_1
149
B_SD4_4
146
D36
B_SD4_5
147
D37
B_SD4_6
150
D38
B_SD4_7
151
D39
B_SD5_0
61
D40
B_SD5_1
64
D41
B_SD5_2
68
D42
B_SD5_3
69
D43
B_DQS5_0
67
B_DQS5_1
159
B_SD5_4
153
D44
B_SD5_5
155
D45
B_SD5_6
161
D46
B_SD5_7
162
D47
B_SD6_0
72
D48
B_SD6_1
73
D49
B_SD6_2
79
D50
B_SD6_3
80
D51
B_DQS6_0
78
B_DQS6_1
169
B_SD6_4
165
D52
B_SD6_5
166
D53
B_SD6_6
170
D54
B_SD6_7
171
D55
B_SD7_0
83
D56
B_SD7_1
84
D57
B_SD7_2
87
D58
B_SD7_3
88
D59
B_DQS7_0
86
B_DQS7_1
177
B_SD7_4
174
D60
B_SD7_5
175
D61
B_SD7_6
178
D62
B_SD7_7
179
D63
B_SD8_0
44
B_SD8_1
45
B_SD8_2
49
B_SD8_3
51
B_DQS8_0
47
B_DQS8_1
140
B_SD8_4
134
B_SD8_5
135
B_SD8_6
142
B_SD8_7
144
Slave Address : A8h
C710
1000P-0805
C711
1U
VCC25
VCC25
VCC25
VCC25
VCC25
C690
1000P-0805
C694
1000P-0805
C698
1000P-0805
C702
1000P-0805
C706
1000P-0805
B_SD0_[0..7] 18,20,21
B_SD1_[0..7] 18,20,21
B_SD2_[0..7] 18,20,21
B_SD3_[0..7] 18,20,21
B_SD4_[0..7] 18,20,21
B_SD5_[0..7] 18,20,21
B_SD6_[0..7] 18,20,21
B_SD7_[0..7] 18,20,21
B_SD8_[0..7] 18,20,21
B_DQS0_[0..1] 18,20,21
B_DQS1_[0..1] 18,20,21
B_DQS2_[0..1] 18,20,21
B_DQS3_[0..1] 18,20,21
B_DQS4_[0..1] 18,20,21
B_DQS5_[0..1] 18,20,21
B_DQS6_[0..1] 18,20,21
B_DQS7_[0..1] 18,20,21
B_DQS8_[0..1] 18,20,21
C691
1000P-0805
C695
1000P-0805
C699
1000P-0805
C703
1000P-0805
C707
1000P-0805
MA[0..14] 14,17,18,21
B_CKE 14,18,21
WE# 14,17,18,21
RAS# 14,17,18,21
CAS# 14,17,18,21
DIMM_WP#2 17,18
DIMM_WP#1 17,18
DIMM_RST# 17,18,60
1000P-0805
C696
1000P-0805
C700
1000P-0805
C704
1000P-0805
C708
1000P-0805
MA[0..14]
B_CKE
WE#
RAS#
CAS#
DIMM_WP#2
DIMM_WP#1
DIMM_RST#
B_SD0_[0..7]
B_SD1_[0..7]
B_SD2_[0..7]
B_SD3_[0..7]
B_SD4_[0..7]
B_SD5_[0..7]
B_SD6_[0..7]
B_SD7_[0..7]
B_SD8_[0..7]
B_DQS0_[0..1]
B_DQS1_[0..1]
B_DQS2_[0..1]
B_DQS3_[0..1]
B_DQS4_[0..1]
B_DQS5_[0..1]
B_DQS6_[0..1]
B_DQS7_[0..1]
B_DQS8_[0..1]
1000P-0805
C697
1000P-0805
C701
1000P-0805
C705
1000P-0805
C709
1000P-0805
C693
C692
E
SSTLREF_D3
C713
C712
1000P-0805
C714
0.1U
1U
Micro Star Restricted Secret
Title
DIMM5 & DIMM6
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
19 68
of
Rev
0D
Page 20
5
4
3
2
1
B_SD4_0
RN136
B_SD4_4
15
B_SD4_5
B_SD4_1
B_SD4_2
RN138
B_SD4_6
15
B_SD4_7
B_SD4_3
B_SD6_4 R_B_SD5_4
RN69
B_SD6_0
15
B_SD6_1
B_SD6_5
RN72
B_SD6_2
15
B_SD6_3
B_SD6_7
RN79
15
B_SD7_1
RN82
B_SD7_2 R_B_SD7_2
15
B_SD5_1
RN140
B_SD5_5
15
B_SD5_4
B_SD5_0
B_SD5_7
RN143
B_SD5_3
15
B_SD5_6
B_SD5_2
R_B_DQS4_0
R869 12
R_B_DQS4_1
R870 12
R_B_DQS5_0
R355 12
R_B_DQS5_1
R352 12
R_B_DQS7_0
R461 12
R_B_DQS7_1
R457 12
R_B_DQS6_0
R873 12
R_B_DQS6_1
R874 12
R_B_DQS2_0
R859 12
R_B_DQS2_1
R860 12
R_B_DQS1_0
R856 12
R_B_DQS1_1
R858 12
R_B_DQS0_0
R852 12
R_B_DQS0_1
R854 12
R_B_DQS3_0
R863 12
R_B_DQS3_1
R864 12
R_B_DQS8_0
R865 12
R_B_DQS8_1
R867 12
R291 12
R293 12
R320 12
R324 12
R377 12
R369 12
R882 12
R879 12
A_SD0_[0..7] 17,19,21
A_SD1_[0..7] 17,19,21
A_SD2_[0..7] 17,19,21
A_SD3_[0..7] 17,19,21
A_SD4_[0..7] 17,19,21
A_SD5_[0..7] 17,19,21
A_SD6_[0..7] 17,19,21
A_SD7_[0..7] 17,19,21
A_SD8_[0..7] 17,19,21
A_DQS0_[0..1] 17,19,21
A_DQS1_[0..1] 17,19,21
A_DQS2_[0..1] 17,19,21
A_DQS3_[0..1] 17,19,21
A_DQS4_[0..1] 17,19,21
A_DQS5_[0..1] 17,19,21
A_DQS6_[0..1] 17,19,21
A_DQS7_[0..1] 17,19,21
A_DQS8_[0..1] 17,19,21
B_SD0_[0..7] 18,19,21
B_SD1_[0..7] 18,19,21
B_SD2_[0..7] 18,19,21
B_SD3_[0..7] 18,19,21
B_SD4_[0..7] 18,19,21
B_SD5_[0..7] 18,19,21
B_SD6_[0..7] 18,19,21
B_SD7_[0..7] 18,19,21
B_SD8_[0..7] 18,19,21
B_DQS0_[0..1] 18,19,21
B_DQS1_[0..1] 18,19,21
B_DQS2_[0..1] 18,19,21
B_DQS3_[0..1] 18,19,21
B_DQS4_[0..1] 18,19,21
B_DQS5_[0..1] 18,19,21
B_DQS6_[0..1] 18,19,21
B_DQS7_[0..1] 18,19,21
B_DQS8_[0..1] 18,19,21
R_A_SD4_0
1 2
R_A_SD4_4
3 4
5 6
R_A_SD4_1
7 8
R_A_SD4_2
1 2
R_A_SD4_7
3 4
R_A_SD4_6
5 6
R_A_SD4_3
7 8
1 2
3 4
5 6
7 8
R_A_SD5_2
1 2
R_A_SD5_6
3 4
R_A_SD5_3
5 6
R_A_SD5_7
7 8
R_A_SD6_5
1 2
R_A_SD6_4 A_SD6_4
3 4
R_A_SD6_1
5 6
R_A_SD6_0
7 8
R_A_SD6_3
1 2
R_A_SD6_7
3 4
R_A_SD6_2
5 6
R_A_SD6_6
7 8
R_A_SD7_4
1 2
R_A_SD7_0
3 4
R_A_SD7_5
5 6
R_A_SD7_1
7 8
R_A_SD7_6
1 2
R_A_SD7_2
3 4
R_A_SD7_7
5 6
R_A_SD7_3
7 8
A_DQS4_0
A_DQS4_1
A_DQS5_0
A_DQS5_1
A_DQS7_0
A_DQS7_1
A_DQS6_0
A_DQS6_1
B_SD1_5 R_B_SD1_5
RN119
B_SD1_1 R_B_SD1_1
15
B_SD1_4 R_B_SD1_4
B_SD1_3
RN121
15
B_SD1_6 R_B_SD1_6
B_SD0_1 R_B_SD0_1
RN115
B_SD0_5 R_B_SD0_5
15
B_SD0_0 R_B_SD0_0
B_SD0_4 R_B_SD0_4
RN117
15
B_SD0_6 R_B_SD0_6
RN122
15
B_SD2_4 R_B_SD2_4
RN125
15
B_SD3_5
RN127
B_SD3_1 R_B_SD3_1
15
B_SD3_4 R_B_SD3_4
B_SD3_0 R_B_SD3_0
B_SD3_7
RN129
B_SD3_3
15
B_SD8_1
RN131
B_SD8_0
15
B_SD8_5
B_SD8_4
B_SD8_7
RN133
B_SD8_3
15
B_SD8_6
B_SD8_2
A_SD0_[0..7]
A_SD1_[0..7]
A_SD2_[0..7]
A_SD3_[0..7]
A_SD4_[0..7]
A_SD5_[0..7]
A_SD6_[0..7]
A_SD7_[0..7]
A_SD8_[0..7]
A_DQS0_[0..1]
A_DQS1_[0..1]
A_DQS2_[0..1]
A_DQS3_[0..1]
A_DQS4_[0..1]
A_DQS5_[0..1]
A_DQS6_[0..1]
A_DQS7_[0..1]
A_DQS8_[0..1]
B_SD0_[0..7]
B_SD1_[0..7]
B_SD2_[0..7]
B_SD3_[0..7]
B_SD4_[0..7]
B_SD5_[0..7]
B_SD6_[0..7]
B_SD7_[0..7]
B_SD8_[0..7]
B_DQS0_[0..1]
B_DQS1_[0..1]
B_DQS2_[0..1]
B_DQS3_[0..1]
B_DQS4_[0..1]
B_DQS5_[0..1]
B_DQS6_[0..1]
B_DQS7_[0..1]
B_DQS8_[0..1]
1 2
3 4
5 6
R_B_SD1_0 B_SD1_0
7 8
R_B_SD1_3
1 2
R_B_SD1_2 B_SD1_2
3 4
R_B_SD1_7 B_SD1_7
5 6
7 8
1 2
3 4
5 6
7 8
R_B_SD0_3 B_SD0_3
1 2
R_B_SD0_7 B_SD0_7
3 4
R_B_SD0_2 B_SD0_2
5 6
7 8
R_B_SD2_5 B_SD2_5
1 2
R_B_SD2_1 B_SD2_1
3 4
R_B_SD2_0 B_SD2_0
5 6
7 8
R_B_SD2_7 B_SD2_7
1 2
R_B_SD2_3 B_SD2_3
3 4
R_B_SD2_6 B_SD2_6
5 6
R_B_SD2_2 B_SD2_2
7 8
R_B_SD3_5
1 2
3 4
5 6
7 8
R_B_SD3_7
1 2
R_B_SD3_3
3 4
R_B_SD3_2 B_SD3_2
5 6
R_B_SD3_6 B_SD3_6
7 8
R_B_SD8_1
1 2
R_B_SD8_0
3 4
R_B_SD8_5
5 6
R_B_SD8_4
7 8
R_B_SD8_7
1 2
R_B_SD8_3
3 4
R_B_SD8_6
5 6
R_B_SD8_2
7 8
A_SD2_4
RN32
A_SD2_0
15
D D
C C
B B
A_SD2_5
A_SD2_1
A_SD2_7
RN37
A_SD2_2
15
A_SD2_3
A_SD2_6
A_SD1_0
RN25
A_SD1_4 R_A_SD1_4
15
A_SD1_1 R_A_SD1_1
A_SD1_5 R_A_SD1_5
A_SD1_6 R_A_SD1_6
RN30
A_SD1_7
15
A_SD1_2 R_A_SD1_2
A_SD1_3 R_A_SD1_3
RN21
A_SD0_0
15
A_SD0_5
A_SD0_6
RN23
A_SD0_2
15
A_SD0_7
A_SD3_4
RN41
A_SD3_0
15
A_SD3_5
A_SD3_3 R_A_SD3_3
RN46
15
A_SD3_7 R_A_SD3_7
A_SD3_2 R_A_SD3_2
RN47
A_SD8_5
15
A_SD8_0
A_SD8_1
A_SD8_2 R_A_SD8_2
RN50
A_SD8_6 R_A_SD8_6
15
A_SD8_7
R_A_DQS3_0
R_A_DQS3_1
R_A_DQS1_0
R_A_DQS1_1
R_A_DQS0_0
R_A_DQS0_1
R_A_DQS2_1
R_A_DQS8_0
R_A_DQS8_1
R_B_SD0_[0..7] 14
R_B_SD1_[0..7] 14
R_B_SD2_[0..7] 14
R_B_SD3_[0..7] 14
R_B_SD4_[0..7] 14
R_B_SD5_[0..7] 14
R_B_SD6_[0..7] 14
R_B_SD7_[0..7] 14
R_B_SD8_[0..7] 14
R_B_DQS0_[0..1] 14
R_B_DQS1_[0..1] 14
R_B_DQS2_[0..1] 14
R_B_DQS3_[0..1] 14
R_B_DQS4_[0..1] 14
R_B_DQS5_[0..1] 14
R_B_DQS6_[0..1] 14
R_B_DQS7_[0..1] 14
R_B_DQS8_[0..1] 14
R_A_SD0_[0..7] 14
R_A_SD1_[0..7] 14
R_A_SD2_[0..7] 14
R_A_SD3_[0..7] 14
R_A_SD4_[0..7] 14
R_A_SD5_[0..7] 14
R_A_SD6_[0..7] 14
R_A_SD7_[0..7] 14
R_A_SD8_[0..7] 14
R_A_DQS0_[0..1] 14
R_A_DQS1_[0..1] 14
R_A_DQS2_[0..1] 14
R_A_DQS3_[0..1] 14
R_A_DQS4_[0..1] 14
R_A_DQS5_[0..1] 14
R_A_DQS6_[0..1] 14
R_A_DQS7_[0..1] 14
R_A_DQS8_[0..1] 14
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R232 12
R238 12
R169 12
R171 12
R140 12
R137 12
R213 12
R215 12
R258 12
R260 12
R_B_SD0_[0..7]
R_B_SD1_[0..7]
R_B_SD2_[0..7]
R_B_SD3_[0..7]
R_B_SD4_[0..7]
R_B_SD5_[0..7]
R_B_SD6_[0..7]
R_B_SD7_[0..7]
R_B_SD8_[0..7]
R_B_DQS0_[0..1]
R_B_DQS1_[0..1]
R_B_DQS2_[0..1]
R_B_DQS3_[0..1]
R_B_DQS4_[0..1]
R_B_DQS5_[0..1]
R_B_DQS6_[0..1]
R_B_DQS7_[0..1]
R_B_DQS8_[0..1]
R_A_SD0_[0..7]
R_A_SD1_[0..7]
R_A_SD2_[0..7]
R_A_SD3_[0..7]
R_A_SD4_[0..7]
R_A_SD5_[0..7]
R_A_SD6_[0..7]
R_A_SD7_[0..7]
R_A_SD8_[0..7]
R_A_DQS0_[0..1]
R_A_DQS1_[0..1]
R_A_DQS2_[0..1]
R_A_DQS3_[0..1]
R_A_DQS4_[0..1]
R_A_DQS5_[0..1]
R_A_DQS6_[0..1]
R_A_DQS7_[0..1]
R_A_DQS8_[0..1]
R_A_SD2_4
R_A_SD2_0
R_A_SD2_5
R_A_SD2_1
R_A_SD2_7
R_A_SD2_2
R_A_SD2_3
R_A_SD2_6
R_A_SD1_0
R_A_SD1_7
R_A_SD0_4 A_SD0_4
R_A_SD0_0
R_A_SD0_5
R_A_SD0_1 A_SD0_1
R_A_SD0_6
R_A_SD0_2
R_A_SD0_7
R_A_SD0_3 A_SD0_3
R_A_SD3_4
R_A_SD3_0
R_A_SD3_1 A_SD3_1
R_A_SD3_5
R_A_SD3_6 A_SD3_6
R_A_SD8_4 A_SD8_4
R_A_SD8_5
R_A_SD8_0
R_A_SD8_1
R_A_SD8_3 A_SD8_3
R_A_SD8_7
A_DQS3_0
A_DQS3_1
A_DQS1_0
A_DQS1_1
A_DQS0_0
A_DQS0_1
A_DQS2_0 R_A_DQS2_0
A_DQS2_1
A_DQS8_0
A_DQS8_1
A_SD4_0
RN54
A_SD4_4
15
A_SD4_5 R_A_SD4_5
A_SD4_1
A_SD4_2
RN59
A_SD4_7
15
A_SD4_6
A_SD4_3
A_SD5_0 R_A_SD5_0
RN61
A_SD5_4 R_A_SD5_4
15
A_SD5_5 R_A_SD5_5
A_SD5_1 R_A_SD5_1
A_SD5_2
RN65
A_SD5_6
15
A_SD5_3
A_SD5_7
A_SD6_5
RN147
15
A_SD6_1
A_SD6_0
A_SD6_3
RN150
A_SD6_7
15
A_SD6_2
A_SD6_6
A_SD7_4
RN75
A_SD7_0
15
A_SD7_5
A_SD7_1
A_SD7_6
RN77
A_SD7_2
15
A_SD7_7
A_SD7_3
R_A_DQS4_0
R_A_DQS4_1
R_A_DQS5_0
R_A_DQS5_1
R_A_DQS7_0
R_A_DQS7_1
R_A_DQS6_0
R_A_DQS6_1
R_B_SD4_0
1 2
R_B_SD4_4
3 4
R_B_SD4_5
5 6
R_B_SD4_1
7 8
R_B_SD4_2
1 2
R_B_SD4_6
3 4
R_B_SD4_7
5 6
R_B_SD4_3
7 8
1 2
R_B_SD5_0
3 4
R_B_SD5_1
5 6
R_B_SD5_5
7 8
R_B_SD5_6 B_SD6_6
1 2
R_B_SD5_2
3 4
R_B_SD5_3
5 6
R_B_SD5_7
7 8
R_B_SD7_4 B_SD7_4
1 2
R_B_SD7_0 B_SD7_0
3 4
R_B_SD7_5 B_SD7_5
5 6
R_B_SD7_1
7 8
R_B_SD7_6 B_SD7_6
1 2
3 4
R_B_SD7_7 B_SD7_7
5 6
R_B_SD7_3 B_SD7_3
7 8
R_B_SD6_1
1 2
R_B_SD6_5
3 4
R_B_SD6_4
5 6
R_B_SD6_0
7 8
R_B_SD6_7
1 2
R_B_SD6_3
3 4
R_B_SD6_6
5 6
R_B_SD6_2
7 8
B_DQS4_0
B_DQS4_1
B_DQS6_0
B_DQS6_1
B_DQS7_0
B_DQS7_1
B_DQS5_0
B_DQS5_1
B_DQS2_0
B_DQS2_1
B_DQS1_0
B_DQS1_1
B_DQS0_0
B_DQS0_1
B_DQS3_0
B_DQS3_1
B_DQS8_0
B_DQS8_1
*
*
*
*
A A
Micro Star Restricted Secret
Title
Termination #1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
20 68
of
Rev
0D
Page 21
5
4
3
2
1
D D
C C
B B
A_SD0_3
A_SD0_7
A_SD0_2
A_SD0_6
A_SD0_1
A_SD0_5
A_SD0_4
A_SD0_0
A_SD1_3
A_SD1_2
A_SD1_7
A_SD1_6
A_SD1_5
A_SD1_4
A_SD1_1
A_SD1_0
B_SD2_5
B_SD2_1
A_SD2_5
B_SD2_0
A_SD2_2
A_SD2_6
B_SD2_6
B_SD2_2
A_SD3_3
A_SD3_7
A_SD3_2
A_SD3_6
A_SD3_1
A_SD3_5
A_SD3_4
A_SD3_0
A_SD4_5
A_SD4_1
A_SD4_4
A_SD4_0
A_SD4_3
A_SD4_7
A_SD4_6
A_SD4_2
A_SD5_1
A_SD5_5
A_SD5_0
A_SD5_4
A_SD5_7
A_SD5_3
A_SD5_6
A_SD5_2
A_SD6_3
A_SD6_2
A_SD6_7
A_SD6_6
A_SD6_1
A_SD6_5
A_SD6_4
A_SD6_0
A_SD7_1
A_SD7_0
A_SD7_5
A_SD7_4
A_SD7_3
A_SD7_2
A_SD7_7
A_SD7_6
A_SD8_0
A_SD8_1
A_SD8_4
A_SD8_5
A_SD8_7
A_SD8_3
A_SD8_2
A_SD8_6
A_DQS0_[0..1] 17,19,20
A_DQS1_[0..1] 17,19,20
A_DQS2_[0..1] 17,19,20
A_DQS3_[0..1] 17,19,20
A_DQS4_[0..1] 17,19,20
A_DQS5_[0..1] 17,19,20
A_DQS6_[0..1] 17,19,20
A_DQS7_[0..1] 17,19,20
A_DQS8_[0..1] 17,19,20
RN22
27
RN17
27
RN28
27
RN24
27
RN35
27
RN38
27
RN48
27
RN45
27
RN56
27
RN60
27
RN62
27
RN66
27
RN73
27
RN70
27
RN76
27
RN78
27
RN51
27
RN55
27
A_SD0_[0..7] 17,19,20
A_SD1_[0..7] 17,19,20
A_SD2_[0..7] 17,19,20
A_SD3_[0..7] 17,19,20
A_SD4_[0..7] 17,19,20
A_SD5_[0..7] 17,19,20
A_SD6_[0..7] 17,19,20
A_SD7_[0..7] 17,19,20
A_SD8_[0..7] 17,19,20
AVTT AVTT AVTT
A_SD0_[0..7]
A_SD1_[0..7]
A_SD2_[0..7]
A_SD3_[0..7]
A_SD4_[0..7]
A_SD5_[0..7]
A_SD6_[0..7]
A_SD7_[0..7]
A_SD8_[0..7]
A_DQS0_[0..1]
A_DQS1_[0..1]
A_DQS2_[0..1]
A_DQS3_[0..1]
A_DQS4_[0..1]
A_DQS5_[0..1]
A_DQS6_[0..1]
A_DQS7_[0..1]
A_DQS8_[0..1]
B_SD0_2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN116
B_SD0_6
27
B_SD0_7
B_SD0_3
B_SD0_0
RN114
B_SD0_4
27
B_SD0_5
B_SD0_1
B_SD1_3
RN120
B_SD1_6
27
B_SD1_7
B_SD1_2
B_SD1_0
RN118
B_SD1_4
27
B_SD1_1
B_SD1_5
A_SD2_1
RN31
B_SD2_4
27
A_SD2_0
A_SD2_4
A_SD2_3
RN43
A_SD2_7
27
B_SD2_3
B_SD2_7
B_SD3_6
RN130
B_SD3_2
27
B_SD3_3
B_SD3_7
B_SD3_4
RN126
B_SD3_0
27
B_SD3_5
B_SD3_1
B_SD4_0
RN137
B_SD4_4
27
B_SD4_1
B_SD4_5
B_SD4_2
RN139
B_SD4_6
27
B_SD4_7
B_SD4_3
B_SD5_4
RN141
B_SD5_0
27
B_SD5_5
B_SD5_1
B_SD5_2
RN144
B_SD5_6
27
B_SD5_3
B_SD5_7
B_SD6_4
RN145
B_SD6_1
27
B_SD6_0
B_SD6_6
RN146
B_SD6_2
27
B_SD6_7
B_SD6_3
B_SD7_7
RN149
B_SD7_6
27
B_SD7_2
B_SD7_3
B_SD7_4
RN148
B_SD7_5
27
B_SD7_0
B_SD7_1
B_SD8_6
RN135
B_SD8_2
27
B_SD8_3
B_SD8_7
B_SD8_4
RN132
B_SD8_5
27
B_SD8_0
B_SD8_1
B_DQS0_[0..1] 18,19,20
B_DQS1_[0..1] 18,19,20
B_DQS2_[0..1] 18,19,20
B_DQS3_[0..1] 18,19,20
B_DQS4_[0..1] 18,19,20
B_DQS5_[0..1] 18,19,20
B_DQS6_[0..1] 18,19,20
B_DQS7_[0..1] 18,19,20
B_DQS8_[0..1] 18,19,20 CAS# 14,17,18,19
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
B_SD0_[0..7] 18,19,20
B_SD1_[0..7] 18,19,20
B_SD2_[0..7] 18,19,20
B_SD3_[0..7] 18,19,20
B_SD4_[0..7] 18,19,20
B_SD5_[0..7] 18,19,20
B_SD6_[0..7] 18,19,20
B_SD7_[0..7] 18,19,20
B_SD8_[0..7] 18,19,20
B_SD0_[0..7]
B_SD1_[0..7]
B_SD2_[0..7]
B_SD3_[0..7]
B_SD4_[0..7]
B_SD5_[0..7]
B_SD6_[0..7]
B_SD7_[0..7]
B_SD8_[0..7]
B_DQS0_[0..1]
B_DQS1_[0..1]
B_DQS2_[0..1]
B_DQS3_[0..1]
B_DQS4_[0..1]
B_DQS5_[0..1]
B_DQS6_[0..1]
B_DQS7_[0..1]
B_DQS8_[0..1]
A_DQS0_1
A_DQS0_0
A_DQS1_1
A_DQS1_0
B_DQS2_0
A_DQS2_1
A_DQS3_0
A_DQS3_1
A_DQS4_0
A_DQS4_1
A_DQS5_0
A_DQS5_1
A_DQS6_0
A_DQS6_1
A_DQS7_0
A_DQS7_1
A_DQS8_0
A_DQS8_1
B_DQS0_0
B_DQS0_1
B_DQS1_0
B_DQS1_1
A_DQS2_0
B_DQS2_1
B_DQS3_1
B_DQS3_0
B_DQS4_1
B_DQS4_0
B_DQS5_0
B_DQS5_1
B_DQS6_0
B_DQS6_1
B_DQS7_0
B_DQS7_1
B_DQS8_0
B_DQS8_1
MA13
RAS#
WE#
CAS# B_SD6_5
MA5
MA4
MA3
MA2
MA9
MA7
MA8
MA6
A_CKE
B_CKE
MA12
MA11
MA1
MA0
MA10
MA14
RN142
56
RN128
56
RN124
56
RN123
56
RN134
56
R138 27
R136 27
R165 27
R168 27
R218 27
R222 27
R253 27
R256 27
R295 27
R300 27
R329 27
R337 27
R363 27
R357 27
R387 27
R379 27
R278 27
R269 27
R851 27
R853 27
R857 27
R855 27
R199 27
R220 27
R862 27
R861 27
R872 27
R871 27
R876 27
R875 27
R877 27
R878 27
R881 27
R880 27
R866 27
R868 27
AVTT
AVTT
AVTT
AVTT
C651
C661
0.1U
C648
0.1U
C655
0.1U
0.1U
0.1U
0.1U
C647
C646
0.1U
0.1U
C656
C291
0.1U
0.1U
C208
C189
0.1U
0.1U
0.1U
0.1U
C645
C644
0.1U
0.1U
C272
C284
0.1U
0.1U
C158
C179
0.1U
0.1U
C657
C658
C659
C660
C650
0.1U
0.1U
C653
C652
0.1U
0.1U
C266
C297
0.1U
0.1U
C152
C137
0.1U
0.1U
AVTT
+
C649
EC14
0.1U
10U
AVTT
C654
0.1U
+
EC67
10U
C223
0.1U
AVTT
+
EC21
10U C215
C130
0.1U
AVTT
C93
MA[0..14]
A_CKE
B_CKE
WE#
RAS#
CAS#
C120
0.1U
0.1U
AVTT
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MA[0..14] 14,17,18,19
A_CKE 14,17,19
B_CKE 14,18,19
WE# 14,17,18,19
RAS# 14,17,18,19
C243
C227
0.1U
0.1U
C664
C257
0.1U
0.1U
C662
C663
0.1U
0.1U
A A
Micro Star Restricted Secret
Title
Termination #2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
21 68
of
Rev
0D
Page 22
A
B
C
D
E
VCC3
OPEN: 133MHz
XTAL_X2
R_REF_CLK_33
SEL
R_REFCLK_14
R_SIOCLK
R_USBCLK
MULT_SEL_0
MULT_SEL_1
SPREAD#
C372
0.1U
SHORT: 100MHz
C357
0.1U
R436
1K
DEFAULT - SHORT
U27
22
XTALI
23
XTALO
1
CLK33
48
SEL100/133
19
REFCLK
26
IREF
3
48MHZ/SELA
4
48MHZ_/SELB
30
MULTSEL0
29
MULTSEL1
20
SPREAD#
44
PWRDN#
2
VDD
6
VDD
12
VDD
18
VDD
24
VDD
31
VDD
37
VDD
43
VDD
25
VDDA
46
VDDA
PHL-PCK2022R-TSSOP48
SSOP48
CLK_SYNTH_VDD1
C348
C358
0.1U
0.1U
C346
0.1U
XTAL_X1
XTAL_X2
Y3
4 4
HWM_14318M 51
RSB_CLK_14MHZ 41
3 3
VCC3
L19 80_0805
1 2
C320
+
EC65
10U
0.1U
CLK_SYNTH_VDD2 VCC3
C319
4.7U-0805
C376
0.1U
R512 1K
74QST3384S-QALY
C378
C377
10P_0603
10P_0603
REF_CLK_33MHZ
HWM_14318M
RSB_CLK_14MHZ
SIOCLK48M 47
USBCLK48M 40
SIOCLK48M
USBCLK48M
VCC3
R515
10K
SPREAD#
L18 80_0805
1 2
+
C338
EC69
0.1U
10U
C322
4.7U-0805
R417 22
R503 22
R507 22
R513 475
R435 22
R440 22
VCC3
C356
1U
R442 10K
CLK_SYNTH_VDD1
CLK_SYNTH_VDD2
C362
1U
HCLK0
HCLK0_bar
HCLK1
HCLK1_bar
HCLK2
HCLK2_bar
HCLK3
HCLK3_bar
HCLK4
HCLK4_bar
HCLK5
HCLK5_bar
HCLK6
HCLK6_bar
HCLK7
HCLK7_bar
GNDA
GNDA VSS
R389
10K
SEL
Q88
X_2N3904S
HCLKITPRP XTAL_X1
HCLKITPRN
HCLKR2P
HCLKR2N
HCLKCMICRP
HCLKCMICRN
HCLKR1P
HCLKR1N
DIMMPLLRP
DIMMPLLRN
SELC
SELA
SELB
R504 X_R
R511 10K
R466 22
R472 22
R475 22
R483 22
R443 22
R463 22
R469 22
R474 22
R489 22
R492 22
R_REFCLK_14
R_USBCLK
R_SIOCLK
MULT_SEL_0
MULT_SEL_1
R476 51
R488 51
R460 51
R491 1K
R459 1K
R433 1K
R500 1K
R514 X_R
R437 51
R464 51
R471 51
7
8
10
11
13
14
16
17
42
41
39
38
36
35
33
32
5
GND
9
GND
15
GND
28
GND
34
GND
40
GND
47
GND
27
45 21
VCC3
X_4.7K
1 2
R487 51
R973
R470 51
R473 51
REF_CLK_33MHZ
RSB_CLK_14MHZ
USBCLK48M
SIOCLK48M
HWM_14318M
BSEL0
R462 51
CLK_100M_ITP0
CLK_100M_ITP1
HCLK2
HCLK2_N
HCLK_CMIC
HCLK_CMIC_N
HCLK1
HCLK1_N
DIMM_PLL_P
DIMM_PLL_N
BSEL0 5
CLK_100M_ITP0 9
CLK_100M_ITP1 9
HCLK2 6
HCLK2_N 6
HCLK_CMIC 12
HCLK_CMIC_N 12
HCLK1 4
HCLK1_N 4
DIMM_PLL_P 23
DIMM_PLL_N 23
C321 10P_0603
C365 10P_0603
C345 10P_0603
C334 10P_0603
C361 10P_0603
SEL100/133 SELA SELB SELC HOST 48MHz IOCLK REFCLK
0 0 0 0 100 MHz 48 MHz 33.3 MHz 14.318 MHz
0 0 0 1 100 MHz 48 MHz 66.7 MHz 14.318 MHz
0 0 1 0 100 MHz Hi-Z 33.3 MHz 14.318 MHz
0 0 1 1 100 MHz Hi-Z 66.7 MHz 14.318 MHz
0 1 0 0 100 MHz Hi-Z Low Low
0 1 0 1 100 MHz 48 MHz 33.3 MHz 14.318 MHz
0 1 1 0 Hi-Z Hi-Z Hi-Z Hi-Z
0 1 1 1 100 MHz 48 MHz 66.7 MHz 14.318 MHz
1 0 0 0 133 MHz 48 MHz 33.3 MHz 14.318 MHz
1 0 0 1 133 MHz 48 MHz 66.7 MHz 14.318 MHz
1 0 1 0 133 MHz Hi-Z 33.3 MHz 14.318 MHz
1 0 1 1 133 MHz Hi-Z 66.7 MHz 14.318 MHz
1 1 0 0 200 MHz 48 MHz 33.3 MHz 14.318 MHz
1 1 0 1 133 MHz 48 MHz 33.3 MHz 14.318 MHz
1 1 1 0 TCLK/2 TCLK/4 TCLK/4 TCLK
1 1 1 1 133 MHz 48 MHz 66.7 MHz 14.318 MHz
* Host swing select functions
MULTSEL0 MULTSEL1 BOARD IMPEDANCE I(REF) I(OH) V(OH)@I(REF)=2.32 mA
0 0 60 R(REF)=475 1% IOH=5*I(REF) 0.71 V
I(REF)=2.32mA
0 0 50 R(REF)=475 1% IOH=5*I(REF) 0.59 V
I(REF)=2.32mA
0 1 60 R(REF)=475 1% IOH=6*I(REF) 0.85 V
I(REF)=2.32mA
0 1 50 R(REF)=475 1% IOH=6*I(REF) 0.71 V
I(REF)=2.32mA
1 0 60 R(REF)=475 1% IOH=4*I(REF) 0.56 V
I(REF)=2.32mA
1 0 50 R(REF)=475 1% IOH=4*I(REF) 0.47 V
I(REF)=2.32mA
1 1 60 R(REF)=475 1% IOH=7*I(REF) 0.99 V
I(REF)=2.32mA
1 1 50 R(REF)=475 1% IOH=7*I(REF) 0.82 V
I(REF)=2.32mA
2 2
1 1
PCI32 Clock Buffer
VCC3
REF_CLK_33MHZ
L20 80_0805
1 2
+
EC66
C331
10U
0.01U
A
+
* RCC Design *
PLL Disable and Bypass
C328
4.7U-0805
VDD_PCICLK_BUFF_5
C327
1U
C289
0.01U
C312
0.01U
C295
1U
R367 X_R
C318
1000P-0805
R366 0
VCC3
B
C294 X_22P
FB_PCICLK33_BUFF
R365
X_R
PLL Mode
R416 4.7K
U23
24
CLK
13
FBIN
2
VCC
10
VCC
14
VCC
22
VCC
1
AGND
23
AVCC
6
GND
7
GND
18
GND
19
GND
11
G
PHL-PCK2510S-TSSOP24
PCICLK_CIOB-GR
3
Y0
PCICLK_CIOBR
4
Y1
PCICLK_IRQ1R PCICLK_IRQ1 PCICLK_IRQ1
5
Y2
R_PCICLK_ETHER1
8
Y3
9
Y4
PCICLK_IRQ0R
15
Y5
AGP_CKBF_33MHZR
16
Y6
GALCLKR
17
Y7
20
Y8
LPC_CLK_SIO_R
21
Y9
PCICLK_RSBR
12
FBOUT
C
R368 33
R371 33
R378 33
R386 33
R395 33
R407 33
R885 33
R987 33
R381 33
R376 33
R415
22
PCICLK_CIOB
LAN1PCLK
5880PCLK
PCICLK_IRQ0
AGP_CKBF_33MHZ
GALCLK
LPC_CLK_SIO
PCICLK_RSB
FB_PCICLK33_BUFF
PCICLK_CIOB-G 27
PCICLK_CIOB 24
PCICLK_IRQ1 42
LAN1PCLK 43
5880PCLK 29
PCICLK_IRQ0 42
AGP_CKBF_33MHZ 27
GALCLK 47
LPC_CLK_SIO 47
PCICLK_RSB 40
5880PCLK
GALCLK
AGP_CKBF_33MHZ PCICLK_CIOB-G
PCICLK_IRQ0
LPC_CLK_SIO
LAN1PCLK
PCICLK_CIOB-G
PCICLK_CIOB
PCICLK_RSB
FB_PCICLK33_BUFF
D
10P_0603
C727
10P_0603
C728
10P_0603
C665
10P_0603
C311
10P_0603
C303
10P_0603
C304
10P_0603
C305
10P_0603
C290
10P_0603
C296
10P_0603
C302
10P_0603
C317
Micro Star Restricted Secret
Title
Clock Synthesizer
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
22 68
of
Rev
0D
Page 23
5
4
3
2
1
D D
DIMM_PLL_P 22
DIMM_PLL_N 22
FBOUT0_P
FBOUT0_N
MEMB_SDA 17,19,54
MEMB_SCL 17,19,54
VCC3
MEM_CLK_PLL_VDD1
R268
120
MEM_CLK_PLL_VDD2
VCC25 MEM_CLK_PLL_VDD1
1 2
L13
80_0805
+
EC34
10U
C C
C165
0.01U
4.7U-0805
+
C172
C168
C178
1U
1U
13
CLKIN_P
14
CLKIN_N
35
FBIN_P
36
FBIN_N
37
SDA
12
SCK
15
VDD_I2C
16
AVCC
17
AGND
4
VDDQ
11
VDDQ
21
VDDQ
28
VDDQ
34
VDDQ
38
VDDQ
45
VDDQ
1
GND
7
GND
8
GND
18
GND
24
GND
25
GND
31
GND
41
GND
42
GND
48
GND
PHL-PCK2057-TSSOP48
* Slave Address : 1101001xb
CLK0_P
CLK0_N
CLK1_P
CLK1_N
CLK2_P
CLK2_N
CLK3_P
CLK3_N
CLK4_P
CLK4_N
CLK5_P
CLK5_N
CLK6_P
CLK6_N
CLK7_P
CLK7_N
CLK8_P
CLK8_N
CLK9_P
CLK9_N
FBOUT_P
FBOUT_N
3
2
5
6
10
9
20
19
22
23
46
47
44
43
39
40
29
30
27
26
R_FBOUT0_PR FBOUT0_P
33
R_FBOUT0_NR
32
0
R246
0
R247
0
R245
0
R244
0
R242
0
R243
0
R240
0
R241
0
R919
0
R920
0
R921
0
R922
Must Meet Layout Guide
0
R267
R266
FBOUT0_N
0
* Delay Loop *
CLK0_P 17
CLK0_N 17
CLK1_P 17
CLK1_N 17
CLK2_P 18
CLK2_N 18
CLK3_P 18
CLK3_N 18
CLK5_P 19
CLK5_N 19
CLK4_P 19
CLK4_N 19
C214
C213
TO DIMMs
CLK0_P & N - DIMM1
CLK1_P & N - DIMM2
CLK2_P & N - DIMM3
CLK3_P & N - DIMM4
CLK4_P & N - DIMM5
CLK5_P & N - DIMM6
47P
47P
VCC25 MEM_CLK_PLL_VDD2
1 2
L16
80_0805
U14
+
EC47
10U
B B
C218
0.01U
4.7U-0805
+
C219
C206
C216
1U
1U
C193
C207
1U
C186
C184
1U
0.01U
0.01U
C217
1000P-0805
A A
Micro Star Restricted Secret
Title
DDR Clock Buffer
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
23 68
of
Rev
0D
Page 24
A
B
C
D
E
P64AD[63..0]
P64AD[63..0] 31,32,33
P64TRDY#
N23
R25
N25
U22
M22
P24
K21
R22
P22
L22
N22
J22
M24
J25
M25
H22
E23
F24
D24
F25
C25
G21
B25
E22
A23
C24
A24
D23
B23
C22
A21
A22
T21
W21
T22
U25
P25
W22
R23
W23
U23
W25
T25
AA22
V22
AA23
V24
AA25
V25
AB20
Y22
AC24
Y24
AC25
Y25
AC21
AB23
AE24
AB24
AD22
AB25
AE23
AB21
AE22
P64FRAME#
P64DEVSEL#
P64IRDY#
P64STOP#
U28A
P_AD0
P_AD1
P_AD2
P_AD3
P_AD4
P_AD5
P_AD6
P_AD7
P_AD8
P_AD9
P_AD10
P_AD11
P_AD12
P_AD13
P_AD14
P_AD15
P_AD16
P_AD17
P_AD18
P_AD19
P_AD20
P_AD21
P_AD22
P_AD23
P_AD24
P_AD25
P_AD26
P_AD27
P_AD28
P_AD29
P_AD30
P_AD31
P_AD32
P_AD33
P_AD34
P_AD35
P_AD36
P_AD37
P_AD38
P_AD39
P_AD40
P_AD41
P_AD42
P_AD43
P_AD44
P_AD45
P_AD46
P_AD47
P_AD48
P_AD49
P_AD50
P_AD51
P_AD52
P_AD53
P_AD54
P_AD55
P_AD56
P_AD57
P_AD58
P_AD59
P_AD60
P_AD61
P_AD62
P_AD63
CIOBX2
VCC
R479 22
R478 22
R502 22
R501 22
U22
3
Vin
12
GND
6
2N
7
2P
4
1N
5
1P
8
3N
9
3P
10
4N
11
4P
PHL-LM339A-SO14
P64TRDY# 31,32,33
P64FRAME# 31,32,33
P64DEVSEL# 31,32,33
P64IRDY# 31,32,33
4 4
3 3
2 2
R388
5.1K
P1_PCIXCAP 31,32
S1_PCIXCAP 39
R1198 0
JP7
1 2
JP5
1 2
ON : Force PCI
Only Mode
R1199 X_0
JP7_12
JC-D2-GN
P64STOP# 31,32,33
P64AD0
P64AD1
P64AD2
P64AD3
P64AD4
P64AD5
P64AD6
P64AD7
P64AD8
P64AD9
P64AD10
P64AD11
P64AD12
P64AD13
P64AD14
P64AD15
P64AD16
P64AD17
P64AD18
P64AD19
P64AD20
P64AD21
P64AD22
P64AD23
P64AD24
P64AD25
P64AD26
P64AD27
P64AD28
P64AD29
P64AD30
P64AD31
P64AD32
P64AD33
P64AD34
P64AD35
P64AD36
P64AD37
P64AD38
P64AD39
P64AD40
P64AD41
P64AD42
P64AD43
P64AD44
P64AD45
P64AD46
P64AD47
P64AD48
P64AD49
P64AD50
P64AD51
P64AD52
P64AD53
P64AD54
P64AD55
P64AD56
P64AD57
P64AD58
P64AD59
P64AD60
P64AD61
P64AD62
P64AD63
VCC3
R410
R360
R409
2K
5.1K
10K
R385
R384
10K
2K
FOR DEBUG ONLY
1 1
P_GNT#0
P_GNT#1
P_GNT#2
P_GNT#3
P_GNT#4
P_REQ#0
P_REQ#1
P_REQ#2
P_REQ#3
P_REQ#4
P_CBE#0
P_CBE#1
P_CBE#2
P_CBE#3
P_CBE#4
P_CBE#5
P_CBE#6
P_CBE#7
P_FRAME#
P_DEVSEL#
P_IRDY#
P_TRDY#
P_STOP#
P_SERR#
P_PERR#
P_REQ64#
P_PAR64
P_ACK64#
P_LOCK#
P_SOR#
P_M66EN
P_SOD
P_PCIRST#
P_PCICAP1
P_PCICAP2
P_GNT#5/PCLKO_4
P_GNT#6/PCLKO_3
P_REQ#5/PCLKO_2
P_REQ#6/PCLKO_1
PCLK_O
PCLKFB
1
2Y
2
1Y
14
3Y
13
4Y
3.3V
2.75V
0.55V
0V'
R_P64TRDY#
R_P64FRAME#
R_P64DEVSEL#
R_P64IRDY#
R_P64STOP#
P1_M66EN/
S1_M66EN
0
1
X
S1_AD0
S1_AD1
S1_AD2
S1_AD3
S1_AD4
S1_AD5
S1_AD6
S1_AD7
S1_AD8
S1_AD9
S1_AD10
S1_AD11
S1_AD12
S1_AD13
S1_AD14
S1_AD15
S1_AD16
S1_AD17
S1_AD18
S1_AD19
S1_AD20
S1_AD21
S1_AD22
S1_AD23
S1_AD24
S1_AD25
S1_AD26
S1_AD27
S1_AD28
S1_AD29
S1_AD30
S1_AD31
S1_AD32
S1_AD33
S1_AD34
S1_AD35
S1_AD36
S1_AD37
S1_AD38
S1_AD39
S1_AD40
S1_AD41
S1_AD42
S1_AD43
S1_AD44
S1_AD45
S1_AD46
S1_AD47
S1_AD48
S1_AD49
S1_AD50
S1_AD51
S1_AD52
S1_AD53
S1_AD54
S1_AD55
S1_AD56
S1_AD57
S1_AD58
S1_AD59
S1_AD60
S1_AD61
S1_AD62
S1_AD63
P1_GNT#5/
S1_GNT#3
X
X
1
0
P64GNT#0
D21
P64GNT#1
B18
P64GNT#2
A17
P64GNT#3
A16
P64GNT#4
A15
P64REQ#0
B20
P64REQ#1
A20
P64REQ#2
A19
P64REQ#3
C19
P64REQ#4
B22
P64CBE#0
L25
P64CBE#1
L23
P64CBE#2
H24
P64CBE#3
D25
P64CBE#4
AE21
P64CBE#5
AD25
P64CBE#6
AD20
P64CBE#7
AD23
R_P64FRAME#
E25
R_P64DEVSEL#
K22
R_P64IRDY#
H25
R_P64TRDY#
F22
P64PAR
G23
P_PAR
R_P64STOP#
G22
P64SERR#
K24
P64PERR#
K25
P64REQ#64
N21
P64PAR64
AC22
P64ACK#64
T24
P64LOCK#
J23
R431 4.7K
D16
C15
P_SIL#
P1_M66EN
C17
D19
D18
R452 22
P1_PCIXCAP1
C21
P1_PCIXCAP2
E19
PCLKO4
B14
PCLKO3
A14
PCLKO2
A18
PCLKO1
D20
P1CLKO_R S1CLKO_R
AA4
P1CLKFB_R
AD3
AC4
CLKIN
P1_PCIXCAP2
P1_PCIXCAP1
S1_PCIXCAP2
S1_PCIXCAP1
1
TP16
1
TP17
R544 22
R419 0
PCLKO_DLY
P1CLKFB_R
R382 5.1K
R383 5.1K
R361 5.1K
R362 5.1K
P64GNT#0 26,31,33
P64GNT#1 26,31
P64GNT#2 33
P64GNT#3 26,32
P64GNT#4 26
P64REQ#0 31
P64REQ#1 31
P64REQ#2 33
P64REQ#3 32
P64CBE#0 31,32,33
P64CBE#1 31,32,33
P64CBE#2 31,32,33
P64CBE#3 31,32,33
P64CBE#4 31,32,33
P64CBE#5 31,32,33
P64CBE#6 31,32,33
P64CBE#7 31,32,33
P64PAR 31,32,33
P64SERR# 31,32,33,41
P64PERR# 31,32,33,41
P64REQ#64 31,32,33
P64PAR64 31,32,33
P64ACK#64 31,32,33
P64LOCK# 31,32
VCC3
P1_M66EN 31,32
P1PCIRST_X#
PCLKO4 26
PCLKO3 26
PCLKO2 26
PCLKO1 26
C310 47P
C324 X_10P_0603
VCC3
P1PCIRST_X# 60
C326
22P
PCLKO_DLY
PCICLK_CIOB 22
P1_PCIXCAP/
S1_PCIXCAP
Gnd
Gnd
Pull Down X
N.C. ( 1 )
N.C. ( 1 ) X
N.C. ( 1 ) - Not Connected , Logic Value = 1
PCI-X 100/133MHz
PCI-X 66MHz
PCI 33/66MHz
S1_AD[63..0] 39
S1_FRAME# 39
S1_DEVSEL# 39
S1_TRDY# 39
S1_IRDY# 39
S1_STOP# 39
S1_AD[63..0]
S1_TRDY#
S1_FRAME#
S1_DEVSEL#
S1_IRDY#
S1_STOP#
U28B
M2
S_AD0
G1
S_AD1
L1
S_AD2
G4
S_AD3
L4
S_AD4
E3
S_AD5
K1
S_AD6
E1
S_AD7
D2
S_AD8
K5
S_AD9
C1
S_AD10
H1
S_AD11
B1
S_AD12
H2
S_AD13
C2
S_AD14
G3
S_AD15
A4
S_AD16
B6
S_AD17
G5
S_AD18
A7
S_AD19
C5
S_AD20
D5
S_AD21
A6
S_AD22
B8
S_AD23
C7
S_AD24
D6
S_AD25
D7
S_AD26
A10
S_AD27
A8
S_AD28
E7
S_AD29
D8
S_AD30
B10
S_AD31
N5
S_AD32
J4
S_AD33
N4
S_AD34
J1
S_AD35
P4
S_AD36
J3
S_AD37
P2
S_AD38
K2
S_AD39
P1
S_AD40
L3
S_AD41
R3
S_AD42
M4
S_AD43
T2
S_AD44
N3
S_AD45
U4
S_AD46
N1
S_AD47
U1
S_AD48
R4
S_AD49
V2
S_AD50
R1
S_AD51
W3
S_AD52
T5
S_AD53
W1
S_AD54
T1
S_AD55
Y2
S_AD56
T4
S_AD57
AA1
S_AD58
U3
S_AD59
AB2
S_AD60
V1
S_AD61
AB1
S_AD62
V4
S_AD63
CIOBX2
P1_PCIXCAP1/
S1_PCIXCAP1
0
0
0
1
1
R490 22
R485 22
R445 22
R420 22
R477 22 R486 22
S_GNT#0
S_GNT#1
S_GNT#2
S_GNT#3
S_REQ#0
S_REQ#1
S_REQ#2
S_REQ#3
S_CBE#0
S_CBE#1
S_CBE#2
S_CBE#3
S_CBE#4
S_CBE#5
S_CBE#6
S_CBE#7
S_FRAME#
S_DEVSEL#
S_IRDY#
S_TRDY#
S_PAR
S_STOP#
S_SERR#
S_PERR#
S_REQ64#
S_PAR64
S_ACK64#
S_LOCK#
S_SOR#
S_SIL#
S_M66EN
S_SOD
S_PCIRST#
S_PCIXCAP1
S_PCIXCAP2
S_GNT#4/SCLKO_4
S_GNT#5/SCLKO_3
S_REQ#4/SCLKO_2
S_REQ#5/SCLKO_1
SCLK_O
SCLK_FB
P1_PCIXCAP2/
S1_PCIXCAP2
0
0 X
1
1
1 PCI-X - 133
R_S1_TRDY#
R_S1_FRAME#
R_S1_DEVSEL#
R_S1_IRDY#
R_S1_STOP#
S1_GNT#0
D12
S1_GNT#1
A12
S1_GNT#2
C13
S1_GNT#3
B12
S1_REQ#0
D11
S1_REQ#1
D9
S1_REQ#2
C11
S1_REQ#3
E10
S1_CBE#0
K4
S1_CBE#1
A2
S1_CBE#2
C4
S1_CBE#3
A9
S1_CBE#4
W4
S1_CBE#5
AC1
S1_CBE#6
Y1
S1_CBE#7
AD1
R_S1_FRAME#
F4
R_S1_DEVSEL#
B4
R_S1_IRDY#
A5
R_S1_TRDY#
F2
S1_PAR
F1
R_S1_STOP#
D1
S1_SERR#
B3
S1_PERR#
A3
S1_REQ#64
M1
S1_PAR64
AC2
S1_ACK#64
H4
S1_LOCK#
E4
R453 4.7K
E13
D15
S1_M66EN
D3
B16
C9
R444 22
S1_PCIXCAP1
E16
S1_PCIXCAP2
D14
SCLKO4
A13
SCLKO3
D13
SCLKO2
A11
SCLKO1
D10
AB3
S1CLKFB_R
AE2
FREQ. ( MHz )
PCI - 33
PCI - 66
PCI-X - 66
PCI-X - 100
SCLKO_DLY
S1CLKFB_R
Conv. PCI
S1_GNT#0 26,39
S1_GNT#1 26,39
S1_GNT#2 26
S1_GNT#3 26
S1_REQ#0 39
S1_REQ#1 39
S1_CBE#0 39
S1_CBE#1 39
S1_CBE#2 39
S1_CBE#3 39
S1_CBE#4 39
S1_CBE#5 39
S1_CBE#6 39
S1_CBE#7 39
S1_PAR 39
S1_SERR# 39,41
S1_PERR# 39,41
S1_REQ#64 39
S1_PAR64 39
S1_ACK#64 39
S1_LOCK# 39
VCC3
1
TP15
S1_M66EN 39
1
TP14
S1PCIRST_X#
SCLKO4 26
SCLKO3 26
SCLKO2 26
SCLKO1 26
R547 22
R482 0
C355 47P
C354 X_10P_0603
S1PCIRST_X# 60
C325
22P
SCLKO_DLY
S1_REQ#2
S1_REQ#3
P64REQ#3
P64REQ#4
R957 4.7K
R958 4.7K
R959 4.7K
R960 4.7K
VCC3
Micro Star Restricted Secret
Title
CIOB-X2 PCI-X
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
24 68
of
Rev
0D
Page 25
A
B
C
D
E
G25
RSVD
AE20
RSVD
CIOBX2_IMB_RCOMP
CIOBX2_IMB_COMP_PD
CIOBX2_IMB_COMP_PU
AE12
AB13
AC13
IMBCOMP0
IMBCOMP1
IMBCOMP2
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
R558 1K
VCC25 VDD_IMB
CIOBX2
VDD_IMB
A25
B21
B19
B17
B15
B13
B11
C23
C3
E24
E21
E18
E14
E11
G24
G2
H21
H5
J24
L24
L21
L15
L14
L13
L12
L11
M15
M14
M13
M12
M11
N24
N15
N14
N13
N12
N11
N2
P21
P15
P14
P13
P12
P11
R24
R15
R14
R13
R12
R11
R2
U24
U2
V21
W24
W2
AA24
AA21
AA18
AA16
AA14
AA12
AA10
AA8
AA5
AA2
AC23
AC20
AC3
AD19
AD17
AE5
U28D
AA17
AA15
AA13
AA11
AA9
AA7
GND
A1
GND
GND
GND
GND
GND
GND
GND
B9
GND
B7
GND
B5
GND
GND
GND
GND
GND
GND
GND
GND
E8
GND
E5
GND
E2
GND
GND
GND
GND
GND
GND
J2
GND
GND
GND
GND
GND
GND
GND
GND
L5
GND
L2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
V5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AD15
AD13
AC18
VDD1.5
VDD1.5
VDD1.5
VDD1.5
VDD1.5
VDD1.5
VDD1.5
GND
GND
GND
GND
GND
AD11
AD9
AD7
AE25
AE1
AC16
VDD1.5
AC14
VDD1.5
AC12
VDD1.5
AC10
VDD1.5
AC8
VDD1.5
AC6
VDD1.5
AC5
TESTMODE#
4 4
3 3
2 2
B24
B2
C20
C18
C16
C14
C12
C10
C8
C6
D22
D4
E20
E17
E15
E12
E9
E6
F23
F21
F5
F3
H23
H3
J21
J5
K23
K3
M23
M21
M5
M3
P23
P3
R21
R5
T23
T3
U21
U5
V23
V3
Y23
Y21
Y5
Y3
AA20
AB22
AB4
AD24
AD21
AD2
K16
K15
K14
K13
K12
K11
K10
L16
L10
M16
M10
N16
N10
P16
P10
R10
T16
T15
T14
T13
T12
T11
T10
R16
R562 100
R564 X_255
R563 X_255
VCC3
VCC25
A_IMB_D_R[0..15] 13
A_IMB_D_T[0..15] 13
CIOBX2_IMB_COMP_PU
CIOBX2_IMB_COMP_PD
C353
0.1U
C405
0.1U
R938 100
R939 255
C339
0.1U
C410
1000P-0805
A_IMB_D_R[0..15]
A_IMB_D_T[0..15]
A_IMB_D_T0
A_IMB_D_T1
A_IMB_D_T2
A_IMB_D_T3
A_IMB_D_T4
A_IMB_D_T5
A_IMB_D_T6
A_IMB_D_T7
A_IMB_D_T8
A_IMB_D_T9
A_IMB_D_T10
A_IMB_D_T11
A_IMB_D_T12
A_IMB_D_T13
A_IMB_D_T14
A_IMB_D_T15
A_IMB_D_R0
A_IMB_D_R1
A_IMB_D_R2
A_IMB_D_R3
A_IMB_D_R4
A_IMB_D_R5
A_IMB_D_R6
A_IMB_D_R7
A_IMB_D_R8
A_IMB_D_R9
A_IMB_D_R10
A_IMB_D_R11
A_IMB_D_R12
A_IMB_D_R13
A_IMB_D_R14
A_IMB_D_R15
C344
0.1U
C411
1000P-0805
Route AVDD as two traces, One going to each pin.
Route AGND like AVDD, each pin having its own trace Connected
to GND pin of Filter Ckt.'s Cap.
U28C
AE19
AE18
AB17
AB19
AA19
AB18
AC19
AE17
AD18
AB15
AE13
AD14
AB16
AE15
AE14
AC15
AB11
AB12
AC11
AB10
AE10
AE9
AD10
AE11
AC9
AD6
AE6
AB9
AE7
AB8
AB7
AA6
C368
0.1U
C404
1000P-0805
IMBD_ R0
IMBD_ R1
IMBD_R2
IMBD_ R3
IMBD_R4
IMBD_R5
IMBD_ R6
IMBD_R7
IMBD_ R8
IMBD_R9
IMBD_ R10
IMBD_R11
IMBD_R12
IMBD_R13
IMBD_R14
IMBD_R15
IMBD_ T0
IMBD_ T1
IMBD_T2
IMBD_ T3
IMBD_T4
IMBD_ T5
IMBD_ T6
IMBD_T7
IMBD_T8
IMBD_T9
IMBD_ T10
IMBD_T11
IMBD_ T12
IMBD_ T13
IMBD_T14
IMBD_ T15
CIOBX2
C381
1000P-0805
VDD_IMB
C406
1000P-0805
IMBCLK_R_P
IMBCLK_R_N
IMBCLK_T_P
IMBCLK_T_N
IMBPAR_T
IMBPAR_R
IMBCON_T
IMBCON_R
AGND1
AGND2
AVDD1
AVDD2
PCIRST#
PLLRST
ALERT
VREFIMB0
SDA
SCLK
C388
1000P-0805
AD16
AE16
AE8
AD8
AC7
AC17
AB6
AB14
AE3
AD4
AE4
AD5
W5
Y4
D17
AA3
AB5
AD12
R526 0
VREF_IMB_CIOB
C375
1000P-0805
1000U
VDD_IMB VDD_IMB
1000U
R934 0
R935 0
AVDD_CIOB1_PLL
VCC25
VCC3 VCC3
A_IMB_CLK_T_P_R 13
A_IMB_CLK_T_N_R 13
A_IMB_PAR_R 13
A_IMB_PAR_T 13
A_IMB_CON_R 13
A_IMB_CON_T 13
RCC_SDA 13,16,27,49,51,52,54
RCC_SCL 13,16,27,49,51,52,54
PCIRST# 27,38,40,60
PS_PWRGD# 12,27,41,59
ALERT# 27,41
VREF_IMB_CIOB
VDD_IMB
R582
EC73
1000U
100
R583
100
VDD_IMB
SC30
0.1U
Put on Solder Side
VCC3
SC24
0.1U
VCC25
SC23
0.1U
+
+
EC68
+
EC78
A_IMB_CLK_R_P 13
A_IMB_CLK_R_N 13
C408
1U
SC29
0.1U
SC33
0.1U
Put on Solder Side
SC28
0.1U
AVDD_CIOB1_PLL
VREF_IMB_CIOB
C407
0.1U
SC32
0.1U
SC26
0.1U
SC27
0.1U
+
C409
1000P-0805
SC31
0.1U
SC22
0.1U
SC25
0.1U
VCC25
R565
L25
47U
EC76
10U
4.7
Put on Solder Side
1 1
Micro Star Restricted Secret
Title
CIOB-X2 IMB Power
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
25 68
of
Rev
0D
Page 26
A
VCC3
VCC3
P1_GNT#0 :
1: APLL Enabled (*)
R468
0: APLL Disabled
2.7K
P64GNT#0
P64GNT#0 24,31,33
R467
Do not stuff
4 4
3 3
X_R
VCC3 VCC3
R425
2.2K
P64GNT#1
P64GNT#1 24,31 P64GNT#3 24,32
CIOB I2C Bus
0 = C4h
R456
1 = C8h
X_R
Do not stuff
VCC3
R446
S1_GNT#0
2.7K
S1_GNT#0
R426
X_R
Do not stuff
1: All bits of Func. # used for reg. access
0: Only bit 0 of Func. # used for reg. access
S1_GNT#0 24,39
P1_GNT#4 (CIOB-X2-1.2)
R449
X_R
Do not stuff
P64GNT#4
R430
2.7K
R422
8.2K
R439
X_1K
VCC3
B
P64GNT#4 24
0 = Disable Pri Hot-Plug
Controller (Default)
1 = Enable Pri Hot-Plug
Controller
P1_GNT#3
STUFF R439 = PCI-X 133
NO STUFF = PCI-X 100
P64GNT#3
8.2K
S1_GNT#1 24,39
R390
X_1K
S1_GNT#1
STUFF R390 = PCI-X 133
NO STUFF = PCI-X 100
C
PCICLK_P1_SLT3
SCSIPCLK
ZCRPCLK
PCICLK_P1_SLT1
PCICLK_P1_SLT2
PCICLK_P1_SLT1
PCICLK_P1_SLT2
SCSIPCLK
ZCRPCLK
C836 10P_0603
C309 10P_0603
C316 10P_0603
C337 10P_0603
C330 10P_0603
PCLKO4
PCLKO4 24
PCLKO3
PCLKO3 24
PCLKO2
PCLKO2 24
PCLKO1
PCLKO1 24
R438 22
R434 22
R405 22
R414 22
R1181 22
Close All Componet to CIOB-X2
SCLKO1
SCLKO1 24
SCLKO2
SCLKO2 24
SCLKO3
SCLKO3 24
SCLKO4
SCLKO4 24
R413 22
R412 22
R955 22
R956 22
PCICLK_S1_SLT3
PCICLK_S1_SLT4
PCICLK_S1_SLT1
PCICLK_S1_SLT2
PCICLK_S1_SLT1
PCICLK_S1_SLT2
PCICLK_S1_SLT3
PCICLK_S1_SLT4
C719 10P_0603
C720 10P_0603
C314 10P_0603
C313 10P_0603 R427
Close All Componet to CIOB-X2
PCICLK_P1_SLT1 31
PCICLK_P1_SLT2 31
SCSIPCLK 33
ZCRPCLK 33
PCICLK_P1_SLT3 32
PCICLK_S1_SLT1 39
PCICLK_S1_SLT2 39
D
E
VCC3
2 2
1 1
R421
X_R
Do not stuff
S1_GNT#3
S1_GNT#3 24
R448
2.7K
S1_GNT#3
1 = Enable Sec Hot-Plug Controller
0 = Disable Sec Hot-Plug Controller
(Default)
A
VCC3
S1_GNT#2
R429
IMB_READ/WRITE POINTER DLY
2.7K
1 : 5 CLOCKs (Default)
0 : 6 CLOCKs
S1_GNT#2
S1_GNT#2 24
R406
X_R
Do not stuff
Micro Star Restricted Secret
Title
CIOB-X2 Strapping Optoin / Clock Buffer
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
26 68
of
Rev
0D
Page 27
A
4 4
VCC3
C119
C491
C203
C225
0.1U
C131
0.1U
C205
0.1U
0.01U
C134
C122
0.01U
1000P-0805
0.01U
1000P-0805
C604
1000P-0805
VCC
C221
C35
0.1U
0.1U
+12V
C84
C235
0.1U
0.1U
3 3
-12V
C25
C71
0.1U
0.1U
C634
C1
0.01U
0.1U
C360
C490
0.01U
0.01U
P12V
C222
C86
0.01U
0.1U
5VSB
C70
0.01U
C17
C281
0.1U
C106
0.1U
0.01U
C607
1000P-0805
C15
0.01U
C636
1000P-0805
1000P-0805
C606
VCC3 +12V
2 2
TYPEDET# 38,57
R895 2.7K
B
R894
8.2K
G
Q73
NPN-3904LT1-S-SOT23
E C
R893
4.7K
CIOBG-TYPEDET#
D S
Q72
NDS7002A-S-SOT23
B
SBA[0..7]
SBA[0..7] 38
GC_BE#[0..3]
GC_BE#[0..3] 38
GAD[0..31]
GAD[0..31] 38
ST[0..2]
ST[0..2] 28,38
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GFRAME#
GFRAME# 38
GIRDY#
GIRDY# 38
GTRDY#
GTRDY# 38
GSTOP#
GSTOP# 38
GDEVSEL#
GDEVSEL# 38
GPAR
GPAR 38
GSERR#
GSERR# 38,41
GPERR#
GPERR# 38,41
SB_STB 38
SB_STB# 38
AD_STB0 38
AD_STB0# 38
AD_STB1 38
AD_STB1# 38
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
WBF# 38
RBF# 38
PIPE# 38
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
CIOBG-TYPEDET#
U13A
P2
AD0
P1
AD1
N3
AD2
P3
AD3
M2
AD4
N1
AD5
L2
AD6
M3
AD7
L1
AD8
G1
AD9
J2
AD10
G3
AD11
H2
AD12
F1
AD13
J3
AD14
F3
AD15
B3
AD16
A3
AD17
C4
AD18
B4
AD19
C5
AD20
A4
AD21
C6
AD22
B6
AD23
C9
AD24
C7
AD25
B9
AD26
C8
AD27
C10
AD28
A9
AD29
C11
AD30
A10
AD31
D3
FRAME#
C2
IRDY#
B1
TRDY#
C1
STOP#
D2
DEVSEL#
E3
PAR
F2
SERR#
D1
PERR#
A14
SB_STB
B14
SB_STB#
K3
AD_STB0
L3
AD_STB0#
A7
AD_STB1
B7
AD_STB1#
J1
C/BE0#
H3
C/BE1#
A2
C/BE2#
A6
C/BE3#
C15
WBF#
C16
RBF#
A17
PIPE#
B15
SBA0
A15
SBA1
C14
SBA2
C13
SBA3
C12
SBA4
B12
SBA5
B11
SBA6
A12
SBA7
B17
ST_0
B18
ST_1
C17
ST_2
T2
TYPEDET#
CIOBG
C20
DEBUG0
DEBUG1
D18
DEBUG2
E18
E19
DEBUG3
DEBUG4
E20
DEBUG5
W18
Y18
DEBUG6
IMB_RCOMP
IMBCOMP_PU
IMBCOMP_PD
TESTMODE#
DEBUG7
Y19
VCC25
R187 X_R
R177 X_R
R189 X_R
R178 X_R
R188 X_R
R193 X_R
R194 X_R
R195 X_R
DO NOT STUFF
B_IMB_D_R[0..15] 13
B_IMB_D_T[0..15] 13
IMBD_T0
IMBD_T1
IMBD_T2
IMBD_T3
IMBD_T4
IMBD_T5
IMBD_T6
IMBD_T7
IMBD_T8
IMBD_T9
IMBD_T10
IMBD_T11
IMBD_T12
IMBD_T13
IMBD_T14
IMBD_T15
IMBCLK_T0
IMBCLK_T1
IMBCON_T
IMBPAR_T
IMBD_R0
IMBD_R1
IMBD_R2
IMBD_R3
IMBD_R4
IMBD_R5
IMBD_R6
IMBD_R7
IMBD_R8
IMBD_R9
IMBD_R10
IMBD_R11
IMBD_R12
IMBD_R13
IMBD_R14
IMBD_R15
IMBCLK_R0
IMBCLK_R1
IMBCON_R
IMBPAR_R
IMBREFV
AGP_GNT#
AGP_REQ#
PCIRST#
APLLRST
AGPFBCLK
AGPCLKO
ALERT
MIMP_N
MIMP_P
AGPREFV
CLKIN
SCK
SDA
NC
C
G19
F18
G20
G18
H18
J18
J19
J20
K18
M18
R20
N19
N20
R19
T18
P18
L20
L19
R18
N18
W13
V12
V13
W15
V15
V14
Y15
V11
Y13
V7
W7
V8
W9
V9
Y9
Y7
Y11
W11
V6
V10
V16
V5
Y5
U19
U20
A19
A18
T1
R212 0
W4
Y4
U3
W1
V2
W3
T3
R211 1K
V4
C19
B20
R3
B_IMB_D_R[0..15]
B_IMB_D_T[0..15]
B_IMB_D_R0
B_IMB_D_R1 B_IMB_D_R1
B_IMB_D_R2 B_IMB_D_R2 B_IMB_D_R2
B_IMB_D_R3
B_IMB_D_R4 B_IMB_D_R4
B_IMB_D_R5
B_IMB_D_R6 B_IMB_D_R6
B_IMB_D_R7
B_IMB_D_R8
B_IMB_D_R9
B_IMB_D_R10 B_IMB_D_R10
B_IMB_D_R11
B_IMB_D_R12 B_IMB_D_R12
B_IMB_D_R13
B_IMB_D_R14 B_IMB_D_R14
B_IMB_D_R15
R936 0
R937 0
B_IMB_D_T0
B_IMB_D_T1
B_IMB_D_T2
B_IMB_D_T3
B_IMB_D_T4
B_IMB_D_T5
B_IMB_D_T6
B_IMB_D_T7
B_IMB_D_T8
B_IMB_D_T9
B_IMB_D_T10
B_IMB_D_T11
B_IMB_D_T12
B_IMB_D_T13
B_IMB_D_T14
B_IMB_D_T15
VREF_IMB_CIOB-G
RXCOMP
IMBCOMP_PU
IMBCOMP_PD
PCIRST#
AGPFBCLK
AGPCLKO
MIMP_N
MIMP_P
C197
0.1U
AGPCLKO
AGP_CKBF_33MHZ 22
B_IMB_CON_R 13
B_IMB_PAR_R 13
B_IMB_CLK_T_P_R 13
B_IMB_CLK_T_N_R 13
B_IMB_CON_T 13
B_IMB_PAR_T 13
VREF_IMB_CIOB-G
1
TP1
GGNT# 28,38
GREQ# 38
PCIRST# 25,38,40,60
PS_PWRGD# 12,25,41,59
R225 1K
PCICLK_CIOB-G 22
RCC_SCL 13,16,25,49,51,52,54
RCC_SDA 13,16,25,49,51,52,54
ALERT# 25,41
VCC25
AGPREFV_TO_HE 38
R257 22
AGPCLK_CONN2
B_IMB_CLK_R_P 13
B_IMB_CLK_R_N 13
R886
X_10P
AGPCLK_CONN1
C181
X_10P
D
CLKB2
CLKB1
VCC3
X_10P
VCC3
C666
0.1U
C689
CIOBG-FB
8
FBK
7
VDD
6
5
R887 22
U62
1
REF
2
CLKA2
3
CLKA1
22
4
GND
C688
X_CY2304-2
E
VDD_IMB
RXCOMP
R190 100
IMBCOMP_PU
R888 X_R
IMBCOMP_PD
R889 100
IMBCOMP_PU
R890 255
IMBCOMP_PD
R176 X_R
VAGP_CARD VAGP_CARD
MIMP_N
MIMP_P
R175 51
R174 51
C144
0.1U
VDD_IMB
VREF_IMB_CIOB-G
R192
100
R191
C150
C149
1U
0.1U
AGPCLK_CONN
AGPCLK_CONN 38
AGPCLK_CONN1
AGPCLK_CONN2
100
R953 0
R954 X_0
1 1
Micro Star Restricted Secret
Title
CIOB-X2 AGP & IMB
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
27 68
of
Rev
0D
Page 28
A
VDD_IMB
U13B
D20
F19
H20
H17
K19
L17
M20
P19
P17
T20
U18
U14
U10
U7
V19
V17
W20
W16
W12W8W6
Y17
Y14
VDD15_18
VDD15_17
GND88
GND89
Y12Y8Y6
VDD15_16
VDD15_15
GND90
GND91
Y10
VDD15_14
VDD15_13
VDD15_12
VDD15_11
VDD15_10
GND92
GND93
GND94
GND95
GND96
GND97
D16
D14
D11D8D5E4H4L4P4
GND98
CIOBG
GND99
GND100
N17
GND101
E17
GND102
G17
K17
GND103
GND104
T17
GND105
GND106
T4
A20
GND1
A16
GND2
A11
GND3
A5
GND4
VDD15_42
VDD15_40
VDD15_38
VDD15_37
VDD15_36
VDD15_34
VDD15_33
VDD15_31
VDD15_30
VDD15_29
VDD15_27
VDD15_25
VDD15_22
VDD15_20
V20
GND79
V18
GND80
W19
GND81
W17
GND82
GND83
W14
GND84
W10W5W2
GND85
GND86
Y20
VDD15_19
GND87
Y16
B13
GND5
B8
GND6
B2
GND7
4 4
3 3
C18
GND8
D19
GND9
D17
GND10
D15
GND11
D12
GND12
D9
GND13
D6
GND14
D4
GND15
E1
GND16
F20
GND17
F17
GND18
F4
GND19
G2
GND20
H19
GND21
H13
GND22
H12
GND23
H11
GND24
H10
GND25
H9
GND26
H8
GND27
J17
GND28
J13
GND29
J12
GND30
J11
GND31
J10
GND32
J9
GND33
J8
GND34
J4
GND35
K20
GND36
K13
GND37
K12
GND38
K11
GND39
K10
GND40
K9
GND41
K8
GND42
K1
GND43
L18
GND44
L13
GND45
L12
GND46
L11
GND47
L10
GND48
L9
GND49
L8
GND50
M19
GND51
M17
GND52
M13
GND53
M12
GND54
M11
GND55
M10
GND56
M9
GND57
M8
GND58
M4
GND59
N13
GND60
N12
GND61
N11
GND62
N10
GND63
N9
GND64
N8
GND65
N2
GND66
P20
GND67
R17
GND68
R4
GND69
R1
GND70
T19
GND71
U17
GND72
GND73
GND74
GND75
GND76
GND77
GND78
U15
U12U9U6U5U2
GND107
U16
AGPPLL_VSS
AGPPLL_VDD
IMBPLL_VSS
IMBPLL_VDD
GND108
GND109
U13
U11
VDD25_1
VDD25_2
VDD25_3
VDD25_4
VDD25_5
VDD25_6
VDD25_7
VDD25_8
VDD25_9
VDD25_10
VDD25_11
VDD25_12
VDD25_13
VDD25_14
VDD25_15
VDD25_16
VDD25_17
VDD25_18
VDD25_19
VDD25_20
VDD25_21
VDD25_22
VDD25_23
VDD25_24
VDD25_25
VDD25_26
VDD25_27
VDD25_28
VDDQ10
VDDQ12
VDDQ14
VDDQ17
VDDQ18
VDDQ20
VDDQ21
VDDQ22
VDDQ24
VDDQ25
VDDQ27
GND110
U8
VDDQ
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
GND111
U4V3Y1
GND112
B
G14
G13
G12
G11
G10
G9
G8
G7
H14
H7
J14
J7
K14
K7
L14
L7
M14
M7
N14
N7
P14
P13
P12
P11
P10
P9
P8
P7
A13
A8
A1
B19
B16
B10
B5
C3
D13
D10
D7
E2
G4
H1
K4
K2
M1
N4
R2
V1
U1
Y2
Y3
VCC25
VAGP_CARD
AGPPLL_VDD
CIOB-G_IMBPLL_VDD
ST1
Pullup is on sheet AGP MISC. sheet
R185 X_R
ST1: IMB_READ/WRITE POINTER DLY
1 : 5 CLOCKs (*)
0 : 6 CLOCKs
Please refer to 'CMIC STRAPPING OPTIONS' sheet
for following strappings in CIOB-G and CIOB-x2
: -
: -
: -
C
ST1 27,38
IMB - DETERMINISTIC/ NON
DETERMINISTIC
IMB CRC or PARITY
IMB_TRAINING Enable/Disable
D
VCC3
R183
2.2K
Do not stuff
GGNT#
AGP_GNT#
R186
1: APLL Enabled (*)
X_R
0: APLL Disabled
GGNT# 27,38
E
ST0: IMB Compensation for IMB Buffer
Pullup is on sheet AGP MISC. sheet
ST0
ST0 27,38
1 : Pick default values from memory
mapped Register D5,D6,D7h (*)
0 : Compute comp. value based on value
of R_COMP register
R891 X_R
2 2
VAGP_CARD
VDD_IMB VCC25
SC10
SC14
0.1U
0.1U
VAGP_CARD
SC7
SC16
SC8
0.1U
0.1U
SC18
0.1U
0.1U
SC17
SC13
0.1U
0.1U
Put on Solder Side Put on Solder Side
VCC25
SC15
SC11
0.1U
SC12
0.1U
SC9
0.1U
0.1U
C163
0.1U
VCC25 VCC25 VDD_IMB
C142
0.1U
VDD_IMB
C171
C180
C199
C201
0.1U
0.1U
VCC25
C143
0.1U
0.1U
VAGP_CARD
+
+
EC29
EC31
1000U
1000U
1000P-0805
+
EC40
1000U
C200
1000P-0805
C202
1000P-0805
C174
1000P-0805
AGPPLL_VDD
+
L15 47U
EC41
10U
VCC25
R255
4.7
CIOB-G_IMBPLL_VDD
+
L14 47U
EC45
10U
R249
4.7
Put on Solder Side
C161
C162
C147
1 1
A
B
C
0.1U
C148
0.1U
0.1U
C146
1000P-0805
C145
1000P-0805
1000P-0805
D
Micro Star Restricted Secret
Title
CIOB-X2 Power & Strapping Optoin
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
28 68
Rev
0D
of
Page 29
A
B
C
D
E
CREATIVE CT5880 PCI AUDIO
AD[0..31]
AD[0..31] 40,43
CBE#[0..3]
CBE#[0..3] 40,43
4 4
FRAME# 40,43
IRDY# 40,43
TRDY# 40,43
DEVSEL# 40,43
STOP# 40,43
PAR 40,43
SERR# 40,41,43
PIRQ#1 42
C739 22P
C740 22P
3 3
VCC
R594 2.7K
VCC
VCC
VCC
Y4
24M-16PF-HC49S-D
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AUDIO_ID
CODEC_CLK
R994 X_4.7K
R995 X_4.7K
R996 X_4.7K
R1140 10K
VCC
PREQ#2
46
45
44
43
41
40
39
38
34
33
32
30
29
28
27
24
15
16
18
19
20
22
21
81
65
R992
1M
66
63
52
48
49
53
54
55
56
12
25
37
50
62
74
85
100
80
83
90
95
U64
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
FRAME#
IRDY#
TRDY#
DEVSEL#
2
IDSEL
STOP#
PAR
SERR#
INTA#
XI
XO
XO_BUF
ICLKI
DIF_T/ISERI
DIF/IBCK
GPIO0
GPIO1
GPIO2/EDAT
GPIO3/ECK
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
CAT-CT58805V-VD
IDSEL = AD20
MASTER = PREQ2
PCI
POWER
GAME MISC.
AC97
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PCICLK
JYS_AX0
JYS_AX1
JYS_AX2
JYS_AX3
JYS_PB0
JYS_PB1
JYS_PB2
JYS_PB3
MIDI_IN
MINI_OUT
AC_RST#
AD16 AD0
13
AD16
AD17
10
AD17
AD18
9
AD18
AD19
8
AD19
AD20
7
AD20
AD21
5
AD21
AD22
4
AD22
AD23
3
AD23
AD24
98
AD24
AD25
97
AD25
AD26
96
AD26
AD27
94
AD27
AD28
93
AD28
AD29
92
AD29
AD30
91
AD30
AD31
89
AD31
CBE#0
35
CBE#1
23
CBE#2
14
CBE#3
99
87
REQ#
86
GNT#
82
RST#
84
JYS_AX0
79
JYS_AX1
78
JYS_AX2
77
JYS_AX3
76
JYS_PB0
73
JYS_PB1
72
JYS_PB2
71
JYS_PB3
70
68
69
CT_RST#
88
CT_SDIN0
59
SDI
CT_SDOUT
61
SDO
AC_BITCLK
60
BCLK
CT_SYNC
58
SYNC
1
GND
6
GND
11
GND
17
GND
26
GND
31
GND
36
GND
42
GND
47
GND
51
GND
57
GND
64
GND
67
GND
75
GND
PREQ#2 40
PGNT#2 40
PCIRST2# 43,47,60
5880PCLK 22
AC_BITCLK
R1255 0
CT_SDOUT
R993 33
CT_SDIN0
C741
CT_SYNC
22P
CT_RST#
VCCSPK 58
VCC
C734
1U
CODEC VCC NEED CAP AS
CLOSE AS POSSIBLE.
VCC
For EMI
C738
0.1U
CODEC_CLK
JS0 30
1
2
3
4
5
6
7
8
9
10
11
12
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
R1254
R1258
X_0
X_0
JS0
4847464544424140394338
EAPD
SPDIF
GPIO1
CIDO1
CIDO0
PHONE
AUXL
AUXR
VIDEOL
VIDEOR
1314151617181920212223
C830
0.1U
GPIO0
AVSS2
CDLNCCDR
HP_COMM
HP_OUT_L
HP_OUT_R
MIC1
MIC2
R1193 5.1RST
R1194 5.1RST
37
U65
MONO
AVDD2
LOUTR
LOUTL
VRDA
VRAD
AFILT2
AFILT1
VREF
AVSS1
AVDD1
LINL
LINR
24
LINE_IN_R
LINE_IN_L
CDL
NC
NC
NC
0.1U C824
C751
1U-0805
C752
1U-0805
C753
1U-0805
C754
1U-0805
C894
1U
36
35
34
33
32
31
30
29
28
27
26
25
STAC9750
+5VR
LINE_OUT_R
LINE_OUT_L
C748
0.1U
C749
1U-0805
C750
1U-0805
R1006
15K
R1007
15K
EC137 100U
EC138 100U
C893
1U
SPKOUT
R1003
R1008
15K
HPOUT_R 30
HPOUT_L 30
SPKOUT 30
AUD_OUT_R
10U EC139
+
+
C742
1U
AUD_IN_R
AUD_IN_R 30
AUD_IN_L
AUD_IN_L 30
MIC_IN
1K
R1004
R1005
15K
15K
MIC_IN 30
CDINR CDR
CDINL
10U EC140
C743
1U
AUD_OUT_L
C744
270P
Molex 52135-0520
5
4
3
2
1
D1X5-BK
5
4
3
2
1
J4
JCD
C745
270P
AUD_OUT_R 30
AUD_OUT_L 30
C746
1U
FOR NEC
C747
0.1U
VCC
2 2
PERR# 40,41,43
PLOCK# 40
DEVSEL#
TRDY#
IRDY#
FRAME#
STOP#
SERR#
PAR
PERR#
PLOCK#
1
2
3
4
6
7
8
9510
R237 2.7K
R1205 2.7K
R1206 2.7K
RP3
1
2
3
4
6
7
8
9510
2.7K
VCC
TO DISABLE THE GAMEPORT
JYS_AX0
R997 10K
JYS_AX1
R998 10K
JYS_AX2
R999 10K
JYS_AX3
R1000 10K
JYS_PB0
R1001 10K
JYS_PB1
R1002 10K
+12V +5VR
1 2
C895
104P
VR5
L78L00-TO92-100MA
C E
VIN VOUT
GND
B
1 2
C896
105P/0805
+5VR
1 2
1 2
C759
C760
0.1UF
1UF-0805
CT5880 SYSTEM DECOUPLING CAPACITORS
VCC VCC
C757
0.1U
C761
0.1U
C763
1 1
0.1U
C758
0.1U
C762
0.1U
C764
0.1U
C765
0.1U
AD20
DIS_AUDIO
DIS_AUDIO 47
TO ENABLE/DISABLE AUDIO
A
B
C
U83
1
2
NC7S08-SOT23
VCC3
5
4 3
D
R1249 100
AUDIO_ID
Micro Star Restricted Secret
Title
CT5880
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
29 68
Rev
0D
of
Page 30
5
D D
4
3
2
1
J6A1
R1187
47K
R1011
4.7K
1 2
AUD_OUT_R
AUD_OUT_L
R1012
4.7K
1 2
4.7K
R1009
4.7K
R1010
1 2
1 2
AUD_OUT_R 29
AUD_OUT_L 29
AUD_IN_L 29
AUD_IN_R 29
C C
AUD_IN_L
AUD_IN_R
1000P
C886
C885
R1186
1000P
47K
2 1
FB1 FB120S
2 1
FB2 FB120S
2 1
FB3 FB120S
2 1
FB4 FB120S
JS0 29
CN13
470P
1 2
3 4
5 6
7 8
AGND
+5VR
R1256
10K
HPOUT_R 29
HPOUT_L 29
C887
1000P
B B
R1189
C888
1000P
R1190
47K
47K
2 1
FB30 FB120S
2 1
FB31 FB120S
SD
AUD_R_LINE_OUT_F
AUD_L_LINE_OUT_F
AUD_R_LINE_IN_CONN_F
AUD_L_LINE_IN_CONN_F
JS0
HD-PHONE
2
3
4
5
1
J7A1
3
TR
2
TL
23
BR
22
BL
4
R1035
1K
5
6
7
8
9
SOU1
SIN1
SOP1
SOU2
SIN2
SOP2
PHONEJACK-2
21
21
1
1
FB5A1
FB80S-0805
2 1
VCC
20K
R1259
U86
C889
SPKOUT 29
1 2
1UF
R1191 1K
4
3
2 8
1 2
SSM2211
C987
0.1UF
A A
6
+V
-IN
VOUT_A
+IN
BYPASS VOUT_B
-V
SD
7
1
5
SD
R1257
X_0
5
4
+
C986
1U
EC159
10U
AMP 171825-2
FOR NEC
2
1
3
D1X2-WH-OPEN
2
8 ohm
1
INTERNAL
J8
SPEAKER
R1013
+5VR
1.5K
FB120S
MIC_IN 29
MIC_IN
2 1
FB8
2
1 2
1 2
C755
0.1UF
1 2
1 2
C756
470PF
HD-PHONE
2
3
4
5
1
J5A1
Micro Star Restricted Secret
Title
AUDIO CONNECTOR
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
30 68
Rev
0D
of
2.2K
R1014
Page 31
5
4
3
2
P64AD[63..0]
1
P64AD[63..0] 24,32,33
-12V
-12V
D D
R113 5.6K
PIRQ#5
SCSI_INTA
SCSI_INTA 33,37
C C
B B
PIRQ#5 32,42
P64PRSNT#11
PCICLK_P1_SLT1 26
P64REQ#0 24
P64CBE#3 24,32,33
P64CBE#2 24,32,33
P64IRDY# 24,32,33
P64DEVSEL# 24,32,33
P1_PCIXCAP 24,32
P64LOCK# 24,32
P64PERR# 24,32,33,41
P64SERR# 24,32,33,41
P64CBE#1 24,32,33
P1_M66EN 24,32
P64CBE#6 24,32,33
P64CBE#4 24,32,33
VCC VCC3 +12V
PCI3
B1
-12V
B2
TCK
B3
GND_S
B4
TDO
B5
+5V_E
B6
+5V_F
B7
R1167 0
P64PRSNT#12
PCICLK_P1_SLT1
P64REQ#0
P64AD31
P64AD29
P64AD27
P64AD25
P64CBE#3
P64AD23
P64AD21
P64AD19
P64AD17
P64CBE#2
P64IRDY#
P64DEVSEL#
P1_PCIXCAP
P64LOCK#
P64PERR#
P64SERR#
P64CBE#1
P64AD14
P64AD12
P64AD10
P1_M66EN
P64AD8
P64AD7
P64AD5
P64AD3
P64AD1
P64CBE#6
P64CBE#4
P64AD63
P64AD61
P64AD59
P64AD57
P64AD55
P64AD53
P64AD51
P64AD49
P64AD47
P64AD45
P64AD43
P64AD41
P64AD39
P64AD37
P64AD35
P64AD33
B8
B9
B10
B11
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
P64IRQ1
P64IRQ3
PRSNT#1
RESV_E
PRSNT#2
RESV_F
GND_T
CLK
GND_U
REQ#
3_3V_M
AD31
AD29
GND_V
AD27
AD25
3_3V_N
C/BE#3
AD23
GND_W
AD21
AD19
3_3V_O
AD17
C/BE#2
GND_X
IRDY#
3_3V_P
DEVSEL#
GND_Y
LOCK#
PERR#
3_3V_Q
SERR#
3_3V_R
C/BE#1
AD14
GND_Z
AD12
AD10
M66EN
GND_AA
GND_BB
AD8
AD7
3_3V_S
AD5
AD3
GND_CC
AD1
3_3V_T
ACK64#
+5V_G
+5V_H
RESV_G
GND__DD
C/BE#6
C/BE#4
GND_EE
AD63
AD61
3_3V_U
AD59
AD57
GND_FF
AD55
AD53
GND_GG
AD51
AD49
3_3V_V
AD47
AD45
GND_HH
AD43
AD41
GND_II
AD39
AD37
3_3V_W
AD35
AD33
GND_JJ
RESV_H
RESV_I
SL-PCI-D184-GR
KEY
3_3VAUX_1
KEY
TRST#
P64IRQ0
P64IRQ2
RESV_A
3_3V_A
RESV_B
3_3V_B
GND_A
3_3V_C
GND_B
3_3V_D
GND_C
3_3V_E
FRAME#
GND_D
TRDY#
GND_E
STOP#
3_3V_F
SDONE
GND_F
3_3V_G
GND_G
GND_H
C/BE#0
3_3V_H
GND_J
3_3V_I
REQ64#
GND_K
C/BE#7
C/BE#5
3_3V_J
PAR64
GND_L
GND_M
3_3V_K
GND_N
GND_O
3_3V_L
GND_P
GND_Q
RESV_C
GND_R
RESV_D GND_KK
+5V_A
+5V_B
IDSEL
GND_I
+5V_C
+5V_D
VCC
PIRQ#7 42
PIRQ#9 37,42
SCSI_INTB 33,37
PCICLK_P1_SLT2 26
P64REQ#1 24
R124 5.6K
PCICLK_P1_SLT2
A1
A2
+12V
A3
TMS
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A14
A15
RST#
A16
A17
GNT#
A18
A19
PME#
A20
AD30
A21
A22
AD28
A23
AD26
A24
A25
AD24
A26
A27
A28
AD22
A29
AD20
A30
A31
AD18
A32
AD16
A33
A34
A35
A36
A37
A38
A39
A40
A41
SBO#
A42
A43
PAR
A44
AD15
A45
A46
AD13
A47
AD11
A48
A49
AD9
A50
A51
A52
A53
A54
AD6
A55
AD4
A56
A57
AD2
A58
AD0
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
AD62
A69
A70
AD60
A71
AD58
A72
A73
AD56
A74
AD54
A75
A76
AD52
A77
AD50
A78
A79
AD48
A80
AD46
A81
A82
AD44
A83
AD42
A84
A85
AD40
A86
AD38
A87
A88
AD36
A89
AD34
A90
A91
AD32
A92
A93
A94 B94
R116 5.6K
P64TMS1
P64TDI1
PIRQ#4
R1166 0
P1PCIRST#
P64GNT#0
P1_P64PME#
P64AD30
P64AD28
P64AD26
P64AD24
R210 100
P64AD22
P64AD20
P64AD18
P64AD16
P64FRAME#
P64TRDY#
P64STOP#
P64SDONEP1
P64SBOP1
P64PAR
P64AD15
P64AD13
P64AD11
P64AD9
P64CBE#0
P64AD6
P64AD4
P64AD2
P64AD0
P64REQ#64 P64ACK#64
P64CBE#7
P64CBE#5
P64PAR64
P64AD62
P64AD60
P64AD58
P64AD56
P64AD54
P64AD52
P64AD50
P64AD48
P64AD46
P64AD44
P64AD42
P64AD40
P64AD38
P64AD36
P64AD34
P64AD32
P64AD18
INT#[4,5,SCSIA,SCSIB]
P64REQ#/P64GNT#[0]
P64TMS1 33
P64TDI1 33,37
PIRQ#4 32,42
SCSI_INTB
3VSB
P1PCIRST# 32,33,34,60
P64GNT#0 24,26,33
P1_P64PME# 32,47
P64AD18
P64FRAME# 24,32,33
P64TRDY# 24,32,33
P64STOP# 24,32,33
P64PAR 24,32,33
P64CBE#0 24,32,33
P64REQ#64 24,32,33 P64ACK#64 24,32,33
P64CBE#7 24,32,33
P64CBE#5 24,32,33
P64PAR64 24,32,33
VCC3 VCC +12V
PCI1
B1
-12V
B2
TCK
B3
GND_S
B4
TDO
B5
+5V_E
B6
B10
B11
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B7
B8
B9
+5V_F
P64IRQ1
P64IRQ3
PRSNT#1
RESV_E
PRSNT#2
RESV_F
GND_T
CLK
GND_U
REQ#
3_3V_M
AD31
AD29
GND_V
AD27
AD25
3_3V_N
C/BE#3
AD23
GND_W
AD21
AD19
3_3V_O
AD17
C/BE#2
GND_X
IRDY#
3_3V_P
DEVSEL#
GND_Y
LOCK#
PERR#
3_3V_Q
SERR#
3_3V_R
C/BE#1
AD14
GND_Z
AD12
AD10
M66EN
GND_AA
GND_BB
AD8
AD7
3_3V_S
AD5
AD3
GND_CC
AD1
3_3V_T
ACK64#
+5V_G
+5V_H
RESV_G
GND__DD
C/BE#6
C/BE#4
GND_EE
AD63
AD61
3_3V_U
AD59
AD57
GND_FF
AD55
AD53
GND_GG
AD51
AD49
3_3V_V
AD47
AD45
GND_HH
AD43
AD41
GND_II
AD39
AD37
3_3V_W
AD35
AD33
GND_JJ
RESV_H
RESV_I
CARD-D184
PIRQ#7
PIRQ#9
P64PRSNT#21
P64PRSNT#22
P64REQ#1
P64AD31
P64AD29
P64AD27
P64AD25
P64CBE#3
P64AD23
P64AD21
P64AD19
P64AD17
P64CBE#2
P64IRDY#
P64DEVSEL#
P1_PCIXCAP
P64LOCK#
P64PERR#
P64SERR#
P64CBE#1
P64AD14
P64AD12
P64AD10
P1_M66EN
P64AD8
P64AD7
P64AD5
P64AD3
P64AD1
P64ACK#64 P64REQ#64
P64CBE#6
P64CBE#4
P64AD63
P64AD61
P64AD59
P64AD57
P64AD55
P64AD53
P64AD51
P64AD49
P64AD47
P64AD45
P64AD43
P64AD41
P64AD39
P64AD37
P64AD35
P64AD33
KEY
KEY
TRST#
P64IRQ0
P64IRQ2
RESV_A
3_3V_A
RESV_B
3_3VAUX_1
3_3V_B
GND_A
3_3V_C
GND_B
3_3V_D
GND_C
3_3V_E
FRAME#
GND_D
TRDY#
GND_E
STOP#
3_3V_F
SDONE
GND_F
3_3V_G
GND_G
GND_H
GND_I
C/BE#0
3_3V_H
GND_J
3_3V_I
REQ64#
GND_K
C/BE#7
C/BE#5
3_3V_J
PAR64
GND_L
GND_M
3_3V_K
GND_N
GND_O
3_3V_L
GND_P
GND_Q
RESV_C
GND_R
RESV_D GND_KK
+5V_A
+5V_B
GNT#
IDSEL
+5V_C
+5V_D
VCC
VCC3
A1
A2
+12V
A3
TMS
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A14
A15
RST#
A16
A17
A18
A19
PME#
A20
AD30
A21
A22
AD28
A23
AD26
A24
A25
AD24
A26
A27
A28
AD22
A29
AD20
A30
A31
AD18
A32
AD16
A33
A34
A35
A36
A37
A38
A39
A40
A41
SBO#
A42
A43
PAR
A44
AD15
A45
A46
AD13
A47
AD11
A48
A49
AD9
A50
A51
A52
A53
A54
AD6
A55
AD4
A56
A57
AD2
A58
AD0
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
AD62
A69
A70
AD60
A71
AD58
A72
A73
AD56
A74
AD54
A75
A76
AD52
A77
AD50
A78
A79
AD48
A80
AD46
A81
A82
AD44
A83
AD42
A84
A85
AD40
A86
AD38
A87
A88
AD36
A89
AD34
A90
A91
AD32
A92
A93
A94 B94
R120 5.6K
P64TMS2
P64TDI2
PIRQ#6
PIRQ#8
3VSB
P1PCIRST#
P64GNT#1
P1_P64PME#
P64AD30
P64AD28
P64AD26
P64AD24
R200 100
P64AD22
P64AD20
P64AD18
P64AD16
P64FRAME#
P64TRDY#
P64STOP#
P64SDONEP2
P64SBOP2
P64PAR
P64AD15
P64AD13
P64AD11
P64AD9
P64CBE#0
P64AD6
P64AD4
P64AD2
P64AD0
P64CBE#7
P64CBE#5
P64PAR64
P64AD62
P64AD60
P64AD58
P64AD56
P64AD54
P64AD52
P64AD50
P64AD48
P64AD46
P64AD44
P64AD42
P64AD40
P64AD38
P64AD36
P64AD34
P64AD32
P64AD19
INT#[6,7,8,9]
P64REQ#/P64GNT#[1]
PIRQ#6 42
PIRQ#8 37,42
P64GNT#1 24,26
P64AD19
P64PRSNT#21
P64PRSNT#22
P64PRSNT#11
P64PRSNT#12
P64REQ#1
P64REQ#0
P64GNT#1
P64GNT#0
P64ACK#64
P64REQ#64
P64PAR64
P1_M66EN
P64DEVSEL#
P64TRDY#
P64IRDY#
P64FRAME#
P64SERR#
P64PERR#
P64LOCK#
P64STOP#
P64PAR
P64TDI2
P64TMS2
P64TDI1
P64TMS1
8.2K
P64SDONEP2
P64SDONEP1
P64SBOP1
P64SBOP2
2.7K
C115
0.01U
C114
0.01U
RN15
RN40
1 2
3 4
5 6
7 8
8.2K
R158 2.7K
R157 2.7K
R153 X_2.7K
R152 X_2.7K
R277 2.7K
R279 2.7K
R319 2.7K
R254 2.7K
RP1
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9510
9510
R233 2.7K
C110
0.01U
C109
0.01U
1 2
3 4
5 6
7 8
VCC3
VCC3
VCC3
A A
5
VCC3 VCC VCC3 VCC
+
EC141
1000U
+
EC142
1000U
4
+
EC143
1000U
3
+
EC144
1000U
+
EC145
1000U
+
EC146
1000U
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
P1 PCI 64/66' Slot 1/2
Last Revision Date:
Sheet
1
Thursday, March 21, 2002
31 68
Rev
0D
of
Page 32
5
4
3
2
1
P64AD[63..0]
-12V
VCC
PIRQ#3
PIRQ#5
P64PRSNT#31
P64PRSNT#32
P64REQ#3
P64AD31
P64AD29
P64AD27
P64AD25
P64CBE#3
P64AD23
P64AD21
P64AD19
P64AD17
P64CBE#2
P64IRDY#
P64DEVSEL#
P1_PCIXCAP
P64LOCK#
P64PERR#
P64SERR#
P64CBE#1
P64AD14
P64AD12
P64AD10
P1_M66EN
P64AD8
P64AD7
P64AD5
P64AD3
P64AD1
P64ACK#64
P64CBE#6
P64CBE#4
P64AD61
P64AD59
P64AD57
P64AD55
P64AD53
P64AD51
P64AD49
P64AD47
P64AD45
P64AD43
P64AD41
P64AD39
P64AD37
P64AD35
P64AD33
VCC3
PCI2
B1
-12V
B2
TCK
B3
GND_S
B4
TDO
B5
+5V_E
B6
+5V_F
B7
P64IRQ1
B8
P64IRQ3
B9
PRSNT#1
B10
RESV_E
B11
PRSNT#2
B14
RESV_F
B15
GND_T
B16
CLK
B17
GND_U
B18
REQ#
B19
3_3V_M
B20
AD31
B21
AD29
B22
GND_V
B23
AD27
B24
AD25
B25
3_3V_N
B26
C/BE#3
B27
AD23
B28
GND_W
B29
AD21
B30
AD19
B31
3_3V_O
B32
AD17
B33
C/BE#2
B34
GND_X
B35
IRDY#
B36
3_3V_P
B37
DEVSEL#
B38
GND_Y
B39
LOCK#
B40
PERR#
B41
3_3V_Q
B42
SERR#
B43
3_3V_R
B44
C/BE#1
B45
AD14
B46
GND_Z
B47
AD12
B48
AD10
B49
M66EN
B50
GND_AA
B51
GND_BB
B52
AD8
B53
AD7
B54
3_3V_S
B55
AD5
B56
AD3
B57
GND_CC
B58
AD1
B59
3_3V_T
B60
ACK64#
B61
+5V_G
B62
+5V_H
B63
RESV_G
B64
GND__DD
B65
C/BE#6
B66
C/BE#4
B67
GND_EE
B68
AD63
B69
AD61
B70
3_3V_U
B71
AD59
B72
AD57
B73
GND_FF
B74
AD55
B75
AD53
B76
GND_GG
B77
AD51
B78
AD49
B79
3_3V_V
B80
AD47
B81
AD45
B82
GND_HH
B83
AD43
B84
AD41
B85
GND_II
B86
AD39
B87
AD37
B88
3_3V_W
B89
AD35
B90
AD33
B91
GND_JJ
B92
RESV_H
B93
RESV_I
CARD-D184
KEY
KEY
TRST#
+5V_A
P64IRQ0
P64IRQ2
+5V_B
RESV_A
3_3V_A
RESV_B
3_3VAUX_1
3_3V_B
GND_A
3_3V_C
GND_B
3_3V_D
GND_C
3_3V_E
FRAME#
GND_D
TRDY#
GND_E
STOP#
3_3V_F
SDONE
GND_F
3_3V_G
GND_G
GND_H
GND_I
C/BE#0
3_3V_H
GND_J
3_3V_I
REQ64#
+5V_C
+5V_D
GND_K
C/BE#7
C/BE#5
3_3V_J
PAR64
GND_L
GND_M
3_3V_K
GND_N
GND_O
3_3V_L
GND_P
GND_Q
RESV_C
GND_R
RESV_D GND_KK
GNT#
PME#
IDSEL
SBO#
+12V
TMS
TDI
RST#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
PAR
AD15
AD13
AD11
AD9
AD6
AD4
AD2
AD0
AD62
AD60
AD58
AD56
AD54
AD52
AD50
AD48
AD46
AD44
AD42
AD40
AD38
AD36
AD34
AD32
D D
R1179 5.6K
PIRQ#3 42,47
PIRQ#5 31,42
PCICLK_P1_SLT3 26
C C
B B
A A
PCICLK_P1_SLT3
P64REQ#3 24
P64CBE#3 24,31,33
P64CBE#2 24,31,33
P64IRDY# 24,31,33
P64DEVSEL# 24,31,33
P1_PCIXCAP 24,31
P64LOCK# 24,31
P64PERR# 24,31,33,41
P64SERR# 24,31,33,41
P64CBE#1 24,31,33
P1_M66EN 24,31
P64ACK#64 24,31,33
P64CBE#4 24,31,33
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94 B94
+12V VCC
R1178 5.6K
P64TMS3
P64TDI3
PIRQ#2
PIRQ#4
3VSB
P1PCIRST#
P64GNT#3
P1_P64PME#
P64AD30
P64AD28
P64AD26
P64AD24
P64AD22
P64AD20
P64AD18
P64AD16
P64FRAME#
P64TRDY#
P64STOP#
P64SDONEP3
P64SBOP3
P64PAR
P64AD15
P64AD13
P64AD11
P64AD9
P64CBE#0
P64AD6
P64AD4
P64AD2
P64AD0
P64REQ#64
P64REQ#64 24,31,33
P64CBE#7
P64CBE#5
P64PAR64
P64AD62 P64AD63
P64AD60
P64AD58
P64AD56
P64AD54
P64AD52
P64AD50
P64AD48
P64AD46
P64AD44
P64AD42
P64AD40
P64AD38
P64AD36
P64AD34
P64AD32
P64AD21
INT#[2,3,4,5]
P64REQ#/P64GNT#[3]
PIRQ#2 42
PIRQ#4 31,42
P1PCIRST# 31,33,34,60
P64GNT#3 24,26
P1_P64PME# 31,47
P64AD21
R1180 100
P64FRAME# 24,31,33
P64TRDY# 24,31,33
P64STOP# 24,31,33
P64PAR 24,31,33
P64CBE#0 24,31,33
P64CBE#7 24,31,33
P64CBE#5 24,31,33 P64CBE#6 24,31,33
P64PAR64 24,31,33
P64AD[63..0] 24,31,33
P1_M66EN
P1_PCIXCAP
+
EC53
1000U
PCI BUS
P64TDI3
P64TMS3
P64SDONEP3
P64SBOP3
8.2K
P64PRSNT#31
P64PRSNT#32
C198
0.01U
C164
0.01U
VCC3
+
EC28
1000U
RN158
VCC3
1 2
3 4
5 6
7 8
C837
C838
0.01U
0.01U
VCC
+
EC18
1000U
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
P1 PCI 64/66' Slot 3
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
32 68
of
Rev
0D
Page 33
8
D D
C C
B B
A A
8
7
P64AD20
INT#[8,9]
P64REQ#/P64GNT#[2]
SCSIPCLK
SCSIPCLK 26
P64GNT#2
P64GNT#2 24
SCSI_ID
SCSI_INTA
SCSI_INTA 31,37
SCSI_INTB
SCSI_INTB 31,37
VCC3
RN71
8.2K
P64AD36
1 2
P64AD37
3 4
P64AD38
5 6
P64AD39
7 8
P64AD32
1 2
P64AD33
3 4
P64AD34
5 6
P64AD35
7 8
RN74 8.2K
VCC3
RP9
P64AD46
1
5
1
P64AD47
2
2
P64AD45
3
3
P64AD44
4
4
P64AD42
6
6
P64AD43
7
7
P64AD41
8
8
P64AD40
9
10
9510
VCC3
8.2K
RP6
P64AD54
1
5
1
P64AD55
2
2
P64AD53
3
3
P64AD52
4
4
P64AD50
6
6
P64AD51
7
7
P64AD49
8
8
P64AD48
9
10
9510
8.2K
VCC3
RP4
P64AD62
1
5
1
P64AD63
2
2
P64AD61
3
3
P64AD60
4
4
P64AD58
6
6
P64AD59
7
7
P64AD57
8
8
P64AD56
9
10
9510
8.2K
VCC3
RN57
P64CBE#4
1 2
P64CBE#5
3 4
P64CBE#6
5 6
P64CBE#7
7 8
8.2K
Place near the PCI slot 2
Zero Channel RAID Ckt
7
6
VIO8 VIO9
VIO7
VIO6
VIO5
VIO4
VIO3
VIO2
VIO1
PREQ
TD0
ACK64
REQ64
PAR64
FRAME
IRDY
PAR
DEVSEL
TRDY
STOP
PERR
SERR
CBE7
CBE6
CBE5
CBE4
CBE3
CBE2
CBE1
CBE0
ROMOE
SEECS
MWE
RAMCS
ROMCS
BRDWE
BRDOE
RAMPS
MDP
MA15
MA14
MA13
MA12
MA11
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
SEECK
SEEDI
SEEDO
U44A
14
Q
+3.3V
Q
GND
74LVC74S-SOIC14
7
P64AD[63..0]
AB7 Y5
AB8
AB11
AB12
AB15
AB16
AB19
AB20
P64REQ#2
AF1
R4
P64ACK64#
AC15
P64REQ64#
AD15
P64PAR64
AF16
P64FRAME#
AD7
P64IRDY#
AE7
P64PAR
AD9
P64DEVSEL#
AD8
P64TRDY#
AC8
P64STOP#
AE8
P64PERR#
AF8
P64SERR#
AC9
P64CBE#7
AE15
P64CBE#6
AC16
P64CBE#5
AD16
P64CBE#4
AE16
P64CBE#3
AD4
P64CBE#2
AC7
P64CBE#1
AE9
P64CBE#0
AD12
H23
D12
P24
SEECS
AC26
T23
W4
N23
AB25
EXTARBACK*
AB26
AB24
AB23
V4
T24
T25
R25
R24
T26
P25
P23
P26
R23
U23
U24
U25
U26
V23
V24
V25
W23
KY7
AA23
KY6
Y26
KY5
Y25
KY4
Y24
KY3
Y23
KY2
W26
KY1
W25
KY0
W24
SEMD2
AC25
SEMD0
AC23
SEMD1
AC24
SEECS
5
ZCR_IDSEL
6
P64AD[63..0] 24,31,32
VCC3
U36B
AIC-7899W
T1
PCLK
R3
TRST
AE1
GNT
AE4
IDSEL
AB3
IRQA
AB2
IRQB
AB4
IDDQ
T4
PCI
TCK
U4
TMS
P4
AC17
AD17
AE17
AF17
AC18
AD18
AE18
AC19
AD19
AE19
AC20
AD20
AE20
AF20
AC21
AD21
AE21
AC22
AD22
AE22
AD23
AE23
AF23
AD24
AF24
AE24
AF26
AF25
AE26
AE25
AD26
AD25
AC2
AD2
AE2
AC3
AD3
AE3
AF3
AC4
AF4
AC5
AD5
AE5
AF5
AC6
AD6
AE6
AC10
AD10
AE10
AC11
AD11
AE11
AF11
AC12
AE12
AC13
AD13
AE13
AF13
AC14
AD14
AE14
VCC3
P1PCIRST# 31,32,34,60
P64GNT#0
ZCRPCLK
R728 10K
RN34
TDI
AD63
AD62
AD61
AD60
AD59
AD58
AD57
AD56
AD55
AD54
AD53
AD52
AD51
AD50
AD49
AD48
AD47
AD46
AD45
AD44
AD43
AD42
AD41
AD40
AD39
AD38
AD37
AD36
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
P1PCIRST#
1 2
3 4
5 6
7 8
8.2K
2
3
6
MEMORY
AIC7899W
P64CBE#2
P64CBE#3
P64CBE#0
P64CBE#1
4
D
CLK
1
TERMPWRA
TERMPWRB
EXTARBREQ
EXTARBACK
VBAT
PR
CL
P64AD63
P64AD62
P64AD61
P64AD60
P64AD59
P64AD58
P64AD57
P64AD56
P64AD55
P64AD54
P64AD53
P64AD52
P64AD51
P64AD50
P64AD49
P64AD48
P64AD47
P64AD46
P64AD45
P64AD44
P64AD43
P64AD42
P64AD41
P64AD40
P64AD39
P64AD38
P64AD37
P64AD36
P64AD35
P64AD34
P64AD33
P64AD32
P64AD31
P64AD30
P64AD29
P64AD28
P64AD27
P64AD26
P64AD25
P64AD24
P64AD23
P64AD22
P64AD21
P64AD20
P64AD19
P64AD18
P64AD17
P64AD16
P64AD15
P64AD14
P64AD13
P64AD12
P64AD11
P64AD10
P64AD9
P64AD8
P64AD7
P64AD6
P64AD5
P64AD4
P64AD3
P64AD2
P64AD1
P64AD0
P64GNT#0 24,26,31
ZCRPCLK 26
VCC3
5
VCC SVCC33
R693 0
VCC3
R686 X_0
P64REQ#2 24
P64ACK#64 24,31,32
P64REQ#64 24,31,32
P64PAR64 24,31,32
P64FRAME# 24,31,32
P64IRDY# 24,31,32
P64PAR 24,31,32
P64DEVSEL# 24,31,32
P64TRDY# 24,31,32
P64STOP# 24,31,32
P64PERR# 24,31,32,41
P64SERR# 24,31,32,41
P64CBE#7 24,31,32
P64CBE#6 24,31,32
P64CBE#5 24,31,32
P64CBE#4 24,31,32
P64CBE#3 24,31,32
P64CBE#2 24,31,32
P64CBE#1 24,31,32
P64CBE#0 24,31,32
R633 220
R670 220
B C
E
D19
X_LM431
SEMD2 37
SEMD0 37
SEMD1 37
SEECS 37
B C
E
LM431
7899W=Open
7902
=LM431
EXTARBACK (AB26)
7899W=EXTARBACK
7902 =Reserved
KY0
KY1
KY2
KY4
KY5
KY6
KY3
KY7
5
D20
X_LM431
7899W=2.85V
7902 =2.5V
7899W=2.85V
7902 =2.5V
7899W=3.3V
7902 =1.8V
7899W=5V
7902
=3.3V
LVTRMPWR_A
LVTRMPWR_B
7899W=3.3V
7902 =1.8V
7899W=3.3V
7902 =3.3V
RP11
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9510
9510
P64TDI1 31,37
P64TMS1 31
7899W=5V
7902
=3.3V
VCC3
4.7U-0805
VCC3
2.7K
VCC285_A
VCC285_B
SVCC18
SVCC33
SVCC18
C529
4
R1038 1K
VCC3
R760
8.2K
P64AD20
4
VCC3
ZCR_IDSEL
E11
E12
L22
M22
R22
T22
W22
Y22
E15
E16
E19
E20
G22
H22
C23
G26
A16
D23
H26
AF2
AF7
AF10
AF14
AF19
AF22
A14
C17
W5
AA2
AA3
T11
T12
T13
T14
T15
T16
N22
P22
U22
V22
AA5
AA22
AB5
AB6
AB17
AB18
AB21
AB22
VCC
B
U36C
VCC1
VCC2
VCC3
VCC4
R5
VCC5
VCC6
T5
VCC7
VCC8
VCC9
VCC10
SVCCA1
SVCCA2
SVCCA3
SVCCA4
SVCCA5
SVCCA6
E7
SVCCA7
E8
SVCCA8
G5
SVCCA9
H5
SVCCB1
L5
SVCCB2
M5
SVCCB3
C3
SVCC33A
SVCC33B
D4
SVCC33C
SVCC33D
A4
SVCC50A
SVCC50B
SVCC50C
SVCC50D
K1
SVCC50E
A1
SVCC50F
PVCC1
PVCC2
PVCC3
PVCC4
PVCC5
PVCC6
A7
PVCC7
PVCC8
PVCC9
P1
PXVCC18
VDPCI/VIO
PZV33
PZV33_A
GND47
GND48
GND49
GND50
GND51
GND52
N5
GND53
GND54
P5
GND55
GND56
U5
GND57
GND58
V5
GND59
GND60
GND61
GND62
GND63
GND64
GND69
GND70
GND71
GND72
2 3
R766
4.7K
Q48
NPN-3904LT1-S-SOT23
E C
5 6
4
VCC
R1036
4.7K
Q90
NDS7002A-S-SOT23
AIC-7899W
PWR/
GND
AIC7899W
U48A
SN74F126-SOIC14
1
U48B
SN74F126-SOIC14
VCC3
3
R1037
8.2K
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
AVCC18A
AGNDE
AGNDF
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND65
GND66
GND67
GND68
R892
4.7K
SCSI_IDSEL_AD
3
P64AD20
Q89
SI2303DS-S-SOT23
SCSI_IDSEL_INTEL
SCSI_IDSEL_AD
SVCC18
D14
K25
L1
L26
M1
R1
R26
V26
SVCC18
VCC
AVCC18A
C531
4.7U-0805
R661 X_0
R660 0
7899W=5V
7902
=1.8V
W1
AA1
AA26
AF6
AF9
AF12
AF15
AF18
AF21
A8
C13
C14
E5
E6
E9
E10
E13
E14
E17
E18
E21
E22
F5
F22
J5
J22
K5
K22
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
M16
N11
N12
N13
N14
N15
N16
P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
R16
AB9
AB10
AB13
AB14
2
STUFF R1200 AND NO STUFF R1201 :USE INTEL RAIDIOS
R1200
0
SCSI_IDSEL
R1201 X_0
STUFF R1201 AND NO STUFF R1200 :USE ADAPTEC ZCR
AVCC18A
7899W=5V
EC82
100U
EC102
100U
7902
=1.8V
P64GNT#2
R682 X_2.7K
P64REQ#2
R678 2.7K
SVCC33
7899W=5V
7902
=3.3V
C543
0.01U
VCC3
U84
5
R1250 100
4 3
VCC285_A
VCC285_B
DIS_SCSI 47
VCC3
L29
C443
0.01U
C552
0.01U
C501
4.7U-0805
80_0805
C530
4.7U-0805
7899W=2.85V
7902 =2.50V
7899W=2.85V
7902 =2.50V
SCSI_IDSEL
DIS_SCSI
L28 80_0805
C509
4.7U-0805
AVCC33C
7899W=3.3V
7902 =3.3V
C528
0.01U
+
C442
0.01U
+
C534
0.01U
NC7S08-SOT23
1
2
1
0.01U
C520
VCC3
C532
0.01U
SCSI_ID
C533
4.7U-0805
C444
4.7U-0805
TO ENABLE/DISABLE SCSI
Micro Star Restricted Secret
2
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
AIC 7899W/7902 1/5
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
33 68
of
Rev
0D
Page 34
8
7
6
5
4
3
2
1
LVSCDAP15
LVSCDAP14
D D
C C
B B
VCC3
+
EC97
C437
10U
0.1U
C535
C451
0.1U
C536
0.01U
C524
0.1U
C512
0.01U
C548
0.01U
SVCC18
AVCC33A
PCAVCC33A
C465
0.1U
C537
0.1U
C508
0.01U
C542
Note :
THE CHIP WILL LOAD 6-BYTE OF ID DATA FROM
DIFFERENT LOCATION OF THE SEEPROM BASED ON
THE LOGIC LEVEL AT
THE SIGNAL LDALTIDA OF CHANNEL A AND THE
SIGNAL IDALTIDB OF CHANNEL B.
DEPENDING ON THE LADLTIDA AND LADLTIDB
STATUS, ONE OF THE TWO POSSIBLE ID VALUES
FROM THE PREDETERMINED LOCATION OF THE
SEEPROM WILL BE EXTRACTED.
4.7U-0805
C441
4.7U-0805
LVCSDAPHP 35
LVCSDAPLP 35
LVATNAP 35
LVBSYAP 35
LVACKAP 35
LVRSTAP 35
LVMSGAP 35
LVSELAP 35
LVREQAP 35
LVCSDBPHP 36
LVCSDBPLP 36
LVBSYBP 36
LVACKBP 36
LVATNBP 36
LVRSTBP 36
LVMSGBP 36
LVSELBP 36
LVREQBP 36
DIFFSENSEA 35
DIFFSENSEB 36
P1PCIRST# 31,32,33,60
AIC_CLKINP 37
AIC_CLKINM 37
7899W=3.3V
7902 =3.3V
7899W=3.3V
7902 =3.3V
LVSCDAP13
LVSCDAP12
LVSCDAP11
LVSCDAP10
LVSCDAP8
LVSCDAP7
LVSCDAP6
LVSCDAP5
LVSCDAP4
LVSCDAP3
LVSCDAP2
LVSCDAP1
LVSCDAP0
LVCDAP 35
LVIOAP 35
LVSCDBP15
LVSCDBP14
LVSCDBP13
LVSCDBP12
LVSCDBP11
LVSCDBP10
LVSCDBP9 LVSCDBM9
LVSCDBP8
LVSCDBP7
LVSCDBP6
LVSCDBP5
LVSCDBP4
LVSCDBP3
LVSCDBP2
LVSCDBP1
LVSCDBP0
LVCDBP 36
LVIOBP 36
R636 0
R659 0
7899W=0 Ohm
7902 =10K
0 R634 0.01U
AVCC33A
PCAVCC33A
D17
B16
D15
A15
G24
F23
F25
E23
C21
A21
C20
A20
C19
A19
C18
A18
A17
A22
C22
A23
A24
A26
B25
C26
D26
D24
E25
H25
AD1
J25
K23
J24
K24
M26
M24
H24
B11
B10
AC1
W2
AB1
A13
B14
D10
Do not stuff when
use AIC7899
M2
M4
N1
N3
D6
D5
G1
G3
H1
H3
D2
C2
C4
D9
D8
U1
U2
B6
B5
J1
J3
K2
K4
L2
F3
E3
E1
F1
B1
B2
B3
B8
A9
T2
T3
V1
V2
SCDAP15
SCDAP14
SCDAP13
SCDAP12
SCDAP11
SCDAP10
SCDAP9
SCDAP8
SCDAP7
SCDAP6
SCDAP5
SCDAP4
SCDAP3
SCDAP2
SCDAP1
SCDAP0
SCDAPHP
SCDAPLP
ATNAP
BSYAP
ACKAP
RESETAP
MSGAP
SELAP
CDAP
REQAP
IOAP
SCDBP15
SCDBP14
SCDBP13
SCDBP12
SCDBP11
SCDBP10
SCDBP9
SCDBP8
SCDBP7
SCDBP6
SCDBP5
SCDBP4
SCDBP3
SCDBP2
SCDBP1
SCDBP0
SCDBPHP
SCDBPLP
BSYBP
ACKBP
ATNBP
RESETBP
MSGBP
SELBP
CDBP
REQBP
IOBP
DIFFSENSEA
DIFFSENSEB
PCIRST
EXTXCVRA
EXTXCVRB
EXPACTA
EXPACTB
IDDATA
IDDATB
SCLKIN
SCLKINP
SCLKINM
SRAGARDV
AVCC33A
AVCC33B
PAGARDV
PCAVCC33A
PCAVCC33B
PXAVCC33A
PXAVCC33B
PCAGNDA
PCAGNDB
PXAGNDA
PAGARDG
AGNDA
AGNDB
STAGARD
U36A
AIC-7899W
SCSI
MISC
AIC7899W
X_4.7K
SCDAM15
SCDAM14
SCDAM13
SCDAM12
SCDAM11
SCDAM10
SCDAM9
SCDAM8
SCDAM7
SCDAM6
SCDAM5
SCDAM4
SCDAM3
SCDAM2
SCDAM1
SCDAM0
SCDAPHM
SCDAPLM
ATNAM
BSYAM
ACKAM
RESETAM
MSGAM
SELAM
REQAM
SCDBM15
SCDBM14
SCDBM13
SCDBM12
SCDBM11
SCDBM10
SCDBM9
SCDBM8
SCDBM7
SCDBM6
SCDBM5
SCDBM4
SCDBM3
SCDBM2
SCDBM1
SCDBM0
SCDBPHM
SCDBPLM
BSYBM
ACKBM
ATNBM
RESETBM
MSGBM
SELBM
REQBM
LVREXT1
LVREXT2
EXREXT1
EXREXT2
PCIRSTOUT
STPWCTLA
STPWCTLB
WIDEPSA
WIDEPSB
TESTMODE
LDALTIDA
LDALTIDB
STAGARDV
AVCC33C
AVCC33D
AVCC33E
AGNDC
AGNDD
STAGARDG
PXAVCC18
AVCC18A
AVCC18B
AVCC18D
PXAGNDB
R974
CDAM
CDBM
IOAM
IOBM
LEDA
LEDB
Y3
Y4
D16
C16
C15
B15
G25
F24
F26
E24
D21
B21
D20
B20
D19
B19
D18
B18
B17
B22
D22
B23
B24
A25
C24
B26
C25
D25
E26
M3
N4
N2
P3
C6
A6
C5
A5
G2
G4
H2
H4
J2
J4
K3
L4
L3
F4
E4
E2
F2
D3
D1
C1
A2
A3
B4
C9
B9
6.19K R650
B13
B12
N26
SCSILED1
K26
SCSILED2
L25
J26
L24
0 R618
J23
L23
AA4
M25
M23
C8
A10
A11
A12
C11
C12
C10
Y1
B7
C7
D7
Y2
Y3
Y4
X_4.7K
R975
LVSCDAM15
LVSCDAM14
LVSCDAM13
LVSCDAM12
LVSCDAM11
LVSCDAM10
LVSCDAM9 LVSCDAP9
LVSCDAM8
LVSCDAM7
LVSCDAM6
LVSCDAM5
LVSCDAM4
LVSCDAM3
LVSCDAM2
LVSCDAM1
LVSCDAM0
LVSCDBM15
LVSCDBM14
LVSCDBM13
LVSCDBM12
LVSCDBM11
LVSCDBM10
LVSCDBM8
LVSCDBM7
LVSCDBM6
LVSCDBM5
LVSCDBM4
LVSCDBM3
LVSCDBM2
LVSCDBM1
LVSCDBM0
4.99K R658
0 R635
AVCC33C
PXAVCC18
AVCC18A
PXAVCC18
VCC3
LVCSDAPHM 35
LVCSDAPLM 35
LVATNAM 35
LVBSYAM 35
LVACKAM 35
LVRSTAM 35
LVMSGAM 35
LVSELAM 35
LVCDAM 35
LVREQAM 35
LVIOAM 35
LVCSDBPHM 36
LVCSDBPLM 36
LVBSYBM 36
LVACKBM 36
LVATNBM 36
LVRSTBM 36
LVMSGBM 36
LVSELBM 36
LVCDBM 36
LVREQBM 36
LVIOBM 36
D40 1N4148-S-LL34
D41 1N4148-S-LL34
7899W=3.3V
7902 =3.3V
7899W=1.8V
7902 =1.8V
7899W=3.3V
7902 =3.3V
C538
0.01U
20 MIL
STPWCTLA 35
STPWCTLB 36
4.7K R681
4.7K R619
KEEP TRACE SHORT
7899W=6.19K
7902 =Open
AVCC33C
LVSCDAM[15..0]
LVSCDAP[15..0]
LVSCDBM[15..0]
LVSCDBP[15..0]
LVSCDAM[15..0] 35
LVSCDAP[15..0] 35
LVSCDBM[15..0] 36
LVSCDBP[15..0] 36
VCC3
SC39
SC37
SC47
0.1U
0.1U
0.1U
VCC285_A VCC285_B SVCC33
SC46
SC49
0.01U
0.01U
SVCC18
SC38
SC42
0.1U
0.1U
SC48
0.01U
Placed at the solder side
HDDLED
HDDLED 46,58
VCC3
R653
7899W=0 Ohm
0
7902 =Open
C525
C485
0.01U
0.01U
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
AIC 7899W/7902 2/5
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
34 68
of
Rev
0D
Page 35
8
7
6
5
4
3
2
1
D D
DIFFSENSEA
DIFFSENSEA 34
220K not call out in Dallas
datasheets. It's use for setting
initial state of the terminators
C C
STPWCTLA 34
B B
+
EC72
C364
10U
0.1U
LVSCDAP11
LVSCDAP10 LVSCDAM10
LVSCDAP9
LVSCDAP8
LVIOAP LVIOAM
LVIOAP 34 LVIOAM 34
LVREQAP LVREQAM
LVREQAP 34 LVREQAM 34
LVCDAP LVCDAM
LVCDAP 34 LVCDAM 34
LVSELAP LVSELAM
LVSELAP 34 LVSELAM 34
LVMSGAP LVMSGAM
LVMSGAP 34
R600
220K
LVATNAP 34 LVATNAM 34
LVBSYAP 34 LVBSYAM 34
LVRSTAP 34 LVRSTAM 34
R584
20K
LVSCDAPLP
LVSCDAP7 LVSCDAM7
LVSCDAP5
LVSCDAP4
LVATNAP LVATNAM
LVBSYAP LVBSYAM
LVRSTAP LVRSTAM
1 2
1N4148-S-LL34
D18
LVCSDAPHP 34 LVCSDAPHM 34
R559
10K
LVSCDAP3 LVSCDAM3
LVSCDAP2 LVSCDAM2
LVSCDAP1 LVSCDAM1
LVSCDAP0 LVSCDAM0
LVSCDAPHP LVSCDAPHM
LVSCDAP12 LVSCDAM12
LVSCDAP13 LVSCDAM13
LVSCDAP14
LVSCDAP15 LVSCDAM15
C416
0.1U
50MIL
U29
16
D_SNS
2
+R1
4
+R2
7
+R3
9
+R4
11
+R5
18
+R6
20
+R7
23
+R8
25
+R9
17
DIFF_CAP
22
HSGND2
6
HSGND1
14
GND
DS21T07E-TSSOP28
U32
16
D_SNS
2
+R1
4
+R2
7
+R3
9
+R4
11
+R5
18
+R6
20
+R7
23
+R8
25
+R9
17
DIFF_CAP
22
HSGND2
6
HSGND1
14
GND
DS21T07E-TSSOP28
U34
16
D_SNS
2
+R1
4
+R2
7
+R3
9
+R4
11
+R5
18
+R6
20
+R7
23
+R8
25
+R9
17
DIFF_CAP
22
HSGND2
6
HSGND1
14
GND
DS21T07E-TSSOP28
TPWR
TPWR1
TPWR
TPWR1
TPWR
TPWR1
LVSCDAM[15..0]
LVSCDAP[15..0]
28
27
3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15
M_S
1
VREF
28
27
3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15
M_S
1
VREF
28
27
3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15
M_S
1
VREF
LVTRMPWR_A
LVSCDAM11
LVSCDAM9
LVSCDAM8
C359
0.1U
LVSCDAPLM
LVSCDAM6 LVSCDAP6
LVSCDAM5
LVSCDAM4
LVACKAM LVACKAP
C402
0.1U
LVSCDAM14
C435
0.1U
LVMSGAM 34
C363
4.7U-0805
LVCSDAPLM 34 LVCSDAPLP 34
LVACKAM 34 LVACKAP 34
4.7K R610
C401
4.7U-0805
C434
4.7U-0805
VCC
1 2
D17
MBRS340-S-CASE403-03
F3
2A-MINISMDC200-S
50MIL
LVSCDAM[15..0] 34
LVSCDAP[15..0] 34
LVTRMPWR_A
LVTRMPWR_A
LVSCDAP12
LVSCDAP13
LVSCDAP14
LVSCDAP15
LVSCDAPHP
LVSCDAP0
LVSCDAP1
LVSCDAP2
LVSCDAP3
LVSCDAP4
LVSCDAP5
LVSCDAP6
LVSCDAP7
LVSCDAPLP
DIFFSENSEA
LVTRMPWR_A
LVTRMPWR_A
LVATNAP
LVBSYAP
LVACKAP
LVRSTAP
LVMSGAP
LVSELAP
LVCDAP
LVREQAP
LVIOAP
LVSCDAP8
LVSCDAP9
LVSCDAP10
LVSCDAP11
SCSI1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
D68-BK
LVSCDAM12
35
LVSCDAM13
36
LVSCDAM14
37
LVSCDAM15
38
LVSCDAPHM
39
LVSCDAM0
40
LVSCDAM1
41
LVSCDAM2
42
LVSCDAM3
43
LVSCDAM4
44
LVSCDAM5
45
LVSCDAM6
46
LVSCDAM7
47
LVSCDAPLM
48
49
50
LVTRMPWR_A
51
LVTRMPWR_A
52
53
54
LVATNAM
55
56
LVBSYAM
57
LVACKAM
58
LVRSTAM
59
LVMSGAM
60
LVSELAM
61
LVCDAM
62
LVREQAM
63
LVIOAM
64
LVSCDAM8
65
LVSCDAM9
66
LVSCDAM10
67
LVSCDAM11
68
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
AIC 7899W/7902 3/5
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
35 68
of
Rev
0D
Page 36
8
7
6
5
4
3
2
1
50MIL
D D
DIFFSENSEB 34
220K not call out in Dallas
datasheets. It's use for setting
initial state of the terminators
C C
DIFFSENSEB
STPWCTLB 34
B B
+
EC106
C603
10U
0.1U
LVSCDBP11
LVSCDBP10
LVSCDBP9
LVSCDBP8
LVIOBP LVIOBM
LVIOBP 34 LVIOBM 34
LVMSGBP LVMSGBM
LVMSGBP 34 LVMSGBM 34
LVSELBP LVSELBM
LVSELBP 34 LVSELBM 34
LVCDBP LVCDBM
LVCDBP 34 LVCDBM 34
LVREQBP LVREQBM
LVREQBP 34 LVREQBM 34
R743
220K
LVRSTBP 34 LVRSTBM 34
LVACKBP 34 LVACKBM 34
LVBSYBP 34 LVBSYBM 34
LVATNBP 34 LVATNBM 34
LVCSDBPLP 34 LVCSDBPLM 34
R726
20K
LVRSTBP LVRSTBM
LVACKBP LVACKBM
LVBSYBP LVBSYBM
LVATNBP LVATNBM
LVSCDBPLP LVSCDBPLM
LVSCDBP4 LVSCDBM4
LVSCDBP5 LVSCDBM5
LVSCDBP6
LVSCDBP7
1 2
1N4148-S-LL34
D24
R761
10K
LVSCDBP3 LVSCDBM3
LVSCDBP2 LVSCDBM2
LVSCDBP1 LVSCDBM1
LVSCDBP0 LVSCDBM0
LVSCDBPHP
LVSCDBP12 LVSCDBM12
LVSCDBP13 LVSCDBM13
LVSCDBP15 LVSCDBM15
C569
0.1U
U37
16
D_SNS
2
+R1
4
+R2
7
+R3
9
+R4
11
+R5
18
+R6
20
+R7
23
+R8
25
+R9
17
DIFF_CAP
22
HSGND2
6
HSGND1
14
GND
DS21T07E-TSSOP28
U40
16
D_SNS
2
+R1
4
+R2
7
+R3
9
+R4
11
+R5
18
+R6
20
+R7
23
+R8
25
+R9
17
DIFF_CAP
22
HSGND2
6
HSGND1
14
GND
DS21T07E-TSSOP28
U47
16
D_SNS
2
+R1
4
+R2
7
+R3
9
+R4
11
+R5
18
+R6
20
+R7
23
+R8
25
+R9
17
DIFF_CAP
22
HSGND2
6
HSGND1
14
GND
TPWR
TPWR1
TPWR
TPWR1
TPWR
TPWR1
28
27
3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15
M_S
1
VREF
28
27
3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15
M_S
1
VREF
28
27
3
-R1
5
-R2
8
-R3
10
-R4
12
-R5
19
-R6
21
-R7
24
-R8
26
-R9
13
ISO
15
M_S
1
VREF
DS21T07E-TSSOP28
LVTRMPWR_B
LVSCDBM11
LVSCDBM10
LVSCDBM9
LVSCDBM8
C521
0.1U
LVSCDBM6
LVSCDBM7
C555
0.1U
LVSCDBPHM
LVSCDBM14 LVSCDBP14
LVSCDBM[15..0]
LVSCDBP[15..0]
LVSCDBM[15..0] 34
LVSCDBP[15..0] 34
VCC
1 2
C511
4.7U-0805
C554
4.7U-0805
D30
MBRS340-S-CASE403-03
F4
2A-MINISMDC200-S
LVTRMPWR_B
50MIL
4.7K R735
LVTRMPWR_B
LVSCDBP12
LVSCDBP13
LVSCDBP14
LVSCDBP15
LVSCDBPHP
LVSCDBP0
LVSCDBP1
LVSCDBP2
LVSCDBP3
LVSCDBP4
LVSCDBP5
LVSCDBP6
LVSCDBP7
LVSCDBPLP
DIFFSENSEB
LVTRMPWR_B LVTRMPWR_B
LVATNBP
LVBSYBP
LVACKBP
LVRSTBP
LVMSGBP
LVSELBP
LVCDBP
LVREQBP
LVIOBP
LVSCDBP8
LVSCDBP9
LVSCDBP10
LVSCDBP11
SCSI2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
D68-BK
LVSCDBM12
35
LVSCDBM13
36
LVSCDBM14
37
LVSCDBM15
38
LVSCDBPHM
39
LVSCDBM0
40
LVSCDBM1
41
LVSCDBM2
42
LVSCDBM3
43
LVSCDBM4
44
LVSCDBM5
45
LVSCDBM6
46
LVSCDBM7
47
LVSCDBPLM
48
49
50
LVTRMPWR_B LVTRMPWR_B
51
52
53
54
LVATNBM
55
56
LVBSYBM
57
LVACKBM
58
LVRSTBM
59
LVMSGBM
60
LVSELBM
61
LVCDBM
62
LVREQBM
63
LVIOBM
64
LVSCDBM8
65
LVSCDBM9
66
LVSCDBM10
67
LVSCDBM11
68
LVCSDBPHM 34 LVCSDBPHP 34
C590
C591
4.7U-0805
0.1U
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
AIC 7899W/7902 4/5
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
36 68
of
Rev
0D
Page 37
8
7
6
5
4
3
2
1
VCC3
R628
X_10K
SEECS 33
SCSI_INTA 31,33
SCSI_INTB 31,33
R627
X_1K
P64TDI1 31,33
R756
8.2K
R754
8.2K
OPTIONAL PULL-UP RESISTOR FOR DEFAULT DEVICE
I.D. WHEN SEEPROM IS NOT PRE-PROGRAMMED.
SEECS
SEMD2
SEMD2 33
SEMD1
SEMD1 33
SEMD0
SEMD0 33
P64TDI1
VCC VCC
10
9 8
U48C
SN74F126-SOIC14
13
U48D
SN74F126-SOIC14
VCC VCC
P64TDI1
12 11
U33
1
CS
2
SK
3
DI
4
DO
ATL-512X8-1US-SOIC8
R757
8.2K
U30A
1 2
R755
8.2K
U30B
3 4
VCC
DC
ORG
GND
DM7407-SOIC14
DM7407-SOIC14
8
7
6
5
R608 4.7K
PIRQ#8 31,42
PIRQ#9 31,42
VCC3
C422
0.01U
R612
78.7
R613
100
R721
78.7
R714
100
0.1U
C430
C563
0.1U
7899W=3.3V
7902 =1.8V
+
EC98
100U
AIC_CLKINP 34
AIC_CLKINM 34
7899W=Reserved
7902 =SCLKINM
VCC285_A
VCC285_B
80_0805
L30
PXAVCC18
AVCC33A
7899W=3.3V
7902 =3.3V
7899W=3.3V
7902 =3.3V
7899W=3.3V
7902 =1.8V
VCC3
0.01U
C429
C560
0.01U
VCC3
C547
0.1U
L27 80_0805
C502
C500
4.7U-0805
4.7U-0805
VCC3 PCAVCC33A
C539
C540
4.7U-0805
4.7U-0805
R705
0
7899W=0 Ohm
7902 =Open
L31 80_0805
C546
0.01U
SCSI ASIC AIC7902 AIC7899W
Voltage Current(A) Power(W) Current(A) Power(W)
1 x 1.8V TBD TBD N/A N/A
2 x 2.5V TBD TBD N/A N/A
2 x 2.85V N/A N/A 0.630 1.796
1 x 3.3V TBD TBD 0.477 1.574
1 x 5V N/A N/A 0.043 0.215
Total TBD 3.59
D D
C C
VCC
C423
C424
4.7U-0805
4.7U-0805
LTX8117-2.85V for 7899W
LT1117-2.5V for 7902
VCC
C593
C592
4.7U-0805
4.7U-0805
VCC3 SVCC18
C564
C565
4.7U-0805
4.7U-0805
For 7902 Only
VCC3
C464
0.01U
B B
7899W=2.85V
7902 =2.50V
3 2
VIN OUT
0.1U
C425
3 2
VIN OUT
C589
0.1U
LTX8117-2.85V for 7899W
LT1117-2.5V for 7902
3 2
C561
X_104P
80 Mhz OSC for 7902 (Differential)
40 Mhz OSC for 7899W
8
VCC
4
GND
SCSI Bus Diffsense Signal Maxumum SCSI
Mode Voltage Range(V) Transfer Rate
SE -0.35 to 0.5 40MB/Sec
LVD 0.7 to 1.9 320MB/Sec
HVD 2.4 to 5.5 40MB/Sec
VOUT
ADJ/GND
LX8117-00CSTTR-SOT223-0.8A VR2
7899W=2.85V
7902 =2.50V
VOUT
ADJ/GND
LX8117-00CSTTR-SOT223-0.8A VR4
VIN OUT
ADJ/GND
X_LT1764-1.8
VR3
5
OUT+
1
OUT-
40M-20PF-HC49-D OSC1
VOUT
1.8V
4
1
4
1
4
1
R655 22
7899W=22 Ohm
7902 =0 Ohm
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
AIC 7899W/7902 5/5
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
37 68
of
Rev
0D
Page 38
5
4
3
2
1
GREQ#
ST0
ST2
RBF#
SBA0
SBA2
SB_STB
SBA4
SBA6
GAD31
GAD29
GAD27
GAD25
AD_STB1
GAD23
GAD21
GAD19
GAD17
GC_BE#2
GIRDY#
GDEVSEL#
GPERR#
GSERR#
GC_BE#1
GAD14
GAD12
GAD10
GAD8
AD_STB0
GAD7
GAD5
GAD3
GAD1
AGPREFV
VCC3
AGP1
D1
VCC3_3_J
D2
VCC3_3_K
D3
VCC3_3_L
D4
VCC3_3_M
D5
VCC3_3_N
D6
VCC3_3_O
D7
VCC3_3_P
D8
VCC3_3_Q
D9
PRSNT#2
D10
PRSNT#1
VCC
B1
AGP_OVRCNT#
B2
5V_A
B3
5V_B
B4
AGP_USB+
B5
GND_Q
B6
INTB#
B7
AGPCLK_CONN
B8
REQ#
B9
VCC3_3_R
B10
ST0
B11
ST2
B12
RBF#
B13
GND_R
B14
RESV_L
B15
SBA0
B16
VCC3_3_S
B17
SBA2
B18
SB_STB
B19
GND_S
B20
SBA4
B21
SBA6
B22
RESV_M
B23
GND_T
B24
3_3AUX_1
B25
VCC3_3_T
B26
GAD31
B27
GAD29
B28
VCC3_3_U
B29
GAD27
B30
GAD25
B31
GND_U
B32
AD_STB1
B33
GAD23
B34
VDDQ_F
B35
GAD21
B36
GAD19
B37
GND_V
B38
GAD17
B39
C/BE#2
B40
VDDQ_G
B41
IRDY#
B42
3_3AUX_2
B43
GND_W
B44
RESV_N
B45
VCC3_3_V
B46
DEVSEL#
B47
VDDQ_H
B48
PERR#
B49
GND_X
B50
SERR#
B51
C/BE#1
B52
VDDQ_I
B53
GAD14
B54
GAD12
B55
GND_Y
B56
GAD10
B57
GAD8
B58
VDDQ_J
B59
AD_STB0
B60
GAD7
B61
GND_Z
B62
GAD5
B63
GAD3
B64
VDDQ_K
B65
GAD1
B66
VREFCG
VCC3_3_A
VCC3_3_B
KEY
VCC_12V_A
TYPEDET#
AGP_USB-
VCC3_3_E
VCC3_3_F
SB_STB#
VCC3_3_G
VCC3_3_H
AD_STB1#
VCC3_3_I
AD_STB0#
KEY
F1
RESV_O
F2
RESV_P
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
GND_AA
GND_BB
GND_CC
GND_DD
GND_EE
GND_FF
GND_GG
GND_HH
GND_II
GND_JJ
GND_KK
GND_LL
AGP-D172-BN
VCC_12V_B
VCC_12V_C
VCC_12V_D
VCC_12V_E
VCC_12V_F
VCC_12V_G
VCC_12V_H
VCC_12V_I
VCC_12V_J
VCC_12V_K
VCC_12V_L
VCC_12V_M
GC_BE#[0..3]
D D
VAGP_CARD
AD_STB0
R296 8.2K
GSTOP#
GPAR
GPERR#
GSERR#
GFRAME#
GIRDY#
GTRDY#
GDEVSEL#
RBF#
SB_STB
GREQ#
GGNT#
C C
PIPE#
WBF#
AD_STB1
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
AD_STB0#
AD_STB1#
B B
SB_STB#
VAGP_CARD
RN53
1 2
3 4
5 6
7 8
8.2K
RN49
1 2
3 4
5 6
7 8
8.2K
R196 8.2K
R219 8.2K
R170 2.7K
R166 2.7K
R182 8.2K
R198 8.2K
R230 8.2K
R207 8.2K
R214 8.2K
R217 8.2K
R216 8.2K
R223 8.2K
R224 8.2K
R226 8.2K
R228 8.2K
R179
R173
R180
R294
R235 4.7K
R221
C246
R302
470P
432
C188
0.1U
C232
0.1U
8.2K
8.2K
8.2K
4.7K
4.7K
R316
56
GC_BE#[0..3] 27
SBA[0..7]
SBA[0..7] 27
ST[0..2]
ST[0..2] 27,28
GAD[0..31]
GAD[0..31] 27
C112 0.1U
C117 0.1U
USB1P
AGPCLK_CONN 27
R164 X_0
PIRQ#15 39,42
GREQ# 27
USB1P 45 USB1N 45
RBF# 27
VAGP_CARD
C182
0.1U
VAGP_CARD VAGP_CARD
C244
0.1U
SB_STB 27
3VSB
AD_STB1 27
GIRDY# 27
GDEVSEL# 27
GPERR# 27,41
GSERR# 27,41
AD_STB0 27
AGPREFV
R315
R301
56
432
C245
470P
Closed to AGP Pro Slot
GND_A
GND_B
GND_C
GND_D
GND_E
GND_F
RESV_A
RESV_B
RESV_C
GND_G
RESV_D
GND_H
GND_I
RESV_E
GND_J
RESV_F
GAD30
GAD28
GAD26
GAD24
GND_K
C/BE#3
VDDQ_A
GAD22
GAD20
GND_L
GAD18
GAD16
VDDQ_B
FRAME#
RESV_G
GND_M
RESV_H
TRDY#
STOP#
GND_N
GAD15
VDDQ_C
GAD13
GAD11
GND_O
C/BE#0
VDDQ_D
GND_P
VDDQ_E
VREFGC
RESV_I
RESV_J
INTA#
RST#
GNT#
PIPE#
WBF#
PME#
GAD9
GAD6
GAD4
GAD2
GAD0
VAGP_CARD
AGP_PRO Imax
VCC3 7.6A
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
+12V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
ST1
A11
A12
A13
A14
A15
SBA1
A16
A17
SBA3
A18
A19
A20
SBA5
A21
SBA7
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
PAR
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
TYPEDET#
R159 X_0
GGNT#
ST1
PIPE#
WBF#
SBA1
SBA3
SB_STB#
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STB1#
GC_BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME#
GTRDY#
GSTOP#
AGPPCIPME#
GPAR
GAD15
GAD13
GAD11
GAD9
GC_BE#0
AD_STB0#
GAD6
GAD4
GAD2
GAD0
+12V
VCC12 9.2A
TYPEDET# 27,57
PIRQ#14 39,42
GGNT# 27,28
PIPE# 27
WBF# 27
SB_STB# 27
AD_STB1# 27
GFRAME# 27
GTRDY# 27
GSTOP# 27
APGPCIPME# 47
GPAR 27
AD_STB0# 27
AGPREFV_TO_HE 27
C903
5P
As close AGP SLOT as possible
+
EC22
1000U
C220
C192
0.1U
0.1U
VCC3
R162
4.7K
TYPEDET#
R163 2.7K
PCIRST# 25,27,40,60
+
B
EC37
1000U
C226
0.1U
VCC3
R146
4.7K
Q26
NPN-3904LT1-S-SOT23
E C
+12V VCC3
+
B
E C
AGPREFV_TO_HE
EC59
470U
C234
C239
0.1U
0.1U
Q27
NPN-3904LT1-S-SOT23
+12V
R145
8.2K
G
D S
Q24
NDS7002A-S-SOT23
VCC3
R142
301
R141
200
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
AGP Pro Slot
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
38 68
of
Rev
0D
Page 39
5
S1_AD[63..0]
S1_AD[63..0] 24
-12V VCC
VCC VCC3
PCIX2
B1
-12V
R123 5.6K
PIRQ#11
PIRQ#11 42
PIRQ#13
PIRQ#13 42
D D
PCICLK_S1_SLT1 26
C C
B B
VCC3
VCC3
Place near the PCI slot 2
S1_P64PRSNT#11
S1_P64PRSNT#12
PCICLK_S1_SLT1
S1_REQ#0
S1_REQ#0 24
S1_AD31
S1_AD29
S1_AD27
S1_AD25
S1_CBE#3
S1_CBE#3 24
S1_AD23
S1_AD21
S1_AD19
S1_AD17
S1_CBE#2
S1_CBE#2 24
S1_IRDY#
S1_IRDY# 24
S1_DEVSEL#
S1_DEVSEL# 24
S1_PCIXCAP
S1_PCIXCAP 24
S1_LOCK#
S1_LOCK# 24
S1_PERR#
S1_PERR# 24,41
S1_SERR#
S1_SERR# 24,41
S1_CBE#1
S1_CBE#1 24
S1_AD14
S1_AD12
S1_AD10
S1_M66EN
S1_M66EN 24
S1_AD8
S1_AD7
S1_AD5
S1_AD3
S1_AD1
S1_CBE#6
S1_CBE#6 24
S1_CBE#4
S1_CBE#4 24
S1_AD63
S1_AD61
S1_AD59
S1_AD57
S1_AD55
S1_AD53
S1_AD51
S1_AD49
S1_AD47
S1_AD45
S1_AD43
S1_AD41
S1_AD39
S1_AD37
S1_AD35
S1_AD33
RN58
S1_CBE#7
1 2
S1_CBE#6
3 4
S1_CBE#5
5 6
S1_CBE#4
7 8
8.2K
RN44
S1_CBE#0
1 2
S1_CBE#1
3 4
S1_CBE#2
5 6
S1_CBE#3
7 8
8.2K
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
CARD-D184
VCC3 VCC3 VCC3 VCC3
TCK
GND_S
TDO
+5V_E
+5V_F
P64IRQ1
P64IRQ3
PRSNT#1
RESV_E
PRSNT#2
KEY
RESV_F
GND_T
CLK
GND_U
REQ#
3_3V_M
AD31
AD29
GND_V
AD27
AD25
3_3V_N
C/BE#3
AD23
GND_W
AD21
AD19
3_3V_O
AD17
C/BE#2
GND_X
IRDY#
3_3V_P
DEVSEL#
GND_Y
LOCK#
PERR#
3_3V_Q
SERR#
3_3V_R
C/BE#1
AD14
GND_Z
AD12
AD10
M66EN
GND_AA
GND_BB
AD8
AD7
3_3V_S
AD5
AD3
GND_CC
AD1
3_3V_T
ACK64#
+5V_G
+5V_H
KEY
RESV_G
GND__DD
C/BE#6
C/BE#4
GND_EE
AD63
AD61
3_3V_U
AD59
AD57
GND_FF
AD55
AD53
GND_GG
AD51
AD49
3_3V_V
AD47
AD45
GND_HH
AD43
AD41
GND_II
AD39
AD37
3_3V_W
AD35
AD33
GND_JJ
RESV_H
RESV_I
P64AD19
INT#[10,11,12,13]
S1_REQ#/S1_GNT#[0]
RP10
5
1
2
3
4
6
7
8
10
9510
8.2K
TRST#
+5V_A
P64IRQ0
P64IRQ2
+5V_B
RESV_A
3_3V_A
RESV_B
3_3VAUX_1
3_3V_B
GND_A
3_3V_C
GND_B
IDSEL
3_3V_D
GND_C
3_3V_E
FRAME#
GND_D
TRDY#
GND_E
STOP#
3_3V_F
SDONE
GND_F
3_3V_G
GND_G
GND_H
GND_I
C/BE#0
3_3V_H
GND_J
3_3V_I
REQ64#
+5V_C
+5V_D
GND_K
C/BE#7
C/BE#5
3_3V_J
PAR64
GND_L
GND_M
3_3V_K
GND_N
GND_O
3_3V_L
GND_P
GND_Q
RESV_C
GND_R
RESV_D GND_KK
1
2
3
4
6
7
8
9
+12V
TMS
TDI
RST#
GNT#
PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
SBO#
PAR
AD15
AD13
AD11
AD9
AD6
AD4
AD2
AD0
AD62
AD60
AD58
AD56
AD54
AD52
AD50
AD48
AD46
AD44
AD42
AD40
AD38
AD36
AD34
AD32
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94 B94
S1_AD38
S1_AD39
S1_AD37
S1_AD36
S1_AD34
S1_AD35
S1_AD33
S1_AD32
+12V
S1_P64TMS1
S1_P64TDI1
PIRQ#10
PIRQ#12
S1PCIRST#
S1_GNT#0
S1_P64PME#
S1_AD30
S1_AD28
S1_AD26
S1_AD24
S1_AD22
S1_AD20
S1_AD18
S1_AD16
S1_FRAME#
S1_TRDY#
S1_STOP#
S1_P64SDONEP1
S1_P64SBOP1
S1_PAR
S1_AD15
S1_AD13
S1_AD11
S1_AD9
S1_CBE#0
S1_AD6
S1_AD4
S1_AD2
S1_AD0
S1_REQ#64 S1_ACK#64
S1_CBE#7
S1_CBE#5
S1_PAR64
S1_AD62
S1_AD60
S1_AD58
S1_AD56
S1_AD54
S1_AD52
S1_AD50
S1_AD48
S1_AD46
S1_AD44
S1_AD42
S1_AD40
S1_AD38
S1_AD36
S1_AD34
S1_AD32
R121 5.6K
PIRQ#10 42
PIRQ#12 42
3VSB
S1PCIRST# 60
S1_GNT#0 24,26
S1_P64PME# 47
R209 100
S1_FRAME# 24
S1_TRDY# 24
S1_STOP# 24
S1_PAR 24
S1_CBE#0 24
S1_REQ#64 24 S1_ACK#64 24
S1_CBE#7 24
S1_CBE#5 24
S1_PAR64 24
RP8
5
10
8.2K
4
-12V
VCC3 VCC +12V
PCIX1
B1
R122 5.6K
PIRQ#13
PIRQ#13 42
PIRQ#15
PIRQ#15 38,42
S1_P64PRSNT#21
S1_P64PRSNT#22
PCICLK_S1_SLT2 26
S1_AD19
S1_AD46
1
1
S1_AD47
2
2
S1_AD45
3
3
S1_AD44
4
4
S1_AD42
6
6
S1_AD43
7
7
S1_AD41
8
8
S1_AD40
9
9510
PCICLK_P1_SLT2
S1_REQ#1
S1_REQ#1 24
S1_AD31
S1_AD29
S1_AD27
S1_AD25
S1_CBE#3
S1_AD23
S1_AD21
S1_AD19
S1_AD17
S1_CBE#2
S1_IRDY#
S1_DEVSEL#
S1_PCIXCAP
S1_LOCK#
S1_PERR#
S1_SERR#
S1_CBE#1
S1_AD14
S1_AD12
S1_AD10
S1_M66EN
S1_AD8
S1_AD7
S1_AD5
S1_AD3
S1_AD1
S1_ACK#64
S1_CBE#6
S1_CBE#4
S1_AD63
S1_AD61
S1_AD59
S1_AD57
S1_AD55
S1_AD53
S1_AD51
S1_AD49
S1_AD47
S1_AD45
S1_AD43
S1_AD41
S1_AD39
S1_AD37
S1_AD35
S1_AD33
RP7
5
1
2
3
4
6
7
8
10
9510
8.2K
-12V
B2
TCK
B3
GND_S
B4
TDO
B5
+5V_E
B6
+5V_F
B7
P64IRQ1
B8
P64IRQ3
B9
PRSNT#1
B10
RESV_E
B11
PRSNT#2
B14
RESV_F
B15
GND_T
B16
CLK
B17
GND_U
B18
REQ#
B19
3_3V_M
B20
AD31
B21
AD29
B22
GND_V
B23
AD27
B24
AD25
B25
3_3V_N
B26
C/BE#3
B27
AD23
B28
GND_W
B29
AD21
B30
AD19
B31
3_3V_O
B32
AD17
B33
C/BE#2
B34
GND_X
B35
IRDY#
B36
3_3V_P
B37
DEVSEL#
B38
GND_Y
B39
LOCK#
B40
PERR#
B41
3_3V_Q
B42
SERR#
B43
3_3V_R
B44
C/BE#1
B45
AD14
B46
GND_Z
B47
AD12
B48
AD10
B49
M66EN
B50
GND_AA
B51
GND_BB
B52
AD8
B53
AD7
B54
3_3V_S
B55
AD5
B56
AD3
B57
GND_CC
B58
AD1
B59
3_3V_T
B60
ACK64#
B61
+5V_G
B62
+5V_H
B63
RESV_G
B64
GND__DD
B65
C/BE#6
B66
C/BE#4
B67
GND_EE
B68
AD63
B69
AD61
B70
3_3V_U
B71
AD59
B72
AD57
B73
GND_FF
B74
AD55
B75
AD53
B76
GND_GG
B77
AD51
B78
AD49
B79
3_3V_V
B80
AD47
B81
AD45
B82
GND_HH
B83
AD43
B84
AD41
B85
GND_II
B86
AD39
B87
AD37
B88
3_3V_W
B89
AD35
B90
AD33
B91
GND_JJ
B92
RESV_H
B93
RESV_I
CARD-D184
S1_AD54
1
S1_AD55
2
S1_AD53
3
S1_AD52
4
S1_AD50
6
S1_AD51
7
S1_AD49
8
S1_AD48
9
3
A1
TRST#
A2
+12V
A3
TMS
A4
TDI
A5
+5V_A
A6
P64IRQ0
A7
P64IRQ2
A8
+5V_B
A9
RESV_A
A10
3_3V_A
A11
RESV_B
KEY
A14
3_3VAUX_1
A15
RST#
A16
3_3V_B
A17
GNT#
A18
GND_A
A19
PME#
A20
AD30
A21
3_3V_C
A22
AD28
A23
AD26
A24
GND_B
A25
AD24
A26
IDSEL
A27
3_3V_D
A28
AD22
A29
AD20
A30
GND_C
A31
AD18
A32
AD16
A33
3_3V_E
A34
FRAME#
A35
GND_D
A36
TRDY#
A37
GND_E
A38
STOP#
A39
3_3V_F
A40
SDONE
A41
SBO#
A42
GND_F
A43
PAR
A44
AD15
A45
3_3V_G
A46
AD13
A47
AD11
A48
GND_G
A49
AD9
A50
GND_H
A51
GND_I
A52
C/BE#0
A53
3_3V_H
A54
AD6
A55
AD4
A56
GND_J
A57
AD2
A58
AD0
A59
3_3V_I
A60
REQ64#
A61
+5V_C
A62
+5V_D
KEY
A63
GND_K
A64
C/BE#7
A65
C/BE#5
A66
3_3V_J
A67
PAR64
A68
AD62
A69
GND_L
A70
AD60
A71
AD58
A72
GND_M
A73
AD56
A74
AD54
A75
3_3V_K
A76
AD52
A77
AD50
A78
GND_N
A79
AD48
A80
AD46
A81
GND_O
A82
AD44
A83
AD42
A84
3_3V_L
A85
AD40
A86
AD38
A87
GND_P
A88
AD36
A89
AD34
A90
GND_Q
A91
AD32
A92
RESV_C
A93
GND_R
A94 B94
RESV_D GND_KK
P64AD18
INT#[12,13,14,15]
S1_REQ#/S1_GNT#[1]
RP5
5
10
8.2K
2
VCC
R118 5.6K
S1_P64TMS2
S1_P64TDI2
PIRQ#12
PIRQ#14
S1PCIRST#
S1_GNT#1
S1_P64PME#
S1_AD30
S1_AD28
S1_AD26
S1_AD24
R208 100
S1_AD22
S1_AD20
S1_AD18
S1_AD16
S1_FRAME#
S1_TRDY#
S1_STOP#
S1_P64SDONEP2
S1_P64SBOP2
S1_PAR
S1_AD15
S1_AD13
S1_AD11
S1_AD9
S1_CBE#0
S1_AD6
S1_AD4
S1_AD2
S1_AD0
S1_REQ#64
S1_CBE#7
S1_CBE#5
S1_PAR64
S1_AD62
S1_AD60
S1_AD58
S1_AD56
S1_AD54
S1_AD52
S1_AD50
S1_AD48
S1_AD46
S1_AD44
S1_AD42
S1_AD40
S1_AD38
S1_AD36
S1_AD34
S1_AD32
S1_AD62
1
1
S1_AD63
2
2
S1_AD61
3
3
S1_AD60
4
4
S1_AD58
6
6
S1_AD59
7
7
S1_AD57
8
8
S1_AD56
9
9510
PIRQ#12 42
PIRQ#14 38,42
3VSB
S1_GNT#1 24,26
S1_AD18
S1_M66EN
S1_PCIXCAP
+
EC39
1000U
+
PCI BUS
S1_FRAME#
S1_IRDY#
S1_TRDY#
S1_DEVSEL#
S1_STOP#
S1_LOCK#
S1_PERR#
S1_SERR#
2.7K
S1_PAR
S1_REQ#1
S1_REQ#0
S1_GNT#1
S1_GNT#0
S1_ACK#64
S1_REQ#64
S1_PAR64
S1_M66EN
S1_P64TDI2
S1_P64TMS2
S1_P64TDI1
S1_P64TMS1
8.2K
S1_P64SDONEP2
S1_P64SDONEP1
S1_P64SBOP1
S1_P64SBOP2
C191
0.01U
C167
0.01U
VCC3 VCC
EC33
1000U
RP2
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9510
9510
R234 2.7K
R156 2.7K
R155 2.7K
R150 X_2.7K
R154 X_2.7K
R271 2.7K
R274 2.7K
R297 2.7K
R251 2.7K
RN16
RN39
1 2
3 4
5 6
7 8
8.2K
S1_P64PRSNT#21
S1_P64PRSNT#22
S1_P64PRSNT#11
S1_P64PRSNT#12
+
EC46
1000U
+
EC44
1000U
VCC3
VCC3
VCC3
1 2
3 4
5 6
7 8
VCC3
C111
C104
0.01U
0.01U
C96
C105
0.01U
0.01U
+
EC49
1000U
VCC3
+
EC30
1000U
1
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
P2 PCI-X Slot 1/2
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
39 68
of
Rev
0D
Page 40
5
AD[0..31]
AD[0..31] 29,43
CBE#[0..3]
R572
X_8.2K
R595
1K
R_PCIRST#
22P
R578 10K
R663 4.7K
R665 4.7K
R666 4.7K
R603 4.7K
R592 4.7K
R602 4.7K
R1182 2.7K
R1183 X_2.7K
R1217 X_4.7K
CBE#[0..3] 29,43
R574
8.2K
PGNT#0
PGNT#1
PGNT#2
R597
X_1K
PCIRST# 25,27,38,60
PIRQ_LTCH 42
MEMOFF#
SER_IRQ32_47
IRQ14
IRQ15
USB_IN_EN
NMI
OVRCUR
PREQ#0
PGNT#0
PWREN
D D
C C
PLOCK# 29
B B
A A
VCC3
0 = Enable External Arbiter
(Disable internal Arbiter)
1 = Disable External Arbiter
(Enable internal Arbiter)*
0 = Enable X-Bus Logic *
1 = Disable X-Bus Logic
1 = Enable IMB Logic *
0 = Disable IMB Logic
PLOCK#
R1139 0
R573
8.2K
R596
X_1K
STRAPPING OPTION
* = Used in this design
C412
VCC25
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC
VCC3
VCC3
PCIRST#
R571
4
SER_IRQ16_31 42
PIRQ_LTCH
SER_IRQ0_15 47
FRAME# 29,43
DEVSEL# 29,43
RSB_FERR# 10
22
PCICLK_RSB 22
PGNT#1 43
PGNT#2 29
PREQ#1 43
PREQ#2 29
IRQ14 46
IRQ15 46
IRDY# 29,43
TRDY# 29,43
PAR 29,43
STOP# 29,43
SERR# 29,41,43
PERR# 29,41,43
R_PCIRST#
SER_IRQ0_15
SER_IRQ16_31
SER_IRQ32_47
R674 0
IRQ14
IRQ15
MEMOFF#
NMI
NMI 10
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE#0
CBE#1
CBE#2
CBE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
SERR#
PERR#
RSB_FERR#
PCICLK_RSB
PGNT#0
PGNT#1
PGNT#2
PREQ#0
PREQ#1
PREQ#2
U35A
T4
PCIAD0
V1
PCIAD1
U2
PCIAD2
T3
PCIAD3
U1
PCIAD4
T2
PCIAD5
P4
PCIAD6
T1
PCIAD7
P3
PCIAD8
R1
PCIAD9
P2
PCIAD10
P1
PCIAD11
N3
PCIAD12
N2
PCIAD13
N1
PCIAD14
M4
PCIAD15
J2
PCIAD16
J3
PCIAD17
H1
PCIAD18
H2
PCIAD19
H3
PCIAD20
G1
PCIAD21
G2
PCIAD22
G3
PCIAD23
F2
PCIAD24
G4
PCIAD25
F3
PCIAD26
E3
PCIAD27
D1
PCIAD28
C1
PCIAD29
E4
PCIAD30
D3
PCIAD31
R3
CBE#(0)
M2
CBE#[1]
J1
CBE#[2]
F1
CBE#[3]
M1
FRAME#
K1
DEVSEL#
L4
IRDY#
L3
TRDY#
J4
PAR
K3
STOP#
L1
SERR#
L2
PERR#
V7
FERR
C2
PCILOCK#
Y6
PCIRST#
V9
PCICLK
V4
PGNT#[0]/XARB_STRAP
U5
PGNT#[1]/XROM_STRAP
Y3
PGNT#[2]/IMB_STRAP
W5
PCIREQ#[0]
Y5
PCIREQ#[1]
V6
PCIREQ#[2]
A6
SERIRQ
C7
PIRQ0
B6
PIRQ1
C16
PIRQ_LATCH
B4
P_IDEIRQ
A3
S_IDEIRQ
Y18
MEMOFF#/APICCLK
Y10
NMI
SWK-CSB5
DD_P(0)
DD_P(1)
DD_P(2)
DD_P(3)
DD_P(4)
DD_P(5)
DD_P(6)
DD_P(7)
DD_P(8)
DD_P(9)
DD_P(10)
DD_P(11)
DD_P(12)
DD_P(13)
DD_P(14)
DD_P(15)
DD_S(0)
DD_S(1)
DD_S(2)
DD_S(3)
DD_S(4)
DD_S(5)
DD_S(6)
DD_S(7)
DD_S(8)
DD_S(9)
DD_S(10)
DD_S(11)
DD_S(12)
DD_S(13)
DD_S(14)
DD_S(15)
IDEDAKP#
IDEDRQ_P
P_IDE_IOR
P_IDE_IOW
P_IDECS#(0)
P_IDECS01
IDEDAKS#
IDEDRQ_S
S_IDE_IOR
S_IDE_IOW
S_IDECS00
S_IDECS10
IDE_DA(0)
IDE_DA(1)
IDE_DA(2)
IN_IORDY_S
IN_IORDY_P
USBCLK
USBP2P
USBP2N
USBP3P
USBP3N
USBP1N
USBP1P
USBPON
USBPOP
PWREN
USB_IN_EN
USB_OVRCUR
3
RPDD0
F18
RPDD1
E19
RPDD2
D20
RPDD3
E18
RPDD4
G18
RPDD5
C20
RPDD6
E17
RPDD7
D18
C18
RPDD9
B19
RPDD10
A20
RPDD11
A19
RPDD12
B18
RPDD13
B17
RPDD14
C17
RPDD15
D16
RSDD0
C13
RSDD1
B13
RSDD2
A13
RSDD3
D12
RSDD4
C12
RSDD5
B12
RSDD6
B11
RSDD7
C11
RSDD8
A11
RSDD9
A10
RSDD10
B10
RSDD11
C10
RSDD12
D10
RSDD13
A9
RSDD14
C9
RSDD15
D9
RPDACK#
D14
PDREQ
A17
E20
G17
H18
F19
B15
C14
B14
A14
B8
C8
G20
G19
F20
A8
A18
W12
V13
Y14
Y13
W13
W15
V14
Y15
W14
W18
W17
V18
RPIOR#
RPIOW#
RPCS#1
RPCS#3
RSDACK#
SDREQ
RSIOR#
RSIOW#
RSCS#1
RSCS#3
RDA0
RDA1
RDA2
SIORDY
PIORDY
USBCLK48M
USBP2P
USBP2N
USBP3P
USBP3N
USBP1N
USBP1P
USBP0N
USBP0P
PWREN
USB_IN_EN
OVRCUR
PDREQ 46
SDREQ 46
SIORDY 46
PIORDY 46
USBCLK48M 22
USBP2P 45
USBP2N 45
USBP3P 45
USBP3N 45
USBP1N 45
USBP1P 45
USBP0N 45
USBP0P 45 MEMOFF# 12,16
RPDD3
RPDD2
RPDD1
RPDD0
RN95 33
RPDD4
RPDD6
RPDD5
RPDD7 RPDD8
RN98 33
RPDD11
RPDD10
RPDD9
RPDD8
RN97 33
RPDD15
RPDD13
RPDD14 RSDD13
RPDD12
RN99 33
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RSDA0 41
RSDA1 41
RSDA2 41
2
PDD[15..0]
SDD[15..0]
PDD[15..0] 46
SDD[15..0] 46
PDD3
PDD2
PDD1
PDD0
PDD4
PDD6
PDD5
PDD7
PDD11 AD11
PDD10
PDD9
PDD8
PDD15
PDD13
PDD14
PDD12
RDA1
RDA2
RDA0
RSDA0
RSDA1
RSDA2
RPDACK#
RSDACK#
RPIOW#
RPIOR#
RPCS#1
RPCS#3
RSCS#3
RSCS#1
RSIOR#
RSIOW#
RSDD3
RSDD2
RSDD1
RSDD0
RN100 33
RSDD7
RSDD6
RSDD5
RSDD4
RN101 33
RSDD10
RSDD11
RSDD9
RSDD8
RN96 33
RSDD15
RSDD14
RSDD12
RN102 33
1 2
3 4
5 6
7 8
RN94 33
1 2
3 4
5 6
7 8
RN154 33
R675 33
R668 33
1 2
3 4
5 6
7 8
RN93 33
1 2
3 4
5 6
7 8
RN103 33
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
PDA1
PDA2
PDA0
SDA0
SDA1
SDA2
PDDACK#
SDDACK#
PDIOW#
PDIOR#
PDCS#1
PDCS#3
SDCS#3
SDCS#1
SDIOR#
SDIOW#
SDD3
SDD2
SDD1
SDD0
SDD7
SDD6
SDD5
SDD4
SDD10
SDD11
SDD9
SDD8
SDD15
SDD14
SDD13
SDD12
PDA1 46
PDA2 46
PDA0 46
SDA0 46
SDA1 46
SDA2 46
PDDACK# 46
SDDACK# 46
PDIOW# 46
PDIOR# 46
PDCS#1 46
PDCS#3 46
SDCS#3 46
SDCS#1 46
SDIOR# 46
SDIOW# 46
1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
CSB5 PCI/IDE/USB
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
40 68
of
Rev
0D
Page 41
5
4
3
2
1
R624 0
EN_DEBUG 49
RSB_P1_IERR# 10
ALERT#
RSDA0 40
RSDA1 40
RSDA2 40
RSB_P2_IERR# 10
GPERR# 27,38
T_IMB_CON_T
T_IMB_PAR_T
T_IMB_D_R0
T_IMB_D_R1
T_IMB_D_R2
T_IMB_D_R3
T_IMB_CON_R
T_IMB_PAR_R
T_IMB_CLK_T
T_IMB_CLK_R
RSB_STPCLK# 11
LPC_FRAME# 47
CMIC_PINIT# 11,12,48
LPC_DRQ0# 47
T_IMB_D_T[0..3]
T_IMB_D_R[0..3]
PERR# 29,40,43
S1_PERR# 24,39
S1_SERR# 24,39
P64SERR# 24,31,32,33
GSERR# 27,38
P64PERR# 24,31,32,33
R1131 0
ROM_CS# 49
SERR# 29,40,43
RSB_SCL 54
RSB_SDA 54
1 2
3 4
5 6
7 8
RN90 56
R651 56
R652 56
R646 56
LPC_AD0 47
LPC_AD1 47
LPC_AD2 47
LPC_AD3 47
KBD_A20M# 47,48
SPKR 58
RSB_A20M# 10
XWC# 49
XRC# 49
CNB_FATAL#
P2_TRIP#
PERR#
S1_PERR#
S1_SERR#
EN_DEBUG
P64SERR#
GSERR#
P64PERR#
BIOS_NMI
GPM0X
P1_TRIP#
RSB_P1_IERR#
CMIC_ALART#
DUMP_SW
RSB_P2_IERR#
GPERR#
ROM_CS#
SERR#
RSB_SCL
RSB_SDA
GPOC2
T_IMB_D_T0
T_IMB_D_T1
T_IMB_D_T2
T_IMB_D_T3
RSB_STPCLK#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ0#
LPC_DRQ1#
LPC_FRAME#
HOLD
HOLDA
KBD_A20M#
SPKR
CMIC_PINIT#
RSB_A20M#
XALAT#0
XALAT#1
XALAT#2
XAD0
XAD1
XAD2
XAD3
XAD4
XAD5
XAD6
XAD7
XWC#
XRC#
VCC3
U35B
V3
GEVENT_0
W1
GEVENT_1
W2
GEVENT_2
W3
GEVENT_3
W4
GEVENT_4
Y4
GEVENT_5
Y1
GEVENT_6
Y2
GEVENT_7
Y19
GPCS0L/GEVENT_8
V17
GPCS1L/GEVENT_9
U16
GPCS2L/GEVENT_10
V15
GPM0/GEVENT_11
T20
GPM1/GEVENT_12
T19
GPM2/GEVENT_13
T18
GPM3/GEVENT_14
U18
GPOC3/GEVENT_15
Y16
GEVENT(16)
V12
USBTO1/GEVENT_17
U12
USBIRQ/GEVENT_18
V19
GEVENT_19/PICD0
W20
GEVENT_20/PICD1
U14
FRWP#/GEVENT_21
Y20
ROM_CS#/GEVENT_22
U19
GEVENT_23
U20
GPOC0
V20
GPOC1
T17
GPOC2
L18
I_DATA(0)
M20
I_DATA(1)
M19
I_DATA(2)
M18
I_DATA(3)
K20
I_CONTRO#
L20
I_PARITY
J17
O_DATA(0)
K19
O_DATA(1)
K17
O_DATA(2)
K18
O_DATA(3)
H19
O_CONTROL
H20
O_PARITY
L19
I_CLOCK
J18
O_CLOCK
U11
STPCLK#/SCKREQ#
P17
LAD00X
P19
LAD(1)
R20
LAD02X
P18
LAD03X
N20
LDRQ0
M17
LDRQ1
N18
LFRAME#
V2
FLUSHREQ#
W6
MEMACK#
Y17
KBD_A20#
W9
SPKR
C15
INIT
A15
A20M#
U7
XALAT#[0]
Y7
XALAT#[1]
Y11
XALAT#[2]
A7
XAD[0]
B7
XAD[1]
D5
XAD[2]
C4
XAD[3]
B3
XAD[4]
B2
XAD[5]
A2
XAD[6]
C3
XAD[7]
Y12
XWC#
V11
XRC#
SWK-CSB5
R662 X_1K
R671 X_1K
R672 X_1K
R673 X_1K
R664 X_1K
FID1
257
NC_R1
FID2
D7C6B5A4C5
258
NC_R2
NC_R3
NC_R4
NC_R5
M9
GND25
M10
GND26
M11
GND27
GND28
M12
L9
PCIGNT#4
PCIREQ#4
SIO_WAKEUP
SLPBTTNX
SLP_S3#
SLP_S5#
EXTEVENT
CPUGNT#
CPUREQ#
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDD25_1
VDD25_2
VDD25_3
VDD25_4
VDD25_5
VDD25_6
VDD25_7
VDD25_8
VDD25_9
VDD25_10
VDD25_11
VDD25_12
IMB_VREF
GND21
GND22
GND23
L10
L11
L12
SLPX#
SLP_S1
PLLRST
AGND
AVDD
IGNNE#
VDD5_1
VDD5_2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND24
RSB_CLK_14MHZ
W8
OSC
U9
Y8
C19
D2
B1
R19
B16
R18
B20
V10
W10
P20
INTR
V8
RSB_IGNNE#
Y9
V16
SMI#
U3
M3
A1
A12
A16
A5
B9
D19
E2
J19
N19
W11
W16
W19
W7
K2
R2
D11
D15
D6
F17
F4
K4
L17
R4
U10
U15
U6
R17
V5
E1
J20
D4
D8
D13
D17
H4
H17
N4
N17
U4
U8
U13
U17
J9
J10
J11
J12
K9
K10
K11
K12
VCC
C473
0.1U
R570 4.7K
R567 4.7K
SIOWAKEUP
SLBTN
RSB_SLP#
OSBSLP_S1#
OSBSLP_S3#
SOFF#
R669 0
OSBAVDD
INTR
EXT_SMI#
R640 8.2K
R645 8.2K
VCC3
VCC3
VCC25
VCC
VREF_T_IMB
C417
0.1U
RSB_CLK_14MHZ 22
SIOWAKEUP 47
SLBTN 58
RSB_SLP# 11
SOFF# 58,59
PS_PWRGD#
OSBAVDD
INTR 10
R1130
RSB_IGNNE# 10
EXT_SMI# 11
VCC3
VCC25
0
C445
0.1U
C447
0.1U
SIO_SMI#
VCC3
VCC3
C461
0.1U
C446
0.1U
PS_PWRGD# 12,25,27,59
SIO_SMI# 11,47
VREF_T_IMB
VREF_T_IMB
0.1U
C504
C421
0.1U
0.1U
C505
C413
0.1U
0.1U
OSBAVDD
C466
1U
+
+
VCC25
OSBSLP_S1#
OSBSLP_S3#
SOFF#
INTR
RSB_IGNNE#
C428
0.1U
R648
100
R647
100
EC81
47U
EC85
47U
R639 1K
R667 1K
R637 4.7K
R641 4.7K
R590 4.7K
L26
C415
C420
4.7U-0805
4.7U-0805
Put the Capactors on the
VCC3
corner of chipset
C506
C496
1U
1U C467
Put the Capactors on the
solder side
VCC3
SC43
SC44
0.1U
0.1U
Put the Capactors on the
solder side
VCC25
SC41
SC35
0.1U
0.1U
1 2
80_0805
C433
1U
SC36
0.1U
SC45
0.1U
VCC3
R566 4.7
C431
1U
SC34
0.1U
SC40
0.1U
VCC3
VCC25
T_IMB_D_T[0..3] 13
CMIC_ALERT# 12,16
ALERT# 25,27
T_IMB_CON_T 13
T_IMB_PAR_T 13
T_IMB_CON_R 13
T_IMB_PAR_R 13
T_IMB_CLK_T 13
T_IMB_CLK_R 13
P1_TRIP#
T_IMB_D_R[0..3] 13
CMIC_FATAL# 12,16
D D
VCC3
R632 4.7K
R630 4.7K
1 2
3 4
5 6
7 8
RN87 2.7K
R611 4.7K
R601 4.7K
R580 4.7K
R631 1K
R625 1K
R644 1K
R643 1K
R638 4.7K
T_IMB_CLK_R
T_IMB_CON_R
T_IMB_PAR_R
T_IMB_D_R3
T_IMB_D_R2
T_IMB_D_R0
T_IMB_D_R1
P1_THERMTRIP#
VCC_P
RSB_P1_PROCHOT#
R593 4.7K
R579 4.7K
R1216 4.7K
R1252 X_4.7K
R581 1K
DPLL Enable Strapping
VCC3
R1154 1K
C C
XALAT#[0..2]
XALAT#[0..2] 49
XAD[0..7]
XAD[0..7] 49
B B
P1_THERMTRIP# 4,10
RSB_P1_PROCHOT# 10
CNB_FATAL#
CMIC_ALART#
DUMP_SW
ROM_CS#
GPERR#
EN_DEBUG
GPOC2
BIOS_NMI
RSB_SCL
RSB_SDA
LPC_DRQ0#
LPC_DRQ1#
HOLD
HOLDA
KBD_A20M#
SIO_SMI#
RSB_A20M#
R946
RN151
150
150
1 2
3 4
5 6
7 8
GPM0X
R1152 4.7K
Q95 NPN-3904LT1-S-SOT23
Dump SW logic for NEC
R947
R948
150
150
R1153 0
R1155 0
R1156 4.7K
VCC3
P2_THERMTRIP# 6,10
A A
RSB_P2_PROCHOT# 10
P2_THERMTRIP#
VCC_P
5
R1158
RSB_P2_PROCHOT#
Q96 NPN-3904LT1-S-SOT23
1K
R1157 0
R1159 0
P2_TRIP#
DUMP_SW
SW2
2 3
1
DTSA-62N
4
VCC3
R983
4.7K
1 2
4
R984 1K
C726
0.1U
11 10
25ns
7 14
U19E
SN74HCT14-SOIC14
Dump SW logic for NEC
3
5VSB 5VSB
13 12
7 14
U19F
SN74HCT14-SOIC14
U46E
11 10
DM7407-SOIC14
DUMP_SW
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
CSB5 PCI/IDE/USB
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
41 68
of
Rev
0D
Page 42
8
D D
7
6
5
4
3
2
1
Interrupt Mapping Ckt
VCC3
R161
8.2K
PIRQ#15
PIRQ#15 38,39
C C
PCICLK_IRQ0 22
C113 X_104P
PIRQ#0
RN19
PIRQ#1
PIRQ#2
PIRQ#3
PIRQ#4
PIRQ#5
PIRQ#6
PIRQ#7
PIRQ#11
PIRQ#10
PIRQ#9
PIRQ#8
PIRQ#15
PIRQ#14
PIRQ#13
PIRQ#12
RN18
RN27
RN20
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
PIRQ#0 43
PIRQ#1 29
PIRQ#2 32
PIRQ#4 31,32
PIRQ#5 31,32
PIRQ#6 31
B B
PIRQ#7 31
PIRQ#11 39
PIRQ#10 39
PIRQ#9 31,37
PIRQ#8 31,37
PIRQ#15 38,39
PIRQ#14 38,39
PIRQ#13 39
PIRQ#12 39
VCC3
2.7K
C56 X_104P
2.7K
2.7K
2.7K
PCICLK_IRQ1 22
PIRQ#14 38,39
PIRQ#13 39
PIRQ#12 39
PIRQ#11 39
PIRQ#10 39
PIRQ#9 31,37
PIRQ#8 31,37
PIRQ_LTCH 40
R128 X_22
PIRQ#7 31
PIRQ#6 31
PIRQ#5 31,32
PIRQ#4 31,32
PIRQ#3 32,47
PIRQ#0 43
R103 X_22
PIRQ#14
PIRQ#13
PIRQ#12
PIRQ#11
PIRQ#10
PIRQ#9
PIRQ#8
PIRQ#7
PIRQ#6
PIRQ#5
PIRQ#4
PIRQ#3
PIRQ#2
PIRQ#1
PIRQ#0
10
11
12
13
14
3
4
5
6
2
15
1
10
11
12
13
14
3
4
5
6
2
15
1
74LV165 : 8 Bit
parallel-in/Serial-out
shift register
U11
SER
A
VCC
B
C
GND
D
E
F
G
H
QH
CLK
QH
INH
SH/LD
74LV165D-SOIC16
U9
SER
A
VCC
B
C
GND
D
E
F
G
H
QH
CLK
QH
INH
SH/LD
74LV165D-SOIC16
VCC3
16
8
9
7
16
8
9
7
VCC3
C75
0.1U
VCC3
VCC3
C102
0.1U
SER_IRQ16_31 40
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
Interrupt Mapping Ckt
Last Revision Date:
Sheet
Thursday, March 21, 2002
1
42 68
of
Rev
0D
Page 43
5
4
3
2
1
U81A
AD[0..31] 29,40
D D
CBE#[0..3] 29,40
PAR 29,40
C C
3VSB
B B
P32_PCIPME# 47
PIRQ#0 42
PCIRST2# 29,47,60
PGNT#1 40
PREQ#1 40
FRAME# 29,40
IRDY# 29,40
TRDY# 29,40
DEVSEL# 29,40
STOP# 29,40
PERR# 29,40,41
SERR# 29,40,41
R1222 4.7K
LAN1PCLK 22
R1242
47K
PIRQ#0
PCIRST2#
PGNT#1
PREQ#1
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PRSNT
M66EN
P32_PCIPME#
PAR
LAN1_ID
LAN1PCLK
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE#0
CBE#1
CBE#2
CBE#3
N7
M7
N5
M5
N4
N3
N2
M1
M2
M3
D1
D2
D3
C1
C6
C7
M4
C4
H2
C2
C3
G3
H3
H1
A10
C9
J12
H4
P6
P5
P4
P3
L1
L2
K1
E3
B1
B2
B4
A5
B5
B6
A8
B8
L3
F3
J1
A4
A3
J3
F2
F1
J2
A2
F4
A6
J4
K4
L7
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
AD08
AD09
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
PAR
IDSEL
PCI_CLK
INTA#
PCI_RST#
GNT#
REQ#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
SMB_CLK
SMB_DATA
VAUX_PRSNT
M66EN
PME#
NC_04
NC_05
NC_06
NC_07
BCM5702
VDDIO_PCI10
VDDIO_PCI01
VDDIO_PCI03
VDDIO_PCI02
VDDIO_PCI07
VDDIO_PCI08
VDDIO_PCI09
VDDIO_PCI04
VDDIO_PCI05
VDDIO_PCI06
VDDIO_01
VDDIO_02
VDDIO_03
VDDIO_04
REGSUP25
REGCTL25
REGSEN25
REGSUP12
REGCTL12
REGSEN12
VESD_1
VESD_2
VESD_3
EEDATA
EECLK
NC_01
NC_02
NC_03
MAC_PLLVDD3
MAC_PLL_VSS
TRST#
VSS_01
VSS_02
VSS_21
VSS_19
VSS_22
VSS_20
VSS_23
VSS_24
VSS_25
VSS_04
VSS_03
VSS_13
VSS_14
VSS_15
VSS_05
VSS_06
VSS_07
VSS_08
VSS_09
VSS_10
VSS_11
VSS_12
VSS_18
VSS_16
VSS_17
VDDP_01
VDDP_02
VDDP_03
GPIO0
GPIO1
GPIO2
A7
E1
P2
G1
C5
N6
E4
B3
K3
L4
A11
F11
K12
L12
REGS25UP
B11
REGS25CTL
C11
REGS25SEN
C10
REGS12UP
B9
REGS12CTL
B10
REGS12SEN
A9
P1
G2
A1
P10
M10
H12
K13
J13
L14
J11
L11
P7
M6
A12
TMS
B12
TDO
D12
TDI
C12
TCK
D11
N1
E2
F8
D8
G8
E8
D9
E9
F9
D4
K2
G6
L6
D7
G4
D5
E5
F5
G5
D6
E6
F6
G7
E7
F7
G11
SO
E10
SI
E11
SCLK
H11
CS#
P11
L13
K14
PLACE CAPACITORS CLOSE TO BCM5702 BALLS
C909
103P
C920
C921
103P
VCC
EESDA
EESCL
Place the power PNP away
from the BCM5702 with a
minimum distance of 1.5
inchs.
PLLVDD3
R1245 4.7K
R1246 4.7K
C927
C928
104P
104P
C922
104P
104P
REGS25UP
REGS25CTL
REGS25SEN
C961
2.2U
Pi-Filter, should close to Pin
EESCL
EESDA
LAN25
C929
104P
C913
C914
C916
C910
103P
C923
104P
B
R1247
1K
C915
C911
C912
104P
104P
104P
104P
104P
3VSB
PLACE CAPACITORS CLOSE TO
BCM5702 BALLS
EC153
22U
E C
Q115
FAIRCHILD-FSB660A
FB120S
2 1
FB34
C962
104P
3VSB
C964
104P
104P
REGS12CTL
LAN12
REGS12UP
C963
104P
8
7
6
5
VCC3
C917
C918
EC148
AT24C32
104P
B
U82
GND
3VSB
C955
104P
E C
Q116
FAIRCHILD-FSB660A
1
A0
2
A1
3
A2
4
22U
DIS_LAN 47
TO ENABLE/DISABLE ON BOARD LAN
LAN25
EC150
22U
REGS12SEN
VCC3
LAN25
C957
104P
C959
103P
U85
1
2
NC7S08-SOT23
EC152
22U
5
4 3
R1251 100
LAN12
C958
104P
LAN1_ID
3VSB
+
EC147
1000U
C960
103P
AD19
DIS_LAN
C956
104P
EC151
22U
104P
EC149
22U
VCC
WP
SCL
SDA
A A
5
4
3
PLACE CAPACITORS CLOSE TO BCM5702 BALLS
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
BCM 5702-1
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
43 68
Rev
0D
of
Page 44
5
4
3
2
1
Put Caps close to BCM5702 balls
D D
C936
C966
104P
C935
104P
C967
104P
C976
104P
C10
22P
C937
104P
104P
C969
C968
104P
104P
C978
C977
104P
104P
Y1
1 2
25M-18PF-HC49S-D
R1244 X_300
EC154
22U
C965
104P
C C
B B
LAN12
C938
C939
104P
104P
LAN12
C971
C970
104P
104P
LAN12
C980
C979
104P
104P
LAN25
C950
104P
LAN1_X1
LAN1_X2
R1248
200
C9
22P
U81B
F12
AVDDL_01
F13
K5
VDDC_03
L5
VDDC_04
H6
VDDC_05
J6
VDDC_06
K6
VDDC_07
H7
VDDC_08
J7
VDDC_09
K7
VDDC_10
H8
VDDC_11
J8
VDDC_12
K8
VDDC_13
P8
VDDC_14
J9
VDDC_15
K9
VDDC_16
J10
VDDC_17
K10
VDDC_18
L10
VDDC_19
E12
VDDC_20
P12
VDDC_21
P13
VDDC_22
M14
VDDC_23
H5
VDDC_01
J5
VDDC_02
N14
VDDC_24
P14
VDDC_25
C8
DC_01
H10
NC_08
J14
XTALVDD
N11
XTALI
N10
XTALO
N13
XTAL_VSS
G10
VSS_27
F10
VSS_26
M12
VSS_28
N12
VSS_29
G9
VSS_30
H9
VSS_31
L9
VSS_32
B7
VSS_33
AVDDL_02
AVDD_01
AVDD_02
TRD0M
TRD1M
TRD2M
TRD3M
BIASVDD
PLLVDD2
GPHY_PLL2_VSS
LED_LNK#
LED_100#
LED_1000#
LED_ACT#
TRD0P
TRD1P
TRD2P
TRD3P
RDAC
NC_16
NC_15
NC_14
NC_13
NC_12
NC_11
NC_10
NC_09
C930
104P
A13
F14
TRD0-
B14
TRD0+
B13
TRD1-
C14
TRD1+
C13
TRD2-
D14
TRD2+
D13
TRD3-
E14
TRD3+
E13
BIASVDD
A14
R1241
RDAC
D10
1.24KST
K11
N9
M9
M11
P9
M8
L8
N8
PLLVDD2
H14
M13
LINKLED#
G13
LINK100#
H13
LINK1000#
G12
ACTLED#
G14
FB120S
104P
104P
C931
104P
FB120S
C940
C941
104P
FB120S
C988
C989
104P
LAN12
2 1
FB36
LAN25
2 1
FB37
LAN25
2 1
FB38
LAN25
R1243 4.7
C982
C981
104P
104P
Low-Pass Filter,
should close to Pin
DESIGN GUIDE RECOMMEND
FB120S
C983
2.2U
FB35
C954
104P
Pi-Filter, should close to Pin
DESIGN GUIDE RECOMMEND
Place resistors close to
BCM5702 device
TRD0ÂTRD0+
TRD1+
TRD1-
TRD2+
TRD2-
TRD3ÂTRD3+
LAN12
2 1
C984
104P
R1229 49.9RST
R1231 49.9RST
R1228 49.9RST
R1230 49.9RST
TRLP0
TRLM0
TRLP1
TRLP2
TRLM2
TRLM1
TRLP3
TRLM3
LAN25
R1234 49.9RST
R1233 49.9RST
R1235 49.9RST
R1232 49.9RST
Each CTD pin put a Cap as
close as possible
1LINKLED#
1ACTLED#
1LINK1000#
1LINK100#
LANGND
CTD
1
2
3
4
5
6
7
8
9
10
11
12
C972
103P
RN162
330
15
1
GYO
2
3
4
5
6
7
8
16
T1
CTD3
TRD3ÂTRD3+
CTD2
TRD2ÂTRD2+
CTD1
TRD1ÂTRD1+
CTD0
TRD0ÂTRD0+
H5009
1 2
3 4
5 6
7 8
24
CTL3
23
TRL3-
22
TRL3+
21
CTL2
20
TRL2-
19
TRL2+
18
CTL1
17
TRL1-
16
TRL1+
15
CTL0
14
TRL0-
13
TRL0+
C975
C974
C973
103P
103P
103P
LINKLED#
ACTLED#
LINK1000#
LINK100# ACTLED#
RJ45+LED*2 DUAL
1LINK100#
12
1LINK1000#
11
1ACTLED#
10
1LINKLED#
9
JLAN1
TCT3
TRLM0
TRLP0
TCT2
TRLM1
TRLP1
TCT1
TRLM2
TRLP2
TCT0
TRLM3
TRLP3
LINK1000#
LINK100#
LINKLED#
R1237
R1236
R1238
R1239
75
75
75
R1253
0
RN163
330
C949
470P
FOR EMI
Close to RJ-45
75
Each CTL pin put a Resistor as
close as possible
C946
X_102P_2KV
3VSB
1 2
3 4
5 6
7 8
DESIGN GUIDE RECOMMEND
A A
5
BCM5702
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
BCM 5702-2
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
44 68
of
Rev
0D
Page 45
8
USB Connectors
7
6
5
4
USB1P
USB1P 38
USB1N
USB1N 38
3
2
1
D D
VCC
F2 2A-MINISMDC200-S
L11 80_0805
+
EC13
1000U
C33
0.1U
STACKED USB CONNECTOR
USBP0N
USBP0N 40
USBP0P
USBP0P 40
USBP1N
USBP1N 40
USBP1P
USBP1P 40
USBP0N
USBP1P USB1P
USBP1N USB1N
1 2
C C
B B
A A
3 4
USBP3N 40
USBP3P 40
USBP2P 40
USBP2N 40
RN85
1 2
3 4
5 6
7 8
27
CN10
X_8P4C-47P
5 6
7 8
RESVD
VCC
1 2
3 4
5 6
7 8
CN11
X_8P4C-47P
RESVD
Place close to CSB5
USB0N
USB0P USBP0P
1 2
3 4
5 6
7 8
F5 2A-MINISMDC200-S
RN86
7 8
5 6
3 4
1 2
27
USB0N
USB0P
RN83
15K
USB1P
USB1N
USB2N
RN84
15K
1 2
3 4
5 6
7 8
Place close to OSB4.
8
7
6
5
1 2
L1 120-1
L4 120-1
L5
1 2
L43 120-1
1 2
L44 120-1
L38 80_0805
+
EC112
1000U
USB3N
USB3P
USB2P
USB2N
L2
1 2
120-1
1 2
1 2
120-1
C882
47P
1 2
1 2
USB0#
USB0+
USB1+
USB1#
USB2+ USB2P
USB2#
C883
CN1
47P
47P
1 2
3 4
5 6
7 8
FOR EMI
C637
R845
0.1U
X_47K
L37
USB3#
120-1
L36
USB3+
120-1
4
USB3+
USB3#
USB0#
USB0+
Molex 52135-0520
1
2
3
4
5
C904 47P
C905 47P
3
JUSB1A
16
1
2
3
4
15 14
USBX3-D12-BK
JUSB2
1
2
3
FOR NEC
4
5
D1X5-BK
USB CONNECTOR
USB3#
USB3+
13
5
9
USB1#
6
USB2#
10
USB1+
7
USB2+
11
8
12
Micro Star Restricted Secret
2
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
USB Connectors
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
45 68
of
Rev
0D
Page 46
8
7
6
5
4
3
2
1
D D
C C
B B
PDD[15..0]
PDD[15..0] 40
BRSTDRV#
BRSTDRV# 47,60
PDREQ 40
PDIOW# 40
PDIOR# 40
PIORDY 40
PDDACK# 40
IRQ14 40
PDA1 40
PDA0 40
PDCS#1 40
VCC VCC
Standard IDE Ultra ATA/33/66/100 Ultra ATA/33/66/100 Primary Secondary
Signal Define Read Cycle Define Write Cycle Define IDE Channel IDE Channel
ATA100 IDE CONNECTORS
PRIMARY IDE CONN. SECONDARY IDE CONN.
R827
33
R818
10K
IRQ14
R813
PDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
PDA1
PDA0
PDCS#1
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
R676 33
R819 33
IDEACTP#
10K
RPDREQ
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
D2X20-1:21-BL-ZBT
VCC
PDD8
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
R808 150
PIDEDET
PDA2 SDA0
PDA2 40
PDCS#3
PDCS#3 40
IDEACTP#
IDEACTS#
D32 1N4148-S-LL34
D31 1N4148-S-LL34
VCC
C633
C635
0.1U
0.1U
SDDACK# 40
SDD[15..0] 40
SDREQ 40
SDIOW# 40
SDIOR# 40
SIORDY 40
IRQ15 40
SDCS#1 40
HDDLED
SDD[15..0]
R823
BRSTDRV#
33
VCC VCC
R809
10K
SDA1 40
SDA0 40
IRQ15
R822
PIDEDET
SIDEDET
HDDLED 34,58
SDREQ
SDIOW#
SDIOR#
SIORDY
SDDACK#
SDA1
SDCS#1
SDD7
SDD6 PDD9
SDD5
SDD4
SDD3
SDD2
SDD0
R677 33
R810 33
IDEACTS#
10K
PDD7
R824 10K
SDD7
R828 10K
RPDREQ
R807 10K
RSDREQ
R816 10K
R811 0
R820 0
RSDREQ
R812
10K
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
D2X20-1:21-WH-SBT
PPIDET
SSIDET
R821
10K
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14 SDD1
SDD15
R817 150
SIDEDET
SDA2
SDCS#3
PPIDET 47
SSIDET 47
SDA2 40
SDCS#3 40
DIOW# STOP STOP PDIOW# SDIOW#
DIOR# DMARDY# STROBE PDIOR# SDIOR#
IORDY STROBE DMARDY# PIORDY SIORDY
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
ATA 66 IDE Connectors
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
46 68
of
Rev
0D
Page 47
5
4
3
2
1
NVRD
XD7
XD6
XD5
XD4
XD3
XD2
XD1
XD0
31
NVRD#
32
XA2
33
XA1
34
XA0
35
XCS3#
36
XCS2#
37
XWR#
38
XRD#
41
XD7
42
XD6
43
XD5
44
XD4
1
XD3
2
XD2
3
XD1
4
XD0
18
SDO/IN 1
6
VCC
28
VCC
17
GND
39
GND
ISPLSI 2032E/TQFP44
1
2
3
4
5
6
7
8
J9
1
2
3
4
5
6
7
8
U58
PCIRST#
CSMODE
NVA02
NVA03
NVA04
NVA05
NVA06
NVA07
NVA08
NVA09
NVA10
NVA11
NVA12
NVA13
NVA14
NVWR#
SDI/IN 0
GALCLK
Y1/RESET#
Y2/SCLK
ispEN#
MODE
GOE0
RESERVE TO FLASH EEPROM
X1C
D D
R62 22M
Y2
32K-12.5PF-CSA-309-D
1 2
3
4
C31
10P
C C
X2C
R34
510K
C16
10P
VBAT
R716
1K
RTCVCC
LPC_CLK_SIO 22
LPC_DRQ0# 41
LPC_FRAME# 41
BRSTDRV# 46,60
SER_IRQ0_15 40
C553
C8
0.1U
0.1U
1 2
BAT1
BH-D2
LPC_AD3
LPC_AD3 41
LPC_AD2
LPC_AD2 41
LPC_AD1
LPC_AD1 41
LPC_AD0
LPC_AD0 41
LPC_CLK_SIO
LPC_DRQ0#
BRSTDRV#
SER_IRQ0_15
X1C
X2C
SIOCLK48M
SIOCLK48M 22
PSON#
PSON# 58
PASSWD_CLR#
QUICKBOOT#
ACLINKDT 53
ACLINKCK 53
FFWP#
FFWP# 49
CMOS_CLR#
V_BAT
VCC3
3VSB
U2A
110
LAD3
111
LAD2
112
LAD1
113
LAD0
114
LCLK
118
LDRQ_N
117
LFRAME_N
120
LRESET_N
119
SERIRQ
44
32KX2
42
32KX1
45
GPIO53/LFCKOUT
56
GPIO55/CLKIN
13
GPIO7/HFCOUT
39
ONCTL
49
GPIO43/PWBTOUT_N
54
GPIO54/VDDFALL
47
ACBCLK
46
ACLINKDT
ACLINKCK
ACBDAT
55
GPIO64/CKIN48
124
GPIO00/CLKRUN_N
9
GPIO05/XRDY
10
GPIO06/XIRQ
41
VBAT
69
VDD1
92
VDD2
116
VDD3
12
VSB1
40
VSB2
11
VSS1
43
VSS2
68
VSS3
93
VSS4
115
VSS5
NS-PC87417
VCC3 3VSB
+
C52
C24
C53
0.1U
0.1U
EC10
10U
0.1U
GPIO22/XA3
GPIO23/XA2
GPIO24/XA1
GPIO25/XA0
GPIO10/XA11
GPIO11/XA10
GPIO12/XA9
GPIO13/XA8
GPIO14/XA7
GPIO15/XA6
GPIO16/XA5
GPIO17/XA4
GPIO30/XD7
GPIO31/XD6
GPIO32/XD5
GPIO33/XD4
GPIO34/XD3
GPIO35/XD2
GPIO36/XD1
GPIO37/XD0
GPIO40/XCS3_N
GPIO41/XCS2_N
GPIO26/XCS1_N
GPIO27/XCS0_N
GPO60/XSTB2/XCNF2
GPIO61/XSTB1/XCNF1
GPIO62/XSTB0/XCNF0
GPIO21/XWR_XRW
GPIO20/XRD_XEN
GPIO42/SLBTIN_N
GPIO50/PWBTIN_N
GPIO51/SIOSMI_N
GPIO52/PWUREQ_SCI
GPIO63/ACBSA
GPIO44
GPIO45
GPIO46
GPIO47
+
EC2
10U
VRM_DETECT
16
17
18
19
1
P1_P64PME# LPC_FRAME#
2
3
4
5
6
7
8
XD7
24
XD6
25
XD5
26
XD4
27
XD3
28
XD2
29
XD1
30
XD0
31
20
21
22
23
32
33
34
15
14
35
36
37
38
48
50
51
52
53
C7
C12
0.1U
0.1U
S1_P64PME#
P32_PCIPME#
AGPPCIPME#
PPIDET
SSIDET
DIS_LAN
DIS_AUDIO
DIS_SCSI
SLEDEN
FANGPIO
XRW
XEN
IOSLBTIN
PWR_BUTTON#
SIO_SMI#
SIOWAKEUP
ACBSA
PLED
SUSLED
IOSLPS3#
IOSLPS5
P1_P64PME# 31,32
S1_P64PME# 39
P32_PCIPME# 43
APGPCIPME# 38
PPIDET 46
SSIDET 46
DIS_AUDIO 29
DIS_SCSI 33
PWR_BUTTON# 59
SIO_SMI# 11,41
SIOWAKEUP 41
R1202 0
PLED 58
SUSLED 58
Put this C as close J9 as possible
SDO
VCC
C770
C771
0.1U
0.1U
PIRQ#3 32,42
VCC
SDO
SDI
ispEN
MODE
C778
SCLK
0.01U
3VSB
B B
R1149 4.7K
R1150 4.7K
CMOS_CLR#
FFWP#
Move from CSB5 to SIO
9
10
11
12
13
14
15
16
19
20
21
22
23
24
25
26
8
5
29
27
ispEN
7
MODE
30
40
PCIRST2# 29,43,60
R1027
33
NVAD02
NVAD03
NVAD04
SDI
GALCLK
SCLK
5VSB
VBAT
KBD_A20M# 41,48
SER_IRQ0_15 40
NVAD05
NVAD06
NVAD07
NVAD08
NVAD09
NVAD10
NVAD11
NVAD12
NVAD13
NVAD14
R1028
NVRD
NVWR
R1029
1K
10
25
24
21
23
26
20
22
27
10K
9
8
7
6
5
4
3
2
1
VCC
A C
A C
KBD_A20M#
LPC_FRAME#
XRW
XEN
SER_IRQ0_15
U59
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
CS
OE
WE
HY62C256/L
PWROK# 59,60 DIS_LAN 43
GALCLK 22
D38
1N5817-S-DO-241AC
D39
1N5817-S-DO-241AC
RN8
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
11
D0
12
D1
13
D2
15
D3
16
D4
17
D5
18
D6
19
D7
28
VCC
14
GND
R30 4.7K
R48 4.7K
R7 4.7K
R8 4.7K
R46 4.7K
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
C772
C773
1U
0.1U
VCC3
1 2
3 4
5 6
7 8
4.7K
3VSB
JP11
CMOS_CLR#
1
2
R1151 33
D1X2
VCC3
A A
R1210 4.7K
QUICKBOOT#
QUICK BOOT JMP FOR NEC
JP13
QUICKBOOT#
1
2
R1211 33
D1X2
5
4
JP12
PASSWD_CLR#
1
2
R1132 33
D1X2
Clear Password, Design for NEC
3
SIOWAKEUP
R4 4.7K
PSON#
R3 1K
RN10
IOSLBTIN
ACBSA
IOSLPS3#
IOSLPS5
AGPPCIPME#
P1_P64PME#
S1_P64PME#
P32_PCIPME#
SLEDEN
FANGPIO
VRM_DETECT
PASSWD_CLR#
DIS_AUDIO
DIS_SCSI
DIS_LAN
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
NS PC87317 IO /NVRAM
1
R9 1K
R12 1K
R11 1K
R10 1K
R6 4.7K
R5 4.7K
R556 4.7K
R1133 4.7K
R1125 4.7K
R1126 4.7K
R1127 4.7K
Last Revision Date:
Thursday, March 21, 2002
Sheet
47 68
1 2
3 4
5 6
7 8
4.7K
Rev
0D
of
Page 48
8
7
6
5
4
3
2
1
D D
DSKCHG#
RDATA#
WRPRT#
TRK0#
1K
INDEX#
R763 1K
Parallel Port
C C
LPT1
VCC
RN109
1 2
3 4
5 6
7 8
R85 - By RCC design,not stuff when
normal operation
48
51
RSLCT
13
25
PE
12
24
BUSY
11
23
ACK#
10
22
PD7
9
21
PD6
8
20
PD5
7
19
PD4
6
18
PD3
5
SLIN#
17
PD2
4
RNIT#
16
PD1
3
ERR#
15
PD0
2
AFD#
14
STB#
B B
1
52
PGND
LPT-D25-BR-BI
D2X17-3:20.29.31-BK
FDD1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
DRATE0_R DRATE0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
AFD# RAFD#
STB# RSTB#
BUSY RBUSY
ACK# RACK#
DENSEL
DRATE0_R
INDEX#
MTR0#
DRV1#
DRV0#
MTR1#
DIR
STEP#
WRDATA#
WGATE#
TRK0#
WRPRT#
RDATA#
HDSEL#
DSKCHG#
R95 X_0
RN6
33
RN5
33
RN4
33
R52 33
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RPD7
RPD6
RPD5
RPD4
RPD3
RPD2
RPD1
RPD0
PE
RNIT#
ERR#
RACK#
RBUSY
RAFD#
RSTB#
RSLCT
RSLIN#
R1260 X_0
R1261 X_0
U2B
74
DENSEL
72
INDEX_N
71
MTR0_N
70
DR1_N/P16
67
DR0_N
66
MTR1_N/P17
65
DIR_N
64
STEP_N
63
WDATA_N
62
WGATE_N
61
TRK0_N
60
WP_N
59
RDATA_N
58
HDSEL_N
57
DSKCHG_N
73
DRATE0
79
PD7
80
PD6
81
PD5
82
PD4
83
PD3
85
PD2
87
PD1
89
PD0
76
PE
86
INIT_N
88
ERR_N
78
ACK_N
77
BUSY_WAIT_N
90
AFD_N_DSTRB_N
91
STB_N_WRITE_N
75
SLCT
84
SLIN_N_ASTRB_N
DTR2_N_BOUT2
CTS2_N
RTS2_N
DSR2_N
DCD2_N
DTR1_N_BOUT1/BADDR
CTS1_N
RTS1_N/TRIS
DSR1_N
DCD1_N
GPIO01/KBCLK
GPIO02/KBDAT
GPIO03/MCLK
GPIO04/MDAT
P12/PPDIS
KBRST_N
SOUT2
RI2_N
SOUT1
SIN1_N
RI1_N
GA20
NS-PC87417
C34
1 2
3 4
5 6
7 8
CN6
1 2
3 4
5 6
7 8
CN8
1 2
3 4
5 6
7 8
CN7
1 2
3 4
5 6
7 8
CN14
180P
180P
180P
180P
180P
RPD7
RPD6
RPD5
RPD4
RPD3
RPD2
RPD1
RPD0
RSLIN# SLIN#
BUSY
SLIN#
STB#
AFD#
PD4
PD5
PD6
PD7
PD0
PD1
PD2
PD3
RNIT#
ERR#
PE
RSLCT
ACK#
DTRB#
108
107
105
103
106
104
SIN2
102
109
100
99
97
95
98
96
94
101
125
126
127
128
121
122
123
CTSB#
RTSB#
DSRB#
SOUTB
SINB
DCDB#
RIB#
DTRA#
CTSA#
RTSA#
DSRA#
SOUTA
SINA
DCDA#
RIA#
KBCLK
KBDATA
MSCLK
MDATA
CMIC_PINIT#
KBD_A20M#
R33
100
DTRB# 50
CTSB# 50
RTSB# 50
DSRB# 50
SOUTB 50
SINB 50
DCDB# 50
RIB# 50
DTRA# 50
CTSA# 50
RTSA# 50
DSRA# 50
SOUTA 50
SINA 50
DCDA# 50
RIA# 50
KBCLK 50
KBDATA 50
MSCLK 50
MDATA 50
CMIC_PINIT# 11,12,41
KBD_A20M# 41,47
RPD4
RPD5
RPD6
RPD7
RN13 4.7K
RPD0
RPD1
RPD2
RPD3
RN12 4.7K
RACK#
RNIT#
ERR#
PE
RN7 4.7K
RBUSY
RSLIN#
RSTB#
RAFD#
RN11 4.7K
RSLCT
R53 4.7K
VCC
D53
1N4148-S-LL34
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R1262 X_0
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
Parallel Port Header
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
48 68
of
Rev
0D
Page 49
A
XAD[0..7]
XAD[0..7] 41
R722
0
2
3
4
5
6
7
8
9
11
1
2
3
4
5
6
7
8
9
11
1
2
3
4
5
6
7
8
9
11
1
XALAT#[0..2]
U41
D1
D2
D3
D4
D5
D6
D7
D8
CLK
VCC
OC
GND
N74F574D-SO20
U43
D1
D2
D3
D4
D5
D6
D7
D8
CLK
VCC
OC
GND
N74F574D-SO20
U42
D1
D2
D3
D4
D5
D6
D7
D8
CLK
VCC
OC
GND
N74F574D-SO20
XA0
19
Q1
XA1
18
Q2
XA2
17
Q3
XA3
16
Q4
XA4
15
Q5
XA5
14
Q6
XA6
13
Q7
XA7
12
Q8
20
10
XA8
19
Q1
XA9
18
Q2
XA10
17
Q3
XA11
16
Q4
XA12
15
Q5
XA13
14
Q6
XA14
13
Q7
XA15
12
Q8
20
10
XA16
19
Q1
XA17
18
Q2
XA18
17
Q3
XA19
16
Q4
XA20
15
Q5
XA21
14
Q6
XA22
13
Q7
XA23
12
Q8
20
10
XALAT#[0..2] 41
XAD0
XAD1
XAD2
4 4
3 3
2 2
XAD3
XAD4
XAD5
XAD6
XAD7
XALAT#0
XAD0
XAD1
XAD2
XAD3
XAD4
XAD5
XAD6
XAD7
XALAT#1
XAD0
XAD1
XAD2
XAD3
XAD4
XAD5
XAD6
XAD7
XALAT#2
B
C
D
E
System BIOS FLASH ROM
U49
XA0
12
A0
XA1
11
A1
XA2
10
A2
XA3
9
A3
XA4
8
A4
XA5
7
A5
XA6
6
A6
XA7
5
A7
XA8
27
A8
XA9
26
A9
XA10
23
A10
XA11
25
A11
XA12
4
A12
XA13
VCC
C578
0.1U
VCC
C568
0.1U
XA19
TP9
1
XA20
TP13
1
XA21
TP12
1
XA22
TP11
1
XA23
TP10
VCC
C567
0.1U
RCC_SCL 13,16,25,27,51,52,54
RCC_SDA 13,16,25,27,51,52,54
1
RCC_SCL
RCC_SDA
XA14
XA15
XA16
XA17
XA18
VCC3
28
A13
29
A14
3
A15
2
A16
30
A17
1 22
A18 CE#
PLCC32-SMT
24C01
8
A0
VCC
7
A1
WP
6
A2
SCL
VSS SDA
U3
SROM for NEC
XAD0
13
D0
XAD1
14
D1
XAD2
15
D2
XAD3
17
D3
XAD4
18
D4
XAD5
19
D5
XAD6
20
D6
XAD7
21
D7
32
VCC
24
OE#
31
PGM#
16
GND
1
2
3
4 5
VCC
C601
0.1U
ROM_CS# 41
XRC# 41
R_XWC#
D S
Q49
NDS7002A-S-SOT23
G
R767
X_8.2K
R897 X_8.2K
VCC
VCC3
R1121
10K
XWC# 41
FFWP# 47
VCC
J11
1
2
1
XAD0
XAD1
EN_DEBUG 41
EN_DEBUG
XAD2
XAD3
2
3
4
3
5
6
5
7
8
7
9
10
9
11
12
11
13 14
13 14
X_2X7 2MMPINHEADER
XAD4
4
XAD5
6
XWC#
8
XAD6
10
XAD7
12
VCC
DEBUG PORT
ADDR: ACh
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
Flash ROM & XAD Ckt
Last Revision Date:
Thursday, March 21, 2002
Sheet
E
49 68
of
Rev
0D
Page 50
8
7
6
5
4
3
2
1
Serial Port
+12V
C37
0.1U
D D
-12V
C26
0.1U
VCC
C48
0.1U
C C
RTSA# 48
DTRA# 48
SOUTA 48
CTSA# 48
DSRA# 48
DCDA# 48
RTSB# 48
DTRB# 48
SOUTB 48
CTSB# 48
DSRB# 48
DCDB# 48
RIA# 48
SINA 48
RIB# 48
SINB 48
D5
1N4148-S-LL34
RTSA#
DTRA#
SOUTA
RIA#
CTSA#
DSRA#
SINA
DCDA#
D6
1N4148-S-LL34
RTSB#
DTRB#
SOUTB
RIB#
CTSB#
DSRB#
SINB
DCDB#
U7
HI
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
LO
10
VSS(-12V)
TI-GD75232-SSOP20
U5
HI
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
LO
10
VSS(-12V)
TI-GD75232-SSOP20
VCC(5V)
VCC(5V)
20
VCC
NRTSA
5
DY1
NDTRA
6
DY2
NSOUTA
8
DY3
NRIA#
2
RY1
NCTSA#
3
RY2
NDSRA#
4
RY3
NSINA
7
RY4
NDCDA#
9
RY5
11
GND
20
VCC
NRTSB
5
DY1
NDTRB
6
DY2
NSOUTB
8
DY3
NRIB#
2
RY1
NCTSB#
3
RY2
NDSRB#
4
RY3
NSINB
7
RY4
NDCDB#
9
RY5
11
GND
NRTSA
NDSRA#
NCTSA#
NRIA#
NDCDA#
NSOUTA
NSINA
NDTRA
NDTRB
NSINB
NSOUTB
NDCDB#
NRIB#
NCTSB#
NDSRB#
NRTSB
CN5
1 2
3 4
5 6
7 8
180P
CN4
1 2
3 4
5 6
7 8
180P
CN3
180P
CN9
180P
COM-D9-GN
NDCDA#
NSOUTA
NSINA
NDTRA
1 2
3 4
5 6
7 8
NDCDB#
1 2
3 4
5 6
7 8
NSOUTB
NDTRB
COM1
1 6
1 6
2 7
2 7
3 8
3 8
4 9
4 9
5 10
5 10
11
COM2 HEADER
COM2
1 2
3 4
5 6
7 8
9
D2X5-1:5-WH
NDSRA#
NRTSA
NCTSA#
NRIA#
11
NDSRB#
NRTSB NSINB
NCTSB#
NRIB#
INTERNAL MODEM
WAKEUP HEADER
LAN WakeUp Header
5VSB
F1 1.1A-MICROSMD110-S
EC9
+
10U
B B
KBDATA 48
KBCLK 48
MSCLK 48
MDATA 48
KBDATA XKBDAT1
KBCLK
MSCLK XMSCLK1
MDATA
L12 80_0805
L9
1 2
120-1
L7
1 2
120-1
L6
1 2
120-1
L8
1 2
120-1
KBVCC
XKBCLK1
XMSDAT1
C23
0.1U
R51
X_47K
FOR EMI
STACKED PS2 CONNECTOR
J1
14
4
6
2
13
1
5
3
15 17
MINIDINX2-D12-ML
KBGND via Screw Hold
connect to System
GND
16
10
12
8
7
11
9
KBVCC
KBDATA
MDATA
KBCLK
MSCLK
RN9
1 2
3 4
5 6
7 8
8.2K
XMSCLK1
XKBCLK1
XMSDAT1
XKBDAT1
CN2
1 2
3 4
5 6
7 8
180P
Place Close to Connector
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
Serial Port Header / PS2 Interface
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
50 68
of
Rev
0D
Page 51
8
7
6
5
4
3
2
1
Winbond W782D Hardware Monitor
R32 10K
R45 10K
R49 10K
R54 10K
R63
R70 10K
R78
R69
R58
4.7K
R59
27K
R60
10K
R41
4.7K
R42
27K
R43
10K
CPU2_SMBALERT#
232K
5.1K
232K
VRM_VID[0..4]
VCCP1D
VCC1_5D
VCC3_3D
VCCP2D
VBATDD
RT1
1N4148-S-LL34
1N4148-S-LL34
VCC
R1213 1K
R65
-12VIN
R77
5VSBD
R68
-5VIN
T1
D23
3
2
1
CFAN2
D1X3-WH-SN
D14
3
2
1
CFAN1
D1X3-WH-SN
R1212 4.7K
7.5K
10K_0805
B
VREF782
56K
GNDA
VREF782
56K
GNDA
+12V
+
EC105
X_10U/16V/S
+12V
+
EC60
X_10U/16V/S
PWMOUT2
E C
SYSTEM
R57 4.7K
Q44
SI2303DS-S-SOT23
R39 4.7K
R38 1K
Q33
SI2303DS-S-SOT23
U78B
Q109
NPN-3904LT1-S-SOT23
R56
7
5
4
1K
6
14
N74F32,SOIC-14,4.5V-5.5V
VCC3
R2 4.7K
R1 4.7K
PWMO2
D S
D S
VCC
OVT782
VCC
SM Bus Slave Address =
0101[A2][A1][A0][x]b =
58h
Q10
NDS7002A-S-SOT23
G
R73 470
Q2
NDS7002A-S-SOT23
G
R26 470
PWMO1
PWMO2
ACTICE HIGH
BEEP/GPO#
L10
80_0805
L3
80_0805
T1
VRM_VID0
R19
4.7K
GNDA
HWM_14318M 22
37
38
39
40
41
42
43
44
45
46
47
48
VCC
C22
0.1U
VREF
VTIN3/PIITD3
VTIN2/PIITD2
VTIN1/PIITD1
VID0
OVT#
ARDMSEL
SMI#
SA2/IA2
SA1/IA1
SA0/IA0
CS#
R18 4.7K
VRM_VID[0..4] 4,6,56
VCC_P
FAN1IN
FAN2IN
VDD_IMB
RTCVCC
VREF782
VCC25
VCC3
-12V
5VSB
-12V
R13
10K
D D
C C
B B
R84 1K
36
VBAT
+5VIN
VINR0
-12VIN
+12VIN
+3.3VIN
VCOREA
IOR#
IOW#
CLKIND7D6D5D4D3D2
1234567891011
PWMO3
VCC
R93
4.7K
B
E C
2526272829303132333435
VID3
-5VIN
5VSB
GNDA
GPO#/BBEP
PWMOUT1
FAN3/PWMOUT2
CASEOPEN
D1/PWMOUT4
D0/PWMOUT3
VID1
12
VRM_VID1
PWMOUT2
PWMOUT3
R1141 470
FAN3IN
ALARM 58
Q11
NPN-3904LT1-S-SOT23
VCCP1D
VCC1_5D
VCC3_3D
VCCP2D
-12VIN
VBATDD
5VSBD
-5VIN
GNDA
BEEP/GPO#
VRM_VID3
U1
24
VID2
23
22
SDA
21
SCL
20
FAN1
19
FAN2
18
17
VID4
16
15
MR
14
GNDD
13
VCC
WB-WI782D
VRM_VID2 VREF782
PWMOUT1
RCC_SDA
RCC_SCL
FAN1IN
FAN2IN
FAN3IN
VRM_VID4
CHASISS
R1142 27K
R1143
10K
RCC_SDA 13,16,25,27,49,52,54
RCC_SCL 13,16,25,27,49,52,54
RSTDRV 60
VCC
C41
0.1U
R312 4.7K
R317 1K
Q30
NDS7002A-S-SOT23
+12V
1
2
Q32
SI2303DS-S-SOT23
3
EC56
+
C248
10U
X_104P
VCC3
R1045
X_1K
VCC3
R1052
X_1K
R1050
1K
R1044
1K
R1046
X_1K
VCC3
R1047
U67
2
VDD
10
ADD0
6
ADD1
3
D+
4
D-
SDATA
ALRT#
1
TEST
7
GND
8
GND
5
TEST
9
TEST
13
TEST
16
TEST
X_NE1617A
U68
2
VDD
10
ADD0
6
ADD1
STBY#
3
4
1
7
8
5
9
13
16
SCLK
D+
D-
SDATA
ALRT#
TEST
GND
GND
TEST
TEST
TEST
TEST
X_NE1617A
R1048
4.7K
4.7K
15
STBY#
14
SCLK
12
11
VCC3
R1053
R1054
4.7K
4.7K
15
14
12
11
SMBus Address: 1001101
CPU_SCL
CPU_SDA
CPU1_SMBALERT#
CPU_SCL 4,6,54
CPU_SDA 4,6,54
CPU1_SMBALERT# 4
SMBus Address: 1001110
CPU_SCL
CPU_SDA
CPU2_SMBALERT#
CPU2_SMBALERT# 6
R1043
1K
CPU1_THERMDA1 5
CPU1_THERMDC1 5
R1049
X_1K
R1051
X_1K
CPU2_THERMDA1 7
CPU2_THERMDC1 7
SYSTEM FAN 2
D50
1N4148-S-LL34
R309
4.7K
AMP 176393-4
SFAN2
1
1
2
2
3
3
4
4
D1X4-WH-S6
Not connect in inner layer.
Should be connector via
etch.
FOR NEC
U78A
VCC
A A
CPU1_SMBALERT#
8
R1214 4.7K
R1215 1K
PWMOUT1
B
E C
2
1
Q110
NPN-3904LT1-S-SOT23
7
7
14
N74F32,SOIC-14,4.5V-5.5V
PWMO1
3
6
OVT782
PWMOUT3
U78C
10
9
7
14
N74F32,SOIC-14,4.5V-5.5V
PWMO3
8
5
4
JCI1
2
CHASISS
1
D1X2
R82
3
RTCVCC
10M
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Hardware Monitor
Last Revision Date:
Thursday, March 21, 2002
Sheet
51 68
1
Rev
0D
of
Page 52
5
4
3
2
1
VCC
D D
1 23 45 6
7 8
RN155
1K
SFAN1IN
SFAN3IN
SFAN1OUT
SFAN3OUT
OVT785
RCC_SCL 13,16,25,27,49,51,54
RCC_SDA 13,16,25,27,49,51,54
RCC_SCL
RCC_SDA
1
2
3
4
5
6
7
8
9
10
U73
FANIN1/GPIO1
FANIN2/GPIO2
PWMOUT1
PWMOUT2
GPIO5
GPIO6
SMI#/GPIO7
OVT#/GPIO8
SCL
SDA
VCORE/GPIO16
+1.5V/GPIO15
+2.5V/GPIO14
GPIO13
TEMP_FAULT#/GPO11
WB-W83L785R-SSOP20
VTIN1
VTIN2
VREF
VCC
GND
VCC
VCC
+
C831
EC133
0.1U
10U
20
VTIN1
19
18
VREF785
17
16
+12MIN
15
P12MIN
14
13
12
11
1 23 45 6
7 8
RN156
1K
R1163
4.75KST
P12MIN
R1164
4.75KST
+12MIN
R1161
20KST
R1165
20KST
P12V
+12V
SLAVE ADDR : 52H
SYSTEM
VREF785
R14
10K
C C
+12V
R74
D2
4.7K
1N4148-S-LL34
SFAN1
1
SFAN1IN
B B
R75
2K
R76
10K
1
2
2
3
3
4
4
D1X4-WH-S6
SFAN4
3
2
1
X_D1X3-WH-SN
Q8
SI2303DS-S-SOT23
+
EC3
X_10U/16V/S
AMP 176393-4
FOR NEC
Not connect in inner layer.
Should be connector via
etch.
RT2
VTIN1
R40 4.7K
R44 1K
10K_0805
SYSTEM FAN 1
Q3
D S
NDS7002A-S-SOT23
G
R28 100
SFAN1PWM
R1208
4.7K
VCC
R1146
4.7K
U78D
7
OVT785
VCC
VCC
13
12
14
N74F32,SOIC-14,4.5V-5.5V
SFAN3OUT
SFAN1OUT
R348 100
R333 4.7K
R338 1K
3
Q34
NDS7002A-S-SOT23
SFAN3IN
R1148
10K
+12V
+
Q35
SI2303DS-S-SOT23
EC57
10U
R1147
2K
SYSTEM FAN 3
D51
1N4148-S-LL34
R328
4.7K
SFAN3
3
2
1
D1X3-WH-SN
11
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Hardware Monitor/W83L785
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
52 68
of
Rev
0D
Page 53
5
D D
4
3
2
1
VBAT
VBAT
C832
0.1U
ACLINKDT 47
U76
1
ACLINKCK 47
3VSB 5VSB
C C
R1196
3.4KST
R1197
14
4.7K
U74F
R1174
10K
2
NC7S08-SOT23
5
4 3
13 12
Q107
TTL-CMOS-74LVC014S-SOIC14
2N3904S
R1195
1KST
3VSB
14
U74C
B B
5 6
R1177 1K
TTL-CMOS-74LVC014S-SOIC14
VBAT
R1171
10M
1 2
G
G
14
U74A
TTL-CMOS-74LVC014S-SOIC14
R1172
10K
D
Q102
2N7002
S
D
Q103
2N7002
R1173 1K
3VSB
R1175
100K
EC134
22U
VBAT
12
11
9
D
Q
PR
+3.3V
CLK
8
Q
GND
CL
74LVC74S-SOIC14
7
13
C833
0.1U
ACLINKOK
14
U74B
3VSB
U77A
14
1
2
TI/SN74LVC32AD,SOIC-14,1.65V~3.6V
7
ACLINK
3
ACLINK 59
U44B
14
10
3 4
TTL-CMOS-74LVC014S-SOIC14
14
U77B
4
3VSB
R1176
EC135
100K
14
U74D
9 8
TTL-CMOS-74LVC014S-SOIC14
EC136
22U
22U
14
U74E
11 10
TTL-CMOS-74LVC014S-SOIC14
6
5
TI/SN74LVC32AD,SOIC-14,1.65V~3.6V
7
S
U77C
14
9
10
3VSB
C834
C835
0.1U
A A
0.1U
12
13
8
TI/SN74LVC32AD,SOIC-14,1.65V~3.6V
7
14
U77D
11
TI/SN74LVC32AD,SOIC-14,1.65V~3.6V
7
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
POWER RESUME
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
53 68
of
Rev
0D
Page 54
A
B
C
D
E
VCC3 VCC3 VCC3
C403
R552
R549
X_R
X_R
0.1U
U31
19
18
1
2
3
VCC3
20
10
VCC3
RSB_SDA 41
RSB_SCL 41
R560 100
R557 100
R550 100
ADD. : 1110 001z
Z - R/W BIT
4 4
PHL-PCA9544-SO20
3 3
5
SDA0
SDA
6
SCL0
SCL
8
SDA1
9
SCL1
12
SDA2
13
SCL2
A0
A1
15
SDA3
A2
16
SCL3
4
INT0
7
INT1
11
INT2
VDD
14
INT3
VSS
17
INTOUT
VCC25
R523
R525
R546
R529
R522
4.7K
R520
4.7K
4.7K
4.7K
R534
4.7K
4.7K
4.7K
R545
4.7K
1
3
5
7
M6
GND1
GND3
GND5
GND7
X_MNT_HOLE_8PIN
SMB1
RSB_SDA
1
2
RSB_SCL
3
D1X3-WH-SN
CPU_SDA 4,6,51
CPU_SCL 4,6,51
RCC_SDA 13,16,25,27,49,51,52
RCC_SCL 13,16,25,27,49,51,52
MEMA_SDA 18,19
MEMA_SCL 18,19
MEMB_SDA 17,19,23
MEMB_SCL 17,19,23
2
GND2
4
GND4
6
GND6
8
GND8
9
GND9
M8
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
M5
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
GND2
GND4
GND6
GND8
GND9
M3
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
2
GND2
4
GND4
6
GND6
8
GND8
9
GND9
2
4
6
8
9
M9
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
M2
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
M11
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
GND2
GND4
GND6
GND8
GND9
GND2
GND4
GND6
GND8
GND9
GND2
GND4
GND6
GND8
GND9
GND2
GND4
GND6
GND8
GND9
2
4
6
8
9
2
4
6
8
9
2
4
6
8
9
2
4
6
8
9
1
3
5
7
1
3
5
7
M7
1
GND1
3
GND3
5
GND5
7
GND7
X_MNT_HOLE_8PIN
M1
GND1
GND3
GND5
GND7
X_MNT_HOLE_8PIN
M10
GND1
GND3
GND5
GND7
X_MNT_HOLE_8PIN
GND2
GND4
GND6
GND8
GND9
GND2
GND4
GND6
GND8
GND9
GND2
GND4
GND6
GND8
GND9
2
4
6
8
9
2
4
6
8
9
2
4
6
8
9
2 2
1 1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
I2C Switch & IPMI
E
Last Revision Date:
Thursday, March 21, 2002
Sheet
54 68
of
Rev
0D
Page 55
5
D D
CHK3
C1871UC185
1 2
1.6U
1U
+12V
+12V_IN3
+
1800U-16V
1 2
EC38
+
R206 2.7K C160 0.047U
C153 1U
R204 1K
C159 0.1U
U12
FB_VCC25
1
C C
VCC_SC2420
VCC25_COMP1
VTT_BG
FB_VTT
VTT_COMP2
VTT_REGDRV
FB1
2
COMP1
3
NC1
4
BG
5
FB2
6
COMP2
7
REGDRV
8
ENABLE
9
PHASE2
10
DRVH2
11
BSTH2
12
DRVL2
13
BSTL2
14
VCC
SC2450ISW-SO28
VCC_SC2420
VTT_BSEL
AGND
CLKOUT
EXTCLK
PGND
PHASE1
DRVH1
BSTH1
DRVL1
BSTL1
28
RREF
NC2
OC-1
OC-2
OC+
R148 56K
27
26
25
C126 47P
24
23
22
21
20
VCC25_PHASE1
19
VCC25_DRVH1
18
VCC25_BSTH1
17
VCC25_DRVL1
16
15
R172 10
+
EC32
C151
10U
1U
B B
D10
1N5817-S-DO-241AC
EC27
+
10U
EC42
1800U-16V
4
C190
1U
12VDC_VTT_FET
A C
VTT_REGDRV
C183
1U
R149
51
D9
1N5817-S-DO-241AC
12VDC_VTT_FET
BCP5609
2
C
4
C
3
E
Q28
VTT_PHASE2
VTT_DRVH2
VTT_BSTH2
VTT_DRVL2
R270 10M
R262 10M
C125
R151
68
C118
B
Q25
E C
NPN-3904LT1-S-SOT23
R144
3K
1
B
4700P
100P
VCC_SC2420
R280 4.7
3
12VDC_VTT_FET
CEB703AL-S-TO263
22U
EC120
Q29
FB_VCC25
2
1
VCC25
R203
1.5K
R201
1K
R284 2.2
D12
A C
RB051L-40-S-SOD106
R341 4.7
C233
0.1U
Q31
FDB7045L-S-TO263
D13
RB051L-40-S-SOD106
A C
CHK4
1 2
3.3U
1000U
EC55
+
2.5V@ A
EC48
+
1000U
1000U
EC51
+
AVTT
12VDC_VTT_FET
1000U
+
EC58
FB_VTT
1.25V@ A
EC36
+
1000U
EC63
+
1800U-16V
22U
EC121
TO-252
Q39
Q37
CEU603AL-S-TO252
TO-252
D16
RB051L-40-S-SOD106
A C
CHK5
2.5U
R351 4.7
R197
5.1K
R354 2.2
D15
A C
C280 0.1U
RB051L-40-S-SOD106
R380 4.7
CEU603AL-S-TO252
VCC25
Vishay,SUB75N03-07 (N-CH,TO-263)
1.Vgs=+/-20V
C261
0.1U
R205
255
R202
1K
2.Id(max)=75A@T=25 (Packet Limit)
C260
=64A@T=100
0.1U
3.Id=-30A,Rds(on)=7mOHm @ Vgs=-10V
Id=-30A,Rds(on)=11mOHm @ Vgs=-10V,T=125
4.Qg=130nC(max),Qgs=18nC(typ),Qgd=10nC(typ)
@Vds=15V,Id=75A,Vgs=10V
CET,CEB703AL (N-CH,TO-263)
1.Vgs=+/-20V
2.Id(max)=40A@T=125-Pulse
3.Id=-25A,Rds(on)=17mOHm @ Vgs=-10V
Id=-10A,Rds(on)=30mOHm @ Vgs=-4.5
4.Qg=50nC(max),Qgs=6nC(typ),Qgd=7nC(typ)
@Vds=10V,Id=25A,Vgs=10V
AVTT
C293
C292
0.1U
0.1U
A C
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
VCC25 & A_VTT
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
55 68
of
Rev
0D
Page 56
5
4
3
2
1
VCC
R899
10
VCC_P
5
VRM_VID[0..4]
R903
2.2K
C670
C671
X_120P
TP_6301_VRM_R4
5600P
C669
0.01U
PWM1_C
PHASE1_C
PWM3_C
PHASE3_C
C667
1U
U52
20
VCC
10
P12V
7
5
7
5
VSEN
6
COMPFBFS/EN
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
7
9
GND
INTS-HIP6301-SOIC20
VCC
R909
330K
R910
X_2K
R950
10
R777
3.3/0805
PWM_L_G_1
C678
0.47U-0805
R952
10
R787
3.3/0805
PWM_L_G_3
C687
0.47U-0805
4
HIP6301_COMP
VRM_VID4
VRM_VID3
VRM_VID2
R904
15K
C672
104P
PWM_H_G_1
C682
PWM_BOOT_3
104P
PWM_H_G_3
VRM_VID1
VRM_VID0
D33
A C
1N5817-S-DO-241AC
U54
6
VCC
1
UGATE
8
PHASE
3
PWM
2
BOOT
4
GND
MOSDVR-INTS-HIP6601A-SOIC8
D36
1N5817-S-DO-241AC
U51
6
VCC
1
UGATE
8
PHASE
3
PWM
2
BOOT
4
GND
MOSDVR-INTS-HIP6601A-SOIC8
HIP6301_FB
PVCC
LGATE
P12V
A C
PVCC
LGATE
VRM_VID[0..4] 4,6,51
D D
C C
B B
A A
VCC3
R900
120K
CPU1_VRM_PWRGD 59
C668
X_104P
PGOOD
PWM4
PWM3
PWM2
PWM1
ISEN4
ISEN3
ISEN2
ISEN1
19
8
18
11
14
15
17
12
13
16
Q67
FDB6035AL-S-TO263
Q63
FDB7045L-S-TO263
Q65
FDB6035AL-S-TO263
Q61
FDB7045L-S-TO263
R902
120K
ISEN4_C
ISEN3_C
ISEN2_C
ISEN1_C
C673
1U-0805
COIL_P12V_CPU COIL_P12V_CPU
1 2
C683
1U-0805
COIL_P12V_CPU
1 2
C676
X_104P
C684
X_104P
CHK8
1.2U-20%
CHK6
1.2U-20%
R905 4.32K
R906 4.32K
R907 4.32K
R908 4.32K
P12V
VCC_P
Q74
NDS7002A-S-SOT23
PWM4_C
PWM3_C
PWM2_C
PWM1_C
PHASE4_C
PHASE3_C
PHASE2_C
PHASE1_C
L39 2.5U
1 2
EC113
1800U-16V
PWM2_C
PHASE2_C
PWM4_C
PHASE4_C
3
EC114
1800U-16V
C674
104P
C680
104P
CPU_VRM_OEN 59
CPU_VRM_OEN
HIGH: DISABLE VRM
LOW : ENABLE VRM
EC116
EC115
1800U-16V
1800U-16V
PWM_BOOT_2 PWM_BOOT_1
PWM_H_G_2
U53
6
VCC
1
UGATE
8
PHASE
3
PWM
2
BOOT
4
GND
MOSDVR-INTS-HIP6601A-SOIC8
PWM_BOOT_4
PWM_H_G_4
U50
6
VCC
1
UGATE
8
PHASE
3
PWM
2
BOOT
4
GND
MOSDVR-INTS-HIP6601A-SOIC8
D34
A C
1N5817-S-DO-241AC
PVCC
LGATE
P12V
D35
A C
1N5817-S-DO-241AC
PVCC
LGATE
EC117
1800U-16V
EC118
1800U-16V
P12V
R949
10
R789
3.3/0805
7
PWM_L_G_2
5
C679
0.47U-0805
R951
10
R784
3.3/0805
7
PWM_L_G_4
5
C686
0.47U-0805
VCC_P
VCC_P
VCC_P
EC122
+
560u
EC77
+
560u
EC100
+
560u
COIL_P12V_CPU
EC119
1800U-16V
+
+
+
2
EC123
+
560u
EC83
+
560u
EC96
+
560u
C675
1U-0805
Q66
FDB6035AL-S-TO263
1 2
Q62
FDB7045L-S-TO263
C681
1U-0805
COIL_P12V_CPU
Q64
FDB6035AL-S-TO263
1 2
Q60
FDB7045L-S-TO263
C677
X_104P
C685
X_104P
EC124
560u
EC79
560u
EC92
560u
CHK7
1.2U-20%
CHK9
1.2U-20%
EC88
EC84
+
+
560u
560u
EC89
EC86
+
+
560u
560u
VCC_P VCC_P
VCC_P
EC90
EC87
+
+
560u
560u
EC99
EC80
+
+
560u
560u
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
+
+
VRM
EC94
560u
EC95
560u
1
EC101
+
560u
EC91
+
560u
Last Revision Date:
Thursday, March 21, 2002
Sheet
56 68
Rev
0D
of
Page 57
5
4
3
2
1
Q20
CHK1
VCC_IN1
C64
1U
1 2
1.6U
1U
1 2
+
VCC
R132
10
C98
0.1U
EC19
1000U
EC20
+
1000U C81
R1311KR129
R130
2K
1K
C99
0.1U
C63
C80
1U
1U
U10
1
VCC
2
CS-
3
CS+
4 5
PGND DH
SC1101CS-SO8
+12V
TYPEDET# 27,38
GND
R111
VCC
D D
C C
B B
CEU603AL-S-TO252
TO-252
DSG
IN1
R107
4.7
8
7
FB
6
BST
C60 0.1U
4.7
VCC3
R86
X_1K
R88 1K
B
TYPEDET#
OUT
D8
SBG1040CT-S-TO263
VCC3 +12V
R106
1K
Q13
NPN-3904LT1-S-SOT23
E C
R87
1K
IN2
R110
24
R109
120
VDD_IMB
B
B
CHK2
1 2
R114
1K
Q17
NPN-3904LT1-S-SOT23
E C
+12V
R105
1K
Q12
NPN-3904LT1-S-SOT23
E C
4U
C59
1000P-0805
R167 10M
VCC3
EC11
C49
+
0.1U
10U
D
Q18
G
CEU603AL-S-TO252
TO-252
S
D
Q21
CEU603AL-S-TO252
G
TO-252
S
VDD_AGP
VDD_IMB
EC15
+
1000U
EC17
C76
+
10U
0.1U
1 2
+
1.5V @ 8 A
EC25
EC61
+
1000U
470U/4V C133
VAGP_CARD
+
EC52
1000U
1 2
EC26
+
1000U
3.3/1.5V@ A
For 4X AGP
C79
0.1U
C132
1U
1U
VCC3
EC12
C77
+
10U
VCC3
+12V
R98
D7
A A
1N4148-S-LL34
8.2K
C50
0.1U
C65
0.1U
0.1U
U8
4
IN
5
EN#
DRV
ADJ
GND
SC1548CSK-SOT235
2
SOT-23
5pin
3
1
Q19
CEU603AL-S-TO252
TO-252
1.5V@ A, For CIOB-G Core Logic & 4X AGP
R97
100
R96
X_18RST
VDD_AGP
C128
EC24
+
0.1U
1000U
SC1548CSK-ADJ -> 48
SC1548CSK-1.8V -> 4818
SC1548SCK-1.5V -> 4815
DRV
GND
2 1
3
ADJ
SC1548CSK
4
5
IN EN
Non-Stuff if use
SC1548CSK-1.5V
5
4
3
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VDD_IMB & VDD_AGP
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
57 68
Rev
0D
of
Page 58
5
JFP1
HDD+
VCC
R803 330
HDDLED 34,46
FP_RST# RFPRST#
FP_RST# 59
R850 330
D D
HDDLED
1
HDD+
3 4
HDD- SLED
5 6
RST- PWSW+
7
RST+
9
NC
D2X9-3:3.17.4-BK
Molex 52135-0220
JSW1
1
2
D1X2
PWSW-
2
PLED
8
R1207
POWER SW FOR NEC
ALARM 51
D52
C C
SPKR 41 SLBTN 41
1N4148-S-LL34
R1185
2.7K
NPN-3904LT1-S-SOT23
4
PLED1
PLED2
RPWRSW# PWRSW#
R847 330
HDDLED
1000P-0805
PWRSW#
PWRSW# 59
330
RN160
1 2
3 4
5 6
7 8
150
Q104
C884
0.1U
C631
PWRSW# 59
VCC
VCCSPK
R1184
330
VCCSPK 29
3
VCC
RN157
7 8
5 6
3 4
1 2
4.7K
HDDLED
SUSLED
G
G
D
Q98
2N7002
G
S
D
Q99
2N7002
S
D
Q100
2N7002
G
S
D
Q101
2N7002
S
JSLP1
X_D1X2
2
VCC
R1134
R1135
R1032
240
240
240
J6
1
1
2
2
3
HDLED
SLPLED
5VSB
R778
4.7K
R779
1
2
1 2
330
2 1
C620
4.7U-0805
4
5
6
U18E
11 10
SN74HCT14-SOIC14
3
4
5
Molex
6
52135-0620
FOR
D1X6
NEC
1
5VSB
R781
2.7K
R773
Q53
NPN-3904LT1-S-SOT23
2.7K
VCC
1 2
Q55
NPN-3904LT1-S-SOT23
RN112D
4.7K
7 8
RN113B
3 4
4.7K
Q56
NPN-3904LT1-S-SOT23
VCC
1 2
Q54
NPN-3904LT1-S-SOT23
RN112A
4.7K
RN112B
3 4
4.7K
RN111A
4.7K
RN111C
5 6
4.7K
Q70
NPN-3904LT1-S-SOT23
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Q68
NPN-3904LT1-S-SOT23
PLED2
Q69
NPN-3904LT1-S-SOT23
PLED2
Front Panel and ATX Power Connector
1
3VSB
VCC3
VCC
5VSB
B B
5VSB
5VSB
RN107A
4.7K
1 2
RN107B
5
3 4
4.7K
PSON# 47
A A
R734
4.7K
Q46
NPN-3904LT1-S-SOT23
5VSB
RN107C
4.7K
5 6
Q47
NPN-3904LT1-S-SOT23
C588
X_104P
ATX_PSON
5VSB
R1039
ATXPOK
FANC FANM
X_10K
ATXPOK
4
P12V
C204
0.1U
POWERJ1
1
3.3V
2
3.3V
3
3.3V
4
GND1
5
GND2
6
+5V
7
5VAUX
8
GND3
9
GND4
10
GND5
11
POWER GOOD
12
FANC
ATXPOK 59
POWERCONN2X12
4
NC
3
+12V
2
+12V
1
+12V
POWERCONN2X4
POWERJ2
3.3V
3.3V
GND6
GND7
+5V
+5V
+5V
-12V
+12V
+12V
On/Off
FANM
8
NC
7
COM
6
COM
5
COM
VCC VCC3 VCC3
3
13
14
15
16
17
18
19
20
21
22
23
24
C135
X_104P
VCC3 VCC
ATX_PSON
R1040
X_1K
C715
X_104P
P12V P12V
C717
X_104P
+12V
-12V
ATX_PSON 59
C716
X_104P
C718
X_104P
RN111B
4.7K
3 4
RN111D
5 6
RN113C
5 6
4.7K
RN112C
4.7K
7 8
4.7K
VCC
PLED 47
SOFF# 41,59
3VSB
RN113A
4.7K
1 2
SUSLED
SUSLED 47
2
PLED1
Last Revision Date:
Thursday, March 21, 2002
Sheet
R849
330
58 68
VCC VCC
R848
330
JGL1
1
2
3
X_YJ103
Rev
0D
of
Page 59
5
4
3
2
1
D D
From ATX PWR,IPMI
ATXPOK 58
ITP_RESET# 9
VCC
R330
4.7K
1 2
PWRSW# 58
From Panel
SOFF# 41,58
From CSB5
ATX_PSON
3 4
ATX_PSON 58
From ITP
FP_RST# 58
From
C C
B B
Panel,IPMI
1 2
R971 4.7K
ITP_RESET#
50ns
U18B
SN74HCT14-SOIC14
5VSB
R345
10K
1 2
2 1
C282
1U
5VSB
5 6
25ns
U19C
SN74HCT14-SOIC14
7 14
Philip TTL Spec . T=25
74HC08 Ioh=40mA(max)
MAX709M Power Comsumption 200uA(max)
MAX709M will keep RESET# assert for 140ms after VCC rises
above the threshold (790M=4.40V) and Output voltage will be
VCC-1.5V
U17B
4
5
74HC08-SOIC14
VCC
1 2
ATXPOK
6
18ns
U18C
5 6
25ns 25ns
SN74HCT14-SOIC14
5VSB 5VSB
1 2
25ns 25ns
PWRGOOD
R331
4.7K
Q87
2N3904S
7 14
U19A
SN74HCT14-SOIC14
5VSB
14 7
4
18ns
5
1
2
U63
3
4
MAX6315
U17A
74HC08-SOIC14
VCC
MR
ATXPOK
3 4
6
U21B
74HC08-SOIC14
RESET#
GND
7 14
25ns
43ns
PWRGOOD
3
VCC3
1 2
2
1
U18A
25ns
1 2
SN74HCT14-SOIC14
U19B
SN74HCT14-SOIC14
5VSB
9 8
25ns
R898
4.7K
7 14
5 6
U19D
SN74HCT14-SOIC14
U30C
7ns 18ns
DM7407-SOIC14
U30E
11 10
DM7407-SOIC14
U18D
9 8
25ns
SN74HCT14-SOIC14
3VSB Tran,SM Bus Isolation
1
2
ACLINK 53
VCC25
R548
75
VCC25
R941 1K
5VSB
14 7
18ns
POWERGOOD_CMIC 13,16
2 1
CMIC-LE,Strapping of CMIC-LE
C386
X_10P
R509
1K
CMIC-LE,CIOBX2,CIOBG,CSB5
2 1
C371
X_10P
+12V
PWROK# 47,60
3
U21A
74HC08-SOIC14
Philip TTL Spec . T=25
74HC08 tpd=18ns(max)
74HC14 tpd=25ns(max)
74F07 tpd= 7ns(max)
CPU1_VRM_PWRGD 56
PS_PWRGD# 12,25,27,41
1K
R940
R1169 X_0
9
10
Q83
NPN-3904LT1-S-SOT23
14 7
CPU1_VRM_PWRGD
PWRGOOD
PWRGOOD
CPU2_VRM_PWRGD
CPU_VRM_OEN 56
CPU1/2 VRM_OEN
8
U21C
74HC08-SOIC14
R1170
VCC_P VCC_P
R510
R508
40.2
U17C
9
10
74HC08-SOIC14
U17D
12
13
74HC08-SOIC14
1K
1 2
0
R364
U30D
9 8
8
7ns
DM7407-SOIC14
U30F
11
13 12
7ns
DM7407-SOIC14
CPU2_VRM_PWRGD CPU1_VRM_PWRGD
R792 0
PWR_BUTTON# 47
To SIO
2 1
C288
1U
40.2
CPU1_PWRGD 4
CPU1
CPU2_PWRGD 6
CPU2
2 1
2 1
C370
C369
X_10P
X_10P
Q93
NPN-3904LT1-S-SOT23
PS_PWRGD#
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
Power OK / Reset
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
59 68
of
Rev
0D
+12V
R1118 1K
A A
5
VCC25
R1209 1K
2 1
C820
X_1U
Q108
2 1
2 1
C985
C906
1U
1U
4
NPN-3904LT1-S-SOT23
Page 60
5
VCC3
VCC3
RN3
C29
330
R66
3VSB
D D
PCIRST_X#
PCIRST_X# 12
C C
P1PCIRST_X# 24
S1PCIRST_X# 24
P1PCIRST_X#
S1PCIRST_X#
14 7
5 6
2.6ns
U6C
SN74LVC07A-SOIC14
3VSB
14 7
1 2
U6A
SN74LVC07A-SOIC14
3VSB
14 7
9 8
2.6ns
U6D
SN74LVC07A-SOIC14
3VSB
14 7
11 10
2.6ns
U6E
SN74LVC07A-SOIC14
3VSB
14 7
13 12
2.6ns
U6F
SN74LVC07A-SOIC14
330
1 2
0.1U
3 4
5 6
7 8
PCIRST#
C32
X_102P
PCIRST2#
C28
X_102P
BRSTDRV#
C47
X_102P
C40
X_102P
C36
X_102P
4
PCIRST# 25,27,38,40
CIOB-X,CIOB-G,AGP,CSB5
PCIRST2# 29,43,47
82550,PCI33 SLOT,IPMI, 2 TTL
BRSTDRV# 46,47
HDD,LPC SIO,IPMI SLOT
P1PCIRST# 31,32,33,34
SCSI,EMRL LOGIC,P64 Slot1,P64 Slot2
S1PCIRST# 39
PCI-X SLOT1,PCI-X SLOT2
3
2
1
VCC 3SBY Voltage Regulator
5VSB
EC4
+
10U
+12V
R27
4.7K
R37 4.7K
PWROK# 47,59
B
NPN-3904LT1-S-SOT23
E C
Q7
VR1
LT1084S-SOT89-0.8A
3 2
VIN VOUT
C30
0.1U
P-CH
N-CH
ADJ
1
3VALWAYS
VCC3
R79
187
R64
324
Q1
SI2303DS-S-SOT23
SOT-23
Q4
CEU603AL-S-TO252
TO-252
EC5
+
10U
A C
D1
1N5817-S-DO-241AC
+
EC1
1000U
3VALWAYS
C19
0.1U
3VSB
SI2303DS (P-CH,SOT-23) Spec :
1.Vgs=+/-20V
2.Id=-1.7A,Rds(on)=210mOHm @ Vgs=-10V,T=25
Id=-1.3A,Rds(on)=460mOHm @ Vgs=-4.5
CET,CEU73AL (P-CH,TO-252)
1.Vgs=+/-20V
2.Id(max)=240A@T=125-Pulse
3.Id=-25A,Rds(on)=22mOHm @ Vgs=-10V
Id=-10A,Rds(on)=40mOHm @ Vgs=-4.5
4.Qg=40nC(max),Qgs=6nC(typ),Qgd=2nC(typ)
C2
@Vds=10V,Id=25A,Vgs=10V
0.1U
PCIRST2#
B B
A A
PCIRST2#
5
U18F
13 12
3VSB
14 7
3 4
U6B
SN74LVC07A-SOIC14
SN74HCT14-SOIC14
VCC25
RSTDRV 51
W83782D
R72
330
DIMM_RST# 17,18,19
DDR DIMM1,DIMM2,DIMM3,DIMM4
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
Reset Buffer & 3VSB/USB Power
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
60 68
of
Rev
0D
Page 61
5
4
3
2
1
PCB1-U49-2
D D
BATX1
BAT-CR2032-3V-210MAH
CPUH1
CPUH2
HeatSink claim CPU HeatSink claim CPU
MXIC-4M-PLCC32
H8
H1
H2
H3
1
1
1
1
H4
1
1
H9
1
1
1
1
1
1
H6
H5
H7
1
1
1
1
1
1
H10
H11
H12
1
1
1
1
1
1
X1
X2
Heat1
X1
X2
HeatSink for CMIC-LE
X3
X3
X4
X4
Heat2
Heat3
HeatSink claim for CMIC-LE #1 HeatSink claim for CMIC-LE #2
BACKPLATE2
Heat4 BACKPLATE1 Heat5
CPU BACK PLATE
Optical Point
C C
SOLD5
1 2
TOP7
1 2
TOP5
1 2
SOLD7
1 2
1 2
1 2
S25
S15
HeatSink claim for CMIC-X2 HeatSink claim for
CMIC-G
B B
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Manual Part
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
61 68
of
Rev
0D
Page 62
5
PCI RESOURCE TABLE
4
3
2
1
DEVICE/
SLOT
D D
AGP1 PCIRST# ------- GREQ# GGNT#
PCIIRQ REQ# GNT# PCIRESET IDSEL
14,15
PCI1 6 7 8 9 P64REQ#1 P64GNT#1 P1PCIRST# P64AD19
PCI2 2 3 4 5 P64REQ#3 P64GNT#3 P1PCIRST# P64AD21
PCI3 (EMRL) 4 5 9 8 P64REQ#0 P64GNT#0 P1PCIRST# P64AD18
Adaptec 7899W
PCIX1
PCIX2 S1_AD19
C C
GIGA LAN 82540/550 AD19 PREQ#1 PGNT#1 0 PCIRST2#
H/W AUDIO CT5880
8,9
10,11,12,13 S1_GNT#0
P64REQ#2 P64GNT#2 P1PCIRST# P64AD20
S1_REQ#1
S1_REQ#0
S1_GNT#1 12,13,14,15
S1PCIRST# S1_AD18
S1PCIRST#
1 PREQ#2 PGNT#2 PCIRST2# AD20
I2C ADDRESS Map
Signal Address Device
CPU1 EEPROM
CPU_SCL/SDA
CPU_SCL/SDA
CPU_SCL/SDA
CPU_SCL/SDA
CPU_SCL/SDA
CPU_SCL/SDA
RCC_SCL/SDA
RCC_SCL/SDA
RCC_SCL/SDA
RCC_SCL/SDA
RCC_SCL/SDA
RSB_SCL/SDA
RCC_SCL/SDA W83L785R
RCC_SCL/SDA AC SROM 24C01
MEMA_SCL/SDA
MEMA_SCL/SDA
MEMA_SCL/SDA
MEMB_SCL/SDA
MEMB_SCL/SDA
MEMB_SCL/SDA
A0
CPU1 THERMAL SNSR
30
A232CPU2 EEPROM
CPU2 THERMAL SNSR
*CPU1 THERMAL SNSR
*4E
*CPU2 THERMAL SNSR
*4D
CMIC FUNCTION 0 C0
C0C0CMIC FUNCTION 1
CMIC FUNCTION 2
C8CACIOB 1
CIOB 2
80 RSB5
W83782D RCC_SCL/SDA
5A
52
A0 DIMM2
A4 DIMM4
A8A0DIMM6
DIMM1
A4 DIMM3
A8 DIMM5
PHL-PCK2507 D2 MEMB_SCL/SDA
Power Supply Symbols & Usage
SYMBOL
VCC_P
VCC25
AVTT
B B
VDD_IMB 1.5V CMIC, CIOBs
VALUE
Set by VID
+2.5V
+1.25V
Dissipate
Current MAX.
150A
20A
VDD_AGP 1.5V CIOB-G, AGP CONNECTOR
1.5/3.3V AGP CONNECTOR VAGP_CARD
3VSB
+3.3V
USBVCC1/2 5V 2A
LAN1_5V
LAN2_5V
1.5V
+2.5V
Provide
Current MAX.
LOGIC
PROCESSORS, CMIC GTL TERMINATION
CORE Power for - CMIC, CIOB & CSB5
and Power for DIMMs
SSTL Termination Power for Memory Bus
Misc.
USB CONN POWER
INTEL 82540 GIGA LAN
INTEL 82540 GIGA LAN
SOURCE
P12V
+12V
+12V
VCC
VCC3
VCC3
5VSB->3VALWAYS OR VCC3
VCC
3VSB
3VSB
+5VR 5V +12V CODEC STAC 9750
VCC3
A A
VCC
+3.3V
+5V
P12V +12V
+12V
-12V
5V_STBY
+12V
-12V
+5V
5
CSB5 , PCI Connectors and MISC.
PCI Connectors and MISC.
CPU VRM Modules
VCC25 Modules & PCI CONN & FAN & Misc.
PCI CONN
3VSB
4
WATX POWER SUPPLY
WATX POWER SUPPLY
WATX POWER SUPPLY
WATX POWER SUPPLY
WATX POWER SUPPLY
WATX POWER SUPPLY
3
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Note #1
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
62 68
Rev
0D
of
Page 63
5
Placement Preview :
4
3
2
1
DUMP SW
USB*3 RJ45
AUDIO
SRAM
D D
2032E
PC97417
PCI-X
PCI-X
PCI-66
CT5880
PCI 66
82540EL
PCI 66
AGP Pro
RCC
CIOB-G
GIGA
XMR
JACK*2
FDD
RCC
CMIC-LE
C C
68P/Channel A
68P/Channel B
B B
BIOS
RCC
CIOB-X2
AIC 7899W
FOSTER 2
RCC
CSB5
IDE 2
IDE 1
BATTARY
AUDIO
JACK*1
VRM 9.0
DDR
DDR
AUDIO
JACK*1
LPT
DDR
FOSTER 1
COM1
COM2
83782D
KB/MS
USB4
ATX PWR
ATX 12V
PANEL
MS-9102 (12"*13"*8 Layers PCB)
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Note #2
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
63 68
of
Rev
0D
Page 64
5
4
3
2
1
Layout Preview :
COM1
COM2
83782D
D D
82550EL
CIOB-G
PCI-X
PCI-X
PCI 66
P1 PCI
PCI 66
AGP Pro
AGP
ATX
12V
PCI
IPMI
RCC
CIOB-X2
C C
S1 PCI
PWR
PC97417
RCC
IMB
PWR
RCC
CMIC-LE
DDR
T-IMB
PWR
IMB
CPU
75232
LPT
75232
DDR
DDR
DDR
USB
RJ45
T1
KB/MS
DDR
IMB
FOSTER #2
FOSTER #1
ATX PWR
BIOS
RCC
68P/Channel A
AIC 7899W
B B
CSB5
VRM 9.0
ATX PWR
IDE 2
68P/Channel B
PANEL
USB2
IDE 1
FDD
MS-9102 (12"*13"*8 Layers PCB)
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Note #3
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
64 68
of
Rev
0D
Page 65
5
PCB Stackup Spec :
4
3
2
1
Top - Signal
L2 - GND
D D
L3 - Signal
Prepreg
5.2mil Core
10.5mil Prepreg
L4 - Power
7.6mil Main Core
L5 - Power
10.5mil Prepreg
L6 - Signal
L7 - GND
5.2mil Core
Prepreg
Bottom - Signal
C C
RCC Recommand board Impedance Control :
50 OHm : CPU,DDR,IMB
60 OHm : PCI-X,AGP
2.1mils(1.5oz+plating)
3.8mil
1.4mils (1oz)
5.2mils
1.4mils (1oz)
10.5mils
2.8mils(2oz)
7.6mils
2.8mils(2oz)
10.5mils
1.4mils(1oz)
5.2mils
1.4mils(1oz)
3.8mils
C
2.1mils(1.5oz+plating)
Total Thickness 62mils
Er=4.2 for Caculation
MS-9102 (12"*13"*8 Layers PCB)
B B
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Note #4
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
65 68
of
Rev
0D
Page 66
5
4
3
2
1
Microstrip Calculations :
air
t
Outter Layer :
D D
PWR/GND Plane
W
h
S
Er=4.7
W=8mils
h=8mils
t=2mils(0.5ozCu=2.1mils+/-0.4mils)
S=8mils
Zsignal=61.2 Ohms
Zdiff=100.0 Ohms
Zsignal =
Zdiff =
87
SQRT(Er+1.41)
*
(2*Zsignal)*(1-0.48*exp(-0.96* )))
Inner Layer :
PWR/GND Plane
W
b
t
S
PWR/GND Plane
Dieletric
C C
Zsignal =
Zdiff =
60
SQRT(Er)
(2*Zsignal)*(1-0.347*exp(-2.9* )))
5.89*h
ln ( )
(0.8*W)+t
Striplines
ln ( )
*
((0.8*w)+t)
S
h
Er=4.5
W=5mils
b=21.4mils
t=1.4mils(1ozCu=1.2mils+/-0.2mils in L3)
S=8mils
Zsignal=57.1 Ohms
Zdiff=100.8 Ohms
1.9
S
b
MS-9102 (12"*13"*8 Layers PCB)
B B
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Note #5
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
66 68
of
Rev
0D
Page 67
5
4
3
2
1
MS-9102 Rounting Spec :
Bus Type Impendance Allow Width/Space Impendance Delay
(ohm) Level (mils/mils) (ohm) (ps/in)
D D
C C
CPU 50 3,6 5 48.95
5/15 48.9 173.64
DDR 50 3,6 5/15 48.9 173.64
PCI-X 60 1,8 5 57.04
5/5 52.29 135.36
5/6 53.64 136.95
5/15 56.64 141.40
SCSI(Diff) 120 1,8 20/5/5/5/20 93.48 131.39
20/5/6/5/20 97.10 132.73
20/5/10/5/20 105.08 136.22
20/6/6/6/20 89.81 134.36
LAN(Diff) 100 1,8 8/6/8 78.37 137.16
8/8/8 81.72 139.13
6/8/6 94.09 136.37
5/8/5 102.01 134.76
*
*
*
*
*
B B
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Note #6
1
Last Revision Date:
Thursday, March 21, 2002
Sheet
67 68
of
Rev
0D
Page 68
1. C310,C355 changed from 10p to 47p for SCSI issue. --page CIOB-X2 PCI-X. 12.10.2001
2. C324,C354 don't stuff for SCSI issue--page CIOB-X2 PCI-X. 12.10.2001
3. R419,R482 changed from 22R to 0 R for SCSI issue --page CIOB-X2 PCI-X. 12.10.2001
4. change CPU2 CORE decoupling C570,C571,C572,C573,C574,C575,C448,C454,C478,C486,C519,C522,C544,C389,C390,C391,C392,C393,C394,CC541,C523,C516,C489,C480,C455,C450 from 4.7u to 22u.
--page Foster CPU#2 PWR. 12.10.2001
5. change CPU1 CORE decoupling from 4,7u to 22u for CPU transient issue . --page Foster CPU#1 PWR. 12.10.2001
6. C213,C214 changed form 33p to 47p. --page DDR Clock Buffer. 12.10.2001
7. stuffed R943,R944,R943 and removed U26. --page ITP Connector. 12.10-2001
8. changed R903 from 1.6K to 2.2K.for CPU transient issue --VRM 9x. 12.10.2001
9.Swap R99 to connect to 1LINKLED and R100 connect to 1ACTLED to fix the LAN LED error. --page LAN 82550. 12.19.2001
D D
10. System FAN relocation (layout). --12.19.2001
11. Mounting Holds relocation to meet SSI spec. --12.19.2001
12. Add SC52 to decoupling VDD_IMB and SC50 SC52 to decoupling VCC_P. All of these C put on the solder side and
as close power pin as possible. --page CMIC_PWR. 12.19.2001
13. chang EC74,EC75,EC103,EC104 to 22uF for mechanical issue--page CPU Level Shift circuit. --12.20.2001
14. Add BSEL[0,1] circuit for CPU 100/133 MHz auto detect. --page Foster CPU#1 PWR1 & page Clock Synthesizer PCI33 Clock Buffer. 12.21.2001
15. Add 2Pins Y3 & Y4 at AIC7899(AIC7902) and pull high to VCC3 to fix 7902 bug. --page SCSI7899W. 12.26.2001
16. Add DUMP SW circuits. -- page DUMP SW/ PWR Decoup. 12.27.2001
17. Modify Sys. Fan Circuits
18.USB power traces dont less then 30mil, 50 mil is good. --12.28.2001
19. Add NvRAM Circuits for NEC --12.31.2001
20. Add Audio CT5880 for NEC --12.31.2001
21. Add J4( CD IN), J6 (LED), J8(SPEAKER) AND MODIFY SFAN1 SFAN1 JSLP1 CONNECTOR FOR NEC.--01.02
22. Remove boss hold M8 --1.2.
C C
5
4
3
2
1
B B
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
REVISION HISTORY
Last Revision Date:
Thursday, March 21, 2002
Sheet
1
68 68
of
Rev
0D