PAGE11.Remove 1'st TMDS & Hotplug
PAGE11.Net name change from 5v_ENBL* to EN_FBVDD*
PAGE13.Remove feature connector
3
PAGE13.Change input power from MIOA_2V5 to A3V3
3
PAGE15.Add Scart TV chip CX25874/5
PAGE15.Add Scart TV connector
PAGE16.Remove EXT 12pin PVA connector
PAGE17.Add 0 ohm to OPT GPIO 8 or 7 to control EXTENSE
pin
4
PAGE20.Change all power(NVVDD,FBVDD/Q,A3V3,5V & ADD EXT PWR)
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
CON_PCI_EXPRESS
SMCLK
SMDAT
PERST
REFCLK
REFCLK
PERP0
PERN0
PETP0
PETN0
PERP1
PERN1
PETP1
PETN1
PERP2
PERN2
PETP2
PETN2
PERP3
PERN3
PETP3
PETN3
PERP4
PERN4
PETP4
PETN4
PERP5
PERN5
PETP5
PETN5
PERP6
PERN6
PETP6
PETN6
PERP7
PERN7
PETP7
PETN7
PERP8
PERN8
PETP8
PETN8
PERP9
PERN9
PETP9
PETN9
PERP10
PERN10
PETP10
PETN10
PERP11
PERN11
PETP11
PETN11
PERP12
PERN12
PETP12
PETN12
PERP13
PERN13
PETP13
PETN13
PERP14
PERN14
PETP14
PETN14
PERP15
PERN15
PETP15
PETN15
{NAME}
C915
C950
.01UF
?
?
?
0402
COMMON
NTP_JTAG_TRST*
B9
NTP_JTAG_TCLK
A5
JTAG_TDI_TDO
A6
JTAG_TDI_TDO
A7
NTP_JTAG_TMS
A8
NTP_PEX_SMCLK
B5
NTP_PEX_SMDAT
B6
NTP_PEX_WAKE*
B11
WAKE
PEX_PWRGD*
A11
A13
A14
PEX_TXX0
A16
PEX_TXX0*
A17
PEX_RX0
B14
PEX_RX0*
B15
PEX_TXX1
A21
PEX_TXX1*
A22
PEX_RX1
B19
PEX_RX1*
B20
PEX_TXX2
A25
PEX_TXX2*
A26
PEX_RX2
B23
PEX_RX2*
B24
PEX_TXX3
A29
PEX_TXX3*
A30
PEX_RX3
B27
PEX_RX3*
B28
PEX_TXX4
A35
PEX_TXX4*
A36
PEX_RX4
B33
PEX_RX4*
B34
PEX_TXX5
A39
PEX_TXX5*
A40
PEX_RX5
B37
PEX_RX5*
B38
PEX_TXX6
A43
PEX_TXX6*
A44
PEX_RX6
B41
PEX_RX6*
B42
PEX_TXX7
A47
PEX_TXX7*
A48
PEX_RX7
B45
PEX_RX7*
B46
PEX_TXX8
A52
PEX_TXX8*
A53
PEX_RX8
B50
PEX_RX8*
B51
PEX_TXX9
A56
PEX_TXX9*
A57
PEX_RX9
B54
PEX_RX9*
B55
PEX_TXX10
A60
PEX_TXX10*
A61
PEX_RX10
B58
PEX_RX10*
B59
PEX_TXX11
A64
PEX_TXX11*
A65
PEX_RX11
B62
PEX_RX11*
B63
PEX_TXX12
A68
PEX_TXX12*
A69
PEX_RX12
B66
PEX_RX12*
B67
PEX_TXX13
A72
PEX_TXX13*
A73
PEX_RX13
B70
PEX_RX13*
B71
PEX_TXX14
A76
PEX_TXX14*
A77
PEX_RX14
B74
PEX_RX14*
B75
PEX_TXX15
A80
PEX_TXX15*
A81
PEX_RX15
B78
PEX_RX15*
B79
C93
10UF
.1UF
?
?
?
?
?
?
0603
1206
COMMON
COMMON
{NAME}
{NAME}
5
3.5MIL
1
2
PEX_REFCLK
PEX_REFCLK*
C930
C928
C926
C924
C922
C920
C918
3
U_AND_2IN
{NAME}
C948
C946
C944
C942
C940
C938
C936
C934
C932
COMMON
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
.1UF
U819
R2075
R2076
0402
?
R2072
0402 COMMON
R2073
0402 COMMON
C947
C945
C943
C941
C939
C937
C935
C933
C931
C929
C927
C925
C923
C921
C919
C917
0402
?
200
NS
PEX_TEST_PLLCLK_OUT
PEX_TEST_PLLCLK_OUT_N
0
0
?
?
.1UF
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
.1UF
???0402
100
COMMON
TP_PEXCAPD_VDDQ
TP_PEXCALPD_GND
R102
0402
3.5MIL
3.5MIL
???0402
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
3.5MIL
?
NV43CLK_REF
NV43CLK_REF*
PEX_TX0
PEX_TX0*
COMMON
PEX_TX1
PEX_TX1*
COMMON
PEX_TX2
PEX_TX2*
COMMON
PEX_TX3
PEX_TX3*
COMMON
PEX_TX4
PEX_TX4*
COMMON
PEX_TX5
PEX_TX5*
COMMON
PEX_TX6
PEX_TX6*
COMMON
PEX_TX7
PEX_TX7*
COMMON
PEX_TX8
PEX_TX8*
COMMON
PEX_TX9
PEX_TX9*
COMMON
PEX_TX10
PEX_TX10*
COMMON
PEX_TX11
PEX_TX11*
COMMON
PEX_TX12
PEX_TX12*
COMMON
PEX_TX13
PEX_TX13*
COMMON
PEX_TX14
PEX_TX14*
COMMON
PEX_TX15
PEX_TX15*
COMMON
4
SC70-5
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
???0402
C2042
1UF
?
?
?
0402
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
3.5MIL
3.5MIL
COMMON
3.5MIL
3.5MIL
R2074
10K
0402
COMMON
?
{NAME}
AH15
AG12
AH13
200
NS
AM12
AM11
AH14
AJ14
AJ15
AK15
AK13
AK14
AH16
AG16
AM14
AM15
AG17
AH17
AL15
AL16
AG18
AH18
AK16
AK17
AK18
AJ18
AL17
AL18
AJ19
AH19
AM18
AM19
AG20
AH20
AK19
AK20
AG21
AH21
AL20
AL21
AK21
AJ21
AM21
AM22
AJ22
AH22
AK22
AK23
AG23
AH23
AL23
AL24
AK24
AJ24
AM24
AM25
AJ25
AH25
AK25
AK26
AH26
AG26
AL26
AL27
AK27
AJ27
AM27
AM28
AJ28
AH27
AL28
AL29
U11A
BGA820_P10_33X33MM
COMMON
1/14 PCI_EXPRESS
PEX_RST
RFU
RFU
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_REFC LK
PEX_REFC LK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
U_GPU_G3
ASSEMBLY
PAGE DETAI L
VALUES TBD
Place near balls
600mA
PEX_IO_VDD
C846
C845
.022UF
.022UF
?
AD23
PEX_IOVD D
AF23
PEX_IOVD D
AF24
PEX_IOVD D
AF25
PEX_IOVD D
AG24
PEX_IOVD D
AG25
PEX_IOVD D
AC16
PEX_IOVDD Q
AC17
PEX_IOVDD Q
AC21
PEX_IOVDD Q
AC22
PEX_IOVDD Q
AE18
PEX_IOVDD Q
AE21
PEX_IOVDD Q
AE22
PEX_IOVDD Q
AF12
PEX_IOVDD Q
AF18
PEX_IOVDD Q
AF21
PEX_IOVDD Q
AF22
PEX_IOVDD Q
K16
VDD
K17
VDD
N13
VDD
N14
VDD
N16
VDD
N17
VDD
N19
VDD
P13
VDD
P14
VDD
P16
VDD
P17
VDD
P19
VDD
R16
VDD
R17
VDD
T13
VDD
T14
VDD
T15
VDD
T18
VDD
T19
VDD
U13
VDD
U14
VDD
U15
VDD
U18
VDD
U19
VDD
V16
VDD
V17
VDD
W13
VDD
W14
VDD
W16
VDD
W17
VDD
W19
VDD
Y13
VDD
Y14
VDD
Y16
VDD
Y17
VDD
Y19
VDD
Y20
VDD
P20
VDD_LP
T20
VDD_LP
T23
VDD_LP
U20
VDD_LP
U23
VDD_LP
W20
VDD_LP
NVVDD_SENSE
N20
VDD_SENSE
GND_SENSE
M21
GND_SENSE
AC11
VDD33
AC12
VDD33
AC24
VDD33
AD24
VDD33
AE11
VDD33
AE12
VDD33
H7
VDD33
J7
VDD33
K7
VDD33
L10
VDD33
L7
VDD33
L8
VDD33
M10
VDD33
AF15
PEX_PLLAVDD
AE15
PEX_PLLDV D D
AE16
PEX_PLLGND
{NAME}
NTP_GPU_AM10_NC
AM8
NC
NTP_GPU_AM8_NC
AM9
NC
NTP_GPU_AM9_NC
B32
NC
NTP_GPU_B32_NC
J6
NC
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
PCI EXPRESS 16X, NVVDD DECOUPLING CAPS,PEX_IO VD D /Q DE C O UP LI N G C A PS
?
?
0402
COMMON
2A
PEX_IO_VDDQ
C849
.022UF
?
?
?
0402
COMMON
C747
0.47UF
?
?
?
0402
COMMON
C675
.1UF
?
?
?
0402
COMMON
C804
0.47UF
?
?
?
0402
COMMON
C773
0.47UF
?
?
?
0402
COMMON
VALUES TBD
R629
0402 COMMON
?
VDD33
PEX_PLL_VDD
0
?
?
?
0402
COMMON
VALUES TBD
Place near balls
C857
.022UF
?
?
?
0402
COMMON
C780
.1UF
?
?
?
0402
COMMON
C781
.1UF
?
?
?
0402
COMMON
C756
.1UF
?
?
?
0402
COMMON
C796
.1UF
?
?
?
0402
COMMON
C751
.001UF
?
?
?
0402
{NAME}
180mA
Place near balls
20mA
C842
4700PF
?
?
0402
COMMON
COMMON
Place near balls
C833
.1UF
?
0402
COMMON
EGC
C847
.01UF
?
?
?
0402
COMMON
Place near balls
OUT
Place near balls
C826
.1UF
?
?
?
0402
COMMON
C853
.1UF
?
?
?
0402
COMMON
??
?
Place Close to GPU
C848
.01UF
?
?
?
0402
COMMON
C786
0.47UF
?
?
?
0402
COMMON
C801
0.47UF
?
?
?
0402
COMMON
C798
.1UF
?
?
?
0402
COMMON
C762
.1UF
?
?
?
0402
COMMON
2.5G<> 22.2G<
C738
4700PF
?
?
?
0402
COMMON
C745
4700PF
?
?
?
0402
COMMON
C825
.01UF
?
?
?
0402
COMMON
C831
470PF
?
?
?
0402
COMMON
HGFEDCBA
?
COMMON0805
220R@100MHz
LB9
0805?COMMON
C2043
4.7UF
C96
?
?
4.7UF
?
?
C0805_67
?
COMMON
C0805_67
COMMON
C790
.1UF
?
?
?
0402
COMMON
C721
.022UF
?
?
?
0402
COMMON
C843
.022UF
?
?
?
0402
COMMON
Place Near BGA
150-220R@100MHz
LB524
C828
4.7UF
??
?
C0805_67
COMMON
?
?
C757
.1UF
?
?
?
0402
COMMON
C784
10UF
?
?
?
0805
COMMON
C742
10UF
?
?
?
0805
COMMON
LB532
120R@100MHz
COMMON
0603
{NAME}
{NAME}
C894
4.7UF
?
?
C0805_67
COMMON
C797
0.47UF
?
?
?
0402
COMMON
{NAME}
{NAME}
{NAME}
C734
1UF
?
?
?
0603
COMMON
?
00A
220
1
2
3
4
5
{NAME}
{NAME}
C908
2.2C> 21.3B<
10UF
?
?
?
0805
2.2C< 21.3G>
COMMON
{NAME}
C783
10UF
?
?
?
0805
COMMON
C659
.1UF
{NAME}
?
?
?
0402
COMMON
C769
.1UF
{NAME}
?
?
?
0402
COMMON
{NAME}
{NAME}
{NAME}
COMMON0603
{NAME}
C812
4.7UF
?
?
?
C0805_67
COMMON
2.3F> 22.2G<
{NAME}
NET
PEX_REFCLK
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
I think it can't cost down so much.I prefer not to change and it is safe.
PLACE close to G P U
{NAME}
4.1G<
4
4.2A<
R596
4.1G<
4.2D<
R599
4
100
100
?
?
0402
0402
COMMON
COMMON
FBA_REFCLK*
R593
R601
100
100
?
?
0402
0402
COMMON
COMMON
{NAME}
PLACE close to b a l l s
C689
.01UF
?
?
?
0402
COMMON
C710
.01UF
?
?
?
0402
COMMON
C692
.1UF
?
?
?
0402
COMMON
C685
.1UF
?
?
?
0402
COMMON
FB_DLLVDD
ON NV3x version's of G3
FB_DL LVDD will be routed on FB_PLLVDD
150-220R@100MHz
LB507
150-220R@100MHz
LB509
COMMON0603
COMMON0603
{NAME}
C674
1UF
?
?
?
0402
COMMON
C672
1UF
?
?
?
0402
COMMON
{NAME}
C662
4.7UF
?
?
?
C0805_67
COMMON
C654
4.7UF
?
?
?
C0805_67
COMMON
{NAME}
C740
10UF
?
?
?
0805
COMMON
PLACE MIDWAY BETWEEN GPU AND MEMORY
{NAME}
{NAME}
C597
10UF
?
?
?
0805
COMMON
MIN_LINE_WIDTHNET
4MIL10MIL
NET_SPACING_R U LE
10MIL
10MIL
10MIL4MIL
1
2
FBA_PLLVDD
FBA_PLLAVDD
C594
10UF
?
?
?
0805
COMMON
DIFFPAIR
FBA_REFCLK
IN
FBA_REFCLK*
IN
IN
IN
C856
10UF
?
?
?
0805
COMMON
{NAME}
PLACE NEAR GPU
{NAME}
R638
10K
?
0402
R640
COMMON
NS
3
10K
?
0402
FBA_CMD11
{NAME}
CKE St uff options for DDR3 configation for
on-die terminations at the memor y
IMPORTANT FOR POWER ON INITIALIZATION OF DDR3 MEMS
DDR3: DETERMINES THE ODT VALUE FOR ADDR AND CONTROL PINS
CKE = 0 --> ODT = ZQ/2
CKE = 1 --> ODT = ZQ
4
FBA_AVDD is TBD. This may not be hooked up on the Package.
U_GPU_G3
5
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
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Date:
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Page 4
5 FrameBuffer: Partition A 8Mx32 BGA144 DDR3
A-CS0-LOW-32bit
U8E
BGA_DIAMOND144_P08_DDR_13MM_B2
{NAME}
FBAD[63..0]
FBADQM[7..0]
FBADQS_RN[7..0]
FBADQS_WP[7..0]
BGA144
COMMON
M5
RAS
N6
CAS
N9
WE
M10
CS
N2
A0
N3
A1
M3
A2
L3
A3
L12
A4
M12
A5
N12
A6
N13
A7
N11
A8
M11
A9
M4
A10
N4
A11
L9
NC/A<12>
N5
BA<0>
N10
BA<1>
L6
NC/BA<2>
M7
CKE
N7
CLK
N8
CLK
NC/RFU
E3
NC/RFU
E12
NC/RFU
M8
RESET
M6
M9
ZQ
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
U_MEM_ SD_DDR3_X32#3
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
3
4
5
ZQ = 6x desired output
DDR3:
impedence of DQ driver s
Impedence = 240 / 6 = 40 ohm
impedence of DQ driver s
Impedence = 240 / 6 = 40 ohm
144BGA CMD Mapping
CMDADDR
CMD25
CMD9
CMD11
CMD12
CMD8
CMD7
CMD1
CMD3
CMD2
CMD0
CMD24
CMD22
CMD13
CMD4
CMD5
CMD6
CMD21
CMD19
CMD20
CMD17
CMD16
CMD14
CMD10
CMD18
RAS*CMD15
CAS*
WE*
CKE
RESET
CS0*
CS1**notused
A<0>
A<1>
A<2>
A<3>
A<4>
A<5>
A<2>
A<3>
A<4>
A<5>
A<6>
A<7>CMD23
A<8>
A<9>
A<10
A<11>
A<12>
BA0
BA1
6.3D> 7.1G< 6
Low Sub-Partition
Hi Sub-Partition
IN
Low Sub-Partition
FBC_CMD[26..0]
6.4D> 7.1G< 6
6.4D> 7.1G< 6
15
FBC_CMD1 5FBC_CMD1 5
25
FBC_CMD2 5FBC_CMD2 5
9
FBC_CMD 9FBC_CMD 9
8
CS0
FBC_CMD 8FBC_CMD 8
1
FBC_CMD 1FBC_CMD 1
3
FBC_CMD 3FBC_CMD 3
2
FBC_CMD 2
0
FBC_CMD 0
24
FBC_CMD2 4
22
FBC_CMD2 2
21
FBC_CMD2 1FBC_CMD2 1
23
FBC_CMD2 3FBC_CMD2 3
19
FBC_CMD1 9FBC_CMD1 9
20
FBC_CMD2 0FBC_CMD2 0
17
FBC_CMD1 7FBC_CMD1 7
16
FBC_CMD1 6FBC_CMD1 6
14
FBC_CMD1 4FBC_CMD1 4
10
FBC_CMD1 0FBC_CMD1 0
18
FBC_CMD1 8FBC_CMD1 8
TP_FBC0_BA<2>
11
FBC_CMD1 1FBC_CMD1 1
12
?
?
?
{NAME}
{NAME}{NAME}
FBC_CLK0
FBC_CLK0*
TP_FBC0_NC1
TP_FBC0_NC2
TP_FBC0_NC3
FBC_CMD1 2FBC_CMD1 2
FBC_ZQ0FBC_Z Q1
FBC_CMD12
R1
R501
240
10K
?
?
0603
0402
COMMON
COMMON
6.1A<> 7.1G<> 6
BI
6.3A> 7.1G<> 6
BI
6.4A<> 7.1G<> 7.2G<> 6
BI
6.3A<> 7.1G<> 7.2G<> 6
BI
IN
IN
C2047
.1UF
0402
NS
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
FBC 8MX32 DDR3 MEMORIES, FBC CMD BUS PU'S, FBC CLK PU's
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
NS
DACA RGB-F I LTER
R668
33
0402
COMMON
?
R655
33
COMMON
0402
?
{NAME}
U507D
13
11
SO14_150MIL
12
COMMON
714
U_AND_2IN
PLACE NEAR SYNC BUFF E R
{NAME}
U507C
10
8
SO14_150MIL
9
COMMON
714
U_AND_2IN
DACA_RED
{NAME}
R101
75
?
0402
COMMON
D14
SOT23
3
?
?
COMMON
12
D_3PIN_AC
DACA_GREEN
{NAME}
D16
SOT23
3
?
?
COMMON
12
D_3PIN_AC
DACA_BLUEDACA_B_F
{NAME}
D13
SOT23
3
?
?
COMMON
12
D_3PIN_AC
ASSEMBLY
PAGE DETAI L
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D BO M N O T F I N AL
DACA FILTERS, DACA SYNC BUFFERS & DB15 SOUTH
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T HE R WI SE, AND EXPR ESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
R60
2.2K
?
0402
NS
R71
2.2K
?
0402
NS
R49
2.2K
?
0402
NS
ASSEMBLY
PAGE DETAI L
I2CB_SDA_T
R590 33
COMMON0402
?
I2CB_SCL_T
R577
33
COMMON
0402
?
{NAME}
R591
2.2K
?
0402
COMMON
R578
2.2K
?
0402
COMMON
{NAME}
U507B
4
5
714
U_AND_2IN
6
SO14_150MIL
COMMON
CVB
R633
0402?COMMON
33
DACC_VSYNC_BUF
{NAME}
U507A
1
2
714
U_AND_2IN
3
SO14_150MIL
COMMON
CHB
R634
0402 COMMON
?
33
DACC_HSYNC_BUF
Place 0ohm Resistor Incident with Common Mode Choke
DACBC_R_F
L10
68nH
R59
75
?
0402
COMMON
R70
75
?
0402
COMMON
R50
75
?
0402
COMMON
{NAME}
D10
SOT23
3
?
?
COMMON
12
D_3PIN_AC
{NAME}
{NAME}
D11
SOT23
3
?
?
COMMON
12
D_3PIN_AC
{NAME}
{NAME}
D9
SOT23
3
?
?
COMMON
12
D_3PIN_AC
{NAME}
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMO N & NO _STUFF ASSEMBLY NO TES AN D B O M N O T F IN A L
DACC FILTERS, DACC SYNC BUFFERS & DB15 MID
C42
22PF
?
?
?
0402
NS
L12
C49
22PF
?
?
?
0402
NS
L8
0603 COMMON
C37
22PF
?
?
?
0402
NS
COMMON0603
C45
22PF
?
?
?
0402
COMMON
DACBC_G_F
68nH
COMMON0603
C53
22PF
?
?
?
0402
COMMON
DACBC_B_F
68nH
C40
22PF
?
?
?
0402
COMMON
EGC
3
D_3PIN_AC
3
D_3PIN_AC
3
D_3PIN_AC
3
D_3PIN_AC
{NAME}
12
{NAME}
12
{NAME}
12
{NAME}
12
D515
SOT23
?
?
COMMON
D514
SOT23
?
?
COMMON
D516
SOT23
?
?
COMMON
D518
SOT23
?
?
COMMON
LB505
LB504
L9
{NAME}
L11
{NAME}
L7
{NAME}
L510
0603 COMMON
L511
0603
0603 COMMON
0603 COMMON
0603
COMMON
150-220R@100MHz
COMMON0603
150-220R@100MHz
COMMON0603
68nH
68nH
COMMON
68nH
68nH
68nH
12.3G< 12
OUT
C649
220PF
?
?
?
0603
COMMON
2
12.3G< 12
OUT
C644
220PF
?
?
?
0603
COMMON
12.3G< 12
OUT
C671
47PF
?
?
?
0603
COMMON
12.3G< 12
OUT
C739
47PF
?
?
?
0603
COMMON
DACC_R ED_C
C44
22PF
?
?
?
0402
COMMON
DACC_GREEN_ C
DACC_GREEN_C
C51
22PF
?
?
?
0402
COMMON
DACC_BLUE_C
DACC_BLUE_C
C38
22PF
?
?
?
0402
COMMON
10.1A<> 12.3G< 12
OUT
10.1A<> 12.3G< 12
OUT
10.1A<> 12.3G< 12
OUT
FOR ESD DIODES
{NAME}
C912
4.7UF
?
?
?
C0805_67
Place in output filter section!
COMMON
3
4
5
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Date:
Monday, August 23, 2004
Sheetof
1020
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INTERNAL TMDS .. LINK A & B
1
2
{NAME}
IFPAB_PLLVDD
R2030
100ohm
?
0402
NS
{NAME}
TP_VPROBEAB
{NAME}
R2031
100ohm
?
0402
NS
IFPABRSET
IFPABRSET
HGFEDCBA
U11G
BGA820_P10_33X33MM
COMMON
7/14 IFPAB
AM4
IFPAB_VPROBE
AL5
IFPAB_RSE T
AC9
AD9
AF9
AF8
IFPAB_PLLVDD
IFPAB_PLLG N D
IFPA_IOVDD
IFPB_IOVDD
R666
1K
?
0402
NS
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
AJ9
AK9
Remove 1'st TMDS & Hotplug
AJ6
AH6
AH7
AH8
AK8
AJ8
AH5
AJ5
AL4
AK4
AM5
AM6
AL7
AM7
AK5
AK6
AL8
AK7
1
2
U_GPU_G3
3
4
1B1C1E
3
C
20.5G> 20
EN_FBVDD*
IN
Q510
B
1
SOT23
COMMON
E
2
Q_NPN
{NAME}
5
Net name change from 5v_ENBL* to EN_FBVDD*
ABDFH
{NAME}
R662
10K
?
0402
COMMON
{NAME}
{NAME}
R660
0
?
0603
NS
?
R661
0
?
0603
COMMON
?
TMDS_GATE_IOBACK
TMDS_IOBACK
?
?
?
?
?
?
2
S
Q_FET_N_ENH
COMMON
3
NETNAMEVOLTAGEMIN_LINE_WIDTH
TMDS_PLLVDD
{NAME}
IFPAB_PLLVDD
BI
TMDS_IOVDD
{NAME}
IFPAB_IOVDD
BI
{NAME}
SOT23
3
Q513
D
G
1
1G1D1S
IFPABRSET
BI
TMDS_IOBACK
BI
12MIL3.3V
12MIL3.3V
12MIL3.3V
12MIL
12MIL
3.3V12MIL
4
5
Micro-Star Interna t i o nal Co. , L TD.
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Date:
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HGFEDCBA
INTERNAL TMDS .. LINK C & D
1
IFPCD_RSET
R659
1K
?
0402
COMMON
AK3
AH3
AA10
AB10
AD6
AE7
U11H
BGA820_P10_33X33MM
COMMON
8/14 IFPCD
IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLLVDD
IFPCD_PLLGND
IFPC_IOVDD
IFPD_IOVDD
U_GPU_G3
IFPC_TXC
IFPC_TXC
IFPC_TXD0
IFPC_TXD0
IFPC_TXD1
IFPC_TXD1
IFPC_TXD2
IFPC_TXD2
IFPD_TXC
IFPD_TXC
IFPD_TXD4
IFPD_TXD4
IFPD_TXD5
IFPD_TXD5
IFPD_TXD6
IFPD_TXD6
DVI_MID_HPDDVI_MID_HPD_R
17.1D< 17
OUT
3.5MIL
2
TP_VPROBECD
{NAME}
Add it,Thanks for remind it.
{NAME}
C788
4.7UF
?
?
?
C0805_67
COMMON
C827
4700PF
?
?
?
0402
COMMON
C838
4.7UF
?
?
?
C0805_67
COMMON
IFPCD_PLLVDD
C795
4700PF
?
?
?
0402
COMMON
C836
470PF
?
?
?
0402
COMMON
IFPCD_IOVDD
C830
4700PF
?
?
?
0402
COMMON
C802
470PF
?
?
?
0402
COMMON
{NAME}
C829
470PF
?
?
?
0402
COMMON
LB519150-220R@10 0M Hz
COMMON0603
C789
4.7UF
?
?
?
C0805_67
COMMON
{NAME}
{NAME}
LB525
150-220R@100MHz
0603 COMMON
3
C865
4.7UF
?
?
?
C0805_67
COMMON
{NAME}
{NAME}
4
5
{NAME}
C886
.01UF
?
?
?
0402
COMMON
LINK C & LINK D PULLUPS ... SHOULD BE PLACED AS CLOSE AS POSSIB LE T O G PU
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T H ER W ISE, AN D EXPRESSLY DISCLAIM S ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
5
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MS-8979 base on P216 Modify
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Monday, August 23, 2004
EGC
Date:
Sheetof
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DACB .. MiniDIN VIDEO IN/OUT CONNECTOR /STEREO GLASSES
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T HE R WI SE, AND EXPR ESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
Micro-Star Interna t i o nal Co. , L TD.
MS-8979 base on P 216 Modify
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Monday, August 23, 2004
EGC
Date:
Sheetof
1620
200
Page 17
HGFEDCBA
C89
10UF
?
?
?
1206
COMMON
SW SIDE
FAN
+12V
1
GND
2
HDR_1X2
J9
?
?
?
CON_HDR_1X2_M_P25_H
COMMON
1
2
3
Place Close to GPU
R80
10K
?
0402
NS
C684
.1UF
?
?
?
0402
COMMON
TP_GPIO2
TP_GPIO3
TP_GPIO7
TP_GPIO10
TP_GPIO11
TP_GPIO12
THERM_ALERT*
R48
0402
R51?33
SOT23
{NAME}
C709
.1UF
?
?
?
0402
COMMON
{NAME}
33
COMMON
?
COMMON0402
12.5C> 12
IN
11.5C>
IN
16.2E>
IN
22.1F< 20
OUT
22.2F< 20
OUT
R2032?0
NS0402
R47?0
COMMON0402
1G1D1S
3
D
Q18
G
1
NS
S
2
?
?
?
?
?
?
GPIO Assignment Table
Q_FET_N_ENH
0
1
{NAME}
2
3
4
5
7
86IN
9
10
11 IN
12
NOTE: THERM_ALERT* is generated when over temp condition is detected
{NAME}
R31
R27
2.2K
2.2K
?
?
0402
0402
COMMON
COMMON
I2CC_SCLI2CC_SCL_G
I2CC_SDA
BI
U5
SLOWDOWN_R*
4
SC70-5
COMMON
U_AND_2IN
FUNCTIONI/OGPIO
DVI MID HOTPLUG DET
IN
IN DVI SOUTH HOTPLUG DET
IN
RESERVED
IN
RESERVED
TUNER IRQ
IN
OUT
VOLTAGE SELECT
0
OUT
VOLTAGE SELECT
1
RESERVED
IN
EXTERNAL POWER PRESEN T/ T H ER M
ALERT
PWM
OUT
FAN
IN
RESERVED
RESERVED
RESERVED
IN
IN
14.3A<> 15.1H<> 16.2E<> 14,15
R502
0402
{NAME}
5
1
2
3
{NAME}
14.3A< 15.1H< 16.2E<> 14
?
C36
.1UF
?
?
?
0402
COMMON
EXTSENSE
THERM_ALERT*
NVFAN_PWM
0
NS
{NAME}
Use 10MIL Guard(GND) Trace around THERMDC and THERMDA
C85
THERMDA
THERMDC
R697
10K
?
0402
NS
3.5MIL
{NAME}
1UF
?
?
?
0603
NS
{NAME}
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*
J10
?
?
?
CON_JTAG_2X4_F_PI50_ST_KEY6
NS
TMSTRST*
12
TDIGND
34
VCC
5
TDOTCK
78
HDR_2X4
THERMDA
KEY
C43
2200PF
?
?
?
0402
COMMON
I2CC_SCL
I2CC_SDA
THERMDC
THERMDA
1
R699
R698
10K
10K
?
?
0402
0402
NS
NS
3.5MIL3.5MIL
JTAG_TMS
3.5MIL
R694
10K
?
0402
R693
NS
10K
?
0402
NS
JTAG_TMS
JTAG_TDI
{NAME}
JTAG_TDO
2
TEMP
Sensor
3
U11M
BGA820_P10_33X33MM
COMMON
9/14 MISC1
J1
THERMDN
K1
THERMDP
AJ11
JTAG_TCK
AK11
JTAG_TMS
AK12
JTAG_TDI
AL12
JTAG_TDO
AL13
JTAG_TRST
U_GPU_G3
GPIO & JTAG
{NAME}
Add 0 ohm to OPT GPIO 8 or 7 to control EXTENSE
pin
NOTE: FET invert used for internal sensor mode only .. stuff FET .. unstuff bypass resistor
-----------------------------------------------------------------------------------------------------------------------------------------------------ÂBIT FUNCTION MAP/MEP/SQUISH PIN (RTL Name) NORMAL PIN (RTL Name) REQUIED ON BOARD?
-----------------------------------------------------------------------------------------------------------------------------------------------------Â0 PCI_AD `NV_PEXTDEV_BOOT_0_STRAP_PCI_AD_NORMAL `NV_PEXTDEV_BOOT_0_STRAP_PCI_AD_NORMAL PCI/AGP_ONLY
1 SUB_VENDOR MIOAD1 (Ccira_data[1]) MIOAD1 (Ccira_data[1]) YES
2 RAMCFG[0] MIOAD2 (Ccira_data[2]) MIOAD2 (Ccira_data[2]) NO
3 RAMCFG[1] MIOAD3 (Ccira_data[3]) MIOAD3 (Ccira_data[3]) NO
4 RAMCFG[2] MIOAD4 (Ccira_data[4]) MIOAD4 (Ccira_data[4]) NO
5 RAMCFG[3] MIOAD5 (Ccira_data[5]) MIOAD5 (Ccira_data[5]) NO
6 CRYSTAL0 MIOBD2 (Ccirb_data[2]) MIOBD2 (Ccirb_data[2]) NO
7 TVMODE[0] MIOAD7 (Ccira_data[7]) MIOAD7 (Ccira_data[7]) NO
8 TVMODE[1] MIOAD10 (Ccira_data[10]) MIOAD10 (Ccira_data[10]) NO
9 AGP_4X `NV_PEXTDEV_BOOT_0_STRAP_AGP_4X_DISABLED `NV_PEXTDEV_BOOT_0_STRAP_AGP_4X_DISABLED NO
10 AGP_SBA `NV_PEXTDEV_BOOT_0_STRAP_AGP_SBA_DISABLED `NV_PEXTDEV_BOOT_0_STRAP_AGP_SBA_DISABLED NO
11 AGP_FASTWR `NV_PEXTDEV_BOOT_0_STRAP_AGP_FASTWR_DISABLED `NV_PEXTDEV_BOOT_0_STRAP_AGP_FASTWR_DISABLED NO
12 PCI_DEVID10[0] MIOBD4 (Ccirb_data[4]) MIOBD4 (Ccirb_data[4]) NO
13 PCI_DEVID10[1] MIOBD5 (Ccirb_data[5]) MIOBD5 (Ccirb_data[5]) NO
14 AGP `NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_AGP `NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_AGP PCI/AGP_ONLY
15 FP_IFACE `NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT `NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT NO
16 USER[0] MIOBD0 (Ccirb_data[0]) MIOBD0 (Ccirb_data[0]) NO
17 USER[1] MIOBD1 (Ccirb_data[1]) MIOBD1 (Ccirb_data[1]) NO
18 USER[2] MIOBD8 (Ccirb_data[8]) MIOBD8 (Ccirb_data[8]) NO
19 USER[3] MIOBD9 (Ccirb_data[9]) MIOBD9 (Ccirb_data[9]) NO
20 PCI_DEVID32[0] MIOBD3 (Ccirb_data[3]) MIOBD3 (Ccirb_data[3]) NO
21 PCI_DEVID32[1] MIOA_HSYNC (ccira_hsync) MIOA_HSYNC (ccira_hsync) NO
22 CRYSTAL1 MIOBD6 (Ccirb_data[6]) MIOBD6 (Ccirb_data[6]) NO
23 FB[0] 0 0 NO
24 FB[1] 1 1 NO
25 BR ROM_SI (Rom_si) ROM_SI (Rom_si) MCHIP
26 BR_128M `NV_PEXTDEV_BOOT_0_STRAP_BR_REG_128M_DISABLED `NV_PEXTDEV_BOOT_0_STRAP_BR_REG_128M_DISABLED NO
27 BR_AGP `NV_PEXTDEV_BOOT_0_STRAP_BR_AGP_DEV_DISABLED `NV_PEXTDEV_BOOT_0_STRAP_BR_AGP_DEV_DISABLED NO
28 BR_IO `NV_PEXTDEV_BOOT_0_STRAP_BR_IO_DEV_DISABLED `NV_PEXTDEV_BOOT_0_STRAP_BR_IO_DEV_DISABLED NO
29 ROMTYPE[0] MIOBD10 (Ccirb_data[10]) MIOBD10 (Ccirb_data[10]) YES
30 ROMTYPE[1] MIOBD11 (Ccirb_data[11]) MIOBD11 (Ccirb_data[11]) YES
NV_STRAP_1
-----------------------------------------------------------------------------------------------------------------------------------------------------ÂBIT FUNCTION MAP/MEP/SQUISH PIN (RTL Name) NORMAL PIN (RTL Name) REQUIED ON BOARD?
-----------------------------------------------------------------------------------------------------------------------------------------------------Â0 1394 `NV_PEXTDEV_BOOT_3_STRAP_1_1394_DISABLED `NV_PEXTDEV_BOOT_3_STRAP_1_1394_DISABLED NO
1 1394_PHY `NV_PEXTDEV_BOOT_3_STRAP_1_1394_PHY_DISABLED `NV_PEXTDEV_BOOT_3_STRAP_1_1394_PHY_DISABLED NO
2 1394_PHY_PWRCLASS[0] 0 0 NO
3 1394_PHY_PWRCLASS[1] 0 0 NO
4 VGA_DEVICE `NV_PEXTDEV_BOOT_3_STRAP_1_VGA_DEVICE_ENABLED `NV_PEXTDEV_BOOT_3_STRAP_1_VGA_DEVICE_ENABLED NO
5 MEM_LSB_SWAP `NV_PEXTDEV_BOOT_3_STRAP_1_MEM_LSB_SWAP_DISABLED `NV_PEXTDEV_BOOT_3_STRAP_1_MEM_LSB_SWAP_DISABLED NO
6 BR_LAST_DEV `NV_PEXTDEV_BOOT_3_STRAP_1_BR_LAST_DEV_DISABLED `NV_PEXTDEV_BOOT_3_STRAP_1_BR_LAST_DEV_DISABLED NO
7 BR_BAR1_BCASTONLY `NV_PEXTDEV_BOOT_3_STRAP_1_BR_BAR1_BCASTONLY_ENABLED
`NV_PEXTDEV_BOOT_3_STRAP_1_BR_BAR1_BCASTONLY_ENABLED NO
8 SUB S Y STEM _ U S E R `NV_ P EXTD E V _ B OOT_3_ STRAP_1_SUBSYSTEM_USER_DISABLED
`NV_PEXTDEV_BOOT_3_STRAP_1_SUBSYSTEM_USER_DISABLED NO
155-00002-0000-000 SCREW PHIL PAN HD SS MACH 4-40 3/16
FM2
SW_FB
1
NS
FM4
SW_FB
1
NS
J12
1
1
2
2
F ST SHR IRT
ns
SIP2
NS
J14
1
1
2
2
F ST SHR IRT
ns
SIP2
NS
FM11
SW_FB
1
NS
FM1
SW_FB
1
NS
FM6
SW_FB
1
NS
FM12
SW_FB
1
NS
fansink
X
COMMON
FANSINK
1
2
FM5
SW_FB
1
1
1
1
NS
NS
NS
NS
FM3
SW_FB
1
NS
FM13
FM14
SW_FB
SW_FB
1
NS
FM10
FM8
SW_FB
SW_FB
1
NS
FM7
FM9
SW_FB
SW_FB
1
NS
3
4
5
ALL NVIDIA DESIGN SPECIFICAT IONS, R EFERENC E SPECIFIC ATION S, REFER ENCE BOAR DS, FILES, DRAWING S, DIAG NOST ICS, LIST S AND O THER DO CUMEN TS OR I NFO RMATIO N (T OGET HER AND SEPAR ATELY, 'MAT ERIALS') ARE BEING PROVIDED 'AS IS'. TH E MA T ER IA L S MA Y
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTI ES, EXPRESSED, IM PLIED, STAT UTO RY OR O THER WISE WITH R ESPECT TO THE MAT ERIALS O R O T HE R WI SE, AND EXPR ESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FRO M A COU RSE OF DEALING , TRADE U SAGE, T RADE PRACT ICE, O R INDUSTRY STANDARDS.
ABDFH
Micro-Star Interna t i o nal Co. , L TD.
MS-8979 base on P 216 Modify
Size Document NumberRev
Custom
Monday, August 23, 2004
EGC
Date:
Sheetof
1820
00A
Page 19
HGFEDCBA
Power Supply ... TMDS/A3V3/FBVDD
DDC 5V
1
2
POWER_DDC5V
3
4
{NAME}
12
F501
200mA
1206
COMMON
POLYSWITCH
5V_FUSED
LB518
220R@100MHZ
COMMON
0805
C900
C808
4.7UF
220PF
COMMON
COMMON
???
?
?
?
0603
0805
DACB
Supply
{NAME}
{NAME}
C58
4.7UF
?
?
?
0805
NS
{NAME}
POWER_TMDSPLL_REG0
Vout = VRef * (1+Rtop/Rbot)
3.31V = 1.175V * (1+(100/182))
{NAME}
{NAME}
U505
ADJ_VR=1.175V
SOT23_5
NS
1
IN
34
EN A DJ
GND
C760
.047UF
?
?
?
0402
NS
{NAME}{NAME}
{NAME}
SOT23-5
5
OUT
2
DACB_A3V3_ADJ
TMDS AB/CD PLL Supply
THIS CONNECTION FOR VOUT = 2.8 V ON LY
{NAME}
LB516
150-220R@100MHz
NS
0603
TMDS_REG_POWERIN
{NAME}
{NAME}
Rtop
R636
182
?
0603
NS
R631
100
?
0603
NS
Rbot
LB514
150-220R@100MHz
COMMON
0603
LB8
150-220R@100MHz
NS
0603
1
34
C63
C791
4.7UF
.047UF
?
?
?
?
?
?
0805
0402
NS
NS
{NAME}
{NAME}
POWER_TMDSPLL_REG0
Vout = VRef * (1+Rtop/Rbot)
3.31V = 1.175V * (1+(100/182))
{NAME}
{NAME}
C759
.047UF
?
?
?
0402
COMMON
3.17/3.314/3.39V
{NAME}
C723
4.7UF
?
?
?
0805
COMMON
U506
ADJ_VR=1.175V
SOT23_5
SOT23-5
NS
IN
OUT
EN A DJ
GND
2
{NAME}{NAME}
5
TMDSABPLL_ADJ
{NAME}
LB517
150-220R@100MHz
COMMON
0603
Rtop
R641
182
?
0603
NS
R637
100
?
0603
NS
Rbot
{NAME}
LB534
150-220R@100MHz
NS
0603
C787
.047UF
?
?
?
0402
COMMON
{NAME}{NAME}
3.17/3.314/3.39V
{NAME}
C817
4.7UF
?
?
?
0805
COMMON
MIOA_VDDQ
Delete MIOA_2V5 PWR
{NAME}
BI
BI
{NAME}
BI
{NAME}
{NAME}
BI
{NAME}
{NAME}
{NAME}
NETNAME
5V_FUSED
DDC_5V
3V3
5V
TMDSABPLL_ADJ
TMDS_PLLVDD
12V
MIOA_2V5
MIOA2V5_VREF
DACB_A3V3
GND
DACB_A3V3_ADJ
12MIL5V
12MIL3.3V
35MIL12V
12MIL2.5V
10MIL
35MIL0V
10MIL3.3V
VOLTAGEMIN_LINE_WIDTH
5V12MIL
3.3V12MIL
5V25MIL
3.3V10MIL
3.3V12MIL
1
2
3
4
5
5
Micro-Star Interna t i o nal Co. , L TD.
MS-8979 base on P216 Modify
Size Document NumberRev
Custom
Monday, August 23, 2004
ABDFH
EGC
Date:
Sheetof
1920
200
Page 20
C3
4.7U
1.21V/1.68A(ambient)
PEX1V2
R2024
R0603
COMMON
R22
R0603
COMMON
+
COMMON
12V
5V
R2025
4.7k
10K
?
?
R0603
COMMON
10K
?
COMMON
EN_FBVDD*11
COMMON
C2039
1000UF_6.3V
{P_esr}
{P_mat}
{Cfgdft}
2K_1%
Q5
MMBT3904
ISL6549 for Nvidia NV4x Graphic card power ckt
12V
COMMON
D
Q2
D2PAKSGD
COMMON
S
?
?
?
?
?
?
D
Q3
R2014
DPAKSGD
COMMON
S
?
?
?
?
?
?
L1
1.2uH
{Assembly}
{P_current}
1G1D1S
NS
G
Q_FET_N_ENH
C2028
1UF
?
?
?
C0805_67
NS
+
C2015
100U/16V
C7
C2013
+
+
330UF_16V
680UF_16V
{P_esr}
{P_esr}
{P_mat}
{P_mat}
{Cfgdft}
{Cfgdft}
COMMON
COMMON
L602 1.2U
COMMON
D
Q4
T4452
R2015
DPAKSGD
2.2
COMMON
S
?
?
?
?
COMMON
?
?
COMMON
NCPAD
NC
NS
COMMON
C2018
1000P
COMMON
LDO_DR
LDO_FB
COMMON
COMMON
12V
R2011
R2004
4.7
4.7
COMMON
COMMON
U1
9
8
10
ISL6549CB
UGATE
VCC5
VCC12
PVCC5
PHASE
BOOT
LGATE
PGNDFS_DIS
COMP
GND
FB
C17
3
7
4
5600P
COMMON
C2019 15P
1G1D1S
D
Q519
SOT23SGD
G
COMMON
S
?
?
?
?
?
?
Q_FET_N_ENH
COMMON
COMMON
C2017
1U/16V
14
13
1
11
122
COMMON
0.1U/16V/X7R
R2019
20K
T3026
{P_mat}
CHKTC3052_1R2M080S
1G1D1S
R3 2.2
C10
COMMON
1G1D1S
COMMON
R8 0
COMMON
COMMON
{P_tol}
TO263
G
Q_FET_N_ENH
2.2
G
Q_FET_N_ENH
FBVDD
C2016
1U
1G1D1S
D
Q1
DPAKSGD
COMMON
S
?
?
?
?
?
?
Q_FET_N_ENH
R2012
C11
1K_1%
NC
COMMON
R2017
COMMON
1G1D1S
EN_FBVDD*
G
Q_FET_N_ENH
C4
1U
G
5
C9
NC
NS
R2013
NC
6
NS
NS
R2018
100K
300Khz
COMMON
D
Q6
SOT23SGD
COMMON
S
?
?
?
?
?
?
NVVDD & PEX1V2
12V_EXT
L808
BEAD_4A
Ci=8.06A
NS
C13
C14
+
+
1000UF_6.3V
1000UF_6.3V
{P_esr}
{P_esr}
{P_mat}
{P_mat}
{Cfgdft}
{Cfgdft}
COMMON
Change all power(NVVDD,FBVDD/Q,A3V3,5V & ADD EXT PWR)
X_HEADER 1X4 RA
NVVDD=VREF(0.8) x (1+Rt/Rb)
GPIO6_VSEL1
C15
+
1000UF_6.3V
{P_esr}
{P_mat}
R2016
{Cfgdft}
1.8K_1%
NS
COMMON
R2026
2.6K_1%
COMMON
NVVDD
1.35V(Fix)/24A(ambient)
3V33V3
R2020
8.6K_1%
NS
Q7
2N7002
NS
R2022
10K
NS
C2020
R2027
0.1U
100K
NS
NS
R2021
4.1K_1%
NS
Q514
2N7002
NS
GPIO5_VSEL0NVVDD
0
0
1
1
R2023
10K
NS
C2021
R21
0.1U
100K
NS
1K
NS
R24
R2028
1K
0
1
01.3V
1
R0603
R0603
NS ?
NS ?
1.1V
1.2V(DEFAULT)
1.4V
GPIO6_VSEL1 17
GPIO5_VSEL0 17
Add External Powe r Co nn e ct or
JU2
4
3
2
1
COMMON
C1129
C1128
COMMON
X_2.2uF
COMMON
R1996
X_22uF 10V
COMMON
0
?
R0603
NS
{NAME}
C2007
X_22uF 10V
3
D_3PIN_AC
{NAME}
{NAME}
12
D1910
SOT23
?
?
NS
X_6.8uF 25V
{NAME}
C2009
C2008
X_6.8uF 25V
COMMON
COMMON
{NAME}
R2077
0
?
R0603
COMMON
EXTSENSE
EXTSENSE 17
84
84
U2A
LM358
COMMON
U2B
LM358
COMMON
R37
TO-263
1G1D1S
1
G
R28
1G1D1S
G
7
1k
R0603
COMMON
?
12V
1K
Q_FET_N_ENH
R0603
COMMON
?
Q_FET_N_ENH
Q9
COMMON
Q515
DPAKSGD
COMMON
D
D2PAKSGD
S
?
?
?
?
?
?
D
S
?
?
?
?
?
?
?
TO-252
C2027
1000UF
COMMON
?
?
?
?
1500UF_10V
1G1D1S
C2030
1UF
?
?
?
C0805_67
COMMON
G
C2023
1000UF
COMMON
?
?
?
?
?
1500UF_10V
Q_FET_N_ENH
3.3V/1A
D
D2PAKSGD
COMMON
S
?
?
?
?
?
?
A3V3
12V
Q517
FBVDD
5V
C2032
220nF
COMMON
C88
0.1UF
{Cfgdft}
C2026
0.1UF
12V
COMMON
COMMON
COMMON
12V
COMMON
C2024
R165
10R
SS
FB
1uF
9
COMMON
U815
{Cfgdft}
4
OCP
10
BOOSTH
BOOSTL
6
DH
5
PHASE
COMMON
8
DL
7
PGND
GND
14
1
VCC
2
NC
3
NC1
12
VREF
13
SS
11
VSENSE
N2101
COMMON
D60
1N4148_SOD123
BOOT
OCSET
C92
1UF
DH
PHASE
DL
PGND
C2025 0.1UF
C91 1000P
R16633K
R1221 2.2R
COMMON
R1223 2.2R
COMMON
D1913
AC
{Cfgdft}
10MQ040N
NS
T3026
COMMON
NS
COMMON
AC
COMMON
L806
L803
BEAD_4A
1.2U
NS
COMMON
DS
Q131
P0903BD
G
DS
COMMON
Q132
G
P0903BD
COMMON
{Cfgdft}
D19121N5817
FBVDD=VREF(1.265) x (1+Rt/Rb)
12V_EXT
L809
BEAD_4A
NS
COMMON
C1333
1U
L804 4.7uH
R2039
4.7R
12
12
C1329
COMMON
1000P
COMMON
C2037
1U
CAP3225POL
COMMON
12
COMMON
COMMON
COMMON
C1332
330UF
+
{P_mat}
{Assembly}
C1338
1nF
COMMON
COMMON
R1225
2.2k
{P_volt}
1%
R1227
3.6K
1%
{Cfgdft}
1500UF_10V
6.1A 7mohm
COMMON
C1335
+
1000UF_6.3V
{Cfgdft}
{P_esr}
{P_mat}
2.04V/9.08A(ambie nt)
FBVDD
+
COMMON
PWR current share for FBVDD
3V3
R167
10K
12
COMMON
DS
Q516
G
2N7002
COMMON
C2031
.1UF
COMMON
OPT(if power rail not enough),default NS
C1336
680UF
{Cfgdft}
{P_esr}
{P_mat}
R2034 4.7K
COMMON
3V3
AC
COMMON
G
D129
{Cfgdft}
10MQ040N
R2035 4.7R
R2036 4.7R
R2037 4.7R
COMMON
R2038 4.7R
COMMON
COMMON
COMMON
DS
Q518
P06P03LD
COMMON
P06P03LD
12
12
12
12
FBVDD
5V & A3V3
C0805_67
R30
R0603
COMMON
R38
R0603
COMMON
12V
C2029
0.1UF
?
?
?
3
+
NS
2
-
1K
?
5
+
6
-
3K
?
12V
R2029
1K
?
R0603
COMMON
U817
C2041
C2040
LM431ACM3
0.1u
1u
NS
NS
COMMON
Micro-Star Internat i o nal Co. , LTD.
MS-8979 base on P 216 Modify
Size Document NumberRev
Custom
Date:
Monday, August 23, 2004
Sheetof
2020
00A
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