MSI MS-8632 Schematic 12
8
<Variant Name>
Title
7
History/Revisions
6
5
4
Schematic No.
105-B19600-00B
3
2
1
Date:
Friday, January 05, 2007
REVISION HISTORY
D D
Sch
PCB
Rev
Rev
1 00A
C C
Date
10 Nov 06 1) Based on 105-B04100-00C;
2) added path to support CVBS in 7 pin MiniDIN;
3) added provision for 10 pin connector for AVIn connector;
4) removed provision for not used diode in VCC regulator;
5) remove "Write protect" jumper Z2;
REVISION DESCRIPTION
Rev
1
B B
A A
Product Family:
Hedgehog (ATSB/DVB & Analog PCI) = A698
Gandalf (ATSB/DVB & Analog PCIe) = A854
Porcupine (ATSB/DVB & Analog PCIe (Dell)) = Axxx
8
7
6
5
4
3
2
1
5
4
3
2
1
DTV RF AGCV
D D
TV IN 1
TV IN 2
C C
DIGITAL TUNER
(I2C address C6)
& RF AGC
I2C_TUN
ANALOG TUNER
(I2C address C0)
& RF AGC
TUNER IF
TUNER IF
DTV IF AGC
& AMP
LIMA IF AGC
AMP &
FILTER
IIC EEPROM
DTV IF
DTV IF AGCV
TV IF
LIMA IF AGCV
DTV DEMOD
T311/T314
DTV
RESET
SCL_3V3 SDA_3V3
I2C_Lima
MPEG TS
T511
+3.3V_BUS; +AVDD18; +VDDC_18; +VDDC_T314
SPI EEPROM
LoR
&
CONFIG
(LIMA)
MA[14..0] MDQ[15..0]
DQM0/1 QS0/1 RAS
CAS WE CKE CLK/#
+AVDD18 +AVDD33
+MPVDD +MVDDQ +V_OSC
+VDDC +VDDC_18 +VPVDD
XTAL
S-VIDEO
CONNECTOR
VIDEO
SWITCH
CVBS
LUMA
CHROMA
FILTERS
STEREO
CONNECTOR
B B
AUDIO
SWITCH
AUDIO
ADC
I2S DATA
I2S CLK
I2S WS
I2S SYSCLK
I2S RESET
I2S LVL SEL
SELECT
IF DEMOD
VIDEO DECODER
MPEG ENCODER
PCIe BRIDGE
DDR SDRAM
4Mx16x4
POWER
REGULATION
+MVDDQ
+MVDDC
+MVTT
PERp0, PERn0, PETp0, PETn0,
PCLKp, PCLKn, PERST
AVIn Header (CVBS,
A A
S-Video, Stereo Audio)
PCIe BUS
5
4
3
+3.3V_BUS
+12V_BUS
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
Size Document Number Rev
B
2
Date: Sheet
Block Diagram
105-B19600-00B
of
214Friday, January 05, 2007
1
1
5
4
3
2
1
+12V_BUS
C101 100nF
+3.3V_BUS
D D
TRST#
C19
2.2uF_6.3V
C C
Note: PCIE connector is labelled from system board perspective.
LIMA_PERp0
LIMA_PERn0
Place test point via's on REFCLK+, REFCLK-, RIO_PETp0 and RIO_PETn0 where trace transitions from bottom to top layer near U102.
Note: n0 and p0 signals are swapped between Lima and connector. This is allowed by PCIe spec.
(i.e. you must cross connect receive & transmit signals)
B10
B11
B12
B13
B14
B15
B16
B17
B18
B1
B2
B3
B4
B5
B6
B7
B8
B9
MPCIE101
+12V#B1
+12V#B2
RSVD#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1
3.3Vaux
WAKE#
RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
x1 PCIe
614NOPN086
Mechanical Key
PRSNT1#
+12V#A2
+12V#A3
GND#A4
JTAG2
JATG3
JATG4
JATG5
+3.3V#A9
+3.3V#A10
PERST#
GND#A12
REFCLK+
REFCLK-
GND#A15
PERp0
PERn0
GND#A18
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
TCK
TDI
TDO
TMS
PERp0 LIMA_PETp0
PERn0
C107 100nF
C115 100nF
R110 0R
C106 100nF
+1.8V Regulator for Analog PCIe+1.2V Regulator for RIO D ig i t al P CI e C ore
+VDDC
+3.3V_BUS
B102
120R
B B
C110
4.7uF
3
REG101
EN
R108 47K
VOUTVIN
VSS
1.2V_LDO
2
DNI
PG
51
4
I(load) = 120 mA max.
Est. Regulator Power = 0.28W
DNI
B101
120R
C111
100nF
+VDDA12
+3.3V_BUS
R111
33R
REG102
SC431L
1
C117 100nF
R113
3 2
1.5K
C118 4.7uF
1%
Shunt regulator for +VDDA18
Vout = 1.8V
Iout = 24mA max. (43R)
R112
681R
1%
4
1
2
+VDDA18
NC
NC
5 3
MREG102
SC431LC5SK-1
DNI
C116 100nF
REFCLK+
REFCLK-
+VDDA12
+3.3V_BUS
R109 0R
53
U101
1
2
LIMA_PETn0
R101 100R
R102 150R
R103 10K
Differential signal pairs:
1
Intra-trace impedance = 100 ohms.
trace-ground impedance = 50 ohms.
Pad sharing:
2
4
NC7SZ08P5X_NL
R104 100R
R105 100R
Y20
Y21
AB17
AB18
AB21
AB20
Y18
Y17
W18
REG102/MREG102
DNI
DNI
U102B
REFCLK+
REFCLK-
PCIE_TXp0
PCIE_TXn0
PCIE_RXp0
PCIE_RXn0
PCIE_CALRN
PCIE_CALRP
PCIE_TXISET
T511 (Lima) A11 RH
3
VDDA18_1
VDDA18_2
VDDA18_3
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VSSA_1
VSSA_2
VSSA_3
VSSA_4
VSSA_5
VSSA_6
VSSA_7
VSSA_8
VSSA_9
PCI Express (2/9)
VSSA_10
VSSA_11
NOTES:
RIO_PERp0/RIO_PERn0
PERp0/PERn0
LIMA_PETp0/LIMA_PETn0
REFCLK+/REFCLK-
PCI_RESET# (11)
C104
AA20
AA21
AA22
W21
W22
W19
W20
W16
W17
Y16
Y19
Y22
AA16
AA17
AA18
AA19
AB16
AB19
4.7uF
+VDDA12
C108
4.7uF
+VDDA18
C105
100nF
C109
100nF
Iout = 20mA +10mA
A A
5
4
3
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
Size Document Number Rev
Custom
Date: Sheet
2
PCI-E Interface
105-B19600-00B
314Friday, January 05, 2007
of
1
1
5
EMI filters
Locate near connectors
J201
3
Y
4
C
1
GND
2
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
S-VID
CASE#9
CASE#10
AUD
AUD
GND#2
NC#6
NC#7
CASE
5
NC
6
7
8
9
10
C21 33pF_50V
C208 33pF_50V
C209 33pF_50V
c c c
5
J203
AUDIO
c
2SJ-4372-007
D D
J3
HDR_1X10_RA
C C
B B
A A
JU201
CVBS
GND
Y
GND
C
AL
GND
AR
Header_1x8
C5 33pF_50V
C8 33pF_50V
C6 33pF_50V
AUD
SRC_SEL(4)
B203 120R
120R
B11
B4 120R
B5 120R
B6 120R
R8 2.2K
R9 2.2K
C9 33pF_50V
C7 33pF_50V
4
3
5
2
1
c
Y_DIN
C_DIN
CVBS_DIN
CVBS_HDR
R216 2.2K
R215 2.2K
C206
33pF_50V
C207
cc
R23 0R
R24 2.2K
Y_HDR
C_HDR
AL_HDR
AR_HDR
33pF_50V
SEL
AR_IN
AL_IN
+3.3V_BUS
1
4
Y_DIN
C_DIN
SEL
1
2
3
5
6
11
10 14
15
c c
CVBS_HDR
Y_HDR
C_HDR
12
13
2
1
5
3
6
11
10
9
c c
+AVDD33
B3 120R
B209 120R
AUD_LVL_SEL(7)
I2S_RESET#(7)
R25
22K
SEL
3
Q1
MMBT3904
2
c
4
R10 0R
R11 0RB202 120R
U1
SEL
VCC
1A0
1A1
1B0
1B1
1C0
1D1
1C1 1D0
GND
E
QS3257
R12 0R
R13 0R
R14 0R
U2
X0
X
X1
Y
Y0
Y1
Z
Z0
Z1
INH
A
AVDD3
B
-5R
GND
C
74HCT4053D
C227 10uF
AUD
AR_IN
AL_IN
AR_HDR
AL_HDR
+5V_RF
16
4
YA
CHROMA
7
YB
CVBS
9
YC
12
YD
13
8
14
15
4
+5V_RF
16
7
8
AR
AL
C228 100nF
C229 10uF
C230 100nF
R19 0R
R20 0R
R21 0R
R22 0R
LUMA
CHROMA
LUMA
CVBS
LUMA
CHROMA
AR
AL
C222 4.7uF
C223 4.7uF
3
L201 1.2uH
C202
120pF_50V
120pF_50V
L202 1.2uH
C211
120pF_50V
120pF_50V
L203 1.2uH
C214
120pF_50V
120pF_50V
C218 2.2uF_6.3V
C219 100nF
U201
1
VCOM
2
3
4
5
6
7
AUD
AR
AL
AR
AL
RIN
LIN
VSS
VA
VD
SEL
AK5355VT
+5V_RF
3
NC#15
BCLK
MCLK
LRCK
SDTONC#8
AUD
TST1
DIF
PDN
R15 100K
R16 100K
R17 100K
R18 100K
c
CVBS_LPF
C203
Y_LPF
C212
C_LPF
C215
16
15
14
13
12
11
10
98
R202
75R
AVSS
R203
75R
AVSS
R205
75R
AVSS
AUD
R214 10K
C201 100nF
AVSS
C204 100nF
C205 100nF
C213 100nF
R206 33R
BAT54S
BAT54S
AUD
BAT54S
AR
AL
+3.3V_BUS
D1
+3.3V_BUS
D2
+3.3V_BUS
D3
2
U102G
P4
CVBS_IN0
P2
CVBS_IN1
M2
LUMA_IN
R1
CHROMA_IN
B4
GPIOd_C3/I2S_DI
B5
GPIOd_C2/I2S_DO
C5
GPIOd_C4/I2S_WS
A4
GPIOd_C1/I2S_SCLK
A5
GPIOd_C0/MCLK
T511 (Lima) A11 RH
C220 22pF
Y_DIN
AUD
C_DIN
AUD
Y_HDR
AUD
2
GPIO_D0/DVSO0
GPIO_D1/DVSO1
GPIO_D2/DVSO2
GPIO_D3/DVSO3
GPIO_D4/DVSO4
GPIO_D5/DVSO5
GPIO_D6/PDVSO6/SPI_DI
GPIO_D7/DVSO7/SPI_DO
GPIO_D8/DVSO8/SPI_CS#
GPIO_D9/DVSO9SPI_HOLD#
GPIOd_D10/DVSO_CLK/SPI_CLK
OSC_AVDD
OSC_AVSS
A/V I/O &
Oscillator
Y201
27.05MHz
AUD
AUD
AUD
(7/9)
21
C_HDR
CVBS_HDR
AR_IN
C221 22pF
XTAL_IN XTAL_OUT
K4 L4
+3.3V_BUS
D4
BAT54S
+3.3V_BUS
D5
BAT54S
+3.3V_BUS
D6
BAT54S
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
Size Document Number Rev
B
Date: Sheet
C6
B6
C7
B7
A7
B8
A8
C9
B9
A9
C8
K3
J3
BAT54S
BAT54S
BAT54S
J4
+3.3V_BUS
D7
+3.3V_BUS
D8
+3.3V_BUS
D10
OSC_OUT
A/V Input & Oscillator
SEL=0
SEL=1
+V_OSC
C216
100nF
OSC
OSCOSC
AL_IN
AUD
AR_HDR
AUD
AL_HDR
AUD
105-B19600-00B
1
Connector on the bracket.
Header
+VDDA18
B803
120R
C217 4.7uF
of
414Friday, January 05, 2007
1
1
5
4
3
2
1
+5V_RF
TV IN
J301
1
2
D D
Replace D302
with BA892??
C C
B B
5
3
4
RF
C314 1500PF
R339 1.2K
C353 1nF C351
R340
330R
DNI
D302 BA277
C356 1nF
2 1
RF
ESD
Protection
R341 680R
RF
RF_AGC_LPF(6,12,13)
+5V_RF
I2C address C0
DNI
R6143 1K
R6144 1K L307
RF
SCL_TUN(12,13)
SDA_TUN(12,13)
PDET_SDM(7)
R26
10R
B306
820nH
Q306
3
1
2
BFR193
C354 10pF_50V
R342 10R
RF
RF
DNI
R313 1K
R316 100R
R317 100R
C352
C307 100nF
100NF
RF
R308 681R
RF
R311 10K
C311
10uF_16V
C312
10uF_16V
R324 1K
R338 0R
RF
C355
2.2nF_50V
C316
10nF_25V
RF
R301 1K
C306 100nF
Install for antenna
positioning support.
+5V_RF
R309
12K
RF
TUN1
TUNER
1
RFin
3
FMin
4
AGC
6
SCL
7
SDA
5
SAS
RF
C317 33pF_50V
C318 33pF_50V
+5V_RF
C305 100nF
U301
1
+
3
-
LMV321
2 5
RF
R305
301R
3.47V
Q302
2SC2712-BL(T5L_F_T
3
1
2
RF
EU use:
5300010600
GND
GND3
GND4
GND5
GND6
21213141516171819
RF
RF
R302 2.7K
4
2480022700
2480023600
2480023700
2480024900
QUAD:
2480033900
R314 0R
GND7
GND8
GND9
C313 4.7uF
RF
B+
IF Out 1
IF Out 2
VT
GND10
GND11
20
RF
R303
4.7K
+5V_RF
8
9
10
11
+5V_RF
C308
100nF
R310
4.7K
C310
10nF
R315 100R
L301
1uH
PDET_CMP (7)
C309
10uF_16V
RF
RF
R306
4.7K
3
2
Q301
2SC2712-BL(T5L_F_T
R312
1K
RF
1
14
LIMA_IF_AGC_LPF(6)
1
+5V_RF
SAW301
X7303
246911
R307 330K
RF
B302
200R
13
+MVDDC
R6158
10K
R331
C918
470K
DNI
100nF
RF
C320
C319
1uF
100nF
RF
7
L302 1uH
8
C329 10nF
R321 1K C331
C325 100nF
C328 100nF
U302
1
VCC
GND
2
IN1
OUT2
3 7
IN2 OUT1
4
VAGC
GND#8
UPC3221GV
+5V_RF Regulator
U902B
5
+
6
-
LM358D
RF
R319
5
6
8
100R
RF
R320
RFRF
100R
C349
4.7uF
7
C324
15pF
C330
15pF
+6V_SMPS
Q305
RF
1nF
R332 1.5K
R333 1.5K
39pF_50V
B303
820nH
C326
B304
820nH
4
32
BCP68
1
+5V_RF
C350
10uF_16V
RF
RF
C321 39pF_50V
L303
560nH
L305
330nH
560nH
39pF_50V
C15
100nF
RF
C322 27pF_50V
L304
270nH
C327
22pF
L308
270nH
C332
27pF_50V
IF_BPF_LIMAp (6)
L306
560nH
IF_BPF_LIMAn (6)
NOTES:
A A
Differential signal pairs:
1
2
Pad sharing:
R325/MR325
IF_TUNp/n IF_SAW1p/n IF_SAW2p/n
IF_BPF_LIMAp/n IF_BPF_DTVp/n
IF_VGA2p/nIF_VGA1p/n
R327/MR327
3
5
4
3
2
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
Size Document Number Rev
Custom
Date: Sheet
LNA & Analog Tuner & IF Amp
105-B19600-00B
514Friday, January 05, 2007
1
of
1
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