CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
2/19/04 - Adding in the Power Supplies and Cleaning up the look.
2/25/04 - Need to change back to P266 from E266
Table of Contents:
3/01/04 - Major Schematic Changes: All Power Supplies and I/O
3/04/04 - Cleaning up some Power Net errors + other stuff
3/10/04 - Updating changes from design review
3/12/04 - Change names back to E266, Pullups on DDCB_S* and swap Drain/
1. Title Page - This Page
2. PCI-E / MXM Connectors and Zero Buffer Delay
3. MXM I/O Connector, Power Good, DVI Connectors, Hotplug
4. VGA and TV Filters and Connecors
5. Panel Power and SPWG Panel I/O; 60 Pin Board to Board Con
3/16/04 - Added New Docking Station Connector Page 9.
3/17/04 - Added Mechanical HW page 8: Bracket and screws
3/19/04 - Added gnd to bracket, added net rules to TV and Dock TMDS nets
6. Power Supply I: VBAT, 5VRUN, 1V8RUN, External In
7. Power Supply II: 2V5RUN, 3V3RUN, 1V2_INT
8. Mechanical, Fan Control, DDC-C Config ROM
9. Docking Station Connector
10.LVDS - SPWG Panel Daughter Board
3/24/04 - Board has been REFDES re-sequenced, added 3 reserved signals
src on Q16 and Q17. Fixed 5V_DDC net. Added Pullups on I2C
nets and changed to the correct voltage.
U1 now power to 3V3_PEX was 3VRUN. deleted r155,157,159 tv.
Extin CKT: D4 changed pkg from sot23 to SMA. Moved D2 to Q1.
Q1 - changed part number same package, flipped Drain & SRC.
1V3_INT CKT: Use RUN_PWR_OK to EN.
Docking Connector TV signal pins changed, DDC SDATA/CLK pins
Changed.
2V5RUN: EN added 2 resistors from 5VRUN.
Fixed PWM controller: Had some wrong pins.
from MXM CN1 to docking connector.
A00: 600-10266-0000-100
4/06/04 - Fixed J2 4-pin power panel net from VBATT to VBAT.
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
E266-A02 MXM Adapter Board
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
Table of Contents
6/01/04 - Fixed VBAT FET swapped Drain and Source
6/07/04 - Added R117 1210 1/4W pull-down to sink diode
6/09/04 - Fixed DAC/TV Impedance rule 50+/-2. This changes 75 to 150.
A03: 600-10266-0000-300
9/16/04 - Add New MXM Connector for P311.
10/18/04 - C14 package change to 1206 from 1210.
Added N-chn fet for the 1V8 Power supply LED to 5V. Was not
bright enough before.
Changed value of R502 on 2V5RUN linear to 8.2K. Voltage on
enable pin was too low before.
5VRUN, 1V8RUN, and 3V3RUN ISL6224 switcher EN pin 3 was
getting too high with VBAT >19V or 7V EN. This caused the
switcher not to work. Added Comparator to EN 5VRUN, and used
5VRUN for 1V8RUN and 3V3RUN.
External/12V_PEX input sense circuit did not work on A00.
Added 2 more FETS to set the external VBAT switcher voltage.
CN1 mxm connector changed 4 pin nets. 1V8RUN, 5VRUN, RUNPWROK.
Added MXM_CUTOUT symbol to ground the mxm mounting holes.
Added LVDS ZIF connector for Panel Power
leakage current at high temp.
Change Board outline in Lower right corner to fit into Alviso.
Added Page 10. LVDS brd to Brd Daughter board interface.
New 2x30 brd tio brd connector for LVDS qualification.
Power Supply fets changed to 12V_PEX from VBAT.
1 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 101 OF 10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
2 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 102 OF 10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
BC
2
A
1
3
4
5
EGDFHCAB
CN1
CON_MXM_ULTRA_PCIE_X16_MB
(ULTRA-(N))(NON)PHY(-X16)
ULTRA-PHY
COMMON
217
232
230
219
221
237
239
231
233
225
227
DVI_A_CLK*
DVI_A_CLK
DVI_A_TX0*
DVI_A_TX0
DVI_A_TX1*
DVI_A_TX1
DVI_A_TX2*
DVI_A_TX2
3.1F<
3.1F<
3.1F<
C-Link
3.1F<
3.1F<
3.1F<
3.1F<
3.1F<
3.4E>
3.4D<
3.4D<>
MXM_DVI_A_HPD
MXM_DDCB_SCLK
MXM_DDCB_SDATA
3. MXM I/O & DVI Connectors & Power Good
goes to dvi-a and docking thru r's
Goes to docking station
IGPL_DVIB_CLK*
S6
SW_KT11P2SM
SMD_4
COMMON
2
3
J3
HDR_JMPR_1M2
MALE
2.54MM
0
NORM
COMMON
189
IGPL_DVIB_CLK
191
IGPL_DVIB_TX2*
201
IGPL_DVIB_TX2
203
IGPL_DVIB_TX1*
207
IGPL_DVIB_TX1
209
IGPL_DVIB_TX0*
213
IGPL_DVIB_TX0
215
IGP_UCLK*
159
IGP_UCLK
161
163
IGP_UTX3*
165
IGP_UTX3
167
IGP_UTX2*
171
173 IGP_UTX2
175
IGP_UTX1*
177
IGP_UTX1
179
181
IGP_UTX0*
183
IGP_UTX0
185
IGP_LTX3*
195
IGP_LTX3
197
LVDS_UTX0
186
LVDS_UTX0*
184
LVDS_UTX1
180
LVDS_UTX1*
178
LVDS_UTX2
174
LVDS_UTX2*
172
LVDS_UTX3
168
LVDS_UTX3*
166
LVDS_UCLK
162
LVDS_UCLK*
160
LVDS_LTX0
216
LVDS_LTX0*
214
LVDS_LTX1
210
LVDS_LTX1*
208
LVDS_LTX2
204
LVDS_LTX2*
202
198 LVDS_LTX3
LVDS_LTX3*
196
LVDS_LCLK
192
LVDS_LCLK*
190
AC_BATT*
1
4
GND
6.5C<>
3.1F<
3.1F<
3.1F<
3.1F<
3.1F<
3.1F<
3.1F<
3.1F<
3.1F<
5.5H<
5.5F<
3.2F<
3.2F< 5.2E> 5.4F<
3.2F<
3.1F<
3.1F<
3.1F<
5.4H<
5.4F<
3.1A>
3V3RUN
VBAT_EXTERNAL_IN
5.2E>
5.2E>
3.3E<
3.3E<
3.3E<
3.3E<
D-Link
3.3E<
5.2E>
5.3E>
5.2E>
5.2E>
5.2E>
5.2E>
5.2E>
3.2F<
3.2F<
3.2F<
3.2F<
3.2F<
B-Link
4-7
3.2F<
3.2F<
3.2F<
3.2F<
3.2F<
3.2F<
A-Link
0-3
3.2F<
3.2F<
3.2F<
R511
4.7K
5%
0402
NO STUFF
3.1A<>
3V3RUN
R126
0-500K
10%
SMD_3
COMMON
R122
0402
9.2D<
9.2D<
5.2E> 9.2D<
5.2E> 9.2D<
5.2E> 9.2D<
5.2E> 9.2D<
3.1F<
5.2E> 9.2D<
5.5H<
5.5F<
5.4H<
5.4H<
5.4F<
5.4H<
5.4F<
5.3B<
5.3B<
5.3B<
5.3B<
5.3B<
9.2D<
5.3B<
5.3B<
9.2D<
9.2D<
5.4B<
5.4B<
9.2D<
5.4B<
9.2D<
5.4B<
3.2F< 5.3B<
5.3B<
5.3B<
5.3B<
MXM_DDCB_SCLK
MAX_WATTAGE=0.36W@25C
MAX_CURRENT=0.88A
CONTINUOUS_CURRENT=0.22A@31C
SOT23_1G1D1S
R517
4.7K
5%
0402
NO STUFF
12V_PEX
1
AC_BATT_THRES
3
GND
AC_BATT_EX_IN
10K
COMMON
5%
5.2E> 9.2D< 3.3E<
GND
5.3B<
3.2F<
5.3B< 3.2F<
5.3B< 3.2F<
5.2E>
5.2E>
5.2E>
5.2E>
5.2E>
3.2F<
5.3B<
V_BE_GS=+/-20V
MAX_VOLTAGE=50V
R_DS_ON=3.5R
3V3RUN
MXM_DDCB_SDATA
MAX_WATTAGE=0.36W@25C
CONTINUOUS_CURRENT=0.22A@31C
3.2D>
9.2D<
3.2D>
3.2D>
3.2D>
3.1F<
3.2D>
2
1
V_BE_GS=+/-20V
MAX_CURRENT=0.88A
MAX_VOLTAGE=50V
R_DS_ON=3.5R
SOT23_1G1D1S
3V3RUN
AC_BATT*
3.1F<
5.2E>
3.1F<
3.1F<
3.1F<
3.1D>
3.1F<
5V_DDC
3
Q503
BSS138
1G1D1S
COMMON
2
1
R509
2.2K
5%
0402
COMMON
FET_DDCB_SCLK
5V_DDC
3
Q504
BSS138
1G1D1S
COMMON
R515
2.2K
5%
0402
COMMON
FET_DDCB_SDATA
LB503
BEAD_0603
12V_PEX
2
2
4
3
R123
5
10K
5%
0402
COMMON
GND
R124
GND
0603
5%
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
MXM I/O & DVI Connectors
C72
0402
U11
SOT23_5
LMC7211
COMMON
AC_BATT_COMP_OUT
1
10M
COMMON
R127
0402
.1UF
16V
10%
X5R
COMMON
GNDGND
3.09K
COMMON
1%
GND
MXM_DVI_B_HPD
DACB_GREEN
TVY
DACB_RED
TVC
DACB_BLUE
TVCVBS
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
MXM_DDCA_SCLK
MXM_DDCA_SDATA
LVDS_PPEN
LVDS_BLEN
LVDS_BL_BRGHT
DDCC_SCLK
DDCC_SDATA
3V3RUN
SMB_DATA
SMB_CLK
Pull-ups incase MB leaves floating
7.1F<
THREM_LED
1K
COMMON
5%
LED_TH_3MM
DS6
15MA
2.2V
RED
2.1D>
TH
COMMON
9.3F<
2
9.3F<
1
GND
MXM_THREM_ALERT*
R524
47K
5%
0402
COMMON
RUN_PWR_OK
AC_BATT*
MXM_RSVD_1
MXM_RSVD_2
4.3E<
4.4E< 4.1F>
8.5A<>
2.1D<>
5.3D<>
Output drive 2ma. Good enough.
8.2A<>
8.2A<
3V3RUN
2
5.4D<>
3V3RUN
R48
47K
5%
0402
COMMON
GND
4.5A<
5
3
4.1A<>
5.1E<>
9.4C<>
8.5A<
2.1D<>
5.3D<>
U6
SINGLE
SC70
COMMON
9.3F>
4.1F>
4.1F> 4.3E<
4.2A<
4.3A<
4.1F> 4.3A<
4.1F> 4.4A<
4.1F>
4.1A<
5.4D<
5.4D<
5.4D<
9.4C<
5.1E> 5.4D<
TP1
TESTPOINT2
SCHMOO
NO STUFF
1
THREM_BUF_OUT*
4
R49
0402
Check to make sure threshold includes 5% tol.!
VBAT
R15
7.15K
1%
0402
COMMON
5VRUN
R12
10K
5%
0402
COMMON
2V5RUN
R11
10K
5%
0402
COMMON
1V8RUN
R14
1K
R13
5%
2.7K
0402
5%
COMMON
0402
Approx. 1V Threshold for nominal rail voltages
Approx. ~.8V Threshold for NV_12V
3 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 103 OF 10
9-JUN-2004
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