MSI MS-8622 Schematic 0826
8
<Variant Name>
Title
7
6
5
4
Schematic No.
3
2
1
Date:
Maverick T510 PCIe Plug-in Card with 16 MiB DDR
REVISION HISTORY
D D
Sch
PCB
Rev
Rev
00A
0
C C
Date
05/11/04
05/19/04 KB - Removed SMT test points on REFCLK+/- and PERp/n0 in PCIe section and added note to use via testpoints instead. Added terminating resistors for REFCLK+/-. Removed tantalum cap from 3.3V rail and added bulk
KB - Initial revision of the schematic based on A346 -Iceman
cap to 12V rail (C103). Added R114 & R115 between GND_PCIE and GND. Renumbered various R's & C's in PCIe section to remove large gaps in numbering sequence. Removed GND_PCIE and connected directly to
GND. Removed R144 & R115. Swapped Rio PCIe receive signal polarities for routing. Added alternate PVCC supply circuit to 6.5V SMPS circuit. Changed part reference L1 to L701. Changed alternate PVCC
supply and added schottky diode D702 on SMPS output. Renumbered C857 on page 7 to C715. Renumbered C758 to C714. Changed L1 to 68 uH and renumbered to L701. Changed Added net short requirement for
HSEL1 and HSEL2&3 nets.
REVISION DESCRIPTION
105-A34700-00A
Thursday, August 26, 2004
Rev
0
B B
A A
Merlin (ATSB/DVB & Analog PCI) = A345
Maverick (PCIe) = A347
Iceman (PCI) = A346
Goose (Dual Rio PCI) = A365/371
Cougar (Dual Rio PCIe) = A447
8
7
6
5
4
3
2
1
5
+12V_BUS
C101
4
3
2
1
C103
100uF_16V
DNI
D D
C C
B B
+3.3V_BUS
RIO_PERp0
RIO_PERn0
Note: n0 and p0 signals are swapped between RIO and connector. This is allowed by PCIe spec.
100nF
MPCIE101
B1
+12V#B1
B2
+12V#B2
B3
RSVD#B3
B4
GND#B4
B5
SMCLK
B6
SMDAT
B7
GND#B7
B8
B10
B11
B12
B13
B14
B15
B16
B17
B18
B9
+3.3V#B8
JTAG1
3.3Vaux
WAKE#
RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
x1 PCIe
+3.3V#A10
Mechanical Key
TRST#
Note: PCIE connector is labelled from system board perspective.
(i.e. you must cross connect receive & transmit signals)
PRSNT1#
+12V#A2
+12V#A3
GND#A4
JTAG2
JATG3
JATG4
JATG5
+3.3V#A9
PERST#
GND#A12
REFCLK+
REFCLK-
GND#A15
PERp0
PERn0
GND#A18
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
TCK
TDI
TDO
TMS
PERp0
PERn0
C102
100uF_16V
DNI
C107 100nF
REFCLK+
REFCLK-
C106 100nF
R104 100R
R105 100R
RIO_PETp0
RIO_PETn0
TP101
TP102
Locate TP's near U101.
VDDA12
R101 100R
R102 150R
R103 10K
Y20
Y21
AB17
AB18
AB21
AB20
Y18
Y17
W18
DNI
DNI
U101B
REFCLK+
REFCLK-
PCIE_TXp0
PCIE_TXn0
PCIE_RXp0
PCIE_RXn0
PCIE_CALRN
PCIE_CALRP
PCIE_TXISET
RIO510
VDDA18_RIO
C104
4.7uF
VSSA_1
VSSA_2
VSSA_3
VSSA_4
VSSA_5
VSSA_6
VSSA_7
VSSA_8
VSSA_9
VSSA_10
VSSA_11
AA20
AA21
AA22
W21
W22
W19
W20
W16
W17
Y16
Y19
Y22
AA16
AA17
AA18
AA19
AB16
AB19
DNI
VDDA12_RIO
C108
4.7uF
DNI
VDDA18_1
VDDA18_2
VDDA18_3
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
PCI Express (2/9)
C105
100nF
C109
100nF
PCI_RESET# (9)
VDDA18
VDDA12
+1.2V Regulator for RIO Digital PCIe Core
Replace with FAN2558
+3.3V_BUS
A A
C110
4.7uF
REG101
TK11819M
1
Vin
2
OSC
3
GND
DK
Vout
R108
47K
I(load) = 138 mA max.
Est. Regulator Power = 0.29W
5
R106 0R
DNI
R179
6
T1
0R
5
DNI
4
R107
0R
R181
0R
DNI
C111
100nF
VDDA12
C112
4.7uF
+1.8V Regulator for Analog PCIe
+3.3V_BUS
C113
4.7uF
I(load) = 35 mA max.
Est. Regulator Power = 0.057W
4
REG102
3 2
IN OUT
CASE
ADJ
LT1117CST
1
R112 681R
R113
1.50K
1%
Place test point via's on REFCLK+, REFCLK-, RIO_PETp0 and RIO_PETn0 where trace transitions from bottom to top layer near U101.
VDDA18
4
1%
C114
100nF
C115
4.7uF
Micro-Star International Co., LTD.
Maverick PCIe Rio Interface
Size Document Number Rev
B
8622-100 ATI PCI-E TV CARD
3
2
Date:
Friday, August 27, 2004
1
111
Sheet of
100
5
4
3
2
1
J201
D D
C C
B B
Shunt regulator for +V_AUD
Vout = 3V
Iout = 10 mA max. (100R)
+5V_RF
R211 200R
AUD_LVL_SEL(5)
I2S_RESET#(5)
C225 100nF
AUD
VIDEO
GND
GND#3
GND#5
CASE
CASE#10
CASE#11
R212
DNI
301R
1%
R213
1.5K
C226 4.7uF
1%
1
6
Y
8
C
7
AL
4
AR
2
3
5
9
10
11
C207 33pF
C206 33pF
c c c c c c
+V_AUD
4
NC
1
NC
2
5 3
C210 33pF
C208 33pF
C209 33pF
B209 120R
REG202
TL431CDBVR
B201 120R
B202 120R
B203 120R
B204 120R
B205 120R
DNI
C227 10uF
AUD
C228 100nF
C218
2.2uF
C222 4.7uF
C223 4.7uF
DNI
C229 10uF
C230 100nF
L201 1.2uH
C202
120pF
L202 1.2uH
C211
120pF
L203 1.2uH
C214
120pF
AUD
C219
100nF
U201
1
VCOM
2
RIN
3
LIN
4
VSS
5
VA
6
VD
7
SEL
8 9
NC#8 SDTO
AK5355VT
AUD
TST1
NC#15
PDN
BCLK
MCLK
LRCK
C201 100nF
R202
C203
75.0R
120pF
AVSS
R203
C212
75.0R
120pF
AVSS
R205
C215
75.0R
120pF
AVSS
16
AUD
15
14
DIF
13
12
11
10
R214 10K
AVSS
C204 100nF
C205 100nF
C213 100nF
R206 33R
AUD
U101G
P4
CVBS_IN0
P2
CVBS_IN1
M2
LUMA_IN
R1
CHROMA_IN
RIO510
B4
GPIOd_C3/I2S_DI
B5
GPIOd_C2/I2S_DO
C5
GPIOd_C4/I2S_WS
A4
GPIOd_C1/I2S_SCLK
A5
GPIOd_C0/MCLK
C220 22pF
GPIO_D0/PDATA0
GPIO_D1/PDATA1
GPIO_D2/PDATA2
GPIO_D3/PDATA3
GPIO_D4/PDATA4
GPIO_D5/PDATA5
GPIO_D6/PDATA6
GPIO_D7/PDATA7
GPIO_D8/PDATA8
GPIO_D9/PDATA9
GPIOd_D10/PCLK
A/V I/O &
Oscillator
(7/9)
XTAL_OUTXTAL_IN
L4K4
R208 1.0M
Y201
21
27.05MHz
OSC_AVDD
OSC_AVSS
OSC_OUT
C221 22pF
C6
B6
C7
B7
A7
B8
A8
C9
B9
A9
C8
K3
J3
J4
OSCOSC
OSCOSC
R209 10K
Shunt regulator for +V_OSC
Vout = 1.8V
Iout = 15 mA max. (82R)
+V_OSC
MREG201
AS432S
OSCOSC
C216 100nF
C217 4.7uF
3 2
+3.3V_BUS
R201 82R
R204
681R
1%
1
4
1
2
R207
1.5K
1%
NC
NC
5 3
OSC
OSC
REG201
SC431LC5SK-1
DNI
Pad sharing:
REG201/MREG201
REG202/MREG202
A A
Micro-Star International Co., LTD.
Maverick A/V Input & Rio Oscillator
Size Document Number Rev
B
8622-100 ATI PCI-E TV CARD
5
4
3
2
Date:
Friday, August 27, 2004
1
211
Sheet of
100
5
J301
1
234
5
c
J302
D D
234
5
c
Install as
required for EMI
R340 0R
R341 0R
R342 0R
R343 0R
R355 0R
R356 0R
c
C C
B B
RF_AGC_LPF(4)
C304 10nF
C308 10nF
1
+5V_RF
C333
100nF
ANT/FM _RF
CABLE_RF
C334
10nF
R315
RF
0R
R327 12K
RF
R334 2K7
RF
R319
12K
1
U302
3
RF IN 1
13
RF IN 2
17
V1
19
V1#19
18
V2
1
GND
2
GND#2
4
GND#4
7
GND#7
9
GND#9
12
GND#12
14
GND#14
15
GND#15
RF
PE4256
Q301
BFS17
2 3
R332
75R
C343 10nF
R317
392K
RF GND#10
RF GND#11
RF GND#16
RF GND#20
R320
4.7K
1
RF OUT
RF GND
RF GND#6
RF
2 3
R304 0R
C329 100nF
C335 10nF
Q302
BFS17
R333
1K
RF
DNI
R344 0R
8
B303 120R
5
6
C321 10nF
10
11
16
20
RF
R328
4.7K
1
4
RF_SW_OUT
RF
R312 10K
R313 10K
ANT/FM_SEL
CABLE_SEL
R322
20K
R330 75K
R329
12K
Q303
BFS17
2 3
RF
+V_AUD
C344 10uf
RF
C318 100nF
RF
R323 0R
R331 0R
C336
100nF
C301 39pF
C305
180pF
L302
220NH
RF
C337
100nF
should be 680R
3150068100
CB Trap
C302 27pF
DNI
R321
560R
C306
82pF
RF RF
C323
10nF
C328 100nF
RF
C338
3.3NF
C303 56pF
L303
330nH
RF
C339
1uF
RF
3
R314
330R
RF-
C340
22pF
T301
2
+5V_RF
LO Leakage
Filter
L301
12NH
64
Transformer
RF+
13
L305
82nH
U301
1
2
3
4
5
6
7
8
9
10
11
12
RF
C307
2.0pF
RF
MT2050_RF_IN
LNAIn_n
VCC_LNA1
AGC_In
AVCC_Io1
LO1_tk1
LO1_tk2
LO1_Reg
DVCC_Io1
LO1_lpf
GPO0
DNC_1
SERca
B302
1.8NH
48
LNAIn_p
VCC_LNA2
SAW301 CB00058
1
2
GPO2
DNC_6
MIX1_op
MIX1_on
VCC_mx1
4
MIX2_ip
MIX2_in
VCC_mx2
837
VCC_tga
Pad sharing:
R335/R336
R325/R345
R326/R346
R323/R331
5
6
RF
3738394041424344454647
DNC_5
FGAop
FGAon
AVCC_lo2
LO2_tk
LO2_Reg
LO2_lpf
DNC_4
DVCClo2
GPO1
DNC_3
VGAip
VGAin
GND_PAD
L304
7.5NH
36
35
34
33
32
31
30
29
28
27
26
25
49
2
C324
1uF
RF
+5V_RF
RF
C325
1uF
IFOutP
IFOutN
C330
6.8nF
R318 560R
C326
1uF
C331
100nF
C327
22pF
RF
C332
100nF
R325 0R
R326 0R
L306
1uH
RF
C341
10nF
2
534
1
SAW302 44.0MHZ
R345 0R
R346 0R
1
SAW2_OUTp (4)
SAW2_OUTn (4)
LM324M
12
+
PDET_VCMP_PWM(5)
PDET_CMP(5)
AUX_VREF_PWM(5)
A A
SCL_3V3(5)
SDA_3V3(5)
IF_AGC_LPF(4)
R316 1K
C354 100nF
R347 1K
C355 100nF
5
13
14
-
U303D
DNI
R376
10K
R375
0R
+5V_RF
C347
1uF
Place inside metal shield
R337 100R
R338 100R
4
3
MT2050TR
C348
22pF
RF
C351 33pF
I2C_en
SCL
SDA
DNC_2
VCC
SROn
SROp
GPADin
VGAop
VGAon
1314151617181920212223
C350 18pF
Y301 4.000_Mhz
2 1
RFRF
C352 33pF
R339 1K
VCCvga
VGActrl
24
R335 0R
R336 0R
C349 100nF
R324 560R
RF
DNI
RF
2
C346 1uF
RF
RF
MT2050_VGA_OUTn (4)
MT2050_VGA_OUTp (4)
Micro-Star International Co., LTD.
Maverick RF Switch & MT2050 Tuner
Size Document Number Rev
B
8622-100 ATI PCI-E TV CARD
Date:
Friday, August 27, 2004
Sheet of
1
100
311
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