MSI MS-8604,MS-8604, MS-8604 Schematic 100

5

D D

Video decoder

RTCO

SDA
SCL

C C

VCC3A

RTCO

SDA
SCL

VCC3A

4

DEC_VS
DEC_HS

DEC_PXQ

DEC_D[7:0]

DEC_CLK

DEC_RST#

EPLD_CLK

PORTB_CLK

ENC_CLK
FIFO_CLK

AMCLK
ABCLK

ALRCLK

DEC_D[7:0]

DEC_RST#

ENC_CLK
FIFO_CLK

VCC3A

SAA7146 & Power

DEC_VS
DEC_HS

DEC_PXQ
DEC_D[7:0]

DEC_RST#

EPLD_CLK
PORTB_CLK

AMCLK
ABCLK
ALRCLK

ACODEC_DIN
ACODEC_DOUT
MUTE_CNTRL#

Audio Codec

MUTE_CNTRL#
ACODEC_DOUT
ACODEC_DIN

AMCLK
ACODEC_BCLK

ACODEC_LRCLK

VCC3A

ENC_Q[7:0]

ENC_D[7:0]DEC_CLK

ENC_VS
ENC_HS

ENC_RST#

FIFO_WEN#

FIFO_REN#

FIFO_WRST#

FIFO_RRST#

FIFO_OEN#

VCC3A

PCI_5V

VCC3

SCL
SDA

3

ENC_Q[7:0]

ENC_D[7:0]

FIFO_WEN#
FIFO_REN#
FIFO_WRST#
FIFO_RRST#

FIFO_OEN#

VCC3A

SCL
SDA

ENC_CLK

FIFO_CLK
ENC_VS
ENC_HS

RTCO

SCL
SDA

Video Encoder

ENC_Q[7:0]

SCL
SDA
ENC_D[7:0]
ENC_CLK
RTCO
FIFO_CLK
ENC_VS
ENC_HS
ENC_RST#
FIFO_WEN#

FIFO_REN#
FIFO_WRST#
FIFO_RRST#
FIFO_OEN#

VCC3A

2

1

PCI_5V

PCI Bridge & 1394 port

PCI_5V

VCC3

VCC3A

SCL
SDA

VCC3A

B B

A A

Client

Product Name

Atlantis

Size Client Document Number Rev

C

5

4

3

2

Date:

Emuzed Inc.

Sheet Name

Main Page

Sheet

1

18Friday, August 30, 2002

0.14

of

5

4

3

2

1

NS

ACODEC_VDDD

84

4.7uF

4.7uF

C10
22uF

C14
22uF

R3
10K

R8
10K

1
7

5
3

R2 100

R7 100

+

+

U20

1A
1C

2A
2C

ACODEC_VADCP

2

1B

VCCGND

6

2B

SN74LVC2G66DCTR

R154 0
R156 0
R158 0

ACODEC_3.3V

ACODEC_VADC

C11

0.1uF

C15

0.1uF

VOUTL_N

VOUTR_N

OUT_TIP_L

AAGND

AAGND should be a
ground Plane

VCC3A

9
3
8

1V RMS
Output

JP1D

AUD R OUT
AUD L OUT
AUD GND

BOB

VOUTL

U1

1

8

ref-

I/O_1

2

AMCLK
ACODEC_BCLK
ACODEC_LRCLK

ACODEC_DIN

ACODEC_DOUT

VOUTR

7

I/O_6

6

ref+

DALC112S1

C4

C6

I/O_2

3

I/O_3

45

I/O_4I/O_5

AMCLK
ACODEC_BCLK

ACODEC_LRCLK
ACODEC_DIN

R1

4.7uF

+

15K

R4

4.7uF

+

15K

ACODEC_DOUT

R92.2K

R102.2K

R112.2K

ACODEC_VDDD

D D

JP1C

AUD R IN
AUD L IN

AUD GND

BOB

2V RMS MAX
Input

C C

IN_COL_R

13

IN_TIP_L OUT_COL_R

11
12

AAGND

SCL
SDA

AMCLK

ACODEC_BCLK

ACODEC_LRCLK

ACODEC_DIN

ACODEC_DOUT

MUTE_CNTRL#

0.01uF

ACODEC_VA

R5
1M

C1

R153 0
R155 0
R157 0

R6
1M

MUTE_CNTRL#

IIC Address: 0x34, 0x35

BK1

1

Bracket Mount

BK2

1

Bracket Mount

NOTE: The Bracket mount should be connected
to chassis GND. Refer PCB layout instructions

B B

NO thermal Relief on baracket mount holes.

CGND

ACODEC_VDAC
ACODEC_VDDD
ACODEC_VADCP
ACODEC_VADC

3

U2

12

SYSCLK

16

BCK

17

WS

19

DATAI

18

DATAO

6

VINL2

VINR2

IPSEL
L3MODE
L3CLOCK
L3DATA
TEST1
STATIC

VINL1
VINR1

VSSA_AD

1

UDA1342TS /N1

8

9
13
14
15
20
21

2

4

R132.2K

R122.2K

10

25

7

VDDD

VADCP

VDDA_AD

VADCN

5

VSSD

11

27

ACODEC_3.3V

VDDA_DA

28

VREF

C3

0.1uF

VOUTL

R197 0

26

VOUTL

VOUTR

R198 0

24

VOUTR

ACODEC_3.3V

22

STATUS

23

QMUTE

VSSA_DA

R14 10

+

C8

4.7uF

C12

4.7uF

ACODEC_VA

+

L1 10uH

VOUTL

MUTE_CNTRL#

VOUTR

+

C2
22uF

C5

VOUTL_N

+

C7

VOUTR_N

+

R1734.7KR1744.7K

NS

ACODEC_VDDD

C9

0.1uF

R15 10

C13

0.1uF

R16 220

FB17 60-ohms @ 100MHz

CGND

A A

5

4

R17 10

C16
22uF

3

ACODEC_VDAC

C17

+

0.1uF

Client

Product Name

Atlantis

Size Client Document Number Rev

C

2

Date:

Emuzed Inc.

Sheet Name

Sheet

1

Audio Codec

of

28Friday, August 30, 2002

0.14

5

VCC_IO

184

190

196

202

124

135

208

VCC27

VCC28

VCC29

VCC30

VCC_P

VCC_S

GND25

GND26

GND27

GND28

GND29

GND30

GND31

160

166

174

181

187

193

199

205

VCC3

C43

0.1UF

VCC3

C69

0.1UF

2412

VCCGND

2

1B1

6

2B1

10

3B1

16

4B1

20

5B1

5

1B2

9

2B2

15

3B2

19

4B2

2322

5B25A2

SN74CBTLV3383PWR

C70

0.1UF

C44

0.1UF

C42

0.1UF

C68

0.1UF

VCC3

U19

1

BE#

13

BX

3

1A1

7

2A1

11

3A1

17

4A1

21

5A1

4

1A2

8

2A2

14

3A2

18

4A2

NS

R2433

R18733
R18833
R18933
R19033

VCC3

R444.7K

R460

C40

0.1UF

C66

0.1UF

SWAP_BITS

MULT_C/BE#1

MULT_C/BE#3

5

43
45

84
80
46
65
82
87
90
88
47
89
85
83

64
79
92

110

49
50
55
57
58
60
61
63
67
68
70
71
73
74
76
77
93
95
96
98

99
101
107
109
112
113
115
116
118
119
121
122

24

25

27

28
127

128
106

155

133
129
130
132
134

126

23
125
102

R55

4.7K

C67

0.1UF

U3

P_RST#
P_CLK

P_DEVSEL#
P_FRAME#
P_GNT#
P_IDSEL
P_IRDY#
P_LOCK#
P_PAR
P_PERR#
P_REQ#
P_SERR#
P_STOP#
P_TRDY#

P_CBE#3
P_CBE#2
P_CBE#1
P_CBE#0

P_AD31
P_AD30
P_AD29
P_AD28
P_AD27
P_AD26
P_AD25
P_AD24
P_AD23
P_AD22
P_AD21
P_AD20
P_AD19
P_AD18
P_AD17
P_AD16
P_AD15
P_AD14
P_AD13
P_AD12
P_AD11
P_AD10
P_AD9
P_AD8
P_AD7
P_AD6
P_AD5
P_AD4
P_AD3
P_AD2
P_AD1
P_AD0

GPIO3/HSSWITCH
GPIO2
GPIO1
GPIO0

HSENUM#
HSLED

MS1
MS0

TCLK
TDI
TDO
TMS
TRST#

MSK_IN
S_CFN#
CONFIG66
P_M66EN

C41

0.1UF

C18

12pF

D D

P_C/BE#[3:0]

P_AD[31:0]

ON RESET

GPIO0 - Input
GPIO1- Input

C C

GPIO2- Input
GPIO3 - Input

GPIO_TCK
GPIO_TDO
GPIO_TMS

GPIO_TDI

VCC3

R48
10K

B B

C38

0.1UF

C64

0.1UF

VCC3

A A

+

C80

4.7uF

One 4.7uF Electrolytic
Capacitor should be placed for
Sixteen PCI2050 VDD pins.

P_DEVSEL#
P_FRAME#
P_GNT#
P_IDSEL
P_IRDY#
P_LOCK#
P_PAR
P_PERR#
P_REQ#
P_SERR#
P_STOP#
P_TRDY#

P_C/BE#3
P_C/BE#2
P_C/BE#1
P_C/BE#0

P_AD31
P_AD30
P_AD29
P_AD28
P_AD27
P_AD26
P_AD25
P_AD24
P_AD23
P_AD22
P_AD21
P_AD20
P_AD19
P_AD18
P_AD17
P_AD16
P_AD15
P_AD14
P_AD13
P_AD12
P_AD11
P_AD10
P_AD9
P_AD8
P_AD7
P_AD6
P_AD5
P_AD4
P_AD3
P_AD2
P_AD1
P_AD0

P_M66EN

R540

R530

C39

0.1UF

C65

0.1UF

+

C81

4.7uF

P_RST#

P_CLK

VCC3

103

105

108

114

120

131

139

145

151

157

163

170

178

VCC14

VCC15

VCC16

VCC17

VCC18

VCC19

VCC20

VCC21

VCC22

VCC23

VCC24

VCC25

VCC26

PCI2050APDV

GND12

GND13

GND14

GND15

GND16

GND17

GND18

GND19

GND20

GND21

GND22

GND23

GND24

158

These Capacitors should be placed on each pin of Intel 2050A
Bridge Controller

C210

0.01uF

PCI_C/BE#1

PCI_C/BE#3

104

111

117

123

136

142

148

156

C45

C46

0.1UF

0.1UF

C71

C72

0.1UF

0.1UF

GPIO_TCK
GPIO_TDO
GPIO_TMS

GPIO_TDI

VCC13

GND11

C73

0.1UF

VCC12

GND10

C47

0.1UF

VCC11

GND9

VCC10

GND8

4

VCC3

R18
10K DIP

51

10

C

22

175
179
177
172
168
171
169
173
176

194
180
167
149

206
204
203
201
200
198
197
195
192
191
189
188
186
185
183
182
165
164
162
161
159
154
152
150
147
146
144
143
141
140
138
137

9
8
7
6
5
4
3
2
207

19
18
17
16
15
14
13
11
10

29
30
32
33
35
36
38
39
41
42153

21

PCI_RST#

PCI_DEVSEL#
PCI_FRAME#

PCI_IRDY#
PCI_LOCK#
PCI_PAR

PCI_PERR#

PCI_SERR#

PCI_STOP#

PCI_TRDY#
PCI_C/BE#3

PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_MUTI_REQ#
PCI_1394_REQ#

PCI_MUTI_GNT#
PCI_1394_GNT#

C51

0.1UF

C77

0.1UF

NS

NS

R19
10K

R520

C78

0.1UF

R1950
R1960

C52

0.1UF

R450
R470
R1760

PCI_C/BE#[3:0]

PCI_AD[31:0]

R26
10K DIP

10

C

1394_PCI_CLK
MULTI_PCI_CLK
EPLD_PCI_CLK

PCI_5V

C53

0.1UF

C79

0.1UF

PCI_C/BE#0
PCI_C/BE#2

VCC3

VCC3A

VCC3

2346789

VCC3

51

2346789

MULT_C/BE#[3:0]

R2910K

R3110K

R3010K

INT_1394#
INT_MULT#

P_REQ#
P_SERR#
P_IDSEL
P_LOCK#
P_RST#
P_CLK
P_GNT#
P_PAR
P_PERR#
P_STOP#
P_DEVSEL#
P_FRAME#
P_TRDY#
P_IRDY#
P_PME#

P_C/BE#[3:0]
P_AD[31:0]

P_M66EN

1263440515356626975819197

S_RST#

VCC0

VCC1

VCC2

VCC3

VCC4

VCC5

VCC6

VCC7

VCC8

VCC9

GND7

VCC3

R1911K

S_DEVSEL#

S_FRAME#

S_IRDY#

S_LOCK#

S_PAR
S_PERR#
S_SERR#
S_STOP#
S_TRDY#

S_CBE#3
S_CBE#2
S_CBE#1
S_CBE#0

S_AD31
S_AD30
S_AD29
S_AD28
S_AD27
S_AD26
S_AD25
S_AD24
S_AD23
S_AD22
S_AD21
S_AD20
S_AD19
S_AD18
S_AD17
S_AD16
S_AD15
S_AD14
S_AD13
A_AD12
S_AD11
S_AD10

S_AD9

S_AD8

S_AD7

S_AD6

S_AD5

S_AD4

S_AD3

S_AD2

S_AD1

S_AD0

S_REQ#8
S_REQ#7
S_REQ#6
S_REQ#5
S_REQ#4
S_REQ#3
S_REQ#2
S_REQ#1
S_REQ#0

S_GNT#8
S_GNT#7
S_GNT#6
S_GNT#5
S_GNT#4
S_GNT#3
S_GNT#2
S_GNT#1
S_GNT#0

SCLKOUT0
SCLKOUT1
SCLKOUT2
SCLKOUT3
SCLKOUT4
SCLKOUT5
SCLKOUT6
SCLKOUT7
SCLKOUT8
SCLKOUT9S_M66EN

S_CLK

GND0

GND1

GND2

GND3

GND4

GND5

GND6

1220313744485254596672788694100

C75

0.1UF

R1941K

C49

0.1UF

C50

0.1UF

C76

0.1UF

MULT_C/BE#0
MULT_C/BE#2

JP5

12
34
56
78
910

HEADER 5X2

C74

0.1UF

C48

0.1UF

R1921K

4

PCI_AD22

PCI_C/BE#[3:0]

MULT_C/BE#[3:0]

PCI_MUTI_REQ#
PCI_DEVSEL#

PCI_5V

VCC3A

VCC3

3

MULT_C/BE#3
MULT_C/BE#2
MULT_C/BE#1
MULT_C/BE#0

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

R3433

INT_MULT#

PCI Connector

INT_1394#
INT_MULT#

P_REQ#
P_SERR#
P_IDSEL
P_LOCK#
P_RST#
P_CLK
P_GNT#
P_PAR
P_PERR#
P_STOP#
P_DEVSEL#
P_FRAME#
P_TRDY#
P_IRDY#
P_PME#

P_C/BE#[3:0]
P_AD[31..0]

P_M66EN

3

25
59
56
57

62
61

60
58

41
55
63
78

31
32
33
34
37
38
39
40
43
44
45
46
49
50
51
52
66
67
68
69
72
73
74
75
79
80
82
83
84
85
88
89

28
27
26
42
24

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1

PCI_C/BE#0
MULT_C/BE#3
MULT_C/BE#2
MULT_C/BE#1
MULT_C/BE#0

PCI_FRAME#
PCI_MUTI_GNT#

SWAP_BITS

EPLD_PCI_CLK

GPIO_TDI

GPIO_TMS
GPIO_TCK
GPIO_TDO

R98220

R99220

R100220

PCI_12V

PCI_5V

VCC_IO

RST#
DEVSEL#
FRAME#
IRDY#

PAR
PERR#

STOP#
TRDY#

C/BE3#
C/BE2#
C/BE1#
C/BE0#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

REQ#
GNT#
CLK
IDSEL
INTA#

SAA7146AH / V4

2
3
5
6

8
10
12
13
14
15

R1750

18

R1770

19
20

40

1

7
26
32

U6

1

A0

2

A1

3

A2

4

VSS

24WC04

PCI_5V

VCC_IO

U4A

IO2
IO3
IO4
IO5
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15

INPUT / OE2 / GCLK2
IO1 / TDI

IO6 / TMS
IO20 / TCK
IO24 / TDO

C25

0.1uF

8

VCC

7

WP

6

SCL

5

SDA

PCI_12V

PCI_12V

C82

0.1uF

R412.2K

R424.7K

R50220

R490

NS

pg2

VCC3A

1394_VDDA
PCI_12V

U18B
EPM3064ATC44-4

VCC3A

R432.2K

1394_SCL
1394_SDA

R51220

NS

VCC3A

C83

0.1uF

2

VCC3A

R20 4.7K
R21 10K
R22 4.7K
R23 4.7K

VCC3A

15
27
39
51
59
72
88

0.001uF

1394_SDA
1394_SCL

R87220

+

C54
22uF

C85

0.01uF

100

7

C20

+

C19
22uF

125
124
123
122
121

118

R25

6.34K 1%

119

6

X124.576MHz

5

0.1uF
C23

3

4
92
91
99

98
97

116
115
114
113
112

106

94
95

101
102
104
105

R89220

R88220

+

C28
22uF

VCC3A

C55

0.1uF

C86

0.001uF

2

60-ohms @ 100MHz

FB3

TPBIAS1pg2
TPA1+pg2
TPA1-pg2
TPB1+pg2
TPB1-pg2

C21 12pF

C22 12pF

VCC3A

TPBIAS0pg2
TPA0+pg2
TPA0-pg2
TPB0+pg2
TPB0-pg2

NS

R380
R134390K

R96220

R86220

R95220

These Capacito r s should be pl aced on each
VDDP pin of TSB4 3 A B2 2

C84

0.01uF

U5

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

PLLVDD

TPBIAS1
TPA1+
TPA1­TPB1+
TPB1-

R0

R1
X0

X1

FILTER0
FILTER1

EEPROM 2 WIRE BU S

SDA
SCL
PC0

PC1
PC2

TPBIAS0
TPA0+
TPA0­TPB0 +
TPB0 -

CPS
TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

C26

0.1uF

C29

0.1uF

60-ohms @ 100MHz

FB4

C56

0.1uF

C87

0.001uF

101186

96

87

CNA

TEST17

TEST16

CYCLEIN

CARDBUS/CYCLEOUT

TSB43AB22APDT

PCI BUS INTERFACE

PHY PORT 2

BIAS CURRENT

OSCILLATOR

FILTER

POWER CLASS

PHY PORT 1

DGND

DGND

REG18

DGND

REG18

C30

0.1uF

DGND

REG_EN

68

9758393103

C27

0.1uF

VCC3A

C31

0.1uF

These Capacito r s should be pl aced on each
AVDD pin of TSB4 3 A B 2 2

C57

0.1uF

1

1394_VDDA

VCC3A

12107

108

120

2035486278

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1

PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0

PCI_CLK

PCI_GNT
PCI_REQ

PCI_IDSEL

PCI_FRAME

PCI_IRDY

PCI_TRDY

PCI_DEVSEL

PCI_STOP
PCI_PERR

PCI_INTA
PCI_PME

PCI_SERR

PCI_PAR

PCI_RST

PCI_CLKRUN

AGND

AGND

PLLGND1

109

110

8

C60

0.01uF

G_RST

GPIO3
GPIO2

C34

0.01uF

22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
85

12

14

89
90

1394_VDDA

C61

0.001uF

1

AVDD

AVDD

AVDD

AVDD

AVDD

VDDP

VDDP

VDDP

VDDP

VDDP

AGND

DGND

DGND

DGND

AGND

AGND

AGND

AGND

DGND

DGND

DGND

C58

0.01uF

445564

111

117

126

127

128

17

233033

These Capacito r s should be pl aced on each
DVDD pin of TSB4 3 A B 2 2

C33

C32

0.01uF

0.01uF

C59

0.01uF

Client

Product Name

Atlantis

Size Client Document Number Rev

C

Date:

PCI_AD[31:0]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1

PCI_C/BE#[3:0]

PCI_AD0
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

1394_PCI_CLK
PCI_1394_GNT#
PCI_1394_REQ#

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
INT_1394#
P_PME#
PCI_SERR#
PCI_PAR
PCI_RST#

R35 10K

R39 220
R40 220

ON RESET

GPIO2- Input (not used )
GPIO3 - Input (not used )

C35

0.001uF

Emuzed Inc.

Sheet Name

PCI Bridge & 1394 Port

Sheet

C62

0.001uF

R2833

R37 10K

C36

0.001uF

38Friday, August 30, 2002

PCI_AD21

C24
1 uF

C63

0.001uF

of

VCC3A

VCC3A

C37

0.001uF

R33
10K

0.14

5

D D

C C

4

C204

C90

0.01uF

0.01uF

CGND

JP2

6-pin 1394 Con

TPA+
TPB+

7

Shld

1

Pwr

6
5

TPA-

4
3

TPB-

2

Gnd

8

Shld

3

D1

MBRS190TR

4.7uF

FB5

60-ohms @ 100MHz

PCI_12V

C88

2

1

PCI_12V pg1

R56

R57

+

56.2

56.2

R58 56.2

R60 56.2

R59 5.11K

C89 220pF

TPBIAS1 pg1
TPA1+ pg1
TPA1- pg1
TPB1+ pg1
TPB1- pg1

CGND

D2

CGND

MBRS190TR

FB6

60-ohms @ 100MHz

C205

C93

0.01uF

0.01uF

CGNDCGND

JP3

TPA+
TPB+

7

Shld

1

Pwr

6
5

TPA-

4
3

TPB-

2

Gnd

8

Shld

6-pin 1394 Con

B B

4.7uF

PCI_12V

R62

+

C91

R61

56.2

56.2

R63 56.2

R65 56.2

R64 5.11K

C92 220pF

TPBIAS0 pg1
TPA0+ pg1
TPA0- pg1
TPB0+ pg1
TPB0- pg1

A A

Client

Product Name

Atlantis

Size Client Document Number Rev

C

5

4

3

2

Date:

Emuzed Inc.

Sheet Name

1394 Connector

Sheet

1

48Friday, August 30, 2002

0.14

of

5

D D

C C

B B

4

P_CLK

P_REQ#

P_IRDY#

P_DEVSEL#

P_LOCK#
P_PERR#

P_SERR#

P_M66EN

INT_1394#

P_CLK
P_REQ#

P_AD31
P_AD29

P_AD27
P_AD25
PCI_3V_12
P_C/BE#3
P_AD23

P_AD21
P_AD19
PCI_3V_11
P_AD17
P_C/BE#2

P_IRDY#
PCI_3V_10

P_DEVSEL#
P_LOCK#

P_PERR#
PCI_3V_09

P_SERR#
PCI_3V_08
P_C/BE#1

P_AD14
P_AD12

P_AD10
P_M66EN

P_AD8
P_AD7
PCI_3V_07
P_AD5
P_AD3

P_AD1

PCI_IO_4

R1370

PCI_IO_5

P_AD[31..0]

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1
RSVD
PRSNT2

RSVD
GND
CLK
GND
REQ#
VCC-IO
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
66/33#

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
VCC-IO
ACK64#
+5V
+5V

JP4

TRST#

+12V

INTA#
INTC#

RSVD

VCC-IO

RSVD

RSVD

RST#

VCC-IO

GNT#

GND

RSVD

AD30
+3.3V
AD28
AD26

GND

AD24

IDSEL

+3.3V
AD22
AD20

GND
AD18
AD16
+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND
AD15

+3.3V
AD13
AD11

GND

C/BE0#

+3.3V

GND

VCC-IO

REQ64#

3

PCI_5VPCI_5V

A1
A2
A3

TMS

A4

TDI

A5

+5V

P_INTA#

A6
A7
A8

+5V

A9
A10
A11

A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43

PAR

A44
A45
A46
A47
A48
A49

AD9

A52
A53
A54

AD6

A55

AD4

A56
A57

AD2

A58

AD0

A59
A60
A61

+5V

A62

+5V

PCI_IO_1

PCI_IO_2

PCI_IO_3

NS

P_RST#
P_GNT#

P_AD30
PCI_3V_01
P_AD28
P_AD26

P_AD24
P_IDSEL
PCI_3V_02
P_AD22
P_AD20

P_AD18
P_AD16
PCI_3V_03
P_FRAME#

P_TRDY#
P_STOP#

PCI_3V_04

P_PAR
P_AD15

PCI_3V_05
P_AD13
P_AD11

P_AD9

P_C/BE#0
PCI_3V_06

P_AD6
P_AD4

P_AD2
P_AD0

F1

MF-MSMD075/24-2

R1350

R1360

NS

R1380

NS

INT_1394#

R660

P_RST#
P_GNT#

P_IDSEL

P_FRAME#
P_TRDY#
P_STOP#

P_PAR

PCI_12V

INT_1394#
INT_MULT#

P_PME#

PCI Edge Connector B Side is
Component Side.

prsnt1=gnd, prsnt2=gnd means 7.5w max
prsnt1=gnd, prsnt2=o p e n m e an s 2 5 w m ax
prsnt1=open, prsnt2= gnd means 15w max
prsnt1=open, prsnt2=open me a n s 0 w m a x

Note: B49 was gnd on older 5V bus standards ... it is now a input
to the s y s t e m t e l l i n g i t ( when hig h ) t h a t 6 6 M Hz clock rate is OK
to use. So if this pin is grounded the system will run at 33Mhz

A19 pin is RSVD pin in older systems...it is now PME# , a
power management input. The series resistor in not
mounted as there could be system issues of power down or
standby behaviour.

2

P_AD[31..0]

PCI_5V

PCI_IO_1

1

PCI_5V

VCC_IO

PCI_EDGE

P_C/BE#[3:0]

P_C/BE#[3:0]

These Capacitors should be placed on PCI 3.3 V Pins

PCI_3V_07 PCI_3V_11

PCI_3V_06

C100

C99

0.01uF

0.01uF

Client

Product Name

Atlantis

Size Client Document Number Rev

C

Date:

C97

0.01uF

C114

0.01uF

PCI_3V_05

C98

0.01uF

PCI_3V_02 PCI_3V_08

PCI_3V_01

C94

0.01uF

PCI_5V

These Capacitors should be pl aced on PCI 5V Pins

A A

PCI_IO_1

5

4

C106

0.01uF

C115

0.01uF

C107

C108

0.01uF

C117

0.01uF

C109

0.01uF

PCI_IO_4

C118

0.01uF

PCI_IO_5

0.01uF

PCI_IO_2

PCI_IO_3

C116

0.01uF

3

C111

C110

0.01uF

0.01uF

These Capacitors should be placed on PCI IO Pins

C119

0.01uF

PCI_3V_03 PCI_3V_04

C95

0.01uF

C112

0.01uF

C96

0.01uF

2

C113

0.01uF

C101

0.01uF

PCI_3V_09

C102

0.01uF

PCI_3V_10

C103

0.01uF

1

Sheet

PCI_3V_12

C104

0.01uF

Emuzed Inc.

Sheet Name

PCI Connector

58Friday, August 30, 2002

of

C105

0.01uF

0.14

5

VCC3_7146

4

3

2

1

5152229354753647076869096

D D

DEC_D[7:0]

ENC_D[7:0]

C C

ACODEC_DIN

ACODEC_DOUT

B B

A A

DEC_CLK

DEC_D[7:0]

DEC_D0
DEC_D1
DEC_D2
DEC_D3
DEC_D4
DEC_D5
DEC_D6
DEC_D7

DEC_CLK

DEC_PXQ
DEC_HS
DEC_VS

ENC_D[7:0]

ENC_D0
ENC_D1
ENC_D2
ENC_D3
ENC_D4
ENC_D5
ENC_D6
ENC_D7

PORTB_CLK

AMCLK
ABCLK

ALRCLK

DEC_D[7:0]

PORTB_CLK
PORTB_PXQ
PORTB_HS
PORTB_VS

ABCLK

ALRCLK

VCC3_7146

R72 2.2K C127

ACODEC_DIN
ACODEC_DOUT

DEC_D0
DEC_D1
DEC_D2
DEC_D3
DEC_D4
DEC_D5
DEC_D6

DEC_D7
DEC_CLK
PASS_THRU#

5

U4B

VDD1

VDD2

VDD3

VDD4

1

D1_A0

2

D1_A1

3

D1_A2

4

D1_A3

7

D1_A4

8

D1_A5

9

D1_A6

10

D1_A7

13

LLC_A

14

PXQ_A

12

HS_A

11

VS_A

145

D1_B0

146

D1_B1

147

D1_B2

148

D1_B3

151

D1_B4

152

D1_B5

153

D1_B6

154

D1_B7

157

LLC_B

160

PXQ_B

159

HS_B

158

VS_B

135

ACLK

123

BCLK1

132

BCLK2

121

WS0

124

WS1

126

WS2

130

WS3

133

WS4

122

SD0

125

SD1

127

SD2

131

SD3

134

SD4

VCC3_7146

U17

2010

2

D0

3

D1

VCCGND

4

D2

5

D3

6

D4

7

D5

8

D6

9

D7

11

CLK

1

OE

VDD5

SAA7146AH / V4

VSS1

VSS2

VSS3

616233036485465717781879197103

C165

0.01UF

ENC_Q0

19

Q0

ENC_Q1

18

Q1

ENC_Q2

17

Q2

ENC_Q3

16

Q3

ENC_Q4

15

Q4

ENC_Q5

14

Q5

ENC_Q6

13

Q6

ENC_Q7

12

Q7

SN74LVC574APWR

C133

C134

0.1UF

0.1UF

4.7uF

VDD6

VSS4

VDD7

VSS5

VDD8

VSS6

+

VDD9

VDD10

VDD11

VSS7

VSS8

VSS9

ENC_Q[7:0]

C135

0.1UF

VCC3_7146

C144

102

109

115

128

138

149

155

139

VDD12

VDD13

VDD14

VDD15

VDD16

VDD17

VDD18

VDD19

VDD20

VDDI2C

111

XAD0

112

XAD1

113

XAD2

114

XAD3

117

XAD4

118

XAD5

119

XAD6

120

XAD7

101

XAD8

100

XAD9

99

XAD10

98

XAD11

95

XAD12

94

XAD13

93

XAD14

92

XAD15

104

RWN_SBHE

105

AS_ALE

106

LDS_RDN

107

UDS_WRN

108

DTACK_RDY

144

GPIO0

143

GPIO1

142

GPIO2

141

GPIO3

21

TDI

20

TDO

19

TCLK

18

TMS

17

TRST#

137

SDA

136

SCL

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

110

116

129

140

150

156

ENC_Q[7:0]

R101220

VCC3_7146

C138

0.01UF

C139

0.01UF

4

C137

C136

0.01UF

0.1UF

One 4.7uF Electrolytic Capacitor should be placed for

+

C145

five SAA7146 VDD pins.

4.7uF

VCC3_7146

R682.2K

EPLD_CONTROL
PASS_THRU#

R151 0
R152 0

R69220

R27220

R102220

R109220

C140

0.01UF

PCI_5V

pad connected to tab of 3.3v regulator is a heat sink it should
be as large as possible (min 0.5 inch) and have pads on both
outside layers it should have no thermal relief on feedthroughs
to the 3.3v plane

+

C120

ON RESET

GPIO0 - Undefined I/O

VCC3_7146

8
7
6
5

GPIO1- Undefined I/O
GPIO2- Undefined I/O
GPIO3 - Undefined I/O

ENC_RST#
DEC_RST#

VCC3_7146

R704.7K

R714.7K

R75

4.7K

SCL
SDA

R76

0

SDA
SCL

3

R6710K

R3210K

R14810K

NS

C2080.1uF

C2090.1uF

NS

SDA
SCL

C143

0.1uF

U10

1

A0

VCC

2

A1

WP

3

A2

SCL

4

VSS

SDA

24WC04

C141

0.01UF

22uF

pad connected to tab of 3.3v regulator is a heat sink it should
be as large as possible (min 0.4 inch) and have pads on both
outside layers it should have no thermal relief on feedthroughs
to the 3.3v plane

C125

+

22uF

pad connected to tab of 3.3v regulator is a heat sink it should
be as large as possible (min 0.4 inch)and have pads on both
outside layers it should have no thermal relief on feedthroughs
to the 3.3v plane

+

C129
22uF

PORTB_PXQ
PORTB_HS
PORTB_VS
FIFO_WEN#
FIFO_REN#
FIFO_WRST#
FIFO_RRST#
FIFO_OEN#

ENC_HS
ENC_VS
MUTE_CNTRL#

EPLD_CONTROL
PASS_THRU#
EPLD_CLK

U7

3 2

VIN VOUT

4

PAD

C122

0.1uF

GND

LM1117MT-3.3

1

P = 0.9W max

U8

3 2

VIN VOUT

4

PAD

GND

LM1117DTX-3.3

0.1uF

1

P = 0.7W max

U9

3 2

VIN VOUT

4

PAD

C131

0.1uF

GND

LM1117DTX-3.3

1

P = 0.7W max

17419

U18A

R178 33
R179 33

R180 33

R182 33

22

IO17

23

VCCINT1

VCCINT2

IO18

25

IO19

27

IO21

28

IO22

31

IO23

33

IO25

34

IO26

35

IO27

42

IO28

43

IO29

44

IO30

21

IO16

39

INPUT / GCLRn

38

INPUT / OE1

37

INPUT / GCLK1

GNDIO1

GNDIO2

GNDIO3

411243016

VCC3_7146

C211

0.01UF

One decoupling cap shoul be placed on each VCC pin
of the EPLD

C212

0.01UF

C213

0.01UF

2

~500mA max

C123

0.001uF

~400mA max

C126
22uF

~400mA max

C130
22uF

VCC3_7146

29

VCCIO1

VCCIO2

GNDIO4

GNDINT1

GNDINT2

36

+

C121
22uF

+

+

EPM3064ATC44-4

C214

0.01UF

C215

0.01UF

VCC3A

C124

0.1uF

VCC3_7146

C128

0.1uF

VCC3

C132

0.1uF

UDA1342 40mA
EEPROM 10mA
SAA7115 170mA
SAA7121 100mA
TSB43AB22 100mA

SAA7146 400mA

PCI2050A 400mA

FIFO_WEN#
FIFO_REN#
FIFO_WRST#
FIFO_RRST#
FIFO_OEN#

ENC_HS
ENC_VS

EPLD_CLK

MUTE_CNTRL#

PCI_5V

VCC3

VCC3A

Client

Product Name

Atlantis

Size Client Document Number Rev

C

Date:

1

FIFO_WEN#
FIFO_REN#
FIFO_WRST#
FIFO_RRST#
FIFO_OEN#

ENC_HS
ENC_VS

EPLD_CLK

MUTE_CNTRL#

PCI_5V

VCC3

VCC3A

Emuzed Inc.

Sheet Name

SAA 7146 Multimedia

68Friday, August 30, 2002

Sheet

of

0.14

5

D D

4

3

2

1

R74220

231711

TDI

TDO

TRST

VDDA0

VDDA1

VSSA0

VSSA1

VSSA2

AGND

2415921265076

DEC_3.3V

FB11

L2

10uH

DEC_VDD

12551

75

334358688393872717069676665647778

VDDI1

VDDI2

VDDI3

VDDI4

VDDI5

VDDA2

VDDDE1

VDDDE2

VDDDE3

VDDI6

VDDDE4

SAA7115H

VSSDE1

VSSDE2

VSSDE3

VSSDE4

VSSX

VSSDI3

VSSDI2

VSSDI1

LLC

LLC2

10058863382829303635344473

RESON

R10533

LLC

VDDX

RTCO

DEC_D[7:0]

HPD0

RTS1

HPD1

HPD2

RTS0

HPD3

HPD4

HPD5

TEST0

TEST1

TEST2

74

DEC_D[7:0]

SCL
SDA

79

313222

SCL

SDA

XRV

XRDY

IPD7
IPD6
IPD5
IPD4
IPD3
IPD2
IPD1
IPD0

ITRDY

ICLK

IDQ

ITRI
IGP0
IGP1
IGPV
IGPH

AMCLK

ASCLK
ALRCLK
AMXCLK

XDQ

XCLK

XTRI

XTOUT

R103 33
R104 33

R106 33
R107 33

54
55
56
57
59
60
61
62

42
45

46
47
48
49
52
53

37
39
40
41

CLK_VDD

CLK_VDD

CLK_VDD

NS

R10833

33

Selection of

32.11Mhz
clock.

NS

R139 0

R140 0

LLC

NS

R143 0

R144 0

LLC

NS

R146 0

R147 0

LLC

R185 0

R90

AMCLK

R9133

ABCLK

R9233

ALRCLK

DEC_3.3V

R934.7K

DEC_3.3V

R94

4.7K

DEC_CLK
DEC_PXQ

DEC_VS
DEC_HS

RTCO

CLK_VDD

147

U16A

1
2

147

U16B

4
5

U16C

9

10

U16D

12
13

Client

Product Name

Atlantis

Size Client Document Number Rev

C

Date:

SN74LVC86A

SN74LVC86A

147

SN74LVC86A

147

SN74LVC86A

3

6

8

11

R141 33

R142 33

R145 33

R186 33

1

Emuzed Inc.

Sheet Name

Video Decoder

Sheet

FIFO_CLK

EPLD_CLK

78Friday, August 30, 2002

ENC_CLK

PORTB_CLK

of

0.14

HPD6

HPD7

DEC_D7

AOUT

TEST3

TEST4

TEST5

XPD0

XPD1

XPD2

XPD3

XPD4

XPD5

XPD6

XPD7

81

DEC_D5

DEC_D6

DEC_D4

DEC_D3

DEC_D2

DEC_D1

90898786858482

DEC_D0

XRH

9291969594804

2

DEC_AVDD

C146

C147

COMP

X2

DEC_RST#

0.1uF

C163
33pF

C148

R84220

R83220

R85220

0.1uF

98999732

U11

TCK

20
18
19

16
14
12
10
13

TMS

AI11
AI12
AI1D

AI21
AI22
AI23
AI24
AI2D

7

XTALI

6

XTALO

CE

27

+

C149

0.1uF

JP1A

16

Shield

17

Shield

CGND

C C

B B

BOB

COMP IN

COMP IN GND

S-VID LUM

S-VID CHRO

S-VID GND

15
14

5

AVGND
4
10

AVGND

AVGND

C150
47pF

C157
47pF

C156
47pF

AVGNDAVGND

AVGND

AVGND

DEC_AVDD

R161 0
R162 0
R163 0

R164 0
R165 0
R166 0

C161

0.01uF

R79 18

R80 18

U12

8

I/O_1

ref-

7

I/O_2

I/O_6

6

I/O_3

ref+

I/O_4I/O_5

DALC112S1

R78

R81

56.2

1
2
3
45

22uF

R77

56.2

S_LUMA

S_CHROMA

C15147nF

C153
47nF

C155
47nF

C158 47nF
C159 47nF
C160 47nF

32.11MHZ

C162
33pF

18

C152

47nF

C154

47nF

R82

56.2

S_LUMA
S_CHROMA
COMP

X2 is
fundamental
mode

I2C Address Selection:
RTCO=0 slave address 42H/43H -Defa u l t
RTCO=1 slave address 40H/41 H
RTCO read during power up on l y

IIC Address: 0x42, 0x43

DEC_VDD

C168

0.1uF

A A

DEC_3.3V

5

C170

C169

0.1uF

0.1uF

4

VCC3A

C171

0.1uF

C172

0.1uF

C173

0.1uF

CLK_VDD

C206

0.01uF

C174

0.1uF

C207

0.1uF

C175

0.1uF

FB16

FB-1.5A

C176

0.1uF

DEC_3.3V

C177

0.1uF

FB-1.5A

C178

+

22uF

3

5

D D

ENC_3.3V

FB13

ENC_D7
ENC_D6
ENC_D5
ENC_D4
ENC_D3
ENC_D2
ENC_D1
ENC_D0

ENC_CLK
ENC_RST#

ENC_3.3V

R123
R124

FB-1.5A

R114 0
R115 0
R116 0
R117 0
R118 0
R119 0
R120 0
R121 0

R125
R126

C182
22uF

ENC_Q7
ENC_Q6
ENC_Q5
ENC_Q4
ENC_Q3
ENC_Q2
ENC_Q1
ENC_Q0

4.7K

RCV1
RCV2

4.7K

100

100

C C

IIC Address:

ENC_D[7:0]

B B

ENC_CLK

ENC_RST#

ENC_VS
ENC_HS

SDA

SCL

RTCO

ENC_D[7:0]

0x88, 0x89

ENC_HS

NS ( No Stuff)

ENC_VDD

C203

0.1uF

ENC_D[7:0] ENC_Q[7:0]

FIFO_WEN#
FIFO_CLK

FIFO_WRST#

A A

FIFO_CLK

ENC_D1
ENC_D2
ENC_D3
ENC_D4
ENC_D5
ENC_D6
ENC_D7

215

U15

2

D0

1

D1

32

D2

31

D3

30

D4

29

D5

28

D6

27

D7

26

D8

23

WCLK

4

WRST#

3

NC1

8

NC2

10

NC3

11

NC4

12

Q0

13

Q1

VCCGND

14

Q2

15

Q3

16

Q4

17

Q5

18

Q6

19

Q7

20

Q8

624

REN#WEN#

7

RCLK

22

RRST#

9

OE#

25

RST#

+

ENC_Q0ENC_D0
ENC_Q1
ENC_Q2
ENC_Q3
ENC_Q4
ENC_Q5
ENC_Q6
ENC_Q7

FIFO_CLK

R133 0

ENC_VDD

C183

0.1uF

42
41
21

19

9
10
11
12
13
14
15
16

4
40
44

43

7

8

2

3

C184

0.1uF

U13

SDA
SCL
SA

RTCI
MP7

MP6
MP5
MP4
MP3
MP2
MP1
MP0

LLC
RESET
TTX

TTXRQ
RCV1

RCV2
SP

AP

ENC_RST#

4

L4 10uH

C185

0.1uF

61739

252831

VDDA1

VDDA2

VDDA3

VDDD1

VDDD2

VDDD3

SAA7121H /V2

VSSA1

VSSA2

VSSD1

VSSD2

VSSD3

51838

32

33

ENC_Q[7:0]

FIFO_REN#
FIFO_RRST#

FIFO_OEN#

ENC_AVDD

C186

+

C188

C189

C187

0.1uF

0.1uF

0.1uF

22uF

36

VDDA4

30

CVBS

27

Y

24

C

1

N/C

20

N/C

22

N/C

23

N/C

26

N/C

29

N/C

37

XCLK

34

XTALO

35

XTALI

NOTE :Hsync generated by
SAA7121 has to be active
low for FIFO operation

C190

0.1uF

5Mhz Filters

R1124.7

R11310

R12210

U14

1

ref-

I/O_1

2

I/O_6

I/O_2

3

I/O_3

ref+

4 5

I/O_4 I/O_5

DALC112S1

NS ( No Stuff)

3

120pF

390pF

120pF

390pF

120pF

390pF

8
7
6

C191

C195

C200

L5 2.7uH

L7 2.7uH

L9 2.7uH

ENC_AVDD

C181

C194

C197

C2020.01uF

L6 2.7uH

C192

560pF

L8 2.7uH

C196

560pF

L10 2.7uH

C201

560pF

R167 0
R168 0
R169 0

R170 0
R171 0
R172 0

LUMA_OUT

AVGND AVGND

AVGND should be a ground
plane

ENC_3.3V

CVBS_OUT

47pF

AVGND

CHROMA_OUT

C198

2

C193

C199
47pF

VCC3A

47pF

AVGND

AVGND

1

COMP OUT

6

S-VID LUM

7

S-VID CHRO

2

GND

JP1B

BOB

1

AL4V93 A-10-P F

Client

Product Name

Atlantis

Size Client Document Number Rev

C

5

4

3

2

Date:

Emuzed Inc.

Sheet Name

Sheet

1

Video Encoder

of

88Friday, August 30, 2002

0.14