MSI MS-7B01 Schematics

5

CONTENT SHEET

Cover Sheet & Block Diagram
CPU-CLK/CTL/MISC/DMI/AUDIO/DSP/MEM

4

1-2
3-4

DMS-SA30

Intel Skylake-S

3

2

1

Rev.10

CPU-Power/GND/XDP

D D

DDRIV-DIMMA1/DIMMB1
PCH-USB/PCIE/DMI/SATA
PCH-Audio/Display/Clock
PCH-GPIO/USBOC#/SATAGP
PCH-LPC/SPI/SMBUS/MISC
PCH-POWER/GND/Strap/SPKR
HDMI to LVDS (TSUMU58BDC2-1)

C C

LVDS Output & EDID Switch & USB2.0*2
OSD & LED & SPK & GL850G - USB2.0 HUB
VGA(CH7517A) & DP Connector
LAN I219 (LM/V) & USB3.0
Audio Codec ALC898 & Amplifier TPA2008D2
M_PCI-E & LPC-TPM & JTPM/JLPC & USB2.0*1
SIO-NCT6106D
COM & USB3.0 & Exp BD

B B

+24V Boost & +5VSB & Power USB(USB2.0*1)
Cash Drawer
+19VA / +12VSB / +12V / +3VA
System Power +5VSUS/+3VSUS/+5V/+3V
IMVP8-ISL95855(VCCP/VGT/VSA)
VCCP & VCCGT
VCCSA & VCCIO
DDR4 Power

A A

PCH Power - PCH_1VSB
Manual Parts
PWR Map & Design change list

5

5-6
7-8
9
10
11
12
13-14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34-35

4

CPU:

Intel SKL-S CPU (LGA1151)
Max. TDP: 35W

System Chipset:

Intel 100 series
Q170/H110

Main Memory:

DDR4-1866/2133 SO-DIMM x2 (1DPC, Max:32GB)

On Board Chip:

HDMI to LVDS - TSUMU58DC2-1
eDP to VGA - CH7517A
Super I/O - NCT6106D
Audio - Realtek HD Audio Codec ALC898 + Amplifier TPA2008D2
LAN - Intel Jacksonville i219LM(Q170) / V(H110)
BIOS - SPI Flash ROM 128MB(Q170) / 64MB(H110)
TPM 2.0/1.2 - SLB9665/9660 (For Q170 SKU)
GL850G - USB2.0 HUB (For H110 SKU)

VRM Controller:

IMVP8-ISL95855(VCCP/VCCGT/VCCSA)
ISL8016(VCCIO)
NCP1589L(VCC_DDR) + UP1727(VPP_DDR)
NCP1589L(PCH_1VSB)
NCP1589A(+12VSB)
TPS40210DGQ(+24VSB)
TPS51125RGER(SYS_PWR)

Expansion Slots:

SATA Riser Connector (2* SATA ports)
Mini-PCIE *2
Expension Board (RS232*2, USB*1 ...)

Others :

Cash Drawer
Power USB

3

How to distinguish different Sku

BLUE Color for all models

一

一

Orange Color for Q170 SKU

Purple Color for H110 SKU

一

Title

Title

Title

Cover page

Cover page

Cover page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

1 35Friday, March 31, 2017

1 35Friday, March 31, 2017

1

1 35Friday, March 31, 2017

10

5

4

3

2

1

Block Diagram

D D

VGA Conn.

LVDS Conn.
LVDS/BKL/USB2.0*2

USB2.0
#5 & #6

PCH
USB2.0

C C

OSD Conn.

USB2.0 HUB
GL850G

DP to VGA
CH7517A

HDMI to LVDS
TSUMU58BDC2

DP Conn.

USB2.0 #10

RJ45-LAN with
USB3.0 #1#2
USB2.0 #1#2

DP (DDPB)

TMDS (DDPC)

DP (DDPD)

Rear
USB3.0&2.0

INTEL

SKL-S LGA1151
35W

DMI [X4]

INTEL

RJ45-RS232 with
USB3.0 #3#4
USB2.0 #3#4

PWR_USB

EXP Conn.

GPIO
COM3

B B

DSUB Conn.

RJ45 Conn.

COM1

COM2

COM4

SIO
NCT6106D

TPM 2.0/1.2

USB2.0 #7

USB2.0 #8

CDW_GPIO

Rear
USB3.0&2.0

USB2.0

USB2.0

LPC

100 Series
H110/Q170

IMVP8
ISL95855
VCCP+VCCGT+SA

DDR4_CHA - 2133

DDR4_CHA - 2133

PCI-E[X1] #4 RJ45 Conn.

PCI-E[X1] #5

PCI-E[X1] #6
USB2.0 #9

SATA # 0&1

HD Audio I/F

GPIO

SPI I/F

DDR4 SO-DIMM_A1

DDR4 SO-DIMM_B1

Intel LAN
I219LM/V

Mini PCIE1
Full Size

Mini PCIE2
Standard

PCI-E[X1]
Riser Conn.

Audio
ALC898/892

Amplifier
TPA2008D2

Cash Drawer

SPI ROM

DC19V
Adapter

SATA Port0
SATA Port1

Line Out
Mic In

RJ11 Conn.

Speaker R/L
2W

A A

Title

Title

Title

Block Diagram

Block Diagram

Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

2 35Friday, March 31, 2017

2 35Friday, March 31, 2017

1

2 35Friday, March 31, 2017

10

5

Vinafix.com

CPU-CTL/MISC/CFG/Audio/DSP

VCCST

R537 X_100R1%4
R541 100R1%4

D D

C C

H_PROCHOT#
PDG: 500ohm
CRB Rev.11: 75ohm

R548 56.2R1%4
R533 75R1%4
R176 1K/4
R178 X_49.9K1%4

VCCIO

R817 1K/4

Pocessor Strapping
CFG[0] ITP will drive the net to GND.
CFG[2] Reserved. No connect
CFG[4] Display Port Presence strap
=1:Disabled - No Physical Display Port attached to
Embedded DisplayPort*.No connect for disable.
=0:Enabled - An external Display Port device is
connected to the Embedded Display Port.
CFG[5,6] (1, 1) PCIE 16X
CFG[19:5] Reserved configuration lands.
A test point be placed on the board for these lands.

CRB1.0 Note
PD CFG9 FOR HASWELL INTERPOSER
PD CFG12 FOR HASWELL INTERPOSER
PD CFG13 FOR LPT-H INTERPOSER

H_VIDSCLK
H_VIDSOUT
H_VIDALERT#

H_PROCHOT#
THERMTRIP_N

CATERR#

CPU_PM_DOWN_R < 200 mil

PROC_SELECT#

VCCST Power Good

VCCST_PWRGD(28)

R128 6.04K1%4
R142 2.8K1%4

PCH_CPU_NSSC_CLK_DP(10)
PCH_CPU_NSSC_CLK_DN(10)

SIO

R1 81 X_1K/4
R1 79 X_1K/4
R1 92 X_1K/4
R2 43 X_1K/4
R2 51 1K/4
R2 21 X_1K/4
R2 95 X_1K/4
R2 98 X_1K/4
R2 11 X_1K/4
R1 87 X_1K/4
R1 97 X_1K/4
R2 64 X_1K/4
R2 76 X_1K/4
R2 57 X_1K/4
R2 93 X_1K/4
R2 88 X_1K/4

VCCST_PWRGD_CPU

4

PCH_CPU_BCLK_DP(10 )
PCH_CPU_BCLK_DN(10)

PCH_CPU_PCIE_DP(10 )
PCH_CPU_PCIE_DN(10)

CPU_VIDCLK
CPU_VIDSOUT
CPU_VIDALERT#
CPU_P ROCHOT#

VCCST_PWRGD_CPU

CPU_PM_DOWN_R
THERMTRIP_N

DDR_VTT_CTRL

TP61

PROC_SELECT#

CATERR#

H_ CFG 0
H_CFG1
H_CFG2
H_CFG3
H_CFG4
H_CFG5
H_CFG6
H_CFG7
H_CFG8
H_ CFG 9
H_CFG10
H_CFG11
H_CFG12
H_CFG13
H_CFG14
H_CFG15

XDP_PCUSTB0P

TP27

XDP_PCUSTB0N

TP29

XDP_PCUSTB1P

TP32

XDP_PCUSTB1N

TP34

CFG_COMP

CFG_COMP 12/15mil
Place inside CPU cavity

H_PECI(22)

R536 0R/4
R540 0R/4
R547 220R1%4
R532 100R1%4

R407 X_0R/4

R227 20R1%4
R175 0R/4

H_ CFG 0(6)

R781 49.9R1%4

H_VIDSCLK(28 )
H_VIDSOUT(28 )
H_VIDALERT#(28)
H_PROCHOT#(28 )

CPU_PWRGD(12 )

CPURST#(6,12)

PCH_PECI(12)

CPU_PM_SYNC(12)
CPU_PM_DOWN(12)

H_THERMTRIP#(12)

PROC_SELECT#(30)

CPU_SKTOCC#(11)

H_ CFG 0
H_ CFG 1
H_CFG2
H_CFG3
H_CFG4
H_CFG5
H_CFG6
H_CFG7
H_CFG8
H_CFG9
H_CFG10
H_CFG11
H_CFG12
H_CFG13
H_ CFG 1 4
H_ CFG 1 5

E38
E40
E39
C39

D11

AC36
AB36
AB35

D13

H15
F15
F16
H16
F19
H18
G21
H20
G16
E16
F17
H17
G20
F20
F21
H19

F14
E14
F18
G18

M11

W5
W4

W1
W2

K9

J9

F8
U2
E7

G7
E8
D8

CPU1E

LGA1151

ZIF-SOCKET1151

BCLKP
BCLKN

PCI_BCLKP
PCI_BCLKN

CLK24P
CLK24N

VIDSCK
VIDSOUT
VIDALERT#
PROCHOT#

PROCPWRGD
VCCST_PWRGD
RESET#

PECI
PM_SYNC
PM_DOWN
THERMT RIP #

DDR_VTT _CNTL
PROC_SELECT#
SKTO CC#
CATERR#

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[17]
CFG[16]
CFG[19]
CFG[18]

CFG_RCOMP

3

SKYLAKE-S

VCC_SENSE
VSS_SENSE

VCCGT_SENSE
VSSGT_SENSE

VCCGTX_SENSE
VSSGTX_SENSE

VCCSA_SENSE

VCCIO_SENSE

VSS_SAIO_SENSE

VCCOPC_SENSE

VCCEOPIO_SENSE

VSSOPC_EOPIO_SENSE

PROC_TDO

PROC_TDI
PROC_TMS
PROC_TCK

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

PROC_AUDIO_ CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

PROC_TRST#
PROC_PREQ#
PROC_PRDY#

PROC_TRIGIN

PROC_TRIGOUT

ZVM#

2

VCORE_VCC_SEN

C38

VCORE_VSS_SEN

D38

VCCGT_VCC_SEN

F39

VCCGT_VSS_SEN

F38

VCCGTX_SENSE

F37
F36

VCCSA_SEN_P

AD5

VCCIO_SEN

AF4

VCCSA_SEN_N

AE4

VCCOPC_SEN

AK21

VCCEOPIO_SEN

AJ24
AK22

H13
G12
F13
F11

XDP_MBP0

D16

XDP_MBP1

D17
G14
H14

PCH_CPU_AUD_SCLK

V3

PCH_CPU_AUD_SDO

V2

PCH_CPU_AUD_SDI_R

U1

H_TRST# H_TRST#

F12

H_PREQ#

B9

H_PRDY#

B10

CPU_INPUT_TRIGGER

D1

CPU_OUTPUT_TRIGGER_R

B3

ZV M # _ R

AC38

VCORE_VCC_SEN (28)
VCORE_VSS_SEN (28)

VCCGT_VCC_SEN (28)
VCCGT_VSS_SEN (28 )

TP44

VCCSA_SEN_P (28)
VCCIO_SEN (30)
VCCSA_SEN_N (28)

TP35
TP36

H_ TD O (6)
H_ TD I (6)
H_TMS (6)
H_TCK (6)

TP30
TP31

R1 41 20R1%4

RVP8 Rev1.1stuff 20R

H_TRST# (6)

TP20
TP22

R2 38 20R1%4

TP48

PCH_CPU_AUD_SCLK (10)
PCH_CPU_AUD_SDO (10)

PCH_CPU_AUD_SDI (10)

CPU_INPUT_TRIGGER (12)
CPU_OUTPUT_TRIGGER (12)

VCORE_VCC_SEN
VCORE_VSS_SEN

VCCGT_VCC_SEN
VCCGT_VSS_SEN

VCCSA_SEN_P
VCCSA_SEN_N

H_PREQ#

R277 100R1%4
R286 100R1%4

R252 100R1%4
R246 100R1%4

R248 100R1%4
R752 100R1%4

R232 X_51R/4
R177 X_51R/4

1

VCCP

VCCGT

VCCSA

VCCST

CPU1C

PEG_RXP[0]
PEG_RXN[0]
PEG_RXP[1]
PEG_RXN[1]
PEG_RXP[2]
PEG_RXN[2]
PEG_RXP[3]
PEG_RXN[3]
PEG_RXP[4]
PEG_RXN[4]
PEG_RXP[5]
PEG_RXN[5]
PEG_RXP[6]
PEG_RXN[6]
PEG_RXP[7]
PEG_RXN[7]
PEG_RXP[8]
PEG_RXN[8]
PEG_RXP[9]
PEG_RXN[9]
PEG_RXP[10]
PEG_RXN[10]
PEG_RXP[11]
PEG_RXN[11]
PEG_RXP[12]
PEG_RXN[12]
PEG_RXP[13]
PEG_RXN[13]
PEG_RXP[14]
PEG_RXN[14]
PEG_RXP[15]
PEG_RXN[15]

DMI_RXP[0]
DMI_RXN[0]
DMI_RXP[1]
DMI_RXN[1]
DMI_RXP[2]
DMI_RXN[2]
DMI_RXP[3]
DMI_RXN[3]

PEG_RCOMP

LGA1151

ZIF-SOCKET1151

SKYLAKE-S

PEG_TXP[0]
PEG_TXN[0]
PEG_TXP[1]
PEG_TXN[1]
PEG_TXP[2]
PEG_TXN[2]
PEG_TXP[3]
PEG_TXN[3]
PEG_TXP[4]
PEG_TXN[4]
PEG_TXP[5]
PEG_TXN[5]
PEG_TXP[6]
PEG_TXN[6]
PEG_TXP[7]
PEG_TXN[7]
PEG_TXP[8]
PEG_TXN[8]
PEG_TXP[9]

PEG_TXN[9]
PEG_TXP[10]
PEG_TXN[10]
PEG_TXP[11]
PEG_TXN[11]
PEG_TXP[12]
PEG_TXN[12]
PEG_TXP[13]
PEG_TXN[13]
PEG_TXP[14]
PEG_TXN[14]
PEG_TXP[15]
PEG_TXN[15]

DMI_TXP[0]
DMI_TXN[0]
DMI_TXP[1]
DMI_TXN[1]
DMI_TXP[2]
DMI_TXN[2]
DMI_TXP[3]
DMI_TXN[3]

A5
A6
B4
B5
C3
C4
D2
D3
E1
E2
F2
F3
G1
G2
H2
H3
J1
J2
K2
K3
L1
L2
M2
M3
N1
N2
P2
P3
R2
R1
T2
T3

AC2
AC1
AD3
AD2
AE2
AE1
AF2
AF3

DMI_TXP0 (9)
DMI_TXN0 (9)
DMI_TXP1 (9)
DMI_TXN1 (9)
DMI_TXP2 (9)
DMI_TXN2 (9)
DMI_TXP3 (9)
DMI_TXN3 (9)

VCCIO

4

EDP_COMP

R782 24.9R1%4

EDP_COMP <600MIL
12/20/25mil

B8
B7
C7
C6
D6
D5

PEG_COMP

AA4
AA5
AB4
AB3
AC4
AC5

E5
E4
F6

F5
G5
G4
H6
H5

J5

J4
K6
K5

L5

L4
M6
M5
N5
N4
P6
P5
R5
R4
T6
T5
U5
U4

Y3
Y4

L7

5

B B

DMI_RXP0(9)

A A

DMI_RXN0( 9)
DMI_RXP1(9)
DMI_RXN1( 9)
DMI_RXP2(9)
DMI_RXN2( 9)
DMI_RXP3(9)
DMI_RXN3( 9)

VCCIO

R786 24.9R1%4

PEG_COMP <400mil
12/15/15mil

MEC1
MEC2
MEC3
MEC4
MEC5
MEC6
MEC7

E10
D10

G10
H10

D12
E12

D14

D9
C9

F9

G9

M9

CPU1D

EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXP[2]
EDP_TXN[2]
EDP_TXP[3]
EDP_TXN[3]

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL
EDP_RCOM P

MEC1
MEC2
MEC3
MEC4
MEC5
MEC6
MEC7

LGA1151

ZIF-SOCKET1151

SKYLAKE-S

DDI1_TXP[0]
DDI1_TXN[0]
DDI1_TXP[1]
DDI1_TXN[1]
DDI1_TXP[2]
DDI1_TXN[2]
DDI1_TXP[3]
DDI1_TXN[3]

DDI2_TXP[0]
DDI2_TXN[0]
DDI2_TXP[1]
DDI2_TXN[1]
DDI2_TXP[2]
DDI2_TXN[2]
DDI2_TXP[3]
DDI2_TXN[3]

DDI3_TXP[0]
DDI3_TXN[0]
DDI3_TXP[1]
DDI3_TXN[1]
DDI3_TXP[2]
DDI3_TXN[2]
DDI3_TXP[3]
DDI3_TXN[3]

3

DDI1_AUXP
DDI1_AUXN

DDI2_AUXP
DDI2_AUXN

DDI3_AUXP
DDI3_AUXN

Port B: DP to VGA

C21

VGA_DDPB_TXP0 (18)

D21

VGA_DDPB_TXN0 (18)

D22

VGA_DDPB_TXP1 (18)

E22

VGA_DDPB_TXN1 (18)

B23
A23
C23
D23

B13
C13

B18
A18
D18
E18
C19
D19
D20
E20

A12
B12

B14
A14
C15
B15
B16
A16
C17
B17

B11
C11

VGA_DDPB_AUXP (18)

VGA_DDPB_AUXN (18)

Port C: HDMI to Scalar

HDMI_DDPC_AUXP
HDMI_DDPC_AUXN

Port D: DP connector

HDMI_DDPC_TXP2 (15)
HDMI_DDPC_TXN2 ( 15)
HDMI_DDPC_TXP1 (15)
HDMI_DDPC_TXN1 ( 15)
HDMI_DDPC_TXP0 (15)
HDMI_DDPC_TXN0 ( 15)
HDMI_DDPC_CLKP (15)
HDMI_DDPC_CLKN (15)

DSP_DDPD_TXP0 (18)
DSP_DDPD_TXN0 (18)
DSP_DDPD_TXP1 (18)
DSP_DDPD_TXN1 (18)
DSP_DDPD_TXP2 (18)
DSP_DDPD_TXN2 (18)
DSP_DDPD_TXP3 (18)
DSP_DDPD_TXN3 (18)

DSP_DDPD_AUXP (18 )

DSP_DDPD_AUXN (18)

TP26
TP25

TP52
TP53

CPU_L12

CPU_K12
TP_CPU_AU39
TP_CPU_AU40

PCH_AB11(14)
PCH_AB10(14)

R785 X_0R/4
R787 X_0R/4

2

CPU1F

SKYLAKE-S

H8

VSS-372

K10

RSVD-2

L10

RSVD-3

J17

RSVD-4

B39

RSVD-5

J19

RSVD-6

C40

RSVD-7

L12

RSVD-8

K12

RSVD-9

AU39

RSVD-10

AU40

RSVD-11

J15

RSVD-12

J14

RSVD-13

AU9

RSVD-14

AU10

RSVD-15

J13

RSVD-16

K11

RSVD-17

D15

RSVD-18

J11

RSVD-19

LGA1151

ZIF-SOCKET1151

Ti t l e

Ti t l e

Ti t l e

CPU-CTL/MISC/CFG/Audio/DSP

CPU-CTL/MISC/CFG/Audio/DSP

CPU-CTL/MISC/CFG/Audio/DSP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

RSVD-20

VSS-373
VSS-374
RSVD-23

RSVD_TP-1
RSVD_TP-2
RSVD_TP-3
RSVD_TP-4
RSVD_TP-5
RSVD_TP-6
RSVD_TP-7
RSVD_TP-8
RSVD_TP-9

RSVD_TP-10

DMS-SA30

DMS-SA30

DMS-SA30

1

AC37

G8
AY3
K13

J8
J7
L8
K8
AV1
AW2
H11
H12
AW38
AV39

TP_CPU_K13

TP_CPU_J8
TP_CPU_J7
TP_CPU_L8
TP_CPU_K8
TP_CPU_AV1
TP_CPU_AW2
TP_CPU_H11
TP_CPU_H12
TP_CPU_AW38
TP_CPU_AV39

3 35Friday, March 31, 2017

3 35Friday, March 31, 2017

3 35Friday, March 31, 2017

R183
X_560R/4

CRB

TP21
TP18
TP24
TP19
TP17
TP16
TP23
TP28
TP46
TP51

10

10

10

CPU-Memory

5

4

3

2

1

MEM_MA_ADD[16..0](7)

D D

MEM_MA_ACT#(7)

C C

MEM_MA_CLK_H0(7)
MEM_MA_CLK_L0(7)
MEM_MA_CLK_H1(7)
MEM_MA_CLK_L1(7)

B B

MEM_MA_ALERT#(7)

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_ADD16

MEM_MA_BG1(7)

MEM_MA_CKE0(7)
MEM_MA_CKE1(7)

MEM_MA_CS_L0(7)
MEM_MA_CS_L1(7)

MEM_MA_ODT0(7)
MEM_MA_ODT1(7)

MEM_MA_BA0(7)
MEM_MA_BA1(7)
MEM_MA_BG0(7)

MEM_MA_PAR(7)

CPU_CA_VREF_A CPU_DQ_VREF_B

CPU_VREF_DQ_A

TP59

CPU1A

AW15

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]

AU18

DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]

AU17

DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

AV19

DDR0_MA[3]

AT19

DDR0_MA[4]

AU20

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]

AV20

DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]

AU21

DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

AT20

DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]

AT22

DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]

AY14

DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]

AU22

DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

AV22

DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]

AV12

DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

AV14

DDR0_MA[14]/DDR0_CAB[2]/DDR0_WE#

AY11

DDR0_MA[15]/DDR0_CAB[1]/DDR0_CAS#

AW13

DDR0_MA[16]/DDR0_CAB[3]/DDR0_RAS#

AV23

DDR0_BG[1]/DDR0_CAA[9]/DDR0_MA[14]

AU24

DDR0_ACT#/DDR0_CAA[8]/DDR0_MA[15]

AY24

DDR0_CKE[0]

AW24

DDR0_CKE[1]

AV24

DDR0_CKE[2]

AV25

DDR0_CKE[3]

AW12

DDR0_CS#[0]

AU11

DDR0_CS#[1]

AV13

DDR0_CS#[2]

AV10

DDR0_CS#[3]

AW11

DDR0_ODT[0]

AU14

DDR0_ODT[1]

AU12

DDR0_ODT[2]

AY10

DDR0_ODT[3]

AY13

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]

AV15

DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]

AW23

DDR0_BG[0]/DDR0_CAA[5]/DDR0_BA[2]

AW18

DDR0_CKP[0]

AV18

DDR0_CKN[0]

AW17

DDR0_CKP[1]

AY17

DDR0_CKN[1]

AW16

DDR0_CKP[2]

AV16

DDR0_CKN[2]

AT16

DDR0_CKP[3]

AU16

DDR0_CKN[3]

AY15

DDR0_PAR

AT23

DDR0_ALERT#

AU33

DDR0_ECC[0]

AT33

DDR0_ECC[1]

AW33

DDR0_ECC[2]

AV31

DDR0_ECC[3]

AU31

DDR0_ECC[4]

AV33

DDR0_ECC[5]

AW31

DDR0_ECC[6]

AY31

DDR0_ECC[7]

AB40

DDR_VREF_CA

AC40

DDR0_VREF_DQ

LGA1151

ZIF-SOCKET1151

SKYLAKE-S

CHANNEL A

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]

DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

DDR0_DQ[32]/DDR0_DQ[16]
DDR0_DQ[33]/DDR0_DQ[17]
DDR0_DQ[34]/DDR0_DQ[18]
DDR0_DQ[35]/DDR0_DQ[19]
DDR0_DQ[36]/DDR0_DQ[20]
DDR0_DQ[37]/DDR0_DQ[21]
DDR0_DQ[38]/DDR0_DQ[22]
DDR0_DQ[39]/DDR0_DQ[23]
DDR0_DQ[40]/DDR0_DQ[24]
DDR0_DQ[41]/DDR0_DQ[25]
DDR0_DQ[42]/DDR0_DQ[26]
DDR0_DQ[43]/DDR0_DQ[27]
DDR0_DQ[44]/DDR0_DQ[28]
DDR0_DQ[45]/DDR0_DQ[29]
DDR0_DQ[46]/DDR0_DQ[30]
DDR0_DQ[47]/DDR0_DQ[31]

DDR1_DQ[0]/DDR0_DQ[32]
DDR1_DQ[1]/DDR0_DQ[33]
DDR1_DQ[2]/DDR0_DQ[34]
DDR1_DQ[3]/DDR0_DQ[35]
DDR1_DQ[4]/DDR0_DQ[36]
DDR1_DQ[5]/DDR0_DQ[37]
DDR1_DQ[6]/DDR0_DQ[38]
DDR1_DQ[7]/DDR0_DQ[39]
DDR1_DQ[8]/DDR0_DQ[40]

DDR1_DQ[9]/DDR0_DQ[41]
DDR1_DQ[10]/DDR0_DQ[42]
DDR1_DQ[11]/DDR0_DQ[43]
DDR1_DQ[12]/DDR0_DQ[44]
DDR1_DQ[13]/DDR0_DQ[45]
DDR1_DQ[14]/DDR0_DQ[46]
DDR1_DQ[15]/DDR0_DQ[47]
DDR1_DQ[32]/DDR0_DQ[48]
DDR1_DQ[33]/DDR0_DQ[49]
DDR1_DQ[34]/DDR0_DQ[50]
DDR1_DQ[35]/DDR0_DQ[51]
DDR1_DQ[36]/DDR0_DQ[52]
DDR1_DQ[37]/DDR0_DQ[53]
DDR1_DQ[38]/DDR0_DQ[54]
DDR1_DQ[39]/DDR0_DQ[55]
DDR1_DQ[40]/DDR0_DQ[56]
DDR1_DQ[41]/DDR0_DQ[57]
DDR1_DQ[42]/DDR0_DQ[58]
DDR1_DQ[43]/DDR0_DQ[59]
DDR1_DQ[44]/DDR0_DQ[60]
DDR1_DQ[45]/DDR0_DQ[61]
DDR1_DQ[46]/DDR0_DQ[62]
DDR1_DQ[47]/DDR0_DQ[63]

DDR0_DQSN[0]

DDR0_DQSN[1]
DDR0_DQSN[4]/DDR0_DQSN[2]
DDR0_DQSN[5]/DDR0_DQSN[3]
DDR1_DQSN[0]/DDR0_DQSN[4]
DDR1_DQSN[1]/DDR0_DQSN[5]
DDR1_DQSN[4]/DDR0_DQSN[6]
DDR1_DQSN[5]/DDR0_DQSN[7]

DDR0_DQSN[8]

DDR0_DQSP[0]

DDR0_DQSP[1]
DDR0_DQSP[4]/DDR0_DQSP[2]
DDR0_DQSP[5]/DDR0_DQSP[3]
DDR1_DQSP[0]/DDR0_DQSP[4]
DDR1_DQSP[1]/DDR0_DQSP[5]
DDR1_DQSP[4]/DDR0_DQSP[6]
DDR1_DQSP[5]/DDR0_DQSP[7]

DDR0_DQSP[8]

MEM_MA_DATA0

AE38

MEM_MA_DATA1

AE37

MEM_MA_DATA2

AG38

MEM_MA_DATA3

AG37

MEM_MA_DATA4

AE39

MEM_MA_DATA5

AE40

MEM_MA_DATA6

AG39

MEM_MA_DATA7

AG40

MEM_MA_DATA8

AJ38

MEM_MA_DATA9

AJ37

MEM_MA_DATA10

AL38

MEM_MA_DATA11

AL37

MEM_MA_DATA12

AJ40

MEM_MA_DATA13

AJ39

MEM_MA_DATA14

AL39

MEM_MA_DATA15

AL40

MEM_MA_DATA16

AN38

MEM_MA_DATA17

AN40

MEM_MA_DATA18

AR38

MEM_MA_DATA19

AR37

MEM_MA_DATA20

AN39

MEM_MA_DATA21

AN37

MEM_MA_DATA22

AR39

MEM_MA_DATA23

AR40

MEM_MA_DATA24

AW37

MEM_MA_DATA25

AU38

MEM_MA_DATA26

AV35

MEM_MA_DATA27

AW35

MEM_MA_DATA28

AU37

MEM_MA_DATA29

AV37

MEM_MA_DATA30

AT35

MEM_MA_DATA31

AU35

MEM_MA_DATA32

AY8

MEM_MA_DATA33

AW8

MEM_MA_DATA34

AV6

MEM_MA_DATA35

AU6

MEM_MA_DATA36

AU8

MEM_MA_DATA37

AV8

MEM_MA_DATA38

AW6

MEM_MA_DATA39

AY6

MEM_MA_DATA40

AY4

MEM_MA_DATA41

AV4

MEM_MA_DATA42

AT1

MEM_MA_DATA43

AT2

MEM_MA_DATA44

AV3

MEM_MA_DATA45

AW4

MEM_MA_DATA46

AT4

MEM_MA_DATA47

AT3

MEM_MA_DATA48

AP2

MEM_MA_DATA49

AM4

MEM_MA_DATA50

AP3

MEM_MA_DATA51

AM3

MEM_MA_DATA52

AP4

MEM_MA_DATA53

AM2

MEM_MA_DATA54

AP1

MEM_MA_DATA55

AM1

MEM_MA_DATA56

AK3

MEM_MA_DATA57

AH1

MEM_MA_DATA58

AK4

MEM_MA_DATA59

AH2

MEM_MA_DATA60

AH4

MEM_MA_DATA61

AK2

MEM_MA_DATA62

AH3

MEM_MA_DATA63

AK1
AF39

AK39
AP39
AU36
AW7
AU3
AN3
AJ3
AU32

AF38
AK38
AP38
AV36
AV7
AU2
AN2
AJ2
AV32

MEM_MA_DQS_L0(7)
MEM_MA_DQS_L1(7)
MEM_MA_DQS_L2(7)
MEM_MA_DQS_L3(7)
MEM_MA_DQS_L4(7)
MEM_MA_DQS_L5(7)
MEM_MA_DQS_L6(7)
MEM_MA_DQS_L7(7)

MEM_MA_DQS_H0(7)
MEM_MA_DQS_H1(7)
MEM_MA_DQS_H2(7)
MEM_MA_DQS_H3(7)
MEM_MA_DQS_H4(7)
MEM_MA_DQS_H5(7)
MEM_MA_DQS_H6(7)
MEM_MA_DQS_H7(7)

MEM_MA_DATA[63..0](7)

MEM_MB_ADD[16..0](8)

MEM_MB_CLK_H0(8)
MEM_MB_CLK_L0(8)
MEM_MB_CLK_H1(8)
MEM_MB_CLK_L1(8)

MEM_MB_ALERT#(8)

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_ADD16

MEM_MB_BG1(8)

MEM_MB_ACT#(8)

MEM_MB_CKE0(8)
MEM_MB_CKE1(8)

MEM_MB_CS_L0(8)
MEM_MB_CS_L1(8)

MEM_MB_ODT0(8)
MEM_MB_ODT1(8)

MEM_MB_BA0(8)
MEM_MB_BA1(8)

MEM_MB_BG0(8)

MEM_MB_PAR(8)

CPU1B

AL19

DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

AL22

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]

AM22

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

AM23

DDR1_MA[3]

AP23

DDR1_MA[4]

AL23

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]

AW26

DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]

AY26

DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

AU26

DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]

AW27

DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]

AP18

DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]

AU27

DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]

AV27

DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]

AR15

DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

AL17

DDR1_MA[14]/DDR1_CAB[2]/DDR1_WE#

AP16

DDR1_MA[15]/DDR1_CAB[1]/DDR1_CAS#

AN18

DDR1_MA[16]/DDR1_CAB[3]/DDR1_RAS#

AY28

DDR1_BG[1]/DDR1_CAA[9]/DDR1_MA[14]

AU28

DDR1_ACT#/DDR1_CAA[8]/DDR1_MA[15]

AY29

DDR1_CKE[0]

AV29

DDR1_CKE[1]

AW29

DDR1_CKE[2]

AU29

DDR1_CKE[3]

AP17

DDR1_CS#[0]

AN15

DDR1_CS#[1]

AN17

DDR1_CS#[2]

AM15

DDR1_CS#[3]

AM16

DDR1_ODT[0]

AL16

DDR1_ODT[1]

AP15

DDR1_ODT[2]

AL15

DDR1_ODT[3]

AL18

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]

AM18

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]

AW28

DDR1_BG[0]/DDR1_CAA[5]/DDR1_BA[2]

AM20

DDR1_CKP[0]

AM21

DDR1_CKN[0]

AP22

DDR1_CKP[1]

AP21

DDR1_CKN[1]

AN20

DDR1_CKP[2]

AN21

DDR1_CKN[2]

AP19

DDR1_CKP[3]

AP20

DDR1_CKN[3]

AL20

DDR1_PAR

AY25

DDR1_ALERT#

AR25

DDR1_ECC[0]

AR26

DDR1_ECC[1]

AM26

DDR1_ECC[2]

AM25

DDR1_ECC[3]

AP26

DDR1_ECC[4]

AP25

DDR1_ECC[5]

AL25

DDR1_ECC[6]

AL26

DDR1_ECC[7]

AC39

DDR1_VREF_DQ

LGA1151

ZIF-SOCKET1151

SKYLAKE-S

CHANNEL B

DDR0_DQ[16]/DDR1_DQ[0]
DDR0_DQ[17]/DDR1_DQ[1]
DDR0_DQ[18]/DDR1_DQ[2]
DDR0_DQ[19]/DDR1_DQ[3]
DDR0_DQ[20]/DDR1_DQ[4]
DDR0_DQ[21]/DDR1_DQ[5]
DDR0_DQ[22]/DDR1_DQ[6]
DDR0_DQ[23]/DDR1_DQ[7]
DDR0_DQ[24]/DDR1_DQ[8]

DDR0_DQ[25]/DDR1_DQ[9]
DDR0_DQ[26]/DDR1_DQ[10]
DDR0_DQ[27]/DDR1_DQ[11]
DDR0_DQ[28]/DDR1_DQ[12]
DDR0_DQ[29]/DDR1_DQ[13]
DDR0_DQ[30]/DDR1_DQ[14]
DDR0_DQ[31]/DDR1_DQ[15]
DDR0_DQ[48]/DDR1_DQ[16]
DDR0_DQ[49]/DDR1_DQ[17]
DDR0_DQ[50]/DDR1_DQ[18]
DDR0_DQ[51]/DDR1_DQ[19]
DDR0_DQ[52]/DDR1_DQ[20]
DDR0_DQ[53]/DDR1_DQ[21]
DDR0_DQ[54]/DDR1_DQ[22]
DDR0_DQ[55]/DDR1_DQ[23]
DDR0_DQ[56]/DDR1_DQ[24]
DDR0_DQ[57]/DDR1_DQ[25]
DDR0_DQ[58]/DDR1_DQ[26]
DDR0_DQ[59]/DDR1_DQ[27]
DDR0_DQ[60]/DDR1_DQ[28]
DDR0_DQ[61]/DDR1_DQ[29]
DDR0_DQ[62]/DDR1_DQ[30]
DDR0_DQ[63]/DDR1_DQ[31]
DDR1_DQ[16]/DDR1_DQ[32]
DDR1_DQ[17]/DDR1_DQ[33]
DDR1_DQ[18]/DDR1_DQ[34]
DDR1_DQ[19]/DDR1_DQ[35]
DDR1_DQ[20]/DDR1_DQ[36]
DDR1_DQ[21]/DDR1_DQ[37]
DDR1_DQ[22]/DDR1_DQ[38]
DDR1_DQ[23]/DDR1_DQ[39]
DDR1_DQ[24]/DDR1_DQ[40]
DDR1_DQ[25]/DDR1_DQ[41]
DDR1_DQ[26]/DDR1_DQ[42]
DDR1_DQ[27]/DDR1_DQ[43]
DDR1_DQ[28]/DDR1_DQ[44]
DDR1_DQ[29]/DDR1_DQ[45]
DDR1_DQ[30]/DDR1_DQ[46]
DDR1_DQ[31]/DDR1_DQ[47]

DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]

DDR0_DQSN[2]/DDR1_DQSN[0]
DDR0_DQSN[3]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[2]
DDR0_DQSN[7]/DDR1_DQSN[3]
DDR1_DQSN[2]/DDR1_DQSN[4]
DDR1_DQSN[3]/DDR1_DQSN[5]

DDR0_DQSP[2]/DDR1_DQSP[0]
DDR0_DQSP[3]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[2]
DDR0_DQSP[7]/DDR1_DQSP[3]
DDR1_DQSP[2]/DDR1_DQSP[4]
DDR1_DQSP[3]/DDR1_DQSP[5]

DDR1_DQ[63]

DDR1_DQSN[6]
DDR1_DQSN[7]
DDR1_DQSN[8]

DDR1_DQSP[6]
DDR1_DQSP[7]
DDR1_DQSP[8]

MEM_MB_DATA0

AD34

MEM_MB_DATA1

AD35

MEM_MB_DATA2

AG35

MEM_MB_DATA3

AH35

MEM_MB_DATA4

AE35

MEM_MB_DATA5

AE34

MEM_MB_DATA6

AG34

MEM_MB_DATA7

AH34

MEM_MB_DATA8

AK35

MEM_MB_DATA9

AL35

MEM_MB_DATA10

AK32

MEM_MB_DATA11

AL32

MEM_MB_DATA12

AK34

MEM_MB_DATA13

AL34

MEM_MB_DATA14

AK31

MEM_MB_DATA15

AL31

MEM_MB_DATA16

AP35

MEM_MB_DATA17

AN35

MEM_MB_DATA18

AN32

MEM_MB_DATA19

AP32

MEM_MB_DATA20

AN34

MEM_MB_DATA21

AP34

MEM_MB_DATA22

AN31

MEM_MB_DATA23

AP31

MEM_MB_DATA24

AL29

MEM_MB_DATA25

AM29

MEM_MB_DATA26

AP29

MEM_MB_DATA27

AR29

MEM_MB_DATA28

AM28

MEM_MB_DATA29

AL28

MEM_MB_DATA30

AR28

MEM_MB_DATA31

AP28

MEM_MB_DATA32

AR12

MEM_MB_DATA33

AP12

MEM_MB_DATA34

AM13

MEM_MB_DATA35

AL13

MEM_MB_DATA36

AR13

MEM_MB_DATA37

AP13

MEM_MB_DATA38

AM12

MEM_MB_DATA39

AL12

MEM_MB_DATA40

AP10

MEM_MB_DATA41

AR10

MEM_MB_DATA42

AR7

MEM_MB_DATA43

AP7

MEM_MB_DATA44

AR9

MEM_MB_DATA45

AP9

MEM_MB_DATA46

AR6

MEM_MB_DATA47

AP6

MEM_MB_DATA48

AM10

MEM_MB_DATA49

AL10

MEM_MB_DATA50

AM7

MEM_MB_DATA51

AL7

MEM_MB_DATA52

AM9

MEM_MB_DATA53

AL9

MEM_MB_DATA54

AM6

MEM_MB_DATA55

AL6

MEM_MB_DATA56

AJ6

MEM_MB_DATA57

AJ7

MEM_MB_DATA58

AE6

MEM_MB_DATA59

AF7

MEM_MB_DATA60

AH7

MEM_MB_DATA61

AH6

MEM_MB_DATA62

AE7

MEM_MB_DATA63

AF6
AF34

AK33
AN33
AN29
AN13
AR8
AM8
AG6
AN26

AF35
AL33
AP33
AN28
AN12
AP8
AL8
AG7
AN25

MEM_MB_DQS_L0(8)
MEM_MB_DQS_L1(8)
MEM_MB_DQS_L2(8)
MEM_MB_DQS_L3(8)
MEM_MB_DQS_L4(8)
MEM_MB_DQS_L5(8)
MEM_MB_DQS_L6(8)
MEM_MB_DQS_L7(8)

MEM_MB_DQS_H0(8)
MEM_MB_DQS_H1(8)
MEM_MB_DQS_H2(8)
MEM_MB_DQS_H3(8)
MEM_MB_DQS_H4(8)
MEM_MB_DQS_H5(8)
MEM_MB_DQS_H6(8)
MEM_MB_DQS_H7(8)

MEM_MB_DATA[63..0](8)

SOCKET PN N12-151A010-L06

A A

Title

Title

Title

CPU-Memory

CPU-Memory

CPU-Memory

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

4 35Friday, March 31, 2017

4 35Friday, March 31, 2017

1

4 35Friday, March 31, 2017

10

CPU-Power

Vinafix.com

5

4

3

2

1

VCCP VCCP

CPU1G

SKYLAKE-S

D D

C C

B B

A25
A26
A27
A28
A29
A30
B25
B27
B29
B31
B32
B33
B34
B35
B36
B37
C25
C26
C27
C28
C29
C30
C32
C34
C36
D25
D27
D29
D31
D32
D33
D34
D35
D36
E24
E25
E26
E27
E28
E29
E30
E32
E34
E36
F23
F24
F25
F27
F29
F31
G30
G32
H22
H23
H25
H27
H29

H31
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21

VCC-001
VCC-002
VCC-003
VCC-004
VCC-005
VCC-006
VCC-007
VCC-008
VCC-009
VCC-010
VCC-011
VCC-012
VCC-013
VCC-014
VCC-015
VCC-016
VCC-017
VCC-018
VCC-019
VCC-020
VCC-021
VCC-022
VCC-023
VCC-024
VCC-025
VCC-026
VCC-027
VCC-028
VCC-029
VCC-030
VCC-031
VCC-032
VCC-033
VCC-034
VCC-035
VCC-036
VCC-037
VCC-038
VCC-039
VCC-040
VCC-041
VCC-042
VCC-043
VCC-044
VCC-045
VCC-046
VCC-047
VCC-048
VCC-049
VCC-050
VCC-051
VCC-052
VCC-053
VCC-054
VCC-055
VCC-056
VCC-057
VCC-058
VCC-059
VCC-060
VCC-061
VCC-062
VCC-063
VCC-064

LGA1151

ZIF-SOCKET1151

VCC-128
VCC-127
VCC-126
VCC-125
VCC-124
VCC-123
VCC-122
VCC-121
VCC-120
VCC-119
VCC-118
VCC-117
VCC-116
VCC-115
VCC-114
VCC-113
VCC-112
VCC-111
VCC-110
VCC-109
VCC-108
VCC-107
VCC-106
VCC-105
VCC-104
VCC-103
VCC-102
VCC-101
VCC-100
VCC-099
VCC-098
VCC-097
VCC-096
VCC-095
VCC-094
VCC-093
VCC-092
VCC-091
VCC-090
VCC-089
VCC-088
VCC-087
VCC-086
VCC-085
VCC-084
VCC-083
VCC-082
VCC-081
VCC-080
VCC-079
VCC-078
VCC-077
VCC-076
VCC-075
VCC-074
VCC-073
VCC-072
VCC-071
VCC-070
VCC-069
VCC-068
VCC-067
VCC-066
VCC-065

H32
J21
F32
F33
F34
G23
G24
G25
G26
G27
G28
G29
J22
J23
J24
J25
J26
J27
J28
J29
J30
J31
K16
K18
K20
K21
K23
K25
K27
K29
K31
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
M13
M14
M16
M18
M20
M22
M24
M26
M28
M30
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22

VCCGT VCCGT VCCSA

CPU1H

VCCGT-01
VCCGT-02
VCCGT-03
VCCGT-04
VCCGT-05
VCCGT-06
VCCGT-07

G36

VCCGT-08

G37

VCCGT-09

G38

VCCGT-10

G39

VCCGT-11

G40

VCCGT-12

H36

VCCGT-13

H38

VCCGT-14

H40

VCCGT-15

J36

VCCGT-16

J37

VCCGT-17

J38

VCCGT-18

J39

VCCGT-19

J40

VCCGT-20

K36

VCCGT-21

K38

VCCGT-22

K40

VCCGT-23

L34

VCCGT-24

L35

VCCGT-25

L36

VCCGT-26

L37

VCCGT-27

L38

VCCGT-28

L39

VCCGT-29

L40

VCCGT-30

M33

VCCGT-31

M34

VCCGT-32

M36

VCCGT-33

M38

VCCGT-34

M40

VCCGT-35

N34

VCCGT-36

N35

VCCGT-37

N36

VCCGT-38

N40

VCCGT-39

P33

VCCGT-40

LGA1151

ZIF-SOCKET1151

SKYLAKE-S

SLP_S4_CTL(26)

N39

VCCGT-80

N38

VCCGT-79

N37

VCCGT-78

R34

VCCGT-77

P40

VCCGT-76

P38

VCCGT-75

P36

VCCGT-74

P34

VCCGT-73

R35

VCCGT-72

R36

VCCGT-71

R37

VCCGT-70

R38

VCCGT-69

R39

VCCGT-68

R40

VCCGT-67

T33

VCCGT-66

T34

VCCGT-65

T36

VCCGT-64

T38

VCCGT-63

T40

VCCGT-62

U34

VCCGT-61

U35

VCCGT-60

U36

VCCGT-59

U37

VCCGT-58

U38

VCCGT-57

U39

VCCGT-56

U40

VCCGT-55

V33

VCCGT-54

V34

VCCGT-53

V36

VCCGT-52

V38

VCCGT-51

V40

VCCGT-50

W34

VCCGT-49

W35

VCCGT-48

W36

VCCGT-47

W37

VCCGT-46

W38

VCCGT-45

Y33

VCCGT-44

Y34

VCCGT-43

Y36

VCCGT-42

Y38

VCCGT-41

+5V A +5V SU S

R716
10K/4

G2
D1

SLP_S4#(7,12,17,22,24,31)

G1

Q59

2N7002DW_SOT363

S1

VCCIO

For 4+4e

R8 06

X_0R/6

D2

S2

AA34
AA35
AA36
AA37
AA38
AB33
AB34

AA7
AB6
AB7
AB8
AC7
AC8

N7
P7
R7
T7
U7
Y6
Y7
Y8

W7

V7

AA6

AK11
AK14
AK24

AJ23

M8

P8
T8
U8

W8

F35
G34
G35
H33
H34

J33

J35
K32
K34

L31

L33
M32

R718
10K/4

VCCST_PLL_EN

CPU1I

VCCSA-01
VCCSA-02
VCCSA-03

1.05V/12.3A

VCCSA-04
VCCSA-05
VCCSA-06
VCCSA-07
VCCSA-08
VCCSA-09
VCCSA-10
VCCSA-11
VCCSA-12
VCCSA-13
VCCSA-14
VCCSA-15
VCCSA-16
VCCSA-17

VCCIO-01

0.95V/5.5A

VCCIO-02
VCCIO-03
VCCIO-04
VCCIO-05
VCCIO-06
VCCIO-07
VCCIO-08
VCCIO-09

VCCGTX-01
VCCGTX-02
VCCGTX-03
VCCGTX-04
VCCGTX-05
VCCGTX-06
VCCGTX-07
VCCGTX-08
VCCGTX-09
VCCGTX-10
VCCGTX-11
VCCGTX-12

LGA1151

ZIF-SOCKET1151

PCH_1VSB

SKYLAKE-S

1.2V/2.0A

1V/3A

1V/3.3A

VCC_OPC_1P8-01

1.8V/50mA

VCC_OPC_1P8-02

1V/120mA

R7 23 X_0R0805

D

G

Q60

S

N-P3203CMG_SOT23

VDDQ-01
VDDQ-02
VDDQ-03
VDDQ-04
VDDQ-05
VDDQ-06
VDDQ-07
VDDQ-08
VDDQ-09
VDDQ-10
VDDQ-11
VDDQ-12
VDDQ-13
VDDQ-14
VDDQ-15
VDDQ-16

VCCPLL_OC

VCCOPC-01
VCCOPC-02
VCCOPC-03
VCCOPC-04
VCCOPC-05

VCCEOPIO-01
VCCEOPIO-02

VCCST-01
VCCST-02

VCCPLL

1V/130mA

VCC_DDR

AT18
AT21
AU13
AU15
AU19
AU23
AV11
AV17
AV21
AW10
AW14
AW25
AY12
AY16
AY18
AY23

AJ9

AJ30
AJ27
AJ28
AJ29
AK27

For 4+4e

AJ25
AJ26

AB37
AB38

V5
V6

V4

C488
C22u6.3X8

TOP SIDE SOCKET CAVITY

VCCPLL_OC

VCCST
VCCSTG

VCCPLL

VCCST

VCC_DDR

R300 0R/4

VCCIO

C486 C22u6.3X6
C494 C22u6.3X6
C516 C22u6.3X6
C523 C22u6.3X6

TOP SIDE SOCKET CAVITY

VCC_DDR

TP4

R8 07
X_0R/6

R798
X_0R/6

VCCSTG VCCST

R818
X_0R/6

VCCPLL VCCST

R788 0R/6
C481 C1u6.3X4

TOP SIDE SOCKET CAVITY

R792 0R/6
C490 C1u6.3X4

TOP SIDE SOCKET CAVITY

PDG, Page447:
Figure 41-3.Primary Debug Port-XDP_PRESENT# Connectivity
NOTE1:
VCCST/VCCSTG Power Override Mechanism is for Merged XDP usage model.
WhenXDP is pluggedin, VCCST/VCCSTGwill be forced on. This is to support PCH Sx
debug. If onlyS0 debug is required, the override mechanism is not requiredunless C10
debug support is also needed.
NOTE 2:
XDP_PRESENT#/
XDP_PRESENT_PCH connection
to 2 p in header on some Intel
reference designis optional. It is
onlyuse d forIntel pow er- o n.
NOTE 3:
Use Existing Override
Logic. Don't have to
addnew logic, just
connect Override Logic
to the VccST-G/-U
po wer gat ing logic
alreadyin the board
Note 4… just a representation…
maybe be FETorIntegratedLoad Switch

Close to CPU
Pins.

C478

C0.1u6.3X4

C480

C0.1u6.3X4

A A

Ti t l e

Ti t l e

Ti t l e

CPU-Power

CPU-Power

CPU-Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

5 35Friday, March 31, 2017

5 35Friday, March 31, 2017

1

5 35Friday, March 31, 2017

10

10

10

5

AR24

AR31

AR32

AR34

AR35

AR36

AR4

AR5

AR33

AR27

AR3

CPU1J

A7

VSS-001

A11

VSS-002

A13

VSS-003

A15

VSS-004

A17

VSS-005

A24

D D

C C

B B

AA33

AB39

AC33
AC34
AC35

AD33
AD36
AD37
AD38
AD39
AD40

AE33
AE36

AF33
AF36
AF37
AF40

AG33
AG36

AH33
AH36
AH37
AH38
AH39
AH40

AJ31
AJ32
AJ33
AJ34
AJ35

AG1
AG2
AG3
AG4
AG5
AG8

AH5
AH8

AA3
AA8

AB5
AC3

AC6

AD1
AD4
AD6
AD7
AD8

AE3
AE5
AE8

AF1
AF5
AF8

AJ1
AJ4
AJ5
AJ8

VSS-006
VSS-007
VSS-008
VSS-009
VSS-010
VSS-011
VSS-012
VSS-013
VSS-014
VSS-015
VSS-016
VSS-017
VSS-018
VSS-019
VSS-020
VSS-021
VSS-022
VSS-023
VSS-024
VSS-025
VSS-026
VSS-027
VSS-028
VSS-029
VSS-030
VSS-031
VSS-032
VSS-033
VSS-034
VSS-035
VSS-036
VSS-037
VSS-038
VSS-039
VSS-040
VSS-041
VSS-042
VSS-043
VSS-044
VSS-045
VSS-046
VSS-047
VSS-048
VSS-049
VSS-050
VSS-051
VSS-052
VSS-053
VSS-054
VSS-055
VSS-056
VSS-057
VSS-058
VSS-059
VSS-060
VSS-061
VSS-062
VSS-063
VSS-064

LGA1151

AR30

VSS-268

VSS-264

VSS-267

VSS-266

VSS-265

VSS-65

VSS-70

VSS-69

VSS-68

VSS-67

VSS-66

AK9

AK8

AK7

AK6

AK5

AJ36

AK10

AT9

AT8

AT7

AT6

AT5

AT40

AT39

AT38

AT37

AT36

AT34

AT32

AT31

AT30

AT29

AT28

AT27

AT26

AT25

AT24

AT17

AT14

AT13

VSS-263

VSS-261

VSS-260

VSS-259

VSS-258

VSS-257

VSS-262

VSS-256

VSS-255

VSS-254

VSS-253

VSS-252

VSS-251

VSS-250

VSS-249

VSS-248

VSS-247

VSS-246

VSS-245

VSS-244

VSS-243

VSS-242

VSS-241

VSS-240

VSS-239

VSS-238

VSS-237

VSS-236

VSS-235

VSS-234

SKYLAKE-S

GND

VSS-71

VSS-72

VSS-73

VSS-74

VSS-75

VSS-76

VSS-77

VSS-78

VSS-79

VSS-80

VSS-81

VSS-82

VSS-83

VSS-84

VSS-85

VSS-86

VSS-87

VSS-88B6VSS-89

VSS-90

VSS-91

VSS-92

VSS-93

VSS-94

VSS-95

VSS-96

VSS-97

VSS-98

VSS-99

VSS-100

J10

B24

B26

B28

B30

C12

C14

C16

C18

AK12

AK13

AK15

AK16

AK17

AK18

AK19

AK20

AK23

AK25

AK26

AK28

C20

J12

C22

C24

C31

C33

C35

4

AK29

AK30

AK36

AK37

AT12

AT11

AT10

AU7

AU5

AU4

AU34

AU30

AU25

AU1

AV9

AV5

AV38

AV34

AV30

AV28

AV26

AV2

AW32

AW30

AW3

AW34

AW36

AW5

AW9

AY27

AY30

AY5

VSS-233

VSS-232

VSS-231

VSS-230

VSS-229

VSS-228

VSS-227

VSS-226

VSS-225

VSS-224

VSS-223

VSS-222

VSS-221

VSS-220

VSS-219

VSS-218

VSS-217

VSS-216

VSS-215

VSS-214

VSS-213

VSS-212

VSS-211

VSS-210

VSS-209

VSS-208

VSS-207

VSS-108K1VSS-109

VSS-113

VSS-112

VSS-111

VSS-104J3VSS-105

J32

VSS-110

VSS-106

VSS-107

J6

J34

K14

K24

K22

K19

K17

K15

VSS-101

VSS-102

VSS-103

J16

J18

J20

VSS-120

VSS-119

VSS-118

VSS-117

VSS-116

VSS-115

VSS-114

K37

K35

K33

K30

K28

K26

AR21

VSS-127

VSS-126

VSS-125

VSS-124

VSS-123

VSS-122

VSS-121

AR2

AR14

AR16

AR17

AR18

AR19

AR20

AK40

AY7

AY9

VSS-203

VSS-202

VSS-201

VSS-200

VSS-206

VSS-128

VSS-199

VSS-205

VSS-204

VSS-198
VSS-197
VSS-196
VSS-195
VSS-194
VSS-193
VSS-192
VSS-191
VSS-190
VSS-189
VSS-188
VSS-187
VSS-186
VSS-185
VSS-184
VSS-183
VSS-182
VSS-181
VSS-180
VSS-179
VSS-178
VSS-177
VSS-176
VSS-175
VSS-174
VSS-173
VSS-172
VSS-171
VSS-170
VSS-169
VSS-168
VSS-167
VSS-166
VSS-165
VSS-164
VSS-163
VSS-162
VSS-161
VSS-160
VSS-159
VSS-158
VSS-157
VSS-156
VSS-155
VSS-154
VSS-153
VSS-152
VSS-151
VSS-150
VSS-149
VSS-148
VSS-147
VSS-146
VSS-145
VSS-144
VSS-143
VSS-142
VSS-141
VSS-140
VSS-139
VSS-138
VSS-137
VSS-136
VSS-135

VSS-130

VSS-129

VSS-134

VSS-133

VSS-132L9VSS-131

ZIF-SOCKET1151

L6

L13

L32

AR1

AR11

AL1
AL11
AL14
AL2
AL21
AL24
AL27
AL3
AL30
AL36
AL4
AL5
AM35
AM34
AM33
AM32
AM31
AM30
AM27
AM24
AM19
AM17
AM14
AM11
AM36
AM37
AM38
AM39
AM40
AM5
AN1
AN10
AN11
AN14
AN16
AN19
AN22
AN23
AN24
AN27
AN30
AN36
AN4
AN5
AN6
AN7
AN8
AN9
AP11
AP14
AP24
AP27
AP30
AP36
AP37
AP40
AP5
K39
K4
K7
L3
L11
M1
M4

3

CPU-GND

2

M7
M10
M12
M15
M17
M19
M21
M23
M25
M27
M29
M35
M37
M39

N3

N33

N6
N8

P1
P35
P37
P39

P4

R3
R33

R6

R8

T1
T35
T37
T39

T4

U3
U33

U6

V1
V35
V37
V39

V8

W3

W33

W6
Y35
Y37

Y5

C10

C8

C5
C37
D37
D30
D28
D26
D24

D4
D39

D7
E13
E11

CPU1K

SKYLAKE-S

VSS-269
VSS-270
VSS-271
VSS-272
VSS-273
VSS-274
VSS-275
VSS-276
VSS-277
VSS-278
VSS-279
VSS-280
VSS-281
VSS-282
VSS-283
VSS-284
VSS-285
VSS-286
VSS-287
VSS-288
VSS-289
VSS-290
VSS-291
VSS-292
VSS-293
VSS-294
VSS-295
VSS-296

GND

VSS-297
VSS-298
VSS-299
VSS-300
VSS-301
VSS-302
VSS-303
VSS-304
VSS-305
VSS-306
VSS-307
VSS-308
VSS-309
VSS-310
VSS-311
VSS-312
VSS-313
VSS-314
VSS-315
VSS-316
VSS-317
VSS-318
VSS-319
VSS-320
VSS-321
VSS-322
VSS-323
VSS-324
VSS-325
VSS-326
VSS-327
VSS-328

LGA1151

ZIF-SOCKET1151

VSS-329
VSS-330
VSS-331
VSS-332
VSS-333
VSS-334
VSS-335
VSS-336
VSS-337
VSS-338
VSS-339
VSS-340
VSS-341
VSS-342
VSS-343
VSS-344
VSS-345
VSS-346
VSS-347
VSS-348
VSS-349
VSS-350
VSS-351
VSS-352
VSS-353
VSS-354
VSS-355
VSS-356
VSS-357
VSS-358
VSS-359
VSS-360
VSS-361
VSS-362
VSS-363
VSS-364
VSS-365
VSS-366
VSS-367
VSS-368
VSS-369
VSS-370
VSS-371

VSS-AT15
VSS-AR23

VSS-AR22

VSS_NCTF-1
VSS_NCTF-2
VSS_NCTF-3
VSS_NCTF-4

E15
E17
E19
E21
E23
E3
E31
E33
E35
E37
E6
E9
F1
F10
F22
F26
F28
F30
F4
F40
F7
G11
G13
G15
G17
G19
G22
G3
G31
G33
G6
H1
H21
H24
H26
H28
H30
H35
H37
H39
H4
H7
H9

AT15
AR23

AR22

D40
C2
B38
A4

1

CPU-XDP

Defensive Design

R236 0R/4
R237 51R/4

R231 0R/4
R233 51R/4

R229
51R/4

R230 0R/4
R234 0R/4
R226 0R/4

VCCST

R235
X_1K/4

PCH_JTAGX(12)

H_TRST_R#(12)

PCH_TDO(12)
PCH_TDI(12)
PCH_TMS(12)

3

Place close to PCH

PCH_TCK(12)

PCH_TCK
PCH_TDO
PCH_TDI
PCH_TMS

R429 X_51R/4
R143 51R/4
R144 51R/4
R145 51R/4R406 X_1K/4

VCCST
VCCST
VCCST

Title

Title

Title

CPU-GND/XDP

CPU-GND/XDP

CPU-GND/XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

6 35Friday, March 31, 2017

6 35Friday, March 31, 2017

1

6 35Friday, March 31, 2017

10

+3VSUS

All Seial&PD resistor

H_TRST#(3)

H_TCK(3)

H_TDO(3)

H_TDI(3)

H_TMS(3)

Near CPU within 1.1"

H_TCK

H_TRST#

VCCST

H_TDO
H_TDI
H_TMS

R519

2.2K/4

R508 X_0R/4

C247

X_C0.1u6.3X4

A A

VCCIO

R161
150R1%4

R180 1K/4

H_CFG0

H_CFG0(3)

5

PCH_1VSB

R296

2.2K/4
R408 0R/4

From PCH_MOSI

XDP_HOOK3(12)

SYS_PWROK(12,22)

ITP_MODE(12)
CPURST#(3,12)

4

5

Vinafix.com

4

3

2

1

DDR4 SO-DIMM DIMM1

Channel A (W/O ECC)

MEM_MA_ADD[16..0](4) MEM_MA_DATA[63..0] ( 4)

D D

MEM_MA_BA0(4)
MEM_MA_BA1(4)

MEM_MA_CLK_H0(4)
MEM_MA_CLK_L0(4)
MEM_MA_CLK_H1(4)
MEM_MA_CLK_L1(4)
MEM_MA_CKE0(4)

MEM_MA_ODT0(4)
MEM_MA_ODT1(4)

C C

B B

A A

Tie DIMM connector DM[7:0] pins
directly to VDDQ

MEM_MA_DQS_H0(4)
MEM_MA_DQS_H1(4)
MEM_MA_DQS_H2(4)
MEM_MA_DQS_H3(4)
MEM_MA_DQS_H4(4)
MEM_MA_DQS_H5(4)
MEM_MA_DQS_H6(4)
MEM_MA_DQS_H7(4)

MEM_MA_DQS_L0(4)
MEM_MA_DQS_L1(4)

MEM_MA_DQS_L2(4)
MEM_MA_DQS_L3(4)
MEM_MA_DQS_L4(4)
MEM_MA_DQS_L5(4)
MEM_MA_DQS_L6(4)
MEM_MA_DQS_L7(4)

R2 00 X_0R/4
R1 99 X_0R/4

ADDRESS : A0
1010,0000

PCH_DRAM_RST#(12)

MEM_MA_ADD0 MEM_MA_DATA0
MEM_MA_ADD1 MEM_MA_DATA1
MEM_MA_ADD2 MEM_MA_DATA2
MEM_MA_ADD3 MEM_MA_DATA3
MEM_MA_ADD4 MEM_MA_DATA4
MEM_MA_ADD5 MEM_MA_DATA5
MEM_MA_ADD6 MEM_MA_DATA6
MEM_MA_ADD7 MEM_MA_DATA7
MEM_MA_ADD8 MEM_MA_DATA8
MEM_MA_ADD9 MEM_MA_DATA9
MEM_MA_ADD10 MEM_MA_DATA10
MEM_MA_ADD11 MEM_MA_DATA11
MEM_MA_ADD12 MEM_MA_DATA12
MEM_MA_ADD13 MEM_MA_DATA13
MEM_MA_ADD14 MEM_MA_DATA14
MEM_MA_ADD15 MEM_MA_DATA15

SMBCLK_DDR MEM_MA_DATA28
SMBDATA_DDR MEM_MA_DATA29

VCC_DDR

MEM_MA_SA0
MEM_MA_SA1

SMBCLK_VCC(12,21) SMBCLK_DDR (8)
SMBDATA_VCC(12,21) SMBDATA_DDR (8)

VCC_DDR

R791
X_1K/4

(1.2-0.85)/1K
=0.35mA

R789 X_1K/4

5

DIMM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

150

BA0

145

BA1

149

CS0#

157

CS1#

137

CK0

139

CK0#

138

CK1

140

CK1#

109

CKE0

110

CKE1

253

SCL

254

SDA

155

ODT0

161

ODT1

12

DM0#/DBIO#

33

DM1#/DBI1#

54

DM2#/DBI2#

75

DM3#/DBI3#

178

DM4#/DBI4#

199

DM5#/DBI5#

220

DM6#/DBI6#

241

DM7#/DBI7#

96

DBI8#

13

DQS0

34

DQS1

55

DQS2

76

DQS3

179

DQS4

200

DQS5

221

DQS6

242

DQS7

97

DQS8

11

DQS0#

32

DQS1#

53

DQS2#

74

DQS3#

177

DQS4#

198

DQS5#

219

DQS6#

240

DQS7#

95

DQS8#

256

SA0

260

SA1

166

RFU

DDR4SODIMM-260PS_BLACK

R793 0R/4

+3VSUS

R790
X_4.7K/4

3.3/4.7K

(3.3-0.85)/4.7K

=0.7mA

=0.52mA

Q78

2
5

X_NN-CMKT3904

SLP_S4#(5,12,17,22,24,31)

R7 25 33R/4
R7 26 33R/4

6
1
3
4

D

G

S

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

MEM_MA_DATA17

49

DQ17

MEM_MA_DATA18

62

DQ18

MEM_MA_DATA19

63

DQ19

MEM_MA_DATA20

46

DQ20

MEM_MA_DATA21

45

DQ21

58

DQ22

MEM_MA_DATA23

59

DQ23

MEM_MA_DATA24

70

DQ24

MEM_MA_DATA25

71

DQ25

MEM_MA_DATA26

83

DQ26

MEM_MA_DATA27

84

DQ27

66

DQ28

67

DQ29

MEM_MA_DATA30

79

DQ30

MEM_MA_DATA31

80

DQ31

MEM_MA_DATA32

174

DQ32

MEM_MA_DATA33

173

DQ33

MEM_MA_DATA34

187

DQ34

MEM_MA_DATA35

186

DQ35

MEM_MA_DATA36

170

DQ36

MEM_MA_DATA37

169

DQ37

MEM_MA_DATA38

183

DQ38

MEM_MA_DATA39

182

DQ39

MEM_MA_DATA40

195

DQ40

MEM_MA_DATA41

194

DQ41

MEM_MA_DATA42

207

DQ42

MEM_MA_DATA43

208

DQ43

MEM_MA_DATA44

191

DQ44

MEM_MA_DATA45

190

DQ45

MEM_MA_DATA46

203

DQ46

MEM_MA_DATA47

204

DQ47

MEM_MA_DATA48

216

DQ48

MEM_MA_DATA49

215

DQ49

MEM_MA_DATA50

228

DQ50

MEM_MA_DATA51

229

DQ51

MEM_MA_DATA52

211

DQ52

MEM_MA_DATA53

212

DQ53

MEM_MA_DATA54

224

DQ54

MEM_MA_DATA55

225

DQ55

MEM_MA_DATA56

237

DQ56

MEM_MA_DATA57

236

DQ57

MEM_MA_DATA58

249

DQ58

MEM_MA_DATA59

250

DQ59

MEM_MA_DATA60

232

DQ60

MEM_MA_DATA61

233

DQ61

MEM_MA_DATA62

245

DQ62

MEM_MA_DATA63

246

DQ63

115

BG0

113

BG1

VCC_DDR

R805
470R/4

1.2/470
=2.55mA

C529

X_C0.1u6.3X4

DDR_RESET# assertion to SLP_S4# assertion

Q75

(The negative minimum timingimplies that

X_2N7002

DDR_RESET# must eitherfallbefore SLP_S4#
orwithin100 nS after it). <Control by PCH>

MEM_MA_BG0 (4)
MEM_MA_BG1 (4)

DRAM_RESET# (8 )

15WW02:
It is recommended not to install any capacitor
on DDR Reset signal (DRAMRST).

4

+3V VDDSPD VCC_DDR

R729 0R/6

MEM_MA_ACT#(4)MEM_MA_CS_L0(4)
MEM_MA_ALERT#(4)MEM_MA_CS_L1(4)

VCC_DDR

C446

C2.2u6.3X4

R326 240R1%4

C449

C0.1u6.3X4

DRAM_RESET#MEM_MA_ADD16 MEM_MA_DATA16

MEM_MA_EVENT#MEM_MA_DATA22

MEM_MA_PAR(4)MEM_MA_CKE1(4)

3

255

92

91
101
105

88

87
100
104

162
165

108

114
116
134

143

1
2
5
6

9
10
14
15
18
19
22
23
26
27
30
31
35
36
39
40
43
44
47
48
51
52
56
57
60
61
64
65
68
69
72
73
77
78
81
82
85
86
89
90
93
94
98
99

102
103
106
107

DIMM1B

VDDSPD

CB0/NC4
CB1/NC3
CB2/NC6
CB3/NC8
CB4/NC2
CB5/NC1
CB6/NC5
CB7/NC7

C0/CS2#/NC9
C1/CS3#/NC10

RESET#

ACT#
ALERT#
EVENT#

Parity

VSS-1
VSS-2
VSS-3
VSS-4
VSS-5
VSS-6
VSS-7
VSS-8
VSS-9
VSS-10
VSS-11
VSS-12
VSS-13
VSS-14
VSS-15
VSS-16
VSS-17
VSS-18
VSS-19
VSS-20
VSS-21
VSS-22
VSS-23
VSS-24
VSS-25
VSS-26
VSS-27
VSS-28
VSS-29
VSS-30
VSS-31
VSS-32
VSS-33
VSS-34
VSS-35
VSS-36
VSS-37
VSS-38
VSS-39
VSS-40
VSS-41
VSS-42
VSS-43
VSS-44
VSS-45
VSS-46
VSS-47
VSS-48
VSS-49
VSS-50
VSS-51
VSS-52

111

VDD-1

112

VDD-2

117

VDD-3

118

VDD-4

123

VDD-5

124

VDD-6

129

VDD-7

130

VDD-8

135

VDD-9

136

VDD-10

141

VDD-11

142

VDD-12

147

VDD-13

148

VDD-14

153

VDD-15

154

VDD-16

159

VDD-17

160

VDD-18

163

VDD-19

257

VPP-1

259

VPP-2

164

VREF_CA

258

VTT

167

VSS-53

168

VSS-54

171

VSS-55

172

VSS-56

175

VSS-57

176

VSS-58

180

VSS-59

181

VSS-60

184

VSS-61

185

VSS-62

188

VSS-63

189

VSS-64

192

VSS-65

193

VSS-66

196

VSS-67

197

VSS-68

201

VSS-69

202

VSS-70

205

VSS-71

206

VSS-72

209

VSS-73

210

VSS-74

213

VSS-75

214

VSS-76

217

VSS-77

218

VSS-78

222

VSS-79

223

VSS-80

226

VSS-81

227

VSS-82

230

VSS-83

231

VSS-84

234

VSS-85

235

VSS-86

238

VSS-87

239

VSS-88

243

VSS-89

244

VSS-90

247

VSS-91

248

VSS-92

251

VSS-93

252

VSS-94

261

261

262

262

MEC1

MEC2

DDR4SODIMM-260PS_BLACK

MEC1

MEC2

C456

C0.1u6.3X4

C175

C0.1u6.3X4

C438

C0.1u6.3X4

C452
C2.2u6.3X4

DIMM_CA_VREF_A

C450
C4.7u6.3X6

2

VPP_DDR

VTT_DDR

VCC_DDR

C517 C0.1u6.3X4
C485 C0.1u6.3X4
C504 C0.1u6.3X4
C503 C0.1u6.3X4

C198 C1u16X4
C484 C1u16X4
C459 C1u16X4
C506 C1u16X4

C483 C10u6.3X6

VCC_DDR

C0.1u6.3X4

R312
1K1%4

DMS-SA30

DMS-SA30

DMS-SA30

DIMM_CA_VREF_A

C487

1

C191

C0.1u6.3X4

7 35Friday, March 31, 2017

7 35Friday, March 31, 2017

7 35Friday, March 31, 2017

R320
1K1%4

R325 0R/4

CPU_CA_VREF_A

R358 2R1%4

C216
C0.022u25X4

R369

24.9R1%4

Ti t l e

Ti t l e

Ti t l e

DDR4 SO-DIMM1 STD

DDR4 SO-DIMM1 STD

DDR4 SO-DIMM1 STD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

10

10

10

5

4

3

2

1

DDR4 SO-DIMM DIMM2

Channel B (W/O ECC)

VDDSPD from R729 (Page6)

MEM_MB_ADD[16..0](4) MEM_MB_DATA[63..0](4)

D D

MEM_MB_BA0(4)
MEM_MB_BA1(4)

MEM_MB_CS_L0(4) MEM_MB_ACT#(4)
MEM_MB_CS_L1(4) MEM_MB_ALERT#(4)
MEM_MB_CLK_H0(4)
MEM_MB_CLK_L0(4)
MEM_MB_CLK_H1(4)
MEM_MB_CLK_L1(4)
MEM_MB_CKE0(4)
MEM_MB_CKE1(4) MEM_MB_PAR(4)
SMBCLK_DDR(7)
SMBDATA_DDR(7)
MEM_MB_ODT0(4)

C C

B B

A A

MEM_MB_ODT1(4)

Tie DIMM connector DM[7:0] pins
directly to VDDQ

MEM_MB_DQS_H0(4)
MEM_MB_DQS_H1(4)
MEM_MB_DQS_H2(4)
MEM_MB_DQS_H3(4)
MEM_MB_DQS_H4(4)
MEM_MB_DQS_H5(4)
MEM_MB_DQS_H6(4)
MEM_MB_DQS_H7(4)

MEM_MB_DQS_L0(4)
MEM_MB_DQS_L1(4)
MEM_MB_DQS_L2(4)

MEM_MB_DQS_L3(4)
MEM_MB_DQS_L4(4)
MEM_MB_DQS_L5(4)
MEM_MB_DQS_L6(4)
MEM_MB_DQS_L7(4)

R210 X_0R/4
R196 X_0R/4

+3V

ADDRESS : A4
1010,0100

MEM_MB_ADD0 MEM_MB_DATA0
MEM_MB_ADD1 MEM_MB_DATA1
MEM_MB_ADD2 MEM_MB_DATA2
MEM_MB_ADD3 MEM_MB_DATA3
MEM_MB_ADD4 MEM_MB_DATA4
MEM_MB_ADD5 MEM_MB_DATA5
MEM_MB_ADD6 MEM_MB_DATA6
MEM_MB_ADD7 MEM_MB_DATA7
MEM_MB_ADD8 MEM_MB_DATA8
MEM_MB_ADD9 MEM_MB_DATA9
MEM_MB_ADD10 MEM_MB_DATA10
MEM_MB_ADD11 MEM_MB_DATA11
MEM_MB_ADD12 MEM_MB_DATA12
MEM_MB_ADD13 MEM_MB_DATA13
MEM_MB_ADD14 MEM_MB_DATA14
MEM_MB_ADD15 MEM_MB_DATA15
MEM_MB_ADD16 MEM_MB_DATA16

VCC_DDR

MEM_MB_SA0
MEM_MB_SA1

DIMM2A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

150

BA0

145

BA1

149

CS0#

157

CS1#

137

CK0

139

CK0#

138

CK1

140

CK1#

109

CKE0

110

CKE1

253

SCL

254

SDA

155

ODT0

161

ODT1

12

DM0#/DBIO#

33

DM1#/DBI1#

54

DM2#/DBI2#

75

DM3#/DBI3#

178

DM4#/DBI4#

199

DM5#/DBI5#

220

DM6#/DBI6#

241

DM7#/DBI7#

96

DBI8#

13

DQS0

34

DQS1

55

DQS2

76

DQS3

179

DQS4

200

DQS5

221

DQS6

242

DQS7

97

DQS8

11

DQS0#

32

DQS1#

53

DQS2#

74

DQS3#

177

DQS4#

198

DQS5#

219

DQS6#

240

DQS7#

95

DQS8#

256

SA0

260

SA1

166

RFU

DDR4SODIMM-260PS_BLACK

N13-2600120-F02

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

BG0

BG1

8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50

MEM_MB_DATA17

49

MEM_MB_DATA18

62

MEM_MB_DATA19

63

MEM_MB_DATA20

46

MEM_MB_DATA21

45

MEM_MB_DATA22 MEM_MB_EVENT#

58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246

115
113

MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

MEM_MB_BG0(4)
MEM_MB_BG1(4)

VCC_DDR

VDDSPD VCC_DDR

DRAM_RESET#(7)

C432

C2.2u6.3X4

R328
240R1%4

C448

C0.1u6.3X4

DIMM2B

255

VDDSPD

92

CB0/NC4

91

CB1/NC3

101

CB2/NC6

105

CB3/NC8

88

CB4/NC2

87

CB5/NC1

100

CB6/NC5

104

CB7/NC7

162

C0/CS2#/NC9

165

C1/CS3#/NC10

108

RESET#

114

ACT#

116

ALERT#

134

EVENT#

143

Parity

1

VSS-1

2

VSS-2

5

VSS-3

6

VSS-4

9

VSS-5

10

VSS-6

14

VSS-7

15

VSS-8

18

VSS-9

19

VSS-10

22

VSS-11

23

VSS-12

26

VSS-13

27

VSS-14

30

VSS-15

31

VSS-16

35

VSS-17

36

VSS-18

39

VSS-19

40

VSS-20

43

VSS-21

44

VSS-22

47

VSS-23

48

VSS-24

51

VSS-25

52

VSS-26

56

VSS-27

57

VSS-28

60

VSS-29

61

VSS-30

64

VSS-31

65

VSS-32

68

VSS-33

69

VSS-34

72

VSS-35

73

VSS-36

77

VSS-37

78

VSS-38

81

VSS-39

82

VSS-40

85

VSS-41

86

VSS-42

89

VSS-43

90

VSS-44

93

VSS-45

94

VSS-46

98

VSS-47

99

VSS-48

102

VSS-49

103

VSS-50

106

VSS-51

107

VSS-52

DDR4SODIMM-260PS_BLACK

111

VDD-1

112

VDD-2

117

VDD-3

118

VDD-4

123

VDD-5

124

VDD-6

129

VDD-7

130

VDD-8

135

VDD-9

136

VDD-10

141

VDD-11

142

VDD-12

147

VDD-13

148

VDD-14

153

VDD-15

154

VDD-16

159

VDD-17

160

VDD-18

163

VDD-19

257

VPP-1

259

VPP-2

164

VREF_CA

258

VTT

167

VSS-53

168

VSS-54

171

VSS-55

172

VSS-56

175

VSS-57

176

VSS-58

180

VSS-59

181

VSS-60

184

VSS-61

185

VSS-62

188

VSS-63

189

VSS-64

192

VSS-65

193

VSS-66

196

VSS-67

197

VSS-68

201

VSS-69

202

VSS-70

205

VSS-71

206

VSS-72

209

VSS-73

210

VSS-74

213

VSS-75

214

VSS-76

217

VSS-77

218

VSS-78

222

VSS-79

223

VSS-80

226

VSS-81

227

VSS-82

230

VSS-83

231

VSS-84

234

VSS-85

235

VSS-86

238

VSS-87

239

VSS-88

243

VSS-89

244

VSS-90

247

VSS-91

248

VSS-92

251

VSS-93

252

VSS-94

261

261

262

262

MEC1

MEC2

MEC1

MEC2

C445

C0.1u6.3X4

C168

C0.1u6.3X4

C447

C0.1u6.3X4

VPP_DDR

C439
C2.2u6.3X4

DIMM_DQ_VREF_B

VTT_DDR

C430
C4.7u6.3X6

VCC_DDR

C551 C0.1u6.3X4
C515 C0.1u6.3X4
C244 C0.1u6.3X4
C561 C0.1u6.3X4

C505 C1u16X4
C460 C1u16X4
C489 C1u16X4
C518 C1u16X4

C534 C10u6.3X6

VCC_DDR

R297
1K1%4

R301 0R/4

R304
1K1%4

CPU_DQ_VREF_B

R306 2R1%4

C190
C0.022u25X4

R318

24.9R1%4

DIMM_DQ_VREF_B

C226

C0.1u6.3X4

C178

C0.1u6.3X4

Title

Title

Title

DDR4 SO-DIMM2 STD

DDR4 SO-DIMM2 STD

DDR4 SO-DIMM2 STD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

8 35Friday, March 31, 2017

8 35Friday, March 31, 2017

1

8 35Friday, March 31, 2017

10

5

PCH-USB/PCIE/DMI/SATA

USB1~2 for Rear USB3.0(LAN_USB1)
USB3~4 for Rear USB3.0(COM_USB1)

USB3_TX1P(19)
USB3_TX1N(19)
USB3_TX2P(19)
USB3_TX2N(19)
USB3_TX3P(23)

D D

The xHCI controller provides a
USB 3.0 debug port capability
on all SuperSpeed ports.

C C

B B

A A

USB3_TX3N(23)
USB3_TX4P(23)
USB3_TX4N(23)

USB3_RX1P(19)
USB3_RX1N(19)
USB3_RX2P(19)
USB3_RX2N(19)
USB3_RX3P(23)
USB3_RX3N(23)
USB3_RX4P(23)
USB3_RX4N(23)

USB5~9 & PCI-E1~3
No functtion for H110

PE4_LAN_TXP(19)
PE4_LAN_TXN(19)

PE4_LAN_RXP(19)
PE4_LAN_RXN(19)

PE5_PCIE_TXP(21)
PE5_PCIE_TXN(21)
PE6_PCIE_TXP(21)
PE6_PCIE_TXN(21)

PE5_PCIE_RXP(21)
PE5_PCIE_RXN(21)
PE6_PCIE_RXP(21)
PE6_PCIE_RXN(21)

R314 100R1%4

PCIE_RCOMP 12/15mil
RCOMPP&RCOMPN
Miss-match<1%

PCIECOMP_P
PCIECOMP_N

SATA0B_TXP
SATA0B_TXN
SATA1B_TXP
SATA1B_TXN

5

PCH1A

B11

USB3_1_TXP

C11

USB3_1_TXN

A12

USB3_2_TXP/SSIC_1_TXP

B12

USB3_2_TXN/SSIC_1_TXN

D13

USB3_3_TXP/SSIC_2_TXP

C13

USB3_3_TXN/SSIC_2_TXN

B13

USB3_4_TXP

A14

USB3_4_TXN

C14

USB3_5_TXP

B14

USB3_5_TXN

C15

USB3_6_TXP

B15

USB3_6_TXN

A7

USB3_1_RXP

B7

USB3_1_RXN

B8

USB3_2_RXP/SSIC_1_RXP

C8

USB3_2_RXN/SSIC_1_RXN

A9

USB3_3_RXP/SSIC_2_RXP

B10

USB3_3_RXN/SSIC_2_RXN

G11

USB3_4_RXP

E11

USB3_4_RXN

H13

USB3_5_RXP

G13

USB3_5_RXN

K13

USB3_6_RXP

K15

USB3_6_RXN

B16

PCIE1_TXP/USB3_7_TXP

A16

PCIE1_TXN/USB3_7_TXN

C19

PCIE2_TXP/USB3_8_TXP

B19

PCIE2_TXN/USB3_8_TXN

C20

PCIE3_TXP/USB3_9_TXP

B20

PCIE3_TXN/USB3_9_TXN

A21

PCIE4_TXP/USB3_10_TXP

B21

PCIE4_TXN/USB3_10_TXN

G15

PCIE1_RXP/USB3_7_RXP

H15

PCIE1_RXN/USB3_7_RXN

G17

PCIE2_RXP/USB3_8_RXP

E17

PCIE2_RXN/USB3_8_RXN

K17

PCIE3_RXP/USB3_9_RXP

L17

PCIE3_RXN/USB3_9_RXN

G19

PCIE4_RXP/USB3_10_RXP

E20

PCIE4_RXN/USB3_10_RXN

C22

PCIE5_TXP

D22

PCIE5_TXN

A23

PCIE6_TXP

B22

PCIE6_TXN

B23

PCIE7_TXP

C23

PCIE7_TXN

B24

PCIE8_TXP

C24

PCIE8_TXN

L19

PCIE5_RXP

K19

PCIE5_RXN

E22

PCIE6_RXP

G22

PCIE6_RXN

K22

PCIE7_RXP

L22

PCIE7_RXN

L24

PCIE8_RXP

K24

PCIE8_RXN

C17

PCIE_RCOMPP

B18

PCIE_RCOMPN

Lane11 of H110 is N/A and lane 12 only can be used for LAN
only.

PCH1B

B31

PCIE9_TXP/SATA0A_TXP

C31

PCIE9_TXN/SATA0A_TXN

B32

PCIE10_TXP/SATA1A_TXP

C32

PCIE10_TXN/SATA1A_TXN

B33

PCIE11_TXP

C33

PCIE11_TXN

A35

PCIE12_TXP

B35

PCIE12_TXN

B36

PCIE13_TXP/SATA0B_TXP

C36

PCIE13_TXN/SATA0B_TXN

C38

PCIE14_TXP/SATA1B_TXP

B38

PCIE14_TXN/SATA1B_TXN

A39

PCIE15_TXP/SATA2_TXP

B39

PCIE15_TXN/SATA2_TXN

A40

PCIE16_TXP/SATA3_TXP

A41

PCIE16_TXN/SATA3_TXN

F45

PCIE17_TXP/SATA4_TXP

E45

PCIE17_TXN/SATA4_TXN

G44

PCIE18_TXP/SATA5_TXP

G45

PCIE18_TXN/SATA5_TXN

H44

PCIE19_TXP

H43

PCIE19_TXN

J45

PCIE20_TXP

K44

PCIE20_TXN

PCIe/USB 3

PCIe

SPT-H_PCH

PCIe/SATA

2 OF 10

SPT-H_PCH

USB 2.0USB 3.0

USB11~16 :
No function for H110

DMI

1 OF 12

PCIE9_RXP/SATA0A_RXP

PCIE9_RXN/SATA0A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_RXN/SATA1A_RXN

PCIE13_RXP/SATA0B_RXP
PCIE13_RXN/SATA0B_RXN
PCIE14_RXP/SATA1B_RXP
PCIE14_RXN/SATA1B_RXN

PCIE15_RXP/SATA2_RXP

PCIE15_RXN/SATA2_RXN

PCIE16_RXP/SATA3_RXP

PCIE16_RXN/SATA3_RXN

PCIE17_RXP/SATA4_RXP

PCIE17_RXN/SATA4_RXN

PCIE18_RXP/SATA5_RXP

PCIE18_RXN/SATA5_RXN

4

GPP_E8/SATALED#

4

PCIE11_RXP
PCIE11_RXN
PCIE12_RXP
PCIE12_RXN

PCIE19_RXP
PCIE19_RXN
PCIE20_RXP
PCIE20_RXN

SPT-H

AG7

USB2P_1

AF5

USB2N_1

AD7

USB2P_2

AD5

USB2N_2

AG10

USB2P_3

AG8

USB2N_3

AE2

USB2P_4

AE1

USB2N_4

AC3

USB2P_5

AC2

USB2N_5

AF3

USB2P_6

AF2

USB2N_6

AB2

USB2P_7

AB3

USB2N_7

AL7

USB2P_8

AL8

USB2N_8

AA2

USB2P_9

AA1

USB2N_9

AJ7

USB2P_10

AJ8

USB2N_10

W3

USB2P_11

W2

USB2N_11

AD2

USB2P_12

AD3

USB2N_12

V1

USB2P_13

V2

USB2N_13

AJ13

USB2P_14

AJ11

USB2N_14

USB2_COMP

USB2_VBUSSENSE

USB2_ID

DMI_TXP0
DMI_TXN0

DMI_TXP1
DMI_TXN1

DMI_TXP2
DMI_TXN2

DMI_TXP3
DMI_TXN3

DMI_RXP0
DMI_RXN0

DMI_RXP1
DMI_RXN1

DMI_RXP2
DMI_RXN2

DMI_RXP3
DMI_RXN3

SPT-H

H31
G31
E29

Sku15&16 only support PCIe/GbE for H110

G29
K31
L31

SATA Port 0/1 can be configured to

H33

PCIe Ports 9/10 or 13/14

G33

E35
G35
E37
D39
E41
F41
E42
D43

H40
H42
G37
K37
L39
L37
N38
N39

AD44

USB2_COMP<500mil

USB2_COMP

AG3

USB2_VBUSSENSE

AD10

USB2_ID

AG2

DMI_RXP0

B27

DMI_RXN0

C27

DMI_RXP1

A28

DMI_RXN1

B28

DMI_RXP2

C29

DMI_RXN2

B29

DMI_RXP3

A30

DMI_RXN3

B30

DMI_TXP0

N27

DMI_TXN0

L27

DMI_TXP1

G24

DMI_TXN1

E24

DMI_TXP2

E26

DMI_TXN2

G27

DMI_TXP3

K29

DMI_TXN3

L29

SATA0B_RXP
SATA0B_RXN
SATA1B_RXP
SATA1B_RXN

PCH_SATA_LED#

USB1+(19)
USB1-(19)
USB2+(19)
USB2-(19)
USB3+(23)
USB3-(23)
USB4+(23)
USB4-(23)
USB5+(16)
USB5-(16)
USB6+(16)
USB6-(16)
USB7+(24)
USB7-(24)
USB8+(23)
USB8-(23)
USB9+(21)
USB9-(21)
USB10+(17)
USB10-(17)
USB11+(17)
USB11-(17)
USB12+(17)
USB12-(17)
USB13+(17)
USB13-(17)
USB14+(17)
USB14-(17)

DMI_RXP0(3)
DMI_RXN0(3)

DMI_RXP1(3)
DMI_RXN1(3)

DMI_RXP2(3)
DMI_RXN2(3)

DMI_RXP3(3)
DMI_RXN3(3)

DMI_TXP0(3)
DMI_TXN0(3)

DMI_TXP1(3)
DMI_TXN1(3)

DMI_TXP2(3)
DMI_TXN2(3)

DMI_TXP3(3)
DMI_TXN3(3)

R393 X_10K/4

3

USB1~2 for Rear USB3.0(LAN_USB1)

(OC#0)

USB3~4 for Rear USB3.0(COM_USB1)

(OC#1)

USB5~6 for LVDS Conn. (OC#2)
USB7 for PUSB (OC#3)

USB8 for EXP. BD. (OC#4)
USB9 for Mini PCI-E2
USB10 for GL-850G USB2.0 HUB
USB11~12 for OSD BD (Normal_PWR)

(OC#6)

USB13~14 for OSD BD (BIOS_PWR)

(OC#7)

R386 113R1%4
R375 1K/4
R385 1K/4

+3V

3

2

SATA Riser Connector

B

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18

ST_TXP0SATA0B_TXP

ST_RXN0
ST_RXP0

+3VA

CE

Q32

N-MMBT3904

SATA1

12V
12V
12V
GND
SMCLK
SMDATA
GND

3.3V
JTAG1

3.3VAUX
WAKE_#

RSVD
GND
HSOP0+
HSOP0­GND
PRSNT2_#
GND

SLOT-PCI36P-2PITCH

PRSNT1_#

SATA1B_TXP ST_TXP1
SATA1B_TXNST_TXN0

SATA1B_RXN
SATA1B_RXP

PLTRST# Buffer

+3VA

5

VCC

3

A Y

GND

2

+3VA

5

U24B

VCC

1

A Y

GND

2

Title

Title

Title

PCH-USB/PCIE/DMI/SATA

PCH-USB/PCIE/DMI/SATA

PCH-USB/PCIE/DMI/SATA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5V

1A

L11
80L6A-30/8

SATA_5V

C107

C10u10Y8

SATA0B_TXN
SATA0B_RXN

SATA0B_RXP

SATA-0B SATA-1B

PLTRST#(12)

C97

C0.1u6.3X4

0.1uf caps placed on riser BD.

R188 0R/4
R191 0R/4

R162 0R/4
R184 0R/4

R323
10K1%4

R307 10K1%4

2

A1
A2

12V

A3

12V

A4

GND

A5

JTAG2

A6

JTAG3

A7

JTAG4

A8

JTAG5

A9

3.3V

A10

3.3V

A11

PWRGD

X1

X1

A12

GND

A13

REFCLK+

A14

REFCLK-

A15

GND

A16

HSIP0+

A17

HSIP0-

A18

GND

X2

X2

C278 C0.1u6.3X4

U24A

4

RSTOUT0#

NC7WZ14P6X_SC70

6

RSTOUT1#

ST_RXN1
ST_RXP1

ST_TXP1
ST_TXN1

ST_RXN0
ST_RXP0

ST_TXP0
ST_TXN0

R116 0R/4
R122 0R/4

R106 0R/4
R108 0R/4

R319 33R1%4
R316 33R1%4
R311 33R1%4

R324 33R1%4

R308 33R1%4
R309 33R1%4
R310 33R1%4

R925 X_33R1%4

DMS-SA30

DMS-SA30

DMS-SA30

1

ST_TXN1
ST_RXN1

ST_RXP1

RST_SIO#(22)
RST_LAN#(19)
RST_CH7517#(18)
RST_TPM#(13,21)

RST_PCIE1#(21)
RST_PCIE2#(21)
RST_JTPM#(21)
RST_GL850#(17)

10

10

9 35Friday, March 31, 2017

9 35Friday, March 31, 2017

1

9 35Friday, March 31, 2017

10

5

Vinafix.com

PCH-Audio & Display

4

3

2

1

Port B

Port C

Port D

eDP

4 OF 10

3

GPP_I[3:0] with SMI/NMI

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRL DATA

GPP_I0/DDPB_HPD0

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDA TA

GPP_I1/DDPC_HPD1

GPP_I9/DDPD_CTRLCLK

GPP_I10/DDPD_CTRLDATA

GPP_I2/DDPD_HPD2

GPP_I3/DDPE_HPD3

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

GPP_I4/EDP_HPD

CLKOUT_CPUBCLK_P
CLKOUT_CPUBCLK_N

CLKOUT_ CPUNSSC_ P
CLKOUT_ CPUNSSC_ N

CLKOUT_CPUPCIBCLK_P
CLKOUT_CPUPCIBCLK_N

CLKOUT_ITPXDP_P
CLKOUT_ITPXDP_N

CLKOUT_PCIE_P0
CLKOUT_ PCIE_N0
CLKOUT_PCIE_P1
CLKOUT_ PCIE_N1
CLKOUT_PCIE_P2
CLKOUT_ PCIE_N2
CLKOUT_PCIE_P3
CLKOUT_ PCIE_N3
CLKOUT_PCIE_P4
CLKOUT_ PCIE_N4
CLKOUT_PCIE_P5
CLKOUT_ PCIE_N5
CLKOUT_PCIE_P6
CLKOUT_ PCIE_N6
CLKOUT_PCIE_P7
CLKOUT_ PCIE_N7
CLKOUT_PCIE_P8
CLKOUT_ PCIE_N8
CLKOUT_PCIE_P9

CLKOUT_ PCIE_N9
CLKOUT_PCIE_P10
CLKOUT_ PCIE_N10
CLKOUT_PCIE_P11
CLKOUT_ PCIE_N11
CLKOUT_PCIE_P12
CLKOUT_ PCIE_N12
CLKOUT_PCIE_P13
CLKOUT_ PCIE_N13
CLKOUT_PCIE_P14
CLKOUT_ PCIE_N14
CLKOUT_PCIE_P15
CLKOUT_ PCIE_N15

SPT-H

PCH_DDPB_CTRLCLK

BA5

PCH_DDPB_CTRLDATA

BC4

PCH_D DPB_HPD

AW4

HDMI_DDPC_CTRLCLK

BB3

HDMI_DDPC_CTRLDATA

BD6

HDMI_DDPC_HPD

AY2

DSP_DDPD_CTRLCLK

BE5

DSP_DDPD_CTRLDATA

BE6

DSP_DDPD_HPD

AV4

BA4

R509 100K/4

W36
W35
W42
BD7

R950 100K/4

SPT-H

PCH_CPU_BCLK_DP

G2

PCH_CPU_BCLK_DN

H2

PCH_CPU_NSSC_CLK_DP

G1

PCH_CPU_NSSC_CLK_DN

F1

PCH_CPU_PCIE_DP

J2

PCH_CPU_PCIE_DN

J1
L2

L1

N8
N7
L5
L7
F2
D3
G4
E5
E6
D5
D7
D8
R7
R8
U7
U5
W11
W10
N2
N3
P2
P3
R4
R3
U3
U2
Y5
W7
R2
P1
R11
R13

TP37
TP38

Any single ended / differential clock pair not being
used
must be left as no connect and its associated clock
buffer
must be disabled by means of the Intel ME FW.

TP71

PCH_DDPB_HPD (18)

HDMI_DDPC_CTRLCLK (16)
HDMI_DDPC_CTRLDATA (16)

DSP_DDPD_CTRLCLK (1 8)
DSP_DDPD_CTRLDATA (18)
DSP_DDPD_HPD (18)

SIO_SMI# (12,22)

CRB connect to
eSIO's SMI#

PCH_CPU_BCLK_DP (3)
PCH_CPU_BCLK_DN (3 )

PCH_CPU_NSSC_CLK_DP (3)
PCH_CPU_NSSC_CLK_DN (3)

PCH_CPU_PCIE_DP (3)
PCH_CPU_PCIE_DN (3)

CLK_LAN_DP (19)
CLK_LAN_DN (19)

CLK_PE5_DP (21)
CLK_PE5_DN (21)
CLK_PE6_DP (21)
CLK_PE6_DN (21)

2

PCH_DDPB_CTRLDATA
PCH_DDPB_HPD

HDMI_DDPC_CTRLCLK&DATA
pulled up to +3V @ scalar side.

HDMI_DDPC_HPD

DSP_DDPD_CTRLCLK
DSP_DDPD_CTRLDATA

DDP*_CTRLDATA: This signal has a weak internal pull-down.
0 = Port * is not detected. (Default)
1 = Port * is detected.
Note s:

1. The internal pull-down is disabled after PLTRST#
de-asserts.

2. This signal is in the primary well.

Ti t l e

Ti t l e

Ti t l e

PCH-Audio/Display/Clock

PCH-Audio/Display/Clock

PCH-Audio/Display/Clock

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R9 49 2.2K/4
R4 88 X_10K/4
R4 87 100K/4

R5 06 1M/4
R4 89 X_20K/4

R4 77 2.2K/4
R4 82 2.2K/4

DMS-SA30

DMS-SA30

DMS-SA30

10 35Friday, March 31, 2017

10 35Friday, March 31, 2017

1

10 35Friday, March 31, 2017

AZ_BITCLK_RAZ_BITCLK
AZ_RST#_RAZ_RST#

AZ_SDOUT_R
AZ_SYNC_RAZ_SYNC

PCH_C PU_AUD_SD O_R
PCH_CPU_AUD_SCLK_R

R427 33R/4
R428 33R/4

R517 33R/4
R466 33R/4

R555 33R/4
R490 33R/4

AZ_BITCLK(20)
AZ_RST#(20)
AZ_SDIN0(20)

D D

AZ_SDOUT(20)
AZ_SYNC(20)

PCH_CPU_AUD_SDO(3)
PCH_CPU_AUD_SDI(3 )
PCH_CPU_AUD_SCLK(3)

AZ_SDIN0

AZ_SDOUT

Flash Descriptor Security Override

+3VSUS

R544
1K1%4

AZ_SDOUT_R

C C

PCH-Clock

B B

A A

1-2(Default): ME Enable
2-3: ME Disable

N31-1030151+N33-1020331

1
2
3

JME1

Pull up at device sdie

+3VSUS

if connect CLKREQ# to device.

R513 10K/4
R411 10K/4
R410 X_10K/4
R498 10K/4
R826 10K/4
R472 X_10K/4
R440 X_10K/4
R437 10K/4
R507 10K/4
R516 10K/4
R464 10K/4
R485 10K/4
R454 10K/4
R442 10K/4
R465 10K/4
R500 10K/4

This signal has a weak internal pull-down
and disabled after PLTRST# deasserts.
0 = Enable security measures defined in the Flash
Descriptor. (Default)
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external

G

5

pull-up in manufacturing/debug environments ONLY.
*Sampled@Rising edge of PCH_PWROK

CLK_IO_24M(22 )

CLK_SIO_24M(22)
CLK_TPM_24M(21)

CLK_JTPM_24M(2 1)

TP49

PCH_CLK5_1P0

Y 2

CLKREQ#2_LAN(19)

CLKREQ#5_PE1(21)
CLKREQ#6_PE2(21)

XTAL_24M_PCH_OUT
XTAL_24M_PCH_IN

C189
C15p50N6

CLKREQ#0
CLKREQ#1
CLKREQ#2_LAN

CLKREQ#3
CLKREQ#4
CLKREQ#5_PE1
CLKREQ#6_PE2

CLKREQ#7
CLKREQ#8
CLKREQ#9
CLKREQ#10
CLKREQ#11
CLKREQ#12
CLKREQ#13
CLKREQ#14
CLKREQ#15

R315 1M1%6

1 2

24MHZ12P_S

C195
C12p50N6

R469 22R/4
R494 22R/4

R827 22R/4
R828 22R/4

Reserve For Server BMC

R327 2.7K1%4

CLK_PCH_LPC0
CLK_PCH_LPC1
CLKOUT_48M

XCLK_BIASREF

XCLK_BIASREF < 500 mil

CLKREQ#0
CLKREQ#1

CLKREQ#2_LAN

CLKREQ#3
CLKREQ#4

CLKREQ#5_PE1
CLKREQ#6_PE2

CLKREQ#7
CLKREQ#8
CLKREQ#9
CLKREQ#10
CLKREQ#11
CLKREQ#12
CLKREQ#13
CLKREQ#14
CLKREQ#15

XTAL_24M_PCH_IN
XTAL_24M_PCH_OUT

MOW04'15:
Whendesigning a Skylake platform, it is critical to follow all the XTAL_IN/XTAL_OUT
24-MHzcrystalrouting guidelinescoveredinthe “24-MHzCrystal andAss oc ia te d RC
ComponentRouting Guidelines”cha pt e r withinthe following platform designguides:
Skylake UandYPlatformDesignGuide- IBP# 543016
Skylake H PlatformDesignGu ide -IBP# 546884
Skylake SP l a tformandGreenlow WSPlatform - IBP# 543611
The crystaloscillatorcomponents andtheirXTAL_IN/ XTAL_OUT si gnal s are highl y
sensitivetoboard noi s e.Care must betakenwhen routing andplacingthese
components andsignals on themotherboard toprovide shiel di ng fr om anynoisy
oscillator. Th e guidelinescoveredintheassociatedplatformdesignguides listed
aboveprovide theguidelines needed toensure thebest environment for these
components andsignals.A ny deviationfrom theseguidelinescouldresultinpla tform
clockinstabilities.

MHz: 2*CL-3-7
KHz: (CL-3)*2-7

4

PCH1D

BA9

HDA_BCL K

BD8

HDA_RST#

BE7

HDA_SDI0

BC8

HDA_SDI1

BB7

HDA_SDO

BD9

HDA_SYNC

AM1

DISPA_ SDO

AN2

DISPA_ SDI

AM2

DISPA_ BCLK

AL42

GPP_D8/SSP0_SCLK

AN42

GPP_D7/SSP0_RXD

AM43

GPP_D6/SSP0_TXD

AJ33

GPP_D5/SSP0_SFRM

AH44

GPP_D20/DMIC_DATA0

AJ35

GPP_D19/DMIC_CLK0

AJ38

GPP_D18/DMIC_DATA1

AJ42

GPP_D17/DMIC_CLK1

PCH1C

BC17

GPP_A9/CLKOUT_LPC0/ESPI_CLK

AV19

GPP_A10/CLKOUT_LPC1

AR17

GPP_A16/CLKOUT_48

E1

XCLK_BIASREF

BC24

GPP_B5/SRCCLKREQ0#

AW24

GPP_B6/SRCCLKREQ1#

AT24

GPP_B7/SRCCLKREQ2#

BD25

GPP_B8/SRCCLKREQ3#

BB24

GPP_B9/SRCCLKREQ4#

BE25

GPP_B10/SRCCLKREQ5#

AT33

GPP_H0/SRCCLKREQ6#

AR31

GPP_H1/SRCCLKREQ7#

BD32

GPP_H2/SRCCLKREQ8#

BC32

GPP_H3/SRCCLKREQ9#

BB31

GPP_H4/SRCCLKREQ10#

BC33

GPP_H5/SRCCLKREQ11#

BA33

GPP_H6/SRCCLKREQ12#

AW33

GPP_H7/SRCCLKREQ13#

BB33

GPP_H8/SRCCLKREQ14#

BD33

GPP_H9/SRCCLKREQ15#

A6

XTAL24_IN

A5

XTAL24_OUT

SPT- H_ PCH

AUDIO

SPT- H_PCH

Clock

3 OF 10

+3V

+3V

10

10

10

PCH-GPIO

5

4

3

2

1

+3VSUS

D D

WLAN_DIS# Pull-up to +3V
with 8.2KR @connector
side.

MPE1_DIS# Pull-up to +3V _TV
with 8.2KR @connector side.

C C

B B

R525 0R/6

+3.3V_AUX for LPC.
+1.8V_AUX for ESPI.

VCCPGPPA

VCCPGPPA

RI_EN(23)

GPP_G0

TP62

+3VSUS

C555 C0.1u6.3X4

WLAN_DIS#(21)

MPE1_DIS#(21)

NO_REBOOT(14)

BOOT_BIOS_SEL(14)

GPP_H12(14)

TP47
TP54

TP60
TP56

GPP_B15
GPP_B16

GPP_H10
GPP_H11
GPP_H12

PCH1F

BA31

VCCPGPPA

BC19

GPP_A17/ISH_GP7

BB22

GPP_A18/ISH_GP0

BD21

GPP_A19/ISH_GP1

BD22

GPP_A20/ISH_GP2

BE21

GPP_A21/ISH_GP3

BD18

GPP_A22/ISH_GP4

BC22

GPP_A23/ISH_GP5

BC42

VCCPGPPBCH_BC42

BD40

VCCPGPPBCH_BD40

BC23

GPP_B3/CPU_GP2

BD24

GPP_B4/CPU_GP3

AN24

GPP_B11

AR24

GPP_B15/GSPI0_CS#

AW27

GPP_B16/GSPI0_CLK

BD27

GPP_B17/GSPI0_MISO

BD28

GPP_B18/GSPI0_MOSI

BC27

GPP_B19/GSPI1_CS#

AV29

GPP_B20/GSPI1_CLK

AR29

GPP_B21/GSPI1_MISO

AT29

GPP_B22/GSPI1_MOSI

BA41

GPP_C8/UART0_RXD

AV44

GPP_C9/UART0_TXD

AV43

GPP_C10/UART0_RTS#

AU44

GPP_C11/UART0_CTS#

AU43

GPP_C12/UART1_RXD/ISH_UART1_RXD

AT43

GPP_C13/UART1_TXD/ISH_UART1_TXD

AT44

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

AU41

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

AT42

GPP_C16/I2C0_SDA

AR38

GPP_C17/I2C0_SCL

AR44

GPP_C18/I2C1_SDA

AR41

GPP_C19/I2C1_SCL

AR45

GPP_C20/UART2_RXD

AR39

GPP_C21/UART2_TXD

AN44

GPP_C22/UART2_RTS#

AN43

GPP_C23/UART2_CTS#

BD34

GPP_H10/SML2CLK

AW35

GPP_H11/SML2DATA

BD35

GPP_H12/SML2ALERT#

BC35

GPP_H13/SML3CLK

BA35

GPP_H14/SML3DATA

BB36

GPP_H15/SML3ALERT#

BD39

GPP_H16/SML4CLK

BE34

GPP_H17/SML4DATA

BC36

GPP_H18/SML4ALERT#

BB38

GPP_H19/ISH_I2C0_SDA

BC38

GPP_H20/ISH_I2C0_SCL

BE39

GPP_H21/ISH_I2C1_SDA

BD38

GPP_H22/ISH_I2C1_SCL

BD36

GPP_H23

GPIO A

GROUP BCH PWR

GPIO B

GPIO C

GPIO H

SPT-H_PCH

GROUP D PWR

GPIO D

GROUP EF PWR

GPIO E

GPIO F

GPIO G

GPIO DSW

6 OF 10

VCCPGPPD_BC44
VCCPGPPD_BA45
VCCPGPPD_BC45
VCCPGPPD_BB45

GPP_D4/ISH_I2C2_SDA

GPP_D9
GPP_D10
GPP_D11

GPP_D13/ISH_UART0_RXD

GPP_D14/ISH_UART0_TXD
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#

GPP_G17/ADR_COMPLETE

GPP_D12

GPP_D23/ISH_I2C2_SCL

VCCPGPPEF_AJ41

VCCPGPPEF_AL41

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1

GPP_F10/SCLOCK

GPP_F11/SLOAD
GPP_F12/SDATAOUT1
GPP_F13/SDATAOUT0

GPP_F14
GPP_F22
GPP_F23

VCCPGPPG

GPP_G0/FAN_TACH_0
GPP_G1/FAN_TACH_1
GPP_G2/FAN_TACH_2
GPP_G3/FAN_TACH_3
GPP_G4/FAN_TACH_4
GPP_G5/FAN_TACH_5
GPP_G6/FAN_TACH_6
GPP_G7/FAN_TACH_7

GPP_G8/FAN_PWM_0

GPP_G9/FAN_PWM_1
GPP_G10/FAN_PWM_2
GPP_G11/FAN_PWM_3

GPP_G12/GSXDOUT

GPP_G13/GSXSLOAD

GPP_G14/GSXDIN

GPP_G15/GSXSRESET#

GPP_G16/GSXCLK

GPP_G20
GPP_G21
GPP_G22
GPP_G23

VCCDSW_3P3_BA24

GPD7/RSVD

SPT-H

BC44
BA45
BC45
BB45

GPP_D4

AM44

GPP_D9

AL44
AL36
AL35
AJ39
AK45
AK44
AL43
AJ43
AJ44

AJ41
AL41

PCH_RI# PCH_RI#

AF41
AE44

AB33

PCH_RSVD

AB35

SV_ADVANCE

AA45

GFX_CRB_DETECT

AA44

CPU_SKTOCC#

Y44
W39

GPP_F23

V44

C541 C0.1u6.3X4

AD41

CDW_GPO0

U43

CDW_GPO1

U42

CDW_GPO2

U41
M44

CDST

U36

CDS1

P44

CDS2
CDW_GPI

T45
T44

GPP_G8

R44

GPP_G9

R43
U39
N42
R39
R36
R42
R41
P43
N44

TEST_SETUP_MENU

R35

GPP_G21

U35

GPP_G22

L44

GPP_G23

L43

BA24
BD14

GPD7

VCCPGPPD

Symbol Rev1.0 Update:

TP14

AM44: GPP_D4 / ISH_I2C2_SDA / I2C3_SDA

TP12

AJ44: GPP_D23 / ISH_I2C2_SCL / I2C3_SCL

C545 C0.1u6.3X4

PCH_RI#(23)

CPU_SKTOCC#(3)

TP10

+3VSUS

CDW_GPO0(25)
CDW_GPO1(25)
CDW_GPO2(25)
CDST(23)
CDS1(23)
CDS2(23)
CDW_GPI(25)

TP7
TP8

+3VA

TP65

+3VSUS

R881 X_10K/4
R882 X_10K/4
R879 X_10K/4

R860 X_10K/4
R861 X_10K/4

Group D PWR
LPT-H: 3.3V (For Interposer)
SKL_PCH_H: 1.8V

+3VSUS

R450 0R/6

PCH_RSVD

SV_ADVANCE

GFX_CRB_DETECT

GFX Style
0: Normal GFX
1: Customer GFX

CDW_GPO0
CDW_GPO1
CDW_GPO2

CDST
CDS1
CDS2

CDW_GPI

Test Setup Menu
0: Enable
1: Disable

TEST_SETUP_MENU

GPP_G21
GPP_G22
GPP_G23

VCCPGPPD

R391 X_10K/4
R362 X_10K/4

R361 10K/4
R371 X_20K/4

R370 20K/4
R381 X_10K/4

R380 X_10K/4
R379 10K/4

R811 X_10K/4
R353 X_10K/4
R345 X_10K/4
R341 10K/4
R366 X_10K/4
R348 X_10K/4
R352 10K/4

R347 X_10K/4
R346 10K/4

R355 X_10K/4
R342 X_10K/4
R343 X_10K/4

+3VSUS
+3V

+3VSUS
+3V

+3VSUS
+3V

+3V

+3V

+3VSUS
+3V

+3VSUS

PCH-USB_OC & SATAGP

+3VSUS

R392 10K/4
R394 10K/4
R401 10K/4
R382 10K/4
R372 10K/4
R354 10K/4
R363 10K/4
R364 10K/4

A A

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5
OC#6
OC#7

5

OC#0(19)
OC#1(23)
OC#2(16)
OC#3(24)
OC#4(23)

OC#6(17)
OC#7(17)

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5
OC#6
OC#7

PCH1E

AD43

GPP_E9/USB2_OC0#

AD42

GPP_E10/USB2_OC1#

AD39

GPP_E11/USB2_OC2#

AC44

GPP_E12/USB2_OC3#

Y43

GPP_F15/USB2_OCB_4

Y41

GPP_F16/USB2_OCB_5

W44

GPP_F17/USB2_OCB_6

W43

GPP_F18/USB2_OCB_7

AV2

CL_CLK

AV3

CL_DATA

AW2

CL_RST#

4

USB
OC#

CLINK

SPT-H_PCH

5 OF 10

SATA
DEVSLP

SATA
Strap

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_F5/DEVSLP3
GPP_F6/DEVSLP4
GPP_F7/DEVSLP5
GPP_F8/DEVSLP6
GPP_F9/DEVSLP7

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7

3

DEVSLP=H, requests the SATA device to
enter into the DEVSLP power state.

GPP_E4

AG42

GPP_E5

AG43
AE45
AB41
AB42
AB43
AB36
AB39

GPP_E2

AG36

GPP_F0

AG35
AG39
AD35

PEDET@M.2_1

AD31

0:SATA

AD38

1(NC):PCIE

AC43
AB44

SPT-H

TP42
TP41

TP13
TP11

Title

Title

Title

PCH-GPIO/USB_OC/SATAGP

PCH-GPIO/USB_OC/SATAGP

PCH-GPIO/USB_OC/SATAGP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

11 35Friday, March 31, 2017

11 35Friday, March 31, 2017

1

11 35Friday, March 31, 2017

10

5

Vinafix.com

PCH-LPC/SPI/SMB/MISC

LPC_AD0(21,22)

CRB1.1: PU to S5 PWR
CL: PU to S0 PWR

R835 10K/4

+3V

R495 X_10K/4

+3VSUS

R834 10K/4

+3V

D D

VBAT

18-25 ms RC delay
CRB: 30.1K+1uf

C C

VBAT

+3VSUS

B B

R467 3K1%4

+3V A

PDG: Int weak PU to DSW_3p3
CRB: PU with 3KR

R476 2.2K/4

+3V

R481 X_0R/4

WDTO#(22)

<Reserve for watch dog timer>

XDP_HOOK3(6)

C243 X_C0.1u6.3X4

EMI

R521

30.1K1%4

C254

R510

30.1K1%4

R420 1K/4
R443 1K/4
R413 150KR1%4
R412 X_20K1%4

C1u6.3X6

C238
C1u6.3X6

+3VSUS

R444 499R1%4
R455 499R1%4

SMLINK1_CLK
SMLINK1_DATA

MOW04'15:
To enable DCI (Direct Connect Interface) and PCHHOT# functionality, a 150K pull up
res ist or to +3 .3A v olta ge ra il w ill nee d to b e add ed. This pin w ill m ux wi th DC I boo t
stall bypass strap. To enable DCI, this pin must be low during the rising edge of
RSMRST#.

VBAT

+3V A

BAT54C:
Vf=0.24V
if I-=0.1mA

R5 3

1.5K1%4

R5 4

45.3KR1%4
C0.1u6.3X4

Z=3.24V(Y)-0.13V(Vf)
=3.11V<3.2V

A A

Close to PCH

C237 C18p50N6

32.768KHZ12.5p_S

C236 C18p50N6

RTC

Y 4

PIRQA#
KBRST#

PWRBTN#

FP_RST#

RTCRST#

R552

4.7K/4

SRTCRST#

PCH_SML1ALERT#

VBAT

PCH_SPI_MOSI
PCH_SPI_CLK

1-2: Default
2-3: RTC Reset

JBAT1

1
2

G

3

N31-1030151+N33-1020331

SMLINK0_CLK
SMLINK0_DATA

C222 X_C1000p16X 4
C224 X_C1000p16X 4

R526 1K/4

CRB1.1: PU to +V3P3A(S5_PWR)

On SKL , the VCCRTC max v olta ge i s be ing re duc ed to mini mize lea kage on th e
ESD diodes and prevent RTC oscillator problems. Whether VCCRTC is sourced from
Vbatt in G3 or VCCDSW_3p3 in Non-G3 state, platform designers must ensure the
effec tive volt age at VCC RTC DOES NOT exc eed 3.2 V .

Close to PCH

X

C1u6.3X6

R4 8
1K1%4

12

<1 inch

C38

BAT1
BAT2P_BLACK

Z

Y

D5

S-BAT54C_SOT23
C53

R458
10MR1%4

1 2

RTCX 2

RTCX 1

5

LPC_AD1(21,22)
LPC_AD2(21,22)
LPC_AD3(21,22)
LPC_FRAME#(21,22)
SERIRQ(21,22)

KBRST#(22)
LPC_DRQ#0(22)

PWRBTN#(22)
RSMRST#(22)

PCH_DRAM_RST#(7)

CPURST#(3,6)
PLTRST#(9)

DSW_PWROK(22)
PCH_PWROK(28)
SYS_PWROK(6,22)
CPU_PWRGD(3)

TP72

ME_TLS_ON(14)

SMLINK0_CLK(19)
SMLINK0_DATA(19)
LPC_ESPI_SEL(14)
SMLINK1_CLK(22)

SMLINK1_DATA(22)

+3VSUS

PCH_SPI_CS0#

PCH_SPI_CS0#

SPI_VCC3

R829 X_0R/4

R4 74 0R/4

R4 16 30R1%4

AN41~AG44:
Symbol Rev1.0
Update to GPP Function only.

+3V A

R838 0R/6
R837 X_0R/6

TL624-1.1: NI ; Old: I
PDG: IPU ; CRB: NI.

4

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

SERIRQ
PIRQA#
KBRST#

ESPI_RESET#

PWRBTN#
RSMRST#

PCH_D RAM_RST#
FP_RST#
CPURST#

PLTRST#_R

DSW_PWROK
PCH_PWROK
SYS_PWROK
CPU_PWRGD_R

PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_CLK

PCH_SPI_CS#
PCH_SPI_CS2#

PCH_SPI_IO2
PCH_SPI_IO3

RTCX 1
RTCX 2
RTCRST#
SRTCRS T#

SMBCLK_VSB
SMBDATA_VSB
ME_TLS_ON

SMLINK0_CLK
SMLINK0_DATA
LPC_ESPI_SEL
SMLINK1_CLK
SMLINK1_DATA
PCH_SML1ALERT#

SPI_VCC3 SPI_VCC3 SPI_VCC3

R557 0R/4

TL624-1.1: I ; Old: NI

D19

ESD-MLVS0402L04

Close to JSPI1

SPI_VCC3

R558
X_2.2K/4

R549 33R/4
R542 33R/4

R534 1K/4

4

PCH1G

AT22

GPP_A1/LAD0/ESPI_IO0

AV22

GPP_A2/LAD1/ESPI_IO1

AT19

GPP_A3/LAD2/ESPI_IO2

BD16

GPP_A4/LAD3/ESPI_IO3

BE16

GPP_A5/LFRAME#/ESPI_CS#

BA17

GPP_A6/SERIRQ

AW17

GPP_A7/PIRQA#/ESPI_ALERT0#

AT17

GPP_A0/RCIN#/ESPI_ALERT1#

BC18

GPP_A14/SUS_STAT#/ESPI_RESET#

AT13

GPD3/PWRBTN#

BA11

RSMRST#

BC14

DRAM_RESET#

AW1

SYS_RESET#

AK2

PLTRST_CPU#

BB27

GPP_B13/PLTRST#

AV11

DSW_PWROK

AW11

PCH_PWROK

AY1

SYS_PWROK

AM3

PROCPW RGD

BB29

SPI0_MOSI

BE30

SPI0_MISO

BC31

SPI0_CLK

BD31

SPI0_CS0#

AW31

SPI0_CS1#

AT31

SPI0_CS2#

BC29

SPI0 _IO2

BD30

SPI0 _IO3

AN41

GPP_D3/SPI1_MOSI

AN38

GPP_D2/SPI1_MISO

AN36

GPP_D1/SPI1_CLK

AL39

GPP_D0/SPI1_CS#

AH43

GPP_D22/SPI1_IO3

AG44

GPP_D21/SPI1_IO2

BC9

RTCX1

BD10

RTCX2

BC10

RTCRST#

BB10

SRTCRST#

AW44

GPP_C0/SMBCLK

BB43

GPP_C1/SMBDATA

BB41

GPP_C2/SMBALERT#

AY44

GPP_C3/SML0CLK

BB39

GPP_C4/SML0DATA

BA40

GPP_C5/SML0ALERT#

AW42

GPP_C6/SML1CLK

AW45

GPP_C7/SML1DATA

AT27

GPP_B23/SML1ALERT#/PCHHOT#

SPI Debug Port

Close to SPI ROM

PCH_SPI_MISO
PCH_SPI_CS#

SPI_SW_SEL
PCH_SPI_IO2 PCH_SPI_IO3

12

12

D20
ESD-MLVS0402L04

TL624-1.1: I
Old: NI if it PU to +12V

SPI FLASH ROM

Close to PCH(1"~8")

1

SPI1_MISOPCH_SPI_MISO

2

SPI1_IO2

3
4

1 2
3 4
5
7 8
9

U2 9

CS

VCC

DO

HLOD

WP

CLK

GND DI

SPIFLASH-8P_BLACK

N14-0080030-L06

JSPI1

H2X6[10]M-2PITCH_BLACK

LPC/eSPI

SPI

RTC

SMBUS

PCH_SPI_MOSI
PCH_SPI_CLK

6

1211

SPI_VCC3

C565 C0.1u6.3X4
C566 C10u6.3X6

8

SPI1_IO3

7

SPI1_CLKPCH_SPI_IO2

6

SPI1_MOSI

5

CLK&Data length matched
<500mils.

3

S P T - H _ PC H

GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#

LANPHY

GPP_A13/SUSWARN#/SUSPWRDNACK

PECI Pull-down follow CRB
Thermalthip

PDG 600 ohm, CRB 560ohm

HOST

JTAG

7 OF 10

+5V A

TL624-1.1: NI ; Old: I

R5 51
X_47K/4

SPI_SW_SEL

Intel MOW36'14 & MOW09'15 for SP I0_IO3
Depopulate 1KR pull-up resistor and
Implement a 1KR pull-down resistor o n it.
SPI has HOLD Func. disabled by de fault.
For SKL S/H PLT with pre -ES1/ES1.

R5 15 X_1K/4
R5 22 1K/4

R523 33R/4
R524 33R/4
R527 33R/4

PCH_SPI_IO3
PCH_SPI_CLK
PCH_SPI_MOSI

3

GPP_A8/CLKRUN#

GPD11/LANPHYPC
GPD9/SLP_WLAN#

GPD2/LAN_WAKE#

GPD6/SLP_A#

GPD8/SUS CLK

GPP_A15/SUSACK#

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

GPD0/BATLOW#

GPD1/ACPRESENT

GPP_B2/VRALERT#

GPP_A11/PME#

GPP_G19/SMI#
GPP_G18/NMI#

PCH_TRIGOUT

GPP_B14/SPKR

PCH_SPI_CS#

S

Q39

G

D

X_N-BSS138_SOT23

PCH_SPI_CS0#

SPI_VCC3

WAKE#

SLP_LAN#

SLP_SUS#

GPP_B1
GPP_B0

PECI

THERMT RIP #

INTRUDER#

PRDY#

PREQ#

PM_SYNC

PM_DOWN

CPU_TRST#
PCH_TRIGIN

ITP _P MO DE

JTAGX
JTAG_TMS
JTAG_TDO

JTAG_TDI

JTAG_TCK

SPT-H

GPP_A12

BB17
AW22

CLKRUN#

LAN_DISABLE#

AR15

SLP_WLAN#

AV13

PCH_WAKE#

BC13

LAN_WAKE#

BD11

SLP_A#

BC15

SLP_LAN#

AV15

SLP_SUS#

BB13
AN15

SUSCLK

BB19

SUSACK#

BD19

SUSWARN#
SLP_S0#

BC26

SLP_S3#

AW15

SLP_S4#

BD15

SLP_S5#

BA13

GPP_B1

AL27

GPP_B0

AR27

BD13

BATLOW#

BB15

ACPRESENT
PCH_PECI

AL3
BD23

VRALERT#
PCH_THERMTRIP#

AJ3
BE11

INTRUDER#

BD17
M45

SMI#

N43

NMI#

PCH_PRDY#

AT4

PCH_PREQ#

AT3

SYNC_R

AJ4

CPU_PM_DOWN

AH2
AY5

PCH_TRIGOUT

AL2
AK1

BD26

To XDP

AT2
AR3
AR2
AP1
AP2
AN3

SMBus Isolation
VSB(S3/S5) from PCH :
connect to N/A.
VCC(S0) through isolation:
connect to CPU&DDR PWM IC.

SYS_PWROK

2

TP57

TP66

TP68

TP63

TP43
TP45

R3 84 560R/4
R4 92 1M/4

R3 31 X_0R/4

TP6

TP50
TP55

R3 78 30R1%4

R4 15 30R1%4

R5 05 0R/4

2

LAN_DISABLE# (19)

PCH_WAKE# (21,23)
LAN_WAKE# (19)

SLP_LAN#(19)

SLP_S3# (22,24,27,28,31)
SLP_S4# (5,7,17,22,24,31)

SMI# & NMI# For Sever Only
PREQ#, PRDY#, CPU_TRST# for XDP.

I T P _ M O D E (6)
PCH_JTAGX (6 )
PCH_TMS (6)
PCH_TDO ( 6)
PCH_TDI ( 6)
PCH_TCK (6)

+3V SU S

SLP_W LAN# is use d to i ndi cate whe n pow er to the w irel es s LAN
devi ce i s ne eded . If Ho st W ake o n Wir ele ss L AN is requ ire d in
S3/S4 /S5 s tate s, t he h ost B IOS mu st s et HOS T_WLAN_P P_EN
(PWRMBA SE + E0h b its 17 a nd 16 ). The SLP_WL AN# si gnal wil l
rema in h igh to kee p powe r on t o the wir ele ss L AN dev ice.

SLP_SUS# (22)

PCH_PECI (3)

H_THERMTRIP# (3)

VBAT

SIO_PME# (22)
SIO_SMI# (10,22)

200mil < SYNC_R < 600 mil

CPU_PM_SYNC (3)
CPU_PM_DOWN (3 )

H_TRST_R# (6)
CPU_INPUT_TRIGGER (3 )
CPU_OUTPUT_TRIGGER (3 )

SPKR (14)

+12V

+3VSUS

R446
10K/4

G

R491
10K/4

D

G

S

D

Q37

G

2N7002

S

S

Q36
2N7002

G

S

+3V

Ti t l e

Ti t l e

Ti t l e

PCH-LPC/SPI/SMB/MISC

PCH-LPC/SPI/SMB/MISC

PCH-LPC/SPI/SMB/MISC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

GPP_A12
CLKRUN#

PCH LAN_PHY PWR
If no u se I ntel LAN, p ull down fo r PCH _PHY in to l ow pow er mo de.

LAN_DISABLE#

PCH_WAKE#

SLP_SUS#
SUSCLK

SUSWARN#

SLP_S3#
SLP_S4#

BATLOW#
ACPRESENT

PCH_PECI
VRALERT#

SIO_PME#
SMI#
NMI#

CPU_PM_DOWN

SMB ESD

SMBCLK_VCC
SMBDATA_VCC

R432 1K/4
R421 1K/4

SMBCLK_VSB

R433

D

X_0R/4

Q35

2N7002

SMBCLK_VCC

SMBDATA_VSB

D

R422

Q34

X_0R/4

2N7002

SMBDATA_VCC

R435 1K/4
R434 1K/4

DMS-SA30

DMS-SA30

DMS-SA30

1

R470 10K/4
R475 8.2K1%4

R8 23 X_10K/4

R5 11 1K/4

R830 X_1.5K/4
R471 0R/4
R496 X_10K/4

R493 10K/4
R468 10K/4

R409 1K/4
R497 10K/4

R512 X_10K/4
R340 10K/4
R344 10K/4

R390 X_51R/4

PDG: TBD.
CRB: N/A.

C217
C0.1u6.3X4

D17

52

4
3

ESD-AOZ8902CIL

SMBCLK_VSB
SMBDATA_VSB

SMBCLK_VCC (7,21)

SMBDATA_VCC (7,21)

SMBCLK_VCC
SMBDATA_VCC

1

6
1

SUSWARN#SUSACK#

SMBCLK_VSB
SMBDATA_VSB

12 35Friday, March 31, 2017

12 35Friday, March 31, 2017

12 35Friday, March 31, 2017

+3V SU S
+3V

+3V A

SLP_SUS

+3V SU S

SLP_S3
SLP_S4

+3V A

+3V SU S

VCCPGPPA
+3V SU S

10

10

10

5

4

3

2

1

PCH-Power

PCH1I

PCH_1VSB

D D

C554 C1u6.3X4

PCH_1VSB

PCH_CLK5_1P0

PCH PIN K2/K2/E1must
PU to same PWR rail.

PCH_1VSB

PCH_MPHY_1P0

A43&B43:
Symbol Rev1.0
Update to VCCAMPHYPLL_1p0.

PCH_PLL_1P0

R804 0R/6

R299 0R/6

R821 0R/6

PCH_CLK5_1P0

PCH_MPHY_1P0

PCH_PLL_1P0

PCH_1VSB

PCH_1VSB

PCH_1VSB

C C

AA23

VCCPRIM_1P0-AA23

AA26

VCCPRIM_1P0-AA26

AA28

VCCPRIM_1P0-AA28

AC23

VCCPRIM_1P0-AC23

AC26

VCCPRIM_1P0-AC26

AC28

VCCPRIM_1P0-AC28

AE23

VCCPRIM_1P0-AE23

AE26

VCCPRIM_1P0-AE26

Y23

VCCPRIM_1P0-Y23

Y25

VCCPRIM_1P0-Y25

BA29

DCPDSW_1P0

N17

VCCCLK1

V17

VCCCLK2-V17

R17

VCCCLK2-R17

R19

VCCCLK3

U20

VCCCLK4

K2

VCCCLK5-K2

K3

VCCCLK5-K3

U21

VCCMPHY_1P0-U21

U23

VCCMPHY_1P0-U23

U25

VCCMPHY_1P0-U25

U26

VCCMPHY_1P0-U26

V26

VCCMPHY_1P0-V26

A43

VCCMPHYPLL_1P0-A43

B43

VCCMPHYPLL_1P0-B43

C44

VCCPCIE3PLL_1P0-C44

C45

VCCPCIE3PLL_1P0-C45

AJ5

VCCUSB2PLL_1P0-AJ5

AL5

VCCUSB2PLL_1P0-AL5

AN19

VCCHDAPLL_1P0

0.348A

SPT-H_PCH

6.01A

0.03A

Power

0.001A

0.029A

0.7A

0.171A

0.08A

0.036A

0.045A 0.075A

9 OF 10

0.204A

VCCPRIM_1P0-AL22
VCCPRIM_1P0-AD15
VCCPRIM_1P0-AJ20
VCCPRIM_1P0-AJ21
VCCPRIM_1P0-AJ23
VCCPRIM_1P0-AJ25
VCCPRIM_1P0-AC17

VCCAPLLEBB_1P0

0.007A

VCCATS

VCCRTCPRIM_3P3

VCCRTC

0.001A

DCPRTC

VCCSP-BE41
VCCSPI-BE43
VCCSPI-BE42

VCCPRIM_3P3-BD3
VCCPRIM_3P3-BE3
VCCPRIM_3P3-BE4
VCCPRIM_3P3-AN5

VCCDSW_3P3-W15

VCCHDA

SPT-H

AL22
AD15
AJ20
AJ21
AJ23
AJ25
AC17

V28
AD13

BA20
BA22
BA26

BE41
BE43
BE42

BD3
BE3
BE4
AN5

W15

BA15

C556

C0.1u6.3X4

PCH_1VSB_1P0_AL22

PCH_1VSB

+3V

+3VSUS
VBAT

PCH_SPI

PCH_CORE_3VSB

+3VA

PCH_HDA_3VSB

PCH_1VSB_1P0_AL22 PCH_1VSB

R822 0R/6

SPI PWR

3.3V or 1.8V

PCH_SPI

PCH_CORE_3VSB

PCH_HDA_3VSB

+3VSUS VBAT VBAT

R456 0R/6

+3VSUS

R824 0R/6

+3VSUS

R825 0R/6

TP40

+3V

C1u6.3X4

PCH_1VSB

C524 C1u6.3X4

USB2_PLLMON

C539

PCH_CLK5_1P0 PCH_MPHY_1P0 PCH_PLL_1P0

U21 K2

C522 C10u6.3X6

PCH1H

AG15

RSVD-AG15

AG14

RSVD-AG14

AF17

RSVD-AF17

AE17

RSVD-AE17

AB13

RSVD-AB13

C1

RSVD-C1

D1

RSVD-D1

BD1

RSVD-BD1

BE2

RSVD-BE2

AR19

TP5

AN17

TP4

+3VSUS

+3VA PCH_CORE_3VSB

BA22 W15AD13

C557

C1u6.3X4

C513 C10u6.3X6

C537

C1u6.3X4

A42

C512 C1u6.3X4

C514 X_C10u6.3X6

C176 X_C10u6.3X6

C177 C10u6.3X6

SPT-H_PCH

8 OF 10

C1u6.3X4

C179 C1u6.3X4

BA20

C553

C548 C10u6.3X6

AJ5

RSVD-AR22

RSVD-W13

RSVD-U13
RSVD-P31
RSVD-N31
RSVD-P27
RSVD-R27
RSVD-N29
RSVD-P29

RSVD-AN29

RSVD-R24
RSVD-P24

X_C0.1u6.3X4

C547 X_C10u6.3X6

SPT-H

AN5

C550

AR22
W13
U13
P31
N31
P27
R27
N29
P29
AN29
R24
P24

C207

X_C0.1u6.3X4

B B

A A

Title

Title

Title

PCH-Power

PCH-Power

PCH-Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

13 35Friday, March 31, 2017

13 35Friday, March 31, 2017

1

13 35Friday, March 31, 2017

10

5

Vinafix.com

4

3

2

1

PCH1J

VSS-C4

VSS-AB4

VSS-AB5

VSS-AC1

VSS-AB14

VSS-AB31

VSS-AB32

AC18

VSS-AC18

AN4

VSS-AN4

AN10

VSS-AN10

BE14

VSS-BE14

BE18

D D

C C

B B

A A

BE23
BE28
BE32
BE37
BE40

AA17
AA18
AA20
AA21
AA25
AA29

AA42

BE9
C10

C28
C37

K10
K27
K33
K36

K42
K43

M35
M42
N10
N15
N19
N22
N24
N35
N36

N41
P17

P19
P22
P45
R10
R14
R22
R29
R33
R38

Y18
Y20
Y21
Y26
Y28
Y29
A18
A25
A32
A37

AA4
AR5

VSS-BE18
VSS-BE23
VSS-BE28
VSS-BE32
VSS-BE37
VSS-BE40
VSS-BE9
VSS-C10

C2

VSS-C2
VSS-C28
VSS-C37

J7

VSS-J7
VSS-K10
VSS-K27
VSS-K33
VSS-K36

K4

VSS-K4
VSS-K42
VSS-K43

L12

VSS-L12

L13

VSS-L13

L15

VSS-L15

L4

VSS-L4

L41

VSS-L41

L8

VSS-L8
VSS-M35
VSS-M42
VSS-N10
VSS-N15
VSS-N19
VSS-N22
VSS-N24
VSS-N35
VSS-N36

N4

VSS-N4
VSS-N41

N5

VSS-N5
VSS-P17
VSS-P19
VSS-P22
VSS-P45
VSS-R10
VSS-R14
VSS-R22
VSS-R29
VSS-R33
VSS-R38

R5

VSS-R5

T1

VSS-T1

T2

VSS-T2

T4

VSS-T4
VSS-Y18
VSS-Y20
VSS-Y21
VSS-Y26
VSS-Y28
VSS-Y29
VSS-A18
VSS-A25
VSS-A32
VSS-A37
VSS-AA17
VSS-AA18
VSS-AA20
VSS-AA21
VSS-AA25
VSS-AA29
VSS-AA4
VSS-AA42
VSS-AR5

VSS-AB38

VSS-AR7

VSS-U15

VSS-AL4

VSS-AE29

VSS-AE4

VSS-AE42

U15

AL4

AR7

AE4

AE29

AE42

5

VSS-AB8

VSS-AC20

VSS-AC21

VSS-AC25

VSS-AC29

VSS-AC45

VSS-AF18

VSS-AF20

VSS-AF21

VSS-AF23

VSS-AF25

VSS-AF26

VSS-AF28

AF18

AF20

AF21

AF23

AF25

AF26

AF28

VSS-AD4

VSS-AD8

VSS-AL10

VSS-AL11

VSS-AL13

VSS-AL17

VSS-AL19

VSS-AL24

VSS-AL29

VSS-AL32

VSS-AL33

VSS-AD11

VSS-AD14

VSS-AB15

VSS-AD32

VSS-AD33

VSS-AD36

VSS-AE18

VSS-AE20

VSS-AE21

VSS-AE25

VSS-AE28

SPT- H_ PCH

VSS-AL38

VSS-AM15

VSS-AM17

VSS-AM19

VSS-AM22

VSS-AM24

VSS-AM27

VSS-AM29

VSS-AN7

VSS-AN8

VSS-AN11

VSS-AN22

VSS-AM45

VSS-AP4

VSS-AN27

VSS-AN31

VSS-AN39

VSS-AP11

VSS-AR33

GND

10 OF 10

VSS-AF29

VSS-AG11

VSS-AG13

VSS-AG31

VSS-AG32

VSS-AG33

VSS-AG38

VSS-AG4

VSS-AH1

VSS-AH17

VSS-AH18

VSS-AH20

VSS-AH21

VSS-AH23

VSS-AH25

VSS-AH26

VSS-AH28

VSS-AH29

VSS-AH45

VSS-AJ10

VSS-AJ14

VSS-AJ15

VSS-AJ17

VSS-AJ18

VSS-AJ26

VSS-AJ28

VSS-AJ29

VSS-AJ31

VSS-AJ32

VSS-AJ36

VSS-AK4

VSS-AK42

VSS-AU7

VSS-AV17

VSS-AV24

VSS-AV27

VSS-AV31

VSS-AV33

VSS-AV6

VSS-AW13

VSS-AW19

AH1

AF29

AG4

AH17

AH18

AH20

AG11

AG13

AG31

AG32

AG33

AH21

AG38

AJ10

AJ14

AJ15

AJ17

AH23

AH25

AH26

AH28

AJ18

AH29

AH45

AK4

AU7

AJ26

AJ28

AJ29

AJ31

AJ32

AJ36

AK42

4

AV6

AV17

AV24

AV27

AV31

AV33

AW13

AW19

AW29

VSS-AT9

VSS-AR9

VSS-AU1

VSS-AT10

VSS-AT15

VSS-AT36

VSS-AR34

VSS-AR42

VSS-AW29

VSS-AW37

AW9

AW37

VSS-AU35

VSS-AU36

VSS-AU39

VSS-AU45

VSS-AW9

VSS-AY38

VSS-AY45

VSS-B25

VSS-B3B3VSS-B37

VSS-B40

VSS-B6B6VSS-BA1

VSS-BB11

VSS-BB16

B25

B37

B40

AY38

BA1

AY45

BB11

BB16

BB21

B44

VSS-D45

VSS-A42

VSS-B45

VSS-BD2

VSS-BB21

VSS-B44

VSS-BD45

VSS-BD44

VSS-BE44

VSS-BB25

VSS-BB30

VSS-BB34

VSS-BC2

VSS-BD43

BC2

AB7

BB25

BB30

BB34

BD43

VSS-G42
VSS-H17

VSS-H19
VSS-H22
VSS-H24
VSS-H27
VSS-H29

VSS-H35

VSS-T42
VSS-U10
VSS-U11
VSS-U14
VSS-U17
VSS-U18
VSS-U28
VSS-U29
VSS-U31
VSS-U32
VSS-U33
VSS-U38

VSS-V18
VSS-V20
VSS-V21
VSS-V23
VSS-V25
VSS-V29

VSS-V45
VSS-W14
VSS-W31
VSS-W32
VSS-W33
VSS-W38

VSS-Y17

VSS-BB1
VSS-BC1

VSS-A44

VSS-AB10
VSS-AB11

VSS-AB7

VSS-C42
VSS-D10
VSS-D12
VSS-D15
VSS-D16
VSS-D17
VSS-D19
VSS-D21
VSS-D24
VSS-D25
VSS-D27
VSS-D29
VSS-D30
VSS-D31
VSS-D33
VSS-D35
VSS-D36
VSS-E13
VSS-E15
VSS-E31
VSS-E33
VSS-F44

VSS-F8

VSS-G9

VSS-H3

VSS-J10
VSS-J11

VSS-J3

VSS-J39

VSS-J5

VSS-U4
VSS-U8

VSS-V3

VSS-W4
VSS-W8

VSS-A4
VSS-A3
VSS-B2
VSS-A2
VSS-B1

SPT-H

3

C42
D10
D12
D15
D16
D17
D19
D21
D24
D25
D27
D29
D30
D31
D33
D35
D36
E13
E15
E31
E33
F44
F8
G42
G9
H17
H19
H22
H24
H27
H29
H3
H35
J10
J11
J3
J39
J5
T42
U10
U11
U14
U17
U18
U28
U29
U31
U32
U33
U38
U4
U8
V18
V20
V21
V23
V25
V29
V3
V45
W14
W31
W32
W33
W38
W4
W8
Y17
A4
A3
B2
A2
B1
BB1
BC1
A44
AB10
AB11

R373
0R/4

PCH_AB10 (3)
PCH_AB11 (3)

R374
0R/4

STUFF FOR SKL_PCH_H

AB14

PCH-GND PCH-Strap

AB31

AB32

AB38

AB4

AB5

AC1

AC20

AC21

AC25

AC29

AC45

AB8

AD11

AD14

AB15

AD32

AD33

AD36

AD4

AD8

AE18

AE20

AE21

AE25

AE28

AL10

AL11

AL13

AL17

AL19

AL24

AL29

AL32

AL33

AL38

AM15

AM17

AM19

AM22

AM24

AM27

AM29

AM45

AN11

AN22

AN27

AN31

AN39

AN7

AN8

AP11

AP4

AR33

AR34

AR42

AR9

AT10

AT15

AT36

AT9

AU1

AU35

AU36

AU39

AU45

C4

BD2

BD45

BD44

BE44

D45

A42

B45

For Strapping pull-up resistor
CRB1.1: 4.7KR
PDG2.1: 1~2.2KR

Top Swap(SPKR/GPP_B14)

+3V

R4 3 X_2.2K/4

+3.3S

R473 X_20K/4

CRB: empty

No Reboot(GSPI0_MOSI/GPP_B18)

+3V

R514 X_2.2K/4

+3.3S

R499 X_20K/4

CRB: empty

SPKR(12,14)

NO_REBOOT ( 11)

Intel ME Crypto Transport Layer Security (TLS-SMBALERT#/GPP_C2)

+3V SU S

R449 2.2K/4

+3.3A

R448 X_20K/4

ME_TLS_ON (12)

Boot BIOS Strap Bit (GSPI1_MOSI/GPP_B22)

+3V SU S

R439 X_2.2K/4

+3.3A

R438 X_20K/4

CRB: empty

BOOT_BIOS_SEL (11)

ESPI/LPC SEL Strap(SML0ALERT#/GPP_C5)

+3V SU S

+3.3A

R453 X_2.2K/4
R452 X_20K/4

CRB: empty

LPC_ESPI_SEL (12)

ESPI Flash Sharing Mode(GPP_H12)

+3V SU S

+3.3A

R484 X_2.2K/4
R483 X_20K/4

CRB: empty

Buzzer

1N4148W-F_SOD123

R4 6

2.7KR4

SPKR(12,14)

B

D4

RN2

1
3
5
7

CE

8P4R-470R0402
Q8

N-SST3904_SOT23

2

GPP_H12 (11)

+5V

BZ1
BUZZER

1
2

2
4
6
8

C37

X_C0.1u16X4

This signal has an integrated weak pull-down
resistor (20 KΩ nominal) to disable Top-Block
Sway by default.
To enable Top-Block Swap, this signal should be
pulled up to V3.3S through a 1k to 2.2 KΩ ±5%
resistor.

This signal has an integrated weak pull-down
resistor (20 KΩ nominal) to disable the no reboot
strap functionality by default.
To enable noreboot on TCO Timer expiration, this
signal shouldbe pulled-up to V3.3S through a 1k
to 2. 2 KΩ ±5% resistor.

This signal has an integrated weak pull-down
resistor (20 KΩ nominal) to disable IntelR ME
Cryptographic Transport Layer Security (TLS)
cipher suite (no confidentiality).
To enable IntelR ME Cryptographic Transport
Layer Security (TLS) cipher suite with
confidentiality, this signal should be pulled up to
V3.3A through a 1k to 2.2 KΩ ±5% resistor.

This signal has an integrated weak pull-down
resistor (20 KΩ nominal) to default boot from SPI.
To enable boot to LPC, this signal should be pulled
up to V3.3S through a 1k to 2.2 KΩ ±5% resistor.

This signal has a weak internal pull-down.
0 = LPC Is selected for EC. (Default)
1 = eSPI Is selected for EC.
Note s:

1. The internal pull-down is disabled after RSMRST#
de-asserts.

2. This signal is in the primary well.

This signal has a weak internal pull-down.
This strap should sample LOW. There should NOT be
anyon-board device driving it to opposite direction
during strap sampling.
Note : The pull-down resistor is disabled after
RSMRST#de-asserts

SPI0_MOSI & SPI0_MISO:
This signal has an internal pull-up.
This strap should sample HIGH. There should NOT be any
on-board device driving it to opposite direction during
strap sampling(RSMRST#).

SML1ALERT# /PCHHOT#/GPP_B23:
This signal has an internal pull-down.
This strap should sample LOW. There should NOT be any
on-board device driving it to opposite direction during
strap sampling(RSMRST#).

SPI0_IO2 & SPI0_IO3:
This signal has an internal pull-up.
This strap should sample HIGH. There should NOT be any
on-board device driving it to opposite direction during
strap sampling(RSMRST#).

Ti t l e

Ti t l e

Ti t l e

PCH-GND/Strap

PCH-GND/Strap

PCH-GND/Strap

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

14 35Friday, March 31, 2017

14 35Friday, March 31, 2017

1

14 35Friday, March 31, 2017

10

10

10

5

C10u6.3X6

AVDD_ANA

C10u6.3X6

C10u6.3X6

C10u6.3X6

R3

X_1KR4

U43

1

NC-1

2

NC-2

3

NC-3

4

GND

M24C16-WMN6TP

For NVRAM

+3VA

R673

X_10K/4

R666

100K/4

C31

C50

C85

C27

VDDP_3P3

C411

C396

C0.1u6.3X4

C0.1u6.3X4

Close to respective power pins

C412

C67

C0.1u6.3X4

C0.1u6.3X4

AVDD_EAR

PG_+1.2

+3VA

C72

C0.1u6.3X4

LVDS_1P2LVDS_1P2

C414

C29

C0.1u6.3X4

C0.1u6.3X4

+5VA

6

U2

7

POK

8

EN

C3

C1u16X4

APL5930KAI-TRG_SOP8

1

+3VA +3VA

C413

C0.1u6.3X4

16Kbit

8

VCC

7

WP

6

SCL

5

SDA

+3VA +3VA

R684
X_4.7K/4

SPI_CSn
SPI_DI

2

SPI_WP

3
4

5

C415

C0.1u6.3X4

C44

C0.1u6.3X4

L9

120L2A-50/6

C84

C10u6.3X6

L4
120L2A-50/6

C61

C10u6.3X6

C14

C1u16X4

5

VIN1

VCNTL

9

VIN2

4

VOUT1

3

VOUT2

2

FB

GND

R696
100K/4

C407

C0.1u6.3X4

U41

2Mbit

CS1VCC
DO

HOLD

CLK

WP

DIO

GND

W25X20CLSNIG-HF

C28

C0.1u6.3X4

AVDD_AUSDM

C0.1u6.3X4

AVDDL_DVIVDD_1P2

C0.1u6.3X4

+3VA

C20
C0.1u6.3X4

C13

C150p50N4

+V1P2_FB

R694

4.7K/4

8
7

HOLD
SPI_CLK

6

SPI_DO

5

+3V

D1

S-RB751V40T1G_SOD323

R1 X_0R/4

+5V +5VSC

D9

X_S-RB751V40T1G_SOD323

R129 0R/4

C71

C59

LVDS_1P2

R20

C10u6.3X6

12K1%4

R9
24KR1%4

R682

4.7K/4

R701 100R1%4
R687 100R1%4
R685 100R1%4

+3VA

R671
10K/4

LVDS_1P2

C12

NVR_WP
NVR_SCL
NVR_SDA

+3VA

L2

120L2A-50/6

+3VA

+3VA

+1.2V_EN

+3VA

L3
120L2A-50/6

+3VA

L10
120L2A-50/6

120L2A-50/6

R14 10K/4
R2 X_0R/4

R4 10K/4

L1

D D

C C

B B

NVRAM & SPI ROM

A A

+3VSC

C18

C10u6.3X6

4

+5VA

Y1

X_C0.1u6.3X4

U6

1

RXCN

2

RXCP

3

RX0N

4

RX0P

5

RX1N

6

RX1P

7

RX2N

8

RX2P

9

AVDD_33_2

10

NC_1

11

NC_2

12

NC_3

13

NC_4

14

NC_5

15

NC_6

16

NC_7

17

NC_8

18

AVDDL_DVI

19

GPIO34

20

GPIO35

21

GPIO36

22

GPIO37

23

GND_1

24

AVDD_33_1

25

BIN0M

26

BIN0P

27

GIN0M

28

GIN0P

29

SOGIN0

30

RIN0M

31

RIN0P

32

HSYNC0

R100
10K/4

COM_RX
COM_TX

34

DDPC_CLKN
DDPC_CLKP
DDPC_TXN0
DDPC_TXP0
DDPC_TXN1
DDPC_TXP1
DDPC_TXN2
DDPC_TXP2

DDPC_CLKN
DDPC_CLKP
DDPC_TXN0
DDPC_TXP0
DDPC_TXN1
DDPC_TXP1
DDPC_TXN2
DDPC_TXP2

C6

R13
0R/4

TP1

AVDD_AUSDM

XTAL14_P2

C80

C22p50N4

Scalar

TSUMU58DC

VOL_PWM(20)

+3VA

R67 100R1%4
R72 X_0R/4
R68 0R/4
R73 0R/4

R101
10K/4

TP2

TP3

R34 0R/4
R26 0R/4

R33 0R/4
R24 X_10K/4
R32 100R1%4

HDMI_DDPC_SCL
HDMI_DDPC_SDA

PANEL_ID0(16)
PANEL_ID1(16)

SCALAR_PWRBTN#(22)

HDMI_DDPC_SCL(16)
HDMI_DDPC_SDA(16)

DDPC_CLKN
DDPC_CLKP
DDPC_TXN0
DDPC_TXP0
DDPC_TXN1
DDPC_TXP1
DDPC_TXN2
DDPC_TXP2

AVDD_ANA

AVDDL_DVI

OSD_PWRBTN_IN(17)

PWR_LED#(17)
SUS_LED#(17)
PANEL_ID2(16)

AVDD_ANA

1 2

14.318MHZ12p

C79

C22p50N4

HDMI_DDPC_CLKN(3)
HDMI_DDPC_CLKP(3)
HDMI_DDPC_TXN0(3)
HDMI_DDPC_TXP0(3)
HDMI_DDPC_TXN1(3)
HDMI_DDPC_TXP1(3)
HDMI_DDPC_TXN2(3)
HDMI_DDPC_TXP2(3)

+3V

4

C34 C0.1u16X4
C39 C0.1u16X4
C35 C0.1u16X4
C41 C0.1u16X4
C40 C0.1u16X4
C42 C0.1u16X4
C43 C0.1u16X4
C45 C0.1u16X4

R663 470R/4
R667 470R/4
R665 470R/4
R670 470R/4
R669 470R/4
R672 470R/4
R674 470R/4
R680 470R/4

D

Q56

G

2N7002

S

X_C0.1u6.3X4

+1.2V_EN
SCALAR_BTNOUT#

DET_DVI

126

127

128

DDCD_DA/RS232_TX1/GPIO33

DDCD_CK/RS232_RX1/GPIO32

VSYNC033GND_234DDCA_CK/RS232_RX0/GPIO4035DDCA_DA/RS232_TX0/GPIO4136AVDD_AUSDM37LINE_IN_L/AUMUTE/GPIO_AU038LINE_IN_R/AUSCK/GPIO_AU139LINE_OUT_L/AUSD/GPIO_AU240LINE_OUT_R/AUWS/GPIO_AU341AUVAG/AUMCK/GPIO_AU442AUVRM/SPDIFO/GPIO_AU5

AVDD_EAR

10K1%4

3

C11

R27
0R/4

122

123

125

124

GPIO26

GPIO30

GPIO31

CEC/GPIO27

R83 0R/4
R84 0R/4

+5VA

R98

3

+3VA

+3VSC

R35
X_10K1%4

119

120

121

GPIO25

GPIO23/PWM5

GPIO24/PWM6

R28
X_10K1%4

LVDS_VDDEN(16)

KEY1
KEY2

113

114

109

111

110

112

115

116

117

118

GPIO22/PWM4

SAR1/GPIO_SAR1

SAR2/GPIO_SAR2

SAR3/GPIO_SAR3

108

VCTRL

GND_7

GPIO21

GPIO20

VDDC_2

VDDP_4

SAR0/GPIO_SAR0

GND_344EAR_OUT_R45EAR_OUT_L46AVDD_EAR47XOUT48XIN49RESET50GPIO0051GPIO01/PWM0/SPDIFO52GPIO02/PWM153VDDC_154GND_455VDDP_156GPIO0357MIIC_SCL/GPIO0458MIIC_SDA/GPIO0559CSZ60SDO61SDI62SCK63WPZ/GPIO10

43

VDD_1P2

VDDP_3P3

NVR_WP
NVR_SCL
NVR_SDA
SPI_CSn
SPI_DI
SPI_DO
SPI_CLK
SPI_WP

C88

C10u6.3X6

XTAL14_OUTXTAL14_P1

SCALAR_RST#

C73

C0.1u6.3X4

BKL EN Level Shift

+3VA

R85
1K1%4

R119
X_0R/4

R99

LVDS_ENBKL

1KR4

B

107

NC_26

+5VA

105

106

NC_24

NC_25

R120
1K1%4

CE

Q20
N-MMBT3904

2

+5VA

R36
X_10K1%4

AUDIO_SD#(20)

BKL_EN(16)
WP_EDID(16)

VDDP_3P3VDDP_3P3 VDD_1P2

98

97

100

101

102

103

104

NC_16

NC_1799NC_18

NC_19

NC_20

NC_21

NC_22

NC_23

VDDP_3

GND_BST

LVBCKM

LVACKM

HOLDZ/GPIO11

TSUMU58BDC2

64

BKL_PWM
LVDS_ENBKL

NC_15
NC_14
NC_13
NC_12
NC_11
NC_10

NC_9
LVB0P
LVB0M
LVB1P
LVB1M
LVB2P
LVB2M

LVBCKP

LVB3P
LVB3M
GND_6

VDDP_2

LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M

LVACKP

LVA3P
LVA3M
GND_5

96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65

PANEL_ID3(16)

VDDP_3P3

R668 X_0R/4

LVDSB_DATA0(16)
LVDSB_DATA0#(16)
LVDSB_DATA1(16)
LVDSB_DATA1#(16)
LVDSB_DATA2(16)
LVDSB_DATA2#(16)
LVDSB_CLK(16)
LVDSB_CLK#(16)
LVDSB_DATA3(16)
LVDSB_DATA3#(16)

LVDSA_DATA0(16)
LVDSA_DATA0#(16)
LVDSA_DATA1(16)
LVDSA_DATA1#(16)
LVDSA_DATA2(16)
LVDSA_DATA2#(16)
LVDSA_CLK(16)
LVDSA_CLK#(16)
LVDSA_DATA3(16)
LVDSA_DATA3#(16)

HOLD

+3VA

Y

X

KEY1

+3VA

Y

X

KEY2

+3VA

Y

X

BKL_PWM

D6
BAV99LT1_SOT23

OSD_PWRBTN_IN

Z

C57

C0.1u6.3X4

SCALAR_PWRBTN#

R37 100R1%4

D2
BAV99LT1_SOT23

Z

C0.1u6.3X4

R38 100R1%4

D3
BAV99LT1_SOT23

Z

C0.1u6.3X4

+3VSC

R86
1K1%4

R88
X_0R/4

R87
1KR4

1

+3VA

R57
10K/4

R25
X_10K/4

+3VA

R22

3.9KR1%4

VOL_UP(17)

R16

1.5K1%4

C22

BL_UP(17)

+3VA

R23

3.9KR1%4

VOL_DOWN(17)

R17

C23

1.5K1%4

BL_DOWN(17)

+5VSC

R89
1K1%4

BKL_VBR(16)

CE

B

Q21
N-MMBT3904

F/W Update

R121
1KR4

B

+5VSC

CE

Q27
N-MMBT3904

R113
1K1%4

LVDS_BKLEN(16)

C93

X_C0.1u6.3X4

2

J1

Title

Title

Title

HDMI to LVDS (TSUMU58BDC)

HDMI to LVDS (TSUMU58BDC)

HDMI to LVDS (TSUMU58BDC)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5VA

56

1

FW_SCL

2

R56 100R1%4

FW_SDA

3

R55 100R1%4

4

BH1X4S-1PITCH-0.7MM_BLACK

DMS-SA30

DMS-SA30

DMS-SA30

1

HDMI_DDPC_SCL
HDMI_DDPC_SDA

15 35Friday, March 31, 2017

15 35Friday, March 31, 2017

15 35Friday, March 31, 2017

10

10

10

5

Vinafix.com

LVDS Output

LVDSB_DATA0(15)

LVDSB_DATA0#(15)

LVDSB_DATA1(15)

LVDSB_DATA1#(15)

D D

LVDSB_DATA2(15)

LVDSB_DATA2#(15)

LVDSB_DATA3(15)

LVDSB_DATA3#(15)

LVDSB_CLK(15)

LVDSB_CLK#(15)

C C

+3V

C2

C1u6.3X4

LVDS_VDDEN(15)

B B

C389

C1u6.3X4

LVDS_VDDEN

BKL_EN(15)

R7 4
X_10K1%4

C1

C0.1u6.3X4

C388

C0.1u6.3X4

1324

4P2R-0R/4

1324

4P2R-0R/4

1324

4P2R-0R/4

1324

4P2R-0R/4

1324

4P2R-0R/4

+3VSC

USB Signal & PWR For LVDS Conn.

C106
C10u10Y8

USB5+(9)
USB5-(9)

USB6+(9)
USB6-(9)

USB_EN(17,19,22,23,24)

+5VSUS

A A

R3C-0000012-W08 Co-layout with L12-9008090-M09
Note. The pin's definition between R&L are difference.

RN1

LVDS_B0P

LVDS_B0N

RN3

LVDS_B1P

LVDS_B1N

RN4

LVDS_B2P

LVDS_B2N

RN6

LVDS_B3P

LVDS_B3N

RN5

LVDS_CLKBP
LVDS_CLKBN

For 15 inch panel timing and
R/F time

+12V

R709

R707

G

D

S

C416

C0.1u25X4

R7 11
220KR1%4

Q14
2N7002

R7 5
1K1%4

20K1%4

20K1%4

+3V&+5V For LVDS

U1

5

IN

3

EN

U3 9

5

IN

3

EN

OC #2(11)

5

OUT

DIS

GND

NCT3521U_SOT23-5

2

OUT

DIS

GND

NCT3521U_SOT23-5

2

Port 5~6

U9

4

EN

2

VIN1

3

VIN2

5

OC#

UP7549PRA8-25_MSOP8

RN7

1324

4P2R-0R/4

RN8

1324

4P2R-0R/4

USB5P
USB5N

USB6P
USB6N

LVDSA_DATA0(15)

LVDSA_DATA0#(15)

LVDSA_DATA1(15)

LVDSA_DATA1#(15)

LVDSA_DATA2(15)

LVDSA_DATA2#(15)

LVDSA_DATA3(15)

LVDSA_DATA3#(15)

LVDSA_CLK(15)

LVDSA_CLK#(15)

+12V For BL

Q58

1
3

4

P-FDMC4435BZ_MLP3.3x3.3

R7 12
750R1%6

D

G

S

1

R8
249R1%4

4

R7
249R1%4

1

R6 57
249R1%4

4

8

VOUT1

7

VOUT2

6

VOUT3

1

GND

RN28

1324

4P2R-0R/4

RN29

1324

4P2R-0R/4

RN30

1324

4P2R-0R/4

RN32

1324

4P2R-0R/4

RN31

1324

4P2R-0R/4

+12V_INV

+12V_INV

52

R713
750R1%6

R715
750R1%6

R714
750R1%6

64mA

Q57

N-P8503BMG_SOT23-3

Rev.0B
C16&C395 stuff 1KR to
discharge VDD_LVDSunder

+3VDD_LVDS

+5VDD_LVDS+5V

C65

C0.1u6.3X4

G3

1.5A

C16

C8

C0.1u6.3X4

C10u6.3X6

Normal: 1.1A
Inrrush: 3A

C392

C395

C0.1u6.3X4

C47u6.3X8

VUSB_LVDS

12

+

EC8

C470u6.3SO

D8

1

USB5N

2

USB5P

4

USB6N

5

USB6P USB6P

0.9A

C417

0.1u25X4

R951
1K/4

R952
1K/4

0.8A

R9 0
1K/4

NC
NC

NC
NC

ESD-AOZ8808DI-05

3

8

4

LVDS_A0P

LVDS_A0N

LVDS_A1P

LVDS_A1N

LVDS_A2P

LVDS_A2N

LVDS_A3P

LVDS_A3N

LVDS_CLKAP

LVDS_CLKAN

C418
C10u25X8

+3VDD_LVDS

+5VDD_LVDS

10
9

7
6

4

USB5N
USB5P

USB6N

PANEL_ID2

+5V A

HDMI_DDPC_SCL

PANEL_ID2

+5V A

HDMI_DDPC_SDA

3

HDMI_DDPC_CTRLCLK(10)

HDMI_DDPC_CTRLDATA(10)

U5

6

IN

S1

5

GND

VCC

4

S2

D

NC7SB3157P6X_SOT323-6

SW(Pin6) Default=H
H: D-->S1(4-->1)
L: D-->S2(4-->3)

U4

6

IN

S1

5

GND

VCC

4

S2

D

NC7SB3157P6X_SOT323-6

3

2

1

LVDS & BL & USB2.0*2 Conn.

MEC2

+5VDD_LVDS+3VDD_LVDS

MEC2
2

P2

4

P4

6

P6

8

P8

10
12
14
16
18
20
22

LVDS_CLKAN

24

LVDS_CLKAP

26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

62

2

C393

C0.1u6.3X4

LVDS_A0N
LVDS_A0P
LVDS_A1N
LVDS_A1P

LVDS_A2N
LVDS_A2P

LVDS_A3N
LVDS_A3P

PANEL_ID2
PANEL_ID1
PANEL_ID0

PANEL_ID3

LVDS_BKLEN ( 15)
BKL_VBR (15)

C394

C0.1u6.3X4

Pannel ID

Panel ID 0~3 controlled by LVDS cable.

+3V A

R706 10K/4
R702 10K/4
R695 10K/4
R710 10K/4

+12V_INV

R153

4.7K/4

EDID15_y_SCL
EDID15_y_SDA

R156

4.7K/4

EDID17_y_SCL

R151

4.7K/4

EDID20_y_SCL

R159

4.7K/4

EDID22_y_SCL

Ti t l e

Ti t l e

Ti t l e

LVDS Output & EDID Switch & USB2.0*2

LVDS Output & EDID Switch & USB2.0*2

LVDS Output & EDID Switch & USB2.0*2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R708 X_0R/4

170109
ID 0~2 PD to GND by LVDS cable for 20" monitor.

R152

4.7K/4
R166

4.7K/4

R167 22R/4
R168 22R/4

R155

4.7K/4
R169

4.7K/4

R170 22R/4
R171 22R/4

R150

4.7K/4
R172

4.7K/4

R173 22R/4
R174 22R/4

R158

4.7K/4
R163

4.7K/4

R164 22R/4
R165 22R/4

PANEL_ID0
PANEL_ID1
PANEL_ID2
PANEL_ID3

+5V A

R160
X_4.7K/4

WP_EDID15
EDID15_SCL
EDID15_SDA

+5V A

R154
X_4.7K/4

WP_EDID17
EDID17_SCL
EDID17_SDAEDID17_y_SDA

+5V A

R149
X_4.7K/4

WP_EDID20
EDID20_SCL
EDID20_SDAEDID20_y_SDA

+5V A

R157
X_4.7K/4

WP_EDID22
EDID22_SCL
EDID22_SDAEDID22_y_SDA

DMS-SA30

DMS-SA30

DMS-SA30

C113 C0.1u6.3X4

8
7
6
5

C115 C0.1u6.3X4

8
7
6
5

C114 C0.1u6.3X4

8
7
6
5

C116 C0.1u6.3X4

8
7
6
5

1

PANEL_ID0 (15)
PANEL_ID1 (15)
PANEL_ID2 (15)
PANEL_ID3 (15)

U1 1

VCC
WP
SCL
SDA

BR24G02FJ-3GTE2

15" EDID

U1 2

VCC
WP
SCL
SDA

BR24G02FJ-3GTE2

17" EDID

U1 3

VCC
WP
SCL
SDA

BR24G02FJ-3GTE2

20" EDID

U1 4

VCC
WP
SCL
SDA

BR24G02FJ-3GTE2

22" EDID

16 35Friday, March 31, 2017

16 35Friday, March 31, 2017

16 35Friday, March 31, 2017

JLVDS1

MEC1

C24

C0.1u6.3X4

VUSB_LVDS

VUSB_LVDS

C25

C0.1u6.3X4

LVDS_B0N
LVDS_B0P

LVDS_B1N
LVDS_B1P

LVDS_B2N
LVDS_B2P

LVDS_CLKBN
LVDS_CLKBP

LVDS_B3N
LVDS_B3P

US B 5N
US B 5P

US B 6N
US B 6P

L8

33L300mA-200/4

MEC1

1

P1

3

P3

5

P5

7

P7
P99P10
P1111P12
P1313P14
P1515P16
P1717P18
P1919P20
P2121P22
P2323P24
P2525P26
P2727P28
P2929P30
P3131P32
P3333P34
P3535P36
P3737P38
P3939P40
P4141P42
P4343P44
P4545P46
P4747P48
P4949P50
P5151P52
P5353P54
P5555P56
P5757P58
P5959P60

GNDM161GNDM2

BH2X30S-1PITCH-0.7MM_BLACK

IND FERRITE BEAD <Pls Chec k!>
33Ohm,25%,0402,300mA,0.2Ohm

EDID Switch

+3V

+5V A

R518

2.2K/4

R520

2.2K/4

PANEL_ID0

1
2
3

1
2
3

+5V A

PANEL_ID0

+5V A

PANEL_ID0

+5V A

PANEL_ID0

+5V A

WP_EDID

WP_EDID(15)

R3 0

Q5

2.2K/4

2N7002

G

S

D

+3V

+5V A

R3 1

2.2K/4

Q6
2N7002

G

S

D

U1 5

6
5
4

NC7SB3157P6X_SOT323-6

U1 7

6
5
4

NC7SB3157P6X_SOT323-6

U1 6

6
5
4

NC7SB3157P6X_SOT323-6

U1 8

6
5
4

NC7SB3157P6X_SOT323-6

+5V A

R3 9

4.7K/4
R1 35 X_0R/4

HDMI_DDPC_SCL (1 5)

HDMI_DDPC_SDA (1 5)

S1

IN

GND

VCC

S2

D

IN

S1

GND

VCC

S2

D

IN

S1

GND

VCC

S2

D

IN

S1

GND

VCC

S2

D

EDID17_y_SCL

1
2

EDID15_y_SCL

3

EDID22_y_SCL

1
2

EDID20_y_SCL

3

EDID17_y_SDA

1
2

EDID15_y_SDA

3

EDID22_y_SDA

1
2

EDID20_y_SDA

3

WP_EDID15

D10

S-RB751V40T1G_SOD323

WP_EDID17

D11

S-RB751V40T1G_SOD323

WP_EDID20

D12

S-RB751V40T1G_SOD323

WP_EDID22

D13

S-RB751V40T1G_SOD323

GND

GND

GND

GND

1

A0

2

A1

3

A2

4

1

A0

2

A1

3

A2

4

1

A0

2

A1

3

A2

4

1

A0

2

A1

3

A2

4

10

10

10

5

4

3

2

1

GL850G - USB2.0 HUB

OSD & LED & SPK & USB2.0*4 Conn.

USB Port 10 For H110 Sku

DVDD +5VSUS

R912 0R/8

C638

C637

C10u16X8

U55

HUB_10D­HUB_10D+

GL850_OV1
GL850_OV2
GL850_OV3
GL850_OV4

GL850_PGANG
GL850_RESET
GL850_PSELF

R914
X_4.7K/4

R924 619R1%/4

USB Signal & PWR For OSD Conn.

R935 0R/4
R936 0R/4

R937 0R/4
R938 0R/4

R939 0R/4
R940 0R/4

R941 0R/4
R942 0R/4

OC#6(11)

OC#7(11)

1
2

25
24
20
19

23
17
22
26
18

Rref STD: 680R
For USB eye-diagram.

GL850_RESET

C635 C1u16X4

USB Port 11~14 For Q170 Sku

USB11P
USB11N

USB12P
USB12N

USB13P
USB13N

USB14P
USB14N

U21

4

EN

2

VIN1

3

VIN2

5

OC#

UP7549PRA8-25_MSOP8

U20

4

EN

2

VIN1

3

VIN2

5

OC#

UP7549PRA8-25_MSOP8

R920 0R/4
R922 0R/4

R915 10K/4
R923 10K/4
R913 10K/4
R919 10K/4

R918 100K/4
R917 10K/4
R921 4.7K/4

R916 X_0R/4

USB14+(9)
USB14-(9)

C10u10Y8

C10u10Y8

C0.1u6.3X4

USB_EN(16,19,22,23,24)

C164

USB_MODE(22)

C165

D D

USB10-(9)
USB10+(9)

+5VSUS

Pin23
1 : Gang Input
0 : Individual
Input

Pin22
0: GL850G-50 is Bus-Powered
1: GL850G-50 is Self-Powered

C C

B B

A A

RST_GL850#(9)

USB11+(9)
USB11-(9)

USB12+(9)
USB12-(9)

USB13+(9)
USB13-(9)

+5VSUS

+5VSUS

5

DVDD DVDD

DM0
DP0

OVCUR1#
OVCUR2#
OVCUR3#
OVCUR4#

PGANG
RESET#
PSELF

V33

28

5

9

14

V33

AVDD-1

AVDD-2

C0.1u6.3X4

21

27

V5

DVDD

DM1

AVDD-3

DP1

DM2

DP2

DM3

DP3

DM4

DP4

X1

SDA
TEST/SCL

RREF

8

GL850_RREF

USB11N
USB11P

USB12N
USB12P USB12P

G1

GL850G-OHY50

29

D15

1
2

4
5

X2

3

D16

1

USB13N

2

USB13P

4

USB14N

5

USB14P

3

8

VOUT1

7

VOUT2
VOUT3

GND

VOUT1
VOUT2
VOUT3

GND

C440

6

C0.1u6.3X4

1

8
7

C127

6

C0.1u6.3X4

1

C639

HUB_1D-

3

HUB_1D+

4

HUB_2D-

6

HUB_2D+

7

HUB_3D-

12

HUB_3D+

13

HUB_4D-

15

HUB_4D+

16

12MHZ_IN

10

12MHZ_OUT

11

C15p50N6

10

NC

9

NC

7

NC

6

NC

ESD-AOZ8808DI-05

8

10

NC

9

NC

7

NC

6

NC

ESD-AOZ8808DI-05

8

VUSB_OSD

12

+

EC11

C470u6.3SO

C132
C10u10Y8

4

C641 C0.1u6.3X4

C642 C0.1u6.3X4
C644 C1u16X4

C643 C0.1u6.3X4
C645 C1u16X4

C640

USB11N
USB11P

USB12N

USB13N
USB13P

USB14N
USB14P

R198
1K/4

VUSB_B

R208
1K/4

For Pin5

For Pin9

For Pin14

R927 0R/4
R928 0R/4

R929 0R/4
R930 0R/4

R931 0R/4
R932 0R/4

R933 0R/4
R934 0R/4

Y7

3 4

12MHZ12P

USB11N
USB11P

USB12N
USB12P

USB13N
USB13P

USB14N
USB14P

12

C636

C15p50N6

VUSB_OSD

USB11N
USB11P

VUSB_OSD

USB12N
USB12P

VUSB_B
VUSB_B

USB13N
USB13P
USB14N
USB14P

VCC_LED
S0/S3= High
S4/S5/DS5= Low

SLP_S4#(5,7,12,22,24,31)

VSB_LED
S0= Low
S3/S4/S5/DS5= High

VSB_LED(22)

OSD1

1

VUSB

3

USB1N

5

USB1P

7

GND

9

VUSB

11

USB2N

13

USB2P

15

GND

17

VUSB_BIOS

19

VUSB_BIOS

21

USB3N

23

USB3P

25

USB4N

27

USB4P

29

GND

31

GND

34

34

BH2X15S-1PITCH_WHITE

SUS_LED#
PWR_LED#
+V3.3SB_D
WIFI_LED#

BL_DOWN

VOL_UP

VOL_DOWN

PANSWIN#

SPK_RM
SPK_RP

SPK_LP

SPK_LM

PWR LED

R736
10K/4

R738
10K/4

OE#

VCC_LED(22)

D

G

Q62

S

2N7002

+3V +3VA +3VA

SB_LED# SB_LED
SB_LED SUS_LED#

D

G

Q65

S

2N7002

U46

1

OE

2

A
GND3B

SN74CBTLV1G125DCKR_SC70

SUS LED

Q63

G2
S2
G1
S1

2N7002DW_SOT363

BL_UP

GND

GND
GND

VCC

D2
D1

33

SUS_LED#

2

PWR_LED#

4
6

WIFI_LED#

8

OSD_BL_UP

10

OSD_BL_DOWN

12

OSD_VOL_UP

14

OSD_VOL_DOWN

16
18

PANSWIN#

20

SPK_R-

22

SPK_R+

24

SPK_L+

26

SPK_L-

28
30
32
33

+3VSUS

5

4

GLED

R750
10K/4

R751
10K/4

R737 330R/6

+3VA+3VSUS

R746
10K/4

R744 330R/6

D

G

Q64

S

2N7002

SUS_LED#(15)
PWR_LED#(15)

+3VA

WIFI_LED#(21)

SPK_R-(20)
SPK_R+(20)
SPK_L+(20)
SPK_L-(20)

PWR_LED#

S0: Green LED
S4/S5/DS5: Red LED
S3: Orange(G+R) LED

R730
10K/4

BL & VOL Control

BL_UP(15)

OSD_BL_UP

OSD_BL_DOWN

OSD_VOL_UP

OSD_VOL_DOWN

PANSWIN#

3

R743 1K/4
R907 100K/4

R742 1K/4
R908 100K/4

R741 1K/4
R909 100K/4

R740 1K/4
R910 100K/4

R739 1K/4
R911 100K/4

D

G

Q70

S

2N7002

D

G

Q67

S

2N7002

D

G

Q66

S

2N7002

D

G

Q69

S

2N7002

D

G

Q68

S

2N7002

BL_DOWN(15)

VOL_UP(15)

VOL_DOWN(15)

OSD_PWRBTN_IN (15)

2

EMI caps (close to
OSD1)

C428 X_C0.1u6.3X4
C454 X_C0.1u6.3X4
C427 X_C0.1u6.3X4

C437 X_C0.1u6.3X4
C436 X_C0.1u6.3X4
C435 X_C0.1u6.3X4
C434 X_C0.1u6.3X4
C433 X_C0.1u6.3X4

C426 X_C0.1u6.3X4
C425 X_C0.1u6.3X4
C121 X_C0.1u6.3X4
C122 X_C0.1u6.3X4

Title

Title

Title

OSD & LED & SPK & USB2.0*4 Conn.

OSD & LED & SPK & USB2.0*4 Conn.

OSD & LED & SPK & USB2.0*4 Conn.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

SUS_LED#
PWR_LED#
WIFI_LED#

OSD_BL_UP
OSD_BL_DOWN
OSD_VOL_UP
OSD_VOL_DOWN

PANSWIN#
SPK_R-

SPK_R+
SPK_L+
SPK_L-

DMS-SA30

DMS-SA30

DMS-SA30

17 35Friday, March 31, 2017

17 35Friday, March 31, 2017

1

17 35Friday, March 31, 2017

10

10

10

5

R597
1M/4

AVCC1

AVCC2

C611

C0.1u6.3X4

C604

C0.1u6.3X4

R607 0R/4

R605

10K1%4

41

U37

1

XO

2

XI

3

AUXP

4

AUXN

5

AVSS-1

6

AVCC-1

7

RESERVE-1

8

RESERVE-2

9

GNDPLL

10

VDDPLL

DVDD_1P2

ISET

DDPB_HPD

38

37

40

39

HPD

RBIAS

ResetB

AVSS-5

CHRONTEL
CH7517

SPC013SPD014GPIO015GPIO116AVSS-217AVCC-218VGA_SCL19VGA_SDA

DGND-112DVDD-1

11

SPC0

SPD0

VGA_DDPB_TXP0(3)
VGA_DDPB_TXN0(3)
VGA_DDPB_TXP1(3)
VGA_DDPB_TXN1(3)

VGA_DDPB_AUXP(3)
VGA_DDPB_AUXN(3)

DDPB_TXN1

35

36

DVDD-2

DGND-2

R603 6.8K1%4
R599 6.8K1%4 R535 4.7K/4

+3V+3V

L39
180L1.5A-150/6

+1P2_VGA

L35
180L1.5A-150/6

PCH_DDPB_HPD(10)

R598 0R/4

12

Y5

27MHZ12p_S

3 4

RST_CH7517#(9)

DDPB_AUXP
DDPB_AUXN

VDDPLL_1P2

C608

C10u6.3X6

C597

C10u6.3X6

DP to VGA

CH7517A

Ref. 98H9 P16/26

C299
C15p50N6

D D

C298
C15p50N6

+1P2_VGA

C C

+1P2_VGA

L14
180L1.5A-150/6

C10u6.3X6

L15
180L1.5A-150/6

C10u6.3X6

L34
180L1.5A-150/6

C10u6.3X6

VDDPLL_1P2

C303

C296

C0.1u6.3X4

AVCC1

C329

C319

C0.1u6.3X4

DVDD_1P2 AVDD_1P2

C600

C595

C0.1u6.3X4

AVDD_1P2DVDD_1P2

DDPB_TXP1

DDPB_TXN0

33

32

D1P34D1N

AVDD

HO/CSYNC

AVCC1

C337 C0.1u16X4
C336 C0.1u16X4
C330 C0.1u16X4
C324 C0.1u16X4

C302 C0.1u16X4
C301 C0.1u16X4

4

DDPB_TXP0

D0P31D0N

AGND

AVSS-4

RDAC

AVCC-4

GDAC

AVSS-3

BDAC

AVCC-3

VO

CH7517A-BF

20

30
29
28
27
26
25
24
23
22
21

DDC_DATA
DDC_CLK

+3V

DDPB_TXP0
DDPB_TXN0
DDPB_TXP1
DDPB_TXN1

DDPB_AUXP
DDPB_AUXN

VGA_R

AVCC2

VGA_G

VGA_B

AVCC2

VGA_HSYNC
VGA_VSYNC

+3V
+3V

VGA_HSYNC

VGA_VSYNC

+5VSUS+3V

R539
10K/4

V1P2_PG

C260 X_C0.1u6.3X4

C257

C258

C1u6.3X4

C1u6.3X4

+5V

U54

1

A

2

B

GND

+5V

U53

1

A

2

B

GND

VGA_1P2

R571 10R1%4

U31

1

POK

2

EN

3

VIN

5

NC

3

C625

5

C0.1u6.3X4

VCC

4

HSYNC

Y

SN74AHC1G08DCKR_SC70

3

C618

5

C0.1u6.3X4

VCC

4

VSYNC

Y

SN74AHC1G08DCKR_SC70

3

4

GND-18GND-2

C1u6.3X4

6

VDD

VOUT

7

FB

GS7166SSO-R_PSOP8

9

R890
33R/4

CON_HSYNC DDC_CLK

C623
C10p50N4

R889
33R/4

CON_VSYNC

C622
C10p50N4

VOUT = VREFx(R1+R2)/R1
= 0.8x(20+10)/20 = 1.2V

C263

V1P2_FB

R588
10K1%4

R584
20K1%4

+1P2_VGA

C0.1u6.3X4

C285

2

+5V_VGA

+3V+3V

R628

2.2K/4

R629

2.2K/4

VGA_G CON_G

R630
75R1%4

+5V

S-1N5817_DO214AC

+1P2_VGA

C286
C22u6.3X8

DDC_DATA

S

S

+3V+3V

Q53
2N7002

G

D

Q54
2N7002

G

D

R621
75R1%4

D29

+5V_VGA

R635

2.2K/4

C629

X_C10p50N4

R634

2.2K/4

C628

X_C10p50N4

R622
75R1%4

FS5

1 2

F-MICROSMD110

R901
100R1%4

R894
100R1%4

CON_DCLK

CON_DDATA

C354

C1.5p50N4

C1.5p50N4

+5V_VGA

C342

CON_VSYNC
CON_DDATA

L18 16n500mA
L16 16n500mA
L17 16n500mA

C351

C1.5p50N4

+5V_VGA

CON_R
CON_G

CON_R
CON_G
CON_B

D32

6
1

D50

6
1

V10

1

+5V_VGA

C357 C0.1u6.3X4

52

ESD-AOZ8902CIL

+5V_VGA

C360 C0.1u6.3X4

52

ESD-AOZ8902CIL

C359

C1.5p50N4

DSUB1A

V6
V1
V7
V2
V8
V3
V9
V4

V5

X3

4
3

4
3

COM_VGA

X4

CON_DCLK
CON_HSYNC

C344

C1.5p50N4

V11
V12
V13
V14
V15

CON_B

CON_RVGA_R
CON_BVGA_B

C358

C1.5p50N4

CON_DDATA
CON_HSYNC
CON_VSYNC
CON_DCLK

DP Connector

B B

DisplayPort Auxiliary Channel Dual Mode Support Protection
Circuit

PWR_INV PWR_INV

R898
20K1%4

DP/HDMI DET. INV.
H: HDMI (PU to 3.3V through 100KR)
L: DP (PD to GND through 1MR)

DP AUX Connection

DET_DP
DP_AUX_P_B

A A

DSP_DDPD_CTRLDATA(10)

DET_DP
DP_AUX_N_B

HDMI DDC Connection

DET_HDMI
DET_HDMI

DP_AUX_P_C

5

R897 15KR1%4
R903 4.99KR1%4

+19VA

+12V

Ib=0.54mA
BIb=70*0.54=38mA

R642 4.7K/4

Ib=0.03mA
BIb=70*0.03=2.1mA

R636

1M/4

Q49

G2
S2
G1
S1

2N7002DW_SOT363

Q91

G2
S2
G1
S1

2N7002DW_SOT363

R896 X_0R/4
R895 0R/4

Q97

2
5

NN-CMKT3904

DP_AUX_P_C

D2

DP_AUX_N_C

D1

DP_AUX_N_C

D2
D1

PWR_INV

Ic=1.2mA

DET_HDMIDET_DP

6
1

DET_DPDP_CBL_DET

3
4

Ic=0.95mA

R623 100K/4
R620 100K/4

DSP_DDPD_CTRLCLK(10)

R899
10K1%4

+3V

4

DSP_DDPD_TXP3(3)
DSP_DDPD_TXN3(3)

DSP_DDPD_TXP2(3)
DSP_DDPD_TXN2(3)

DSP_DDPD_TXP1(3)
DSP_DDPD_TXN1(3)

DSP_DDPD_TXP0(3)
DSP_DDPD_TXN0(3)

DSP_DDPD_AUXP(3)
DSP_DDPD_AUXN(3)

C370 C0.1u16X4
C376 C0.1u16X4

C362 C0.1u16X4
C361 C0.1u16X4

C386 C0.1u16X4
C385 C0.1u16X4

C373 C0.1u16X4
C372 C0.1u16X4

C340 C0.1u16X4
C343 C0.1u16X4

HPD Inversion for DP

DP_DDPD_HPD DPD_HPD

R633 0R/4

+5V

R638
X_100K/4

DP_D3P
DP_D3N

DP_D2P
DP_D2N

DP_D1P
DP_D1N

DP_D0P
DP_D0N

DP_AUX_P_B
DP_AUX_N_B

D

G

Q55

S

N-AO3414_SOT23

DSP_DDPD_HPD(10)

RN25

1324

4P2R-0R/4

1324

RN24

4P2R-0R/4

RN27

1324

4P2R-0R/4

1324

RN26

4P2R-0R/4

R632
100K/4

DP_DATA3_P_C
DP_DATA3_N_C

DP_DATA2_P_C
DP_DATA2_N_C

DP_DATA1_P_C
DP_DATA1_N_C

DP_DATA0_P_C
DP_DATA0_N_C

3

DP_DATA1_P_C
DP_DATA1_N_C

DP_DATA3_P_C DP_DATA3_P_C
DP_DATA3_N_C

DP_DATA0_P_C
DP_DATA0_N_C DP_DATA0_N_C

DP_DATA2_P_C
DP_DATA2_N_C

DP_AUX_N_C
DP_AUX_P_C

DP_DDPD_HPD
DP_CBL_DET

1
2

4
5

1
2

4
5

1
2

4
5

D41

3

D40

3

D33

3

DP_DATA1_P_C

10

NC

DP_DATA1_N_C

9

NC

7

NC

DP_DATA3_N_C

6

NC

ESD-AOZ8808DI-05

8

DP_DATA0_P_C

10

NC

9

NC

DP_DATA2_P_C

7

NC

DP_DATA2_N_C

6

NC

ESD-AOZ8808DI-05

8

DP_AUX_N_C

10

NC

DP_AUX_P_C

9

NC

DP_DDPD_HPD

7

NC

DP_CBL_DET

6

NC

ESD-AOZ8808DI-05

8

M: D0G-03A0500-N52
S: D0G-06A050C-A68
S: D0G-05A0300-I14

DP_DATA0_P_C
DP_DATA0_N_C

DP_DATA1_P_C
DP_DATA1_N_C

DP_DATA2_P_C
DP_DATA2_N_C

DP_DATA3_P_C
DP_DATA3_N_C

+3V

AC

D24
S-1N5817_DO214AC

2

DP_CBL_DET

R641 1M/4

DP_AUX_P_C
DP_AUX_N_C

DP_DDPD_HPD

FS2

DP_PWR

1 2

F-MICROSMD110

Title

Title

Title

VGA(CH7517A) & Mini DP

VGA(CH7517A) & Mini DP

VGA(CH7517A) & Mini DP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C353

C0.1u6.3X4

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

C352

C0.01u16X4

DMS-SA30

DMS-SA30

DMS-SA30

DP1

ML_LANE_0P
GND-1
ML_LANE_0N
ML_LANE_1P
GND-2
ML_LANE_1N
ML_LANE_2P
GND-3
ML_LANE_2N
ML_LANE_3P
GND-4
ML_LANE_3N
CONF1G1
CONF1G2
AUXCHP
GND-5
AUXCHN
HOT PLUG DETECT
RETURN
DPPWR

DISPO20PM_BLACK

1

MEC1
MEC2

18 35Friday, March 31, 2017

18 35Friday, March 31, 2017

18 35Friday, March 31, 2017

X1

X1

X2

X2

X3

X3

X4

X4

MEC1
MEC2

10

10

10

5

4

3

2

1

Intel LAN I219-V/LM

R877
330R/6

R878
0R/6

NC
NC

NC
NC

X_ESD-AOZ8808DI-05

3

8

R843
10K/4

C579

LINK#_ACTIVITY
LAN_ACTLED

MDI_C0P
MDI_C0N
MDI_C1P
MDI_C1N
MDI_C2P
MDI_C2N
MDI_C3P
MDI_C3N

C609

C470p50X4

10
9

7
6

D

G

S

C613 C1u6.3X4

C610

C470p50X4

MDI_C0P
MDI_C0N

MDI_C1P
MDI_C1N

C580

C1u6.3X4

R847 10K/4

Q82
2N7002

+3VS_LAN

If CLKREQ#2_LAN is connected to PCH,
its PU resistor should be connected to +3.3A_LAN

D D

+3VA

+3VS_LAN

R856

R852

X_4.7K/4

4.7K/4

LAN_WAKE#

+3VS_LAN

LAN_DISABLE#(12)

LAN_DISABLE# must be connected to
PCH's LAN_PHY_PWR_CTRL.
Don't PU/PD it as CRB.

C C

C589 C30p50N6

C593 C30p50N6

CLKREQ#2_LAN(10)

R855 X_10K/4
R858 0R/4
R859 X_10K/4

R867 0R/4

12

Y6

25MHZ20p_S

RST_LAN#(9)

CLK_LAN_DP(10)
CLK_LAN_DN(10)

PE4_LAN_RXP(9)
PE4_LAN_RXN(9)

PE4_LAN_TXP(9)
PE4_LAN_TXN(9)

+3VS_LAN

R857 X_10K/4
R849 X_10K/4

XTALO

XTALI

R842 0R/4

C576 C0.1u16X4
C575 C0.1u16X4

C574 C0.1u16X4
C573 C0.1u16X4

SMLINK0_CLK(12)
SMLINK0_DATA(12)

LAN_WAKE#(12)

TP70
TP69

R866
1K1%4

R873

3.01K1%4

R841
10K/4

TXDP_C
TXDN_C

RXDP_C
RXDN_C

LAN_WAKE#
LAN_DISABLE_R_#

LINK#_ACTIVITY
SPEED_1000#
SPEED_100#

TP_LAN_JTDI
TP_LAN_JTDO
TP_LAN_JTMS
TP_LAN_JTCK

XTALO
XTALI

RBIAS_LAN

U51

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

2

LANWAKE_N

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTAL_OUT

10

XTAL_IN

30

TEST_EN

12

RBIAS

I219-LM / V

MDI

PCIE

RSVD1_VCC3P3

SMBUS

LED

JTAG

I219LM: B06-0I2191C-I06
I219V: B06-0I2190C-I06

MDI_PLUS[0]

MDI_MINUS[0]

MDI_PLUS[1]

MDI_MINUS[1]

MDI_PLUS[2]

MDI_MINUS[2]

MDI_PLUS[3]

MDI_MINUS[3]

VDD3P3_IN

VDD3P3-1
VDD3P3-2

VDD3P3-3
VDD3P3-4

CTRL1P0

VDD0P9-0
VDD0P9-1
VDD0P9-2
VDD0P9-3
VDD0P9-4
VDD0P9-5
VDD0P9-6
VDD0P9-7
VDD0P9-8

SVR_EN_N
VSS_EPAD

13
14

17
18

20
21

23
24

1
5
4
15

19
29

7
8

11
16
22
37
40
43
46
47

6
49

MDI_C0P
MDI_C0N

MDI_C1P
MDI_C1N

MDI_C2P
MDI_C2N

MDI_C3P
MDI_C3N

R848 4.7K/4

CHOKE11

1 2

CH-4.7u1.14A72mS

R864 0R/4

C304
C1u6.3X4

C281
C22u6.3X8

+3VS_LAN

+0.9V_LAN

500mA

C287

C0.1u6.3X4

+3VS_LAN

SLP_LAN#(12)

C612 X_C0.1u6.3X4
R614 330R/6

C0.1u6.3X4

SPEED_100#
SPEED_1000#

MDI_C0P

1

MDI_C0N

2

MDI_C1P

4

MDI_C1N

5

+3.3A_LAN

Soft Start Control:

0.1~100ms

R840 20K1%4

C338

D52

X_C1u6.3X4

VCT

MDI_C2P
MDI_C2N

MDI_C3P
MDI_C3N

LAN_USB1B

11

Green-

12

Green+

P1
P2
P3
P4
P5
P6
P7
P8
P9

P10

14

GREEN+/ORANGE-

13

GREEN-/ORANGE+

RJ45_USBX2_LEDX2

+3VSUS+5VA

G

Q84
P06P03LCG_SOT89

D S

Place caps
close to PHY

1
2

4
5

POWER

TD1+
TD1­TD2+
TD2­TD3+
TD3­TD4+
TD4-

GND

D53

NC
NC

NC
NC

X_ESD-AOZ8808DI-05

3

8

R851
10K/4

10
9

7
6

+3VS_LAN

C22u6.3X8

MDI_C2P
MDI_C2N

MDI_C3P
MDI_C3N

C586

+3VS_LAN

C0.1u6.3X4

90mA

C582

B B

RN14

U3_T1P
U3_T1N USB3_TX1_DN

U3_T2P
U3_T2N USB3_TX2_DN

USB3_RX1P(9)
USB3_RX1N(9)

USB3_RX2P(9)
USB3_RX2N(9)

5

C315 C0.1u16X4
C316 C0.1u16X4

C317 C0.1u16X4
C318 C0.1u16X4

USB3_TX1P(9)
USB3_TX1N(9)

USB3_TX2P(9)
USB3_TX2N(9)

A A

1324

4P2R-0R/4

RN15

1324

4P2R-0R/4

RN18

1324

4P2R-0R/4

RN19

1324

4P2R-0R/4

USB3_TX1_DP
USB3_TX1_DN

USB3_TX2_DP

USB3_RX1_DP
USB3_RX1_DN

USB3_RX2_DP
USB3_RX2_DN

+5VSUS

C10u10Y8

4

C297

USB1N
USB1P

USB2N
USB2P

USB_EN(16,17,22,23,24)

4
2
3
5

OC#0(11)

D30

1
2

4
5

3

VOUT1
VOUT2
VOUT3

GND

RN23

1324

4P2R-0R/4

RN22

1324

4P2R-0R/4

USB1+(9)
USB1-(9)

USB2+(9)
USB2-(9)

U34

EN
VIN1
VIN2
OC#

UP7549PRA8-25_MSOP8

Active high for uP7549P/R/T
Active low for uP7549Q/S/U

10

NC

9

NC

7

NC

6

NC

ESD-AOZ8808DI-05

8

USB1P
USB1N

USB2P
USB2N

8
7

C313

6

C0.1u6.3X4

1

USB1N
USB1P

USB2N
USB2P

12

+

EC25

C470u6.3SO

VUSB_L

3

R609
1K/4

USB3_TX1_DP
USB3_TX1_DN

USB3_TX2_DP
USB3_TX2_DN

USB3_RX1_DP
USB3_RX1_DN

USB3_RX2_DP
USB3_RX2_DN

1
2

4
5

1
2

4
5

D26

3

D25

3

USB3_TX1_DP

10

NC

9

NC

USB3_TX2_DP

7

NC

USB3_TX2_DN

6

NC

ESD-AOZ8808DI-05

8

10

NC

9

NC

7

NC

6

NC

ESD-AOZ8808DI-05

8

USB3_RX1_DP
USB3_RX1_DN

USB3_RX2_DP
USB3_RX2_DN

LAN_USB1A

1

VBUS_1

GND_1

GND_D_1

GND_2
GND_3
GND_4
GND_5

VBUS_2

GND_6

GND_D_2

GND_7
GND_8
GND_9

GND_10

U10

VUSB_L

U13
U16
X1
X2
X5
X6

U1

VUSB_L

U4
U7
X3
X4
X7
X8

10

10

19 35Friday, March 31, 2017

19 35Friday, March 31, 2017

19 35Friday, March 31, 2017

10

USB2P
USB2N

USB3_TX2_DP
USB3_TX2_DN

USB3_RX2_DP
USB3_RX2_DN

USB1P
USB1N

USB3_TX1_DP
USB3_TX1_DN

USB3_RX1_DP
USB3_RX1_DN

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

U12

D+

U11

D-

U18

SSTX1+

U17

SSTX1-

U15
U14

U3
U2

U9
U8

U6
U5

LAN-I219 & USB3.017ci203

LAN-I219 & USB3.0

LAN-I219 & USB3.0

UP

SSRX1+
SSRX1-

D0+
D0-

SSTX0+
SSTX0-

DOWN

SSRX0+
SSRX0-

RJ45_USBX2_LEDX2

DMS-SA30

DMS-SA30

DMS-SA30

5

teknisi indonesia

Auido

ALC898/892

C288

JDREF

R613
20K1%4

R591 0R/4

C293

C0.1u6.3X4

47
48

5

8
10
11

6

2

3
13

34

32
30
28
37
29
31
27
33
40

12

B05-LC89804-R09
B05-LC89214-R09

D D

AZ_SDOUT(10)
AZ_SDIN0(10)
AZ_SYNC(10)
AZ_RST#(10)

AZ_BITCLK(10)

R592 X_0R/4

FRONT_JD#

R875 5.1K1%4

MIC1_JD

R876 20K1%4

LDOVDD

R627 X_20K1%4

EC27
CD100u/16V

C348 X_C0.1u6.3X4

C347

X_C0.1u6.3X4

ALC892 pin37 NC

C C

C10u10Y8

R590 22R/4

C248 X_C0.1u6.3X4

+

12

C349

C10u6.3X6

EAPD#

AZ_SDIN0_R

AZ_BITCLK

DMIC_CLK

SENSE_A
SENSE_B

MIC1_V_R
MIC1_V_L

PIN37_VREFO
LINE2_VREFO

AUDIO_VREF

+3V

1

U36

SPDIFI/EAPD
SPDIFO
SDATA-OUT

SDATA-IN
SYNC
RESET#

9

DVDD

DVDD-IO

BCLK

GPIO0/DMIC_CLK/SPDIFO2
REGREF

Sense A
Sense B

MIC1-VREFO-R
MIC2-VREFO
MIC1-VREFO-L
PIN37-VREFO
LDO-IN
LINE2-VREFO
VREF
Sense C
JDREF

PCBEEP

DMIC_DATA

GPIO1/DMIC-DATA4DVSS

7

LDO_OUT

38

25

LDO-OUT1

AVSS1

42

26

FRONT-R

LDO-OUT2

AVSS2

FRONT-L

SURR-R

SURR-L

CENTER

LFE

SIDE-R
SIDE-L

LINE1-R

LINE1-L

LINE2-R

LINE2-L

MIC1-R
MIC1-L

MIC2-R
MIC2-L

CD-R

CD-GND

CD-L

ALC898

ALC898

C327 C0.1u16X4
C346 C0.1u16X4

36

LOUTR

35

LOUTL

41
39

43
44

46
45

24
23

AMPIN_R

15

AMPIN_L

14

22

MIC1R

21

MIC1L

17
16

20
19
18

4

1 2

+

EC28 SMD10U/10V

+

1 2

EC29 SMD10U/10V

C325 C0.1u16X4
C312 C0.1u16X4

C339 C10u25X8
C333 C10u25X8

LOUT_R
LOUT_L

AMP_IN_R
AMP_IN_L

MIC1_R
MIC1_L

3

45.8mA

D21

L36 60L900mA/8

C350

C10u6.3X6

C284 X_C1000p50X4
CP12
CP22
CP11

+5VSUS LDOVDD

X_S-RB520S-30_SOD523_TVS

C598

C0.1u6.3X4

LOUT_L

LOUT_R

MIC1_V_L
MIC1_V_R
MIC1_L
MIC1_R

2

R646 75R1%4

R643 75R1%4

R644

22K/1%/4

R625 2.2K/4
R626 2.2K/4
R648 75R1%4
R649 75R1%4

ESD-MLVS0402L04

Mute & PD

FRONT_JD#

D42

10K1%4

G

R874

ESD-MLVS0402L04
R645
22K/1%/4

12

+5V_AMP

MUTE

DS

Q89
N-FDV301N_SOT23

D37

12

X_C470p50X4

D43

ESD-MLVS0402L04

R602

10K1%4

MUTE#

D

G

S

12

C387

+5V_AMP

Q88
2N7002

D38

12

ESD-MLVS0402L04

C383

X_C470p50X4C290 C10u6.3X6

Q45

D1
D2

2N7002DW_SOT363

MUTE_EAPD

LOUTLA
FRONT_JD#

LOUTRA

MIC1LA
MIC1_JD

MIC1RA

MIC1LA
MIC1RA

S1

MUTE_EAPD

G1
S2
G2

R608 33R1%4

R595 10K1%4

1

MEC1

MIC1_JD
FRONT_JD#

+5V_AMP

AUDIO1

22

22

23

23

24

24

25

25
MEC1

2

2

3

3

4

4

5

5

1

1

C369 X_C0.1u6.3X4
C368 X_C0.1u6.3X4

EMI

EAPD#

(Upper)

(DOWN)

G_16G_27G_38G_4

JACK-AUDIOF_RED

9

Amplifier -TPA2008D2

AMP_IN_L

B B

+5V_AMP
+5V_AMP

+5V_AMP

A A

R862 0R/4
C583 C0.1u16X4

R587 120K/4

LOUTP

LOUTN

C581 C220p25N4
R850 120K/4

5

AMP_PD#

1
2
3
4
5
6
7
8

9
10
11
12

LINN
LINP
SHUTDOWN
PVDDL
LOUTP
PGNDL
PGNDL
LOUTN
PVDDL
COSC
ROSC
AGND

U52

RINN
RINP

BYPASS

PVDDR
ROUTP
PGNDR
PGNDR
ROUTN
PVDDR

NC

VOLUME

VDD

THMR_PAD

25

TPA2008D2PWPR_HTSSOP24

24
23
22
21
20
19
18
17
16
15
14
13

Ci <= C-Byp/10
The range of C-Byp

R869

is 0.47uf ~ 1uf

0R/4

AMP_IN_R

C599 C0.1u16X4
C607 C1u25X6

+5V_AMP

ROUTP

ROUTN

+5V_AMP

VOLUME

+5V_AMP

4

+5V

L41 X_220L2A-50/6

1.1A

L13 220L2A-50/6

C272

C0.1u6.3X4

L30

LOUTN

220L2A-50/6

L31

LOUTP

220L2A-50/6

L38

ROUTP

220L2A-50/6

L37

ROUTN VOLUME

220L2A-50/6

SPK_L-(17)

C577
C1000p16X4

SPK_L+(17)

C578
C1000p16X4

SPK_R+(17)

C606
C1000p16X4

SPK_R-(17)

C605
C1000p16X4

3

+5VSUS

C602

C0.1u6.3X4

C603

C0.1u6.3X4

2

+5V_AMP

C594

C294

C0.1u6.3X4

C10u10Y8

VOL_PWM Level Shift

+5V_AMP

R863
10K1%4

R865
220KR1%4

VLP#

D22

MUTE#

AUDIO_SD#(15)

AUDIO_SD#
Reserve PU to +5VA
@Scalar side

+3VA

+3VA

R853

Q85

D2
D1

2N7002DW_SOT363

R845 X_0R/4

47K/4

G2

VLP#

S2
G1
S1

Title

Title

Title

Audio Codec ALC898/AMP17ci203

Audio Codec ALC898/AMP

Audio Codec ALC898/AMP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Y
X

S-BAT54A-7-02-F_SOT23

R844

4.7K/4

VOL_PWM(15)

DMS-SA30

DMS-SA30

DMS-SA30

AMP_PD#

Z

20 35Friday, March 31, 2017

20 35Friday, March 31, 2017

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20 35Friday, March 31, 2017

10

10

10

5

Vinafix.com

teknisi indonesia

Mini PCI-E Slot

Full size (No.19)

PCH_WAKE#(12,21,23)

CLKREQ#5_PE1(10)

CLK_PE5_DN(10)
CLK_PE5_DP(10)

D D

PE5_PCIE_RXN(9)
PE5_PCIE_RXP(9 )

PE5_PCIE_TXN(9)
PE5_PCIE_TXP(9)

C58

C0.1u6.3X4

+3V +3V_TV

C C

Mini PCI-E Slot

Standard (No.13)

PCH_WAKE#(12,21,23)

CLKREQ#6_PE2(10)

CLK_PE6_DN(10)
CLK_PE6_DP(10)

PE6_PCIE_RXN(9)
PE6_PCIE_RXP(9 )

PE6_PCIE_TXN(9)
PE6_PCIE_TXP(9)

B B

C0.1u6.3X4

30L4A-15/8

C181

+3V

+3V

C1u6.3X4

L6

+3V

+3V

R1 2 X_0R/4
R2 1 10K/4

C51 C0.22u6.3X4
C52 C0.22u6.3X4

C63

C10u6.3X6

R302 X_0R/4
R303 10K/4

C180 C0.22u6.3X4
C184 C0.22u6.3X4

C183

C1u6.3X4

C68

C188

C10u6.3X6

PE5_TX­PE5_TX+

+3V
+3V

PE6_TX­PE6_TX+

+3V
+3V

MINI_ PC IE1

1

WAKE#

3

COEX1

5

COEX2

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

KEY

17

Reserved*(UIM_C8)

19

Reserved*(UIM_C4)

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31

PETn0

33

PETp0

35

GND

37

GND

39

+3.3Vaux

41

+3.3Vaux

43

GND

45

Reserved1

47

Reserved2

49

Reserved3

51

Reserved4

53

GND

SLOT-MINIPCI52P_BLACK

MINI_ PC IE2

1

WAKE#

3

COEX1

5

COEX2

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

KEY

17

Reserved*(UIM_C8)

19

Reserved*(UIM_C4)

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31

PETn0

33

PETp0

35

GND

37

GND

39

+3.3Vaux

41

+3.3Vaux

43

GND

45

Reserved1

47

Reserved2

49

Reserved3

51

Reserved4

53

GND

+3.3Vaux

GND

+1.5V

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

UIM_VPP

GND

W_DISABLE#

PERST#

+3.3Vaux

GND

+1.5V

SMB_CLK

SMB_DATA

GND

USB_D-

USB_D+

GND

LED_WWAN#

LED_WLAN#

LED_WPAN#

+1.5V

GND

+3.3Vaux

GND

MEC1
MEC2

+3.3Vaux

GND

+1.5V

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

UIM_VPP

GND

W_DISABLE#

PERST#

+3.3Vaux

GND

+1.5V

SMB_CLK

SMB_DATA

GND

USB_D-

USB_D+

GND

LED_WWAN#

LED_WLAN#

LED_WPAN#

+1.5V

GND

+3.3Vaux

GND

MEC1
MEC2

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

MEC1
MEC2

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

MEC1
MEC2

4

+3V _TV
+1P5_PE

+3V _TV
+1P5_PE

+1P5_PE
+3V _TV

+3V
+1P5_PE

+3V
+1P5_PE

USB9N
USB9P

WLAN_LED#

+1P5_PE
+3V

PE1_DIS#

RST_PCIE1# (9 )

SMB_PE1_CLK
SMB_PE1_DAT

PE2_DIS#

RST_PCIE2# (9 )

SMB_PE2_CLK
SMB_PE2_DAT

R4 7 8.2K1%4
R4 5 X_0R/4

R703 0R/4
R704 0R/4

+1P5_PE

C69

C0.1u6.3X4

US B 9+(9)

US B 9-(9)

R2 61 8.2K1%4
R2 60 0R/4

R705 0R/4
R263 0R/4

+1P5_PE

C157

C0.1u6.3X4

+3V_TV

MPE1_DIS# (11)

SMBCLK_VCC (7,12,21)
SMBDATA_VCC (7,12,21)

C49

C0.1u6.3X4

RN33

1324

4P2R-0R/4

+3V

WLAN_DIS# (11)

SMBCLK_VCC (7,12,21)
SMBDATA_VCC (7,12,21)

C0.1u6.3X4

US B 9P
US B 9N

USB9P
USB9N

WLAN_LED#

3

Post For Mini-PCIE1

H1

Spacer
Support

MEC1

Post For Mini-PCIE2

H3

E2B-7B01010

6
1

+3V

R760
10K/4C156

E2B-98G4010

1

+3V

C473 C0.1u6.3X4

52

D44

ESD-AOZ8902CIL

+3V

R766
10K/4

G

S

D

Q71

2N7002

4
3

R7 57
330R/6

H2

+3V A

Spacer
Support

E2B-98G4010

MEC1

H4

E2B-7B01010

R7 63

4.7K/4

WIFI_LED # (1 7)

2

TPM 2.0 / 1.2 (X5/X7 Sku)

B0C-0966542-I14 V2.0 F/W: 5.51
B0C-0966002-I14 V1.2 F/W:4.40

LPC_AD0(12,22)
LPC_AD1(12,22)
LPC_AD2(12,22)
LPC_AD3(12,22)

LPC_FRAME#(12,22)

RST_TPM#(9,13)

CLK_TPM_24M(10 )

1

VCC_TPM

R581 X_0R/4
R580 X_0R/4
R530 X_0R/4

R528 X_4.7K/4

+3V

R529 X_4.7K/4

+3V SU S

R578 X_0R/4

VCC_TPM

R579 0R/4

NC_9:
Not Connected
This pin may be connected to the Reset signal (for
backwardcompatibility) orm ay be left floating.

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

SERIRQ

SERIRQ(12,22)

TP M _ P P LPC_PD#

R577 X_4.7K/4

TP M _ A D DR

TPM_CLKRUN#

LPC_PD#

TPM_PP

JTPM & JLPC

For Debug Only

CLK_JTPM_24M(10)

RST_JTPM#(9 )

U3 0

26

LAD0

23

LAD1

20

LAD2

17

LAD3

22

LFRAME#

16

LRESET#

27

SERIRQ

21

LCLK

7

PP

6

GPIO

18

TPM_ADDR:
Connected to VCC3 : Addresses 4Eh / 4Fh
Connected to GND : Addresses 2Eh / 2Fh

TPM_CLKRUN#:
This pin adds support for the CLKRUN# protocol used in mobile devices.
Connect to the CLKRUN# signal of the mobile chipset.If this feature is
not used, the pinmust be connected to GND.

TPM_PP:
Physic al presence
This pin indicates physical presence; for usage of
this signal,please refer to the TCG specification
v1.2. The TPM2.0 device does not use this
functionality.
For compatibility reasons (downgrade capability
to a TPM1.2), the pin shouldbe connected to a
jumper. The standardpositionof the jumper
should connect the pin toGND. If the pin is
connected to VDD, some special commands are
enabledfora TPM1.2.
This pin does not have an internal pull-up or pulldown
resistor andmust not be left floating.

JTPM1

1 2
3 4

LPC_AD0

5

LPC_AD1

7 8

LPC_AD2

9

LPC_AD3

11 12

LPC_FRAME#

13 14

H2X7[10]M-2PITCH_BLACK

VDD_1
VDD_2
VDD_3
VDD_4

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9

NC_10

GND_14GND_211GND_425GND_3

SLB9665TT2.0-RH-3

+3V SU S

SERIRQ_R

6

1

5
10
19
24

1
2
3
8
12
13
14
15
28
9

+3V

+5V

+3V

VCC_TPM

Place to each power pins

TP M _ C L K RU N #
TPM_ADDR

R1 0
X_0R/4

SERIRQ

R531
0R/6

C253 C0.1u6.3X4
C252 C0.1u6.3X4
C279 C0.1u6.3X4
C280 C0.1u6.3X4

SLOT-MINIPCI52P_BLACK

LPC_FRAME#
LPC_AD3

+1P5 For Mini PCI-E Slot *2

A A

1A

5

+3V

+3V

+3VSUS

+5VSUS

R4 4
10K/4

V1P5_PG

R4 2 4.7K/4
C30 X_C0.1u6.3X4

C26

C10

C1u6.3X4

C22u6.3X8

R1 5 10R1%4

U3

1

POK

2

EN

3

VIN

5

NC

4

VDD

VOUT

FB

GND-18GND-2

GS7166SSO-R_PSOP8

9

4

VOUT = VREFx(R1+R2)/R1
= 0.8x(5.76+4.99)/5.76 = 1.493V

C9

C1u6.3X4

6

R4 0

4.99KR1%4

V1P5A_FB

7

R4 1

5.76KR1%4

C19

C0.1u6.3X4

+1P5_PE

C17
C22u6.3X8

+1P5_PE

EMI

C558 X_C0.1u6.3X4
C7 X_C0.1u6.3X4

3

2

CLK_TPM_24M
CLK_JTPM_24M

LPC_AD2

Ti t l e

Ti t l e

Ti t l e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

JLPC1

1 2
3 4
5
7 8
9

H2X5[10]M-2PITCH_BLACK

Mini PCI-E & TPM & JTPM/JLPC & USB2.0*1

Mini PCI-E & TPM & JTPM/JLPC & USB2.0*1

Mini PCI-E & TPM & JTPM/JLPC & USB2.0*1

LPC_AD0CLK_JTPM_24M
LPC_AD1RST_JTPM#

6

DMS-SA30

DMS-SA30

DMS-SA30

+3V

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21 35Friday, March 31, 2017

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21 35Friday, March 31, 2017

10

10

10

5

SIO - NCT6106D

X_C10p50N4C231
X_C10p50N4C230

SYS_PWROK
SCALAR_PWRBTN#

<Reserve for debug>

1
2

+3V

4

VDD

3

LPC_DRQ#0
SERIRQ

LPC_FRAME#
LPC_FRAME#

SERIRQ
LPC_AD0

LPC_AD1
LPC_AD2
LPC_AD3

CLK_SIO_24M
CLK_IO_24M

SIO_PME#

SIO_SMI#

VSB_LED

+3VSUS

C182

C0.1u6.3X4

C246 X_C0.1u6.3X4
R480 X_0R/4

Resistor MUST close to SIO

C234

X_C0.1u6.3X4

WDTO# connect to FP_RST#
(reserve) & PU to +3V with 2.2KR.

SMLINK1 PU to +3VSUS
@ PCH side

R812

4.7K/4

RSMRST#

R808
100KR4

CLK_IO_24M

LPC_DRQ#0(12)
SERIRQ(12,21)
LPC_FRAME#(12,21)
CLK_SIO_24M(10)
CLK_IO_24M(10)

LPC_AD0(12,21)
LPC_AD1(12,21)
LPC_AD2(12,21)
LPC_AD3(12,21)

WDTO#(12)

H_PECI(3)

SIO_PME#(12)

SMLINK1_CLK(12)

SIO_SMI#(10,12)

SMLINK1_DATA(12)

VSB_LED(17)

VCCIO_PG(28,30)

SYS_PWROK(6,12)

SCALAR_PWRBTN#(15)

PWRBTN#(12)

SLP_S3#(12,24,27,28,31)
RUN_ON#(27)

RSMRST#(12)

SLP_S4#(5,7,12,17,22,24,31)

COM1

+3VSUS

SLP_SUS#(12)

SUS_ON#(27)

If don't control 5VDUAL through SIO:
Pin82&83&85-> NC
Pin84-> Pull up/down.(Don't floating)
Pin69-> Connect to the SB PWR of S5.

R501 X_4.7K/4

+3V

R502 4.7K/4
R503 4.7K/4

R462 X_4.7K/4

+3V

R461 X_4.7K/4
R460 X_4.7K/4

EMI

C229 X_C0.1u6.3X4
C232 X_C0.1u6.3X4

+3VSUS

+3VSUS

R814 4.7K/4

+3V

R313 4.7K/4

+3VA

H1X2M-2PITCH_BLACK

R459 X_4.7K/4

R810 4.7K/4

R330 X_4.7K/4

R747 X_4.7K/4
R748 X_4.7K/4

PWRBTN1

D D

C C

48MHz OSC

<Reserve for SIO's IO_CLK>
Remove it before MP

Y3

1

B B

E/D
GND2OUTPUT

X_OSC-48MHZ25_S

4

CLK_SIO_24M
CLK_IO_24M

DCD1#(23)
RI1#(23)
CTS1#(23)
DTR1#(23)
RTS1#(23)
DSR1#(23)
SOUT1(23)
SIN1(23)

PECI_IO

DDRIN
5VIN
12VIN

CPU_FANTAC
SIO_CPU_FAN

SYSIN
CPUIN

HM_VREF
CPUVCORE

SIO_PME#

SIO_SMI#

COMB_DSW_SEL
SLED

PWROK0

RSMRST#
CASEOPEN#

DTR1#
RTS1#

SOUT1

SLP_SUS_N

R332 43R1%4

C540 C4.7u6.3X6

R417 0R/4
R405 X_0R/4

Default function of pin108 is GP67.

R418 X_0R/4
R815 0R/4
R338 100R1%4

R334 2MR/4

R333 10K/4
R809 X_4.7K/4

R813 0R/4

U26

30

LRESET#

22

LDRQ#

23

SERIRQ

29

LFRAM#

21

PCICLK

19

CLKIN

27

LAD0

26

LAD1

25

LAD2

24

LAD3

77

WDTO#

88

PECI/TSID

6

INDEX#/AUXFANIN

14

TRAK0X#/AUXFANOUT

98

AUXTIN/VIN2

99

VIN1

100

VIN0

91

CPUFANIN

90

CPUFANOUT

93

SYSFANIN

92

SYSFANOUT

104

SYSTIN

103

CPUTIN

102

VREF

101

CPUVCORE

86

PME#

96

SCL/MSCL/GPIO64

95

OVT#/SMI#

94

SDA/MSDA/GPIO63

18

DSKCHG#/BEEP

60

DEEP_S5_1

64

DEEP_S5_2/3VSBSW/LATCH_BKFD_CUT

106

(COMB_DSW_SEL)GPIO65/SUSLED

107

GPIO66/KEYLOCK#

108

14.7456MHZ_CLKIN/ATX PGD/GPIO67

71

PWROK/GPIO57

68

PSIN#/GPIO55

67

PSOUT#/GPIO54

73

SLP_S3#/GPIO61

72

PSON#/GPIO60

75

RSMRST#/GPIO62

76

CASEOPEN#

70

SLP_S5#/GPIO56

56

DCDA#

57

RIA#

49

CTSA#

52

DTRA#(24M_48M_SEL)

51

RTSA#(2E_4E_SEL)

50

DSRA#

54

SOUTA(GPIO_PORT80_SEL)

53

SINA

84

DCDB#/5VDUAL

85

RIB#/SUSWARN#

78

CTSB#

81

DTRB#/SLP_SUS#

80

RTSB#/SLP_SUS_FET

79

DSRB#/BKFD_CUT

83

SOUTB/SUSACK#

82

SINB/SUSWARN_5VDUAL

NCT6106D-RH

NCT6106D

PWRBTN# PU to +3VA
with 3KR @ PCH side.

PSOUT#(PWRBNT#)
PU to +3VA @ PCH side

3

WP#/IRRX/CIRRX

RDATA#/IRTX/CIRTX

GPIO71/TSIC/CIRRXWB

DRVDRN0/SLCT/LED_A/PLED

INDEX#/PE/LED_B/GPIO30

GPIO31/LED_C/BUSY/MOA#

GPIO32/LED_D/ACK#/DSA#

GPIO43/SLIN#/DSKCHG#

GPIO44/INIT#
GPIO45/ERR#
GPIO46/AFD#
GPIO47/STB#

GPIO42/PD0/HEAD#

GPIO41/PD1/RDATA#

GPIO40/PD2/WP#

GPIO37/DGL#/PD3/TRAK0#

GPIO36/DGH#/PD4/WE#

GPIO35/LED_G/PD5/WD#

GPIO34/LED_F/PD6/STEP#

GPIO33/LED_E/PD7/DIR#

DCDC#/GPIO06

RIC#/GPIO07

(SOUTE_P80_SEL)DTRC#/GPIO03
(SOUTC_P80_SEL)RTSC#/GPIO02

CTSC#/GPIO00

DSRC#/GPIO01

SOUTC_P80/GPIO05

SINC#/GPIO04

DCDD#/GPIO16

RID#/GPIO17
CTSD#/GPIO10
DTRD#/GPIO13
RTSD#/GPIO12
DSRD#/GPIO11

SOUTD/GPIO15

SIND/GPIO14
DCDE#/GPIO26

RIE#/GPIO27
CTSE#/GPIO20
DTRE#/GPIO23
RTSE#/GPIO22
DSRE#/GPIO21

SOUTE_P80/GPIO25

SINE/GPIO24

WE#/DCDF#
HEAD#/RIF#

DRVDEN0/CTSF#

DIR#/DTRF#

DSA#/RTSF#

MOA#/DSRF#

WD#/SOUTF
STEP#/SINF

PCHVSB/GPIO70

KBRST#

GA20M
KDAT/GPIO51
KCLK/GPIO50

MDAT/GPIO53
MCLK/GPIO52

3VSB
3VSB
VBAT
3VCC
3VCC

VTT
GND
GND

AVSB

AGND

2

USB PWR Mode Slection

SIO_RI#(23)

EXPBD_DET(23)

C535

X_C0.1u6.3X4

USB_EN_R

SLP_S4#(5,7,12,17,22,24,31)RST_SIO#(9)

COM2

COM3

COM4

+3VSUS

KBRST#(12)

+3V
+3V

VBAT

VCCIO

L26 10U300mA

L27 10U300mA

15
16
87

P_LED

31
32

USB_MODE

33

USB_EN_R

34

CDW_VOL_SW CDW_VOL_SW

43
44

SIO_RI# SIO_RI#

45
46
47

PLED
EXPBD_DET

42
41

S3S4_CTL

40
39
38
37
36
35

115
116
109
112

DTR2#

111

RTS2#

110
114
113

123
124
117
120
119
118
122
121

3
4
125
128
127
126
2
1

13
17
5
9
8
7
11
10

69
59

58

A20GATE

63
62
66
65
48
61
74
12
28
89
20
55
97
105

R337 4.7K/4
R376 X_10K/4

R377 X_10K/4
R356 10K/4
R357 10K/4
R339 10K/4
R349 10K/4

C208 C0.1u6.3X4

+3V

C206 C0.1u6.3X4

+AVCC

C1000p50N6

CPUD-

USB_MODE(17)
CDW_VOL_SW(23)

S3S4_CTL(24)

DCD2#(23)
RI2#(23)
CTS2#(23)
DTR2#(23)
RTS2#(23)
DSR2#(23)
SOUT2(23)
SIN2(23)

DCD3#(23)
RI3#(23)
CTS3#(23)
DTR3#(23)
RTS3#(23)
DSR3#(23)
SOUT3(23)
SIN3(23)

DCD4#(23)
RI4#(23)
CTS4#(23)
DTR4#(23)
RTS4#(23)
DSR4#(23)
SOUT4(23)
SIN4(23)

C527

R445 X_0R/4
R336 0R/4

VCC_LED
USB_MODE

EXPBD_DET
S3S4_CTL

P_LED
PLED

VCC_LED

No KBC function:
Pin62&63&65&66 -> Pull-up to +3V
Pin58&59&107 -> NC

C214 C0.1u6.3X4
C215 C10u10Y8

USB_EN(16,17,19,23,24)

R504 X_4.7K/4
R447 4.7K/4
R423 X_4.7K/4
R945 X_4.7K/4

R436 4.7K/4
R426 X_4.7K/4

R441 X_4.7K/4

R463 X_0R/4
R414 0R/4

R734 X_4.7K/4
R735 X_4.7K/4

+3VA

+AVCC From +3VA

+3VA

+3VSUS
+3VSUS
+3VSUS
+3VSUS

+3VSUS
+3VSUS

VCC_LED(17)

+3VSUS

1

H/W Strapping

RTS1#: 2E_4E_SEL

RTS1#

DTR1#

SOUT1

RTS2#

DTR2#

R403 X_1K1%4
R402 1K1%4

R396 X_1K1%4
R395 1K1%4

R388 X_1K1%4
R387 1K1%4

R424 X_1K1%4
R425 1K1%4

R430 X_1K1%4
R431 1K1%4

R399 1K1%4
R400 X_4.7K/4

R404 X_4.7K/4

+3VSUS

4Eh/4Fh
2Eh/2Fh

DTR1#: 24M_48M_SEL

48MHz
24MHz

GPIO_Port80_SEL (pin.54)
Pin31~47 function selection

SOUTC_P80_SEL (pin.111)
Pin109~116 function selection

SOUTE_P80_SEL (pin.112)
Pin125~4 function selection.

COMB_DSW_SEL(pin.106): Pin78-85 function selection.
(Strapped by VSB power [internal RSMRST# signal])
Strapped to high: DSW
Strapped to low: UART

COMB_DSW_SEL

+3V

+3V

+3V

+3V

+3V

+3VA

CPU FAN (PWM Mode)

+5V

R61

2.2K/4
Q12

R65

SIO_CPU_FAN

A A

0R/4

G2
S2
G1
S1

5

2N7002DW_SOT363

CPU_FANTAC

R58

2.2K/4

D2
D1

+5V+5V

R64 27K1%4

R60
10K/4

R63

2.2K/4

CPUFAN_PWM

+12V +12V

D7

R66

1N4148W-F_SOD123

4.7K/4

C60

X_C0.1u16X4

4

CPUFAN1

4

MEC1

3
2
1

H1X4B_BLACK-3.3MM

VCC_DDR

Temperature Sense

Place inner CPU socket &
Near SIO
(Current Mode)

CPUIN

CE

B

VCCP

+19VA

+5V

C2200p50X4

CPUD-

R389 10K1%4

R368 180KR1%4

R360 39KR1%4

R351 10K1%4

Q33

2N3904

B

C538

Q80

2N3904

Voltage Sense

C218 C10u16X8

R367 10K1%4

R359 10K1%4

R350 51K1%4

3

CE

CPUVCORE

SYSIN

C542

C2200p50X4

CPUD-

CPUD-

CPUD­12VIN

CPUD­5VIN

CPUD­DDRIN

+19VA

R275
22K/1%/4

R285 1K1%4

R269
1K1%4

+3VA

DSW_PWROK

tPCH07 & tPCH14

+5VA +3VA

DPWROK

R292
10K/4

Q31

2
5

NN-CMKT3904

R291
1K/4

6
1
3
4

tPCH02 = 25.86ms >10ms(SPEC.)

R284
30K1%4

DPWROK

C160

R274

C1u6.3X6

140K1%4

2

3

A Y

C166 C0.1u6.3X4

5

U22A

VCC

4

GND

NC7WZ14P6X_SC70

2

R290 X_0R/4

5

U22B

VCC

1

A Y

GND

2

Title

Title

Title

SIO-NCT6106D

SIO-NCT6106D

SIO-NCT6106D

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

6

R283
249R1%4

R273

100KR1%4

DMS-SA30

DMS-SA30

DMS-SA30

X_C0.1u6.3X4

1

C239

DSW_PWROK(12)

22 35Friday, March 31, 2017

22 35Friday, March 31, 2017

22 35Friday, March 31, 2017

10

10

10

5

4

3

2

1

COM 1&2

MAX3243CDBR

COM1

U49

D-SUB

C568 C0.33u6.3X4

RTS1#(22)
DTR1#(22)
SOUT1(22)

RI1#(22)
CTS1#(22)
DSR1#(22)
SIN1(22)
DCD1#(22)

+5V

RTS2#(22)
DTR2#(22)
SOUT2(22)

RI2#(22)
CTS2#(22)
DSR2#(22)
SIN2(22)
DCD2#(22)

+5V

C588 C0.33u6.3X4

R839 10K/4

C571 C0.33u6.3X4
C591 C0.33u6.3X4

R582 10K/4

D D

C C

27

V+

3

V-

14

T1IN

13

T2IN

12

T3IN

19

R1OUT

18

R2OUT

17

R3OUT

16

R4OUT

15

R5OUT

20

R20OUT

23

FORCEON

22

FORCEOFF#

21

INVALID#

MAX3243CDBR_SSOP28

COM2

U50

RJ45

27

V+

3

V-

14

T1IN

13

T2IN

12

T3IN

19

R1OUT

18

R2OUT

17

R3OUT

16

R4OUT

15

R5OUT

20

R20OUT

23

FORCEON

22

FORCEOFF#

21

INVALID#

MAX3243CDBR_SSOP28

+5V

26

C569 C0.1u6.3X4

VCC3

9

NRTS1

T1OUT

10

NDTR1

T2OUT

11

NSOUT1 NCTS1

T3OUT

4

NRI1

R1IN

5

NCTS1

R2IN

6

NDSR1

R3IN

7

NSIN1

R4IN

8

NDCD1

R5IN

28

C567 C0.047u10X4

C1+

24

C1-

1

C587 C0.33u6.3X4

C2+

2

C2-

25

GND

+5V

26

C283 C0.1u6.3X4

VCC3

9

NRTS2

T1OUT

10

NDTR2

T2OUT

11

NSOUT2

T3OUT

4

NRI2

R1IN

5

NCTS2

R2IN

6

NDSR2

R3IN

7

NSIN2

R4IN

8

NDCD2

R5IN

28

C570 C0.047u10X4

C1+

24

C1-

1

C592 C0.33u6.3X4

C2+

2

C2-

25

GND

NSIN1
NDSR1

NRI1

8p4C-220p50N

NSOUT1
NDTR1
NRTS1
NDCD1

8p4C-220p50N

NRTS2
NDSR2
NCTS2
NRI2

8p4C-220p50N

NDCD2
NSOUT2
NSIN2
NDTR2

8p4C-220p50N

RN34

USB8+(9)

CN1

1

2

3

4
5
7

CN2

1
3
5
7

CN3

1
3
5
7

CN4

1
3
5
7

NDCD1

6

NSIN1

8

NSOUT1
NDTR1

2

4

6

8

2

4

NDSR2

6

NDCD2

8

NDTR2
NSIN2

2

NSOUT2

4

NCTS2

6

NRTS2

8

C1
C2
C3
C4
C5

P1
P2
P3
P4
P5
P6
P7
P8

DSUB1B

X2X1

C6
C7
C8
C9

COM_VGA

COM_USB1B

RJ45_USBX2

TD1+
TD1­TD2+
TD2­TD3+
TD3­TD4+
TD4-

NDSR1
NRTS1
NCTS1
NRI1

USB8-(9)

+5VSUS

1324

4P2R-0R/4

+3VSUS

RI_EN:
Default : GPI
Diable RI Function: GPO/Low

NRI1

S-BAT54C_SOT23

COM34_RI

USB_EN(16,17,19,22,23,24)

C223

C10u10Y8

OC#4(11)

D47

USB8P
USB8N

R947 10K/4

RI_EN(11)

X

Z

Y

U28

4

EN

2

VIN1

3

VIN2

5

OC#

UP7549PRA8-25_MSOP8

USB8P
USB8N

X_100KR4

R854
47K/4

R948

R846
47K/4

VOUT1
VOUT2
VOUT3

GND

VUSB_E

6
1

D

G

S

D

G

S

8
7
6
1

C572 C0.1u6.3X4

52

D46

4
3

ESD-AOZ8902CIL

PCH_WAKE#(12,21)

Q100
2N7002

R943 X_0R/4
R944 X_0R/4

Q83
2N7002

C240

C0.1u6.3X4

SIO_RI#(22)
PCH_RI#(11)

12

+

EC20

C470u6.3SO

VUSB_E

R486
1K/4

Expansion BD Conn.

COM3&4

+19VA+19VA

EXP1

1 2

4

3

6

5

DCD4#(22)

RI4#(22)

CTS4#(22)
DTR4#(22)
RTS4#(22)
DSR4#(22)
SOUT4(22)

SIN4(22)

DCD3#(22)

RI3#(22)

CTS3#(22)
DTR3#(22)
RTS3#(22)
DSR3#(22)
SOUT3(22)

SIN3(22)

CDS1 & CDS2 :
Cash drawer GPIO output to expansion BD.
Default=Low, this GPIO controlled by AP.

CDST :
Cash drawer status input from expansion BD.
Default=H (Drawer open=Low ; close=High)

EXPBD_DET
No EXP. BD.= High -> Disable COM3&COM4
Insert EXP. BD.= Low -> Enable COM3&COM4

CDW_VOL_SW
+24VSB/+12VSB selection output for expansion BD.
Default=H, It controlled by BIOS setup manual

7 8

9 10
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

USB8N
USB8P

20

COM34_RI

BH2X20-2PITCH_BLACK

CDS1(11)
CDS2(11)

CDST(11)

+5V
+3VSUS
+5VSUS
VUSB_E

EXPBD_DET(22)

CDW_VOL_SW(22)

0.3A

1.5A

B B

USB3_TX3P(9)
USB3_TX3N(9)

USB3_TX4P(9)
USB3_TX4N(9)

A A

5

C320 C0.1u6.3X4
C321 C0.1u6.3X4

C323 C0.1u6.3X4
C322 C0.1u6.3X4

USB3_RX3P(9)
USB3_RX3N(9)

USB3_RX4P(9)
USB3_RX4N(9)

+5VSUS

U3_T3P
U3_T3N

U3_T4P
U3_T4N

C295

C10u10Y8

RN20

1324

4P2R-0R/4

RN21

1324

4P2R-0R/4

RN17

1324

4P2R-0R/4

RN16

1324

4P2R-0R/4

USB_EN(16,17,19,22,23,24)

OC#1(11)

USB3_TX3_DP
USB3_TX3_DN

USB3_TX4_DP
USB3_TX4_DN

USB3_RX3_DP
USB3_RX3_DN

USB3_RX4_DP
USB3_RX4_DN

U33

4

EN

2

VIN1

3

VIN2

5

OC#

UP7549PRA8-25_MSOP8

4

VOUT1
VOUT2
VOUT3

GND

D49

1

USB3N USB3N

2

USB3P

4

USB4P

5

USB4N

3

12

+

EC26

C470u6.3SO

1324

4P2R-0R/4

1324

4P2R-0R/4

VUSB_C

USB3+(9)

USB3-(9)

USB4+(9)
USB4-(9)

8
7

C314

6

C0.1u6.3X4

1

10

NC

9

NC

7

NC

6

NC

ESD-AOZ8808DI-05

8

RN35

USB3P
USB3N

RN36

USB4P
USB4N

R610
1K/4

USB3P
USB4P

USB4N

3

USB3_RX4_DP
USB3_RX4_DN

USB3_RX3_DP
USB3_RX3_DN

USB3_TX4_DN
USB3_TX4_DP

1
2

4
5

1
2

4
5

D28

3

D27

3

USB3_RX4_DP

10

NC

USB3_RX4_DN

9

NC

USB3_RX3_DP

7

NC

USB3_RX3_DN

6

NC

ESD-AOZ8808DI-05

8

USB3_TX3_DPUSB3_TX3_DP

10

NC

USB3_TX3_DNUSB3_TX3_DN

9

NC

USB3_TX4_DN

7

NC

USB3_TX4_DP

6

NC

ESD-AOZ8808DI-05

8

COM_USB1A

USB4P
USB4N

USB3_TX4_DP
USB3_TX4_DN

USB3_RX4_DP
USB3_RX4_DN

USB3P
USB3N

USB3_TX3_DP
USB3_TX3_DN

USB3_RX3_DP
USB3_RX3_DN

2

U12

D+

U11

D-

U18

SSTX1+

U17

SSTX1-

U15
U14

U3
U2

U9
U8

U6
U5

RJ45(COM+USB)
USB3.0: N58-26F0031-S42
USB2.0: N58-16F0291-S42

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

UP

SSRX1+
SSRX1-

D0+
D0-

SSTX0+
SSTX0-

DOWN

SSRX0+
SSRX0-

RJ45_USBX2

COM & Exp BD & USB3.0

COM & Exp BD & USB3.0

COM & Exp BD & USB3.0

U10

VBUS_1

U13

GND_1

U16

GND_D_1

X1

GND_2

X2

GND_3

X3

GND_4

X4

GND_5

U1

VBUS_2

U4

GND_6

U7

GND_D_2

X5

GND_7

X6

GND_8

X7

GND_9

X8

GND_10

DMS-SA30

DMS-SA30

DMS-SA30

VUSB_C

VUSB_C

10

10

23 35Friday, March 31, 2017

23 35Friday, March 31, 2017

1

23 35Friday, March 31, 2017

10

5

Vinafix.com

4

3

2

1

+24V Boost (S3/S0 PWR)

D D

GPIO CTRL(S3/S0 PWR)

S0 PWR

S3 PWR

C C

C326

B B

A A

C180p50N4

C311 C100p100N6
R615

10K1%4

R616 X_0R/4

C1500p50X4

TPS40210

S3S4_CTL(22)

SLP_S3#(12,22,27,28,31)

SLP_S4#(5,7,12,17,22,31)

C332
C0.22u25X6

24V_EN
24V_COMP

C335

R619
51K1%4

24VFB

+5VSUS

5

R546 X_0R/4

R560 X_0R/4

R335 0R/4

R6 01 261KR1%6

U3 5

1

RC

2

SS

3

DIS/EN

4

COMP

5

FB

TPS40210DGQ_MSOP10

R604 51.1KR1%4

R611

1.54KR1%4

USB_EN(16,17,19,22,23)

C365

C10u10Y8

+19VA

C356

C10u25X8

D

PUSB_EN

G

S

C614

X_C0.1u50X6

+19VSB

10

VDD

9

BP

BP

8

GD RV

GDRV

7

I S N S

ISNS

6

GND

11

11

24VFB_R

USB Signal & PWR For PWR USB

USB7+(9)
USB7-(9)

OC #3(11)

Port 13

4P2R-0R/4

1324

RN37

U3 8

4

EN

2

VIN1

3

VIN2

5

OC#

UP7549PRA8-25_MSOP8

R8 92
100KR1%4

R8 93
220KR1%4

+19VSB_EN#

Q94
2N7002

C585 C10u25X8

C300 C0.1u50X6
C291 C1u25X6

R589
1K1%4

C292

C100p100N6

USB7P
USB7N

VOUT1
VOUT2
VOUT3

GND

C627
C1u25X6

P-SM4301PSKPC-TRG_KPAK

PUSB_EN "AND" 24V_PG For +12VSB

+3V A +3V SU S

R572
X_10K/4

100KR1%4

R585 0R/6

ISNS24

PR1

X_Short PAD/4

0.02R1%1206

R596 698R1%4

8
7

C374

6

C0.1u6.3X4

1

1
2 5
3
4

-10V/-25A

+24VSB

R564

ISEN24

R593

12

+

C470u6.3SO

4

+19VSBL

Q52

+24V_PG connect to +3VA
if system W/O +24VSB.

R565
820KR1%4

C275

X_C0.1u6.3X4

CHOKE13
CH-10u4A65mS

1 2

4

DRV24

3
2
1

N-NTMFS5C646NLT1G-DFN5

VUSB_P

EC32

R640
1K/4

12

+

EC23

CD100u25SO

PUSB_EN
24V_PG#
24V_PG

2.6V

5

PQ1

24V_FB

C619

C10u25X8

Q40

G2
S2
G1
S1

2N7002DW_SOT363

R600

2.2R/8

C305
C1000P50X4

L33 80L6A-30/8
L32 80L6A-30/8

C617

C0.1u50X6

+3V A

D2

24V_PG#

D1

D48

2

S-PDS560-13

USB7P
USB7N

R570
10K1%4

13

R594
20R1%4

6
1

GND_PUS B

+19VSB

PUSB_EN# (26)

VUSB_P

R904
0R/4

52

D51

ESD-AOZ8902CIL

+19VSB

+19VSB_PG For 24V Boost

R8 70

620KR1%4

R8 71

100KR1%4

+24VSB

C341
C4.7u50X12

C590
C4.7u50X12

C310
C0.1u50X6

C584
C4.7u50X12

C328
C4.7u50X12

+24VSB_BOOST
Min:22.8V Max:25.2V
Output: 3A (PUSB.2A+CDW. 1A)

C634

C0.1u6.3X4

4
3

3

+19VSB

+24VSB

X_C0.1u6.3X4

+

12

EC24
CD18u35VSO

19VSB_PG

2.6V

C596

C620

C10u25X8

PUSB_EN

R868
10K/4

24V_EN

D

Q86

G

2N7002

S

+5V SB

+12VSB

+24VSB

2

+5VSB (S3/S0 PWR)

+5V SU S

D

G

S

R631
100KR1%4

R872
220KR1%4

Q87
2N7002

C355
C1u25X6

Q96

1
2 5
3
4

P-SM4301PSKPC-TRG_KPAK

-10V/-25A

Power USB

The default spec would stay with +24PUSB spec as VS defined,
andreserve the +12V/+5V PU SB EE de sig n onMB foroptionreuirement.

FS6

1 2

X_F-SMD1812P260TFT
FS1

1 2

X_F-SMD200F
FS4

1 2

F-SMD2920P200TF-24

24V Continue Current = 2.3A
Peak < 4.17A (100W)

VUSB_P

US B 7N
US B 7P

PUSB1

6
7
5
8
1
2
3
4

USB_POWER

Ti t l e

Ti t l e

Ti t l e

+24V Boost & +5VSB & Power USB(U2*1)

+24V Boost & +5VSB & Power USB(U2*1)

+24V Boost & +5VSB & Power USB(U2*1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

C375

C0.1u50X6

1

DOWN

R653 0R/6
R652 0R/6

PUSB_PWR

+

EC31

CD220u35EL11.5

GND _ PU SB

+5V SB

12

+

EC30
CD100u16EL11

12

9
10

11
12

GND_PUS B

DMS-SA30

DMS-SA30

DMS-SA30

+5 VS B

1.5A

C616

C10u25X8

D31

X_ESD-SFI0402-240E0R8PP

24 35Friday, March 31, 2017

24 35Friday, March 31, 2017

1

24 35Friday, March 31, 2017

+5V SB

C615

C0.1u16X4

10

10

10

5

Vinafix.com

+V_CASH PWR Selection

+24VSB / +12VSB

Q50

+24VSB

C334

C0.1u50X6

D D

CDW_GPO2(11)

CDW_GPO2
(Default=H)
High: +24V
Low: +12V

C C

C345 C0.1u50X6
R624 100KR4

R880 4.7KR4

X_C0.1u6.3X4

R618

4.7KR4

B

Q47

N-MMBT3904

C601

+12VSB

C0.1u16X4

1
3

4

100KR4
R886

CE

B

Q90
N-MMBT3904

C306 C0.1u16X4

C289

R606 100KR4

+5V

R617

4.7KR4

CE

C331

X_C0.1u6.3X4

+V_FUSE_CASH

52

P-FDMC4435BZ_MLP3.3x3.3

Q46

1
3

4

P-FDMC4435BZ_MLP3.3x3.3

R612
100KR4

D

G

Q48

S

2N7002

4

+V_CASH

FS3

1 2

F-RLD30P300UMF

GND_RJ11

D23

+V_FS_CS +V_FUSE_CASH

52

S-MBRS340T3G_CASE403-03

C378

X_C0.1u50X6

+V_CASH

3

2

1

Cash Drawer

+5VSUS

DRAWER_A

CASH_SW

DRAWER_B

+V_CASH

D36

C0.1u50X6

D35
S-MBRS340T3G_CASE403-03

L24

30L4A-15/8

C382

C379

C0.1u50X6

GND_RJ11 GND_RJ11 GND_RJ11

Drawer A

Drawer B

3

L23

C371

C0.1u50X6

30L4A-15/8

C0.1u50X6

C377

L40

30L4A-15/8

C631

C0.1u50X6

Cash Drawer Close Cash Drawer Open

+V_CASH

C633

C0.1u50X6

500ms(max)

GND_RJ11

2

CDW1

1
2
3
4
5
6

LAN-RJ11

GND_RJ11

MEC2X1X1

1
2

MEC2

3
4
5
6

MEC1

X2

X2

MEC1

Ti t l e

Ti t l e

Ti t l e

Cash Drawer

Cash Drawer

Cash Drawer

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

25 35Friday, March 31, 2017

25 35Friday, March 31, 2017

1

25 35Friday, March 31, 2017

R888

4.7KR4

R883

4.7KR4

R884

4.7KR4

5

DRAWER_A1R

DRAWER_B1R

CDW_GPO0(11)

B B

A A

CDW_GPO0&1
(Default=L)
These signal are
controled by AP.

CDW_GPO1(11)

B

B

CE

+5VSUS

CE

DRAWER_A1

Q92

N-MMBT3904

R885

4.7KR4

DRAWER_B1

Q93

N-MMBT3904

C0.1u6.3X4

C0.1u6.3X4

4.7KR4

CASH_SW

+5V

C0.1u6.3X4

GND_RJ11

C621

C624

R6 47

Y

C367

Q95

S1
G1
S2
G2

2N7002DW_SOT363

+5V +5V

Q99

S1
G1
S2
G2

2N7002DW_SOT363

Z

X

D39
BAV99LT1_SOT23

Cash drawer status input from RJ11 connector
Default=H (Drawer Open=Low ; Close=High)

C630

C10u6.3X6

GND_RJ11

D1
D2

D1
D2

R887
10K/4

+5V

R891
10K/4

DRAWER_A1G
DRAWER_B1G

C632
C10u6.3X6

R905

4.7KR4
R902

1KR4

CDW_GPI (11)

4

S-MBRS340T3G_CASE403-03

Q98

8

1

7

2
3

6

4 5

N-FDS9945

D03-S994503-F01

R656 0R/6
R655 0R/6

GND_RJ11

10

10

10

5

PWR_JACK & +19VA

4

3

2

1

Q51

C366

P-SM4301PSKPC-TRG_KPAK

1
2 5
3
4

R637
240K1%4

R639
178K/1%/4

PWRJ1

D D

MEC1
MEC2

X1X2X3

Main: N92-03F0071-F02
AVL: N92-04F0041-S56

POWER

DETECT

GND

PWRJACK3P

X4

2
3

1

No define for center pin.

4
5

+DC_IN +SDC_IN

C380

C381

C0.1u50X6

C0.1u50X6

C0.1u50X6

C384

L22 80L6A-30/8
L21 80L6A-30/8
L20 80L6A-30/8
L19 80L6A-30/8

C364

C0.1u50X6

C363

C2200p50X4

D34

Z-BZT52H-C22_SOD123F

R900

2.2R1206

C626
C2.2u25X1206

C1u25X6

C453

C0.01u25X4

+19VA

C0.1u50X6

C455

C451

C10u25X8

+19VA

X_C10u25X8

C458

+12VSB (S3/S0 PWR)

C308

C10u25X8

C267

C10u25X8

+12VSB

+

12

C100u16SO

+19VA

EC22

2N7002

+12VSB

4.7A

Q38

R545
100KR1%4

R538
100KR1%4

D

G

S

15V

C256

X_C0.01u25X4

If PUSB_EN# controlled by SLP_S3#
Stuff 0R1206, Remove P-MOS&CTL circuit

R576 X_0R1206
R586 X_0R1206

Q44

1
2 5
3
4

C255

C0.01u25X4

P-SM4301PSKPC-TRG_KPAK

-10V/-25A

RUN_12VEN(27)

+12V

+

12

EC21
C100u16SO

C273

C10u25X8

+12V

C0.1u25X4

C270

+12V

1.7A

C271
C0.22u25X6

OCP

C259

C0.1u6.3X4

+5VSUS

12V_PH

12V_LG_R

N-NTMFS4C10NAT1G_SO8

12V_FB_C

R569
10K/4

5

Q43

4
3
2
1

R583

2.2R/8

C C

R543 100K/4

+12VSB

SLP_S4_CTL(5)

PUSB_EN#(24)

B B

R650 X_0R/4
R568 0R/4

D

Q42

G

2N7002

S

R550 51KR0402
C262 C0.01u16X4

12V_PG

12V_EN

R575
15KR1%4

12V_COMP

C274
C0.1u25X4

R567 560R1%4

+5VSUS

C276

C47p50N4

U10_VCC

U32

10

PGOOD

7

COMP/EN#

8

FB

5

R566 X_0R0402

C0.01u16X4

12V_FB

C266 C470p50X4

C282 C1u16X4

6

BOOT

VCC

UG

LX

LG

GND

GND_EP

VOS

NCP1589AMNTWG_DFN10

9

11

I32-1589A0C-O05

12V_VOS

C264

12V_FB_RC

12V_BT

1

12V_HG

3

12V_PH

2

12V_LG

4

R556 1R/8
R553 2.2R/8

R562 7.87KR1%4

R561
560R1%4

R563 7.87KR1%4
R559 75R1%4

D18

S-BAT54C_SOT23

Y

Z

12V_BT_R
12V_HG_R

C277

X_C22p50N4

X

R554 0R/8

R574

8.06KR1%4

5

Q41

4
3
2
1

N-NTMFS4C10NAT1G_SO8

CHOKE12

1 2

CH-3.3u8.5A27mS
R573

2.2R1206

12V_PH_R

C261

C1000P50X4

C265

C0.1u50X6

C0.1u25X4

CP10

C307

C268

C10u25X8

+12VSB

C10u25X8

C309

C269

C10u25X8

+3VA

Provide DSW_3.3V PWR
For Scalar/SIO/SPI ROM

R664 X_10K/4

+3VA_ON(27)

A A

5

PWR Saving Mode: 3.8V<EN<5.5V
Full PWR Mode: 2.4V<EN<3.3V

+5VA

R659
15KR1%4

3V

R658
22K/1%/4

+19VA

C390

C10u25X8

C402

X_C0.1u25X4

4

C391

C10u25X8

C0.1u6.3X4

C398

U40

2

VIN

7

EN

8

SS

4

GND-1

BOOT

LX

FB

COMP

GND-2

UP1735PSU8_PSOP8

9

C397
C0.1u6.3X4

1

3

5

6

3VABTC3VABT

C403
X_C330p50X4

CHOKE2
CH-10u4A65mS

1 2

X_C22p50N4

C406

C3900p50X6

R679

6.8K1%4

C408

R677

31.6KR1%4

R678
10K1%4

C15

C22u6.3X8

0.8*(31.6+10)/10=3.33V

3

R29 0R/8

C21

C22u6.3X8

+3VA

0.55A

+3VA+3P3V

+3VA

Title

Title

Title

PWR_SRC/+12VSB/+12V/+3.3A

PWR_SRC/+12VSB/+12V/+3.3A

PWR_SRC/+12VSB/+12V/+3.3A

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

26 35Friday, March 31, 2017

26 35Friday, March 31, 2017

1

26 35Friday, March 31, 2017

10

5

Vinafix.com

4

3

2

1

System Power

+5VSUS/+3VSUS/+5V/+3V

R675

C404

4.7R1%6

C0.1u6.3X4

+

12

EC3

C47u25SO

N-NTMFS4C10NAT1G_SO8

R1 1

2.7R/8

C4

N-NTMFS4C10NAT1G_SO8

R691 X_0R/4
R690 X_0R/4
R699 0R/4
R700 X_0R/4

+5V A
+3V A

+3V A

+3VA

100mA(Max)

LL2

5

Q7

5

Q3

R697 13K1%4
R692 20K1%4

R693 93.1kR1%4

GND _ TP S

R660 X_0R/4
R662 X_0R/4
R661 0R/4

+3VA_ON(26)

4
3
2
1

4
3
2
1

R686 X_0R0805

R681 0R/4

VBST2

3VSUS_DH

LL2

3VSUS_DL

VO2

VFB2

3VSUS_EN

Place these Caps. close to high side Mosfet

+

D D

+3VSUS

+3VSUS

+3 VS US

6.8A

RUN_3VEN

C C

C0.01u25X4

+3V

4.75A

+3 V

C36

C0.1u16X4

C5

+3V

N-NTMFS4C10NAT1G_SO8

12

+

C47

C10u25X8

C33

C1u16X4

4
3
2
1

Q4

EC1
C220u6.3SO

C46

C10u25X8

CP1

+

12

EC2

C470u6.3VSO

5

C32

C0.1u25X4

VREF

VREF

GND _ TP S

12

EC4

C47u25SO

CHOKE1
CH-2.2u9A12mS

1 2

CP2

C2200p50X4

+5V A
+3V A

C410
C1u6.3X4

C401

X_C0.1u25X4

U4 2

16

VIN

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

7

VO2

5

VFB2

6

ENTRIP2

4

TONSEL

14

SKIPSEL

3

VREF

8

VREG3

C409
C10u6.3X6

+19VA+19V A

GND _ TP S

L5 80L6A-30/8
L7 80L6A-30/8

ENTRIP1

GND

SGND

TPS51125RGER

15

25

CP13

PWR_SRC_R

22

VBST1

VBST1

5VSUS_DH

21

DRVH1

20

LL1

LL1

5VSUS_DL

19

DRVL1

24

VO1

VO1

2

VFB1

VFB1

FB: 2V

5VSUS_EN

1

18

VCLK

23

PGOOD

SUSPWROK

13

EN0

EN0

17

VREG5

C400

C10u6.3X6

PGOOD goes high around 2.5 ms
after ENTRIPx goes high.

C405

R6 76

C0.1u6.3X4

4.7R1%6

N-NTMFS4C 10NAT1G_SO8

N-NTMFS4C 08NAT1G_SO8

R6 98 30K1%4
R689 20K1%4

R6 88 137KR1%4

R6 83 10K/4

+5V A

C399

C22u6.3X8

4
3
2
1

4
3
2
1

LL1

Place these Caps. close to high side Mosfet

5

Q10

5

Q15

GND _ TP S

+3V A

SUSPWROK (32)

+5VA

100mA(Max)

+5V A

C55

C2200p50X4

CHOKE3
CH-2.2u9A12mS

1 2

R8 0

2.7R/8

C74

C2200p50X4

CP15

PWR_SRC_RPWR_SRC_R

C62

C64

C10u25X8

C0.1u25X4

CP14

C81

C0.1u16X4

5

Q28

N-NTMFS4C10NAT1G_SO8

EC10

C220u6.3SO

C56

C10u25X8

C1u16X4

4
3
2
1

+5V SU S

+

12

C86

EC5

C470u6.3VSO

RUN_5VEN

C92

C0.01u25X4

+5V

+5V

12

+

+5 V

2.5A

+5 VS US

13.8A

+5V SU S

B B

A A

+5VSUS & +3VSUS Eanble +5V & +3V Eanble

+19VA

ENTRIP1&2 :

1. Short to ground to shutdown a switcher channel.

R7 7

140K1%4

SUS_ON#(22)

R6 9

30K1%4

2. Connect resistor from this pin to GND to set threshold
for synchronous RDS(on) sense.

3.3V

C66

X_C0.1u6.3X4

5

R5 9 2.2K/4

C1u6.3X4

C54

Q11

G2
S2
G1
S1

2N7002DW_SOT363

D2
D1

5VSUS_EN
3VSUS_EN

4

470KR1%4

RUN_ON#(22)

100KR1%4

SLP_S3#(12,22,24,28,31)

<Reserve for debug>

+5V & +3V Discharge Circuit

<Reserve>

Q22

RUN_ON#

S1
G1
S2
G2

X_2N7002DW_SOT363

+19VA

R105

R104

3.3V

C83

X_C0.1u25X4

R123 X_0R/4

D1
D2

RN9

1
3
5
7

X_8P4R-330R/4

Q23

2N7002

D

G

S

2N7002

2
4
6
8

+19VA

15V

D

G

S

Q24

+5V

+3V

3

R103
47K/4

RUN_ON

R102
178K/1%/4

R1 10 10K1%4

R1 26 100KR1%4
R1 18 470KR1%4

C82

C0.1u25X4

RUN_12VEN ( 26)

RUN_5VEN
RUN_3VEN

2

EN0 delay to wait PWR_SRC ready

EN0
Open : LDOs on
GND : Disable all circuit

R4 9
140K1%4

3.3V 15.5V

R5 2

C1u6.3X4

30K1%4

Ti t l e

Ti t l e

Ti t l e

System Power

System Power

System Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Q9

G2
S2
G1
S1

2N7002DW_SOT363

DMS-SA30

DMS-SA30

DMS-SA30

D2
D1

EN0A EN0

C48

+19VA+19VA

R5 0
140K1%4

EN0A

R5 1
620KR1%4

27 35Friday, March 31, 2017

27 35Friday, March 31, 2017

1

27 35Friday, March 31, 2017

10

10

10

5

4

3

2

1

SKL S-line 35W (ISL95855B)

VCCST

C124

X_C10u16X8

R205 45.3R1%4

C161
C8200p25X4

C162

C0.01u16X4

C145

C0.01u16X4

C461

C0.01u16X4

VCore>(Prog5)
Freq.=450KHz
Enable Vcore droop
Disable VSA droop

C120

C1u6.3X4

PUT CLOSE

D D

C C

B B

TO PWM

R218

X_12.1K1%4

VCORE_VCC_SEN(3)

VCORE_VSS_SEN(3)

VCCGT_VCC_SEN(3)

VCCGT_VSS_SEN(3)

VCCSA_SEN_P(3)

VCCSA_SEN_N(3)

H_PROCHOT#(3)
H_VIDSOUT(3)

H_VIDALERT#(3)

H_VIDSCLK(3)

R215 X_75R1%4

C330p50X4

+3V VCCST

R206 100R1%4

R204 0R/4
R207 10R1%4
R214 49.9R1%4

COMP_A_R

C159 C68p50N4
C476 C1500p50X4

C471 C2200p50X4

C472

C330p50X4

C147

C330p50X4

C148

VCCP&VGT(Prog4)
Freq.=450KHz
VSA Imax=12A

H_PROCHOT#
PU to VCCST@CPU side
through 75R as CRB

R203
10K/4

R272

3.01K1%4

R775 3.01K1%4

C130
C8200p25X4

C68p50N4

C137

C2700p50X4

C146

C2700p50X4

R245 2.21KR1%4

C154

C8200p25X4

C68p50N4

C135

X_C680p50X4

C136

C2200p50X4

R250
1K1%4

R228

48.7K1%4

R222

78.7KR1%4

R213
X_301R1%4

VRM_EN=1.1V

FB_A_C

FB_A_R

COMP_B_R

C138

FB_B_C

FB_B_R

COMP_C_R

C149

FB_C_C

FB_C_R

R217

48.7K1%4

VCCGT(Prog3)
ICCmax=40A

C128

C1u16X4

VRM_EN
VRM_PG
VR_HOT

VIDSOUT
VIDSCLK

VR_PSYS

COMP_B

COMP_C

FB_C

VR_PROG5
VR_PROG4

VR_PROG3

+5V

R778

3.01K1%4

R767
820R1%4

FB_A

R223

2.4KR1%4

R240

2.4KR1%4
R244

820R1%4

FB_B

R249
X_2K1%4

R239
1K1%4

VR_PROG2
VR_PROG1

R209
34KR1%4

VCCP(Prog2)
ICCmax=70A
PSI1=2 phase

R201

5.1K1%4

COMP_A

R255
12K1%4

R216
215K1%4

R202

1.5K1%4

+5V

U19

48

VR_ENABLE

47

VR_READY

46

VR_HOT#

43

SDA

44

ALERT#

45

SCLK

1

PSYS

16

COMP_A

17

FB_A

18

RTN_A

4

COMP_B

5

FB_B

6

RTN_B

29

COMP_C

30

FB_C

31

RTN_C

36

PROG5

37

PROG4

38

PROG3

39

PROG2

40

PROG1

ISL95855BHRTZ-T_TQFN48

8 VIA Connect GND lay

42

49

VCC

GND PAD

R186

2.7R/8

V_95855

PWM1_A
PWM2_A
PWM3_A

ISEN1_A
ISEN2_A
ISEN3_A

FCCM_A

ISUMP_A
ISUMN_A

NTC_A

IMON_A

PWM1_B
PWM2_B

ISEN1_B
ISEN2_B

FCCM_B

ISUMP_B
ISUMN_B

NTC_B

IMON_B

PWM_C

FCCM_C

ISUMP_C
ISUMN_C

IMON_C

+19VA

C119

C1u16X4

ISL95855_VIN

41

VIN

25
26
27

21
22
23

24

19
20

15
14

12
13

9
10

11
7

8

3
2

35
34
32

33
28

R745

0R/8

C457 C0.22u25X6

PWM1A
PWM2A

ISEN1A
ISEN2A
V_95855

FCCMA

VSUMA_R-

VCORE_NTC VCORE_NTC_R

VCORE_IMON

C158

C330p50X4

PWM1B

ISEN1B
V_95855

FCCMB

VSUMB_R-

VCCGT_NTC VCCGT_NTC_R
VCCGT_IMON

C131

C330p50X4

PWMC
FCCMC

VSUMC_R­VCCSA_IMON

C153

C330p50X4

PWM1A(29)
PWM2A(29)

ISEN1A(29)
ISEN2A(29)

R258 100K/4

R761
15KR1%4

R271

97.6KR1%4

RImon

PWM1B(29)

ISEN1B(29)

R262 100K/4

R241
15KR1%4

R224

88.7KR1%4

RImon

PWMC(30)
FCCMC(30)

R259
100KR1%4

R759

27.4K1%4

R749

27.4K1%4

R242
715R1%4

OCP=19A

C163
X_C220p25N4

RT1

100KRT1%6

ERT-J0EV474J

RT2

100KRT1%6

ERT-J0EV474J

C133

C0.01u16X4

VSUMA_2R-

R287
X_1K1%4

R270 475R1%4

OCP=81A

R256
422R1%4

OCP=42A

C144

C0.47u25X8

C150

X_C220p25N4

R254
X_1K1%4

R219

5.9KR1%4

C126

C0.1u16X4

C475

X_C0.1u16X4

C151

C0.1u16X4

VSUMC+

VSUMC-

C470

C0.22u25X6

C152
C0.01u16X4

VSUMC+(30)

VSUMC-(30)

R776
11K1%4

C474

C0.1u16X4

VSUMA+

R777

2.61KR1%4

VSUMA_RT

RT4

10KRT1%4

CLOSE CHOKE DC SIDE

VSUMA-

VSUMB+

R247

2.61KR1%4

VSUMB_RTVSUMB_2R-

R253
11K1%4

RT3

10KRT1%4

CLOSE CHOKE DC SIDE

VSUMB-

C155

C0.1u16X4

VSUMA+(29)

VSUMA-(29)

VSUMB+(29)

VSUMB-(29)

PCH_PWROK VRM_EN Sequence Control

Schmitt-Trigger

+3VSUS

A A

R195

VRM_PG

0R/4

C118

C1u6.3X4

R724
22K/1%/4

D

G

Q29

S

2N7002

5

Inverter

53

U45

VCC

2

A

Y

1

NC

GND

SN74AHC1G14DBV_SC70-5

R194 X_0R/4

C0.1u6.3X4

4

C431

R732 0R/4

R731 249R1%4
R733 249R1%4

PCH will have a minimum of a 1ms delay from PCH_PWROK to assertion of PROCPWRGD.
Therefore, the platform is only responsible to have these rails
ready a minimum of 0ms before PCH_PWROK assertion

VCCST_PWRGD(3)
PCH_PWROK(12)

4

R78
47K/4

Q16

G2
D1

VCCIO_PG(22,30)

R82 0R/4

X_C0.1u6.3X4

G1

C75

3

D2

S2

2N7002D_SOT363

S1

VCCIO_PG & SLP_S3#

+5VSUS+5VSUS

R79
47K/4

Q17

G2

SLP_S3_CTRL(30)

SLP_S3#(12,22,24,27,31)

D1
G1

2N7002D_SOT363

S1

2

VRM_ENVRM_EN

D2

S2

Title

Title

Title

IMVP8-ISL95855(VCCP/VGT/VSA)

IMVP8-ISL95855(VCCP/VGT/VSA)

IMVP8-ISL95855(VCCP/VGT/VSA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

28 35Friday, March 31, 2017

28 35Friday, March 31, 2017

1

28 35Friday, March 31, 2017

10

5

Vinafix.com

4

3

2

1

VCCP

R321

D D

C C

2.2R/8

+5V

C197
C4.7u6.3X6

R397

2.2R/8

+5V

C220
C4.7u6.3X6

0.55V~1.52V output range
TDC=45A
EDC=66A

DC_19V_FET

R317 10K/4
R305 10K/4

DC_19V_FET

R383 10K/4
R365 10K/4

C482 C10u25X8
C498 C1u25X6

5369_VPIN1

PWM1A(28)

TP33
TP5

C526 C10u25X8
C536 C1u25X6

5369_VPIN2 BT2A_R

PWM2A(28)

TP39
TP9

U2 3

2

VCIN

3

NC

40

PWM

6

GH

36

GL

1

ZCD_EN#

39

DISB#

38

THWN

37

CGND

5

CGND

43

CGND

NCP5369MNR2G_QFN40

U2 5

2

VCIN

3

NC

40

PWM

6

GH

36

GL

1

ZCD_EN#

39

DISB#

38

THWN

37

CGND

5

CGND

43

CGND

NCP5369MNR2G_QFN40

VIN28VIN39VIN410VIN511VIN612VIN713VIN8

Dr.Mos

PGND16PGND17PGND18PGND19PGND20PGND21PGND22PGND23PGND24PGND25PGND26PGND

VIN28VIN39VIN410VIN511VIN612VIN713VIN8

Dr.Mos

PGND16PGND17PGND18PGND19PGND20PGND21PGND22PGND23PGND24PGND25PGND26PGND

14

42

4

VIN1

BOOT

7

PHASE

29

VSWH2

30

VSWH3

31

VSWH4

32

VSWH5

33

VSWH6

34

VSWH7

35

VSWH8

15

VSWH9

41

VSWH10

PGND

27

28

14

42

4

VIN1

BOOT

7

PHASE

29

VSWH2

30

VSWH3

31

VSWH4

32

VSWH5

33

VSWH6

34

VSWH7

35

VSWH8

15

VSWH9

41

VSWH10

PGND

27

28

BT1A

BT2A

C196
C0.1u25X4

R294

2.2R/8

C167
C2200p50X4

C219
C0.1u25X4

CPU_PHASE2

R329

2.2R/8

C202
C2200p50X4

BT1A_R

R3 22 2.2R/8

VSUMA+(28,29)

I S E N 1 A(28)

VSUMA-(28,29)

R3 98 2.2R/8

VSUMA+(28,29)

I S E N 2 A(28)

VSUMA-(28,29)

CPU_PHASE1

1.82K1%4

I S E N 1 A

C469

C0.022u25X4

1.82K1%4

I S E N 2 A

C468

C0.022u25X4

R278

Close PWM

R289

Footprint: NC_93519_1
Pin2: Solder mask

PHS1A_R

1.82K1%4

R265 100KR1%4

R771
X_200KR1%4

PHS2A_R

1.82K1%4
R268 100KR1%4

R770
X_200KR1%4

R279

PHASE1A

R280 2.2R1%4

R282

PHASE2A

R281 2.2R1%4

CP5

CP6

CHOKE7
CH-0.22u60A0.875mS

1 2

CP4

A1_R1

CHOKE8
CH-0.22u60A0.875mS

1 2

CP7

A2_R1

VCCP

C205

C10u16X8

R266 100KR1%4

C510

C10u16X8

R267 100KR1%4

VCCP

VCCP

I S E N 2 A

I S E N 1 A

C251

C0.01u25X4

+19VA

CHOKE10
CH-0.82u24A8.0mS

1 2

C242

C10u25X8

VCCP

OS-CON

12

+

12

EC33

C470u2.5SO

VCCP

Ceramic / 0805/X5R

C201

C22u6.3X8

C186

C22u6.3X8

DC_19V_FET

+

EC16

C470u2.5SO

C200

C22u6.3X8

C495

C22u6.3X8

C249

C10u25X8

+

12

EC15

C470u2.5SO

C203

C22u6.3X8

C492

C22u6.3X8

C22u6.3X8

C22u6.3X8

C10u25X8

+

12

C470u2.5SO

C199

C22u6.3X8

C502

C22u6.3X8

C250

EC14

C228

C501

C192

C499

C0.1u25X4

C204

C22u6.3X8

C497

C22u6.3X8

C543

C0.1u25X4

C0.1u25X4

C245

C241

C10u25X8

C10u25X8

+

12

+

12

EC35

EC34

C470u2.5SO

C470u2.5SO

C185

C22u6.3X8

C491

C22u6.3X8

C187

C493

C500

C194

C22u6.3X8

C22u6.3X8

C22u6.3X8

C193

C496

C22u6.3X8

C22u6.3X8

C22u6.3X8

Close PWM

B B

VCCGT

R478

2.2R/8

+5V

C235
C4.7u6.3X6

A A

0.55V~1.5V output range
TDC=25A
EDC=35A

DC_19V_FET

R457 10K/4
R451 10K/4

C225 C10u25X8
C227 C1u25X6

5369_VGIN1 GT_BT_RGT_ BT

PWM1B(28)

TP67
TP15

5

U2 7

2

VCIN

3

NC

40

PWM

6

GH

36

GL

1

ZCD_EN#

39

DISB#

38

THWN

37

CGND

5

CGND

43

CGND

NCP5369MNR2G_QFN40

VIN28VIN39VIN410VIN511VIN612VIN713VIN8

Dr.Mos

PGND16PGND17PGND18PGND19PGND20PGND21PGND22PGND23PGND24PGND25PGND26PGND

14

27

28

42

VIN1
PHASE
VSWH2
VSWH3
VSWH4
VSWH5
VSWH6
VSWH7
VSWH8
VSWH9

VSWH10

PGND

BOOT

VCCGT

OSCON

+

+

12

+

12

EC18

C233
C0.1u25X4

4
7

GT_PHASE1

29
30
31
32
33
34
35
15
41

R419

2.2R/8

C221
C2200p50X4

R4 79 2.2R/8

VSUMB+(28)

I S E N 1 B(28)

VSUMB-(28)

1.82K1%4

I S E N 1 B

C464

C0.022u25X4

R756

PHS1B_R

1.82K1%4

R764 100KR1%4

R755
X_200KR1%4

R765

PHASE1B

R774 2.2R1%4

CP8

CHOKE9
CH-0.22u60A0.875mS

1 2

CP9

B1_R1

VCCGT

C520

C10u16X8

VCCGT

Close PWM

4

3

2

C470u2.5SO

Ceramic / 0805/X5R

Ti t l e

Ti t l e

Ti t l e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+

12

EC19

EC17

C470u2.5SO

C211C47u4X8

C531C47u4X8

C521C47u4X8

VCORE&VCCGT

VCORE&VCCGT

VCORE&VCCGT

+

12

C470u2.5SO

C532C47u4X8

DMS-SA30

DMS-SA30

DMS-SA30

EC39

C470u2.5SO

12

+

12

EC38

EC40

C470u2.5SO

C470u2.5SO

C213C47u4X8

C519C47u4X8

C528C47u4X8

1

C533C47u4X8

C210C47u4X8

29 35Friday, March 31, 2017

29 35Friday, March 31, 2017

29 35Friday, March 31, 2017

C212C47u4X8

C209C47u4X8

10

10

10

5

4

3

2

1

VCCSA

2

Q26

D1

S2_15S2_26S2_37G2

PHASE-1
PAHSE-2
PHASE-3

PAD

ISL8016IRAJZ-T_QFN20

21

UGATE1C_G

NN-PK626HY_PDFN8

8

LGATE1C_G

VIN-1
VIN-2
VIN-3

SS

SGND
PGND-1
PGND-2
PGND-3

1

G1

SW

5
6
7

2
3
4

VCCIO_SS

15

18
19
20
1

BOTTOM PAD
CONNECT TO
GND Through
4 VIAs

SA_PHASE1C

R111

2.2R/8

SN_1C

9

C78

+5V

C1000P50X4

C87

C22u6.3X8

VCCIO_SW

C91
C0.01u16X4

VSUMC+(28)

VSUMC-(28)

C77

C22u6.3X8

R130

2.2R1%8

VCCIO_SN

C99
C1000p16X4

PGND USE
THICK TRACE
TO CAP, USE
2 VIA TO
GND

R220

3.65K1%4
R212 0R/4

Close PWM

CHOKE5
CH-0.47u22A3.8mS

1 2

PHASE1C_R

C1_R1

VCCIO

12

+

EC7

C470u2SO

CP16

C108

C10u25X8

8

11

17
16
13
14
12

9

10

DC_19V_FET

U8

PG
EN

VFB
COMP
VSET
ISET
FS
SYNCOUT
SYNCIN

BOTTOM PAD
CONNECT TO
GND Through
4 VIAs

C76

GND

C0.22u25X6

U7

7
4
8
5

LGATE1C

C95

C10p50N4

R717 0R1206

+3V

R107
10K1%4

R137
100KR1%4

UGATE1C_G

R136
10K/4

SA_PHASE1C

LGATE1C_G

VCCIO_PG(22,28)

R127

1.5K1%4

VCCIO_COMP_R

C90
C470p50X4

+5V

+5V

R95 X_0R/4

+3V

VCCIO_EN

VCCIO_FB
VCCIO_COMP_C

R115
X_0R/4

R109
140K1%4

C94

C10u25X8

R94
10K1%4

VCCIO_ISET
VCCIO_FS

VCCIO_SYNCIN

R93
0R/4

3

PWM

2

BOOT

1

UGATE
VCC6LGATE

9

PHASE
THERMAL PAD

FCCM

BOOT1C_C

BOOT1C

R91 0R/6

D D

UGATE1C_G

+5V

R147 0R1206
R76 2.2R/8

PWMC(28) FCCMC(28)

UGATE1C

ISL95808HRZ-TS2378_DFN8
C70

C1u16X4

VCCIO

C C

VCCIO

R139
100R1%4

VCCIO_SEN(3)

B B

R138 59KR1%4

C102 C10p50N4

1.05V/11.1A

CHOKE4
CH-0.47u22A3.8mS

1 2

VCCSA

CP17

0.95V/5.5A

C101

C47u4X8

C173

C47u4X8

Close to CPU
pins

VCCSA

C174

C10u16X8

C172

C47u4X8

VCCIO

C22u6.3X8

C169

C22u6.3X8

OS-CON

12

+

EC9

C470u2SO

C104

C22u6.3X8

C22u6.3X8

C170

12

+

C470u2SO

C111

VCCSA

EC6

C22u6.3X8

C171

C22u6.3X8

C112

VCCIO_EN Sequence Control

DDR_PG & SLP_S3#

+5VSUS

R96
X_0R/4

P_SEL#

+3VSUS

G

R92
X_10K1%4

P_SEL#_R

DS

Q19

X_2N7002

R794
47K/4

Q77

G2
D1

C479

G1

S1

SLP_S3_CTRL(28)

A A

5

R784 0R/4

DDR_PG(31)

X_C0.1u6.3X4

D2

S2

2N7002D_SOT363

VCCIO_EN

R97

SKL=0.95V
CNL=0.9V

3

X_1K/4

D

Q76

G

2N7002

S

4

PROC_SELECT#(3)

VCCIO_FB

R117
X_56K1%4

P_SEL#_2R

DS

G

Q18

X_2N7002

Title

Title

Title

VCCSA & VCCIO17ci203

VCCSA & VCCIO

VCCSA & VCCIO

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

30 35Friday, March 31, 2017

30 35Friday, March 31, 2017

1

30 35Friday, March 31, 2017

10

8

Vinafix.com

teknisi indonesia

7

6

5

4

3

2

1

VCC_DDR

+19 VA

+5V SU S

+5VSUS

6

BOOT

VCC

GND

FLAG

VORPM

NCP1589LMNTWG_DFN10

5

9

11

I32-1589L0C-O05

BOTTOM PAD
CONNECT TO GND
Through 6 VIAs

R801
X_13K1%4

R816

2.2R/8

UG

LX

LG

DDR_FB
DDR_F B_RC

1
3
2

4

DDR_BOOT
DDR_HG
DDR_PHASE

DDR_LG

R797 1K1%4
R795 1.07KR1%4

R820

2.2R1%8

D D

+3V

+3VSUS

R803

10K1%4

DDR_PG(30)

R800

5.1K1%4

DDR_COMP

C509

C0.1u6.3X4

C C

R802
X_10K1%4

C511
C22p50N4

R799
2K1%4

DDR_PG

DDR_EN

DDR_VCC5

C530
C1u16X4

C508 C6800p16X4

10

7

8

C525

C0.1u6.3X4

U4 8

PGOOD
COMP/EN

FB

D45

S-BAT54C_SOT23

Y

Z

DDR_BST

R833 2.2R/8
R831 10K/4

R832 0R/8

R819

5.36KR1%4

OCP

C507
C0.01u16X4

C544 C0.1u6.3X4

X

C546
C0.22u25X6

DDR_HG_R

DDR_LG_R

R796 0R/4

L29
30L6A-10/8

2

Q81

D1

S2_15S2_26S2_37G2

DDR_HG_R

VPP_DDR

R769
51K1%4

R2

CHOKE14
CH-2.2u9A12mS

1 2

VPP_DDR_FB

R768 162KR1%4

R1

C444

C443

C22u6.3X6

C22u6.3X6

C465
C22p50N4

VPP_DDR_FB2

Vout = 0.6*(R1+R2)/R2
= 0.6*(31.6K+10K)/10K
= 2.496 V

C441

C22u6.3X6

C22u6.3X6

L25 30L6A-10/8

+5VSUS

C467 C22u6.3X6

U4 7

9

VCCP

VPP_EN

C463

10

VCCP

8

VCC

5

EN

4

PG

7

NC

UP1727PDDA_WDFN3X3-10

CONNECT TO
GND PLANE BY
4 VIAs

R9 26 10R1%6

C466 C1u6.3X4

R7 62 10K/4

+5VSUS

B B

VPP_DDR

R753
100KR4

C0.1u6.3X4

VPP_DDR_PG

GND

VPP_DDR_LX

1

LX

2

LX

3

LX

6

FB

11

I9C-1727P0C-U33

L28
30L6A-10/8

C564

C0.1u25X4

C10u25X8

1

SW

NN-FDMS3669S_POWER56-8

8

DDR_LG_R

VPP_DDR

C442

2.5V

2.24A

CP3

C560

G1

VPP_DDR

9

VCC_DDR_VIN

C562

C10u25X8

DDR_PHASE

C559

X_C10u25X8

1 2

R836

2.2R/8

C563
C2200p50X4

L04-01070Z0-L65

CHOKE15
CH-1.0u16.5A9mS

DDR_SEN_CPDDR_SEN

DDR_FB_CP

CP21

CP20

C552

C22u6.3X8

OS-CON

C549

C22u6.3X8

VCC_DDR

VCC_DDR

EC37

EC36

+

12

+

12

C330u2SO

1.2V

C330u2SO

4.6A

VPP_DDR & VCC_DDR Enable Control

R783 10K1%4

+3V A

Q74

6

+3V A

2
5

NN-CMKT3904

Q72

G2
D1
G1

1
3
4

R773 4.7K/4

2N7002D_SOT363

S1

VCC_DDR

SLP_S4#(5,7,12,17,22,24,31)

VPP_DDR

SLP_S4#(5,7,12,17,22,24,31)

R779 4.7K/4
R780 4.7K/4

R754 4.7K/4
C462 X_C1u16X4
R772 4.7K/4

R7 58 0R/4

D

VPP_EN#

C477

C4.7u6.3X6

DDR_E N#

D2

S2

G

G

S

DDR_EN

D

S

Q73
2N7002

Q79
2N7002

VPP_EN

R720 X_10R1%6

C422

C10u6.3X6

VTT_EN#

+5V

+5V SU S

VCC_DDR

R719 10R1%6

R727
1K1%4

R728
1K1%4

6

U4 4

1

VIN

3

REFIN

C420 C1u6.3X4

5

8

6

NC27NC1

NC3

VCNTL

VOUT

GND2GND

P8809PSW8_PSOP8

9

BUTTOM PAD
CONNECT TO GND
VIA 6 vias

4

VTT_DDR

C423

C22u6.3X6

C22u6.3X6

5

VTT_DDR

C421

C429

C0.1u6.3X4

SLP_S4#
VPP

30ms

VDDQ

Ti t l e

Ti t l e

Ti t l e

DDR4 POWER

DDR4 POWER

DDR4 POWER

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

DMS-SA30

DMS-SA30

DMS-SA30

31 35Friday, March 31, 2017

31 35Friday, March 31, 2017

31 35Friday, March 31, 2017

1

VTT_DDR

+5VSUS

A A

R721 0R/4

SLP_S3#(12,22,24,27,28)

C419

X_C0.1u6.3X4

8

VCC_DDR

C424

C0.1u6.3X4

R722

4.7K/4

7

Q61

G2
S2
G1
S1

2N7002DW_SOT363

D2
D1

VTT_EN# VTT_DDR_REF

10

10

10

8

7

6

5

4

3

2

1

PCH_1VSB

+5VSUS

C100 C0.1u6.3X4

10

7

8

C0.1u6.3X4

U10

PGOOD
COMP/EN

FB

9

+5VSUS

R140

2.2R/8

C110

VORPM

5

R133
X_13K1%4

6

VCC

GND

FLAG

11

V1P0_BOOT

1

BOOT

V1P0_HG

3

UG

V1P0_PHASE

2

LX

V1P0_LG V1P0_PHASE

4

LG

NCP1589LMNTWG_DFN10

I32-1589L0C-O05

BOTTOM PAD
CONNECT TO GND
Through 6 VIAs

V1P0_SEN V1P0_SEN_CP

V1P0_FB
V1P0_FB_RC

R131 1K1%4
R124 75R1%4

D D

V1P0_PG
V1P0_EN

C105
C22p50N4

V1P0_VCC5

C109

C1u16X4

C96 C6800p16X4

+3VSUS

+3VA

+3VSUS

R112
47K/4

R125

V1P0_EN#

X_10K1%4

SUSPWROK(27)

C C

R114 0R/4

X_C0.1u6.3X4

C89

G2
S2
G1
S1

NCP1589
On: NC
Off: Short to GND

Q25

D2

V1P0_EN#

D1

2N7002DW_SOT363

R148

10K1%4

R134
20K1%4

V1P0_COMP

C98

C0.1u6.3X4

3.92KR1%4

R146

Y

R182

2.2R1%8

R189 2.2R/8

R193 10K/4

R190 0R/8

R185

5.36KR1%4

OCP

D14

S-BAT54C_SOT23

Z

C117
C0.22u25X6

V1P0_BST

R132 0R/4

C103
C0.01u16X4

X

V1P0_HG_R

V1P0_LG_R

+19VA

2

D1

L12
30L6A-10/8

V1P0_HG_R

S2_15S2_26S2_37G2

8

C123

C0.1u25X4

V1P0_LG_R

C125

C10u25X8

1

Q30

G1

NN-PK626HY_PDFN8

9

SW

V1P0_FB_CP

PCH_1VSB_VIN

C139

C10u25X8

C129

X_C10u25X8

CHOKE6
CH-1.0u16.5A9mS

1 2

R225

2.2R/8

C134
C2200p50X4

CP19

CP18

PCH_1VSB

12

+

EC12
C560u6.3SO

12

+

C143

C22u6.3X8
EC13
C560u6.3SO

PCH_1VSB

7.31A

C141

C10u6.3X6
C140
X_C22u6.3X8

PCH_1VSB

C142

X_C10u6.3X6

B B

A A

Title

Title

Title

PCH Power-PCH_1VSB

PCH Power-PCH_1VSB

PCH Power-PCH_1VSB

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

8

7

6

5

4

3

Date: Sheet of

2

DMS-SA30

DMS-SA30

DMS-SA30

10

10

32 35Friday, March 31, 2017

32 35Friday, March 31, 2017

32 35Friday, March 31, 2017

1

10

5

Vinafix.com

4

3

2

1

CPU Socket

ILM+BP

CPU_LM1

D D

CPU_LM1

E21-AC71010-L06

CPU_BP1

CPU_BP1

E93-0000089-H06

PCB

PCB1

7B01-10

P30-07B0110-E48

Option Parts

PCH Option

PCH_X5

X_SKL-Q170

B01-0Q17025-I06

PCH_X3

X_SKL-H110

B01-0H11005-I06

LAN Chip Option

PCH Heatsink

PCH_H1

MEC1

MEC1

C C

MEC2

MEC2

HS-0406120-RH

SPI ROM

BIOS1

SPI_ROM

BIOS Label

LAN_X5

X_I219LM

B06-0I2191C-I06

COM_USB1 Option

COMUSB_X5

X_RJ45/USB3.0

N58-26F0031-S42

LAN_X3

X_I219V

B06-0I2190C-I06

COMUSB_X3

X_RJ45/USB2.0

N58-16F0291-S42

Mounting Holes

981

MH1

7
6

MH5

7
6

MH9

7
6

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

MH2

MH6

MH10

981

7
6

7
6

7
6

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

MH3

MH7

MH11

981

7
6

7
6

7
6

R6 54
0R/4

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

CP23

981

MH4

7
6

MH8

7
6

2
3

X_MH001

5

4

981

2
3

X_MH001

5

4

SPI ROM Option

Battery

BAT1_X1
BAT-BCR2032P

L

ABEL1

LABEL

BIOS_X5

X_MX25L12873FM2I-10G

M31-2512832-M24

BIOS 8M (H110) : M31-25Q6443-W03
BIOS 16M (H170/Q170) :
M31-2512832-M24 & M31-2512893-W03

BIOS_X3

X_W25Q64JVSSIQ

M31-25Q64A3-W03

AMI-UEFI_BIOS-LABEL

B B

Power status LEDs

<Debug only, remove it before MP>

+5V A +5V

R6
680R/6

+5VSUS

A A

R1 9

4.7K/4

DSW_LED

AC

CE

B

Q2
2N3904

DSW_LED1
WHI-20mA

5

PWR_LED1
LED-G_1608

G51-M1SPXXA-A09

+5VSUS

R5
1K/4

PWR_LED

AC

AC

R1 8
1K/4

S5_LED

S5_LED1
LED-R_1608

CE

Q1
2N3904

VCC_DDR

B

4

R8 1

4.7K/4

+12V

VCC_DDR

R7 1

4.7K/4

Q_DD R

R7 0 4.7K/4

+5V SU S

R62 1K/4

Q13

2
5

NN-CMKT3904

S3_LED

6
1
3
4

S3_LED1

A C

LED04-G-30mA

Q_DDR

3

Optical Fiducial Marks-120 Simulation

FM4

FM1

FM2

X_FM

X_FM

FM5

FM7

X_FM

X_FM

2

FM3

X_FM

X_FM

FM6

FM8

X_FM

X_FM

Ti t l e

Ti t l e

Ti t l e

Manual Parts

Manual Parts

Manual Parts

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

SIM_GND

SIM2

SIM_GND

SIM4

DMS-SA30

DMS-SA30

DMS-SA30

SIM3

X_PIN1*2

SIM1

X_PIN1*2

1

SIM_GND

SIM1

SIM_GND

SIM3

33 35Friday, March 31, 2017

33 35Friday, March 31, 2017

33 35Friday, March 31, 2017

SIM4

X_PIN1*2

SIM2

X_PIN1*2

10

10

10

8

teknisi indonesia

DCIN

DS4/DS5 S3 S0

19V

D D

UP1707Q

+3VA

+3VA_EN

C C

TPS51125RGER

1 Phase

S4/S5

+3.3A

+3VA

+5VA
+3VA

TPS51125RGER

+3VSUS

1 Phase

+5VSUS

1 Phase

B B

7

GS7166

V1P8A

reserve for PCH

NCP1589LMNTWG

PCH_1VSB

LDO

1 Phase

6

NCP1589LMNTWG

UP1727PDDA

GS7166SSO-R

+1P5

NCP1589AMNTWG

+12VSB

TPS40210DGQ

+24VSB

5

ISL95855HRTZ

IMVP8 4+2 95W

VCCP
VCCGT

2 Phase
1 Phase

4

ISL6208BCRZ

VCCSA

1 Phase

ISL8016IRAJZ-T

VCCIO

P8809PSW8

VTT_DDR

1 PhaseVCC_DDR

LDO

1 PhaseVPP_DDR

NTMFS4C10NAT1G

+3V

LDO

NTMFS4C10NAT1G

+5V LDO

SATA Riser Conn

+5V

UP7549PRA8_25

USB POWER

- 0.253A

Mini PCIE Slot(Full Size)

+1P5
+3V

Mini PCIE Slot(Half)

+1P5
+3V

CPU&SYS FAN

1 Phase

+12V

12V for BL

1 Phase +12V_INV

GS7166

+VGA_1P2

LDO

1 Phase

- 2A

- 0.8A

- 2.5A

- 0.5A

- 0.9A

3

2

1

SKYLAKE-S

VCCP - 66A

VCC

VCCGT - 35A

VCCSA - 11.1A

VCCSA

VCCIO -5.5A

VCCIO

VCC_DDR

VDDQ﹜VCCPCC_OC

(35W)

(35W)

- 2.8A

(DDR4)

DIMM ( 1DPC )

VCC_DDR

VDD

VTT_DDR

VTT

2.5V

- 4.6A

- 0.6A

- 4.0AVPP_DDR

PCH

PCH_1VSB - 7.33A

VCCPRIM_1P0﹜VCCCLK
VCCMPHY_1P0﹜VCCPCIE3PLL_1P0
VCCMPHYPLL-1P0﹜VCCUSB2PLL_1P0
VCCHDAPLL_1P0﹜VCCPRM_1P0
VCCAMPHYPLL_1p0

3V

VCCATS

+3VSUS - 0.81735A

VCCPRIM_3P3﹜VCCPGPPA
VCCPGPPBH﹜VCCPGPPEF
VCCPGPPG﹜VCCPGPPCD

VCCDSW_3P3

VCC3_SPI

VCC3SPI

VBAT

VCCRTC}VCCRTCPRIM_3p3(DCPRTC)

eSIO NCT6106D

3V

3VCC

+3VA

3VSB

VCCIO

VTT

VBAT

VBAT

AUDIO ALC898+TPA2008D2PWPR

+5V

LDOVDD

DVDD / DVDD-IO

+3V

+5V_AMP

+5V

- 0.007A

- 0.204A+3VA

- 0.029A

- 0.0007A

- 0.025A

- 0.008A

- 0.001A

- 0.0000024A

- 0.021A

- 0.0025A

- 0.015A

3V

Battery

LAN-I219

- 0.164A+3.3A_LAN

USB3*4 &USB2*2 Ports

USB3 + USB2

- 4.2A

Power USB Ports

USB2 - 2A

TPM SLB9665TT2.0

+3V - 0.025A

CH7517 DP TO VGA

UP7549PRA8

VDD_LVDS_3V

A A

UP7549PRA8

VDD_LVDS_5V

APL5930KAI-TRG

+1P2

8

7

6

5

LDO

4

3

+VGA_1P2 - 0.113A

VDDPLL_1P2,AVDD_1P2,DVDD_1P2

AVCC1,AVCC2

+3V

Scalar TSUMU58BDC2-1

+3VA

AVDD_EAR,VDDP_3P3,AVDD_ANA,
AVDD_AUSDM

AVDDL_DVI,VDD_1P2

+1P2

LVDS

VDD_LVDS_3V

- 1.5A

- 1.5AVDD_LVDS_5V

2

- 0.078A

- 0.09051A

- 0.24298A

Title

Title

Title

Power Map

Power Map

Power Map

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

34 35Friday, March 31, 2017

34 35Friday, March 31, 2017

34 35Friday, March 31, 2017

1

10

10

10

5

DMS-SA30 Rev.0A : (161226)
DMS-SA30 Rev.0B : (170313)

Page 3:
* The connection of CH7517 (VGA) change from eDP(Port-A) to DP(Port-B) to prevent some limitation of eDP.
Page 5:
* Reserved SLP_S4_CTL from Q59.D1 for the option of turn on timing of +12VSB&+12V.
Page 9:
* Reserve R925 (RST_GL850#) for GL-850 USB HUB.
* Change/Swap configuration of USB2.0 Port 7~14.
* SATA connection change from SATA2B&3B to SATA0B&1B to same as the display of DMS-SA20’s BIOS Setup Manual.

D D

Page 10:
* C195 change from 22P50N4 to 12P50N6 and C189 change from 22P50N4 to 15P50N6 by crystal matching test report.
Page 11:
* Change/Swap configuration of USB2.0 OC#3~7.
* No stuff the pull up resister R391 of PCH_RI# because this function change to SIO by BIOS request.
Page 12:
* C236&C237 change from 12P50N6 to 18P50N6 by crystal matching test report.
* R54 change from 78.7K1%4 to 45.3K1%4 to same as CRB design.
Page 15:
* Y1 change from 14.318M20P(D04-0103000-F07) to 14.318M12P(D04-0103700-F07) by crystal matching test report.
* No stuff D9 and stuff R129 to solve noise from BKL_VBR.(170322)
Page 16:
* C392 change from 10uf6.3X6 to 47u6.3X8 for the inrrush current of +5VDD_LVDS.
* C16&C392 stuff 1KR4 to discharge *VDD_LVDS under G3.(170322)
Page 17:
* Add R907~R911 for the gates of Q66~Q70 to prevent gate floating problem.
* Add U55 (GL850 USB2.0 HUB) and related components for H110 Sku.
* Remove RN10~13 ; Add R935~942 for Q170 Sku.
Page 18:
* The connection of CH7517 (VGA) change from eDP (Port-A) to DP (Port-B) to prevent some limitation of eDP.
* F/W version of CH7517 change from 3.1.0.7 (B07-7517A1C-C25) to B000.05.01.13 (B07-7517A4C-C25).
* C299&C298 change from 18P50N4 to 15P50N6 by crystal matching test report.
* Swap D32&D50's connection by layout requst.
* L16~L18 change from 82nf300mA to 16nf500mA ; C354/C342/C351/C359/C344/C358 change from 10pf50N4 to 1.5pf50N4
for R/F time and Over/Under shoot adjustment.
Page 19:

C C

* LAN_USB1 change footprint from IOA_RJ45_USB2_LED2_32_1 to IOA_RJ45_USB2_LED2_32.
* C589&C593 change from 22P50N4 to 30P50N6 by crystal matching test report.
* Reserve D52&D53(ESD diode) by EMI request.
Page 20:
* C325&C312 change from 1u16X4 to 0.1u16X4 because Ci must be 10 times smaller than C-Bypass,
the value range of C-Bypass is 0.47uf to 1uf.
* C607 change from 1u16X4(X5R) to 1u25X6(X7R) for low-ESR requirement of BYPASS(pin22).
* Change the power source of L36(LDOVDD) from +5V to +5VSUS for S3 wake up noise issue.
* Reserve L41 to add a power source from +5VSUS for +5V_AMP.
Page 21:
* No stuff R10(SERIRQ) because not support TPM card for JTPM1.
Page 22:
* Reserve a connection(SIO_RI#) between U26.45(GP45) and Q83.D by BIOS request.
* Modify Hardware Monitor(Voltage Sense) of +12V change to +19VA and R368 change from 110K1%4 to 180K1%4.
* No stuff Y3&C246 because it only for defensive design.(170322)
Page 23
* C567&C570 change from 0.1u6.3X4 to 0.047u10X4 ; C568&C588&C587&C571&C591&C592

change from 0.1u6.3X4 to 0.33u6.3X4 to meet the requirement of MAX3243 datasheet.
* Reserve R943&R944 for the signal of RI# by BIOS request.
* Add Q100 and R947 to change the connection from PCH_GPIO to PCH_WAKE# by BIOS request.
Page 24:
* R593 change from 0.01R1%XTRA to 0.02R1%1206 for OCP adjustment.
* FS4 change from RUEF300K to SMD2920P200-24 for safety.
Page 25:
* FS3 change from FUSE-4A to RLD30P300 to same as EXP BD.
Page 26:

B B

* Remove R650 because without current sense feature.
* Reserved R650 (SLP_S4_CTL) for the option of turn on timing of +12VSB&+12V.
* EC22 change from 220uf/16V/Solid DIP (C71-2211610-N07) to 100uf/16V/Solid SMD (C71-1011680-N07) for ME limitation.
* EC21 change from 100uf/16V/EL_DIP (C94-1011621-N07) to 100uf/16V/Solid SMD (C71-1011680-N07) for ME limitation.
* C274 change from 0.047uf10X4 to 0.1uf25X4 & C266 stuff 470pf50X4 & R559 stuff 75R1%4 12V_COMP&FB.
Page 27:
* R51 change from 30K1% to 620K1% to solve +3VA&+5VA abnormal turn on issue.
* The pulled-up PWR source of SUS_ON# change from +3VA to +19VA and

R77 change from 10K1% to 140K1% and

R69 change from 100K1% to 30K1% to solve +3VSUS&+5VSUS abnormal turn on issue.
Page 28:
* No stuff C475 and C470 change from 0.1uf16X4 to 0.22uf25X6 for ISUM_A.
* C152 change from 0.012uf16X4 to 0.01uf16X4 for ISUM_B.
* R224 change from 93.1KR1% to 88.7KR1% for I-mon.
* R242 change from 1.54K1% to 715R1% to adjust OCP=19A.
* C137 change from 2200pf50X4 to 2700pf50X4 and R245 change from 2.4KR1% to 2.1KR1% for FB_B.
Page 31:
* R800 change from 20KR1% to 5.1KR1% for DDR_COMP.
* Add R926 (10R1%6) and modify circuit to same as the demo circuit of UP1727 (U47)’s datasheet.
Page 33:
* PCB1 change from Rev.0A(P30-07B010A-E48) to Rev.0B(P30-07B010B-E48).
* Remove R651 and change it to CP23(copper) by process request.

Others:
* D20&D37&D38&D42&D43 change from D0G-2950500-SI0 to D0G-2710510-I05 by purchase request.
* C190&C216&C464&C468&C469 change from 0.22uf16X4 (C11-2232022-W08) to 0.22uf25X4 (C11-2232022-W08) by purchase request.

A A

* C146 change from 2700pf25X4 (C11-2722022-W08) to 2700pf50X4 (C11-2722822-W08/C11-2722012-S02) by purchase request.
* BIOS_X3 change from W25Q64FVSSIQ (M31-25Q6443-W03) to W25Q64JVSSIQ (M31-25Q64A3-W03) by purchase request.
* All of the net name of PWR_SRC change to +19VA.

4

3

2

1

DMS-SA30 Rev.10 : (170331)

Page 6:
* Stuff R143&R144&R145 by schematic checklist of XDP.
Page 10:
* DDPC_CTRLDATE pull up to +3V through R949(2.2KR4) to enable DDI Port- B and reserve TP71.
* Add R950 to disable DDI Port-A(eDP).
* R509 change from 10KR4 to 100KR4 for DDPD_HPD3.
Page 12
* No stuff R551 for TL-624-1.1.
* Add TP72 (PCH_SPI_CS2#) for debug.
Page 16
* Add discharge resistors R951&R952(1KR4) for +3VDD&+5VDD_LVDS power plane.
* C16&C392 stuff 0.1uf6.3X4.
Page 22:
* No stuff R330 because no SMI# requirement.
Page 33:
* PCB1 change from Rev.0B(P30-07B010B-E48) to Rev.10(P30-07B0110-E48).

Title

Title

Title

Design change list

Design change list

Design change list

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

DMS-SA30

DMS-SA30

DMS-SA30

10

10

35 35Friday, March 31, 2017

35 35Friday, March 31, 2017

1

35 35Friday, March 31, 2017

10