Cover Sheet 1
1
Block Diagram
GPIO
Intel mPGA478B CPU - Signals
Intel Springdale - Host Signals
Intel Springdale - Memory Signals
Intel Springdale - AGP Signals
DDR DIMM 1
DDR DIMM 2
Broadcom BCM 4401/5705
Intel ICH5 - PCI & IDE & AC97 Signals
Intel ICH5 - Other Signals
ICS952617 & FWH & FDD & TPM
A A
MPCI SKT & MDC
AGP 4X/8X Slot
ATA33/66/100 IDE & Video Connectors
PCI Slots 1 & I/O
USB Connectors
Front Panel & Fan
2
3
4
5 Intel mPGA478B CPU - Power
6
7
8
9
10
11
12
13
14
15 LPC I/O -47M997
16
17
18
19
20
21 W83302 ACPI controller
22
Version 10A
MS(6797)
Intel (R) Springdale (GMCH) + ICH5 Chipse t
Intel Northwood & Prescott mPGA478B Processor
CPU:
Intel Northwood/Prescott
System Chipset:
Intel Springdale - GMCH (North Bridge)
Intel ICH5 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec --RealTek ALC655
LPC Super I/O -- SMSC 47M997
LAN --Broadcom BCM4401/5705
CLOCK --ICS 952617
Main Memory:
DDR * 2 (Max 2GB)
Expansion Slots:
PCI2.3 SLOT *1
PWM:
Controller: Intersil 6556B
VRM 10
OTHER
23
24
IEEE1394 25
AUDIO CODEC
AUDIO E & S
IDE & BlueBrid
26
27
28
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
1
Date: Sheet
COVER SHEET
MS-6797
13 0 Wednesday, December 10, 2003
10A
of
Block Diagram
1
VRM 10
HI6556B
Intel mPAG478B Processor
3-Phase PWM
FSB
AGP 1.5V
4X/8X
Connector
64bit DDR
Channel 1
64bit DDR
Channel 2
2 DDR
DIMM
Modules
(1+1)
PCI BUS
PCI Slot 1
IDE Secondary
Analog
Video
Out
IDE Primary
BlueBird
UltraDMA 33/66/100
Springdale
Link
HUB
ICH5
A A
AC'97 Link
AC'97 Codec
LPC Bus
USB Port 0
USB Port 1
USB Port 2
USB
PCI BUS
LAN
BCM4401
LPC SIO
SMSC
47M997
USB Port 3
USB Port 4
USB Port 5
Serial ATA 0
Serial ATA
Flash
Keyboard
Floopy Parallel Serial
Mouse
MSI
Title
Size Document Number Rev
1
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-6797
23 0 Wednesday, December 10, 2003
of
10A
1
ICH5
Function Type GPIO Pin
I
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22 GPO22
GPIO 23
GPIO 24 I/O
GPIO 25 I/O
A A
*
GPIO 27
GPIO 28
GPIO 32
GPIO 33
GPIO 34
GPIO 40 PREQ#4
GPIO 41
GPIO 48
GPIO 49
ISA_REQ#
I
PREQ#5
I
PIRQ#E
I
PIRQ#F
I
PIRQ#G
PIRQ#H
I
I
SIO_SMI#
I
GPI7
I
GPI8
I
OC4#
I
OC5#
I
RECOVER#
I
GPI12
I
SIO_PME#
I OC#6
OC#7
I
ISA_GNT#
O
PGNT#5
O
GPO18
O
O
GPO19
O
GPO20
O
ISA_NOGO
OD
GPO23
O
CD_SMI#
GPIO25
I/O
GPO27
I/O GPIO28
I/O
BIOS_WP#
I/O
SATA LED
I/O
GPIO34
I
I
GPI41
O PGNT#4
OD
CPUPWRGD
Power well
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
default output
default output
default output
default output
default output
default output
default output
PCI Config.
DEVICE
MPCI
INTA#
INTB#
INTC#
INTD#
INTB#
INTC#
PCI_REQ#0 PCI Slot 1
AD16
IDSEL
CLOCK REQ#/GNT#
PCICLK0
PCI_GNT#0
PCI_REQ#3 AD21 PCICLK1
PCI_GNT#3
DDR DIMM Config.
DEVICE
DIMM 1 MCLK_A0/MCLK_A0#
1010000B
DIMM 3 1010010B MCLK_B0/MCLK_B0#
CLOCK ADDRESS
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#
MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#
CLK GEN PIN OUT MCP1 INT Pin
13 (PCI_CLK0)
14 (PCI_CLK1)
FWH
Type GPIO Pin
GPI 0 PD_DET
GPI 1
*
GPI 3
GPI 4
SIO
Type GPIO Pin
GP26
GP43
Function
I
I
SD_DET
Pull down through 1K ohms (unused) GPI 2
I
Pull down through 1K ohms (unused)
I
I
Pull down through 1K ohms (unused)
Function
VID5
I
VID4
I
PCI RESET DEVICE
Signals
PCIRST#_ICH5 AGP slot, FWH, MS5,
PCIRST#1
HD_RST#
1
Target
Springdale,LAN, Super I/O,1394,TPM
PCI slot 1, ext PCI slot PCIRST#2
Primary, Scondary IDE
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
General Purpose Spec
MS-6797
of
33 0 Wednesday, December 10, 2003
10A
8
7
6
5
4
3
2
1
CPU SIGNAL BLOCK
HA#[3..31] 6
HA#17
A18#
D33#
M23
HD#32
HA#16
A17#
D32#
H25
HD#31
HA#15
A16#
D31#
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
HA#11
A12#
D27#
H24
HD#26
HA#25
HA#27
HA#30
HA#26
HA#29
HA#31
A35#
D50#
U24
HD#49
A34#
D49#
U26
HD#48
A33#
D48#
T23
HD#47
A32#
D47#
T22
HD#46
A31#
D46#
T25
HD#45
A30#
D45#
T26
HD#44
HA#28
A29#
D44#
R24
HD#43
A28#
D43#
R25
HD#42
A27#
D42#
P24
HD#41
A26#
D41#
R21
HD#40
D D
CPU1A
HDBI#[0..3] 6
FERR# 13
STPCLK# 13
HINIT# 13,14
HDBSY# 6
HDRDY# 6
HTRDY# 6
HADS# 6
HLOCK# 6
HBNR# 6
HITM# 6
HBPRI# 6
C C
B B
HDEFER# 6
THERMD+ 15
TRMTRIP# 13
PROCHOT# 6,13
IGNNE# 13
A20M# 13
BOOT 22,23
BSEL0 14
BSEL1 14
CPU_GD 13
CPURST# 6
HD#[0..63] 6
HDBI#0
HDBI#1
HDBI#2
HDBI#3
HIT# 6
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
SMI# 13
SLP# 13
BOOT
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
G25
AC3
AA3
AB2
AF26
AB26
AE21
AF24
AF25
AD1
AE26
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
Y21
Y24
Y23
Y26
V24
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
BOOTSELECT
OPTIMIZED/COMPAT#
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
D52#
D51#
V22
U21
V25
U23
HD#50
HD#52
HD#53
HD#51
HA#24
A25#
D40#
N25
HD#39
HA#23
A24#
D39#
N26
HD#38
HA#22
A23#
D38#
M26
HD#37
HA#21
A22#
D37#
N23
HD#36
HA#20
A21#
D36#
M24
HD#35
HA#19
A20#
D35#
P21
HD#34
HA#18
A19#
D34#
N22
HD#33
HA#10
A11#
D26#
G26
HD#25
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
D17#
H22
HD#16
AE25A5A4
DBR#
D16#
D15#
D25
J21
HD#15
HD#14
VSS_SENSE
VCC_SENSE
D14#
D13#
D12#
D23
C26
H21
HD#12
HD#13
HD#11
AD26
AC26
ITP_CLK1
D11#
D10#
G22
B25
HD#9
HD#10
VID5
AD2
ITP_CLK0
VIDPWRGD
D9#
D8#
D7#
C24
C23
HD#6
HD#7
HD#8
AD3
B24
VID4
AE1
VID5#
D6#
D22
HD#5
VID3
AE2
VID4#
D5#
C21
HD#4
VID2
AE3
VID3#
D4#
A25
HD#3
VID2#
D3#
VID1
AE4
A23
HD#2
VID0
AE5
VID1#
D2#
B22
HD#1
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D1#
D0#
478_SOCKET
B21
<Priority>
HD#0
VCC_SENSE 23
VSS_SENSE 23
VID_GD_1 23
VID[0..5] 15,23
AA21
AA6
F20
F6
BPM#5
AB4
BPM#4
AA5
Y6
AC4
AB5
AC6
HREQ#4
H3
HREQ#3
J3
HREQ#2
J4
HREQ#1
K5
HREQ#0
J1
TESTHI12
AD25
TESTHI11
A6
TESTHI10
Y3
TESTHI9
W4
TESTHI8
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
HRS#2
F4
HRS#1
G5
HRS#0
F1
V5
AC1
HBR#0
H6
COMP1
P1
COMP0
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
TESTHI2
TESTHI1
TESTHI0
C217 220p
VIDPWRGD DC Specifications
GTLREF 6
HREQ#[0..4] 6
VCCP
CPU_CLK# 14
CPU_CLK 14
HRS#[0..2] 6
HBR#0 6
HADSTB#1 6
HADSTB#0 6
HDSTBP#3 6
HDSTBP#2 6
HDSTBP#1 6
HDSTBP#0 6
HDSTBN#3 6
HDSTBN#2 6
HDSTBN#1 6
HDSTBN#0 6
NMI 13
INTR 13
Min Max Typ
0.9
VIL
VIH
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms.
VIDGD rising time is 150ns.
X7R
<VOLTAGE>
BPM#1
BPM#0
R286 62
R299 61.9R1%
R217 61.9R1%
CPU GTL REFERNCE VOLTAGE BLOCK
0.3
VCCP
VTT
R261
R226
200R1%
GTLREF
C219
0.01u
X7R X7R
0.63*Vccp
C213
0.1u
R265
169R1%
200R1%
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
ITP_TMS
ITP_TDO
ITP_TCK
TESTHI1
TESTHI10
TESTHI9
TESTHI8
CPURST#
TESTHI2
TESTHI12
TESTHI0
R320 150
R313 680
RN82
1 2
3 4
5 6
7 8
8P4R-62
RN83
1 2
3 4
5 6
7 8
8P4R-62
RN84
1 2
3 4
5 6
7 8
8P4R-62
VCCP
VCCP
VCCP
CPU STRAPPING RESISTORS
A A
8
7
BPM#0
BPM#1
BPM#5
BPM#4
RN85
1 2
3 4
5 6
7 8
8P4R-62
VCCP
6
ALL COMPONENTS CLOSE TO CPU
5
PROCHOT#
CPU_GD
HBR#0
R321 62
R218 300
R312 220
VCCP
MSI
Title
Size Document Number Rev
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Signals
MS-6797
2
43 0 Wednesday, December 10, 2003
1
10A
of
8
7
6
5
4
3
2
1
D15
VCC
VCC
VSS
VSS
E7E9F10
D17
VCC
VSS
D19D7D9
VCC
VSS
F12
VCC
VSS
F14
E10
VCC
VSS
F16
VCC_VID
E12
VCC
VCC
VSS
VSS
F18F2F22
C264
1u
E14
E16
E18
VCC
VCC
VCC
VSS
VSS
VSS
F25F5F8
VCC_VID 21
CPU VOLTAGE BLOCK
VID Voltage is from 1.14V to 1.32V.
It is derived from 3.3V.
It should be able to source 150mA.
D D
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
C C
B B
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD18
VSS
AD21
VSS
AD23
AD4
VSS
AD8
VSS
AE11
VSS
VSS
AE13
AE15
VSS
VSS
AE17
VSS
AE19
VSS
AE22
VSS
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B23
B20
B26B4B8
C11
C13
AF19
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
C15
C17C2C19
C22
C25C5C7C9D12
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D14
D16
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
C10
C12
C14
C16
C18
C20C8D11
D13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E4
E26
E20E8F11
VCC
VCC
VSS
VSS
Near processor
F13
F15
VCC
VCC
VSS
VSS
G21G6G24
G3H1H23
1.2V 150mA
C263
0.1u
F17
F19
F9
VCC
VCC
VCC
VSS
VSS
VSS
VCC
VSS
H26H4J2
VSS
It support DC current if 100mA.
CPU_IOPLL
C172
C178
X_1u
AE23
AD20
AF4
VCC-VID
VSS
AF3
VSS
J22
VCC-VIDPRG
VSS
VSS
J25J5K21
VCCA
VCC-IOPLL
VSS
VSS
478_SOCKET
<Priority>
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
X_1u
C180
22U-1206
<VOLTAGE>
VSSA
The ESL is less than 5nH, and the ESR is less than 0.3ohm.
L7 10U100m_0805
L6 10U100m_0805
DC voltage drop should
C186
be less than 70mV.
X_10u-1206
<VOLTAGE>
VCCP
CPU DECOUPLING CAPACITORS
VCCP
A A
VCCP VCCP VCCP VCCP VCCP
C212
10u-1206
C234
10u-1206
C206
10u-1206
8
C239
10u-1206
C236
10u-1206
C224
10u-1206
C240
10u-1206
+
1 2
C195 X-150u-2.5V
+
X-150u-2.5V
1 2
C221
7
6
C235
10u-1206
C211
X_10u-1206
C215
10u-1206
C478
10u-1206
C480
10u-1206
C226
+
1 2
220u-2V
C479
+
1 2
C230
10u-1206
C238
10u-1206
220u-2V
MSI
Title
Size Document Number Rev
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
MS-6797
2
53 0 Wednesday, December 10, 2003
1
10A
of
8
HA#[3..31] 4
D D
HADSTB#0 4
HADSTB#1 4
HBR#0 4
C C
HBPRI# 4
HBNR# 4
HLOCK# 4
HADS# 4
HREQ#[0..4] 4
HIT# 4
HITM# 4
HDEFER# 4
HTRDY# 4
HDBSY# 4
HDRDY# 4
HRS#[0..2] 4
MCH_CLK 14
MCH_CLK# 14
MS5_POK 21
CPURST# 4
BSEL0_SPG 14
BSEL1_SPG 14
PCIRST#1 11,15,21,25
PROCHOT# 4,13
R268 20R1%
ICH_SYNC#
B B
GTLREF 4
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HRCOMP
HSWING
VCCA_FSB
C247 0.1u
VCCA_DPLL
D26
D30
L23
E29
B32
K23
C30
C31
J25
B31
E30
B33
J24
F25
D34
C32
F28
C34
J27
G27
F29
E28
H27
K24
E32
F31
G30
J26
G26
B30
D28
B24
B26
B28
E25
F27
B29
J23
L22
C29
J21
K21
E23
L21
D24
E27
G24
G22
C27
B27
B7
C7
AE14
E8
AK4
AJ8
L20
L13
L12
E24
C25
F23
U21A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
PROCHOT#
BSEL0
BSEL1
HDRCOMP
HDSWING
HDVREF
7
B3
A31
B4
VCCA_FSB
VCCA_DPLL
VSS
VSS
C12
C10
C8
VCCA_FSB
VSS
C14
VCC_AGP
J6J7J8J9K6K7K8K9L6L7L9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C16
C18
C20
C22
C24
C26
C28D1D11
D9
VCC
VSS
VCC
VSS
6
N11N9P10
P11
R11
T16
T17
T18
T19
U16
U17
U20
V16
V18
V20
W16
N10
M10
M11M8M9
L10
L11
VCC
VCC
VCC
VSS
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D19
D21
D23
D25
D27
D29
D31
D33
VCC
VCC
VSS
VSS
D13
D15
D17
VCC
VSS
T20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D35
F3F5F8
E3
F1
E1
F10
W19
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
F18
F20
F22
F24
F14
F16
F12
VCC
VSS
W20
F26
VCC
VSS
5
Y16
Y17
Y18
Y19
Y20
A3
A33
A35B2B25
B34C1C23
C35
E26
M31
AF13
AF23
AJ12
R25
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G31
G35
G28
VSS
VSS
VSS
VSS
H12
H16H2H20
H5
H18
H8
H9
H14
VSS
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H22
H24
H26
H30
H33
J10
J12
J14
J16
AN1
J18
VSS
4
VTT
AP2
AR3
AR33
AR35
A7A9A11
A13
A16
A20
A23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J20
J22
J28
J32
J35
K11
K12
K14
K16
K18
K20
K22
D5D6D7E6E7
A25
A27
A29
A32
C4
VTT
VTT
VSS
VSS
VSS
VSS
K25
K27
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K33
K29
L24
L25
L26
L35
L31
VTT
VSS
M3M6M26
F7
VTT
VSS
3
A4A5A6B5B6C5C6
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
M27
M28
M30
M33N1N4
VTT_FSB1
A15
VTT
VTT
VTT_FSB
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VSS
Intel Springdale
VTT_FSB2
A21
HD0#
HD1#
HD2#
HD3#
VTT_FSB
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
C205 0.47u
C231 0.47u
B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8
C17
L17
L14
C15
B19
C19
L19
K19
G9
F9
D12
E12
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI#0
HDBI#1
HDBI#2
HDBI#3
2
HD#[0..63] 4
HDBI#[0..3] 4
HDSTBP#0 4
HDSTBN#0 4
HDSTBP#1 4
HDSTBN#1 4
HDSTBP#2 4
HDSTBN#2 4
HDSTBP#3 4
HDSTBN#3 4
U21D
1
NC
2
NC
Intel Springdale
1
3
NC
4
NC
VCC3
VTT
A A
X7R
HSWING
X7R
C241
0.01u
1/4*Vccp
C242
0.01u
<VOLTAGE>
R231
301R1%
R287
100R1%
0.1u
VCCA_FSB
I=35mA
VCCA_DPLL
C427
C143
0.1u
ESR is 0.1mohm to GMCH
EC27
100U10EL
+
EC23
100U10EL
+
I=30mA
CHANGE TO 1206
FSB
R185 0-1206
R462 1R1%
DPLL
VCC_AGP
VCC_AGP
0 Ohm for PE
8
7
6
5
ICH_SYNC# MS5_POK ICH_PWROK
0
1 0
00
1
111
4
0
0
0
ICH_SYNC#
MS5_POK
VCC3
R209 X_220
R222
X_220
Q22 X_2N3904S
Q21 X_2N3904S
R204 0
3
R224
X_1K
ICH_PWROK 13
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - CPU Signals
MS-6797
2
63 0 Wednesday, December 10, 2003
of
1
10A
8
MCS_A#0 9
MCS_A#1 9
D D
MRAS_A# 9
MCAS_A# 9
MWE_A# 9
MA_A[0..12] 9
MBA_A0 9
MBA_A1 9
C C
MDQM_A[0..7] 9
MDQS_A[0..7] 9
MCLK_A0 9
MCLK_A#0 9
MCLK_A1 9
MCLK_A#1 9
MCLK_A2 9
MCLK_A#2 9
B B
0.01u C436
0.01u C191
0.01u C438
0.1u C262
C256 2.2u
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
XRCOMP
XCOMPH
XCOMPL
XVREF
MDQ_A[0..63] 9
AA34
W34
AC33
AB34
AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24
AJ33
AN23
AN21
AL34
AM34
AP32
AP31
AM26
AE33
AH34
AP12
AP16
AM24
AP30
AF31
W33
M34
H32
AN11
AP15
AP23
AM30
AF34
M32
H31
AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AK16
AL16
AK9
AN9
Y31
Y32
Y34
V34
P31
P32
AL9
E34
U21B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5
SBA_A0
SBA_A1
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SMDCLK_A0
SMDCLK_A0#
SMDCLK_A1
SMDCLK_A1#
SMDCLK_A2
SMDCLK_A2#
SMDCLK_A3
SMDCLK_A3#
SMDCLK_A4
SMDCLK_A4#
SMDCLK_A5
SMDCLK_A5#
SMXRCOMP
SMXCOMPVOH
SMXCOMPVOL
SMVREF_A
Intel Springdale
C257 0.47u
C251 C0.22U16Y
C250 0.01u
C233 C0.22U16Y
C214 0.1u
A A
8
MDQ_A1
MDQ_A0
AP10
AP11
SDQ_A0
E35
XRCOMP
YRCOMP
7
MDQ_A4
MDQ_A2
MDQ_A3
AM12
AN13
SDQ_A1
SDQ_A2
SDQ_A3
VCC_DDR
VCC_DDR
VCC_DDR
AA35
R35
7
MDQ_A8
MDQ_A7
MDQ_A9
MDQ_A6
MDQ_A5
AM10
AL10
AL12
AP13
AP14
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
SDQ_A8
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
AM1
AL7
AR15
AR21
AL6
VCC_DDR_C3
VCC_DDR_C2
R468 42.2R1%
R467 42.2R1%
R291 42.2R1%
R296 42.2R1%
MDQ_A11
MDQ_A10
AM14
AL18
AP19
SDQ_A9
SDQ_A10
VCC_DDR
VCC_DDR
AM2
AN8
AP3
VCC_DDR
MDQ_B[0..63] 10
MDQ_A12
AL14
SDQ_A11
VCC_DDR
AP4
MDQ_A16
MDQ_A17
MDQ_A14
MDQ_A15
MDQ_A13
MDQ_A18
MDQ_A19
AN15
AP18
AM18
AP22
AM22
AL24
AN27
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
SDQ_A16
SDQ_A17
SDQ_A18
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
AR4
AR5
AR7
AP5
AP6
AP7
AR31
values still need verification
VCC_DDR
VCC_DDR_C3
AA35AA33
MDQ_A22
MDQ_A20
MDQ_A21
AP21
AL22
AP25
SDQ_A19
SDQ_A20
SDQ_A21
VCC_DDR
SDQ_B0
AJ10
AE15
MDQ_B0
MDQ_B1
XCOMPL
XCOMPH
6
MDQ_A24
MDQ_A23
AP27
AP28
SDQ_A22
SDQ_A23
SDQ_A24
SDQ_B1
SDQ_B2
SDQ_B3
AL11
AE16
MDQ_B2
MDQ_B3
6
MDQ_A25
MDQ_A26
AP29
AP33
SDQ_A25
SDQ_A26
SDQ_B4
SDQ_B5
AL8
AF12
MDQ_B5
MDQ_B4
MDQ_A27
AM33
SDQ_A27
SDQ_B6
AK11
MDQ_B6
MDQ_A31
MDQ_A28
MDQ_A32
MDQ_A29
MDQ_A30
MDQ_A33
AM28
AN29
AM31
AN34
AH32
AG34
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31
SDQ_A32
SDQ_A33
SDQ_B7
SDQ_B8
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_B12
AG12
AE17
AL13
AK17
AL17
AK13
MDQ_B9
MDQ_B8
MDQ_B7
MDQ_B12
MDQ_B11
MDQ_B10
R471 31.6K1%
R470 10.2K1%
0.01u C187
R248 10.2K1%
R247 31.6K1%
MDQ_A35
MDQ_A34
AF32
AD32
SDQ_A34
SDQ_A35
SDQ_B13
SDQ_B14
AJ14
AJ16
MDQ_B14
MDQ_B13
MDQ_A36
MDQ_A37
AH31
AG33
SDQ_A36
SDQ_A37
SDQ_B15
SDQ_B16
AJ18
AE19
MDQ_B15
MDQ_B16
MDQ_A39
MDQ_A38
AE34
AD34
SDQ_A38
SDQ_A39
SDQ_B17
SDQ_B18
AE20
AG23
MDQ_B18
MDQ_B17
VCC_DDR
VCC_DDR
MDQ_A41
MDQ_A40
AC34
AB31
SDQ_A40
SDQ_A41
SDQ_B19
SDQ_B20
AK23
AL19
MDQ_B19
MDQ_B20
MDQ_A43
MDQ_A42
V32
V31
SDQ_A42
SDQ_A43
SDQ_B21
SDQ_B22
AK21
AJ24
MDQ_B21
MDQ_B22
MDQ_A44
MDQ_A45
AD31
AB32
SDQ_A44
SDQ_A45
SDQ_B23
SDQ_B24
AE22
AK25
MDQ_B23
MDQ_B24
YCOMPL
YCOMPH
5
MDQ_A46
MDQ_A47
U34
U33
SDQ_A46
SDQ_A47
SDQ_B25
SDQ_B26
AH26
AG27
MDQ_B26
MDQ_B25
R33
R34
5
MDQ_A48
MDQ_A49
T34
T32
SDQ_A48
SDQ_A49
SDQ_B27
SDQ_B28
AF27
AJ26
MDQ_B28
MDQ_B27
MDQ_A50
K34
SDQ_A50
SDQ_B29
AJ27
MDQ_B29
MDQ_A51
MDQ_A54
MDQ_A56
MDQ_A53
MDQ_A55
MDQ_A52
K32
T31
P34
L34
L33
J33
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
SDQ_A56
SDQ_B30
SDQ_B31
SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
AD25
AF28
AE30
AC27
AC30
Y29
MDQ_B30
MDQ_B34
MDQ_B31
MDQ_B33
MDQ_B35
MDQ_B32
R295 31.6K1%
R298 10.2K1%
0.01u C259
R292 10.2K1%
R293 31.6K1%
MDQ_A58
MDQ_A57
H34
E33
SDQ_A57
SDQ_A58
SDQ_B36
SDQ_B37
AE31
AB29
MDQ_B36
MDQ_B37
MDQ_A60
MDQ_A59
F33
K31
SDQ_A59
SDQ_A60
SDQ_B38
SDQ_B39
AA26
AA27
MDQ_B38
MDQ_B39
MDQ_A62
MDQ_A61
MDQ_A63
J34
G34
F34
SDQ_A61
SDQ_A62
SDQ_A63
SDQ_B40
SDQ_B41
SDQ_B42
AA30
W30
U27
MDQ_B40
MDQ_B41
MDQ_B42
VCC_DDR_C2
R35
MCKE_A0
AL20
SCKE_A0
SDQ_B43
SDQ_B44
T25
AA31
MDQ_B44
MDQ_B43
4
MCKE_A1
AN19
AM20
AP20
SCKE_A1
SCKE_A2
SDQ_B45
SDQ_B46
V29
U25
R27
MDQ_B47
MDQ_B46
MDQ_B45
4
AB25
SCKE_A3
VCCA_DDR
SDQ_B47
SDQ_B48
SDQ_B49
P29
R30
MDQ_B49
MDQ_B48
AC26
AC25
AL35
VCCA_DDR
VCCA_DDR
VCCA_DDR
SDQ_B50
SDQ_B51
SDQ_B52
K28
L30
R31
MDQ_B52
MDQ_B51
MDQ_B50
VCCA_DDR
AN4
AM3
VCC_DDR
VCC_DDR
SDQ_B53
SDQ_B54
SDQ_B55
R26
P25
L32
MDQ_B54
MDQ_B53
MDQ_B55
MDQ_B56
0.1u C249
AN5
AM5
AM6
VCC_DDR
VCC_DDR
SDQ_B56
SDQ_B57
K30
H29
F32
MDQ_B57
MDQ_B58
VCCA_DDR
0.1u
VCC_DDR
AM7
AM8
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B58
SDQ_B59
SDQ_B60
G33
N25
MDQ_B59
MDQ_B61
MDQ_B60
C447
AN2
AN6
AN7
VCC_DDR
VCC_DDR
SDQ_B61
SDQ_B62
M25
J29
G32
MDQ_B63
MDQ_B62
P3P6P8
N35
N32
VSS
VSS
VSS
VSS
VCC_DDR
SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#
SMYCOMPVOH
SMYCOMPVOL
SDQ_B63
SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3
AK19
AF19
AG19
AE18
MCKE_B0
MCKE_B1
L4 1U1_1206
+
EC26
100U10EL
ALE
3
SCS_B0#
VSS
SCS_B1#
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12
SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5
SBA_B0
SBA_B1
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SMYRCOMP
SMVREF_B
3
Its current is 5.1A.
U26
T29
V25
W25
W26
W31
W27
MA_B0
AG31
MA_B1
AJ31
MA_B2
AD27
MA_B3
AE24
MA_B4
AK27
MA_B5
AG25
MA_B6
AL25
MA_B7
AF21
MA_B8
AL23
MA_B9
AJ22
MA_B10
AF29
MA_B11
AL21
MA_B12
AJ20
AE27
AD26
AL29
AL27
AE23
Y25
AA25
MDQM_B0
AG11
MDQM_B1
AG15
MDQM_B2
AE21
MDQM_B3
AJ28
MDQM_B4
AC31
MDQM_B5
U31
MDQM_B6
M29
MDQM_B7
J31
MDQS_B0
AF15
MDQS_B1
AG13
MDQS_B2
AG21
MDQS_B3
AH27
MDQS_B4
AD29
MDQS_B5
U30
MDQS_B6
L27
MDQS_B7
J30
AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30
YRCOMP
AA33
YCOMPH
R34
YCOMPL
R33
AP9
YVREF
VCC_AGP
MCS_B#0 10
MCS_B#1 10
MRAS_B# 10
MCAS_B# 10
2
MCKE_A1 9
MCKE_A0 9
1
MWE_B# 10
MA_B[0..12] 10
MBA_B0 10
MBA_B1 10
MDQM_B[0..7] 10
MDQS_B[0..7] 10
MCLK_B0 10
MCLK_B#0 10
MCLK_B1 10
MCLK_B#1 10
MCLK_B2 10
MCLK_B#2 10
0.01u C260
0.01u C252
0.01u C254
0.1u C196
R257 150R1%
R252 150R1%
C197 2.2u
MCKE_B1 10
MCKE_B0 10
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - Memory Signals
2
<VOLTAGE>
VCC_DDR
MS-6797
73 0 Wednesday, December 10, 2003
of
1
10A
8
7
6
5
4
3
2
1
C417 0.1u
C167 0.1u
VCC_AGP
P26
P27
P28
P30
P33R1R4
R32T1T3
VSS
VSS
VSS
VSS
AE32
VSS
VSS
AE35
T6T8T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF11
AF14
AF6
AF9
VSS
AD30
VSS
AD33
VSS
AD28
P9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE1
AE10
AE11
AE12
AE13
AE25
AE26
AE4
GAD[0..31] 17
D D
C C
GC_BE#[0..3] 17
AD_STB0 17
AD_STB#0 17
AD_STB1 17
AD_STB#1 17
GREQ# 17
GGNT# 17
ST[0..2] 17
RBF# 17
WBF# 17
GFRAME# 17
GIRDY# 17
GTRDY# 17
GDEVSEL# 17
GSTOP# 17
GAD0
GAD1
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
ST0
ST1
ST2
GPAR 17
MCH_66 14
VCC_AGP
SBA[0..7] 17
SB_STB 17
SB_STB# 17
PIPE# 17
DBI_LO 17
R212 43.2R1%
0.01u C166
GSWING 17
0.01u C165
AGP_REF 17
B B
A A
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GRCOMP
GSWING
U21C
AE6
GAD0/DVOB_HSYNC
AC11
GAD1/DVOB_VSYNC
AD5
GAD2/DVOB_D1
AE5
GAD3/DVOB_D0
AA10
GAD4/DVOB_D3
AC9
GAD5/DVOB_D2
AB11
GAD6/DVOB_D5
AB7
GAD7/DVOB_D4
AA9
GAD8/DVOB_D6
AA6
GAD9/DVOB_D9
AA5
GAD10/DVOB_D8
W10
GAD11/DVOB_D11
AA11
GAD12/DVOB_D10
W6
GAD13/DVOBC_CLKINT
W9
GAD14/DVOB_FLDSTL
V7
GAD15/MDDC_DATA
AA2
GAD16/DVOC_VSYNC
Y4
GAD17/DVOC_HSYNC
Y2
GAD18/DVOC_BLANK#
W2
GAD19/DVOC_D0
Y5
GAD20/DVOC_D1
V2
GAD21/DVOC_D2
W3
GAD22/DVOC_D3
U3
GAD23/DVOC_D4
T2
GAD24/DVOC_D7
T4
GAD25/DVOC_D6
T5
GAD26/DVOC_D9
R2
GAD27/DVOC_D8
P2
GAD28/DVOC_D11
P5
GAD29/DVOC_D10
P4
GAD30/DVOBC_INTR#
M2
GAD31/DVOC_FLDSTL
Y7
GCBE0/DVOB_D7
W5
GCBE1/DVOB_BLANK#
AA3
GCBE2
U2
GCBE3/DVOC_D5
AC6
GADSTBF0/DVOB_CLK
AC5
GADSTBS0/DVOB_CLK#
V4
GADSTBF1/DVOC_CLK
V5
GADSTBS1/DVOC_CLK#
N6
GREQ
M7
GGNT
N3
GST0
N5
GST1
N2
GST2
R10
GRBF
R9
GWBF
U6
GFRAME/MDVI_DATA
V11
GIRDY/MI2CCLK
AB5
GTRDY/MDVI_CLK
AB4
GDEVSEL/MI2CDATA
W11
GSTOP/MDDC_CLK
AB2
GPAR/ADD_DETECT
H4
GCLKIN
R6
GSBA0#/ADD_ID0
P7
GSBA1#/ADD_ID1
R3
GSBA2#/ADD_ID2
R5
GSBA3#/ADD_ID3
U9
GSBA4#/ADD_ID4
U10
GSBA5#/ADD_ID5
U5
GSBA6#/ADD_ID6
T7
GSBA7#/ADD_ID7
U11
GSBSTBF
T11
GSBSTBS
M4
DBI_HI
M5
DBI_LO
AC2
GRCOMP/DVOBC_RCOMP
AC3
GVSWING
AD2
GVREF
Intel Springdale
AF16
VSS
VSS
AF18
VSS
VSS
T10
AF20
VSS
VSS
T26
AF22
VSS
VSS
T27
AF24
VSS
VSS
T28
AF25
VSS
VSS
T30
AF30
VSS
VSS
T33
VSS
VSS
AF33
H_SWING=(0.8*VCC_AGP)+-2%
VCC_AGP
R455 226R1%
R456 147R1%
R457 113R1%
C423 0.1u
C425 0.1u
HL_SWING
HL_SWING
HL_VREF
HL_VREF
800mV
HL_SWING 13
350mV
HL_VREF 13
T35
AG4
U4
VSS
VSS
AG8
U18
U19
U32V3V8V9V10
VSS
VSS
VSS
VSS
VSS
VSS
AG14
AG16
AG18
VCC_AGP
VSS
VSS
VSS
VSS
AG20
V6
VSS
VSS
AG22
VSS
VSS
AG24
C437
0.1u
VSS
VSS
AG26
AG28
VSS
VSS
V17
VSS
VSS
AG32
V19
VSS
VSS
AG35
V26
AH3
VSS
VSS
V27
AH6
V28
VSS
VSS
AH10
V33
V30W4W17
VSS
VSS
VSS
VSS
VSS
VSS
AH12
AH14
VSS
VSS
AH16
VSS
VSS
AH18
W18
VSS
VSS
AH20
Y3
W32Y6Y8Y9Y26
Y10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ1
AJ4
AH22
AH24
AH30
AH33
Y28
Y30
Y33
Y35
Y27
AA1
AA4
AA32
AB10
AB26
AC1
AC4
AC32
AB28
VSS
VSS
AL32
AB30
AM9
VSS
VSS
AB33
VSS
VSS
AM11
VSS
VSS
AM13
VSS
VSS
AM15
VSS
VSS
AM17
AC35
AM19
AB27
AB3
AB6
AB8
AB9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK16
AK18
AK20
AK22
AK24
AK26
AK28
VSS
VSS
AL1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK3
AJ9
AJ32
AJ35
AK8
AK10
AK12
AK14
Springdale Decoupling Capacitors
VCC_DDR
C433
0.1u
C434
0.1u
AD3
VSS
VSS
VSS
VSS
AM21
C482
10u-1206
L1L5Y1J1J2J3K2K3K4K5J4J5L4L2L3
AD6
AD8
AD9
AD10
VSS
VSS
VSS
VSS
VCC_AGP
VSS
VSS
VSS
VSS
VSS
VSS
AM23
AM25
AM27
AM29
AM35
AN10
AN12
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AN14
AN16
VCC_AGP
VCC_AGP
VSS
VSS
AN18
AN20
AN22
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AN24
AN26
AN28
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AN30
AN32
VCC_AGP
VCC_AGP
VSS
VSS
AR9
AR11
AR13
VTT
AG1
Y11
VCC_AGP
VCCA_AGP
VCCA_AGP
HI_STRF
HI_STRS
HI_RCOMP
HI_SWING
HI_VREF
CISTRF
CISTRS
CI_RCOMP
CI_SWING
CI_VREF
DREFCLK
DDCA_CLK
DDCA_DATA
VSYNC
HSYNC
BLUE#
GREEN
GREEN#
REFSET
VCC_DAC
VCC_DAC
VCCA_DAC
VSSA_DAC
EXTTS#
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VSS
VSS
VSS
VSS
AR23
AR16
AR20
BLUE
RED#
HI10
CI10
RED
VSS
VSS
VSS
VSS
HL0
AF5
HI0
HL1 GAD2
AG3
HI1
HL2
AK2
HI2
HL3
AG5
HI3
HL4
AK5
HI4
HL5
AL3
HI5
HL6
AL2
HI6
HL7
AL4
HI7
HL8
AJ2
HI8
HL9
AH2
HI9
HL10
AJ3
AH5
AH4
HL_COMP
AD4
HL_SWING
AE3
HL_VREF
AE2
AK7
CI0
AH7
CI1
AD11
CI2
AF7
CI3
AD7
CI4
AC10
CI5
AF8
CI6
AG7
CI7
AE9
CI8
AH9
CI9
AG6
AJ6
AJ5
CI_RCOMP
AG2
AF2
AF4
G4
F2
H3
E2
G3
H7
G6
H6
G5
F4
E4
GSET
D2
G1
G2
C428
0.01u
C2
C144
D3
0.01u
AP8
0 Ohm for PE
AG9
AG10
AN35
AP34
AR1
AR25
AR27
AR29
AR32
C483
10u-1206
C168
1u
C169
0.1u
H_SWING=(0.233*VCC_AGP)+-2%
8
7
6
5
4
3
VCC_AGP
C440
0.1u
C442
0.1u
HL[0..10] 13
HI_RCOMP Calculation
R=[(1.5V-08V)/0.8V]*60ohm=52.5ohm
HL_STRF 13
HL_STRS 13
R459 52.3R1%
0.01u C424
VCC_AGP
0.01u C416
R458 52.3R1%
CI_SWING
CI_VREF
VCC_AGP
0.01u C164
0.01u C163
DOT_48 14
3VDDCCL 18
3VDDCDA 18
CRT_VSYNC 18
CRT_HSYNC 18
R466
X_75
R469
X_75
R465
X_75
R463 137R1%
CRT_B 18
CRT_G 18
CRT_R 18
0 Ohm for PE
VCC3
VCC_DAC
VCCA_DAC
L3 100N300m
C475
1.7V/60mA
22U-1206
VCC_AGP
R205 226R1%
R211 147R1%
R210 113R1%
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - AGP & HLink & LAN Signals
MS-6797
2
CI_SWING
CI_VREF
83 0 Wednesday, December 10, 2003
1
800mV
350mV
of
10A
5
SMBCLK_ISO 10,14,21
SMBDATA_ISO 10,14,21
VCC3
VCC_DDR
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MBA_A0
MBA_A1
MRAS_A#
MCAS_A#
MWE_A#
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MA_A[0..12] 7
D D
MBA_A0 7
MBA_A1 7
MCS_A#0 7
MCS_A#1 7
MRAS_A# 7
MCAS_A# 7
MWE_A# 7
MDQS_A[0..7] 7
MDQM_A[0..7] 7
C C
MCKE_A0 7
MCKE_A1 7
MCLK_A1 7
MCLK_A#1 7
B B
A A
MCLK_A0 7
MCLK_A#0 7
MCLK_A2 7
MCLK_A#2 7
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DDR DIMM1
DIMM1
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DIMM-184
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MDQ_A0
2
MDQ_A1
4
MDQ_A2
6
MDQ_A3
8
MDQ_A4
94
MDQ_A5
95
MDQ_A6
98
MDQ_A7
99
MDQ_A8
12
MDQ_A9
13
MDQ_A10
19
MDQ_A11
20
MDQ_A12
105
MDQ_A13
106
MDQ_A14
109
MDQ_A15
110
MDQ_A16
23
MDQ_A17
24
MDQ_A18
28
MDQ_A19
31
MDQ_A20
114
MDQ_A21
117
MDQ_A22
121
MDQ_A23
123
MDQ_A24
33
MDQ_A25
35
MDQ_A26
39
MDQ_A27
40
MDQ_A28
126
MDQ_A29
127
MDQ_A30
131
MDQ_A31
133
MDQ_A32
53
MDQ_A33
55
MDQ_A34
57
MDQ_A35
60
MDQ_A36
146
MDQ_A37
147
MDQ_A38
150
MDQ_A39
151
MDQ_A40
61
MDQ_A41
64
MDQ_A42
68
MDQ_A43
69
MDQ_A44
153
MDQ_A45
155
MDQ_A46
161
MDQ_A47
162
MDQ_A48
72
MDQ_A49
73
MDQ_A50
79
MDQ_A51
80
MDQ_A52
165
MDQ_A53
166
MDQ_A54
170
MDQ_A55
171
MDQ_A56
83
MDQ_A57
84
MDQ_A58
87
MDQ_A59
88
MDQ_A60
174
MDQ_A61
175
MDQ_A62
178
MDQ_A63
179
9
NC
101
NC
102
NC
173
NC
DDR_VREF1
1
90
WP
167
10
15
VCC_DDR
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
ADDR.=1010000B
5
C284
0.1u
C283
0.1u
4
MDQ_A[0..63] 7
VCC_DDR
4
DDR Terminational Resisito rs
MDQ_A58
MDQ_A59
MDQ_A63
MDQ_A62
MDQS_A7
MDQM_A7
MDQ_A57
MDQ_A56
MDQ_A61
MDQ_A60
MDQ_A51
MDQ_A50
MDQ_A55
MDQ_A54
MDQS_A6
MDQM_A6
MDQ_A53
MDQ_A52
MDQ_A49
MDQ_A48
MDQ_A47
MDQ_A46
MDQ_A43
MDQ_A42
MDQS_A5
MDQM_A5
MCAS_A#
MCS_A#1
MCS_A#0
MDQ_A41
MDQ_A45
MWE_A#
MRAS_A#
MDQ_A40
MDQ_A44
MDQ_A35
MDQ_A39
MBA_A0
MDQ_A38
MDQM_A4
MDQ_A34
MDQS_A4
MDQ_A37
MDQ_A33
MDQ_A36
MDQ_A32
MBA_A1
MA_A10
MA_A0
MA_A1
MA_A2
MDQ_A31
MDQ_A27
MDQ_A26
MDQ_A30
MA_A3
MA_A4
MA_A6
MA_A5
MA_A8
MA_A7
MA_A9
MA_A11
MA_A12
MCKE_A0
MCKE_A1
MDQM_A3
MDQS_A3
MDQ_A29
MDQ_A25
MDQ_A28
MDQ_A24
MDQ_A19
MDQ_A23
MDQ_A22
MDQ_A18
MDQM_A2
MDQS_A2
MDQ_A21
MDQ_A17
MDQ_A16
MDQ_A20
MDQ_A11
MDQ_A10
MDQ_A15
MDQ_A14
MDQM_A1
MDQ_A13
MDQS_A1
MDQ_A12
MDQ_A9
MDQ_A8
MDQ_A3
MDQ_A7
MDQ_A6
MDQ_A2
MDQM_A0
MDQS_A0
MDQ_A1
MDQ_A5
MDQ_A4
MDQ_A0
R338
75R1%
R337
75R1%
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VTT_DDR
RN47
8P4R-56R0402
RN46
8P4R-56R0402
RN45
8P4R-56R0402
RN44
8P4R-56R0402
RN43
8P4R-56R0402
RN42
8P4R-56R0402
R367 56-0402
R366 56-0402
R364 47-0402
R365 47-0402
R363 47-0402
R362 56-0402
R361 56-0402
R360 47-0402
R359 47-0402
RN41
8P4R-56R0402
R358 47-0402
RN40
8P4R-56R0402
RN39
8P4R-56R0402
RN38
8P4R-47R0402
R357 47-0402
R356 47-0402
RN37
8P4R-56R0402
R355 47-0402
R354 47-0402
RN36
8P4R-56R0402
R353 47-0402
RN35
8P4R-56R0402
RN34
8P4R-47R0402
RN33
8P4R-56R0402
R352 47-0402
R351 47-0402
RN32
8P4R-56R0402
R350 47-0402
R349 56-0402
R348 47-0402
R347 47-0402
RN31
8P4R-56R0402
RN30
8P4R-56R0402
RN29
8P4R-56R0402
RN28
8P4R-56R0402
RN27
8P4R-56R0402
3
VTT_DDR VTT_DDR
C311
0.1u
C334
0.1u
C323
0.1u
C313
0.1u
C333
0.1u
C329
0.1u
C327
0.1u
C315
0.1u
C316
0.1u
C322
0.1u
C330
0.1u
C332
0.1u
C321
0.1u
VCC_DDR
C304
0.1u
C305
0.1u
C277
0.1u
C282
0.1u
C302
0.1u
C278
0.1u
C301
0.1u
C279
0.1u
C303
0.1u
C280
0.1u
3
2
C310
0.1u
C331
0.1u
C336
0.1u
C312
0.1u
C325
0.1u
C335
0.1u
C318
0.1u
C314
0.1u
C326
0.1u
C328
0.1u
C317
0.1u
C319
0.1u
C320
0.1u
MSI
Title
Size Document Number Rev
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
1
DDR DIMM 1 & 2
MS-6797
1
93 0 Wednesday, December 10, 2003
10A
of