Cover Sheet 1
Block Diagram
1
2
MS(6788)
Version 10A
GPIO
Intel mPGA478B CPU - Signals
Intel Breeds Hill - Host Signals
Intel Breeds Hill - Memory Signals
Intel Breeds Hill - AGP
DDR DIMM 1,2
PCB Holes
ICH5(1)
ICH5(2)
ICS952611 & FWH & FDD
A A
LPC I/O -W83627THF
AC97 Audio
AGP 4X/8X Slot & FAN
PCI Slots 1 & 2 & 3
PCI Slots 4 & 5
ATA33/66/100 IDE & Video Connectors
USB Connectors
3
4
5 Intel mPGA478B CPU - Power
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 ACPI controller
Intel (R) Breeds Hill (GMCH) + ICH5 Chi pset
Intel Northwood mPGA478B Processor
CPU:
Intel Northwood
System Chipset:
Intel Breeds Hill - GMCH (North Bridge)
Intel ICH5 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- ALC655
LPC Super I/O -- W83627THF
LAN --RTL8100C/8110S
CLOCK --ICS 952611
Main Memory:
DDR * 2 (Max 2GB)
Expansion Slots:
PCI2.3 SLOT * 5
ST PWM:
Controller: ST L6710
ATX & Front Panel
VRM 10.0 FMB2
DLED BRACKET
22
23
24
25 VID Adjust
EMI parts 26
RTL8100C/8110S
LAN Connector
27
28
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
1
Date: Sheet
COVER SHEET
MS-6788
12 9 Monday, July 07, 2003
10A
of
1
VRM 10
Intersil 6556
Intel mPAG478B Processor
Block Diagram
3-Phase PWM
FSB
AGP 1.5V
4X/8X
Connector
Analog
Video
Springdale
Out
HUB
Link
IDE Primary
IDE Secondary
A A
USB Port 0
UltraDMA 33/66/100
ICH5
64bit DDR
Channel 1
64bit DDR
Channel 2
2 DDR
DIMM
Modules
PCI CNTRL
PCI ADDR/DATA
PCI Slot 1
RTL8100C/8110S
PCI Slot 2
PCI Slot 3
PCI Slot 4
PCI Slot 5
USB Port 1
USB Port 2
USB
LPC Bus
USB Port 3
USB Port 4
SATA
LPC SIO
USB Port 5
Winbond
83627THF
USB Port 6
USB Port 7
AC'97 Codec
AC'97 Link
Flash
Keyboard
Mouse
Floopy Parallel Serial
1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-6788
22 9 Friday, July 04, 2003
of
10A
1
ICH5
Function Type GPIO Pin
I
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22 GPO22
GPIO 23
PREQ#B
I
PREQ#B
I
PIRQ#E
I
PIRQ#F
I
PIRQ#G
PIRQ#H
I
I
GPI6
I
GPI7
I
CSA_PME#
I
OC4#
I
OC5#
I
SIO_SMI#
I
EXTSMI#
I
SIO_PME#
I OC#6
OC#7
I
PGNT#A
O
PGNT#B
O
O GPO18
O
BIOS_WP#
O
GPO20
O GPO21
OD
O
GPO23
GPIO 24 I/O GPIO24
GPIO 25 I/O
A A
*
GPIO 27
GPIO 28
GPIO 32
GPIO 33
GPIO 34
GPIO 40 PREQ#4
GPIO 41
GPIO 48
GPIO 49
LAN_DISABLE#
GPIO27
I/O
I/O GPIO28
GPIO32
I/O
GPIO33
I/O
GPIO34
I/O
I
I
GPI41
O PGNT#4
OD
CPUPWRGD
Power well
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
default output
default output
default output
default output
default output
default output
default output
PCI Config.
DEVICE
INTA#
INTB#
PCI_REQ#0 PCI Slot 1
PCI_GNT#0
INTC#
INTD#
PCI Slot 2
INTB#
INTC#
PCI_REQ#1 AD17 PCICLK1
PCI_GNT#1
INTD#
INTA#
PCI Slot 3 PCI_REQ#2 AD18
INTC#
INTD#
PCI_GNT#2
INTA#
INTB#
INTD#
PCI_REQ#3 PCI Slot 4 AD19
INTA# PCI_GNT#3
INTB#
INTC#
PCI Slot 5
INTB#
INTC#
PCI_REQ#4 AD21 PCICLK4
PCI_GNT#4
INTD#
INTA#
IDSEL
AD16
DDR DIMM Config.
DEVICE
DIMM 1 MCLK_A0/MCLK_A0#
DIMM 2
1010000B
1010001B
CLOCK ADDRESS
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#
MCLK_B0/MCLK_B0#
MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#
CLOCK REQ#/GNT#
PCICLK0
PCICLK2
PCICLK3
CLK GEN PIN OUT MCP1 INT Pin
13 (PCI_CLK0)
14 (PCI_CLK1)
15 (PCI_CLK2)
16 (PCI_CLK3)
19 (PCI_CLK4)
FWH
Function
GPI 0 PD_DET
GPI 1
*
GPI 3
*
Type GPIO Pin
I
I
SD_DET
Pull down through 1K ohms (unused) GPI 2
I
Pull down through 1K ohms (unused)
I
Pull down through 1K ohms (unused) GPI 4
I
PCI RESET DEVICE
Signals
PCIRST#1
HD_RST#
Springdale,LAN,FWH, Super I/O
PCI slot 1-3, AGP slot PCIRST#2
Primary, Scondary IDE
Target
MSI
Title
Size Document Number Rev
1
Date: Sheet
MICRO-STAR INt'L CO., LTD.
General Purpose Spec
MS-6788
of
32 9 Friday, July 04, 2003
10A
8
7
6
5
4
3
2
1
CPU SIGNAL BLOCK
AD26
D11#
H21
G22
AC26
ITP_CLK1
ITP_CLK0
D10#
D9#
D8#
B25
C24
AD2
C23
VID5
AD3
VID5#
VIDPWRGD
D7#
D6#
B24
CPU_VIDGD
VID1
VID2
VID4
VID3
AE1
AE2
AE3
AE4
VID4#
VID3#
VID2#
D5#
D4#
D3#
D22
C21
A25
A23
VID0
AE5
VID1#
VID0#
TESTHI12
TESTHI11
TESTHI10
LINT1/NMI
LINT0/INTR
D2#
D1#
B22
B21
GTLREF3
GTLREF2
GTLREF1
GTLREF0
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
VID[0..5] 25
AA21
AA6
F20
F6
AB4
BPM5#
AA5
BPM4#
Y6
BPM3#
AC4
BPM2#
AB5
BPM1#
AC6
BPM0#
H3
REQ4#
J3
REQ3#
J4
REQ2#
K5
REQ1#
J1
REQ0#
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
BCLK1#
AF22
BCLK0#
F4
RS2#
G5
RS1#
F1
RS0#
V5
AP1#
AC1
AP0#
H6
BR0#
P1
COMP1
L24
COMP0
L25
DP3#
K26
DP2#
K25
DP1#
J26
DP0#
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
ZIF-SOCKET478
{Priority}
GTLREF
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI1
TESTHI0
HRS#2
HRS#1
HRS#0
HBR#0
COMP1
COMP0
C80 C220P50N
HA#[3..31] 6
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
L22
HA#12
A13#
D28#
M21
HA#11
A12#
D27#
H24
HA#25
HA#27
HA#30
HA#26
HA#29
HA#31
A35#
D50#
HA#28
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
D D
CPU1A
HDBI#[0..3] 6
FERR# 12
STPCLK# 12
HINIT# 12,13
HDBSY# 6
HDRDY# 6
HTRDY# 6
HADS# 6
HLOCK# 6
HBNR# 6
HITM# 6
HBPRI# 6
C C
B B
HDEFER# 6
CPU_TMPA 14
VTIN_GND 14
THERMTRIP# 12
PROCHOT# 6
IGNNE# 12
A20M# 12
BOOT 22,23
BSEL0 13
BSEL1 13
CPU_GD 12
CPURST# 6
HD#[0..63] 6
HDBI#0
HDBI#1
HDBI#2
HDBI#3
HIT# 6
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
THERMTRIP#
PROCHOT#
SMI# 12
SLP# 12
BOOT
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
IERR#
G25
AC3
AA3
AB2
AF26
AB26
AE21
AF24
AF25
AD1
AE26
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
Y21
Y24
Y23
Y26
V24
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
BOOTSELECT
OPTIMIZED/COMPAT#
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
D52#
D51#
V22
U21
V25
U23
HA#24
A25#
D40#
N25
HA#23
A24#
D39#
N26
HA#22
A23#
D38#
M26
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
HA#19
A20#
D35#
P21
HA#18
A19#
D34#
N22
HA#10
A11#
D26#
G26
A10#
D25#
HA#9
L21
A9#
D24#
HA#8
D26
A8#
D23#
HA#7
F26
A7#
D22#
HA#6
E25
HA#5
A6#
D21#
HA#4
HA#3
AE25A5A4
A5#
A4#
A3#
DBR#
VSS_SENSE
VCC_SENSE
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
F24
F23
G23
E24
H22
D25
J21
D23
C26
VIDPWRGD DC Specifications
GTLREF 6
HREQ#[0..4] 6
VCCP
CPU_CLK# 13
CPU_CLK 13
HRS#[0..2] 6
HBR#0 6
HADSTB#1 6
HADSTB#0 6
HDSTBP#3 6
HDSTBP#2 6
HDSTBP#1 6
HDSTBP#0 6
HDSTBN#3 6
HDSTBN#2 6
HDSTBN#1 6
HDSTBN#0 6
NMI 12
INTR 12
Min Max Typ
0.9
VIL
VIH
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms.
VIDGD rising time is 150ns.
X7R
{VOLTAGE}
R60 62R
R99 62R
R80 62R
R77 62R
R68 62R
R85 61.9R1%
R92 61.9R1%
CPU GTL REFERNCE VOLTAGE BLOCK
0.3
VCCP
R100
GTLREF
X7R X7R
0.63*Vccp
C152
C0.1U25Y
200R1%
R110
169R1%
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
ITP_TMS
ITP_TDO
ITP_TCK
VCC_VID 5,21
CPU_VIDGD
VCC_VID
R40
1KR
R71 150R
R78 680R
R83 39.2R1%
R73 X_75R
R74 27R
Q12
N-MMBT3904_SOT23
R812
1KR
VCCP
VCCP
VID_GD 21,23
HD#0
HD#1
HD#6
HD#4
HD#3
HD#5
HD#7
HD#8
HD#52
HD#53
HD#50
HD#51
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#40
HD#41
HD#38
HD#39
HD#36
HD#37
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#18
HD#19
HD#16
HD#17
HD#15
HD#14
HD#12
HD#13
HD#10
HD#11
HD#9
HD#2
CPU STRAPPING RESISTORS
RN16
A A
8
7
8P4R-62R
BPM#4
BPM#5
BPM#1 CPU_GD
BPM#2
BPM#3
BPM#0
R81 62R
R64 62R
1 2
VCCP
3 4
5 6
7 8
6
ALL COMPONENTS CLOSE TO CPU
5
PROCHOT#
HBR#0
CPURST#
IERR#
R101 62R
R65 300R1%
R82 220R1%
R72 62R
R66 62R
VCCP
MSI
Title
Size Document Number Rev
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Signals
MS-6788
2
42 9 Thursday, July 10, 2003
1
10A
of
8
7
6
5
4
3
2
1
E20E8F11
VCC
VCC
VSS
VSS
Near processor
F13
F15
VCC
VCC
VCC
VSS
VSS
VSS
G21G6G24
G3H1H23
1.2V 150mA
C39
C0.1U25Y
F17
F19
F9
VCC
VCC
VCC
VSS
VSS
VSS
H26H4J2
VSS
It support DC current if 100mA.
CPU_IOPLL
AE23
AD20
AF4
AF3
AD22
VCCA
VSS
J22
VCC-VIDPRG
VSS
VSS
J25J5K21
VSSA
VCC-IOPLL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZIF-SOCKET478
{Priority}
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
VCC-VID
VSS
C37
C10U10Y1206
{VOLTAGE}
The ESL is less than 5nH, and the ESR is less than 0.3ohm.
L2 10U100m_0805
L3 X_10U100m_0805
DC voltage drop should
be less than 70mV.
VCCP
VCC_VID 4,21
VCC_VID
CPU VOLTAGE BLOCK
VID Voltage is from 1.14V to 1.32V.
It is derived from 3.3V.
It should be able to source 150mA.
D D
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
B23
VSS
B26B4B8
VSS
VSS
VSS
VCC
VSS
VSS
C11
C13
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
C C
B B
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD18
VSS
AD21
VSS
AD23
AD4
VSS
AD8
VSS
AE11
VSS
VSS
AE13
AE15
VSS
VSS
AE17
VSS
AE19
VSS
AE22
VSS
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
AF19
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
C15
C17C2C19
C22
C25C5C7C9D12
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D14
D16
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
E4
E26
VSS
F12
F14
F16
F18F2F22
F25F5F8
CPU DECOUPLING CAPACITORS
VCCP
C82
X_C100U2SP
C92
C100U2SP
A A
Place these caps within socket cavity
VCCP VCCP VCCP
C62
C22U10Y1206
C57
C22U10Y1206
C78
C22U10Y1206
C79
C22U10Y1206
8
7
C25
X_C10U10Y1206
C27
X_C10U10Y1206
C28
X_C10U10Y1206
C23
X_C10U10Y1206
C30
X_C10U10Y1206
VCCP
C98
X_C10U10Y1206
C102
X_C10U10Y1206
C33
X_C10U10Y1206
C100
X_C10U10Y1206
6
C24
X_C10U10Y1206
C29
X_C10U10Y1206
C99
X_C10U10Y1206
C101
X_C10U10Y1206
C26
X_C10U10Y1206
VCCP VCCP
CB11 X_C1U16Y0805
CB12 X_C1U16Y0805
CB10 X_C1U16Y0805
CB9 X_C1U16Y0805
5
4
CB15 X_C1U16Y0805
CB13 X_C1U16Y0805
CB14 X_C1U16Y0805
CB16 X_C1U16Y0805
MSI
Title
Size Document Number Rev
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
MS-6788
2
52 9 Thursday, July 10, 2003
1
10A
of
8
HA#[3..31] 4
D D
HADSTB#0 4
HADSTB#1 4
HBR#0 4
C C
HBPRI# 4
HBNR# 4
HLOCK# 4
HADS# 4
HREQ#[0..4] 4
HIT# 4
HITM# 4
HDEFER# 4
HTRDY# 4
HDBSY# 4
HDRDY# 4
HRS#[0..2] 4
MCH_CLK 13
MCH_CLK# 13
MS5_POK 12,21
CPURST# 4
BSEL0_SPG 13
BSEL1_SPG 13
GTLREF 4
PCIRST#1 14,21,27
PROCHOT# 4
R116 20R1%
VTT
NEXT
GMCH
ICH_SYNC#
GTLREF
0.63*Vccp
R135 200R1%
B B
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HRCOMP
HSWING
VCCA_FSB
D26
D30
L23
E29
B32
K23
C30
C31
J25
B31
E30
B33
J24
F25
D34
C32
F28
C34
J27
G27
F29
E28
H27
K24
E32
F31
G30
J26
G26
B30
D28
B24
B26
B28
E25
F27
B29
J23
L22
C29
J21
K21
E23
L21
D24
E27
G24
G22
C27
B27
B7
C7
AE14
E8
AK4
AJ8
L20
L13
L12
E24
C25
F23
C123
C0.1U25Y
C120 C0.1U25Y
VCCA_DPLL
U9A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
PROCHOT#
BSEL0
BSEL1
HDRCOMP
HDSWING
HDVREF
VTT
A A
HSWING
1/4*Vccp
C163
C10000P50Y5
8
5
NB_FAN
R138
300R1%
R137
100R
B3
6
NB_FAN
VCCA_DPLL
C8
A31
VSS
C10
7
VCC_AGP
B4
J6J7J8J9K6K7K8K9L6L7L9
VCC
VCC
VCC
VCC
VCCA_FSB
VCCA_FSB
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C12
C14
C16
C18
C20
C22
7
VCC
VSS
C24
VCC
VCC
VSS
VSS
C26
C28D1D11
VCC
VSS
D9
VCC
VCC
VSS
VSS
D13
C158
C0.1U25Y
L10
VCC
VSS
D15
I=35mA
L11
VCC
VSS
D17
VCC
VCC
VSS
VSS
D19
I=30mA
VCCA_FSB
VCCA_DPLL
6
N11N9P10
N10
M10
M11M8M9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D21
D23
D25
D27
D29
D31
D33
C165
C0.1U25Y
ESR is 0.1mohm to GMCH
6
5
P11
R11
T16
T17
T18
T19
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
T20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VCC
VSS
VSS
VSS
VSS
VSS
VSS
F18
F20
F22
F14
F16
F12
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D35
F3F5F8
E3
F1
E1
F10
Y20
A3
A33
A35B2B25
B34C1C23
C35
E26
M31
AF13
AF23
AJ12
R25
VCC
VCC
VSS
VSS
F24
F26
G28
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G31
G35
VSS
VSS
VSS
H12
H14
H16H2H20
H5
H18
H8
H9
VSS
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H22
H24
H26
H30
H33
J10
J12
J14
J16
AN1
J18
VSS
4
VTT
AP2
AR3
AR33
AR35
A7A9A11
A13
A16
A20
A23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J20
J22
J28
J32
J35
K11
K12
K14
K16
K18
K20
K22
D5D6D7E6E7
A25
A27
A29
A32
C4
VTT
VTT
VSS
VSS
VSS
VSS
K25
K27
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K33
K29
L24
L25
L26
L35
L31
VTT
VSS
M3M6M26
VTT
VSS
F7
VTT
VSS
3
A4A5A6B5B6C5C6
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
M27
M28
M30
M33N1N4
VTT_FSB1
VTT_FSB2
A15
A21
VTT
VTT
VTT_FSB
VTT_FSB
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VSS
RG82865PE-A2
{Priority}
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
C145 C0.47U16Y
C133 C0.47U16Y
HD#0
B23
HD#1
E22
HD#2
B21
HD#3
D20
HD#4
B22
HD#5
D22
HD#6
B20
HD#7
C21
HD#8
E18
HD#9
E20
HD#10
B16
HD#11
D16
HD#12
B18
HD#13
B17
HD#14
E16
HD#15
D18
HD#16
G20
HD#17
F17
HD#18
E19
HD#19
F19
HD#20
J17
HD#21
L18
HD#22
G16
HD#23
G18
HD#24
F21
HD#25
F15
HD#26
E15
HD#27
E21
HD#28
J19
HD#29
G14
HD#30
E17
HD#31
K17
HD#32
J15
HD#33
L16
HD#34
J13
HD#35
F13
HD#36
F11
HD#37
E13
HD#38
K15
HD#39
G12
HD#40
G10
HD#41
L15
HD#42
E11
HD#43
K13
HD#44
J11
HD#45
H10
HD#46
G8
HD#47
E9
HD#48
B13
HD#49
E14
HD#50
B14
HD#51
B12
HD#52
B15
HD#53
D14
HD#54
C13
HD#55
B11
HD#56
D10
HD#57
C11
HD#58
E10
HD#59
B10
HD#60
C9
HD#61
B9
HD#62
D8
HD#63
B8
HDBI#0
C17
HDBI#1
L17
HDBI#2
L14
HDBI#3
C15
B19
C19
L19
K19
G9
F9
D12
E12
2
HD#[0..63] 4
HDBI#[0..3] 4
HDSTBP#0 4
HDSTBN#0 4
HDSTBP#1 4
HDSTBN#1 4
HDSTBP#2 4
HDSTBN#2 4
HDSTBP#3 4
HDSTBN#3 4
1
VTT
C156
C0.1U25Y
VCC3
CP5
L4
L6
CP7
X
X_0.82U35m
X
X_100N300m
VCC_AGP
VCC_AGP
5
ICH_SYNC# MS5_POK ICH_PWROK
0
1 0
00
1
111
4
0
0
0
ICH_SYNC#
MS5_POK
VCC3
R211
X_220R
Q41 X_N-MMBT3904_SOT23
Q45 X_N-MMBT3904_SOT23
R224 X_220R
R235 X_0R0402
3
R231
X_1KR
ICH_PWROK 12,21
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - CPU Signals
MS-6788
2
62 9 Friday, July 11, 2003
of
1
10A
8
MCS_A#0 9
MCS_A#1 9
MCS_A#2 9
D D
MCS_A#3 9
MRAS_A# 9
MCAS_A# 9
MWE_A# 9
MA_A[0..12] 9
MAB_A[1..5] 9
MBA_A0 9
MBA_A1 9
C C
MDQM_A[0..7] 9
MDQS_A[0..7] 9
MCLK_A0 9
MCLK_A#0 9
MCLK_A1 9
MCLK_A#1 9
MCLK_A2 9
MCLK_A#2 9
MCLK_A3 9
B B
MCLK_A#3 9
MCLK_A4 9
MCLK_A#4 9
MCLK_A5 9
MCLK_A#5 9
C10000P50Y5 C235
C10000P50Y5 C211
C10000P50Y5 C236
C0.1U25Y C115
MDQ_A[0..63] 9 MCKE_A[0..3] 9
AA34
Y31
Y32
W34
AC33
Y34
AB34
MA_A0
AJ34
MA_A1
AL33
MA_A2
AK29
MA_A3
AN31
MA_A4
AL30
MA_A5
AL26
MA_A6
AL28
MA_A7
AN25
MA_A8
AP26
MA_A9
AP24
MA_A10
AJ33
MA_A11
AN23
MA_A12
AN21
MAB_A1
AL34
MAB_A2
AM34
MAB_A3
AP32
MAB_A4
AP31
MAB_A5
AM26
AE33
AH34
MDQM_A0
AP12
MDQM_A1
AP16
MDQM_A2
AM24
MDQM_A3
AP30
MDQM_A4
AF31
MDQM_A5
W33
MDQM_A6
M34
MDQM_A7
H32
MDQS_A0
AN11
MDQS_A1
AP15
MDQS_A2
AP23
MDQS_A3
AM30
MDQS_A4
AF34
MDQS_A5
V34
MDQS_A6
M32
MDQS_A7
H31
AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AM16
AL16
P31
P32
XRCOMP
AK9
XCOMPH
AN9
XCOMPL
AL9
XVREF
E34
C114 X_C2.2U6.3Y
U9B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5
SBA_A0
SBA_A1
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SMDCLK_A0
SMDCLK_A0#
SMDCLK_A1
SMDCLK_A1#
SMDCLK_A2
SMDCLK_A2#
SMDCLK_A3
SMDCLK_A3#
SMDCLK_A4
SMDCLK_A4#
SMDCLK_A5
SMDCLK_A5#
SMXRCOMP
SMXCOMPVOH
SMXCOMPVOL
SMVREF_A
C118 C0.47U16Y
C130 C0.22U16Y
7
MDQ_A3
MDQ_A4
MDQ_A5
AN13
AM10
AL10
SDQ_A2
SDQ_A3
SDQ_A4
VCC_DDR
VCC_DDR
VCC_DDR
AA35
AR15
AR21
MDQ_A6
MDQ_A8
MDQ_A7
AL12
AP13
AP14
SDQ_A5
SDQ_A6
SDQ_A7
VCC_DDR
VCC_DDR
VCC_DDR
AM1
AL7
AL6
MDQ_A9
MDQ_A11
MDQ_A10
AM14
AL18
AP19
SDQ_A8
SDQ_A9
SDQ_A10
VCC_DDR
VCC_DDR
VCC_DDR
AM2
AN8
AP3
MDQ_A12
MDQ_A13
AL14
AN15
SDQ_A11
SDQ_A12
VCC_DDR
VCC_DDR
AP4
AP5
MDQ_A1
MDQ_A0
AP10
AP11
SDQ_A0
E35
MDQ_A2
AM12
SDQ_A1
VCC_DDR
R35
VCC_DDR
MDQ_A16
MDQ_A14
MDQ_A15
AP18
AM18
AP22
SDQ_A13
SDQ_A14
SDQ_A15
VCC_DDR
VCC_DDR
VCC_DDR
AR4
AP6
AP7
MDQ_A17
MDQ_A18
MDQ_A19
AM22
AL24
AN27
SDQ_A16
SDQ_A17
SDQ_A18
VCC_DDR
VCC_DDR
VCC_DDR
AR5
AR7
AR31
6
MDQ_A22
MDQ_A21
MDQ_A20
AP21
AL22
AP25
SDQ_A19
SDQ_A20
SDQ_A21
VCC_DDR
SDQ_B0
AJ10
AE15
MDQ_A24
MDQ_A23
AP27
AP28
SDQ_A22
SDQ_A23
SDQ_A24
SDQ_B1
SDQ_B2
SDQ_B3
AL11
AE16
MDQ_A25
MDQ_A26
AP29
AP33
SDQ_A25
SDQ_A26
SDQ_B4
SDQ_B5
AL8
AF12
MDQ_A28
MDQ_A27
AM33
AM28
SDQ_A27
SDQ_A28
SDQ_B6
SDQ_B7
AK11
AG12
MDQ_A29
MDQ_A30
AN29
AM31
SDQ_A29
SDQ_A30
SDQ_B8
SDQ_B9
AE17
AL13
MDQ_A32
MDQ_A31
AN34
AH32
SDQ_A31
SDQ_A32
SDQ_B10
SDQ_B11
AK17
AL17
MDQ_A33
MDQ_A34
AG34
AF32
SDQ_A33
SDQ_A34
SDQ_B12
SDQ_B13
AK13
AJ14
MDQ_A35
MDQ_A36
AD32
AH31
SDQ_A35
SDQ_A36
SDQ_B14
SDQ_B15
AJ16
AJ18
MDQ_A37
MDQ_A38
AG33
AE34
SDQ_A37
SDQ_A38
SDQ_B16
SDQ_B17
AE19
AE20
MDQ_A40
MDQ_A39
AD34
AC34
SDQ_A39
SDQ_A40
SDQ_B18
SDQ_B19
AG23
AK23
5
MDQ_A41
MDQ_A42
AB31
V32
SDQ_A41
SDQ_A42
SDQ_B20
SDQ_B21
AL19
AK21
MDQ_A44
MDQ_A43
V31
AD31
SDQ_A43
SDQ_A44
SDQ_B22
SDQ_B23
AJ24
AE22
MDQ_A45
MDQ_A46
AB32
U34
SDQ_A45
SDQ_A46
SDQ_B24
SDQ_B25
AK25
AH26
MDQ_A48
MDQ_A47
U33
T34
SDQ_A47
SDQ_A48
SDQ_B26
SDQ_B27
AG27
AF27
MDQ_A49
MDQ_A50
T32
K34
SDQ_A49
SDQ_A50
SDQ_B28
SDQ_B29
AJ26
AJ27
MDQ_A51
MDQ_A52
K32
T31
SDQ_A51
SDQ_A52
SDQ_B30
SDQ_B31
AD25
AF28
MDQ_A54
MDQ_A53
P34
L34
SDQ_A53
SDQ_A54
SDQ_B32
SDQ_B33
AE30
AC27
MDQ_A56
MDQ_A55
L33
J33
SDQ_A55
SDQ_A56
SDQ_B34
SDQ_B35
AC30
Y29
MDQ_A58
MDQ_A57
H34
E33
SDQ_A57
SDQ_B36
AE31
AB29
MDQ_A59
MDQ_A60
F33
K31
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_B37
SDQ_B38
SDQ_B39
AA26
AA27
MDQ_A61
MDQ_A62
J34
G34
SDQ_A61
SDQ_A62
SDQ_B40
SDQ_B41
AA30
W30
4
MDQ_A63
F34
SDQ_A63
SDQ_B42
SDQ_B43
U27
T25
MCKE_A2
MCKE_A0
MCKE_A1
AL20
AN19
AM20
SCKE_A0
SCKE_A1
SDQ_B44
SDQ_B45
AA31
V29
U25
MCKE_A3
AP20
SCKE_A2
SCKE_A3
SDQ_B46
SDQ_B47
SDQ_B48
R27
P29
AC26
AB25
AC25
VCCA_DDR
VCCA_DDR
VCCA_DDR
SDQ_B49
SDQ_B50
SDQ_B51
R30
K28
L30
VCCA_DDR
AN4
AL35
VCC_DDR
VCCA_DDR
SDQ_B52
SDQ_B53
SDQ_B54
R31
R26
P25
C0.1U25Y C157
AM3
AN5
AM5
VCC_DDR
VCC_DDR
SDQ_B55
SDQ_B56
L32
K30
H29
AM6
AM7
AM8
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B57
SDQ_B58
SDQ_B59
F32
G33
N25
VCC_DDR
AN2
AN6
AN7
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B60
SDQ_B61
SDQ_B62
M25
J29
G32
3
N35
N32
VSS
VCC_DDR
SDQ_B63
SCKE_B0
AK19
AF19
P3P6P8
VSS
VSS
VSS
VSS
SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#
SMYRCOMP
SMYCOMPVOH
SMYCOMPVOL
SMVREF_B
SCKE_B1
SCKE_B2
SCKE_B3
RG82865PE-A2
AG19
AE18
{Priority}
SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12
SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5
SBA_B0
SBA_B1
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
Its current is 5.1A.
U26
T29
V25
W25
W26
W31
W27
AG31
AJ31
AD27
AE24
AK27
AG25
AL25
AF21
AL23
AJ22
AF29
AL21
AJ20
AE27
AD26
AL29
AL27
AE23
Y25
AA25
AG11
AG15
AE21
AJ28
AC31
U31
M29
J31
AF15
AG13
AG21
AH27
AD29
U30
L27
J30
AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30
YRCOMP
AA33
YCOMPH
R34
YCOMPL
R33
AP9
YVREF
2
1
VCC_DDR
CB4 X_C1U16Y0805
CB1 X_C1U16Y0805
CB2 X_C1U16Y0805
CB3 X_C1U16Y0805
C10000P50Y5 C134
C10000P50Y5 C129
C10000P50Y5 C112
C0.1U25Y C208
R203 150R1%
R197 150R1%
C234 X_C2.2U6.3Y
VCC_DDR
C141 C10000P50Y5
C187 C0.22U16Y
C192 C0.1U25Y
VCC_DDR_C3
A A
VCC_DDR_C2
values still need verification
XRCOMP
R201 42.2R1%
R198 42.2R1%
YRCOMP XCOMPH
R123 42.2R1%
R119 42.2R1%
8
7
VCC_DDR_C3
XCOMPL YCOMPL
6
R202 31.6KR1%
R199 10.2KR1%
R196 10.2KR1%
R192 31.6KR1%
VCC_DDR
VCC_DDR VCC_DDR
AA35AA33
R33
YCOMPH
5
R106 31.6KR1%
R104 10.2KR1%
R117 10.2KR1%
R105 31.6KR1%
VCC_DDR_C2
R35
VCCA_DDR
C173
C0.1U25Y
4
CP8 X
L7 X_1U1_1206
+
EC20
X_C1U10X0805
VCCA_DDR
3
CB22 X_C1U16Y0805
CB21 X_C1U16Y0805
VCC_AGP
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - Memory Signals
MS-6788
2
72 9 Thursday, July 10, 2003
of
1
10A
8
7
6
5
4
3
2
1
C214 C0.1U25Y
C193 C0.1U25Y
VCC_AGP
P26
P27
P28
P30
P33R1R4
R32T1T3
VSS
VSS
VSS
VSS
AE32
VSS
VSS
AE35
T6T8T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF11
AF14
AF6
AF9
VSS
AD30
VSS
AD33
VSS
AD28
P9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE1
AE10
AE11
AE12
AE13
AE25
AE26
AE4
GAD[0..31] 16
D D
C C
GC_BE#[0..3] 16
AD_STB0 16
AD_STB#0 16
AD_STB1 16
AD_STB#1 16
GREQ# 16
GGNT# 16
ST[0..2] 16
WBF# 16
GFRAME# 16
GIRDY# 16
GTRDY# 16
GDEVSEL# 16
GSTOP# 16
GAD0
GAD1
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
ST0
ST1
ST2
RBF#
RBF# 16
WBF#
GPAR 16
MCH_66 13
VCC_AGP
SBA[0..7] 16
SB_STB 16
SB_STB# 16
PIPE# 16
DBI_LO 16
R162 43.2R1%
C10000P50Y5 C209
GSWING 16
C10000P50Y5 C213
AGP_REF 16
B B
A A
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GRCOMP
GSWING
U9C
AE6
GAD0/DVOB_HSYNC
AC11
GAD1/DVOB_VSYNC
AD5
GAD2/DVOB_D1
AE5
GAD3/DVOB_D0
AA10
GAD4/DVOB_D3
AC9
GAD5/DVOB_D2
AB11
GAD6/DVOB_D5
AB7
GAD7/DVOB_D4
AA9
GAD8/DVOB_D6
AA6
GAD9/DVOB_D9
AA5
GAD10/DVOB_D8
W10
GAD11/DVOB_D11
AA11
GAD12/DVOB_D10
W6
GAD13/DVOBC_CLKINT
W9
GAD14/DVOB_FLDSTL
V7
GAD15/MDDC_DATA
AA2
GAD16/DVOC_VSYNC
Y4
GAD17/DVOC_HSYNC
Y2
GAD18/DVOC_BLANK#
W2
GAD19/DVOC_D0
Y5
GAD20/DVOC_D1
V2
GAD21/DVOC_D2
W3
GAD22/DVOC_D3
U3
GAD23/DVOC_D4
T2
GAD24/DVOC_D7
T4
GAD25/DVOC_D6
T5
GAD26/DVOC_D9
R2
GAD27/DVOC_D8
P2
GAD28/DVOC_D11
P5
GAD29/DVOC_D10
P4
GAD30/DVOBC_INTR#
M2
GAD31/DVOC_FLDSTL
Y7
GCBE0/DVOB_D7
W5
GCBE1/DVOB_BLANK#
AA3
GCBE2
U2
GCBE3/DVOC_D5
AC6
GADSTBF0/DVOB_CLK
AC5
GADSTBS0/DVOB_CLK#
V4
GADSTBF1/DVOC_CLK
V5
GADSTBS1/DVOC_CLK#
N6
GREQ
M7
GGNT
N3
GST0
N5
GST1
N2
GST2
R10
GRBF
R9
GWBF
U6
GFRAME/MDVI_DATA
V11
GIRDY/MI2CCLK
AB5
GTRDY/MDVI_CLK
AB4
GDEVSEL/MI2CDATA
W11
GSTOP/MDDC_CLK
AB2
GPAR/ADD_DETECT
H4
GCLKIN
R6
GSBA0#/ADD_ID0
P7
GSBA1#/ADD_ID1
R3
GSBA2#/ADD_ID2
R5
GSBA3#/ADD_ID3
U9
GSBA4#/ADD_ID4
U10
GSBA5#/ADD_ID5
U5
GSBA6#/ADD_ID6
T7
GSBA7#/ADD_ID7
U11
GSBSTBF
T11
GSBSTBS
M4
DBI_HI
M5
DBI_LO
AC2
GRCOMP/DVOBC_RCOMP
AC3
GVSWING
AD2
GVREF
AF16
VSS
VSS
AF18
VSS
VSS
T10
AF20
VSS
VSS
T26
AF22
VSS
VSS
T27
AF24
VSS
VSS
T28
VSS
VSS
AF25
T30
AF30
VSS
VSS
T33
VSS
VSS
AF33
H_SWING=(0.8*VCC_AGP)+-2%
VCC_AGP
R217 226R1%
R218 147R1%
R214 113R1%
C270 C0.1U25Y
C255 C0.1U25Y
HL_SWING
H_SWING
HL_VREF
H_VREF
800mV
H_SWING 12
350mV
H_VREF 12
T35
AG4
U4
VSS
VSS
AG8
U18
U19
U32V3V8V9V10
VSS
VSS
VSS
VSS
VSS
VSS
AG14
AG16
AG18
VSS
VSS
VSS
VSS
AG20
V6
VSS
VSS
AG22
VSS
VSS
AG24
VSS
VSS
AG26
AG28
VSS
VSS
V17
VSS
VSS
AG32
V19
VSS
VSS
AG35
V26
AH3
V27
VSS
VSS
AH6
VSS
VSS
V28
VSS
VSS
AH10
V33
V30W4W17
VSS
VSS
VSS
VSS
VSS
VSS
AH12
AH14
AH16
AH18
Y3
W18
W32Y6Y8Y9Y26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH20
AH22
AH24
AH30
Y28
Y30
Y33
Y35
Y27
AA1
AA4
AA32
AB10
AB26
AB27
AB6
AK20
VSS
VSS
AB8
VSS
VSS
AK22
AB9
AK24
VSS
VSS
VSS
VSS
AK26
VSS
VSS
AK28
AB28
VSS
VSS
AL1
AL32
VSS
VSS
AH33
VSS
VSS
AB3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK3
AK16
AK18
AK8
AK10
AK12
AK14
Y10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ1
AJ4
AJ9
AJ32
AJ35
Springdale Decoupling Capacitors
VCC_DDR
VSS
VSS
AB30
AM9
VSS
VSS
AB33
AM11
VSS
VSS
AC1
VSS
VSS
AM13
AC4
VSS
VSS
AM15
AC32
AC35
VSS
VSS
AM17
AM19
C212
C0.1U25Y
VSS
VSS
AD3
VSS
VSS
AM21
L1L5Y1J1J2J3K2K3K4K5J4J5L4L2L3
AD6
AD8
AD9
AD10
VSS
VSS
VSS
VSS
VCC_AGP
VSS
VSS
VSS
VSS
VSS
VSS
AM23
AM25
AM27
AM29
AM35
AN10
AN12
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AN14
AN16
VCC_AGP
VCC_AGP
VSS
VSS
AN18
AN20
AN22
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
LAN CSA port
VSS
VSS
VSS
VSS
AN24
AN26
AN28
VCC_AGP
VCC_AGP
VSS
VSS
AR9
AN30
AN32
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AR11
AR13
AG1
Y11
VCCA_AGP
VCCA_AGP
HI_STRF
HI_STRS
HI_RCOMP
HI_SWING
HI_VREF
CISTRF
CISTRS
CI_RCOMP
CI_SWING
CI_VREF
DREFCLK
DDCA_CLK
DDCA_DATA
VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED#
REFSET
VCC_DAC
VCC_DAC
VCCA_DAC
VSSA_DAC
EXTTS#
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VSS
VSS
VSS
AR23
AR16
AR20
RG82865PE-A2
{Priority}
HI10
CI10
RED
VSS
VSS
VSS
VSS
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
CI0
CI1
CI2
CI3
CI4
CI5
CI6
CI7
CI8
CI9
AF5
AG3
AK2
AG5
AK5
AL3
AL2
AL4
AJ2
AH2
AJ3
AH5
AH4
AD4
AE3
AE2
AK7
AH7
AD11
AF7
AD7
AC10
AF8
AG7
AE9
AH9
AG6
AJ6
AJ5
CI_RCOMP
AG2
AF2
AF4
G4
F2
H3
E2
G3
H7
G6
H6
G5
F4
E4
D2
G1
G2
C10000P50Y5
C2
D3
AP8
AG9
AG10
AN35
AP34
AR1
AR25
AR27
AR29
AR32
HL0
HL1 GAD2
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL_COMP
HL_SWING
HL_VREF
C170
H_SWING=(0.233*VCC_AGP)+-2%
8
7
6
5
4
3
VCC_AGP
C174
C0.1U25Y
HL[0..10] 12
HI_RCOMP Calculation
R=[(1.5V-08V)/0.8V]*60ohm=52.5ohm
HL_STRF 12
HL_STRS 12
R167 52.3R1%
C10000P50Y5 C207
VCC_AGP
C10000P50Y5 C231
VCC_AGP
CB26 X_C1U16Y0805
CB23 X_C1U16Y0805
CB24 X_C1U16Y0805
CB25 X_C1U16Y0805
R175 52.3R1%
CI_SWING
CI_VREF
VCC_AGP
X_C0.01U50X C206
X_C0.01U50X C221
VCC3
VCC_AGP
R166 226R1%
R174 147R1%
R173 113R1%
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - AGP & HLink & LAN Signals
MS-6788
2
CI_SWING
CI_VREF
82 9 Thursday, July 10, 2003
1
800mV
350mV
of
10A
5
VCC_DDR
VCC_DDR
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MBA_A0
MBA_A1
MRAS_A#
MCAS_A#
MWE_A#
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
SMBCLK_ISO
SMBDATA_ISO
MA_A[0..12] 7
D D
MBA_A0 7
MBA_A1 7
MCS_A#0 7
MCS_A#1 7
MRAS_A# 7
MCAS_A# 7
MWE_A# 7
MDQS_A[0..7] 7
MDQM_A[0..7] 7
C C
MCKE_A0 7
MCKE_A1 7
MCLK_A1 7
MCLK_A#1 7
MCLK_A0 7
MCLK_A#0 7
MCLK_A2 7
MCLK_A#2 7
B B
DIMM1
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10/AP
118
A11
115
A12/NC
103
A13/NC
59
BA0
52
BA1
113
NC/BA2
157
CS0#
158
CS1#
71
NC/CS2#
163
NC/CS3#
154
RAS#
65
CAS#
63
WE#
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
97
DQM0/DQS9
107
DQM1/DQS10
119
DQM2/DQS11
129
DQM3/DQS12
149
DQM4/DQS13
159
DQM5/DQS14
169
DQM6/DQS15
177
DQM7/DQS16
140
DQM8/DQS17
44
MECC0
45
MECC1
49
MECC2
51
MECC3
134
MECC4
135
MECC5
142
MECC6
144
MECC7
21
CKE0
111
CKE1
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
16
CK0/NC
17
CK0#/NC
137
CK1/CK0
138
CK1#/CK0#
76
CK2/NC
75
CK2#/NC
82
ID_VDD
184
SPD_VDD
7
VDD
38
VDD
46
VDD
70
VDD
85
VDD
108
VDD
120
VDD
148
VDD
168
VDD
81
GND
89
GND
93
GND
100
GND
116
GND
124
GND
132
GND
139
GND
145
GND
152
GND
160
GND
176
GND
DIMM-184_green
DDR DIMM1
SIGNALS
FETEN/NC
NC/RESET#
POWER
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MDQ_A0
2
MDQ_A1
4
MDQ_A2
6
MDQ_A3
8
MDQ_A4
94
MDQ_A5
95
MDQ_A6
98
MDQ_A7
99
MDQ_A8
12
MDQ_A9
13
MDQ_A10
19
MDQ_A11
20
MDQ_A12
105
MDQ_A13
106
MDQ_A14
109
MDQ_A15
110
MDQ_A16
23
MDQ_A17
24
MDQ_A18
28
MDQ_A19
31
MDQ_A20
114
MDQ_A21
117
MDQ_A22
121
MDQ_A23
123
MDQ_A24
33
MDQ_A25
35
MDQ_A26
39
MDQ_A27
40
MDQ_A28
126
MDQ_A29
127
MDQ_A30
131
MDQ_A31
133
MDQ_A32
53
MDQ_A33
55
MDQ_A34
57
MDQ_A35
60
MDQ_A36
146
MDQ_A37
147
MDQ_A38
150
MDQ_A39
151
MDQ_A40
61
MDQ_A41
64
MDQ_A42
68
MDQ_A43
69
MDQ_A44
153
MDQ_A45
155
MDQ_A46
161
MDQ_A47
162
MDQ_A48
72
MDQ_A49
73
MDQ_A50
79
MDQ_A51
80
MDQ_A52
165
MDQ_A53
166
MDQ_A54
170
MDQ_A55
171
MDQ_A56
83
MDQ_A57
84
MDQ_A58
87
MDQ_A59
88
MDQ_A60
174
MDQ_A61
175
MDQ_A62
178
MDQ_A63
179
9
NC
101
NC
102
NC
173
NC
DDR_VREF1
1
90
WP
167
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
ADDR.=1010000B
A A
CB20 X_C1U16Y0805
CB18 X_C1U16Y0805
CB19 X_C1U16Y0805
CB17 X_C1U16Y0805
5
VCC_DDR VCC_DDR
CB5 X_C1U16Y0805
CB7 X_C1U16Y0805
CB8 X_C1U16Y0805
CB6 X_C1U16Y0805
C215
C0.1U25Y
VCC_DDR
VCC_DDR
C55
C0.1U25Y
C95
C0.1U25Y
C58
C0.1U25Y
C42
C0.1U25Y
C34
C0.1U25Y
4
MDQ_A[0..63] 7
R178
75R
R179
75R
4
VCC_DDR
SMBCLK_ISO 13,21
SMBDATA_ISO 13,21
C47
C0.1U25Y
C67
C0.1U25Y
C32
X_C0.1U25Y
C52
X_C0.1U25Y
C111
X_C0.1U25Y
C240
X_C0.1U25Y
C11
X_C0.1U25Y
C238
X_C0.1U25Y
C241
X_C0.1U25Y
C191
C0.1U25Y
3
2
1
DDR Terminational Resisitors DDR Terminational Resisitors
MDQ_A58
MDQ_A59
MDQ_A63
DDR DIMM2
DIMM2
48
SIGNALS
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10/AP
118
A11
115
A12/NC
103
A13/NC
59
BA0
52
BA1
113
NC/BA2
157
CS0#
158
CS1#
71
NC/CS2#
163
NC/CS3#
154
RAS#
65
CAS#
63
WE#
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
97
DQM0/DQS9
107
DQM1/DQS10
119
DQM2/DQS11
129
DQM3/DQS12
149
DQM4/DQS13
159
DQM5/DQS14
169
DQM6/DQS15
177
DQM7/DQS16
140
DQM8/DQS17
44
MECC0
45
MECC1
49
MECC2
51
MECC3
134
MECC4
135
MECC5
142
MECC6
144
MECC7
21
CKE0
111
CKE1
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
16
CK0/NC
17
CK0#/NC
137
CK1/CK0
138
CK1#/CK0#
76
CK2/NC
75
CK2#/NC
82
ID_VDD
184
SPD_VDD
7
VDD
38
VDD
46
VDD
70
VDD
85
VDD
108
VDD
120
VDD
148
VDD
168
VDD
81
GND
89
GND
93
GND
100
GND
116
GND
124
GND
132
GND
139
GND
145
GND
152
GND
160
GND
176
GND
DIMM-184_green
3
FETEN/NC
NC/RESET#
POWER
ADDR.=10100100B
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MDQ_A0
2
DQ0
MDQ_A1
4
DQ1
MDQ_A2
6
DQ2
MDQ_A3
8
DQ3
MDQ_A4
94
DQ4
MDQ_A5
95
DQ5
MDQ_A6
98
DQ6
MDQ_A7
99
DQ7
MDQ_A8
12
DQ8
MDQ_A9
13
DQ9
MDQ_A10
19
MDQ_A11
20
MDQ_A12
105
MDQ_A13
106
MDQ_A14
109
MDQ_A15
110
MDQ_A16
23
MDQ_A17
24
MDQ_A18
28
MDQ_A19
31
MDQ_A20
114
MDQ_A21
117
MDQ_A22
121
MDQ_A23
123
MDQ_A24
33
MDQ_A25
35
MDQ_A26
39
MDQ_A27
40
MDQ_A28
126
MDQ_A29
127
MDQ_A30
131
MDQ_A31
133
MDQ_A32
53
MDQ_A33
55
MDQ_A34
57
MDQ_A35
60
MDQ_A36
146
MDQ_A37
147
MDQ_A38
150
MDQ_A39
151
MDQ_A40
61
MDQ_A41
64
MDQ_A42
68
MDQ_A43
69
MDQ_A44
153
MDQ_A45
155
MDQ_A46
161
MDQ_A47
162
MDQ_A48
72
MDQ_A49
73
MDQ_A50
79
MDQ_A51
80
MDQ_A52
165
MDQ_A53
166
MDQ_A54
170
MDQ_A55
171
MDQ_A56
83
MDQ_A57
84
MDQ_A58
87
MDQ_A59
88
MDQ_A60
174
MDQ_A61
175
MDQ_A62
178
MDQ_A63
179
9
NC
101
NC
102
NC
173
NC
DDR_VREF1
1
90
WP
C204
167
C0.1U25Y
10
15
VCC_DDR
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
C136
C0.1U25Y
C178
C0.1U25Y
C160
C0.1U25Y
C94
C0.1U25Y
C10
C0.1U25Y
C122
C0.1U25Y
2
SMBCLK_ISO
SMBDATA_ISO
VCC_DDR
VCC_DDR
VCC_DDR
MA_A0
MAB_A1
MAB_A2
MAB_A3
MAB_A4
MAB_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MBA_A0
MBA_A1
MRAS_A#
MCAS_A#
MWE_A#
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MAB_A[1..5] 7
MCS_A#2 7
MCS_A#3 7
MCKE_A2 7
MCKE_A3 7
MCLK_A4 7
MCLK_A#4 7
MCLK_A3 7
MCLK_A#3 7
MCLK_A5 7
MCLK_A#5 7
MDQ_A62
MDQS_A7
MDQM_A7
MDQ_A57
MDQ_A56
MDQ_A61
MDQ_A60
MDQ_A51
MDQ_A50
MDQ_A55
MDQ_A54
MDQS_A6
MDQM_A6
MDQ_A53
MDQ_A52
MDQ_A49
MDQ_A48
MDQ_A47
MDQ_A46
MDQ_A43
MDQ_A42
MDQS_A5
MDQM_A5
MCS_A#3
MCS_A#1
MCS_A#2
MCAS_A#
MCS_A#0
MDQ_A41
MDQ_A45
MWE_A#
MRAS_A#
MDQ_A40
MDQ_A44
MDQ_A35
MDQ_A39
MBA_A0
MDQ_A38
MDQM_A4
MDQ_A34
MDQS_A4
MDQ_A37
MDQ_A33
MDQ_A36
MDQ_A32
MBA_A1
MA_A10
MA_A0
MAB_A1
MA_A1
MAB_A2
MA_A2
MDQ_A31
MDQ_A27
MDQ_A26
MDQ_A30
MAB_A3
MA_A3
MAB_A4
MA_A4
MDQM_A3
MDQS_A3
MDQ_A29
MDQ_A25
MA_A6
MDQ_A28
MDQ_A24
MDQ_A19
MDQ_A23
MA_A5
MAB_A5
MA_A8
MA_A7
MDQ_A22
MDQ_A18
MDQM_A2
MA_A9
MA_A11
MDQS_A2
MDQ_A21
MDQ_A17
MDQ_A16
MA_A12
MDQ_A20
MCKE_A0
MCKE_A2
MCKE_A1
MDQ_A11
MCKE_A3
MDQ_A10
MDQ_A15
MDQ_A14
MDQM_A1
MDQ_A13
MDQS_A1
MDQ_A12
MDQ_A9
MDQ_A8
MDQ_A3
MDQ_A7
MDQ_A6
MDQ_A2
MDQM_A0
MDQS_A0
MDQ_A1
MDQ_A5
MDQ_A4
MDQ_A0
Title
Size Document Number Rev
Date: Sheet
VTT_DDR
1 2
RN4
3 4
8P4R-56R
5 6
7 8
1 2
RN5
3 4
8P4R-56R
5 6
7 8
1 2
RN7
3 4
8P4R-56R
5 6
7 8
1 2
RN11
3 4
8P4R-56R
5 6
7 8
1 2
RN13
3 4
8P4R-56R
5 6
7 8
1 2
RN14
3 4
8P4R-56R
5 6
7 8
R75 56R
R79 56R
1 2
RN18
3 4
8P4R-47R
5 6
7 8
R86 47R
R87 56R
R90 56R
R93 47R
R94 47R
1 2
RN21
3 4
8P4R-56R
5 6
7 8
R96 47R
1 2
RN24
3 4
8P4R-56R
5 6
7 8
1 2
RN26
3 4
8P4R-56R
5 6
7 8
1 2
RN29
3 4
8P4R-47R
5 6
7 8
1 2
RN31
3 4
8P4R-47R
5 6
7 8
1 2
RN33
3 4
8P4R-56R
5 6
7 8
1 2
RN35
3 4
8P4R-47R
5 6
7 8
1 2
RN36
3 4
8P4R-56R
5 6
7 8
R109 47R
1 2
RN39
3 4
8P4R-56R
5 6
7 8
1 2
RN41
3 4
8P4R-47R
5 6
7 8
1 2
RN43
3 4
8P4R-56R
5 6
7 8
R124 47R
R125 47R
1 2
RN45
3 4
8P4R-56R
5 6
7 8
R133 47R
R134 56R
1 2
RN48
3 4
8P4R-47R
5 6
7 8
1 2
RN50
3 4
8P4R-56R
5 6
7 8
1 2
RN52
3 4
8P4R-56R
5 6
7 8
1 2
RN54
3 4
8P4R-56R
5 6
7 8
1 2
RN59
3 4
8P4R-56R
5 6
7 8
1 2
RN60
3 4
8P4R-56R
5 6
7 8
MICRO-STAR INt'L CO ., L TD.
DDR DIMM 1 & 2
MS-6788
1
VTT_DDR
C116
C0.1U25Y
C110
C0.1U25Y
C18
X_C0.1U25Y
C149
C0.1U25Y
C189
C0.1U25Y
C144
C0.1U25Y
C128
C0.1U25Y
C161
C0.1U25Y
C96
C0.1U25Y
C90
X_C0.1U25Y
C172
C0.1U25Y
C49
C0.1U25Y
C85
C0.1U25Y
C143
C0.1U25Y
C88
C0.1U25Y
C202
C0.1U25Y
C97
X_C0.1U25Y
C91
C0.1U25Y
C167
C0.1U25Y
C43
C0.1U25Y
C86
C0.1U25Y
C77
C0.1U25Y
C69
C0.1U25Y
C222
C0.1U25Y
C17
C0.1U25Y
C21
X_C0.1U25Y
C201
X_C0.1U25Y
C190
X_C0.1U25Y
C154
X_C0.1U25Y
C93
X_C0.1U25Y
C14
X_C0.1U25Y
92 9 Thursday, July 10, 2003
10A
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