Page 1
1
Cover Sheet, Block diagram
Intel µPGA478B CPU - Signals
Intel µPGA478B CPU - Power
ATi RS300 - CPU & AGP & A-LINK
1-2
4
5
6
MS-6766
ATi RS300 (IGP) + SB250 (IXP) Chipset
Version 0A
Intel Northwood & Prescott mPGA478B Processor
ATi RS300 - MEMORY A & B signals
ATi RS300 - VIDEO & CLK & PWR & Straps
ATi SB200 - A-LINK & PCI & CPU & LPC & PWR
ATi SB200 - IDE & USB & MII & AC'97 & Straps
SIO-W83627HF & KB/MS
COM, LPT, FLOPPY & VGA
AC'97 & Audio
EXTERNAL CLOCK & DDR CLOCK BUFFER
DDR DIMM 1 & 2 17-18
7
8-9
10
11-12
13
14
15
16
CPU:
Intel Northwood/Prescott - 3.0G & Above
System Chipset:
ATi RS300 - RADEON IGP (North Bridge)
ATi SB250 - IXP250 (South Bridge)
On Board Chipset:
BIOS -- XBus EEPROM 4M
AC'97 Codec -- ALC650/F
LPC Super I/O -- W83627HF-AW
A A
DDR Terminational Resisitors
IDE Connectors
PCI Slot 1 & 2 & 3
19
20
21
LAN - Altima AC101L PHY
1394 -- NEC PD72874
DDR CLOCK BUFFER -- ICS ICS93750/93727
Main Memory:
AGP SLOT & FAN CONNECTORS
22
DDR * 4 (Max 4GB)
USB CONNECTORS
MII LAN - AC101L & Xbus Flash ROM
1394 - NEC PD72874
23
24
25
Expansion Slots:
PCI2.3 SLOT * 3
AGP4X/8X SLOT * 1
ATX,F_ PANEL,DDR&AGP POWER
VRM 10 - Intersil HIP 6556A + HIP 6602B
26
27ACPI Controller W83302D
28
Intersil PWM:
Controller: HIP6556A
Driver: HIP6602B * 2
RS300 & SB200 PWR GOOD
GPIO & JUMPER SETTING
29
30
Regulators
Manual Parts & Power Delivery
31
MSI
Title
Size Document Number Rev
1
Date: Sheet
MICRO-STAR INt'L CO., LTD.
COVER SHEET
(MS-6766)
131Wednesday, March 12, 2003
of
0A
Page 2
1
VRM 10
Intersil 6556
3-Phase PWM
P.28
Intel mPAG478B Processor
FSB
P.4~5
Block Diagram
2 DDR
AGP 1.5V
Connector
Analog
Video Out
TV-Out
IDE Primary
IDE Secondary
P.22
P.14
P.14
P.20
P.20
4X/8X w/Fast Wr i t e
UltraDMA
33/66/100
RS300 - IGP
HUB
Link
CHANNEL A
CHANNEL B
P.6~9
DIMM
Modules
2 DDR
DIMM
Modules
PCI
P.17
P.18
PCI Slot 1
PCI Slot 2
PCI Slot 3
SB250
P.23
USB
P.10~12
LPC Bus
Flash
P.24
P.21
P.21 P.21
A A
USB2.0
USB Port0~ 5
AC'97 Codec
ALC650 Ver:F
LAN
AC101L PHY
1394
NEC PD72874
P.15
P.24
P.25
AC'97 Link
PCI
LPC SIO
W83627HF
Keyboard
Mouse
1
P.13
P.13
P.13
Floopy Parallel Serial
P.14 P.14 P.14
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
(MS-6766)
231Wednesday, March 12, 2003
of
0A
Page 3
5
4
3
2
1
Revision Initial ver: 0A on 01/20/2003
Schematic Initial on January 20.
Schematic modify with ATi suggestion on Feb.06'03(Review_02)
Schematic modify with ATi suggestion on Feb.10'03(Review_03)
D D
C C
B B
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
REVISION HISTORY - 1
(MS-6766
331Wednesday, March 12, 2003
1
of
0A
Page 4
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAG E BLO CK
3"
DBA#
DBR#
GND
TMS
TRST#
GND
CB282
0.1u
R29
1K_1%
Q1
2N3904S
R33
300
H_FERR#
Q3
2N3904S
TDI
VCCP
C2
0.1u
4
6
8
10
12
14
20
ITP_RST#CPURST#
/N
R1
200_1%
R2
169_1%
ITP_DBR# {26}
CB283
0.1u
PROCHOT# {11}
H_FERR# {10}
431Wednesday, March 12, 2003
of
1
ITP_DBA#
ITP_DBR#
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_FBI
ITP_VCC
ITP_TDO
VCC3
VCCP
VCCP
0A
VCC_SENSE {28}
CPU SIGNAL BLOCK
D D
VCCP
VCCP
VCCP
VCCP
HDBI#0
HDBI#1
HDBI#2
HDBI#3
IERR#
FERR#
R206 200_1%
5:5<17"
C440 100p
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
TRMTRIP#
H_PROCHOT#
R207 200_1%
R208 200_1%
R209 200_1%
R27 0
BOOT
R28 0
5:13<12"
CPU_GD
5:13<10"
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
VCCP VCCP
HDBI#[0..3]{6}
STPCLK#{10}
HINIT#{10}
HDBSY#{6}
HDRDY#{6}
HTRDY#{6}
HADS#{6}
HLOCK#{6}
HBNR#{6}
HIT#{6}
C C
5:7<17"
HBPRI#{6}
HDEFER#{6}
THERMDA_CPU{13}
THERMDC_CPU{6,13}
5:7<10"
IGNNE#{10}
H_SMI#{10}
HITM#{6}
A20M#{10}
SLP#{10}
10:10:10<8"
B B
A A
BPM#4
BPM#5
BPM#2
BPM#3
BPM#1
BPM#0
BSEL0{9}
BSEL1{9}
CPU_GD{10}
CPURST#{6}
HD#[0..63]{6}
R3 62
R4 62
R5 62
R6 62
R7 62
R8 62
8
HA#[3..31]{6}
HA#31
HA#26
HA#30
HA#27
HA#28
HA#25
CPU1A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
TRMTRIP#
CPU_GD
H_BR#0
CPURST#
IERR#
HINIT#
IGNNE#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
V22
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
HD#44 HA#29
<3"
<2"
HD#45
HD#43
HD#42
HD#40
HD#41
HD#51
HD#50
HD#52
HD#53
R16 62
R17 300
R18 62
R748 49.9
R210 62
R222 200_1%
R223 200_1%
7
HD#48
HD#49
HD#47
HD#46
HA#24
HA#23
A24#
D39#
N25
N26
HD#39
HD#38
HA#22
A23#
D38#
M26
HD#37
HA#21
A22#
D37#
HD#36
HA#18
HA#19
HA#20
A21#
A20#
A19#
D36#
D35#
D34#
N23
M24
P21
N22
HD#34
HD#35
HD#33
ITP_DBR#
ITP_TDI
ITP_TMS
ITP_TDO
ITP_TCK
ITP_TRST#
6
HA#17
HA#16
HA#15
A18#
A17#
A16#
D33#
D32#
D31#
M23
H25
K23
HD#30
HD#31
HD#32
R747 1K_1%
R9 150
R22 39
R23 75
R24 27
R12 680
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
HA#11
A12#
D27#
H24
HD#26
HA#10
A11#
D26#
G26
HD#25
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
VCC3
VCCP
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
A4#
D19#
ITP_DBR#
HA#3
AE25A5A4
A3#
DBR#
D18#
D17#
D16#
D15#
D14#
G23
E24
H22
D25
J21
HD#15
HD#18
HD#14
HD#17
HD#16
Close to CPU
CPU_CLK_INT{8}
CPUCLK#_EXT{16}
CPU_CLK#_INT{8}
5
VCC_SENSE
D13#
D23
C26
HD#12
HD#13
CPUCLK_EXT{16}
VSS_SENSE
D12#
H21
HD#11
AD26
D11#
G22
HD#10
AC26
ITP_CLK1
D10#
B25
HD#9
ITP_CLK0
D9#
D8#
C24
HD#8
AD2
VIDPWRGD
D7#
C23
HD#7
R689 0
VID5HD#6
VID4
AE1
AD3
VID5#
VID4#
D6#
D5#
B24
D22
HD#5
VID1
VID2
VID3
AE2
AE3
AE4
VID3#
VID2#
D4#
D3#
C21
A25
A23
HD#2
HD#4
HD#3
R727 0
R728 X_0
R729 33
R724 0
R725 X_0
R726 33
VSS_SENSE {28}
VID_GD {27}
VID[0..5] {13,28}
RES. CONFIG.
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
H_BR#0
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI2
TESTHI0
CPU_CLK#
CPU_CLK
HRS#2
HRS#1
HRS#0
COMP1
COMP0
R225 200_1%
C439 100p
R224 200_1%
C438 100p
AD2
AF3
AD1
AE26 DNI
GTLREF
C3 220p
VID0
AE5
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
NORTHWOOD/PRESCOTT
B22
B21
HD#1
HD#0
CPU_CLK ITP_CLK
CPU_CLK#
4
PRESCOTT NORTHWOOD/WILLAMETTE
INSTALL
INSTALL
DNI
PLACE CLOSE TO CPU
12:15<1.5"
R10 62
R11 62
R13 62
R14 62
R15 62
R20 62
R21 62
R226 X_0
ITP_CLK_EXT{16}
ITP_CLK_INT{8}
ITP_CLK#_EXT{16}
ITP_CLK#_INT{8}
5:7<8"
R25 51_1%
R26 51_1%
HADSTB#1 {6}
HADSTB#0 {6}
HDSTBP#3 {6}
HDSTBP#2 {6}
HDSTBP#1 {6}
HDSTBP#0 {6}
HDSTBN#3 {6}
HDSTBN#2 {6}
HDSTBN#1 {6}
HDSTBN#0 {6}
VCCP
H_NMI {10}
INTR {10}
VCCP
DNI
DNI
INSTALL
INSTALL
HREQ#[0..4] {6}
C4
0.1u
5:7<1"
HRS#[0..2] {6}
HBR#0 {6}
SOLDER SIDE
5:13<1.5"
R763 0
R764 X_0
R765 0
R766 X_0
3
VCCP
3"
10:7
GTLREF
0.63*VCC_AVG
CLOSE TO CPU
C1
220p
CPU ITP BLOCK
JTAG1
1 2
BPM#0
BPM#1
BPM#4
BPM#5
ITP_RST#
ITP_TCK
ITP_CLK
ITP_CLK#
BPM#5
VCCP
R31
56_1%
FERR#
MSI
R32 470
2N3904S
VCCP
R35
56_1%
2N3904S
MICRO-STAR INt'L CO., LTD.
2
H_PROCHOT#
<0.75"
Title
ITP_CLK#
Size Document Number Rev
Date: Sheet
GND GND
3
BPM#0
5
BPM#1
7
BPM#2
9
BPM#3
11
BPM#4
13
BPM#5
15 16
RESET# TCK
17 18
FBO FBI
19
BCLK
21 22
BCLK# VCC
23 24
BPM5DR# TDO
25
GND
JTAG
VCC3
VCC3
R741 0
R211 150
R743 1.5K
R744 49.9
R746 X_220
R30
470
R34
470
PROCHOT#
ITP_DBR#
ITP_DBA#
ITP_VCC
ITP_RST#
ITP_FBI
CB281
0.1u
ALL COMPONENTS CLOSE TO CPU
Q2
R36
470
Q4
Intel mPGA478B - Signals
(MS-6766)
Page 5
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCC_VID{27}
C5
D15
D17
VCC
VCC
VSS
VSS
E7E9F10
D19D7D9
VCC
VSS
VCC
VSS
VCC
VSS
F12
4.7u_0805
E10
VCC
VCC
VSS
VSS
F14
F16
E12
E14
VCC
VCC
VSS
VSS
F18F2F22
E16
VCC
VSS
E18
F25F5F8
D D
VCCP
CPU1B
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
C C
B B
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E4
E26
E20E8F11
VCC
VCC
VSS
VSS
VCC
VSS
F13
VCC
VSS
G21G6G24
1.2V 150mA
F15
F17
VCC
VCC
VCC
VSS
VSS
VSS
G3H1H23
C6
0.1u
F19
VCC
VSS
F9
VCC
VSS
H26H4J2
VSS
AF4
VCC-VID
VSS
VSS
AF3
J22
VCC-VIDPRG
VSS
R690
0
VSS
J25J5K21
It must close bulk caps.
It support DC current if 100mA.
VSSA
EC2
10u/1206
L1 10uH_0805_100mA
L2 10uH_0805_100mA
DC voltage drop should
be less than 70mV.
VCCP
CPU_IOPLL
EC1
10u/1206
AE23
AD20
XX12
XX13
XX14
XX15
XX16
XX17
XX18
XX19
XX20
XX21
XX22
XX23
XX24
XX25
XX26
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
AD22D10
VSSAVSS
Y5
VSS
Y25
VSS
Y22
VSS
Y2
VSS
W6
VSS
W3
VSS
W24
VSS
W21
VSS
V4
VSS
V26
VSS
V23
VSS
V1
VSS
U5
VSS
U25
VSS
U22
VSS
U2
VSS
T6
VSS
T3
VSS
T24
VSS
T21
VSS
R4
VSS
R26
VSS
R23
VSS
R1
VSS
P5
VSS
P25
VSS
P22
VSS
P2
VSS
N6
VSS
N3
VSS
N24
VSS
N21
VSS
M5
VSS
M25
VSS
M22
VSS
M2
VSS
L4
VSS
L26
VSS
L23
VSS
L1
VSS
K6
VSS
K3
VSS
K24
VSS
XX32
HVSS
XX31
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
XX11
XX27
XX28
XX29
XX30
VCC-IOPLL
VSS
VSS
VCCA
XX1
HVSS
XX2
HVSS
XX3
HVSS
XX4
HVSS
XX5
HVSS
XX6
HVSS
XX7
HVSS
XX8
HVSS
XX9
HVSS
XX10
NORTHWOOD/PRESCOTT
CPU DECOUPLING CAPACITORS
VCCP
EC3
10u/1206
EC11
10u/1206
EC19
10u/1206
EC26
10u/1206
EC33
A A
10u/1206
EC39
10u/1206
Place these caps within socket cavity Place these caps within south side of processor
8
VCCP VCCP VCCP VCCP VCCPVCCP
EC4
10u/1206
EC12
10u/1206
EC20
10u/1206
EC27
10u/1206
EC34
10u/1206
EC40
10u/1206
EC5
10u/1206
EC13
10u/1206
EC21
10u/1206
EC28
10u/1206
EC35
10u/1206
EC41
10u/1206
12pcs 17pcs
Place these caps within north side of processor
7
6
EC6
10u/1206
EC14
X_10u/1206
EC22
X_10u/1206
EC29
X_10u/1206
5
EC7
X_10u/1206
EC15
X_10u/1206
EC23
X_10u/1206
EC30
X_10u/1206
EC37
10u/1206
EC8
10u/0805
EC16
10u/0805
EC24
10u/0805
EC31
10u/0805
4pcs and dual-layout
with EC32, EC38
4
3
+
+
Solder side
VCCP
EC10
X_150u_2.5V(S/S)
EC18
X_150u_2.5V(S/S)
MSI
Title
Size Document Number Rev
Date: Sheet
+
EC38
X_150u_2.5V(S/S)
+
EC32
X_150u_2.5V(S/S)
Component
side
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
(MS-6766)
2
531Wednesday, March 12, 2003
1
0A
of
Page 6
8
7
6
5
4
3
2
1
U1A
HA#[3..31]{4}
D D
HREQ#[0..4]{4}
HADSTB#0{4}
C C
HADSTB#1{4}
HADS#{4}
HBNR#{4}
HBPRI#{4}
HDEFER#{4}
HDRDY#{4}
HDBSY#{4}
HBR#0{4}
HLOCK#{4}
CPURST#{4}
HRS#[0..2]{4}
HTRDY#{4}
HIT#{4}
HITM#{4}
NB_RST#{10}
VCC1.8_NB
8
NB_PWRGD{27,29}
VCCP
L3 26Ohm_600mA
NB_THRMDA{13}
THERMDC_CPU{4,13}
SUS_STAT#{11}
B B
Routing NB_THRMDA and HW_AGND
as differential pair.
A A
HA#3
M31
HA#4
P29
HA#5
M29
HA#6
N34
HA#7
N33
HA#8
M30
HA#9
N32
HA#10
P32
HA#11
P30
HA#12
R34
HA#13
P33
HA#14
R33
HA#15
N30
HA#16
N31
HREQ#0
M34
HREQ#1
N29
HREQ#2
R30
HREQ#3
M33
HREQ#4
L32
R31
HA#17
U33
HA#18
T33
HA#19
R32
HA#20
R29
HA#21
U29
HA#22
T31
HA#23
V32
HA#24
T30
HA#25
U32
HA#26
U30
HA#27
V30
HA#28
T29
HA#29
V29
HA#30
U31
HA#31
V33
T34
L31
K29
H30
J31
L30
G31
F29
K30
A21
HRS#0
G29
HRS#1
G30
HRS#2
J29
F30
J30
R38 412RST
SUS_STAT#
R39 49.9RST
R40 24.9_1%
C7 0.1u/S
GTLREF1
R43 0
O = Normal mode
H29
D10
AE5
AE6
E12
W32
W33
H26
J27
Y33
AA33
Y32
B21
VCC_DDR
R45
SUS_STAT# GTLREF1
2.2K
R47
5.6K
7
RS300 IGP
AD3#
AD4#
AD5#
AD6#
AD7#
AD8#
AD9#
AD10#
AD11#
AD12#
AD13#
AD14#
AD15#
AD16#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#
AD17#
AD18#
AD19#
AD20#
AD21#
AD22#
AD23#
AD24#
AD25#
AD26#
AD27#
AD28#
AD29#
AD30#
AD31#
ADSTB1#
ADS#
BNR#
BPR#
DEFER#
DRDY#
DBSY#
BR0#
LOCK#
CPURST#
RS2#
RS1#
RS0#
TRDY#
HIT#
HITM#
RSET
SUS_STAT#
SYSRST#
POWERGOOD
COMP_P
COMP_N
CPVDD
CPVSS
P4_VREF
THERMA_D_P
THERMAL_D_N
TESTMODE
Close to RS300
T/S : 10/10
Part 1 of 7
Address Group 0Address Group 1ControlMISC.
C9
0.1u
L33
D0#
K34
D1#
J34
D2#
J33
D3#
K32
D4#
K33
D5#
H31
D6#
J32
D7#
F32
D8#
H33
D9#
E33
D10#
D32
DATA Group 0DATA Group 1DATA Group 2DATA Group 3
D11#
G32
D12#
E32
D13#
D33
D14#
F34
D15#
F33
DBI0#
G33
DSTBN0#
G34
DSTBP0#
B30
D16#
C32
D17#
A31
D18#
C33
D19#
B33
D20#
C34
D21#
B32
D22#
D34
D23#
D30
D24#
B31
D25#
C30
D26#
E29
D27#
E30
D28#
A30
D29#
B29
D30#
C29
D31#
A32
DBI1#
D31
DSTBN1#
E31
DSTBP1#
F28
D32#
D28
D33#
E27
D34#
E28
D35#
F27
D36#
C28
D37#
P4 AGTL+ Interface
CL-ATI-RS300
VCCP
R46
2/3*Vccp
49.9RST
R48
C10
100RST
105P
6
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DBI2#
DSTBN2#
DSTBP2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI3#
DSTBN3#
DSTBP3#
B28
A28
F25
A27
B27
C26
B26
C25
E25
D26
D27
E26
F26
B25
F24
A25
C24
E24
D24
A24
D23
C22
B24
E22
B23
D22
B22
C21
A22
F23
E23
F22
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HDBI#0
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HDBI#1
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HDBI#2
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI#3
HEAT SINK
HD#[0..63] {4}
HDBI#0 {4}
HDSTBN#0 {4}
HDSTBP#0 {4}
HDBI#1 {4}
HDSTBN#1 {4}
HDSTBP#1 {4}
HDBI#2 {4}
HDSTBN#2 {4}
HDSTBP#2 {4}
HDBI#3 {4}
HDSTBN#3 {4}
HDSTBP#3 {4}
5
A_AD[0..31]{9,10}
A_CBE#[0..3]{10}
A_PAR{9,10}
A_FRAME#{10}
A_IRDY#{10}
A_TRDY#{10}
A_DEVSEL#{10}
A_STOP#{10}
A_SBREQ#{10}
A_SBGNT#{10}
VCC3
(012803 Update)
GGNT#{22}
GREQ#{22}
AGP8X_DET#{22}
AGP_REF{22}
AGP_4X_8X_SEL{22}
4
R37 6.8K
AGP_COMP
C8 0.1u
VCC_AGP
G
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
P_IRQ#A
SD
U1B
AE4
A_AD0
AE2
A_AD1
AE3
A_AD2
AD2
A_AD3
AD1
A_AD4
AD3
A_AD5
AD5
A_AD6
AD6
A_AD7
AC1
A_AD8
AC2
A_AD9
AC4
A_AD10
AC5
A_AD11
AC6
A_AD12
AB2
A_AD13
AB4
A_AD14
AB5
A_AD15
AA4
A_AD16
AA2
A_AD17
AA3
A_AD18
W3
A_AD19
W4
A_AD20
W5
A_AD21
W6
A_AD22
V2
A_AD23
V1
A_AD24
V5
A_AD25
V6
A_AD26
U1
A_AD27
U2
A_AD28
U3
A_AD29
U4
A_AD30
U5
A_AD31
AC3
A_CBE#0
AB6
A_CBE#1
W2
A_CBE#2
V4
A_CBE#3
AA5
A_PAR
Y3
A_FRAME#
Y2
A_IRDY#
Y6
A_TRDY#
U6
A_INTA#
Y5
A_DEVSEL#
AA6
A_STOP#
T5
A_SBREQ#
T6
A_SBGNT#
R5
A_REQ0#
R6
A_GNT0#
G6
AGP_GNT#
G5
AGP_REQ#
F5
AGP_COMP
J6
AGP8X_DET#
F6
AGP_VERF4X
R41 169RST
Q5
NDS335N
R44 71.5RST
3
RS300 IGP
A_LINK Interface
AGP_COMP
Q64
GAD0
T2
GAD1
T3
GAD2
R2
GAD3
R3
GAD4
P2
GAD5
P3
GAD6
N3
GAD7
N2
GAD8
M3
GAD9
L2
GAD10
L3
GAD11
K2
GAD12
K3
GAD13
J2
GAD14
J1
GAD15
J3
GAD16
H3
GAD17
G2
GAD18
G3
GAD19
F2
GAD20
F1
GAD21
F3
GAD22
E1
GAD23
E2
GAD24
C1
GAD25
C2
GAD26
C3
GAD27
B2
GAD28
D4
GAD29
B3
GAD30
A3
GAD31
C4
A6
C6
M1
M2
D3
D2
GC_BE#0
L1
GC_BE#1
H1
GC_BE#2
H2
GC_BE#3
E3
M5
L6
L5
N5
B4
A4
RBF#
K6
GSTOP#
N6
M6
WBF#
K5
SBA0
B8
SBA1
C7
SBA2
B7
SBA3
A7
SBA4
B6
SBA5
C5
SBA6
B5
SBA7
D5
ST0
H6
ST1
H5
ST2
J5
VCC3
R683
10K
(MS-6766)
SB_STB {22}
SB_STB# {22}
AD_STB0 {22}
AD_STB#0 {22}
AD_STB1 {22}
AD_STB#1 {22}
GC_BE#0 {22}
GC_BE#1 {22}
GC_BE#2 {22}
GC_BE#3 {22}
GDEVSEL# {22}
GFRAME# {22}
GIRDY# {22}
GPAR {22}
AGP_DBI_HI/PIPE# {22}
AGP_DBI_LO {22}
RBF# {22}
GSTOP# {22}
GTRDY# {22}
WBF# {22}
ST0 {22}
ST1 {22}
ST2 {22}
PIRQ#A
Pop R683,Q64 for A11.
Part 2 of 7
A_LINK/AGP Interface
Title
Size Document Number Rev
Date: Sheet
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP 8X Interface
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_SBSTB
AGP_SBSTB#
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_CBE#0
AGP_CBE#1
AGP_CBE#2
AGP_CBE#3
AGP_DEVSEL#
AGP_FRAME#
AGP_IRDY#
AGP_PAR
AGP_PIPE#DBI_HI
AGP_DBI_LO
AGP_RBF#
AGP_STOP#
AGP_TRDY#
AGP_WBF#
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2
CL-ATI-RS300
P_IRQ#A
2N3904S
R684 X_0
MSI
MICRO-STAR INt'L CO., LTD.
ATi rs300 - CPU & AGP & A_LINK Signals
2
GAD[0..31] {12,22}
SBA[0..7] {22}
PIRQ#A {10,21}
631Wednesday, March 12, 2003
of
1
0A
Page 7
8
D D
7
6
5
4
3
2
1
AK21
AJ21
AL20
AJ19
AJ18
AK15
AL15
AL13
AJ14
AK12
AJ22
AJ12
AK10
AL26
AK22
AG28
AH5
AL6
AL12
AK18
AK25
AJ31
AE30
AA30
AK28
AK31
AJ29
AJ6
AK6
AK11
AL17
AJ25
AH30
AE31
AA31
AJ23
AL22
AL8
AJ9
AL30
AL31
AJ30
AL32
AG3
AA34
AP25
U1D
MEMB_A0
MEMB_A1
MEMB_A2
MEMB_A3
MEMB_A4
MEMB_A5
MEMB_A6
MEMB_A7
MEMB_A8
MEMB_A9
MEMB_A10
MEMB_A11
MEMB_A12
MEMB_A13
MEMB_A14
MEMB_A15
MEMB_DM0
MEMB_DM1
MEMB_DM2
MEMB_DM3
MEMB_DM4
MEMB_DM5
MEMB_DM6
MEMB_DM7
MEMB_RAS#
MEMB_CAS#
MEMB_WE#
MEMB_DQS0
MEMB_DQS1
MEMB_DQS2
MEMB_DQS3
MEMB_DQS4
MEMB_DQS5
MEMB_DQS6
MEMB_DQS7
MEMB_CK#
MEMB_CK
MEMB_CKE0
MEMB_CKE1
MEMB_CS0#
MEMB_CS1#
MEMB_CS2#
MEMB_CS3#
MEM_CAP1
MEM_CAP2
MEM_COMP
RS300 IGP
Part 4 of 7
MEM_B_ Interface
MEMB_DQ0
MEMB_DQ1
MEMB_DQ2
MEMB_DQ3
MEMB_DQ4
MEMB_DQ5
MEMB_DQ6
MEMB_DQ7
MEMB_DQ8
MEMB_DQ9
MEMB_DQ10
MEMB_DQ11
MEMB_DQ12
MEMB_DQ13
MEMB_DQ14
MEMB_DQ15
MEMB_DQ16
MEMB_DQ17
MEMB_DQ18
MEMB_DQ19
MEMB_DQ20
MEMB_DQ21
MEMB_DQ22
MEMB_DQ23
MEMB_DQ24
MEMB_DQ25
MEMB_DQ26
MEMB_DQ27
MEMB_DQ28
MEMB_DQ29
MEMB_DQ30
MEMB_DQ31
MEMB_DQ32
MEMB_DQ33
MEMB_DQ34
MEMB_DQ35
MEMB_DQ36
MEMB_DQ37
MEMB_DQ38
MEMB_DQ39
MEMB_DQ40
MEMB_DQ41
MEMB_DQ42
MEMB_DQ43
MEMB_DQ44
MEMB_DQ45
MEMB_DQ46
MEMB_DQ47
MEMB_DQ48
MEMB_DQ49
MEMB_DQ50
MEMB_DQ51
MEMB_DQ52
MEMB_DQ53
MEMB_DQ54
MEMB_DQ55
MEMB_DQ56
MEMB_DQ57
MEMB_DQ58
MEMB_DQ59
MEMB_DQ60
MEMB_DQ61
MEMB_DQ62
MEMB_DQ63
CL-ATI-RS300
AG6
AH6
AJ4
AL3
AG5
AG4
AJ5
AK3
AK4
AM4
AJ8
AK8
AL4
AL5
AJ7
AK7
AJ10
AL10
AJ13
AK14
AK9
AJ11
AK13
AJ15
AJ16
AJ17
AK19
AJ20
AK16
AK17
AL19
AK20
AK23
AK24
AJ26
AK27
AJ24
AL24
AK26
AJ27
AJ28
AL29
AH28
AG29
AL27
AK29
AH29
AG30
AG31
AF29
AD30
AC30
AF30
AF31
AD29
AC29
AB31
AA29
Y30
W30
AB29
AB30
Y29
W29
MDQ_B0
MDQ_B1
MDQ_B2
MDQ_B3
MDQ_B4
MDQ_B5
MDQ_B6
MDQ_B7
MDQ_B8
MDQ_B9
MDQ_B10
MDQ_B11
MDQ_B12
MDQ_B13
MDQ_B14
MDQ_B15
MDQ_B16
MDQ_B17
MDQ_B18
MDQ_B20
MDQ_B21
MDQ_B22
MDQ_B23
MDQ_B24
MDQ_B25
MDQ_B26
MDQ_B27
MDQ_B28
MDQ_B29
MDQ_B30
MDQ_B31
MDQ_B32
MDQ_B33
MDQ_B34
MDQ_B35
MDQ_B36
MDQ_B37
MDQ_B38
MDQ_B39
MDQ_B40
MDQ_B41
MDQ_B42
MDQ_B43
MDQ_B44
MDQ_B45
MDQ_B46
MDQ_B47
MDQ_B48
MDQ_B49
MDQ_B50
MDQ_B51
MDQ_B52
MDQ_B53
MDQ_B54
MDQ_B55
MDQ_B56
MDQ_B57
MDQ_B58
MDQ_B59
MDQ_B60
MDQ_B61
MDQ_B62
MDQ_B63
MDQ_B[0..63] {18,19}
U1C
MA_A0
MA_A[0..15]{17,19}
VCC1.8_NB
VCC_DDR
MDQM_A[0..7]{17,19}
MRAS_A#{17}
MCAS_A#{17}
MWE_A#{17}
MDQS_A[0..7]{17,19}
R50
1K_1%
R51
1K_1%
MA_CLKOUT#
MA_CLKOUT
MA_CLKOUT#{16}
MA_CLKOUT{16}
MCKE_A0{17}
MCKE_A1{17}
MCS_A#0{17}
MCS_A#1{17}
MCS_A#2{17}
MCS_A#3{17}
C14
0.1u
C15
0.1u
L4 26Ohm_600mA
C C
B B
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MA_A13
MA_A14
MA_A15
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MCKE_A0
MCKE_A1
MEM_VREF
AN21
AM21
AN20
AM18
AN17
AN14
AM15
AN12
AM13
AM11
AM22
AP10
AM9
AM27
AN22
AK33
AJ3
AP4
AP11
AP17
AN25
AM34
AG32
AC32
AN29
AP31
AM30
AK1
AN4
AN10
AM17
AM25
AM33
AG33
AC33
AM23
AP22
AM7
AN7
AN32
AN33
AN31
AP32
AG19
1u/SC13
AH19
AP26
MEMA_A0
MEMA_A1
MEMA_A2
MEMA_A3
MEMA_A4
MEMA_A5
MEMA_A6
MEMA_A7
MEMA_A8
MEMA_A9
MEMA_A10
MEMA_A11
MEMA_A12
MEMA_A13
MEMA_A14
MEMA_A15
MEMA_DM0
MEMA_DM1
MEMA_DM2
MEMA_DM3
MEMA_DM4
MEMA_DM5
MEMA_DM6
MEMA_DM7
MEMA_RAS#
MEMA_CAS#
MEMA_WE#
MEMA_DQS0
MEMA_DQS1
MEMA_DQS2
MEMA_DQS3
MEMA_DQS4
MEMA_DQS5
MEMA_DQS6
MEMA_DQS7
MEMA_CK#
MEMA_CK
MEMA_CKE0
MEMA_CKE1
MEMA_CS0#
MEMA_CS1#
MEMA_CS2#
MEMA_CS3#
MPVDD
MPVSS
MEM_VREF
RS300 IGP
Part 3 of 7
MEMA_DQ10
MEMA_DQ11
MEMA_DQ12
MEMA_DQ13
MEMA_DQ14
MEMA_DQ15
MEMA_DQ16
MEMA_DQ17
MEMA_DQ18
MEMA_DQ19
MEMA_DQ20
MEMA_DQ21
MEMA_DQ22
MEMA_DQ23
MEMA_DQ24
MEMA_DQ25
MEMA_DQ26
MEMA_DQ27
MEMA_DQ28
MEMA_DQ29
MEMA_DQ30
MEMA_DQ31
MEMA_DQ32
MEMA_DQ33
MEMA_DQ34
MEMA_DQ35
MEM_A_ Interface
MEMA_DQ36
MEMA_DQ37
MEMA_DQ38
MEMA_DQ39
MEMA_DQ40
MEMA_DQ41
MEMA_DQ42
MEMA_DQ43
MEMA_DQ44
MEMA_DQ45
MEMA_DQ46
MEMA_DQ47
MEMA_DQ48
MEMA_DQ49
MEMA_DQ50
MEMA_DQ51
MEMA_DQ52
MEMA_DQ53
MEMA_DQ54
MEMA_DQ55
MEMA_DQ56
MEMA_DQ57
MEMA_DQ58
MEMA_DQ59
MEMA_DQ60
MEMA_DQ61
MEMA_DQ62
MEMA_DQ63
CL-ATI-RS300
MEMA_DQ0
MEMA_DQ1
MEMA_DQ2
MEMA_DQ3
MEMA_DQ4
MEMA_DQ5
MEMA_DQ6
MEMA_DQ7
MEMA_DQ8
MEMA_DQ9
AH2
AJ1
AL1
AM1
AH3
AJ2
AK2
AL2
AM2
AN3
AM6
AN6
AN2
AP3
AN5
AP5
AN8
AN9
AN11
AN13
AM8
AM10
AM12
AM14
AN15
AN16
AN18
AN19
AM16
AP16
AM19
AM20
AP23
AM24
AM26
AM28
AN23
AN24
AN26
AN27
AM29
AM31
AL33
AK32
AN28
AN30
AL34
AK34
AJ32
AH32
AF33
AE33
AJ33
AH33
AF32
AE32
AD34
AD33
AB33
AA32
AE34
AD32
AB32
AB34
MDQ_A0
MDQ_A1
MDQ_A2
MDQ_A3
MDQ_A4
MDQ_A5
MDQ_A6
MDQ_A7
MDQ_A8
MDQ_A9
MDQ_A10
MDQ_A11
MDQ_A12
MDQ_A13
MDQ_A14
MDQ_A15
MDQ_A16
MDQ_A17
MDQ_A18
MDQ_A19
MDQ_A20
MDQ_A21
MDQ_A22
MDQ_A23
MDQ_A24
MDQ_A25
MDQ_A26
MDQ_A27
MDQ_A28
MDQ_A29
MDQ_A30
MDQ_A31
MDQ_A32
MDQ_A33
MDQ_A34
MDQ_A35
MDQ_A36
MDQ_A37
MDQ_A38
MDQ_A39
MDQ_A40
MDQ_A41
MDQ_A42
MDQ_A43
MDQ_A44
MDQ_A45
MDQ_A46
MDQ_A47
MDQ_A48
MDQ_A49
MDQ_A50
MDQ_A51
MDQ_A52
MDQ_A53
MDQ_A54
MDQ_A55
MDQ_A56
MDQ_A57
MDQ_A58
MDQ_A59
MDQ_A60
MDQ_A61
MDQ_A62
MDQ_A63
MDQ_A[0..63] {17,19}
MA_B[0..15]{18,19}
MDQM_B[0..7]{18,19}
MRAS_B#{18}
MCAS_B#{18}
MWE_B#{18}
MDQS_B[0..7]{18,19}
MCKE_B0{18}
MCKE_B1{18}
MCS_B#0{18}
MCS_B#1{18}
MCS_B#2{18}
MCS_B#3{18}
PLACE CLOSE TO RS300
MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12
MA_B13
MA_B14
MA_B15
MDQM_B0
MDQM_B1
MDQM_B2 MDQ_B19
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
MRAS_B#
MCAS_B#
MWE_B#
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
MCKE_B0
MCKE_B1
C11 0.47u
C12 0.47u
R49 49.9_1%
PLACE CLOSE TO RS300
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
ATi IGP - Memory Signals
(MS-6766)
2
731Wednesday, March 12, 2003
0A
of
1
Page 8
8
L5 200Ohm_200mA
VCC3
CP1
1 2
AVSSN
CP2
D D
C C
NB_DDRCLK_EXT{16}
NC7WZ14-SC70
B B
VCC_AGP
VCCP
A A
1 2
AVSSDI
CP3
1 2
AVSSQ
CP4
1 2
PLLVSS
NB_CLK_EXT{16}
NB_CLK#_EXT{16}
AGPCLK0_EXT{16}
VCC3_SB VCC3_SB
U29A
1 6
R291 10M
C426
22p
Signal end crystal will not work
C35
0.1u/S
C42
0.1u/S
C49
0.1u/S
C56
0.1u/S
C63
0.1u/S
CB258
0.1u
C76
0.1u/S
C82
0.1u/S
C94
0.1u/S
C100
0.1u/S
R730 0
R731 0
52
R740
270K
8
C16 1u
C17 0.1u
C18 0.1u
AVSSN
VCC1.8_NB
C21 0.1u
C23 0.1u
AVSSDI
C25 0.1u
C26 0.1u
AVSSQ
C27 1u
C28 0.1u/S
C29 0.1u/S
CRT_R{14}
CRT_G{14}
CRT_B{14}
CRT_VSYNC{14}
CRT_HSYNC{14}
3VDDCDA{14}
3VDDCCL{14}
HCLKIN
HCLKIN#
R56 X_0
R57 X_0
R691 0
R693 0
3 4
X8
27Mhz/20pf/30ppm
C427
22p
R692 X_0
R59 0
U29B
52
NC7WZ14-SC70
VCC_NB VCC_DDR
C37
0.1u/S
C44
0.1u/S
C51
0.1u/S
C58
0.1u/S
C65
0.1u/S
C71
0.1u/S
VCC_NB
C78
0.1u/S
C84
0.1u/S
AVDD
(2.5V)
(1.8V)
AVDDQ
(1.8V)
PLVDD
(1.8V)
PLLVSS
R52 715_1%
3VDDCDA
3VDDCCL
R53 33
R55 33
SYS_FB_CO
SYS_FB_CO#
ALINK_CLK_R
AGP_CLK_R
AGP_FB_CI
AGP_FB_CO
USB_CLK_R
R61 33
VCC_NB
7
U1E
H9
VDDR3_1
G9
VDDR3_2
A18
AVDD
B18
AVSS
B17
AVDDDI
C17
AVSSDI
A19
AVDDQ
B19
AVSSQ
H14
PLLVDD
H15
PLLVSS
D18
RED
E18
GREEN
F18
BLUE
E13
DACVSYNC
D13
DACHSYNC
C18
RSET
E11
DACSDA
A10
HCLKIN
B10
HCLKIN#
B11
SYS_FBCLKOUT
C11
SYS_FBCLKOUT#
F9
ALINK_CLK
C8
AGPCLKOUT
D9
AGPCLKIN
C9
EXT_MEM_CLK
F10
USBCLK
D11
REF27
SB_OSC_INT_R SB_OSC_INT
ALINK_CLK_R ALINK_CLK_INT
AGP_CLK_R AGPCLK1_INT
CPU_CLK_INT
CPU_CLK#_INT
C38
0.1u/S
C52
0.1u/S
C59
0.1u/S
C66
0.1u/S
C72
0.1u/S
7
RS300 IGP
Part 5 of 7
CRT
Clock
R63 X_22
R64 X_22
R65 X_22
R66 X_22
R767 X_0
R768 X_0
VCC_DDR
USBCLK_INTUSB_CLK_R
ITP_CLK_INT
ITP_CLK#_INT
C39
0.1u
C46
0.1u
C53
0.1u
C60
0.1u
C67
0.1u
C73
0.1u
C40
0.1u/S
C47
0.1u/S
C54
0.1u/S
C61
0.1u/S
C68
0.1u/S
C74
0.1u/S
6
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
VDD18
VDD18
VDD18
VDD18
VDD18
VDD18
VDD18
GND
GND
GND
C_R
Y_G
COMP_BDACSCL
SVID
CPUSTOP#
SYSCLK
SYSCLK#
OSC
XTLOUT
XTLIN
CL-ATI-RS300
6
D15
E15
F15
D16
F16
E16
F17
E17
F14
E14
C13
B13
C12
A13
C14
VCC1.8_NB
B14
J26
J9
AF26
AF9
A16
B16
C16
A15
B15
C15
F19
D19
E19F12
R54 0
E9
CPU_CLK_INT
A12
CPU_CLK#_INT
B12
SB_OSC_INT_R
E10
PLL_XO
R58 0
B9
A9
PLL_XI
R62 0
SB_OSC_INT {16}
ALINK_CLK_INT {16}
AGPCLK1_INT {16}
USBCLK_INT {16}
ITP_CLK_INT {4}
ITP_CLK#_INT {4}
VCC3
C41
0.1u
C48
0.1u/S
C55
0.1u/S
VCC1.8_NB
5
VCC1.8_NB
C30
0.1u
CPU_STOP# {10,12}
CPU_CLK_INT {4}
CPU_CLK#_INT {4}
P_XO
R60
1M
P_XI
X1
14M-32pf-HC49S-D
VCC_NB
5
C31
0.1u
VCC3
VCCP
C19
0.1u/S
C20
0.1u/S
C22
0.1u/S
C24
0.1u/S
+
EC45
10u-16V
EC46
+
100u_6.3V
EC48
10u_0805
4
U1F
VCC_NB VCC_DDR
22pC32
22pC33
VCC_AGP
AA13
AA14
AA15
AA16
AA19
AA20
AA21
AA22
AB13
AB14
AB15
AB16
AB19
AB20
AB21
AB22
G10
G12
G16
H10
H12
H16
N13
N14
N15
N16
N19
N20
N21
N22
P13
P14
P15
P16
P19
P20
P21
P22
R13
R14
R15
R16
R19
R20
R21
R22
Y13
Y14
Y15
Y16
Y19
Y20
Y21
Y22
D7
E7
H8
A2
E4
G4
J4
K8
L4
L7
L8
N4
N8
P1
P5
P6
R4
R7
R8
4
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDP33
VDDP33
VDDP33
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
RS300 IGP
Part 6 of 7
3
CORE PWR
MEM I/F PWR
POWER
A_LINK PWRCPU I/F PWR
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
AGP PWR
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
VDDR2
CL-ATI-RS300
3
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDL
VDDL
VDDL
VDDL
VDDL
VDDL
VDDL
VDDL
VDDL
VDDL
VDDL
AB27
AB28
AC31
AD27
AD28
AF27
AG1
AG7
AG8
AG10
AG12
AG14
AG16
AG18
AG22
AG24
AG26
AG27
AG34
AH10
AH14
AH16
AH22
AH26
AL9
AL16
AL23
AP2
AP7
AP13
AP19
AP28
AP33
W31
Y27
AA7
AA8
AD7
AD8
AF4
AF5
AF6
U7
U8
W8
Y1
C20
D20
D21
E20
E21
F20
F21
H20
H21
H23
H25
H27
G21
G25
G27
G28
K27
K28
M27
M28
N27
N28
T27
T28
U27
W34
2
U1G
A33
AA1
AA18
AA27
AA28
AB3
AB8
AC7
AC8
AC27
AD4
AD31
AE8
AE27
AE28
AE29
AF1
AF2
AF3
AF7
AF8
AG2
AG9
AG11
AG13
AG15
AG17
AG20
AG21
AG23
AG25
AH4
AH8
AH11
AH13
AH17
VCC3
VCCP
Title
Size Document Number Rev
Date: Sheet
AH20
AH23
AH25
AH31
AH34
AK5
AK30
AL7
AL11
AL14
AL18
AL21
AL25
AL28
AM3
AM5
AM32
AN1
AN34
AP8
AP14
AP20
AP29
B1
B20
B34
C10
C19
C23
C27
C31
D6
D8
D12
D14
D17
D25
D29
E5
E6
E8
F4
F7
F8
F11
F13
F31
G8
G13
G15
G18
G19
G22
G24
H4
H7
AA17
MSI
MICRO-STAR INt'L CO., LTD.
ATi IGP - Video & Clock & Power Signals
2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RS300 IGP
Part 7 of 7
GND
(MS-6766)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CL-ATI-RS300
831Wednesday, March 12, 2003
1
H11
H13
H17
H18
H19
H22
H24
H32
J7
J8
J28
K4
K31
L27
L29
M4
M7
M8
M32
N17
N18
P4
P7
P8
P17
P18
P27
P31
R1
R17
R18
R27
R28
T4
T8
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
T32
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
V3
V7
V8
V13
V14
V15
V16
V17
V18
V19
V20
V21
V22
V27
V28
V31
V34
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W27
W28
Y4
Y7
Y8
Y17
Y18
Y31
AB17
AB18
of
1
0A
Page 9
8
7
6
5
4
3
2
1
D D
R67 X_2.7K
A_AD31
A_AD30
A_AD29
C C
A_AD28
A_AD27
A_AD26
B B
A_AD25
A_AD17
VCC3
VCC3
R69 4.7K
R71 4.7K
R73 X_2.7K
R75 4.7K
R76 4.7K
R79 4.7K
R80 X_4.7K
R83 X_4.7K
R84 4.7K
R87 4.7K
R88 X_4.7K
R91 4.7K
R92 X_4.7K
R95 4.7K
R96 X_4.7K
R99 X_4.7K
R100 4.7K
R777 X_0
R778 0
R779 X_0
R780 0
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
BSEL1 {4}
AD[30:31] : FSB CLK SPEED
(DEFAULT)
BSEL0 {4}
00 : 100 MHZ
01 : 133 MHZ
10 : 166 MHZ
11 : 200 MHZ
AD29 : STRAP CONFIGURATION
0 : REDUCEDE SET
1 : FULL SET
(DEFAULT)
AD28 : SPREAD SPECTURM ENABLE
0 : DISABLE SS
1 : ENABLE SS
(DEFAULT)
AD27 : FrcShortReset#
0 : TEST MODE
1 : NORMAL MODE
(DEFAULT)
AD26 : ENABLE IOQ
0:IOQ=1
1:IOQ=12
(DEFAULT)
AD25, AD17 : CPU VOLTAGE[1],CPU VOLTAGE[0]
00 : 1.05V (MOBILE CPU)
01 : 1.35V (MOBILE CPU)
10 : 1.45V (DESKTOP)
11 : 1.75V (DESKTOP)
(DEFAULT)
A_PAR{6,10}
A_AD24
A_AD23
A_AD22
A_AD21
A_AD20
A_AD19
A_AD18
A_PAR
R68 4.7K
R72 4.7K
R77 4.7K
R78 X_4.7K
R81 4.7K
R82 X_4.7K
R85 4.7K
R86 X_4.7K
R89 4.7K
R93 4.7K
R94 X_4.7K
R97 4.7K
R98 X_4.7K
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
AD24 : RESERVED
1 : DEFAULT (DEFAULT)
AD23 : CLOCK BYPASS ENABLE
0 : TEST MODE
1 : NORMAL (DEFAULT)
AD22 : OSC PAD OUTPUT PCICLK
0 : OSC PIN DRIVES OSC CLK (=66MHz)
1 : OSC PIN DRIVES PCI CLK (=14.318MHz)
NOTE : SET AD22 = 1 WHEN USE GIGABIT ENTHERNET
AD21 : AUTO CAL. ENABLE
0 : DISABLE AUTO-CAL.
AD20 : INTERNAL CLK GEN. ENABLE
0 : EXTERNAL CLK GEN.
AD19 : MEMORY I/O VOLTAGE
0 : 1.8V
1 : 2.5V
AD18 : ENABLE PHASE CALIBRATION
0 : ENABLE
1 : DISABLE
A_PAR : ENTENDED DEBUG MODE
0 : DEBUG MODE
A_AD[0..31] {6,10}
(DEFAULT)
(DEFAULT)1 : ENABLE AUTO-CAL.
(DEFAULT)1 : INTERNAL CLK GEN.
(DEFAULT)
(DEFAULT)
(DEFAULT)1 : NORMAL OPERATION
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
ATi RS300 - Straps Signals
(MS-6766)
2
931Wednesday, March 12, 2003
0A
of
1
Page 10
A_AD[0..31]{6,9}
A_CBE#[0..3]{6}
R113 20M
Pull down for S3
LPC_RST#{13}
ALINK_CLK{16}
NB_RST#{6}
A_FRAME#{6}
A_DEVSEL#{6}
A_IRDY#{6}
A_TRDY#{6}
A_PAR{6,9}
A_STOP#{6}
VCC3
A_SBREQ#{6}
A_SBGNT#{6}
CPU_STOP#{8,16}
PCI_STP#{16}
PIRQ#A{6,21,22}
PIRQ#B{21,22}
PIRQ#C{21}
PIRQ#D{21,25}
12pC151
12pC152
VCC3
CPU_GD{4}
INTR{4}
H_NMI{4}
HINIT#{4}
H_SMI#{4}
SLP#{4}
IGNNE#{4}
A20M#{4}
H_FERR#{4}
STPCLK#{4}
GPI0
R101 8.2K
R103 33
R106 33
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2 AD28
A_CBE#3
R112 8.2K
PCI_STP#
32.768KHz-12.5pF-20PPM
R114
20M
32K_X1
X3
32K_X2
R115 10K
CPU_GD
R117 0
GPI0
CMOS CLEAR JUMPER
JBAT1
1
2
3
YJ103
CB284
X_104P
U2A
B22
PCICLKF
R22
A_RST#
H22
A_AD0
P23
A_AD1
L23
A_AD2
N23
A_AD3
N22
A_AD4
M23
A_AD5
M22
A_AD6
K22
A_AD7
M21
A_AD8
M20
A_AD9
L21
A_AD10
K21
A_AD11
L20
A_AD12
N21
A_AD13
K23
A_AD14
K20
A_AD15
F23
A_AD16
G21
A_AD17
F20
A_AD18
H21
A_AD19
F22
A_AD20
F21
A_AD21
G20
A_AD22
E21
A_AD23
E20
A_AD24
D23
A_AD25
D22
A_AD26
E22
A_AD27
D20
A_AD28
C23
A_AD29
D21
A_AD30
C22
A_AD31
L22
A_CBE#0
J23
A_CBE#1
G22
A_CBE#2
E23
A_CBE#3
H20
A_STROBE#
J21
A_DEVSEL#
G23
A_ACAT#
H23
A_END#
J20
A_PAR
J22
A_OFF#
P22
A_SERR#
B21
A_SBREQ#
B20
A_SBGNT#
N20
CPU_STP#/DPSLP#
R23
PCI_STP#
C20
A_INTA#
P20
INTB#
B23
INTC#
P21
INTD#
AC12
X1
AC11
X2
B18
CPURSTIN#
E4
CPU_PWRGD
B17
INTR/LINT0
B16
NMI/LINT1
C17
INIT
C16
SMI#
F19
SLP#
D17
IGNNE#
D18
A20M#
E19
FERR#
E16
STPCLK#
E17
SSMUXSEL/GPIO0
E18
DPRSLPVR
C19
APIC_D0
C18
APIC_D1
B19
APIC_CLK
CL-ATI-SB200
JBAT1 Clear CMOS
Normal
1 - 2
2 - 3
Clear CMOS
*
SB200 SB
Part 1 of 3
A-LINK
INTERFACE
XTAL
CPU
RTC
LPC
PCI
CLKS
PCICLK_FB
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24/RTC_AD0
AD25/RTC_AD1
AD26/RTC_AD2
AD27/RTC_AD3
PCI
INTERFACE
AD28/RTC_AD4
AD29/RTC_AD5
AD30/RTC_AD6
AD31/RTC_AD7
CBE#0/ROMA10
CBE#1/ROMA1
CBE#2/ROMWE#
CBE#3/RTC_RD#
DEVSEL#/ROMA0
TRDY#/ROMOE#
REQ#3/PDMAREQ0#
REQ#4/PLLBP33/PDMAREQ1#
GNT#3/PDMAGNT0#
GNT#4/PLLBP50/PDMAGNT1#
GPIO1/ROMCS#
USBOC5#/GPM1
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
RTC_VCC
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCIRST#
FRAME#
IRDY#
PAR
STOP#
PERR#
SERR#
REQ#0
REQ#1
REQ#2
GNT#0
GNT#1
GNT#2
CLKRUN#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
VBAT
RTC_GND
B15
D16
A14
A15
A16
A17
D15
A18
A19
C15
B1
C1
A1
D2
B2
C2
A2
D3
C3
A3
D4
B4
C4
A4
D5
B5
C8
D8
B8
A8
C9
D9
B9
A9
C10
B10
D11
A10
C11
B11
D12
A11
B3
C5
A7
D10
B7
A6
C7
D7
A5
B6
C6
D6
B12
C12
D13
A12
C13
A13
B13
C14
D14
B14
A20
AB5
Y14
AA14
AB14
AA13
AB13
AC14
Y13
AC13
AA2
AB7
AB8
AC8
AC10
AB11
20mil
BAT1
PCLK0
PCLK1
PCLK2
PCLK3
PCLK4
PCLK8
PCLK8_FB
PCI_RST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD29
AD30
AD31
C_CBE#0
C_CBE#1
C_CBE#2
C_CBE#3
PREQ#0
PREQ#2
PREQ#3
PREQ#4
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PCI_CLKRUN#
R116 4.7K
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1
SERIRQ
C161
1u
SERIRQ
PCI_CLKRUN#
LPC_DRQ#0
LPC_DRQ#1
GPI0
R105 33
PCLK2 PCI_CLK2
PCLK3
PCLK0
PCLK1
PCLK4
R111 33
As short as possible <1"
CN10 X_10p
2
4
6
8
X_10p_NPOC441
ROM_CS#
OC#3
OC#3
OC#2
3VDUAL
R118 0
R119 X_0
R185 1K_1%
Close to
VBAT pin.
C162
0.1u
D2
R126
1N4148S
0
R180 10K
R124 10K
R125 4.7K
R127 4.7K
R188 10K
SIO_PCLK
1 2
PCI_CLK0
3 4
PCI_CLK1
5 6
1394_PCLK
7 8
RN69 33_8P4R
PCI_RST# {27}
AD[0..31] {21,24,25}
For EMI(022703)
1
SIO_PCLK {13}
3
PCI_CLK0 {21}
5
PCI_CLK1 {21}
7
1394_PCLK {25}
PCI_CLK2 {21}
C_CBE#[0..3] {24}
FRAME# {21,25}
DEVSEL# {21,24,25}
IRDY# {21,25}
TRDY# {21,24,25}
PAR {21,25}
STOP# {21,25}
PERR# {21,25}
SERR# {21,25}
PREQ#0 {21}
PREQ#1 {21}
PREQ#2 {21}
PREQ#3 {21}
PREQ#4 {21,25}
PGNT#0 {21}
PGNT#1 {21}
PGNT#2 {21}
PGNT#3 {21}
PGNT#4 {25}
PCI_CLKRUN# {13}
ROM_CS# {24}
LPC_AD0 {13}
LPC_AD1 {13}
LPC_AD2 {13}
LPC_AD3 {13}
LPC_FRAME# {13}
SERIRQ {13}
OC#3 {23}
OC#2 {23}
VBAT
1N4148S
LPCDRQ#0 {13}
VCC3
D1
VCC3
EC49
+
100u_6.3V
EC51
10u-16V
3VDUAL
L7
26/600mA-0805
USB_AVDD
>30mil
C163
0.1u/S
C165
0.1u/S
C166
0.1u/S
C167
0.1u
C164
0.1u/S
VCC3 VCC_SB
C112
0.1u
C114
0.1u
C116
0.1u
C120
0.1u
C122
0.1u/S
C124
0.1u
C128
0.1u
C131
0.1u/S
C134
0.1u/S
C137
0.1u/S
C140
0.1u
C142
0.1u/S
C130
0.1u/S
C133
0.1u/S
C143
0.1u/S
L6
26/600mA-0805
USB_AVDD
CT2
100u_6.3V
+
3.3V_AVDDC
C149
4.7u-0805
USB_AVDDPREQ#1
C150
4.7u-0805
ONE CAP FOR EACH BALL
C154
0.1u
>20mil
>30mil
C155
0.1u/S
5V_REF
+VCC2.5
VCC3_SB
C113
0.1u/S
C115
0.1u/S
C117
0.1u/S
C119
0.1u/S
C121
0.1u/S
C123
0.1u/S
C125
0.1u/S
C127
0.1u
C135
0.1u/S
C138
0.1u
U2C
VCC3
VCC_SB
2_5DUAL
3VDUAL
C157
C156
0.1u/S
0.1u/S
VCC_SB
C159 1u-0805
AVDD_CK
I=100mA
Title
Size Document Number Rev
Date: Sheet
E11
E12
E15
E7
E8
F11
F12
F15
F16
F17
F7
F8
G18
G19
H18
H19
M18
M19
N18
N19
T18
T19
U18
U19
V17
V18
W17
W18
J10
J11
J13
J14
K15
K9
L15
L9
N15
N9
P15
P9
R10
R11
R13
R14
P6
>30mil>30mil
R6
V13
W13
V12
L6
H6
3.3V_AVDDC
J6
P5
T6
U6
V9
V10
V11
W9
W10
F4
J4
K5
F3
K4
L5
D19
D1
A21
Y9
AA9
R685 1K_1%
Add a diode to meet power up sequence
for SB200 5V_REF with respect to VDDQ
MSI
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
VDD_USB
VDD_USB
VDD_USB
AVDDC
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
AVDDTX0
AVDDTX1
AVDDTX2
AVDDRX0
AVDDRX1
AVDDRX2
VREF_CPU
5V_VREF
AVDD_CK
S5_2.5V
S5_3.3V
5V_REF
D30 1N5817
SB200 SB
MICRO-STAR
SB250 - ALINK,PCI,CPU,LPC,PWR
Part 3 of 3
POWER
020603
VCC3VCC5
(MS-6766)
VSS_USB
VSS_USB
AVSSRX2
AVSSRX1
AVSSRX0
AVSSTX2
AVSSTX1
AVSSTX0
AVSSCK
CL-ATI-SB200
10 31Wednesday, March 12, 2003
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AVSSC
E10
E13
E14
E6
E9
F10
F13
F14
F18
F6
F9
G6
J12
J15
J18
J19
J9
K10
K11
K12
K13
K14
K18
K19
L10
L11
L12
L13
L14
L18
L19
M10
M11
M12
M13
M14
M15
M6
M9
N10
N11
N12
N13
N14
N6
P10
P11
P12
P13
P14
P18
P19
R12
R15
R18
R19
R9
V14
V15
V16
V19
V6
V7
V8
W14
W15
W16
W19
W7
W8
H5
G5
N5
M5
J5
G4
K6
H4
F5
A22
0A
of
VCC3
USB CORE will drain 90mA per port in Standby mode
3VDUAL
2_5DUAL
+
2_5DUAL
VBATRTC_VCC
Page 11
8
7
6
5
4
3
2
1
U2B
P3
USBCLK/CLK48
R1
USB_RCOMP
P1
USB_VREFOUT
N4
USB_ATEST1
N3
USB_ATEST0
P4
USBOC0#/GPM7
M2
USB_HSDP5+
M1
USB_FLDP5+
N2
USB_HSDM5-
N1
USB_FLDM5-
L4
USB_HSDP4+
L3
USB_FLDP4+
M4
USB_HSDM4-
M3
USB_FLDM4-
K2
USB_HSDP3+
K1
USB_FLDP3+
L2
USB_HSDM3-
L1
USB_FLDM3-
H2
USB_HSDP2+
H1
USB_FLDP2+
J2
USB_HSDM2-
J1
USB_FLDM2-
G3
USB_HSDP1+
J3
USB_FLDP1+
H3
USB_HSDM1-
K3
USB_FLDM1-
F1
USB_HSDP0+
F2
USB_FLDP0+
G1
USB_HSDM0-
G2
USB_FLDM0-
R5
MCOL
W1
MCRS
V4
MDCK
V2
MDIO
T1
RX_CLK
T3
RXD3
U2
RXD2
T5
RXD1
W4
RXD0
T2
RX_DV
U1
RX_ERR
T4
TX_CLK
U4
TXD3
V1
TXD2
U3
TXD1
V3
TXD0
W2
TX_EN
W3
PHY_PD
U5
PHY_RST#
Y7
CLK_25M
P2
EE_CS
R3
EE_DI
R2
EE_DO
R4
EE_CK
AB9
RSMRST#
A23
OSC_IN
W6
SIO_CLK
AB2
BLINK/GPM0
AA3
FANOUT1/USBOC2#/GPM2
W11
32KHZ_IN/GPM3
AB1
USBOC1#/GPM4
Y4
SPEAKER/GPM5
AA1
FANOUT0/GPM6
AC1
GPIO_X0/AGP_STP#
AC6
GPIO_X1/AGP_BUSY#
AC2
GPIO_X2/GHI#
AC3
GPIO_X3/VGATE
AC4
GPIO_X4
AC5
GPIO_X5
6
SB200 SB
Part 2 of 3
ACPI / WAKE UP EVENTS
USB
INTERFACE
PRIMARY
ETHERNET
MII
EEPROMCLK /
RST
SECONDARY ATA
GPIOGPIO_XTRA
TALERT#/ETH_TALERT#
PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
TEST1
TEST0
GA20_IN/GEVNT0#
SMI_IN#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4#
GEVENT5#/ETH_VALERT#
GEVENT6#/ETH_FALERT#
GEVENT7#/ETH_CALERT#
GPOC0#/SCL0
GPOC1#/SDA0
GPOC2#/SCL1
GPOC3#/SDA1
RTC_IRQ#/PWR_STRP
PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#
PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
5
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#
SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9
SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13
SIDE_D14
SIDE_D15
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT
CL-ATI-SB200
ATA 66/100
66/100
AC97
AB4
AC9
AC7
AA11
AB10
AA10
Y11
C21
Y10
AA5
AA6
Y5
AA4
AB3
Y6
W5
Y8
AA7
AB6
AA12
W12
Y12
AB12
AA8
AB17
AC16
AB15
AB16
AC15
Y16
AA17
AA16
AC17
Y15
AA15
AC18
AA18
AC19
AA19
AC20
AA20
AC21
AB21
AA21
Y20
AB20
Y19
AB19
Y18
AB18
Y17
AA23
AA22
AC23
Y21
AB23
Y22
W21
Y23
W20
AC22
AB22
W23
V21
V23
U21
U23
T21
T23
R21
R20
T22
T20
U22
U20
V22
V20
W22
E1
E2
Y1
Y2
Y3
E3
V5
E5
TALERT#
LPC_SMI#
RI#
SLP_S3#
SLP_S5#
PWRBTN#
SB_PWRGD
PCI_REQACT
SUS_STAT#
SB_TEST1
SB_TEST0
A20GATE
KBRST#
SMB_ALERT#
SIO_PME#
PCI_PME#
PROCHOT#
GEVEN6#
GEVEN7#
SMBCLK
SMBDATA
ACPWRON#
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
R193 33
AC_DATA_IN1
AC_DATA_IN2
R195 33
4
TALERT# {13}
SLP_S3# {13,26,27}
SLP_S5# {26,27}
PWRBTN# {13}
SB_PWRGD {29}
SUS_STAT# {6}
A20GATE {13}
KBRST# {13}
SIO_PME# {13}
PCI_PME# {21,22,25}
PROCHOT# {4}
SMBCLK {21,22}
SMBDATA {21,22}
ATADET0 {20}
ATADET1 {20}
ACPWRON# {12}
PD_IORDY {20}
IRQ14 {20}
PD_A0 {20}
PD_A1 {20}
PD_A2 {20}
PD_DACK# {20}
PD_DREQ {20}
PD_IOR# {20}
PD_IOW# {20}
PD_CS#1 {20}
PD_CS#3 {20}
PDD[0..15] {20}
SD_IORDY {20}
IRQ15 {20}
SD_A0 {20}
SD_A1 {20}
SD_A2 {20}
SD_DACK# {20}
SD_DREQ {20}
SD_IOR# {20}
SD_IOW# {20}
SD_CS#1 {20}
SD_CS#3 {20}
SDD[0..15] {20}
AC_BITCLK {15}
AC_DATA_OUT {12,15}
AC_DATA_IN0 {15}
AC_SYNC {12,15}
AC_RST# {15}
SPDIF_OUT {12}
Title
Size Document Number Rev
3
Date: Sheet
7
Close to SB200 pin R1
R131 12.4K
USB_ATEST1
USB_ATEST0
OC#1
R139 28_1%
R141 28_1%
R146 28_1%
R149 28_1%
R153 28_1%
R158 28_1%
R164 28_1%
R167 28_1%
R170 28_1%
R173 28_1%
R177 28_1%
R179 28_1%
R181 1K_1%
MII_MCOL
MII_MCRS
R182 22
MII_RXCLK
MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0
MII_RXDV
MII_RXEER
MII_TXCLK
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
MII_TXEN
R186 22
SB_EECS
SB_EEDI
SB_EEDO
SB_EECLK
RSMRST#
R191 22
BLINK/GPM0
OC#2
OC#1
CLR_PW
GPIOX1
GPIOX2
VRM_GD
GPIOX4
GPIOX5
MII_MDCK_R
MII_MDIO
PHY_PD_R
PHY_RST#_R
USB_RCOMP
USB5+
USB5+_R
USB5USB5-_R
USB4+
USB4+_R
USB4USB4-_R
USB3+
USB3+_R
USB3USB3-_R
USB2+
USB2+_R
USB2USB2-_R
USB1+
USB1+_R
USB1USB1-_R
USB0+
USB0+_R
USB0USB0-_R
R129 15K
USB5+
R130 15K
USB5-
R132 15K
USB4+
R133 15K
USB4-
D D
R140 15K
USB3+
R142 15K
USB3-
R143 15K
USB2+
R145 15K
USB2-
R155 15K
USB1+
R157 15K
USB1-
R160 15K
USB0+
R162 15K
USB0-
JTEST
USB_ATEST1
USB_ATEST0
PIN1*2
C C
B B
A A
8
020603
SB_OSC{16}
CLK_24_48M{13}
OC#2{23}
32K_S5_OUT{12,13}
OC#1{23}
SPKR{26}
USB_CLK{16}
USB5+{23}
USB5-{23}
USB4+{23}
USB4-{23}
USB3+{23}
USB3-{23}
USB2+{23}
USB2-{23}
USB1+{23}
USB1-{23}
USB0+{23}
USB0-{23}
MII_MCOL{24}
MII_MCRS{24}
MII_MDCK{12,24}
MII_MDIO{24}
MII_RXCLK{24}
MII_RXD3{24}
MII_RXD2{24}
MII_RXD1{24}
MII_RXD0{24}
MII_RXDV{24}
MII_RXEER{24}
MII_TXCLK{24}
MII_TXD3{24}
MII_TXD2{24}
MII_TXD1{24}
MII_TXD0{24}
MII_TXEN{12,24}
PHY_PD{24}
PHY_RST#{24}
EXT_25M{24}
SB_EECS{24}
SB_EEDI{24}
SB_EEDO{24}
SB_EECLK{24}
RSMRST#{22,27}
VRM_GD{27,28,29}
SB200 Pull-Up / Down Resistors
BLINK/GPM0
AC_DATA_IN2
AC_DATA_IN1
AC_DATA_IN0
AC_BITCLK
SB_TEST0
SB_TEST1
GPIOX5
GPIOX4
TALERT#
LPC_SMI#
RI#
AC_RST#
SMB_ALERT#
PCI_PME#
GEVEN6#
KBRST#
MII_MDIO
A20GATE
GPIOX1
GPIOX2
GEVEN7#
SLP_S3#
SLP_S5#
PWRBTN#
SUS_STAT#
SMBCLK
SMBDATA
PCI_REQACT
ATADET0
ATADET1
1 2
3 4
5 6
7 8
RN1 10K_8P4R
R134 10K
R135 10K
R136 10K
R137 10K
R138 10K
R144 10K
R147 10K
R148 10K
R150 10K
R151 10K
R152 4.7K
R154 10K
R156 8.2K
R159 1.5K
R161 8.2K
R163 10K
R165 10K
R769 10K
R169 10K
R171 10K
R172 10K
R174 X_10K
R175 4.7K
R176 4.7K
R178 10K
R166 X_4.7K
R168 X_4.7K
PASSWORD CLEAR JUMPER
VCC3_SB
R183 1K_1%
R184
10K
MSI
CLR_PW
JPWD1
Short
Normal
CLEAR
OPEN
PASSWORD
MICRO-STAR INt'L CO., LTD.
ATi SB250 - USB & IDE & AC'97 & MII Signals
(MS-6766)
2
11 31Wednesday, March 12, 2003
3VDUAL
VCC3_SB
VCC3
JPWD1
PIN1*2
of
1
0A
Page 12
8
7
6
5
4
3
2
1
VCC3_SB
D D
ACPWRON#{11}
SB_EEDO{24}
SB_EECLK{24}
AC_SYNC{11,15}
AC_DATA_OUT{11,15}
SPDIF_OUT{11}
CPU_STOP#{8,16}
MII_TXEN{11}
32K_S5_OUT{11}
MII_MDCK{11}
GAD26{6,22}
R196
10K
R214
X_10K
R215
10K
R198
10K
R216
X_10K
ACPOWER EEDO EECK AC_SYNC AC_SOUT SPDIF_OUT TX_EN 32K_S5_OUT MDCK
STRAP
HIGH
MANUAL
PWR ON
C C
(DEFAULT)
AUTO
STRAP
PWR
LOW
ON
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
(DEFAULT)
ROM ON
PCI
BUS
(DEFAULT)
ROM ON
LPC BUS
INIT
ACTIVE
HIGH
INIT
ACTIVE
LOW
(DEFAULT)
VCC3 VCC3 VCC3
R200
X_10K
R217
R218
10K
10K
33MHz
NB BUS
HI
SPEED
A-LINK
(DEFAULT)
SIO
24MHz
SIO
48MHz
(DEFAULT)
R201
R202
X_10K
R219
10K
CPU_STP#
RESERVED DISABLE
(DEFAULT)
RESERVED
10K
VCC3_SB3VDUAL 3VDUAL 3VDUAL
R203
R204
10K
10K
CPU FREQ
SETTING
(DEFAULT)
ENABLE
CPU FREQ
SETTING
R205
10K
R221
X_10K
32KHz
OUTPUT
FROM
SB200(INT
RTC)
(DEFAULT)
32KHz
INPUT TO
SB200(EXT
RTC)
VCC3
R212
10K
ETHERNET
EEPROM=4K
IXP200
ONLY
(DEFAULT)
ETHERNET
EEPROM=16K
IXP200,
IXP250
Internal Pull Up
EEDI, MCOl, RXCLK, RXD[3:0],
RXDV, RXERR, TXCLK
Internal Pull Down
USBCLK48, SDATAIN[2:0],
BITCLK, EECS, MCRS, MDIO
GAD26
BIOS
use LPC
cycle
PULL
HIGH
(DEFAULT)
BIOS
use FWH
cycle
PULL
LOW
PHY_PD GAD31
USE
SHORT
RESET
USE
LONG
RESET
(DEFAULT) (DEFAULT)
PLL
CHARGE
PUMP
CTRL BIT
1HI
PLL
CHARGE
PUMP
CTRL BIT
1LO
GAD30 GAD28GAD29 GAD27
PLL
CHARGE
PUMP
CTRL BIT
0HI
(DEFAULT)
PLL
CHARGE
PUMP
CTRL BIT
0LO
PLL VCO
CTRL BIT
1HI
PLL VCO
CTRL BIT
1LO
(DEFAULT)
PLL VCO
CTRL BIT
0HI
(DEFAULT)
PLL VCO
CTRL BIT
0LO
BYPASS
PCI
PLL
USE PCI
PLL
(DEFAULT)
GAD25
BYPASS IDE
PLL(A11/A12
ONLY)
USE IDE PLL
FOR A13+SB
(DEFAULT)
REQUIRED SYSTEM STRAPS DEBUG STRAPS
B B
2.5V REGULATORS for SB2002.5V DUAL REGULATORS
AVDD_CKVCC_SB
L9
(2.5V)
26/600mA-0805
+
EC54
10u-16V
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
2
C173
0.1u
MICRO-STAR INt'L CO., LTD.
ATi SB250 - STRAPS Signals
(MS-6766)
C174
0.1u
I=800mA
12 31Wednesday, March 12, 2003
C175
1u_0805
0A
of
1
Page 13
8
LPC_RST#{10}
SIO_PCLK{10}
SERIRQ{10}
LPCDRQ#0{10}
LPC_FRAME#{10}
LPC_AD0{10}
LPC_AD1{10}
THERMDA_CPU{4}
THERMDC_CPU{4,6}
THERMDA_CPU
5
7
THERMDC_CPU
10
7
5
NB_THRMDA
8
10
8
10
VCC5_SB
LPC_AD2{10}
LPC_AD3{10}
VID5{4,28}
PCI_CLKRUN#{10}
C178
X_0.01u
W:10
VID4{4,28}
VID3{4,28}
VID2{4,28}
VID1{4,28}
VID0{4,28}
PWM_CPU{22}
CPU_FAN1{22}
PWM_REAR{22}
REAR_FAN1{22}
TALERT#{11}
R236 2M
VBAT
SIO_PME#{11}
SMBDATA_ISO{16,17,18,22,27}
SMBCLK_ISO{16,17,18,22,27}
PWRBTN#{11}
PWRBTIN{26}
PSON#{26,27}
SLP_S3#{11,27}
CLK_24_48M{11}
VBAT
CB3
VCC3
0.1u
VCC5
CB4
D D
C178 Close to U5
W:
C C
S:8
W:
B B
LPCDRQ#0
LPC_FRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
MB_ID3
VID5
MB_ID0
MB_ID2
PCI_CLKRUN#
MB_ID1
R235 10K
VCC5
TMP_VREF
SYS_TMP
THERMDA_CPU
NB_THRMDA
THERMDC_CPU
-5VIN
-12VIN
+12VIN
VTIN_VCC
VCC3
VCC_AGP
VCCP
VID4
VID3
VID2
VID1
VID0
TALERT#
BEEP
SIO_PME#
SMBDATA_ISO
SMBCLK_ISO
PWRBTN#
PWRBTIN
PSON#
SLP_S3#
CLK_24_48M
Trace Width 16mils.
CB5
0.1u
0.1u
7
LPC SUPER I/O W83627HF
U5
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/P15/GP13
123
GPY1/GP15
128
GPSA1/P12/GP10
121
GPSA2/GP17
126
GPX1/P14/GP12
124
GPY2/P16/GP14
127
GPSB1/P13/GP11
122
GPSB2/GP16
120
MSO/IRQIN0
119
MSI/GP20
101
VREF
102
VTIN3
103
VTIN2
104
VTIN1
93
AGND
94
-5VIN
95
-12VIN
96
+12VIN
97
AVCC
98
+3.3VIN
99
VCOREB
100
VCOREA
106
VID4
107
VID3
108
VID2
109
VID1
110
VID0
116
FANPWM1
113
FANIO1
115
FANPWM2
112
FANIO2
111
FANIO3
105
OVT#
118
BEEP
76
CASEOPEN#
19
PME#
89
WDTO/GP24
91
SDA/GP22
92
SCL/GP21
67
PSOUT#
68
PSIN
64
SUSLED/GP35
90
PLED/GP23
72
PWRCTL#/GP31
73
SUSCIN/GP30
18
CLKIN
61
VSB
74
28
12
48
77
114
VBAT
VCC3
VCC_1
VCC_2
VCC_3
VCC_4
W83627HF
Version : J
RSMRST#/GP33
PWROK/GP32
6
DRVDEN0
DRVDEN1
INDEX#
MOA#
DSB#
DSA#
MOB#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP25
CIRRX/GP34
IRTX/GP26
SUSCLKIN
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#
VSS1
VSS2
VSS3
VSS4
5
4
3
2
1
PS2 KEYBOARD & MOUSE CONNECTOR
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
42
41
40
39
38
37
36
35
31
32
PE
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85
59
60
63
62
66
65
58
70
71
20
55
86
117
32K_S5_OUT
RTSA#
SOUTA
SOUTB
A20_GATE
K_BRST#
KBDAT#
KBCLK#
MSDAT#
MSCLK#
PRD0
PRD1
PRD2
PRD3
PRD4
PRD5
PRD6
PRD7
DRVDEN0 {14}
-INDEX {14}
-MOT_A {14}
-DRV_B {14}
-DRV_A {14}
-MOT_B {14}
-DIR {14}
-STEP {14}
-WT_DT {14}
-WT_EN {14}
-TRACK0 {14}
-FDD_WP {14}
-RDATA {14}
-HEAD {14}
-DSKCHG {14}
RSLCT {14}
RPE {14}
RBUSY {14}
RACK# {14}
RSLIN# {14}
RINIT# {14}
RERR# {14}
RAFD# {14}
RSTB# {14}
32K_S5_OUT {11}
DCDA# {14}
DSRA# {14}
SINA {14}
RTSA# {14}
SOUTA {14}
CTSA# {14}
DTRA# {14}
RIA# {14}
PRD[0..7] {14}
RN2
4.7K_8P4R
1 2
3 4
5 6
7 8
MSDAT#
MSCLK#
KBDAT#
KBCLK#
VCC3
VCC3 VCC3
FB5 120_600mA
FB6 120_600mA
FB7 120_600mA
FB8 120_600mA
R227 2.2K
R229 4.7K
K_BRST# A20_GATE
Q69
2N3904S
KBRST#
C176
0.1u
MS_DT
MS_CK
KB_DT
KB_CK
CN1
270p_8P4C
R234
1K_1%
7
8
11
12
1
2
5
6
135
7
246
8
KBRST# {11} A20GATE {11}
VCC3
SPEAKER BLOCK
VCC5
BEEP
R238
10K
R242
4.7K
BEP
B
CE
Q6
2N3904S
ALARM {26}
16
131415
17
MS
KB
R233 2.2K
R231 4.7K
10
9
4
3
JKBMS1
YMD12P-1
CP28
FB30
X_80_0805
L1
C177
0.1u
A20GATE
Q70
2N3904S
M/B Revision ID
R237 X_10K
MB_ID0
R239 10K
R240 X_10K
MB_ID1
R241 10K
R243 X_10K
MB_ID2
R244 10K
R245 X_10K
MB_ID3
R246 10K
VER:0A0000
ID3 ID2 ID1 ID0
Trace Width 40mils.
FS1
1.1A_microSMD110
POLY SWITCH
VCC3
VCC3
VCC3
VCC3
USB_STR
THERMAL RESISTOR BLOCK
CP7 X_COPPER
VTIN_VCC
CB7
X_0.1u
A A
TMP_VREF NB_THRMDA
NB_THRMDA{6}
8
FB9 X_120_L0603
CB8
0.1u
THERMDC_CPU
R258 30K_1%
R259 30K_1%
NB_THRMDA
CP8
1 2
FB10
X_120_L0603
THERMDA_CPUTMP_VREF
VCC5
7
TMP_VREF
R248
10K_1%
SYS_TMP
RT1
R-TD-C0603
THERMDC_CPU
NOTE: LOCATE CLOSE
STATUS PANEL
R247 28K_1%
+12V
R249 232K_1%
-12V
R251 120K_1%
-5V
6
1 2
1 2
1 2
THERMDC_CPU
12
R254
10K_1%
12
R255
56K_1%
5
+12VIN
-12VIN
-5VIN
12
R256
56K_1%
TMP_VREF
SUPER I/O STRAPPING RESISTOR
R250 4.7K
VCC5
R252 4.7K
VCC5
R253 X_4.7K
R257 X_4.7K
VCC5
R686 X_4.7K
VCC5
R687 4.7K
SOUTA
L: Disable KBC
L: 24MHZ
SOUTB
L: CFAD=2E
RTSA#
L: PNP Default
4
SOUTA
SOUTB
RTSA#
DTRA#
H: Enable KBC
H: 48MHZ
H: CFAD=4E
H: PNP no DefaultDTRA#
3
LPC I/O DECOUPLING CAPACITORS
VCC5
CB6
0.1u
CB9
0.1u
CB10
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
LPC SUPER I/O & CONNECTORS
(MS-6766)
2
13 31Wednesday, March 12, 2003
of
1
0A
Page 14
8
7
6
5
4
3
2
1
PARALLAL PORTSERIAL PORT 1
NRTSA
1
2
NDSRA#
3
NCTSA#
5
RIA
CB12 0.1u
VCC5
D D
RTSA#{13}
DTRA#{13}
SOUTA{13}
RIA
NCTSA#
NDSRA#
NSINA
NDCDA#
RTSA#
DTRA#
SOUTA
U6
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
75232S-SSOP20
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
1
V+
19
18
17
14
12
5
6
8
10
V-
D3 1N4148S
C179 0.1u
+12COM
RIA#
CTSA#
DSRA#
SINA
DCDA#
NRTSA
NDTRA
NSOUTA
D5 1N4148S
-12COM
C181 0.1u
CP24 X_COPPER CP25 X_COPPER
+12V
RIA# {13}
CTSA# {13}
DSRA# {13}
SINA {13}
DCDA# {13}
-12V
NDCDA#
NSOUTA
NSINA
NDTRA
NDCDA#
NSINA
NDTRA
7
1
3
5
7
26
27
28
29
30
4
6
8
2
4
6
8
4749
31
32
33
34
LPT1B
LPT-D25-BK-BI
CN2
220p_8P4C
CN4
220p_8P4C
NDSRA#
NRTSA
NCTSA#NSOUTA
RIA
PRD7 PRND7 PRND7
PRD7{13}
RACK#
RACK#{13}
RBUSY
RBUSY{13}
RPE{13}
PRD3
PRD3{13}
PRD4
PRD4{13}
PRD5
PRD5{13}
PRD6
PRD6{13}
RSLIN#
RSLIN#{13}
PRD0{13}
PRD1
PRD1{13}
PRD2{13}
RAFD#
RAFD#{13}
RSTB#
RSTB#{13}
RERR#
RERR#{13}
RINIT#
RINIT#{13}
RSLCT SLCT
RSLCT{13}
RN3
1 2
ACK#
3 4
BUSY
5 6
PERPE
7 8
RN5
PRND3
1 2
PRND4
3 4
PRND5
5 6
PRND6
7 8
RN6
SLIN#
1 2
PRND0PRD0
3 4
PRND1
5 6
PRND2PRD2
7 8
RN8
AFD#
1 2
STB#
3 4
ERR#
5 6
PINIT#
7 8
33_8P4R
R262 33 C182 220p
VCC5
PRND4
PRND3
PE
BUSY
ACK#
PRND7
PRND6
PRND5
PRND0
SLIN#
PINIT#
ERR#
STB#
AFD#
PRND2
PRND1
SLCT
D4 1N4148S
C180 0.1u
1
5
1
2
2
3
3
RN4
4
4
2.7K_10P8R
6
6
7
7
8
8
9
10
9510
1
5
1
2
2
3
3
RN7
4
4
2.7K_10P8R
6
6
7
7
8
8
9
10
9510
R263 2.7K
1
2
ACK#
3
BUSY
5
PE
PRND3
PRND4
PRND5
PRND6
SLIN#
PRND0
PRND1
PRND2
AFD#
STB#
ERR#
PINIT#
SLCT
7
1
3
5
7
1
3
5
7
1
3
5
7
D4
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
CN3
220p_8P4C
CN5
220p_8P4C
CN6
220p_8P4C
CN7
220p_8P4C
STB#
PRND0
PRND1
PRND2
PRND3
PRND4
PRND5
PRND6
PRND7
ACK#
BUSY
PE
SLCT
51
1
2
3
4
5
6
7
8
9
10
11
12
13
52
LPT1A
LPT-D25-BK-BI
AFD#
14
ERR#
15
PINIT#
16
SLIN#
17
18
19
20
21
22
23
24
25
48
CP9 X_COPPER
VCC5
C C
R267
R268
4.7K
4.7K
3VDDCCL{8}
DDC_G
3VDDCDA{8}
CRT_HSYNC{8}
B B
CRT_VSYNC{8}
VCC5
84
1
2
U7A
NC7WZ08
R276 X_0
D8
BAT54C
231
Q8
2N7002S
R272 4.7K
Q9 2N7002S
231
7
D12
BAT54C
VCC5 VCC5VCC3 VCC3
R269
6.8K
VCC3
R275 51_1%
VCC5
5
6
R279 X_0
POLY SWITCH
R270
6.8K
VCC5
84
3
U7B
NC7WZ08
1
D10 BAT54C
3
R277 51_1%
FLOPPY CONNECTOR
FDD1
1 2
3 4
6
7 8
9 10
11 12
13 14
15 16
17 18
A A
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
FLOPPY
-INDEX
20
-TRACK0
-FDD_WP
-RDATA
-DSKCHG
8
DRVDEN0 {13}
-INDEX {13}
-MOT_A {13}
-DRV_B {13}
-DRV_A {13}
-MOT_B {13}
-DIR {13}
-STEP {13}
-WT_DT {13}
-WT_EN {13}
-TRACK0 {13}
-FDD_WP {13}
-RDATA {13}
-HEAD {13}
-DSKCHG {13}
-INDEX
RN9 X_150_8P4R
-TRACK0
7 8
-FDD_WP
5 6
-RDATA
3 4
-DSKCHG
1 2
7
VCC5
R281 X_150
6
FB11 X_80-0805-3AFS2 1.1A_microSMD110
5VDDCCL
2
5VDDCDA
VCC5
1
D9 BAT54C
3
TV_OUT CONNECTOR
2
C183
0.1u
R271 33
V_SYNC
H_SYNC
R273 33
C190
100p
5
C191
100p
VGA_PWRVGAPWR
R265
X_47K
FOR ESD
C192
X_47p
C193
X_47p
VIDEO CONNECTOR
15
10
14
9
13
8
12
7
11
6
YCN15F-003-1
VGA1
17
5
4
3
2
1
16
4
CRTB
CRTG
CRTR
Place FB2,FB6,FB7 90
degree from each other.
FB12 0.068uH
C184
5p
FB14 0.068uH FB15 0.068uH
C187
5p
FB16 0.068uH
C194
5p
3
FB13 0.068uH
C185
3.3p
Near VGA port<750 mils
C188
3.3p
Near VGA port<750 mils
FB17 0.068uH
C195
3.3p
Near VGA port<750 mils
MSI
Title
Size Document Number Rev
Date: Sheet
C186
C189
C196
D7 BAV99
5p
D11 BAV99
5p
D13 BAV99
5p
VCC5
R266
75_1%
Near VGA port<750 mils
VCC5
R274
75_1%
Near VGA port<750 mils
VCC5
R278
75_1%
Near VGA port<750 mils
CRT_B {8}
CRT_G {8}
CRT_R {8}
MICRO-STAR INt'L CO., LTD.
LPT, COM PORT, FDD & VGA , TV CONN ECT OR Ss
(MS-6766)
2
14 31Wednesday, March 12, 2003
of
1
0A
Page 15
DECOUPLING CAPACITOR
CP11 X_CP
1 2
1 2
CP12 X_CP
1 2
CP5 X_CP
Trace Width 20mils.
AC_DATA_OUT{11,12}
AC_BITCLK{11}
AC_DATA_IN0{11}
AC_SYNC{11,12}
AC_RST#{11}
R289 22
AUDIO CODE CD / AUX IN HEADERS
JAUX1
YJ104-BY
R293 20K
1
2
3
R295 20K
4
WHITE
FRONT LINE IN2
CDL
1
2
CDGND
3
4
CD IN
BLACK
CDR
YJ104-B
JCD1
R297 100K
R299 100K
R313 4.7K
R314 4.7K
R315 4.7K
SPDIFI
SPDIFO
XTALIN
XTALOUT
C214
0.1u
C216
12p
R290 22
C227 2.2u
C230 2.2u
CDL1
CDGND1
CDR1
C217
X_0.1u
VCC3
21
2 1
C210
0.1u
VDD3
1
DVDD1
2
XTL_IN
3
XTL_OUT
4
DVSS1
5
SDATA_OUT
6
BIT_CLK
7
DVSS2
8
SDATA_IN
9
DVDD2
10
SYNC
11
RESET#
12
PC_BEEP
AUXL
AUXR
C244
1u
C245
1u
C246
1u
R316 X_4.7K
R317 X_4.7K
R318 X_4.7K
AC650 AC97 CODEC
SUR_OUT-R RSUR_OUT-L
SUR_OUT-L
4847464544424140394338
NC
NC
TEST6
TEST5
TEST4
TEST2
TEST1
AVSS2
AVDD2
DACOUTL
DACOUTR
ALC650
PHONE
AUXL
AUXR
VIDEOL
VIDEOR
CDL
CDGND
CDR
MIC1
MIC2
1314151617181920212223
1 2
C236 1u_0805
1 2
CDLX
12
CDGNDX
12
CDRX
12
C240 1u_0805
C203 1u_0805
C205 1u_0805
37
U8
LOUTR
MONO
LOUTL
VRDA
VRAD
AFILT2
AFILT1
AVSS1
AVDD1
LINL
LINR
24
ALC650/F
C229 1u_0805
VREF_OUT
C204 1u_0805
C208 1u_0805
36
35
34
NC
33
NC
32
31
30
29
28
NC
27
VREF
26
25
CB14
0.1u
C226 1u_0805
R298 X_33K
R300 X_33K
R306 X_2.2K
R309 220
RLFE_OUT
RSUR_OUT-R
RSUR_OUT-L
+5VR
R758 0
R759 X_0
C211 1u_0805
C218
1 2
1 2
1 2
R301 220
1 2
R303 2.2K
RCENTER_OUT
LINE_LOUTA
RSUR_OUT-L
LINE_ROUTA
LINE_LOUTA
R285 220
1 2
C221
12
12
1000p
C220
X_0.1u
C219
0.1u
1 2
R292 220
1 2
R294 220
MIC2
MIC1
12
C231
470p
R754 0
R755 X_0
R756 0
R757 X_0
12
+
CB13
CT3
0.1u
10u_16V
1 2
1 2
C212 X_1u
VREF_OUT
+5VR
10u_1206
1 2
LIN_IN_R LINE_R
LIN_IN_L
1 2
1 2
FRONT_MIC
C222
12
12
1000p
C223
1u
FOR EMI
CLOSE TO
CONNECTOR
LINE_L
C232
470p
MIC2
MIC1
LINE_OUTR
C207
C206
470p
X_220pC213
X_220pC215
FOR EMI
470p
LINE_OUTR
LINE_OUTL
LINE_ROUT
LINE_LOUT
LINE_OUTL
LINE_R
LINE_L
CLOSE TO CONNECTOR
12
C224
1u
4.7u_0805
SPDIFO
RLFE_OUT
RCENTER_OUT
C228
+5VR
L13 301_L0603
470pC241
21
C242
X_0.1u
C243
X_0.1u
AUDIO1
1
2
Down
4
5
3
6
7
8
9
17
10
11
12
13
14
15
16
18
UP
L_OUT_IN_MIC
R287 100K
R288 100K
LINE_OUTR
LINE_OUTL
CLOSE TO CONNECTOR
JSPD1
1 2
+5VR VCC3
3
5 6
7 8
9 10
11 12
6 Chanel : Surround-out &
LFE-out & Center-out
Cut Pin 4
SPDIFO
AGND SPDIFI
LEF-OUT SURR-R
CEN-OUT SURR-L
AGND AGND
JSP3_X-S
CON6X2
N31-2061051-P05
+5VR
Trace Width 20mils.
C225
4.7u_0805
C233
X_0.1u
C234
X_0.1u
RSUR_OUT-R
RSUR_OUT-L
R312
R311
100K
100K
FRONT_MIC
R284 4.7K
VCC3
Front MIC
FMIC_REF
C235
0.01u
JFMIC1
3
2
1
D1x3-WH-SNO-S2
C209
1000p
VCC3
R296
10K
SPDIFI
R304
10K
AC'97 Re-ordering straps
R754
R755
R756
R757
R758
R759
A31/32 A41Location
Stuff DNI
Stuff
DNI
Stuff
Stuff
DNI
DNI
DNI
Stuff
DNI
Stuff
Front HeadPhone Header
JFHP1
1
2
3
4
5
BH1X5_Black-2pitch
JFH_X1
JUMPER-1X2C_Blue-2pitch
JFH_X2
JUMPER-1X2C_Blue-2pitch
C429
X_470p
C430
X_470p
SPEAKER_R
LINE_OUTR
SPEAKER_L
LINE_OUTL
Speaker Out Decoupling
FB19 301_L0603
LINE_ROUTA
Place those component close to
audio connector.
+
1 2
EC56 100uF_16V
FB20 301_L0603
+
1 2
EC57 100uF_16V
SPEAKER_R
SPEAKER_LLINE_LOUTA
Amplified Speaker Out
+12V
JASOD1
12
C431
1u
1
3
4
5
P1X5-1_K2-BK
LINE_ROUT
LINE_LOUT
FRONT_MIC
MIC_VREF
SPEAKER_L
Place close to FB19, FB20
Intel Front Audio Connector
1
MIC
3 4
MICPWR VCC5
5
FLINE OUTR
7
HPON
9 10
FLINE OUTL LINE NEXT L
JAUD1
YJ205-IA
C249
C250
1000p
1000p
LINE NEXT R
+5VR
GND
R322 4.7K
C253
2
6
8
Short pin5&6,Short pin 9 & 10.
AUDIO CODE CRYSTAL CIRCUIT
C254
22P
R326 1M
1 2
1 2
24.576MHZ
12
X6
12
C255
22P
XTALOUT XTALIN
+5VR
C248
0.1u
LINE_OUTRSPEAKER_R
LINE_OUTL
MIC_VREF
1u_0805
MSI
Title
Size Document Number Rev
Date: Sheet
AUDIO CODE REGULATORS
Trace Width 30mils. Trace Width 30mils.
U9
YLT1087S-0.8A
3 2
VIN VOUT
12
C251
1u
VOUT
ADJ
1
MICRO-STAR INt'L CO., LTD.
AC'97 & Audio Connectors
(MS-6766)
4
R321
100_1%
R323
300_1%
+5VR+12V
C252
4.7u_0805
12
CB15
1u
0A
of
15 31Wednesday, March 12, 2003
Page 16
8
DDR MEMORY CLOCK BUFFER
CLKOUT#0{17}
CLKOUT0{17}
CLKOUT1{17}
CLKOUT#1{17}
CLKOUT#5{18}
D D
MA_CLKOUT{7}
MA_CLKOUT#{7}
VCC_CLKB
L8
26/600mA-0805
CLKOUT5{18}
CLKOUT#2{17}
CLKOUT2{17}
C262 0.1u
CLKOUT#3{18}
CLKOUT3{18}
CLKOUT4{17}
7
S_SCLK
R327 100_1%
C263 0.1u
6
VCC_CLKB VCC_CLKB
U10
1
GND
2
DDRC0
3
DDRT0
4
VDD
5
DDRT1
6
DDRC1
7
DDRC5
8
DDRT5
9
GND
10
DDRC2
11
DDRT2
12
VDD
13
CLK_INT
14
CLK_INC
15
VDD
16
AVDD
17
AGND
18
GND
19
DDRC3
20
DDRT3
21
VDD
22
DDRT4
23
DDRC4
24
GND
Change to TSSOP_48
GND
DDRT10
DDRC10
VDD
DDRT6
DDRC6
DDRT11
DDRC11
GND
DDRC7
DDRT7
VDD
SDATA
SCLK
RFIX
VDD
RSTEP
GND
DDRC8
DDRT8
VDD
DDRT9
DDRC9
GND
ICS93750/93727
48
47
46
45
44
43
42
41
40
39
38
37
36
35
R328 1K_1%
34
33
R329 1K_1%
32
31
30
29
28
27
26
25
5
4
3
2
1
CLOCK BUFFER DECOUPLING CAP.
VCC_DDR VCC_CLKB
CLKOUT10 {18}
CLKOUT#10 {18}
CLKOUT6 {17}
CLKOUT#6 {17}
CLKOUT11 {18}
CLKOUT#11 {18}
CLKOUT#7 {18}
CLKOUT7 {18}
SMBDATA_ISO {13,17,18,22,27}
SMBCLK_ISO {13,17,18,22,27}
CLKOUT#8 {18}
CLKOUT8 {18}
CLKOUT9 {17}
CLKOUT#9 {17}CLKOUT#4{17}
CLK_GND
CP13
1 2
L14
26/600mA-0805
+
VCC_CLKB
SMBCLK_ISO
EC58
22u_16V
C256
0.1u
R330 0
R331 X_0
C257
0.1u
C258
0.1u
S_SCLK
C259
0.1u
C260
0.1u
If = SCLK, for ICS93727(Support 3DIMMs only)
If = VCC_CLKB, for ICS93750
NOTE : CONNECT DDR CLOCKGROUP AS BELOW :
1) DIMM1 : CLKOUT 0/#0 +CLKOUT 4/#4 + CLKOUT 9/#9
2) DIMM2 : CLKOUT 1/#1 +CLKOUT 2/#2 + CLKOUT 6/#6
3) DIMM3 : CLKOUT 8/#8 +CLKOUT 7/#7 + CLKOUT 3/#3
4) DIMM4 : CLKOUT 5/#5 +CLKOUT 10/#10 + CLKOUT 11/#11
C261
0.1u
EXTERNAL CLOCK GENERATOR
C C
U28
XIN
XOUT
EXT_CLKEN
R707
475RST
RN68
2.7K_8P4R
3 4
5 6
7 8
9
VDDXTAL
1
VDDREF
13
VDDPCI
19
VDDPCI
29
VDD48M
30
VDDAGP
48
VDDSD
42
VDDCPU
8
GNDXTAL
5
GNDREF
18
GNDPCI
24
GNDPCI
25
GND48M
33
GNDAGP
46
GNDSD
41
GNDCPU
6
XIN
7
XOUT
35
SCLK
34
SDATA
10
VTTPWRGD/PD#
45
CPU_STP#
12
PCI_STOP#
38
IREF
F/P : TSSOP_48
R775 0
R774 0
R773 0
R776 0
R772 0
6
SDRAMOUT
PCI66/33#SEL
FS3/PCICLK_F0
FS4/PCICLK_F1
NB_DDRCLK_EXT
AGPCLK0_EXT
AGPCLK1_EXT
ALINK_CLK_EXT
USBCLK_EXT
SB_OSC_EXT
X_10p_NPOC168
X_10p_NPOC169
X_10p_NPOC170
X_10p_NPOC171
X_10p_NPOC442
X_10p_NPOC443
CLK_VDD
For EMI(022703)
10pC424
14M-32pf-HC49S-D
B B
VID_GD{27}
NB_PWRGD_3.3V{29}
CPU_STOP#{10,12}
PCI_STP#{10}
A A
8
ALINK_CLK_EXT
FS2
FS1
SB_OSC_EXT_R
FS4
R721 8.2K
X7
10pC425
Ioh=5*Iref (2.32mA)
Voh = 0.71V @ 60 ohm
1 2
3 4
5 6
7 8
R701 0
R703 X_0
R716
2.7K
RN67
2.7K_8P4R
7
R698
1M
SMBCLK_ISO
SMBDATA_ISO
CLK_VDD
1 2
VDDA
VSSA
CPUT0
CPUC0
CPUT1
CPUC1
AGPCLK0
AGPCLK1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
24/48#SEL
48MHz_0
48MHz_1
FS0/REF0
FS1/REF1
FS2/REF2
ICS951402
36
37
CPU0
40
CPU0#
39
CPU1
44
CPU1#
43
DDRCLK_EXT_R
47
AGPCLK0_EXT_R
32
AGPCLK1_EXT_R
31
16
17
20
21
22
23
PCI_SEL66/33#
11
IF PCI_SEL66/33# = Hi for 66MHz
SB_PCLK_EXT_R
14
FS4
15
26
USBCLK_EXT_R USBCLK_EXT
28
27
SB_OSC_EXT_R SB_OSC_EXT
2
FS1
3
FS2
4
S3 S2 S1 S0 CPU MEM AGP PCIsel=0
0 0 0 0 100 100 66.6 33.3 66.6
0 0 0 1 133 133 66.6 33.3 66.6
00
000111
C412
106P/0805
*Trace < 0.5"
BSEL1 BSEL0
5
R732 33
R733 33
R734 33
R735 33
R694 33
R695 33
R696 33
R697 10K
R699 X_0
R700 33
R702 33
R706 33
166 166
EB1 X_80_0805
1 2
CP23
CPUCLK_EXT
CPUCLK#_EXT
NB_CLK_EXT
NB_CLK#_EXT
NB_DDRCLK_EXT
AGPCLK0_EXT
AGPCLK1_EXT
CLK_VDD
ALINK_CLK_EXT
66.6
66.666.6
66.6
VCC3
C413
104P
CPUCLK_EXT {4}
CPUCLK#_EXT {4}
NB_CLK_EXT {8}
NB_CLK#_EXT {8}
NB_DDRCLK_EXT {8}
AGPCLK0_EXT {8}
PCIsel=0
33.3 66.6
33.3 66.6
4
CPU/SDRAM
SYNC
CLOCK GENERATOR DECOUPLING CAP.
CLK_VDD
VCC3
FB29 26/600mA-0805
C414
C415
0.1u
X_0.1u
+
EC74
10u_16V
C416
0.1u
C417
0.1u
C418
0.1u
C419
0.1u
C420
0.1u
FOR EMI
Shut Source Termination Resistors
CPUCLK_EXT
CPUCLK#_EXT
NB_CLK_EXT
NB_CLK#_EXT
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
RESITORS CONFIGURATION FOR
INTERNAL AND EXTERNAL CLO CK
ALINK_CLK_INT{8} ALINK_CLK {10}
USBCLK_INT{8} USB_CLK {11}
AGPCLK1_INT{8} AGP_CLK {22}
SB_OSC_INT{8} SB_OSC {11}
3
ALINK_CLK_EXT
USBCLK_EXT
AGPCLK1_EXT
SB_OSC_EXT
CPUCLK_EXT
CPUCLK#_EXT
MSI
Title
Size Document Number Rev
Date: Sheet
R736 49.9RST
R737 49.9RST
R738 49.9RST
R739 49.9RST
R708 0
R709 X_0
R710 0
R711 X_0
R712 0
R713 X_0
R714 0
R715 X_0
R770 0
R771 0
ITP_CLK_EXT {4}
ITP_CLK#_EXT {4}
MICRO-STAR INt'L CO., LTD.
EXTERNAL CLOCK & DDR CLOCK BU FF ER
(MS-6766)
2
C421
0.1u
16 31Wednesday, March 12, 2003
C423
C422
0.1u
0.1u
0A
of
1
Page 17
5
4
3
2
1
DDR DIMM1 DDR DIMM2
MA_A[0..15]{7}
D D
MCS_A#0{7,19}
MCS_A#1{7,19}
MRAS_A#{7,19}
MCAS_A#{7,19}
MWE_A#{7,19}
MDQS_A[0..7]{7,19}
C C
MDQM_A[0..7]{7,19}
MCKE_A0{7,19}
MCKE_A1{7,19}
B B
CLKOUT0{16}
CLKOUT#0{16}
CLKOUT4{16}
CLKOUT#4{16}
CLKOUT9{16}
CLKOUT#9{16}
A A
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MA_A15
MA_A13
MA_A14
MRAS_A#
MCAS_A#
MWE_A#
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MCKE_A0
MCKE_A1
SMBCLK_ISO
SMBDATA_ISO
VCC3_SB
VCC_DDR VCC_DDR
5
DIMM1
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DIMM-D184-BK
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
NC/FETEN
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
WP
ADDR.=1010000B(A0H) ADDR.=1010001B(A2H)
MDQ_A0
2
MDQ_A1
4
MDQ_A2
6
MDQ_A3
8
MDQ_A4
94
MDQ_A5
95
MDQ_A6
98
MDQ_A7
99
MDQ_A8
12
MDQ_A9
13
MDQ_A10
19
MDQ_A11
20
MDQ_A12
105
MDQ_A13
106
MDQ_A14
109
MDQ_A15
110
MDQ_A16
23
MDQ_A17
24
MDQ_A18
28
MDQ_A19
31
MDQ_A20
114
MDQ_A21
117
MDQ_A22
121
MDQ_A23
123
MDQ_A24
33
MDQ_A25
35
MDQ_A26
39
MDQ_A27
40
MDQ_A28
126
MDQ_A29
127
MDQ_A30
131
MDQ_A31
133
MDQ_A32
53
MDQ_A33
55
MDQ_A34
57
MDQ_A35
60
MDQ_A36
146
MDQ_A37
147
MDQ_A38
150
MDQ_A39
151
MDQ_A40
61
MDQ_A41
64
MDQ_A42
68
MDQ_A43
69
MDQ_A44
153
MDQ_A45
155
MDQ_A46
161
MDQ_A47
162
MDQ_A48
72
MDQ_A49
73
MDQ_A50
79
MDQ_A51
80
MDQ_A52
165
MDQ_A53
166
MDQ_A54
170
MDQ_A55
171
MDQ_A56
83
MDQ_A57
84
MDQ_A58
87
MDQ_A59
88
MDQ_A60
174
MDQ_A61
175
MDQ_A62
178
MDQ_A63
179
VCC_DDR
9
NC
101
NC
102
NC
173
NC
1
90
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
CLOSE TO DIMM SOCKET
R333
1K_1%
R334
1K_1%
VCC_DDR
4
C266
0.1u
C267
0.1u
MDQ_A[0..63] {7,19}
MCS_A#2{7,19}
MCS_A#3{7,19}
SMBCLK_ISO{13,16,18,22,27}
SMBDATA_ISO{13,16,18,22,27}
VCC3_SB
CLKOUT1{16}
CLKOUT#1{16}
CLKOUT#2{16}
CLKOUT2{16}
CLKOUT#6{16}
CLKOUT6{16}
SMBCLK_ISO
SMBDATA_ISO
R332 4.7K
VCC3_SB
3
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MA_A15
MA_A13
MA_A14
MRAS_A#
MCAS_A#
MWE_A#
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MCKE_A0
MCKE_A1
DIMM2
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DIMM-D184-BK
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
NC/FETEN
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MDQ_A0
2
MDQ_A1
4
MDQ_A2
6
MDQ_A3
8
MDQ_A4
94
MDQ_A5
95
MDQ_A6
98
MDQ_A7
99
MDQ_A8
12
MDQ_A9
13
MDQ_A10
19
MDQ_A11
20
MDQ_A12
105
MDQ_A13
106
MDQ_A14
109
MDQ_A15
110
MDQ_A16
23
MDQ_A17
24
MDQ_A18
28
MDQ_A19
31
MDQ_A20
114
MDQ_A21
117
MDQ_A22
121
MDQ_A23
123
MDQ_A24
33
MDQ_A25
35
MDQ_A26
39
MDQ_A27
40
MDQ_A28
126
MDQ_A29
127
MDQ_A30
131
MDQ_A31
133
MDQ_A32
53
MDQ_A33
55
MDQ_A34
57
MDQ_A35
60
MDQ_A36
146
MDQ_A37
147
MDQ_A38
150
MDQ_A39
151
MDQ_A40
61
MDQ_A41
64
MDQ_A42
68
MDQ_A43
69
MDQ_A44
153
MDQ_A45
155
MDQ_A46
161
MDQ_A47
162
MDQ_A48
72
MDQ_A49
73
MDQ_A50
79
MDQ_A51
80
MDQ_A52
165
MDQ_A53
166
MDQ_A54
170
MDQ_A55
171
MDQ_A56
83
MDQ_A57
84
MDQ_A58
87
MDQ_A59
88
MDQ_A60
174
MDQ_A61
175
MDQ_A62
178
MDQ_A63
179
9
NC
101
NC
102
NC
173
NC
1
90
WP
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
2
C268
0.1u
VCC_DDR
DDR_VREF1DDR_VREF1
MSI
Title
Size Document Number Rev
Date: Sheet
VCC_DDR
+
CT5
470u_10V
DECOUPLING CAPACITORS
VTT_DDR
C264 10u_0805
C265 10u_0805
MICRO-STAR INt'L CO., LTD.
DDR DIMM 1 & 2 CHANNEL A
(MS-6766)
17 31Wednesday, March 12, 2003
1
of
0A
Page 18
5
4
3
2
1
DDR DIMM3 DDR DIMM4
DIMM3
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DIMM-D184-BK
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
NC/FETEN
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
ADDR.=1010010B(A4H) ADDR.=1010011B(A6H)
MCKE_B0
MCKE_B1
SMBCLK_ISO
SMBDATA_ISO
R336 4.7K
5
MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12
MA_B15
MA_B13
MA_B14
MRAS_B#
MCAS_B#
MWE_B#
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
MA_B[0..15]{7}
D D
MCS_B#0{7,19}
MCS_B#1{7,19}
MRAS_B#{7,19}
MCAS_B#{7,19}
MWE_B#{7,19}
MDQS_B[0..7]{7,19}
C C
MDQM_B[0..7]{7,19}
MCKE_B0{7,19}
MCKE_B1{7,19}
B B
A A
VCC3_SB
CLKOUT8{16}
CLKOUT#8{16}
CLKOUT7{16}
CLKOUT#7{16}
CLKOUT3{16}
CLKOUT#3{16}
MDQ_B0
2
MDQ_B1
4
MDQ_B2
6
MDQ_B3
8
MDQ_B4
94
MDQ_B5
95
MDQ_B6
98
MDQ_B7
99
MDQ_B8
12
MDQ_B9
13
MDQ_B10
19
MDQ_B11
20
MDQ_B12
105
MDQ_B13
106
MDQ_B14
109
MDQ_B15
110
MDQ_B16
23
MDQ_B17
24
MDQ_B18
28
MDQ_B19
31
MDQ_B20
114
MDQ_B21
117
MDQ_B22
121
MDQ_B23
123
MDQ_B24
33
MDQ_B25
35
MDQ_B26
39
MDQ_B27
40
MDQ_B28
126
MDQ_B29
127
MDQ_B30
131
MDQ_B31
133
MDQ_B32
53
MDQ_B33
55
MDQ_B34
57
MDQ_B35
60
MDQ_B36
146
MDQ_B37
147
MDQ_B38
150
MDQ_B39
151
MDQ_B40
61
MDQ_B41
64
MDQ_B42
68
MDQ_B43
69
MDQ_B44
153
MDQ_B45
155
MDQ_B46
161
MDQ_B47
162
MDQ_B48
72
MDQ_B49
73
MDQ_B50
79
MDQ_B51
80
MDQ_B52
165
MDQ_B53
166
MDQ_B54
170
MDQ_B55
171
MDQ_B56
83
MDQ_B57
84
MDQ_B58
87
MDQ_B59
88
MDQ_B60
174
MDQ_B61
175
MDQ_B62
178
MDQ_B63
179
VCC_DDR
9
NC
101
NC
102
NC
173
NC
1
90
WP
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
CLOSE TO DIMM SOCKET
R338
1K_1%
R339
1K_1%
VCC_DDR VCC_DDR
4
C271
0.1u
C272
0.1u
MDQ_B[0..63] {7,19}
DDR_VREF2
SMBDATA_ISO{13,16,17,22,27}
SMBCLK_ISO{13,16,17,22,27}
CLKOUT#10{16}
MCS_B#2{7,19}
MCS_B#3{7,19}
VCC3_SB
CLKOUT5{16}
CLKOUT#5{16}
CLKOUT10{16}
CLKOUT11{16}
CLKOUT#11{16}
R335 4.7K
R337 4.7K
VCC3_SBVCC3_SB
VCC_DDRVCC_DDR
3
MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12
MA_B15
MA_B13
MA_B14
MRAS_B#
MCAS_B#
MWE_B#
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
MCKE_B0
MCKE_B1
SMBCLK_ISO
SMBDATA_ISO
DIMM4
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DIMM-D184-BK
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
NC/FETEN
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MDQ_B0
2
MDQ_B1
4
MDQ_B2
6
MDQ_B3
8
MDQ_B4
94
MDQ_B5
95
MDQ_B6
98
MDQ_B7
99
MDQ_B8
12
MDQ_B9
13
MDQ_B10
19
MDQ_B11
20
MDQ_B12
105
MDQ_B13
106
MDQ_B14
109
MDQ_B15
110
MDQ_B16
23
MDQ_B17
24
MDQ_B18
28
MDQ_B19
31
MDQ_B20
114
MDQ_B21
117
MDQ_B22
121
MDQ_B23
123
MDQ_B24
33
MDQ_B25
35
MDQ_B26
39
MDQ_B27
40
MDQ_B28
126
MDQ_B29
127
MDQ_B30
131
MDQ_B31
133
MDQ_B32
53
MDQ_B33
55
MDQ_B34
57
MDQ_B35
60
MDQ_B36
146
MDQ_B37
147
MDQ_B38
150
MDQ_B39
151
MDQ_B40
61
MDQ_B41
64
MDQ_B42
68
MDQ_B43
69
MDQ_B44
153
MDQ_B45
155
MDQ_B46
161
MDQ_B47
162
MDQ_B48
72
MDQ_B49
73
MDQ_B50
79
MDQ_B51
80
MDQ_B52
165
MDQ_B53
166
MDQ_B54
170
MDQ_B55
171
MDQ_B56
83
MDQ_B57
84
MDQ_B58
87
MDQ_B59
88
MDQ_B60
174
MDQ_B61
175
MDQ_B62
178
MDQ_B63
179
9
NC
101
NC
102
NC
173
NC
1
90
WP
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
2
C273
0.1u
DDR_VREF2
Title
Size Document Number Rev
Date: Sheet
DECOUPLING CAPACITORS
VTT_DDR
C269 10u_0805
C270 10u_0805
MSI
MICRO-STAR INt'L CO., LTD.
DDR DIMM 3 & 4 CHANNEL B
(MS-6766)
18 31Wednesday, March 12, 2003
1
0A
of
Page 19
5
DDR Channel_A Terminational Resisitors
4
3
2
1
DDR Channel_B Terminational Resisitors
VTT_DDR
R341 56_0402
MA_A1
R343 56_0402
MA_A13
R345 56_0402
MA_A2
R347 56_0402
MA_A14
R349 56_0402
MA_A15
D D
C C
B B
MA_A8
MA_A7
MA_A5
MA_A6
MA_A3
MA_A9
MA_A4
MA_A11
MA_A10
MA_A0
MA_A12
MRAS_A#
MCAS_A#
MWE_A#
MCKE_A0
MCKE_A1
MCS_A#3
MCS_A#1
MCS_A#2
MCS_A#0
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
R351 56_0402
R353 56_0402
R355 56_0402
R357 56_0402
R359 56_0402
R361 56_0402
R363 56_0402
R365 56_0402
R367 56_0402
R369 56_0402
R371 56_0402
R373 56_0402
R375 56_0402
R377 56_0402
R379 56_0402
R381 56_0402
R383 56_0402
R385 56_0402
R387 56_0402
R389 56_0402
R391 56_0402
R393 56_0402
R395 56_0402
R397 56_0402
R399 56_0402
R401 56_0402
R403 56_0402
R405 56_0402
R407 56_0402
R409 56_0402
R411 56_0402
R413 56_0402
R415 56_0402
R417 56_0402
R419 56_0402
R421 56_0402
CB49 0.1u_0402
CB53 0.1u_0402
CB57 0.1u_0402
CB61 0.1u_0402
CB65 0.1u_0402
CB69 0.1u_0402
CB73 0.1u_0402
CB77 0.1u_0402
CB83 0.1u_0402
CB87 0.1u_0402
CB91 0.1u_0402
CB95 0.1u_0402
CB99 0.1u_0402
CB103 0.1u_0402
CB107 0.1u_0402
CB111 0.1u_0402
CB117 0.1u_0402
CB121 0.1u_0402
CB125 0.1u_0402
CB129 0.1u_0402
EC9 10u/1206
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
MDQ_A3
MDQ_A7
MDQ_A2
MDQ_A6
MDQ_A1
MDQ_A5
MDQ_A4
MDQ_A0
MDQ_A11
MDQ_A10
MDQ_A15
MDQ_A14
MDQ_A13
MDQ_A9
MDQ_A12
MDQ_A8
MDQ_A23
MDQ_A19
MDQ_A22
MDQ_A18
MDQ_A21
MDQ_A17
MDQ_A16
MDQ_A20
MDQ_A29
MDQ_A25
MDQ_A28
MDQ_A24
MDQ_A31
MDQ_A27
MDQ_A30
MDQ_A26
MDQ_A37
MDQ_A33
MDQ_A36
MDQ_A32
MDQ_A35
MDQ_A39
MDQ_A38
MDQ_A34
MDQ_A47
MDQ_A43
MDQ_A46
MDQ_A42
MDQ_A41
MDQ_A45
MDQ_A40
MDQ_A44
MDQ_A51
MDQ_A55
MDQ_A50
MDQ_A54
MDQ_A53
MDQ_A49
MDQ_A52
MDQ_A48
MDQ_A59
MDQ_A63
MDQ_A58
MDQ_A62
MDQ_A57
MDQ_A56
MDQ_A61
MDQ_A60
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VTT_DDR
RN10
56_8P4R_0402
RN12
56_8P4R_0402
RN14
56_8P4R_0402
RN16
56_8P4R_0402
RN18
56_8P4R_0402
RN20
56_8P4R_0402
RN22
56_8P4R_0402
RN24
56_8P4R_0402
RN26
56_8P4R_0402
RN28
56_8P4R_0402
RN30
56_8P4R_0402
RN32
56_8P4R_0402
RN34
56_8P4R_0402
RN36
56_8P4R_0402
RN38
56_8P4R_0402
RN40
56_8P4R_0402
CB46 0.1u_0402
CB50 0.1u_0402
CB54 0.1u_0402
CB58 0.1u_0402
CB62 0.1u_0402
CB66 0.1u_0402
CB70 0.1u_0402
CB74 0.1u_0402
CB78 0.1u_0402
CB80 0.1u_0402
CB84 0.1u_0402
CB88 0.1u_0402
CB92 0.1u_0402
CB96 0.1u_0402
CB100 0.1u_0402
CB104 0.1u_0402
CB108 0.1u_0402
CB112 0.1u_0402
CB114 0.1u_0402
CB118 0.1u_0402
CB122 0.1u_0402
CB126 0.1u_0402
CB130 0.1u_0402
CB132 0.1u_0402
CB134 0.1u_0402
CB136 0.1u_0402
CB138 0.1u_0402
CB140 0.1u_0402
CB142 0.1u_0402
CB144 0.1u_0402
CB146 0.1u_0402
CB148 0.1u_0402
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
MA_B1
MA_B13
MA_B2
MA_B14
MA_B3
MA_B7
MA_B9
MA_B11
MA_B6
MA_B5
MA_B15
MA_B10
MA_B0
MA_B4
MA_B8
MA_B12
MCAS_B#
MRAS_B#
MWE_B#
MCKE_B0
MCKE_B1
MCS_B#1
MCS_B#0
MCS_B#3
MCS_B#2
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
VTT_DDR
R340 56_0402
R342 56_0402
R344 56_0402
R346 56_0402
R348 56_0402
R350 56_0402
R352 56_0402
R354 56_0402
R356 56_0402
R358 56_0402
R360 56_0402
R362 56_0402
R364 56_0402
R366 56_0402
R368 56_0402
R370 56_0402
R372 56_0402
R374 56_0402 CB81 0.1u_0402
R376 56_0402
R378 56_0402
R380 56_0402
R382 56_0402
R384 56_0402
R386 56_0402
R388 56_0402
R390 56_0402
R392 56_0402
R394 56_0402
R396 56_0402
R398 56_0402
R400 56_0402
R402 56_0402
R404 56_0402
R406 56_0402
R408 56_0402
R410 56_0402
R412 56_0402
R414 56_0402
R416 56_0402
R418 56_0402 CB127 0.1u_0402
R420 56_0402
CB47 0.1u_0402
CB51 0.1u_0402
CB55 0.1u_0402
CB59 0.1u_0402
CB63 0.1u_0402
CB67 0.1u_0402
CB71 0.1u_0402
CB75 0.1u_0402
CB85 0.1u_0402
CB89 0.1u_0402
CB93 0.1u_0402
CB98 0.1u_0402
CB102 0.1u_0402
CB106 0.1u_0402
CB110 0.1u_0402
CB115 0.1u_0402
CB119 0.1u_0402
CB123 0.1u_0402
+
CT7
470u_10V
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
MDQ_B3
MDQ_B7
MDQ_B6
MDQ_B2
MDQ_B1
MDQ_B5
MDQ_B4
MDQ_B0
MDQ_B11
MDQ_B10
MDQ_B15
MDQ_B14
MDQ_B13
MDQ_B9
MDQ_B12
MDQ_B8
MDQ_B21
MDQ_B17
MDQ_B16
MDQ_B20
MDQ_B23
MDQ_B19
MDQ_B22
MDQ_B18
MDQ_B29
MDQ_B25
MDQ_B28
MDQ_B24
MDQ_B31
MDQ_B27
MDQ_B30
MDQ_B26
MDQ_B35
MDQ_B39
MDQ_B38
MDQ_B34
MDQ_B37
MDQ_B33
MDQ_B36
MDQ_B32
MDQ_B41
MDQ_B45
MDQ_B40
MDQ_B44
MDQ_B47
MDQ_B43
MDQ_B46
MDQ_B42
MDQ_B53
MDQ_B49
MDQ_B52
MDQ_B48
MDQ_B51
MDQ_B55
MDQ_B50
MDQ_B54
MDQ_B59
MDQ_B63
MDQ_B58
MDQ_B62
MDQ_B57
MDQ_B56
MDQ_B61
MDQ_B60
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VTT_DDR
RN11
56_8P4R_0402
RN13
56_8P4R_0402
RN15
56_8P4R_0402
RN17
56_8P4R_0402
RN19
56_8P4R_0402
RN21
56_8P4R_0402
RN23
56_8P4R_0402
RN25
56_8P4R_0402
RN27
56_8P4R_0402
RN29
56_8P4R_0402
RN31
56_8P4R_0402
RN33
56_8P4R_0402
RN35
56_8P4R_0402
RN37
56_8P4R_0402
RN39
56_8P4R_0402
RN41
56_8P4R_0402
CB48 0.1u_0402
CB52 0.1u_0402
CB56 0.1u_0402
CB60 0.1u_0402
CB64 0.1u_0402
CB68 0.1u_0402
CB72 0.1u_0402
CB76 0.1u_0402
CB79 0.1u_0402
CB82 0.1u_0402
CB86 0.1u_0402
CB90 0.1u_0402
CB94 0.1u_0402
CB97 0.1u_0402
CB101 0.1u_0402
CB105 0.1u_0402
CB109 0.1u_0402
CB113 0.1u_0402
CB116 0.1u_0402
CB120 0.1u_0402
CB124 0.1u_0402
CB128 0.1u_0402
CB131 0.1u_0402
CB133 0.1u_0402
CB135 0.1u_0402
CB137 0.1u_0402
CB139 0.1u_0402
CB141 0.1u_0402
CB143 0.1u_0402
CB145 0.1u_0402
CB147 0.1u_0402
CB149 0.1u_0402
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
DDR Channel_A DECOUPLING CAPACITORS
Place these decoupling capacitors close to VTT_DDR termination resistors.
One decoupling capacitor for each R-pack.
VCC_DDR VCC_DDR
+
CT9
1000u_6.3V
CB152
0.1u_0402
CB156
0.1u_0402
CB160
0.1u_0402
CB164
0.1u_0402
CB168
0.1u_0402
CB172
0.1u_0402
CB176
0.1u_0402
A A
CB180
0.1u_0402
CB184
0.1u_0402
CB188
0.1u_0402
CB192
0.1u_0402
CB196
0.1u_0402
For Ch_A DIMM1
5
VCC_DDR VCC_DDR
CB150
0.1u_0402
CB153
0.1u_0402
CB157
0.1u_0402
MCKE_A0{17}
MCKE_A1{17}
MCS_A#0{17}
MCS_A#1{17}
MCS_A#2{17}
MCS_A#3{17}
MRAS_A#{17}
MCAS_A#{17}
MWE_A#{17}
MDQS_A[0..7]{7,17}
MDQM_A[0..7]{7,17}
MDQ_A[0..63]{7,17}
MA_A[0..15]{7}
MCKE_A0
MCKE_A1
MCS_A#0
MCS_A#1
MCS_A#2
MCS_A#3
MRAS_A#
MCAS_A#
MWE_A#
For Ch_A DIMM2
4
DDR Channel_B DECOUPLING CA PAC ITORS
Place these decoupling capacitors close to VTT_DDR termination resistors.
One decoupling capacitor for each R-pack.
+
CT10
1000u_6.3V
CB154
0.1u_0402
CB158
0.1u_0402
CB162
0.1u_0402
CB166
0.1u_0402
CB170
0.1u_0402
CB174
0.1u_0402
CB178
0.1u_0402
CB182
0.1u_0402
CB186
0.1u_0402
CB190
0.1u_0402
CB194
0.1u_0402
CB197
0.1u_0402
For Ch_B DIMM1 For Ch_B DIMM2
3
2
CB151
0.1u_0402
CB155
0.1u_0402
CB159
0.1u_0402
MCKE_B0{18}
MCKE_B1{18}
MCS_B#0{18}
MCS_B#1{18}
MCS_B#2{18}
MCS_B#3{18}
MRAS_B#{18}
MCAS_B#{18}
MWE_B#{18}
MDQS_B[0..7]{7,18}
MDQM_B[0..7]{7,18}
MDQ_B[0..63]{7,18}
MA_B[0..15]{7}
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
DDR Terminational Resisitors
(MS-6766)
MCKE_B0
MCKE_B1
MCS_B#0
MCS_B#1
MCS_B#2
MCS_B#3
MRAS_B#
MCAS_B#
MWE_B#
1
19 31Wednesday, March 12, 2003
of
0A
Page 20
5
4
3
2
1
PRIMARY IDE BLOCK
IDE1
HD_RST#{27}
D D
HD_RST#
PD_DREQ{11}
PD_IORDY{11}
IRQ14{11}
R422 0
P_DD7
P_DD6
P_DD5
P_DD4
P_DD3
P_DD2
P_DD1
P_DD0
R424 82_0402
PDIOW#
PDIOR#
R426 82_0402
PDDACK#
R430 82_0402
PDA0
PDA1
PDCS#1
HDRST#P
PDDREQ
PDIORDY
IRQ_14
IDEACTP#{26}
R432
8.2K
R434
R433
5.6K
10K
C C
B B
A A
5
PDD[0..15]{11}
SDD[0..15]{11}
PDD6
PDD8
PDD7
PDD4
PDD0
PDD2
PDD12
PDD11
PDD3
PDD10
PDD5
PDD9
PD_IOW#{11}
PD_A0{11}
PD_A2{11}
PD_CS#3{11}
PD_CS#1{11}
PD_A1{11}
PD_DACK#{11}
PD_IOR#{11}
SD_A1{11}
SD_CS#3{11}
SD_IOW#{11}
SD_IOR#{11}
SD_DACK#{11}
SD_A0{11}
SD_A2{11}
SD_CS#1{11}
SD_DREQ{11}
SD_IORDY{11}
IRQ15{11}
PD_IOW#
PDD14
PDD1
PDD13
SDD7
SDD9
SDD8
SDD10
SDD3
SDD12
SDD2
SDD13
SDD6
SDD5
SDD11
SDD4
SDD1
SDD0
SDD14
SDD15
SD_DREQ
SD_IORDY SDIORDY
IRQ15 IRQ_15
YJ220-CB-1
1
R435
4.7K
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
2
12
1615
22
24
26
28
30
32
34
36
38
4039
P_DD8
P_DD9
P_DD10
P_DD11
P_DD12
P_DD13
P_DD14
P_DD15
R427 470
PDA2
PDCS#3
C274
47000p
R436
15K
ATADET0 {11}
VCC3 VCC3
RN42
33_8P4R
RN43
33_8P4R
RN44
33_8P4R
RN45
33_8P4R
RN46
33_8P4R
RN47
33_8P4R
RN48
33_8P4R
RN49
33_8P4R
RN50
33_8P4R
RN51
33_8P4R
RN53
33_8P4R
RN52
82_8P4R
P_DD6
P_DD8
P_DD7
P_DD4
P_DD0
P_DD2
P_DD12
P_DD11
P_DD3
P_DD10
P_DD5
P_DD9
PDIOW#
P_DD14
P_DD1
P_DD13
PDA0
PDA2
PDCS#3
PDCS#1
PDA1
PDDACK#
PDIOR#
P_DD15PDD15
S_DD7
S_DD9
S_DD8
S_DD10
S_DD3
S_DD12
S_DD2
S_DD13
S_DD6
S_DD5
S_DD11
S_DD4
S_DD1
S_DD0
S_DD14
S_DD15
SDA1
SDCS#3
SDIOW#
SDIOR#
SDDACK#
SDA0
SDA2
SDCS#1
SDDREQ
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R425 33_0402
R428 33_0402
R431 33_0402
R128 33_0402
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
4
SECONDARY IDE BLOCK
3
IDEACTS#{26}
1
2
3
1
2
3
VCC5
MH2
MH6
(NPTH)
4
(NPTH)
4
IDE2
R440
4.7K
YJ220-CB-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
2
12
1615
22
24
26
28
30
32
34
36
38
4039
S_DD8
S_DD9
S_DD10
S_DD11
S_DD12
S_DD13
S_DD14
S_DD15
R429 470
SDA2
SDCS#3
C275
47000p
R441
15K
ATADET1 {11}
HD_RST#
R423 0
S_DD7
S_DD6
S_DD5
S_DD4
S_DD3
S_DD2
S_DD1
S_DD0
SDDREQ
SDIOW#
SDIOR#
SDIORDY
SDDACK#
IRQ_15
SDA0
SDA1
SDCS#1
R437
8.2K
HDRST#S
R438
10K
R439
5.6K
Mounting Holes
5
6
7
8
9
5
6
7
8
9
MH3
1
5
2
6
(NPTH)
3
7
4
8
9
MH7
1
5
2
6
(NPTH)
3
7
4
8
9
MH4
1
2
3
1
2
3
MH8
(NPTH)
4
(NPTH)
4
5
6
7
8
9
5
6
7
8
9
MH1
1
5
2
6
(NPTH)
3
7
4
8
9
MH5
1
5
2
6
(NPTH)
3
7
4
8
9
Optics Orientation HolesSimulation
SIM1
SIM2
J1
J2
2
LP1 LP2 LP3 LP5
LP6 LP7
FM1
LP8
FM2
FM6
MSI
Title
Size Document Number Rev
Date: Sheet
LP4
LP10LP9
FM3
FM4
FM7 FM8FM5
MICRO-STAR INt'L CO., LTD.
IDE CONNECTORS
(MS-6766)
1
20 31Wednesday, March 12, 2003
0A
of
Page 21
8
7
6
5
4
3
2
1
PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY)
VCC5
-12V
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI2
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
YSLOT120
TRST#
+12V
TMS
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
C/BE#0
+3.3V
GND
+5V(I/O)
REQ64#
TDI
+5V
+5V
AD9
AD6
AD4
AD2
AD0
+5V
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
TRST#
TMS
TDI
PIRQ#B
PIRQ#D
VCC5
VCC3
VCC3_SBVCC3_SB VCC3_SB
PCIRST#1
PGNT#1 {10}
PCI_PME#
AD30
AD28
AD26
AD24
R446 300
ID2
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ#64
PREQ#3
PCI_CLK2{10}
AD26
-12V
PCI1
B1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
YSLOT120
TCK
PCI_CLK0{10}
PREQ#0{10}
DEVSEL#{10,24,25}
VCC5
PIRQ#B
PIRQ#D
AD31{10,25}
AD29{10,25}
AD27{10,25}
AD25{10,25}
C_BE#3{25}
AD23{10,24,25}
AD21{10,24,25}
AD19{10,24,25}
AD17{10,24,25}
C_BE#2{25}
IRDY#{10,25}
PERR#{10,25}
SERR#{10,25}
C_BE#1{25}
AD14{10,24,25}
AD12{10,24,25}
AD10{10,24,25}
VCC3 VCC3
LOCK#
AD8{10,24,25}
AD7{10,24,25}
AD5{10,24,25}
AD3{10,24,25}
AD1{10,24,25}
ACK#64
D D
C C
B B
TRST#
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
IDSEL
FRAME#
TRDY#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
+12V
TMS
GND
GND
RST#
GNT#
GND
AD30
+3.3V
AD28
AD26
GND
AD24
AD22
AD20
GND
AD18
AD16
+3.3V
GND
GND
+3.3V
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
+3.3V
GND
TDI
+5V
+5V
+3.3
AD9
AD6
AD4
AD2
AD0
+5V
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
VCC3
TRST#
TMS
TDI
PIRQ#A
PIRQ#C
PCIRST#1
ID1
R448 300
VCC5
PCIRST#1 {25,27}
PGNT#0 {10}
PCI_PME# {11,22,25}
AD30 {10,25}
AD28 {10,25}
AD26 {10,25}
AD24 {10,25}
AD25
AD22 {10,24,25}
AD20 {10,24,25}
AD18 {10,24,25}
AD16 {10,24,25}
FRAME# {10,25}
TRDY# {10,24,25}
STOP# {10,25}
SDONE
SBO#
PAR {10,25}
AD15 {10,24,25}
AD13 {10,24,25}
AD11 {10,24,25}
AD9 {10,24,25}
C_BE#0 {25}
AD6 {10,24,25}
AD4 {10,24,25}
AD2 {10,24,25}
AD0 {10,24,25}
REQ#64
TCK
PIRQ#C
PIRQ#A
PCI_CLK1{10}
PREQ#1{10}
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
LOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK#64
PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V
PCI3
B1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
YSLOT120
PREQ#2{10}
TCK
VCC5
PIRQ#D
PIRQ#B
R444 X_0
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
LOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK#64
VCC3
TRST#
+12V
TMS
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE#0
+3.3V
AD6
AD4
GND
AD2
AD0
+5V(I/O)
REQ64#
TDI
+5V
+5V
+5V
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
VCC3
VCC5
R445
TRST#
TMS
TDI
PIRQ#C
PIRQ#A
PCIRST#1
PCI_PME#
AD30
AD28
AD26
AD24
ID3
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ#64
PGNT#3 {10}
X_0
PGNT#2 {10}
R447 300
AD27
IDSEL = AD25 IDSEL = AD26
IDSEL = AD27
MASTER = PREQ#2MASTER = PREQ#1MASTER = PREQ#0
PIRQ#A PIRQ#B PIRQ#C
PCI PULL-UP / DOWN RESISTORS
R451 4.7K
ACK#64
R453 4.7K
TMS
R455 X_4.7K
TDI
R456 X_4.7K
TCK
R457 X_4.7K
TRST#
R458 X_4.7K
A A
CB219 0.1u
CB222 0.1u
CB223 0.1u
CB224 0.1u
8
VCC3
PREQ#3{10}
PREQ#4{10,25}
VCC3VCC5
FRAME#REQ#64
IRDY#
TRDY#
DEVSEL#
PREQ#2
PREQ#0
PREQ#1
PREQ#3
PREQ#4
STOP#
LOCK#
PERR#
SERR#
7
R449 2.7K
12
VCC3 VCC3
34
RN55
56
2.7K_8P4R
78
12
VCC3
34
RN56
56
2.7K_8P4R
78
12
VCC3
34
RN57
56
2.7K_8P4R
78
6
SDONE
SBO#
PIRQ#D{10,25}
PIRQ#C{10}
PIRQ#A{6,10,22}
PIRQ#B{10,22}
PCI_CLK0
PCI_CLK1
PCI_CLK2
R459 X_0
R460 X_0
PIRQ#D
PIRQ#C
PIRQ#A
PIRQ#B
R450 X_100 C276 X_100p
R452 X_100 C277 X_100p
78
56
34
12
C278 X_100pR454 X_100
Place close to PCI slot
SMBCLK {11,22}
Non-pop R459,R460 for non-PCI3.3
SMBDATA {11,22}
5
RN54
2.7K_8P4R
4
VCC5
+
CT11
X_470u-16V
CB199
0.1u
CB203
0.1u
CB207
0.1u
CB211
0.1u
CB213
0.1u
CB215
X_0.1u
CB217
X_0.1u
CB220
0.1u
PCI SLOT DECOUPLING CAPACITORS
VCC3
+
3
CT14
X_1000u_6.3V
CB204
0.1u
CB208
0.1u
CB212
0.1u
CB214
0.1u
CB216
X_0.1u
CB218
0.1u
CB221
X_0.1u
-12V
CB202
X_0.1u
MSI
Title
Size Document Number Rev
Date: Sheet
+12V
MICRO-STAR INt'L CO., LTD.
2
VCC3_SB
CB200
0.1u
CB205
X_0.1u
PCI 1& 2 & 3 Slots
(MS-6766)
CB201
0.1u
CB206
0.1u
CB210
X_0.1u
0A
21 31Wednesday, March 12, 2003
of
1
Page 22
8
AGP 1.5V 1X/2X/4X/8X SLOT(AGP VER:3.0)
VCC5 = 60mils trace / 15 mils space
CHECK PART NUMBER
VCC5
D D
C C
B B
PIRQ#B{10,21}
AGP_CLK{16}
GREQ#{6}
ST0{6}
ST2{6}
RBF#{6}
AGP_DBI_LO{6}
SBA0{6}
SBA2{6}
SB_STB{6}
SBA4{6}
SBA6{6}
GAD31{6}
GAD29{6}
GAD27{6}
GAD25{6}
AD_STB1{6}
GAD23{6}
GAD21{6}
GAD19{6}
GAD17{6}
GC_BE#2{6}
GIRDY#{6}
GDEVSEL#{6}
VCC_AGP
GC_BE#1{6}
GAD14{6}
GAD12{6}
GAD10{6}
GAD8{6}
AD_STB0{6}
GAD7{6}
GAD5{6}
GAD3{6}
GAD1{6}
AGP_REF{6}
AGP_CLK
R470 0
VCC3_SB
R475 0
VCC_AGP
R260 8.2K
GSERR#
R481 0
AGP_REF
VCC3
C284
0.1u
SBSTB
ADSTB1
ADSTB0
7
AGP1
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
CLK
B8
-REQ
B9
3.3V
B10
ST0
B11
ST2
B12
-RBF
B13
GND
B14
RESERVED
B15
SBA0
B16
3.3V
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
RSVD/KEY
B23
GND/KEY
B24
AUX3V/KEY
B25
3.3V/KEY
B26
AD31
B27
AD29
B28
3.3V
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/-BE2
B40
VDDQ
B41
-IRDY
B42
AUX3V/KEY
B43
GND/KEY
B44
RSVD/KEY
B45
3.3V/KEY
B46
-DEVSEL
B47
VDDQ
B48
-PERR
B49
GND
B50
-SERR
B51
C/-BE1
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
AGP Slot-D124 _1.5V
PIRQ#A / PIRQ#B
-TYPEDET
RESERVED
USB-
GND
-INTA
-RST
-GNT
3.3V
RESERVED
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
-SB_STB
GND
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30
AD28
3.3V
AD26
AD24
GND
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC
12V
ST1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
6
+12V
AGP8X_DET#
VCC3
R471 0
SBSTB#
R476 0
ADSTB#1
VCC_AGP
R482 0
ADSTB#0
5
AGP Slot Imax
VCCq 8.0A
VCC3 6.0A
VCC12 1.0A
VCC5 2.0A
VCC3_SB 0.75A
AGP8X_DET# {6}
PIRQ#A {10,21} PWM_CPU{13}
PCIRST#2 {27}
GGNT# {6}
ST1 {6}
AGP_DBI_HI/PIPE# {6}
WBF# {6}
SBA1 {6}
SBA3 {6}
SB_STB# {6}
SBA5 {6}
SBA7 {6}
GAD30 {6}
GAD28 {6}
GAD26 {6,12}
GAD24 {6}
AD_STB#1 {6}
GC_BE#3 {6}
GAD22 {6}
GAD20 {6}
GAD18 {6}
GAD16 {6}
GFRAME# {6}
GTRDY# {6}
GSTOP# {6}
PCI_PME# {11,21,25}
GPAR {6}
GAD15 {6}
GAD13 {6}
GAD11 {6}
GAD9 {6}
GC_BE#0 {6}
AD_STB#0 {6}
GAD6 {6}
GAD4 {6}
GAD2 {6}
GAD0 {6}
4
CPU FAN
R466 510
REAR FAN
PWM_REAR{13}
R474 510
G
G
3
33pC279
R463 2.2K
R465 10K
DS
Q11
2N7002S
33pC281
R469 2.2K
R473 10K
DS
Q13
2N7002S
+12V
R461 4.7K
DZ1
1N5817
Q10
SI2303DS-S-SOT23
CT15 10u_16V
+12V
R467 4.7K
DZ2
1N5817
Q12
SI2303DS-S-SOT23
CT16 10u_16V
2
R462 27K
R464
10K
X_33pC280
3
CPU_FAN1
2
D1x3-WH-SN
1
+
+
CPU_FAN
R468 27K
X_33pC282
3
REAR_FAN1
2
D1x3-WH-SN
1
REAR_FAN
R472
10K
1
CPU_FAN1 {13}
REAR_FAN1 {13}
RSMRST#
VCC3_SB
PWR_OK1{27}
(22 mS delay)
R477 75K
C283
1u_0805
VCC5
VCC5
R479
X_10K
+12V
R478
X_10K
R480
X_3.3K
R483 X_10K Q15
Q14
X_2N3904S
1
2
3 4
VCC3_SB
U11
NC
5
A
VCC
GND Y
TC7S14F-SSOP5P5
X_2N7002S
Q16
X_2N7002S
U12
1
NC
2
A
VCC
3 4
GND Y
TC7S14F-SSOP5P5
R484
0
R485
0
VCC3_SB
5
SMBCLK {11,21}
SMBCLK_ISO {13,16,17,18,27}
SMBDATA {11,21}
SMBDATA_ISO {13,16,17,18,27}
RSMRST# {11,27}
RS300 Reference Voltage Circuit
R487
5.6K
VCC_AGP
G
Q17
SD
NDS335N
R490 1.47K
AGP_CLK
R488
3.32K
AGP_REF
R491
1.02K
6
R489
X_100
CB235
X_0
5
VCC_AGP
A A
AGP8X_DET#
AGP_4X_8X_SEL:
AGP8X_DET#:L(3.0) =AGP_REF:0.35V
AGP8X_DET#:H(2.0) =AGP_REF:0.75V
8
AGP_4X_8X_SEL{6}
AGP_4X_8X_SEL
VCC5
Q18
G
NDS335N
SD
If 1 = 4X.
If 0 = 8X.
Place close to AGP1
7
AGP SLOT DECOUPLING CAPACITORS
VCC3_SB VCC_AGP
CB225
0.1u
CB227
0.1u
+12V
CB233
0.1u
4
CB228
0.1u
CB230
0.1u
CB232
0.1u
CB234
0.1u
CB236
0.1u
VCC3
CB226
0.1u
CB229
0.1u
CB231
0.1u
3
Title
Size Document Number Rev
Date: Sheet
AGP TERMINATION RESISTOR S
R486 8.2K
GSERR#
LESS 10MILS STUB TRACE LENGTH MUST BE FOLLOWING.
Place these resistors between PCI and AGP slot
MSI
MICRO-STAR INt'L CO., LTD.
AGP 1.5V SLOT & FAN CONNECTORS
(MS-6766)
2
VCC_AGP
22 31Wednesday, March 12, 2003
of
1
0A
Page 23
E
D
C
B
A
POWER CIRCUIT FOR USB PORT 0,1 POWER CIRCUIT FOR USB PORT 2,3
SVCC1
USB_STR USB_STR
4 4
FS3
1.5A-MINISMDC150
OC#1{11} OC#2{10,11} OC#3{10}
C290
0.1u
R492
27K
R497
51K
C285
470p
C286
1000p
R495
1K_1%
FS4
1.5A-MINISMDC150
C291
0.1u
CP26 X_COPPER
R493
27K
R498
51K
FRONT USB CONNECTORNEAR USB CONNECTOR
C287
470p
SVCC2
R496
1K_1%
POWER CIRCUIT FOR USB PORT 4,5
USB_STR
FS5
1.5A-MINISMDC150
C292
0.1u
R494
27K
R499
51K
C288
470p
SVCC3
FRONT USB CONNECTOR
R213
1K_1%
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
SVCC2
+
CT18
L15
1
3 3
USB3-{11}
USB3+{11}
USB2-{11}
USB2+{11}
8
2
7
3
6
4
5
X_90ohm_0603
NEAR USB CONNECTOR
RN58 0_8P4R
12
34
56
78
246
8
CN8
X_47p
135
7
1000u_10V_8X
SBD2SBD2+
SBD3SBD3+
I1394_USB1A
5
6
7
8
UP
1
2
3
4
DOWN
I1394+USBx2-D20-BK
C444 104P
15
16
17
18
19
20
21
22
USB4+{11}
USB4-{11}
USB5+{11}
USB5-{11}
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
L16
1
8
2
7
3
6
4
5
X_90ohm_0603
NEAR USB CONNECTOR
12
34
56
78
RN59 0_8P4R
SBD4+
SBD4SBD5+
SBD5-
SBD4SBD4+
JUSB1
12
34
56
78
10
CON2X5-1_Y
COLOR OF WHITE
P/N : N31-2051121-H06
SVCC3
R500
X_0
+
SBD5SBD5+
CT19
1000u-10V
OC#2 {10,11}
2 2
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
USB_STR
SVCC1
C201
FB37 0
L27
USB1-{11}
USB1+{11}
USB0-{11}
USB0+{11}
1 1
CP14 X_COPPER
E
FB38 0
X_CMC_90ohm_0603
FB39 0
L28
FB40 0
X_CMC_90ohm_0603
NEAR USB CONNECTOR
4 3
1 2
4 3
1 2
D
SBD1SBD1+
SBD0SBD0+
+
CT20
1000u_10V_8X
LAN_USB1A
5
6
7
8
UP
1
2
3
4
DOWN
RJ45+USB+LEDx2-D20-BK
For EMI 031003
21
22
23
24
25
26
27
28
C
0.1u
C202
0.1u
MSI
Title
Size Document Number Rev
B
Date: Sheet
MICRO-STAR INt'L CO., LTD.
23 USB CONNECTORS
(MS-6766)
23 31Wednesday, March 12, 2003
A
of
0A
Page 24
8
7
6
5
4
3
2
1
MII PHY LAN AC101L
VDD33
VDD33
R506 4.7K
PHY_PD
R507 X_4.7K
1 2
3 4
5 6
7 8
RN61
4.7K_8P4R
R520 10K
R521 10K
R522 10K
R523 4.7K
R524 10K
Q19
X_2N3904S
VDD33
R526
10K
PHY_PD#
SB_EECS{11}
SB_EECLK{11,12}
SB_EEDO{11,12}
SB_EEDI{11}
VDD33
+
EC60
10u-16V
VDD33
25M_X1
1
2
R531 X_0
1- RX & TX pairs should be 100-ohm
differential impedance. Route
2.5_DUAL
equal length and symmetrically.
Separate RX & TX pairs.
R502
R503
49.9RST
33pC304
33pC305
R504
49.9RST
2.5_DUAL
49.9RST
PHYAD0
R510 10K
R511 10K
R512 4.7K
R514 X_4.7K
R516 4.7K
R518 4.7K
R519 4.7K
R525
1M
R505
49.9RST
TX+
TX-
RX+
RX-
PHY_PD{11}
+
EC59
10u-16V
U14
42
RSTB
24
PWRDN
9
TX_XLK/10TCLK
10
TX_EN/10TXEN
8
TXER/TXD4
11
TXD0/10TD
12
TXD1
13
TXD2
14
TXD3
4
RX_CLK/10RXCLK
3
RX_DV/CRSDV
48
RXD0/PHYAD4
47
RXD1/PHYAD3
46
RXD2/PHYAD2
45
RXD3/PHYAD1
5
RXERMDC
44
MDC
43
MDIO
16
CRS/REPEATER
15
COL
VDD33
413617182532
VCC2.5V
VCC2.5V
VCC33 IN
VCC25_OUT
GND
GND
GND
GND
261729303337
2.5_DUAL
VCCPLL
VCC2.5V
VCC2.5V
ANEN/LED3
DUPLEX/LED2
SPD100/LED1
BRUNIN#/LED0
PHYAD0/INTR
XO_XTLOUT
GND
GND
GND
GND
38
C296
0.1u
SD/FXEN
XI_XTLIN
TXOP
TXON
RXIP
RXIN
RBIAD
AC101L
35
34
27
26
28
31
23
22
21
20
19
40
25MHz
+-30PPM
39
10/100SEL
LOW_ACT
25M_X1
Y1
32pF
25M_X2
D D
C295
0.1u
PHY_RST#{11}
MII_TXCLK{11}
MII_TXEN{11}
MII_TXD0{11}
MII_TXD1{11}
MII_TXD2{11}
MII_TXD3{11}
MII_RXCLK{11}
MII_RXDV{11}
C C
MII_RXEER{11}
MII_MDCK{11}
MII_MDIO{11}
MII_MCRS{11}
MII_MCOL{11}
MII_RXD3{11}
MII_RXD2{11}
MII_RXD1{11}
MII_RXD0{11}
PHY_PD#
R508 22
R509 10K
R517 22
MII_RXEER
MII_MDCK
MII_MDIO
MII_MCRS
MII_MCOL
1 2
3 4
5 6
7 8
RN62 22_8P4R
MII_RXCK
MII_RXDV
PHYAD4
PHYAD3
PHYAD2
PHYAD1
PHYAD1
PHYAD2
PHYAD3
PHYAD4
PHYAD0
PHYAD1
PHYAD2
PHYAD3
PHYAD4
MII_RXCK
MII_RXDV
MII_RXEER
MII_MCRS
MII_MCOL
R501
X_5.6KST
2.5_DUAL
C299
0.1u
C306
0.1u
53
U16
NC7WZ08
LAN EEPROM
U13
1
CS
2
3
4
CP15 X_COPPER
4
VCC
SK
DI
DO
GND
AT93C66-10SC-2.7
C300
0.1u
R527 22
NC
NC
C301
0.1u
8
7
R688 4.7K
6
5
VCC3_SB
C302
0.1u
EXT_25M
VDD33
C298
0.1u
EXT_25M {11}
XBus ROM BLOCK
AD[0..31]{10,21,25}
B B
DEVSEL#{10,21,25}
C_CBE#1{10}
RJ45 Connector
C_CBE#0{10}
VDD33
R532 330
VDD33
C311
A A
8
12p
R533 330
X_1000pC312
For ESD
7
LED_PWR
LOW_ACT
RX-
RX+
TXTX+
10/100SEL
C445
X_102p
For EMI(022703)
6
C446
X_102p
LAN_USB1B
AMBER+
17
AMBER-
18
9
13
10
14
11
15
12
16
19
20
RJ45+USB+LEDx2-D20-BK
GREEN+
GREEN-
RDN
RDP
TDN
TDP
NC
NC
NC
NC
Interface MODE Selection
HIGH
Programmer mode
LOW
LPC mode
5
4
3
DEVSEL#
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Default
U15
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
1
A18
PGM#
PLCC32-SMT
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MII LAN AC101L & LPC Flash EEPROM
2
VCC
GND
CE#
OE#
D0
D1
D2
D3
D4
D5
D6
D7
AD16
13
AD17
14
AD18
15
AD19
17
AD20
18
AD21
19
AD22
20
AD23
21
32
16
ROM_CS#
22
TRDY#
24
31
(MS-6766)
VCC3
R528
X_0
C307
0.1u
ROM_CS# {10}
TRDY# {10,21,25}
C_CBE#2 {10}
VCC5
24 31Wednesday, March 12, 2003
1
R529
0
of
0A
Page 25
5
4
3
2
1
IEEE-1394
P3VA
BUS_PWR
BUS_PWR
+
D D
C C
B B
A A
EC62
10u_35V
VCC3
R547
54.9_1%
BUS_PWR 1394_VCC2
TPBIAS2
R538
54.9_1%
BRS340-S
C320
1000p
C326
C327
0.1u
0.1u
TPBIAS1
R548
54.9_1%
R550
4.99K_1%
C337
270p
Place close to pin 97
(Less then 500 mils)
FS6
1.5A_miniSMDM150/24
R539
54.9_1%
R540
4.99K_1%
Place close to pin 111
(Less then 500 mils)
C332
270p
R541
54.9_1%
R542
54.9_1%
5
D17
R551
54.9_1%
R552
54.9_1%
C328
0.1u
+12V
12
C329
0.1u
C336
1u
TPA1+
TPA1TPB1+
TPB1-
(T/S/S=7/10/10)
C331
1u
TPA2+
TPA2-
TPB2+
TPB2-
(T/S/S=7/10/10)
C314
C315
0.1u
0.1u
NEAR EACH POWER PIN
C321
C330
0.1u
0.1u
REAR 1394 PORT 1
+12V
D18
BRS340-S
FRONT 1394 PORT 1
C316
0.1u
C322
0.1u
TPA1+
TPA1TPB1+
TPB1-
1 2
CB238 0.1u
PTPA1+
PTPA1PTPB1+
PTPB1-
CP27
TPB2+
TPB2-
TPA2- PTPA2-
PTPB2+
1394_VCC2 1394_VCC2
4
+
C317
EC61
0.1u
10u_16V
C324
C323
0.1u
0.1u
L19
8
7
6
5
X_90ohm_0603
RN65 0_8P4R
FS7
1.5A_miniSMDM150/24
L18
8
7
6
5
X_90ohm_0603
RN64 0_8P4R
COLOR OF RED
P/N : N31-2051221-H06
J1394_1
12
34
56
78
10
CON2X5-1_G
support S3 wake-up
C325
+
EC63
X_0.1u
10u_16V
1
2
3
4
12
34
56
78
1
2
3
4
12
34
56
78
PTPA1+
PTPA1PTPB1+
PTPB1-
I1394_USB1B
9
PWR
14
TPA+
13
TPA-
12
TPB+
11
TPB-
10
GND
I1394+USBx2-D20-BK
PTPB2+
PTPB2PTPA2+TPA2+
PTPA2-PTPA2+
PTPB2-
CB237
0.1u
pin19
VCC5
C318
0.1u
C319
1u_0805
pin60
FRAME#{10,21}
IRDY#{10,21}
TRDY#{10,21,24}
DEVSEL#{10,21,24}
STOP#{10,21}
PERR#{10,21}
SERR#{10,21}
PIRQ#D{10,21}
PCIRST#1{21,27}
1394_PCLK{10}
PGNT#4{10}
PCI_PME#{11,21,22}
CP17
1 2
L_VDD
L_VDD
GND
GND
2
5143312514
64
L_VDD
L_VDD
L_VDD
GND
GND
GND
VCC3_SB
VCC3
GND
P_DVDD
GND
GND
12076777880
113
P3VA
VCC3
827973
P_DVDD
P_DVDD
GND
GND
GND
GND
GND
GND
115
9095112
P_AVDD
P_AVDD
P_AVDD
PC2
PC1
PC0
TPB2N
TPB2P
TPA2N
TPA2P
TPBIAS2
TPB1N
TPB1P
TPA1N
TPA1P
TPBIAS1
TPB0N
TPB0P
TPA0N
TPA0P
TPBIAS0
P_RESETB
CPS
GROM_EN
GROM_SCL
GROM_SDA
IC(N)
86
U18
P_AVDD
RI0
RI1
XO
XI
AD29
72
71
PC0
70
RI0
91
RI1
92
107
108
109
110
111
102
103
104
105
97
98
99
100
101
96
88
87
81
93
118
117
116
85
NEC PD72874
R536 1K_1%
C335 0.1u
CP16
R537 9.1K
TPB2TPB2+
TPA2TPA2+
TPBIAS2
TPB1TPB1+
TPA1TPA1+
TPBIAS1
TPB0TPB0+
TPA0TPA0+
TPBIAS0
Y2
24.576MHZ
C333 12p
C334 12p
1 2
R543 390K
R544 100K
GROM_EN
R546 10K
EECK
EEDI
(Disable Port 0)
INT#D
AD[31:0]{10,21,24}
C_BE#[3:0]{21}
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR
NEC 1394
AD[31:0]
C_BE#[3:0]
(MS-6766)
1
BUS_PWR
25 31Wednesday, March 12, 2003
P3VA
VCC3
VCC3_SB
0A
of
VCC5
VCC3
VCC3
75
PIN_EN
74
RSMRST
114
D3CSUP
119
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR{10,21}
PREQ#4{10,21}
PAR
AD29
PCIRST#1
1394_PCLK
PGNT#4
PREQ#4
PIRQ#D
R545 100
R549 0
CP18
1 2
9
10
12
13
15
16
17
18
23
24
26
27
28
29
32
33
47
48
49
50
52
53
55
56
58
59
62
63
65
66
67
68
21
34
45
57
35
36
37
39
40
41
42
44
4
22
5
6
7
8
2
3
CARD_ON
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3
CBE2
CBE1
CBE0
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
SERR
PAR
INTA
IDSEL
PRST
PCLK
GNT
REQ
CLKRUN
PME
1
60
19
L_VDD
L_VDD
PCI_VDD
PCI_VDD
GND
GND
GND
GND
GND
GND
112030384654616983848994106
1394-EEPROM 24C02
VCC3
R553
R554
2.7K
EEDI
EECK
3
2.7K
R555
510
U19
3
A2
2
A1
1
A0
7
WP
5
SDA
6
SCL
24C02
GND
VCC
4
8
Page 26
8
ATX CONNECTOR BUZZER
PSON#{13,27}
VCC5_SB
D D
SLP_S3#{11,27}
Default not mount
R559 0
R560 1K_1%
CB250 0.1u
R561 X_47K
-5V
Q21
X_2N3904S
CB253
0.1u
VCC3
-12V
VCC5
CB249
0.1u
CB254
0.1u
7
C339
1000p
11
12
13
14
15
16
17
18
19
20
ATX1
3.3V
-12V
GND
PSON
GND
GND
GND
-5V
5V
5V
POWER
YPC20
3.3V
3.3V
GND
GND
GND
POK
5VSB
12V
6
1
2
3
4
5V
5
6
5V
7
8
9
10
CB255
0.1u
CB246
0.1u
CB251
0.1u
CB256
0.1u
CB247
0.1u
CB252
0.1u
VCC5_SB
+12V
VCC3
VCC5
VCC3
CB242
0.1u
VCC5
R562
1K_1%
C340
1000p
R749 33
5
CB239 0.1u
VCC5
CB240 X_0.1u
CB241 X_0.1u
CB243 X_0.1u
CB244 X_0.1u
CB248 X_0.1u
4
ALARM{13}
SPKR{11}
R558 2.2KCB245 0.1u
3
Q20
2N3904S
R556 220
R557 220
C338
0.1u
2
VCC5
D19 1N4148S
1
2
BZ1
BUZZER
1
FOR EMI
IDE LED
PWR_OK {27,29}
IDEACTP#{20}
ITP_DBR# {4}
VCC3 VCC3
R563
2.2K
R565 330
2N3906LT1
Q22
HDDLED
R566 330
Q23
2N3906LT1
R564
2.2K
IDEACTS# {20}
Intel Front Panel
JFP1 CON5x2
1
HDD+
3
HDD-
5 6
RESET- PWSW+
7
RESET+
9
NC
CB257
0.1u
PLED
SLED
PWSW-
PWR_LED
2
SUS_LED
4
PWRSW+
PWRBTIN
8
PWR_LED {27}
SUS_LED {27}
R570
10K
R567
330
HDD+
HDDLED
R569 100
RSTBTN#
VCC5
C C
VCC5_SB
C341
1u_0805
R568
1K_1%
PWRBTIN {13}RSTBTN#{27,29}
C346
R572
0
R575
0
R581
2.4K
USB_STR
3
D20
BAT54A-S-SOT23
C347
0.1u
R583
47K
1
R571 100K
6
BOOT1
12
SOFT1
5
UGATE1
4
PHASE1
2
LGATE1
3
PGND1
9
VOUT1
10
VSEN1
8
EN1
15
PG1
7
ISEN1
11
OCSET1
14
VIN
GND
1
5
USB_STR
28
VCC
DDR
13
C344
4.7u_0805
BOOT2
SOFT2
UGATE2
PHASE2
LGATE2
PGND2
VOUT2
VSEN2
EN2
PG2/REF
ISEN2
OCSET2
ISL6225CA
U20
23
17
C348
0.1u
24
25
27
26
20
19
21
16
R582 3K
22
18
R584
47K
C349
1u_0805
R573 0
AGP_PHASE
R576 0
SLP_S3#
AGP_PHASE
4
C353
X_1000p
5VIN
C345
1u_0805
Q25
5
D1
6
D1
4
G1
FDS6984S-SO8
CHOCK3
3
S1
D2
D2
S2G2
AGP_PHASE
7
8
12
3
{Priority}
3.3uH
X_0.01u
EC69
1000u_6.3V
MSI
Title
Size Document Number Rev
Date: Sheet
EC70
X_1000u_6.3V
MICRO-STAR INt'L CO., LTD.
26 ATX,F_ PANEL,DDR&AGP POWER
2
C351
(MS-6766)
VCC_AGP
R577
1.47K_1%
R580
2.1K_1%
26 31Wednesday, March 12, 2003
0A
of
1
2
DDR AND AGP VOLTAGE
+
EC64
470u_10V
EC67
1000u_6.3V
CHOCK1
1.2uH_8A_20%
CHOCK2
4.7uH_10V
+
EC68
470u_10V
5VIN
+
DDR_UG
DDR_LG
EC65
1000u-10V
7
+
EC66
1000u-10V
Q67
FDS4410
4 5
GD
3
S
D
2
S
D
1
S
D
Q68
FDS4410
4 5
GD
3
S
D
2
S
D
1
S
D
6
7
8
6
7
8
5VIN
C343
1u_0805
SLP_S5#{11,27}
DDR_UG
DDR_PHASE
DDR_LG
DDR_PHASE
C352
X_1000p
6
1u_0805
USB_STR
C342
0.1u
B B
A A
CB268
0.1u
R574
1.54K_1%
R579
806_1%
VCC_DDR
VCC_DDR
CB269
0.1u
C350
X_0.01u
8
Page 27
SEL0
H
L
**S5O# pin function(Hi
level = 5V) same as
5VUSB(Hi level = 12V)
5VUSB USE 2 MOSFET
PSON#{13,26}
5VUSB
2 MOSFET
1 MOSFET
R591
10K
C355
X_0.1u
**INPUT 2 AND 3 MUST BE HI
LEVEL WHEN USE OUTPUT 1 AND
2 FOR GPIO FUNCTION
DDR VTT Power
VCC_DDR
+
EC42
1000u_6.3V
VTT_DDR
1.25V/2.9A
VTT_DDR
1000u_6.3V
1000u_6.3V
+
EC75
SEL1
TRI-STATE 3.3VSB
L
FOR 3VSB OR 3VSTR
SETTING BY SEL1
** SETTING 3VSTR THEN VRAM_2.5
BECOME TO 1.25 VREF
VCC_DDR
+
+
D
NIKO-P3055LD-TO252
S
D
S
CT24
EC71
1000u_6.3V
VRAM
3.3VDUALH 2.5V
3.3VSTR
VCC3_SB
R585 X_0
R586
4.7K
CE
Q28
B
2N3904S
PCI_RST#{10}
HD_RST#{20}
PCIRST#2{22}
PCIRST#1{21,25}
SMBDATA_ISO{13,16,17,18,22}
SMBCLK_ISO{13,16,17,18,22}
G
Q32
R187 0
R123
X_0
G
Q33
NIKO-P3055LD-TO252
VRAM_2.5
2.5V
1.25V
SLP_S5#{11,26}
NB_PWRGD{6,29}
RSMRST#{11,22}
PWR_OK1{22}
VRM_GD{11,28,29}
PWR_OK{26,29}
RSTBTN#{26,29}
PWR_LED{26}
SUS_LED{26}
VCC5
VCC5_SB
VCC3
S0Power S5S3
Main
Main
SLP_S3# {11,13,26}
VCC5_SB
VCC3
R600
X_180
R602 33
R605 10K
X_1000p
VCC5_SB
+
R601
200_1%
C361
VCC5
CT26
1000u_6.3V
VCC3_SB Main Standby
VCC5_STR
R599
330
VCC5_SB
VCC3_SB
+
EC72
1000u_6.3V
Standby
Standby
Standby
R592 X_0
R593 X_0
R594 0
R595 0
R596 X_0
R597 330
R598 330
10
11
12
Q35
1 2
S2 G2
8
D2
7
D2
D1
3
S1G1D1
P07D03LV-SO8
{Priority}
0V
0VMEM_STR
VCC3
R587
4.7K
1
DGND
2
PCIRST#/GPIOA
3
HDD_RST#/GPIOA
4
SLOT_RST#/GPIOA
5
DEV_RST#/GPIOA
6
I2C_DATA
7
I2C_CLK
8
BT_DRV
9
BT_SEN
BT_SINK
AGND0
SEL1
C364
C365
0.1u
0.1u
0.47u_X7R_0805
CB274
X_0.1u
4
6
5
VCC3_SB
VCC3_SB
R588
R589
1K
4.7K
48
PLED0
PLED1
PWR_OK
FP_RST#/GPIOB
PWR_OK1/GPIOC
EXTRA_PWGD/GPIOC
VCC
VRAMDRV2
VRAMSEN
VRAMDRV1SSAGND1
1314151617181920212223
C366
C368
1000p
VCC5_SB
R590
10K
3738394041424344454647
U21
SLP_S5#
CHIP_PWGD/GPIOC
VRAM_2.5_DEN
RSM_RST#/GPIOB
CPU_PWGD/GPIOC
VRAM_2.5_DRV
5VSB
SLP_S3#
VRGOOD
1.2V_SEN
24
5V_USB
5VSB_DRV
S5O#/GPIOB/SEL0
5V_DRV
TYPEDET#
VAGP_SEN
VAGP_DRV
AGND2
1.25VREF
9VSB
VCC3
1.2V_DRV
W83302CGRB
1u_0805
SBDRV
36
35
34
33
32
31
30
29
28
27
C2
26
C1
25
VCC3
C363
0.1u
DS
Q34
G
2N7002S
C367
THIS PIN IS OPEN DRAIN OUTPUT
VCC_DDR
D23 X_1N4148S
R761 47K
VREF1_25
C359 1u_0805
C362
0.1u
VCC5
R722
X_4.7K
R607 X_1K
R608
X_10K
C354
2200p
+12V
Q24
2N7002AS
G
NDS351AN-SOT23
R603 110RST
R604 147RST
VCC3
D22
1N5817
VCC5_SB
Place MOSFET
near CPU
VCC_VID
R606 1K_1%
VCC3
R760
2.2K
DRV
DS
1u_0805
CB273
0.1u
VCC_VID
Q27
NDS351S
G
C358
X_1000p
3VDUAL
Q31
G
C360
1.2V/150mA
VCC5_SB
1000u_10V
DS
G
C357
DS
0.1u
Q30
IPD09N03LA-TO252
VCC5
DS
D21
X_1N4148S
+12V
VCC_VID {5}
VID_GD {4,16,28}
CT21
CB270
4.7u_0805
5V DUAL Power
USB_STR
+
CT22
470u_10V
Low RDS ON
+
MOSFET
CT23
470u_10V
700mA@S3
2.5625V???
2_5DUAL
CB272
0.1u
9VSB
3VDUAL POWER TRANSLATOR
VCC3_SB
DRV
SBDRV
NDS351AN-SOT23
4 5
3
2
1
VCC3
Q26
Q29
FDS4410
GD
S
S
S
DS
G
6
D
7
D
8
D
CB271
0.1u
3VDUAL
C356
4.7u-0805
SB +VCC2.5 POWER TRANSLATOR
9VSB VCC3_SB
C432
DS
Q65
2N7002AS
C434
104P
104P
VREF1_25
C433
102P
3
+
2
-
1
4 8
U30A
YLM358S-SOIC8
R751
100RST
G
R750
100RST
SB POWER(VCC_SB) TRANSLATOR
(40mils trace / 20 mils space)
9VSB
VREF1_25
C436
102P
Title
Size Document Number Rev
Date: Sheet
MSI
5
+
-
4 8
U30B
YLM358S-SOIC8
R753
100RST
7
6
MICRO-STAR INt'L CO., LTD.
ACPI (MS-5)
(MS-6766)
R752
100RST
USB_STR
DS
G
Q66
NDS351AN-SOT23
I=800mA
C437
104P
27 31Wednesday, March 12, 2003
C435
104P
+VCC2.5
VCC_SB
0A
of
Page 28
8
VID Pull-Up Resistor
D D
VRM_GD{11,27,29}
R617 1K_1%
VCC3
C C
CHECK THIS! CONNECT TO
BULK CAPACITOR
B B
Q46
2N3904S
VID[0..5]{4,13}
FB
VDIFF
+12VP
R637
5.6K
R638 1K_1%
VID1{4,13}
VID2{4,13}
VID3{4,13}
VID4{4,13}
VID0{4,13}
VID5{4,13}
2N3904S
VID1
VID2
VID3
VID4
VID0
VID5
R618 0
C379 0.1u
R621 X_1K
R624 150K_1%
C381 1u_0805
R627 4.75K_1%
R628 10K_1%CB277 1u_0805
R629 1.5K_1%
VSS_SENSE{4}
VCC_SENSE{4}
Q47
VID0
VID1
VID2
VID3
VID4
VID5
VRMPG
C384
12p
R639 1K_1%
NORTHWOOD/PRESCOTT LOAD LINE SELECTOR
J_VCCP1
A A
VCC5
PRESCOTT_MODE
R644 4.7K
J_VCCP CPU MODE
NORTHWOOD
1-2
PRESCOTT
2-3
8
1
2
3
YJ103
7
+12VP
U23
7
VID0
6
VID1
5
VID2
4
VID3
3
VID4
8
VID12.5
2
PGOOD
27
EN
9
OFS
28
FS
1
OVP
11
REF
10
DAC
13
COMP
12
FB
14
VDIFF
Intersil 6556B
R631 100
R633 0
R635 0
R636 100
VCC3_SB
R609
470_1206
D24
RLZ3.3V
VID_GD {27}
VCC5
RN66
1K_8P4R
1
2
3
4
5
6
7
8
R612 1K_1%
R613 1K_1%
DIS
OFS
FS
REF
DAC
COMP
VCCP
CHECK THIS! CONNECT TO
BULK CAPACITOR
R641 4.7K
7
6
C373
0.1u
26
VCC
GND
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3
PWM4
ISEN4
VSEN
RGND
VCORE_SENSE-
C386
X_0.1u
VCORE_SENSE+
VCC5
Pull-up for 3 phase.
R642 150K_1%
Q48
X_2N7002S
R645 X_150K_1%
VCC5
CB276
1u_0805
17
PWM1
22
ISEN1
23
PWM2
21
ISEN2
20
PWM3
18
ISEN3
19
25
24
15
16
6
+12VP
R619 3K_1%
R623 3K_1%
R626 3K_1%
OFSPRESCOTT_MODE
R610 4.7_0805
12VP2
R643 X_12.1K
Q49
X_2N7002S
R646 2.7K_1%
FB
5
12VP1
14
C371
0.1u
3
1
12VP1
5 9
C377
1u_0805
6
2
U24
2
BOOT
7
PVCC
6
VCC
3
PWM
VDIFF
5
U22A
VCC
BOOT1
PHASE1
GND
PWM1
HIP6602B
U22B
PVCC U_G2
BOOT2
PHASE2
PGND
PWM2
HIP6602B
UGATE
PHASE
LGATEGND
HIP6601B
U_G1
L_G1
L_G2
1
8
54
4
U_G1 UG1
12
BOOT1
11
C372
0.1u
PHASE1
13
L_G1
4
U_G2
BOOT2
10
C378
0.1u
PHASE2
8
L_G2
7
U_G3BOOT3
BOOT3
C385
0.1u
PHASE3
L_G3
+12VP
CB278
0.01u
HEAT SINK
Q50
MOS-HEATSINK
4
CT27
820u_25V
CT28
820u_25V
R611
3.3_0805
R615
0_1206(S/S)
CT29
820u_25V
R616
3.3_0805
R625
0_1206(S/S)
CT30
820u_25V
R630
3.3_0805
R634
0_1206(S/S)
JPW1
3
12V
4
12V
D2x2
Q51
MOS-HEATSINK
3
+12VP_FET
DS
G
DS
LG1
G
Q38
IPD06N03LA-TO252(S/S)
+12VP_FET
DS
UG2
G
DS
G
Q41
IPD06N03LA-TO252(S/S)
+12VP_FET
C382 X_4.7u_1206
C383 1u_0805
DS
UG3
G
DS
G
Q44
IPD06N03LA-TO252(S/S)
1
GND
2
GND
Q52
MOS-HEATSINK
3
C369 X_4.7u_1206
C370 1u_0805
Q37
IPD09N03LA-TO252
DS
G
IPD06N03LA-TO252(S/S)
C375 X_4.7u_1206
C376 1u_0805
Q40
IPD09N03LA-TO252
IPD06N03LA-TO252(S/S)
Q43
IPD09N03LA-TO252
IPD06N03LA-TO252(S/S)
Q39
DS
G
Q42
DS
G
Q45
+12VP
12VP2
C388
1u_0805
2
COIL1 1.1uH_25A
CB275
10u_1206
COIL2 0.9UH_25A_PB
R614
1_1206_0.5W(S/S)
C374
0.01u
COIL3 0.9UH_25A_PB
R622
1_1206_0.5W(S/S)
C380
0.01u
COIL4 0.9UH_25A_PB
R632
1_1206_0.5W(S/S)
C387
0.01u
R640
4.7_0805
C389
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet
2
+12VP
VCCP
VCCP
VCCP
MICRO-STAR INt'L CO., LTD.
VRM 10 - Intersil 6556A
(MS-6766)
VCCP
VCCP
28 31Wednesday, March 12, 2003
1
CT31
1500u_6.3V
CT32
1500u_6.3V
CT33
1500u_6.3V
CT34
1500u_6.3V
CT35
1500u_6.3V
CT36
1500u_6.3V
CT37
1500u_6.3V
CT40
1500u_6.3V
CT42
1500u_6.3V
CT39
1000u_6.3V
CT38
1000u_6.3V
of
1
0A
Page 29
AVSSQ
5
4
3
2
1
RS300 Voltage Supplier
VCC3
D25
BAV99
D D
PLVDD
AVDDQ
AVDD
L20
26/600mA-0805
C395 X_1u_0805
PLLVSS
L21
26/600mA-0805
C398 X_1u_0805
AVSSQ
L22
26/600mA-0805
C402 X_1u_0805
C404 X_1u_0805
AVSSN
VCC1.8_NB
+1.8V@500mA
+2.5V@100mA
D26
BAV99
CB279
0.1u
C396
10u/1206
C390
10u/1206
C403
1u_0805
U25
Q54
MMBT2222ALT
AVSSN
COLLECTORCASE
BASEEMITTER
BCP56
R650 4.99K
R651 3.92K
R655 4.99K
R657 2.32K
1u_0805
24
13
C391
VCC5
FB2_1.8V
FB3_2.5V
VCC5
R654
10K
R647
22
470u_10V
S1
D2
D2
S2G2
EC73
3
7
8
12
VCC5
+
GND_NB
C392
1u_0805
NB_PHASE
{Priority}
+1.5V@3A
CHOCK43.3uH
C399
X_0.01u
VCC_NB
R653
1.5K_1%
R658
1.69K_1%
D27
1N5817
OCSET
NB_PHASE
1000p
22000pC401
C393
U26
11
VCC
1
DRIVE2
2
FB2
15
DRIVE3
16
FB3
13
DRIVE4
14
FB4
5
GND
OCSET
BOOT
UGATE
PHASE
LGATE
PGND
COMP
HIP6521CB
12
7
8
6
10
9
3
FB
4
R649 0
C397 0.1u
R652 0
X_10pC400
R656 46.4K
R648
47K
C394 1u_0805
GND_NB
Q53
5
D1
6
D1
4
G1
FDS6912-SO8
VCC5 VCC5
C C
CP21
1 2
GND_NB
PWR_OK{26,27}
RSTBTN#{26,27}
C408
R673 20K
R677 20K
R681 20K
5
1u_0805
R674
47K
R679
47K
R682
47K
B B
SB_PWRGD IS 50ms
AFTER NB_PWRGD
NB_PWRGD
VRM_GD{11,27,28} NB_PWRGD {6,27}
A A
VCC_NB
R668 22
R669 22
CB280
0.1u
Q60
2N3904S
C409
10u_0805
Q61
2N3904S
C410
10u_0805
Q63
2N3904S
C411
10u_0805
USB_STR
USB_STR
R662 33K
VCC3 VCC3 VCC3
R665
47K
3VDUAL
R670
4.7K
R672
20K
R675
20K
DS
G
VCC_DDR
DS
G
Q59
2N7002S
R676
300
Q62
2N7002S
2N3904S
C405
10u_0805
SB200 POWER GOOD CIRCUIT
3VDUAL 3VDUAL
52
1 6
U27A
NC7WZ14-SC70
RS300 POWER GOOD CIRCUIT
3VDUAL 3VDUAL
52
1 6
U17A
NC7WZ14-SC70
4
R659
10K
Q56
1N4148S
3 4
R680 X_0
D28
FB2_1.8V FB3_2.5V
R663 10K
R666
47K
52
3 4
52
U17B
NC7WZ14-SC70
U27B
NC7WZ14-SC70
R678 1.5K
R671 22
R723
4.7K
SB_PWRGD {11}
NB_PWRGD_3.3V {16}
3
Q57
2N3904S
C406
10u_0805
R660
10K
D29
1N4148S
R664 47K
R667
47K
MSI
Title
Size Document Number Rev
2
Date: Sheet
VCC5
R661
Q58
2N3904S
C407
10u_0805
10K
OCSET
DS
Q55
G
2N7002S
MICRO-STAR INt'L CO., LTD.
RS300 & SB200 PWR GOOD
(MS-6766)
1
29 31Wednesday, March 12, 2003
0A
of
Page 30
IXP 250
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPM0
GPM1
GPM2
GPM3
GPM4
GPM5
GPM6
GPM7
GPIO_EXTRA0
GPIO_EXTRA1
GPIO_EXTRA2
GPIO_EXTRA3
GPIO_EXTRA4
GPIO_EXTRA5
I
I
I
I
I/O
I
I
O
I
I
I/O
I
I
I/O
OD
I
I/O
I/O
FunctionTypeGPIO Pin
CMOS CLEAR
ROM_CS#
USB OC#2
USB OC#3
Unused, Pull-Down
USB OC#3
USB OC#2
32.768KHz output to SIO.
USB OC#1
System Speaker out
Unused
USB OC#1
Password Clear(Active low)
Unused, Pull-Down
Unused, Pull-Down
VRM GD
Unused, Pull-Down
Unused, Pull-Down
1
PCI Config.
DEVICE
PCI Slot 2
PCI Slot 3 PCI_REQ#2 AD27
1394 PIRQD
MCP1 INT Pin
PIRQA
PIRQB
PIRQC
PIRQD
PIRQB
PIRQC
PIRQD
PIRQA
PIRQC
PIRQD
PIRQA
PIRQB
PIRQCLAN
IDSEL
PCI_REQ#0PCI Slot 1
AD25
PCI_GNT#0
PCI_REQ#1 AD26 PCICLK1
PCI_GNT#1
PCI_GNT#2
PCI_REQ#3
AD24
PCI_GNT#3
PCI_REQ#4
AD29
PCI_GNT#4
CLOCKREQ#/GNT#
PCICLK0
PCICLK2
LAN_PCLK
1394_PCLK
DDR DIMM Config.
DEVICE
DIMM 1
DIMM 2
DIMM 3
DIMM 4
A0H
A2H
A4H
A6H
JUMPER SETTING
JBAT1
JAUD1
(1-2)NORMAL (2-3)CLEAR
(5-6)
(9-10)
CLKOUT0/CLKOUT#0
CLKOUT4/CLKOUT#4
CLKOUT9/CLKOUT#9
CLKOUT1/CLKOUT#1
CLKOUT2/CLKOUT#2
CLKOUT6/CLKOUT#6
CLKOUT8/CLKOUT#8
CLKOUT7/CLKOUT#7
CLKOUT3/CLKOUT#3
CLKOUT5/CLKOUT#5
CLKOUT10/CLKOUT#10
CLKOUT11/CLKOUT#11
W/O
FRONT
AUDIO
CLOCKADDRESS
WITH FRONT
AUDIO
SIO
PIN NAME NOTES
GPIO10
GPIO11
GPIO12
A A
GPIO13
GPIO14
GPIO15
GPIO16 UNUSED
GPIO17 UNUSED
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26 UNUSED
GPIO27 OUTPUT
GPIO30 SLP_S3# INPUT S3 state indicator signal
GPIO31
GPIO32 UNUSED
GPIO33
GPIO34
GPIO35
USAGE
MB_ID0
MB_ID1
MB_ID2
MB_ID3
PCI_CLKRUN#
UNUSED
SMBCLK_ISO
SMBDATA_ISO
UNUSED
UNUSED
UNUSED
UNUSED
PS_ON# OUTPUT Connector to Power Supply to turn on Power.
UNUSED
UNUSED
UNUSED
Input/Output
INPUT
INPUT
INPUT
INPUT
INPUT /
OUTPUT
INPUTVID5 Low: VID add 0.0125V , High :by p as s
OUTPUT
OUTPUT
OUTPUT
INPUT
INPU T / OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
MOTHERBOARD ID
MOTHERBOARD ID
MOTHERBOARD ID
MOTHERBOARD ID
SMBUS CLOCK
SMBUS DATA
PCI RESET DEVICE
Signals
PCIRST#1
PCIRST#2
PCI slot 1-3, 1394
AGP slot
LPC_RST# SIO
HD_RST#
Primary, Scondary IDE
Target
JPWD1
Short
OPEN
PASSWORD CLEAR
Normal
CLEAR
PASSWORD
MSI
Title
Size Document Number Rev
1
Date: Sheet
MICRO-STAR INt'L CO., LTD.
General Purpose Spec & JUMPER SETTING
(MS-6766)
30 31Wednesday, March 12, 2003
of
0A
Page 31
8
POWER DELIVERY MAP
7
6
5
4
3
2
1
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
D D
12V POWER
12VP-12V
VRM
VCORE(60A~65A)
Processor Core
Processor Vtt(0.8A)
Processor VID
GMCH Core
GMCH Vtt(1.2A)
GMCH AGP
GMCH HUB & CSA
GMCH Memory 2.5V
2 CHANNEL DDR System Memory 2.5V
2 CHANNEL DDR Vtt 1.25V
2 CHANNEL DDR Vref
ICH VCC_HI
ICH Core
ICH Resume VCC3_SB(288.6mA)
VCC_2.5V
REG
VTT REG
2A
VTT(1.05~1.55)V
1.5V REG
6.6A
VCC_AGP(4.1A)
VCC_AGP(370mA)
VCC_AGP(180mA)
MEM_2.5V REG
19.25A
VCC_DDR(4.8A)
VCC_DDR(6A)
C C
VCC2.5_SB
REG
1.25V VREG
VTT_DDR(1.8A)
Voltage
Divider
VCC_AGP(90mA)
VREF(16µA)
VCC_AGP(900mA)
VCC3_SB
ICH 3.3V(480mA)
ICH 5V(10uA)
XBus BOM 3.3V 67mA
B B
LPC Super I/O 3.3V
6 PORT USB & PS2(MS/KB)USB_STR (4A/S0, S1) (40mA/S3, S5)
N33-1020141-P05(WITH TOWTOUCH HANDLE 13.5)
CPU1_M1
478-FAN
Retention
Module
CPU_Retention
CPU1_M5
A A
SCREW
CPU1_M3
SCREW
CPU1_MB1
BACK PLATE
CPU1_M2
SCREW
CPU1_M4
SCREW
8
PCB
MS-6766-00A
7
U15_X1
SST49LF004-33-4C-NH
COM1
MANUAL PART
JBAT1(1-2)
YJUMPER-MG
JPWD1(1-2)
YJUMPER-MG
JAUD11
YJUMPER-MG
JAUD12
BAT1_X1
+
6
YJUMPER-MG
MSI
Title
Size Document Number Rev
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
POWER DELIVERY MAP & MANUAL PART
(MS-6766)
2
31 31Wednesday, March 12, 2003
of
1
0A
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