5
Title Page
Cover Sheet 1
D D
C C
B B
Block Diagram
PCI Routing & CK 4
Clock Synthesizer & MS1 8
System Memory
DDR Terminations R & C
DDR Damping R & Bypass Cap.
NB VIA K8T400M/VER:0.4 (HT)
K8 Vcore
AGP SLOT 8X
VT8235
PCI Connectors * 6
AD1981b
Serial ATA Controller PDC20375
IDE ATA 66/100 Connectors * 2
1394 Controller NEC72874
INTEL 82540EM G-bit
USB Port
LPC I/O
LPT/COM Port
ACPI Power & Power-Good Circuit
Power OK Sequence (GAL) & Front Panel
Decoupling Cap.
DDR DIMM 1 & 2 9
4
2
3 GPIO SPEC
5,6,7 AMD K8 -> 754 PGA Socket
10
11
12,13,14
15
16
17,18,19
20,21,22
23
24
25
26
27
28
29
30
31
32
33
3
2
Stella II
MS-6761n1 VER:0A ATX
*AMD PGA 754 K8-Processor (DDR 333)
*VIA K8T400M / VT8235 Chipset
(AGP 8X / VLink 8X)
*Winbond 83697HF-VF LPC I/O
*NEC 72874 1394a Controller
*I82540 Giga/100/10 Bit LAN Support
*PDC20375 Serial ATA Controller
*USB 2.0 support (integrated into VT8235)
*AD1981B S/W Audio
*DDR DIMM * 3
*AGP SLOT * 1 ( 8X )
*PCI SLOT * 5
1
A A
Title
Special design for NEC
5
4
3
2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Micro Star Restricted Secret
Cover Sheet
MS-6761N1
Last Revision Date:
Thursday, January 09, 2003
Sheet
1 36
of
1
Rev
0A
5
Block Diagram
4
3
2
1
AMD K8 Socket 754
D D
DDR333
DDR * 2 (DIMM2 )
A
G
AGP 8X /Fast Write
C C
PCI SLOT-3
PCI SLOT-4
PCI SLOT-5
PCI - Slot4
PCI - Slot5
Modem
MS-1
PCI SLOT-1
PCI SLOT-2
W-LAN
TV-Out card
P
S
L
O
T
PCI-33
B B
1394
Front-Port *2 ,
Back-Port *1
1394 Host
Controller
NEC72874
AC97 => S/W Audio
ALC650 / 6 channel
VIA
K8T400M
VT8235
Dual ATA
100/133
IDE Slot
==>ATA66,100,133 *2
SUPER I/O
W83697HF
Serial ATA & IDE
RAID Controller
PDC20375
A A
Serial Port *2
IDE Port *1
5
Giga Bit LAN
Intel-82540
4
Dual USB 1.1 OHCI
/2.0 EHCI 6 Ports
==> Front-Port *4 ,
Back-Port *2
3
Support *1 Blue-Tooth
Connector ( Share
with USB-Port *1 )
2
ROM
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Block Diagram
MS-6761N1
Last Revision Date:
Sheet
1
Thursday, January 09, 2003
2 36
of
Rev
0A
5
4
3
2
1
GPIO FUNCTION
VT8233 GPIO Function Define
PIN NAME
D D
GPO0 (VSUS33)
GPO1/SUSA#(VSUS33)
GPO2/SUSB#(VSUS33)
GPO3/SUSST1#(VSUS33)
GPO4/SUSCLK(VSUS33)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/SLP#
GPO8/GPI8/IPBIN0
GPO9/GPI9/IPBIN1
C C
GPO10/GPI10/IPBRDFR
GPO11/GPI11/IPBRDCK
GPO12/GPI12/IPBOUT0
GPO13/GPI13/IPBOUT1
GPO14/GPI14/IPBTDFR
GPO15/GPI15/IPBTDCK
GPO16/SA16/STRAP
GPO17/SA17/STRAP
GPO18/SA18/STRAP
GPO19/SA19/STRAP
B B
GPO20/GPI20
/ACSDIN2/PCS0#/EI
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/IOR#
GPO23/GPI23/IOW#
GPO24/GPI24/GPIOA
GPO25/GPI25/GPIOC
GPO26/GPI26/SMBDT2
(VSUS33)
GPO27/GPI27/SMBCK2
(VSUS33)
GPO28/GPI28/
APICD0/APICCS#
GPO29/GPI29/
A A
APICD1/APICACK#
GPO30/GPI30/GPIOD
GPO31/GPI31/GPIOE
5
SBGPO0 ( GLAN_EN )
SUSLED ( Power LED )
SUSB#
SUSST#
CTL_PLED1# ( Power LED )
NA (Exteranl Pull up to VCC3)
SBGPO6 ( 1394_EN )
GNT#5
SBGPO8 ->Vcore Setting ( Hi=CPU
Default , Low=Manual )
NA
SVID0
( Vcore Adjusting )
SVID1 ( Vcore Adjusting )
ROMLOCK
SVID2 ( Vcore Adjusting )
SVID3 ( Vcore Adjusting )
SVID4 ( Vcore Adjusting )
LDT Freq Strapping Bit0
LDT Freq Strapping Bit1
LDT Width (Low=8 Bit)
Fast Command (Low=Disable)
NA
(Exteranl Pull down to GND)
NA
(Exteranl Pull down to GND)
NA
NA
DLED1
DLED2
SMBDATA2/Slave SMBUS
SMBCLK2/Slave SMBUS
NA
NA
DLED3
DLED4
PIN NAME Function define Function define
GPI0
GPI1
GPI2/EXTSMI#
GPI3/RING#
GPI4/LID#
GPI5/BATLOW#
GPI6/PME#
GPI7/REQ#5
GPI16/INTRUDER#
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/IORDY
4
(Exteranl Pull up to VBAT) NA
ATADET0=>Detect IDE1 ATA100/66
EXTSMI#
RING#
ATADET1=>Detect IDE2 ATA100/66
(Exteranl Pull up to 3VDUAL)
NA
PCI_PME#
(Exteranl Pull up to 3VDUAL)
NA
(Exteranl Pull up to VBAT)
NA
(Exteranl Pull up to 3VDUAL)
NA
THRM#
(Exteranl Pull up to VCC3) NA
3
PCI Routing
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
Giga-Bit
LAN
1394 INT#D AD25
SETIAL ATA INT#B AD24
MS1
INT#
INT#A
INT#B
INT#C
INT#D
INT#B
INT#C
INT#D
INT#A
INT#C
INT#D
INT#A
INT#B
INT#D
INT#A
INT#B
INT#C
INT#B
INT#C
INT#D
INT#A
INT#C AD26
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
Output From MS1 -> Red Color
IDSEL
AD16
AD17
AD18
AD19
AD21
REQ#/GNT#
PREQ#4
PGNT#4
PREQ#5
PGNT#5
PREQ#6
PGNT#6
PREQ#7
PGNT#7
PREQ#8
PGNT#8
PREQ#1
PGNT#1
PREQ#3
PGNT#3
PREQ#2
PGNT#2
PREQ#0
PGNT#0
CLOCK
Pin 13
Pin 14
PCICLK6
PCICLK7
PCICLK8
Pin 22
Pin 17
Pin 18
Pin 21
Micro Star Restricted Secret
GPIO Spec.
MS-6761N1
Last Revision Date:
Thursday, January 09, 2003
Sheet
3 36
of
1
Rev
0A
5
4
3
2
1
D D
PCI Routing
6
PREQ#6 & PGNT#6
PCI-3
7
PREQ#0 & PGNT#0
0
PREQ#1 & PGNT#1
1
PREQ#2 & PGNT#2
2
SB
PREQ#3 & PGNT#3
3
4
PREQ#4 & PGNT#4
PREQ#5 & PGNT#5
C C
5
Giga-Bit LAN
SATA
1394
PCI-1
MS-1
#1
PREQ#7 & PGNT#7
PREQ#8 & PGNT#8
8
PCI-4
PCI-5
PCI-2
PCI Clock
B B
0
Pin-13
Pin-14
1
Pin-17
2
Pin-18
3
CK
Pin-21
4
Pin-22
5
Pin-23
F
Pin-12
A A
5
10
R_PCICLK4 PCICLK4
R_PCICLK5
R_PCICLK3 PCICLK4
R_PCICLK4
R_PCICLK5
R_PCICLKF
R_SIOPCLK SIOPCLK
22
PCICLK5
22
PCICLK3 R_PCICLK2
22
22
22
PCICLK5
22
PCICLKF
22
4
PCI-4
PCI-5
1394
SATA
MS1_PCLK
LAN
SB
SIO
MS-1
#1
R_PCICLK1
7
8
9
10
X
11
X
3
R_PCICLK2
R_PCICLK3
22
22
22
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
PCICLK1
PCICLK2
PCICLK3
PCI1
PCI2
PCI3
Micro Star Restricted Secret
PCI & MS-1
MS-6761N1
Last Revision Date:
Thursday, January 09, 2003
Sheet
4 36
of
1
Rev
0A
5
4
3
2
1
VREF routed as 40~50 mils trace wide ,
Space>25 mils
C52
104P/25V/Y5V
VREF_DDR_CLAW
D D
VDD_25_SUS
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
MD[63..0] 11
The MEMZN and MEMZP
pins separately
control the NMOS and
PMOS I/O driver
strength. If the
resistance is
increased, the buffer
becomes weaker.
C C
B B
-MDQS[8..0] 11
A A
R104 20RST
R108 20RST
MD[63..0]
DM[8..0] 11
-MDQS[8..0]
102P
MEMZN
MEMZP
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
-MDQS8
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
5
AE13
AG12
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
AH13
AJ13
D14
C14
A16
B15
A12
B11
A17
A15
C13
A11
A10
C11
AC1
AC3
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
A13
AA1
AG1
AH7
A14
AB1
AJ2
AJ8
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
W2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
VTT_SENSE 31
U8B
N12-7540010-A10
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
RSVD_MEMADDA15
RSVD_MEMADDA14
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
RSVD_MEMADDB15
RSVD_MEMADDB14
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
4
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
VTT_DDR_SUS
MCKE0
MCKE1
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
-MSRASA
-MSCASA
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
MCKE0 9,10
MCKE1 9,10
MEMCLK_H7 9,10
MEMCLK_L7 9,10
MEMCLK_H6 9,10
MEMCLK_L6 9,10
MEMCLK_H5 9,10
MEMCLK_L5 9,10
MEMCLK_H4 9,10
MEMCLK_L4 9,10
MEMCLK_H1 9,10
MEMCLK_L1 9,10
MEMCLK_H0 9,10
MEMCLK_L0 9,10
-MCS3 9,10
-MCS2 9,10
-MCS1 9,10
-MCS0 9,10
-MSRASA 9,10
-MSCASA 9,10
-MSWEA 9,10
MEMBANKA1 9,10
MEMBANKA0 9,10
-MSRASB 9,10
-MSCASB 9,10
-MSWEB 9,10
MEMBAKB1 9,10
MEMBAKB0 9,10
MAB[13..0]
MEMCHECK[7..0]
MAA[13..0]
MAA[13..0] 9,10
CLKIP1 12
CLKIN1 12
CLKIP0 12
CLKIN0 12
VLDT0
CTLIP0 12
CTLIN0 12
All signals are point to point except for the unused CTLIN1 pins.
These inputs must be terminated to a logic 1 (true is pulled high and
its complement low with 50ohm1% resistors) for correct operation.
MAB[13..0] 9,10
MEMCHECK[7..0] 11
3
VDD_12_A
CADIP[0..15] 12
CADIN[0..15] 12
VDD_12_A
R63 49.9RST
R60 49.9RST
C161
X_0.22u
CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
C148
0.22u C53
CADIP[0..15]
CADIN[0..15]
CTLIP1
CTLIN1
C199
C150
0.22u
U8A
N12-7540010-A10
D29
VLDT0_A6
D27
VLDT0_A5
D25
VLDT0_A4
C28
VLDT0_A3
C26
VLDT0_A2
B29
VLDT0_A1
B27
VLDT0_A0
T25
L0_CADIN_H15
R25
L0_CADIN_L15
U27
L0_CADIN_H14
U26
L0_CADIN_L14
V25
L0_CADIN_H13
U25
L0_CADIN_L13
W27
L0_CADIN_H12
W26
L0_CADIN_L12
AA27
L0_CADIN_H11
AA26
L0_CADIN_L11
AB25
L0_CADIN_H10
AA25
L0_CADIN_L10
AC27
L0_CADIN_H9
AC26
L0_CADIN_L9
AD25
L0_CADIN_H8
AC25
L0_CADIN_L8
T27
L0_CADIN_H7
T28
L0_CADIN_L7
V29
L0_CADIN_H6
U29
L0_CADIN_L6
V27
L0_CADIN_H5
V28
L0_CADIN_L5
Y29
L0_CADIN_H4
W29
L0_CADIN_L4
AB29
L0_CADIN_H3
AA29
L0_CADIN_L3
AB27
L0_CADIN_H2
AB28
L0_CADIN_L2
AD29
L0_CADIN_H1
AC29
L0_CADIN_L1
AD27
L0_CADIN_H0
AD28
L0_CADIN_L0
Y25
L0_CLKIN_H1
W25
L0_CLKIN_L1
Y27
L0_CLKIN_H0
Y28
L0_CLKIN_L0
R27
L0_CTLIN_H1
R26
L0_CTLIN_L1
T29
L0_CTLIN_H0
R29
L0_CTLIN_L0
Close to CPU
VDD_25_SUS
R37
X_1KRST
R40
X_1KRST
Title
C208
0.22u
0.22u
HYPER TRANSPORT - LINK0
VREF routed as 40~50 mils trace wide ,
Space>25 mils
C55
X_104P
C37
X_104P
C38
X_105P/0805
Micro Star Restricted Secret
K8 DDR & HT
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
C216
0.22u
VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
R57 0
VREF_DDR_CLAW
C54
X_104P
C149
0.22u
AH29
AH27
AG28
AG26
AF29
AE28
AF25
CADOP15
N26
CADON15
N27
CADOP14
L25
CADON14
M25
CADOP13
L26
CADON13
L27
CADOP12
J25
CADON12
K25
CADOP11
G25
CADON11
H25
CADOP10
G26
CADON10
G27
CADOP9
E25
CADON9
F25
CADOP8
E26
CADON8
E27
CADOP7
N29
CADON7
P29
CADOP6
M28
CADON6
M27
CADOP5
L29
CADON5
M29
CADOP4
K28
CADON4
K27
CADOP3
H28
CADON3
H27
CADOP2 CADIP2
G29
CADON2
H29
CADOP1
F28
CADON1
F27
CADOP0
E29
CADON0
F29
CLKOP1
J26
CLKON1
J27
CLKOP0
J29
CLKON0
K29
N25
P25
CTLOP0
P28
CTLON0
P27
MEM_VREF 9
MS-6761N1
Last Revision Date:
Sheet
C200
C158
X_0.22u
X_0.22u
CADOP[0..15]
CADON[0..15]
VLDT0
CLKOP1 12
CLKON1 12
CLKOP0 12
CLKON0 12
CTLOP0 12
CTLON0 12
CADOP[0..15] 12
CADON[0..15] 12
VLDT0 6
C64
4.7u/0805
Wednesday, January 15, 2003
5 36
of
1
Rev
0A
5
4
3
VCCA_PLL trace length from the VR1 to the
PGA must be 0.75".
2
1
Place al filters close to the PGA.
Keep all power and signal trce away from
the VR1.
AMD CPU Thermal Protection Circuit
D D
The COREFB_H and
COREFB_L signals are
routed differentially
to a device such as a
unity gain
differential op-amp
that will shift the
voltage difference to
C C
correspond with the
ground of the digital
to analog converter.
When these two values
have a common ground,
a comparison can be
made that drives the
control logic of the
power supply. This
strategy compensates
for voltage drops
across both the power
and ground planes.
TMP_SPK 32
PS_IN# 32 PS_OUT# 32
VTIN2 29
R24 X_0
THERMDA_CPU
R18 0 C7
U1
1
SIREN#
2
GND
3
PS_OUT#
PS_IN#
4 5
TMP-D+ TMP-D-
X_ATTP1
C5
D0F-ATTP103-A64
X_104P
R1 X_4.32KST
PWROK is a processor
input signal used to
indicate when the
processor can attempt
to lock the internal
PLL
CPU_GD 32
5VSB
8
5VSB
7
VREF
6
C9
X_104P
VLDT0 5
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
C1
X_104P
VLDT0
R13
X_16.2KST
X_104P
R39 0
R64 44.2RST
R61 44.2RST
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
traces to exit ball field) and 500 mils long.
VDDA_25
C70
102P
C36
X_102P
FB1
180nH/1210
VCC2_5
102P
C71
CPU_VDDA_25
C42
X_10u/1206
-CPURST 32
-LDTSTOP 12,17
COREFB_H 15
COREFB_L 15
Differential , "10:10:5:10:10" .
CPUCLK0_H 8
Near CPU in 0.5" .
CPUCLK0_L 8
C50
X_0.22u
L0_REF1
L0_REF0
VDDIO_SENSE 31
C69 3900P/X7R
C72 3900P/X7R
VTT_DDR_SUS
C67
4.7u/0805
CPU_PWROK
VDDIO_SENSE
R62
R56 820
R45 820
HDT Test Port Signal .
VCC2_5
R109
R110
R119
1K
1K
R115
R50
1K
1K
5
1K
R107
1K
R114
1K
R102
1K
R38
1K
R101
1K
R51
1K
Reserved for test
R117
1K
Under normal
operation this
signal should be
pulled up to
VDDIO_RUN through a
680-. resistor.
When entering S3-S5
Sleep states, the
HyperTransport
links must be
deactivated by
driving LDTSTOP_L
signal down to VSS.
-LDTSTOP
PS_ON#A 32
4
PS_ON#A
VCC2_5
R113 1K
R106 1K
R34
R55
1K
1K
VCC2_5
R47
470
Q9
2N7002S
3
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
TDO
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
NC_D18
NC_B19
NC_C19
NC_D20
NC_C21
VDD_25_SUS
R127
1K
R58
1K
B B
A A
Place a cut in the GND plane around the
VCCA_PLL regulator circuit.
C65
C66
3300p
0.22u
U8C
N12-7540010-A10
AH25
VDDA1
AJ25
VDDA2
AF20
RESET_L
AE18
PWROK
AJ27
LDTSTOP_L
AF27
L0_REF1
AE26
L0_REF0
A23
COREFB_H
A24
COREFB_L
B23
CORE_SENSE
AE12
VDDIOFB_H
AF12
VDDIOFB_L
AE11
169RST
R41
1K R36 X
NC_AJ23
NC_AH23
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
NC_AE23
NC_AF23
NC_AF22
NC_AF21
R49
1K
CLKIN_H
CLKIN_L
AJ21
AH21
AJ23
AH23
AE24
AF24
AG15
AH17
AJ28
AE23
AF23
AF22
AF21
AG2
AH1
AE21
C20
AG4
AG6
AE9
AG9
C16
C15
E20
E17
B21
A21
C18
A19
A28
C1
J3
R3
AA2
D3
B18
C6
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY1
KEY0
NC_AE23
NC_AF23
NC_AF22
NC_AF21
FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
VCC2_5
Near SB/VT8235
Q22
VID4
VID3
VID2
VID1
VID0
TDO
2N3904S
THERMTRIP_CPU_L
A20
THERMDA_CPU
A26
THERMDC_CPU
A27
VID4
AG13
VID3
AF14
VID2
AG14
VID1
AF15
VID0
AE15
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
R140 X_0
R142
4.7K
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
FBCLKOUT_H
R65
80.6RST
FBCLKOUT_L
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
VCC2_5
LAYOUT: Route
FBCLKOUT_H/L differentially
with 20/8/5/8/20 spacing and
trace width. ( In CPU
breakout => routed 5:5:5 )
The Hammer family
processors provide a
hardware enforced
thermal protection
mechanism. When
the processor.s die
temperature exceeds a
specified
temperature, the
processor is designed
to protect
itself from over
temperature
conditions by
stopping its internal
clocks and asserting
the
THERMTRIP_L output.
R148
1K
THERMTRIP_L
THERMDA
THERMDC
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
G_FBCLKOUT_H
G_FBCLKOUT_L
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
Micro Star Restricted Secret
K8 HDT & MISC
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
THRMTRIP_EN# 32
THRM# 18,29
This pin is a thermal
alarm output that
will be used to power
down the system and
prevent processor
damage due to
overheating.
VID[4..0] 15
6 36
1
CP20 X_COPPER
of
Rev
0A
5
4
3
2
1
U8E
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
AA10
AE16
W20
AA20
AC20
AE20
AG20
AJ20
AD21
AG21
AG29
AA22
AC22
AG22
AH22
AJ22
AB23
AD23
AG23
W24
AA24
AC24
AG24
AJ24
AD26
AF26
AH26
AB17
AD17
AA18
AC18
AB19
AD19
AF19
VSS9
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
VSS14
AB9
VSS15
VSS16
J12
VSS17
B14
VSS18
Y15
VSS19
VSS20
J18
VSS21
G20
VSS22
R20
VSS23
U20
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
D21
VSS31
F21
VSS32
H21
VSS33
K21
VSS34
M21
VSS35
P21
VSS36
T21
VSS37
V21
VSS38
Y21
VSS39
VSS40
VSS41
B22
VSS42
E22
VSS43
G22
VSS44
J22
VSS45
L22
VSS46
N22
VSS47
R22
VSS48
U22
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
D23
VSS56
F23
VSS57
H23
VSS58
K23
VSS59
P23
VSS60
T23
VSS61
V23
VSS62
Y23
VSS63
VSS64
VSS65
VSS66
E24
VSS67
G24
VSS68
J24
VSS69
N24
VSS70
R24
VSS71
U24
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
B25
VSS78
C25
VSS79
B26
VSS80
D26
VSS81
H26
VSS82
M26
VSS83
T26
VSS84
Y26
VSS85
VSS86
VSS87
VSS88
C27
VSS89
B28
VSS90
D28
VSS91
G28
VSS92
F15
VSS187
H15
VSS188
VSS206
VSS207
B16
VSS208
G18
VSS209
VSS210
VSS211
D19
VSS212
F19
VSS213
H19
VSS214
K19
VSS215
Y19
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
N20
VSS222
GROUND
5
D D
C C
B B
A A
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
N12-7540010-A10
GND GND
VCORE
AC15
AB14
AA15
AB16
AA17
AC17
AE17
AB18
AD18
AG19
AC19
AA19
AB20
AD20
W21
AA21
AC21
AB22
AD22
W23
AA23
AC23
AB24
AD24
AH24
AE25
LAYOUT: Place 1 capacitor every 1-1.5"
VCORE
along VDD_CORE perimiter.
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
N12-7540010-A10
4
VCORE
X_6.8pF C68
GND
LAYOUT: Place 6 EMI caps along bottom right side of Clawhammer,
2 in middle of HT link, and 12 along bottom left side of Claw-hammer.
VCORE VCORE
X_6.8pF/BACK C530
C102
104P/25V/Y5V
{nopop}
X_4.7u/0805 C103
X_6.8pF/BACK C523
C166
104P/25V/Y5V
X_4.7u/0805 C138
VCORE
X_6.8pF/BACK C515
X_6.8pF/BACK C520
C224
104P/25V/Y5V
X_6.8pF/BACK C513
C263
104P/25V/Y5V
GND
LAYOUT: Place beside processor.
{nopop}
X_0.22u C157
X_0.22u C171
In CPU.
C115
C110
224P
224P
C124
C111
224P
224P
3
X_6.8pF/BACK C529
Place between DIMN1 & 2
VDD_25_SUS
C80
104P/25V/Y5V
VDD_25_SUS
X_0.22u C79
U8D
L7
VDD1
VDD2
H18
VDD3
B20
VDD4
E21
VDD5
H22
VDD6
J23
VDD7
H24
VDD8
F26
VDD9
N7
VDD10
L9
VDD11
V10
VDD12
G13
VDD13
K14
VDD14
Y14
VDD15
VDD16
G15
VDD17
J15
VDD18
VDD19
H16
VDD20
K16
VDD21
Y16
VDD22
VDD23
G17
VDD24
J17
VDD25
VDD26
VDD27
VDD28
F18
VDD29
K18
VDD30
Y18
VDD31
VDD32
VDD33
VDD34
E19
VDD35
G19
VDD36
VDD39
VDD38
J19
VDD37
F20
VDD40
H20
VDD41
K20
VDD42
M20
VDD43
P20
VDD44
T20
VDD45
V20
VDD46
Y20
VDD47
VDD48
VDD49
G21
VDD50
J21
VDD51
L21
VDD52
N21
VDD53
R21
VDD54
U21
VDD55
VDD56
VDD57
VDD58
F22
VDD59
K22
VDD60
M22
VDD61
P22
VDD62
T22
VDD63
V22
VDD64
Y22
VDD65
VDD66
VDD67
E23
VDD68
G23
VDD69
L23
VDD70
N23
VDD71
R23
VDD72
U23
VDD73
VDD74
VDD75
VDD76
B24
VDD77
D24
VDD78
F24
VDD79
K24
VDD80
M24
VDD81
P24
VDD82
T24
VDD83
V24
VDD84
Y24
VDD85
VDD86
VDD87
VDD88
VDD89
K26
VDD90
P26
VDD91
V26
VDD92
POWER
EMI
{nopop}
X_6.8pF/BACK C531
C48
X_0.22u
{nopop}
C260
X_0.22u
{nopop}
{nopop}
X_6.8pF/BACK C528
Title
{nopop}
C120
224P
C118
224P
X_6.8pF/BACK C519
X_6.8pF/BACK C521
0.22u C96
4.7u/0805 C114
C123
224P
C121
224P
X_6.8pF/BACK C517
X_6.8pF/BACK C525
GND GND
4.7u/0805 C141
4.7u/0805 C152
C130
C113
224P
224P
C125
C129
224P
224P
X_6.8pF/BACK C533
VDD_25_SUS VTT_DDR_SUS
0.22u C164
X_0.22u C162
0.22u C156
GND
X_6.8pF/BACK C527
X_6.8pF/BACK C524
X_0.22u C87
X_4.7u/0805 C213
C117
224P
C116
224P
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
{nopop}
{nopop}
X_6.8pF/BACK C522
X_6.8pF/BACK C518
{nopop}
X_6.8pF/BACKC516
Micro Star Restricted Secret
K8 POWER & GND
MS-6761N1
Last Revision Date:
Sheet
Rev
Wednesday, January 15, 2003
7 36
of
1
0A
5
VCC3_MS1_D
FRAME#
FRAME# 17,20,21,22,24,26,27
STOP#
STOP# 17,20,21,22,24,26,27
PREQ#0
PREQ#0 17
PGNT#0
PGNT#0 17
PREQ#6
PREQ#6 21
PGNT#6
PGNT#6 21
PREQ#7
PREQ#7 21
D D
VCC3
VCC3
FB5
X_120S/0805
CP17
X_COPPER
C C
PGNT#7 21
PREQ#8 22
PGNT#8 22
FB4
X_120S/0805
CP16
X_COPPER
PGNT#7
PREQ#8
PGNT#8
VCC3_MS1_D
VCC3_MS1_A
MSI PCI-Clock delay about 150pS from
PCI clock-input to PCI clock-output
.
U26
1
FRAME#
2
STOP#
3
SYSREQ#
4
SYSGNT#
5
PCIREQ1#
6
VSS
7
PCIGNT1#
8
PCIREQ2#
9
VCC
10
PCIGNT2#
11
PCIREQ3#
12
PCIGNT3#
13
VC3A
14 15
VC5A VC5B
MS1
B07-00MS102-E18
C450
C462
X_104P
X_104P
C451
104P/25V/Y5V
PGNT#8
PREQ#8
PGNT#6
PREQ#6
PGNT#7
PREQ#7
AVCC
PCICLKI
RESET#
AVSS
VSS
PCLCLK0
PCICLK1
VCC
PCICLK2
PCICLK3
PCICLK4
VSS
VC3B
R419 4.7K
R405 4.7K
PCICLK1
PCICLK2
PCICLK3
28
27
26
25
24
23
22
21
20
19
18
17
16
RN111
8P4R-4.7K
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
CN22
X_8P4C-10P
ICS950403
Strapping CPU
FS0 FS2 FS3
0 0 0 0
FS1
B B
0 0 0
0 0 0
0 0
0 0 0
0 0
0 0
0
***
1
1 1
1 1
1 1 1
1 1
1 1 1
1
1 1
1
1 1
1 1
1 1 1
0 0 0
0 0
0 0
0
0 0
0
1 1 1
1 1 1 1
A A
ModeA ModeB
***
0 0
0 1
1 0
1 1
100.90
1
133.90
168.00
202.00
100.20
133.50
166.70
200.40
150.00
180.00
210.00
240.00
270.00
233.33
0
266.67
300.00
Pin7 Pin8 Pin11
HTTCLK1 HTTCLK2 PCICLK10
HTTCLK1 HTTCLK2 HTTCLK3
PCICLK8 PCICLK9 PCICLK10
PCICLK8 PCICLK9 PCICLK10
5
MHz
HTT
PCI
MHz
67.27 33.63
66.95
67.20
67.33
66.80
66.75
66.68
66.80
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
MHz
33.48
33.60
33.67
33.40
33.38
33.34
33.40
33.00
33.00
35.00
30.00
33.75
33.33
33.33
37.50
4
VCC3_MS1_A
MS1_PCLK
PCIRST2#
R_PCICLK1
R389 33
R_PCICLK2
R390 33
VCC3_MS1_D
R391 33
R387 X_10K
R388 10K
VCC3
For EMI
VCC3
C389 X_104P
VCC3 VCC
C476 X_104P
FB2
X_120S/0805
CP6
X_COPPER
VCC3
C385
C316
104P/25V/Y5V
104P/25V/Y5V
4
PCIRST2# 17,20,21,22
C332
4.7u/0805
FB3 X_120S/0805
CP9
X_COPPER
PCICLK1
PCICLK2
PCICLK3 R_PCICLK3
CLKVDDA
PCICLK1 20
PCICLK2 20
PCICLK3 21
C380
4.7u/0805
C377
X_104P
3
Clock Synthesizer
U18
ICS950403
I11-9504002-I02
CLKVCC3
CLKVCC3
CLKVCC3
CLKVCC3
CLKVCC3
CLKVCC3
CLKVCC3
CLKVCC3
CLKVCC3
CLKVDDA
C372
104P/25V/Y5V
C320 104P/25V/Y5V
C336 104P/25V/Y5V
C350 104P/25V/Y5V
C359 104P/25V/Y5V
C313 104P/25V/Y5V
C335 104P/25V/Y5V
C354 104P/25V/Y5V
C330 104P/25V/Y5V
C373
X_104P
3
46
VDD_46
47
VSS_47
2
VDD_2
5
VSS_5
32
VDDF
33
VSSF
9
VDD_9
10
VSS_10
16
VDD_16
15
VSS_15
19
VDD_19
20
VSS_20
29
VDD_29
30
VSS_30
27
VSS_27
38
VDD_38
39
VSS_39
35
VDD_35
34
VSS_34
43
VDDA
42
VSSA
Only support in ICS950402
CLK_RESET# 32
R_GLAN_PCLK GLAN_PCLK
CLKVCC3
C371
104P/25V/Y5V
ModeB/PCICLK7/HTTCLK
PCICLK8/HTTCLK2
PCICLK9/HTTCLK3
24_48MHZ/SEL
ModeA/HTTCLK0
R280 X_10K
R284 33
FS0/REF0
FS1/REF1
FS2/REF2
XOUT
48MHZ/FS3
PCI33_0
PCI33_1
PCI33_2
PCI33_3
PCI33_F
PCI33_4
PCI33_5
SDATA
SCLK
CPUT_0
CPUC_0
CPUT_1
CPUC_1
PCICLK6
Reset# PCICLK10
"24_48MHZ/SEL" Freq.-Out select pin
=> Low->48MHz , Hi->24MHz .
( Internal pull-up via 100K ohm )
"FS0~FS3" are all internal
pull-up via 100K ohm ..
FS1
48
FS2
45
CLKX1
3
XIN
CLKX2
4
31
HT_66_0
7
HT_66_1
8
HT_66_2
11
R_PCICLK4
13
R_PCICLK5
14
R_1394_PCLK
17
R_SATAPCLK
18
R_PCICLKF
23
R_MS1_PCLK
21
22
SEL_48
28
SMBDATA1
26
SMBCLK1
25
41
40
R_CPU_CLK
37
-R_CPU_CLK
36
-SEL_66
6
24
Mode A ( ICS950403 )
44 12
Mode B ( Set Pin 7,8,11 output
clock -> 33 or 66 MHz )
HT_66_0
SEL_48
R327 10K
FS0
FS2
FS1
FS3
R267 10K
R273 10K
R270 10K
R300 C_10K
FS0
1
2
R262 22
R263 22
R278 22
R303 33
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN81 8P4R-22
R326 22
R314 22
R320 M_22
R321 33
R269 10K
R271 C_10K
GLAN_PCLK 27
CLKVCC3
SB_OSC14
AC_14
APICCLK
C314 10P/X7R
X1 14.318MHZ
C315 10P/X7R
RN78
8P4R-22
SBPCLK
MS1_PCLK
SIOPCLK R_SIOPCLK
R287 15RST
R297 15RST
CLKVCC3
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
1
SB_OSC14 18
AC_14 23
APICCLK 17,19
USBCLK_SB FS3
VCLK
GCLK_NB
GCLK_SLOT
PCICLK4
PCICLK5
1394_PCLK
SATAPCLK
SIO48M
"-SEL_66" Freq.-Out select pin =>
Low->66MHz , Hi->33MHz .
( Internal pull-up via 100K ohm )
USBCLK_SB 19
VCLK 17
GCLK_NB 13
GCLK_SLOT 16
PCICLK4 21
PCICLK5 22
1394_PCLK 26
SATAPCLK 24
SBPCLK 17
SIOPCLK 29
SIO48M 29
SMBDATA1 9,18,27
SMBCLK1 9,18,27
CPUCLK0_H 6
CPUCLK0_L 6
VCLK
GCLK_NB
GCLK_SLOT
GLAN_PCLK
USBCLK_SB
SIO48M
SB_OSC14
APICCLK
AC_14
PCICLK4
PCICLK5
1394_PCLK
SATAPCLK
SBPCLK
MS1_PCLK
SIOPCLK
CPUCLK0_H
CPUCLK0_L
VCC3
Decoupling Cap for CPU Clock
Micro Star Restricted Secret
Clock Synthesizer
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
8 36
1
CN20
7 8
5 6
3 4
1 2
X_8P4C-10P
C352 X_10P
C364 X_10P
C310 X_10P
C325 X_10P
C307 X_10P
CN21
7 8
5 6
3 4
1 2
X_8P4C-10P
C374 X_10P
C363 X_10P
C365 X_10P
Near CK-Gen in 0.5" .
C342 X_5P/X7R
C347 X_5P/X7R
C212 104P/25V/Y5V
Rev
of
0A
5
-MSWEA 5,10
104P/25V/Y5V
C29
DR_MD[63..0]
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEA
C27
X_104P
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
1
9
101
102
DR_MD[63..0] 10,11
D D
C C
B B
VDD_25_SUS
R195 4.7K
DDR_VREF
VREF routed as 40~50
mils trace wide ,
Space>25 mils
Place 104p and 1000p Cap. near the DIMM
Place near the DIMM
VDD_25_SUS
R52
1KRST
A A
R46
1KRST
C32
104P/25V/Y5V
C35
105P/0805/16V
VREF routed as 40~50 mils trace wide ,
Space>25 mils
C14 X_102P
R59 0
DDR_VREF
C24
C23
X_102P
X_104P
5
VDD_25_SUS
738467085
108
VDD0
VDD1
VDD2
VDD3
VDD4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
VREF
NC2
NC3
NC4
VSS0
VSS1
3111826344250586674818993
MEM_VREF 5
120
148
168223054627796
VDD5
VDD6
VDD7
VSS2
VSS3
VSS4
VDD8
VSS5
VDDQ0
VDDQ1
VSS6
VSS7
4
SYSTEM MEMORY
104
112
128
136
143
156
164
172
1801582
184
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
184
DDR DIMM
SOCKET
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
100
116
124
132
DIMM1 SLAVE ADDRESS
= (1010000X)B = A0
4
VDDQ11
VDDQ12
PIN
VSS17
VSS18
139
145
VDDQ13
VDDQ14
VSS19
VSS20
152
160
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
SDA
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC5
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
VSS21
DDR1
176
DDRDIMM_184
N13-1840021-F02
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SA0
SA1
SA2
3
-MCS0
157
158
71
163
5
14
25
36
56
67
78
86
47
103
MAA0
48
MAA1
43
MAA2
41
MAA3
130
MAA4
37
MAA5
32
MAA6
125
MAA7
29
MAA8
122
MAA9
27
MAA10
141
MAA11
118
MAA12 MAB12
115
MAA13
167
59
52
113
SMBCLK1
92
SMBDATA1
91
181
182
183
DR_CHECK0
44
DR_CHECK1
45
DR_CHECK2
49
DR_CHECK3
51
DR_CHECK4
134
DR_CHECK5
135
DR_CHECK6
142
DR_CHECK7
144
MEMCLK_H5
16
MEMCLK_L5
17
MEMCLK_H0
137
MEMCLK_L0
138
MEMCLK_H7
76
MEMCLK_L7
75
173
10
MCKE0
21
MCKE1
111
-MSCASA
65
-MSRASA
154
DR_DM0
97
DR_DM1
107
DR_DM2
119
DR_DM3
129
DR_DM4
149
DR_DM5
159
DR_DM6
169
DR_DM7
177
DR_DM8
140
-MCS1
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
-DR_MDQS8
-MCS0 5,10
-MCS1 5,10
-DR_MDQS0 10,11
-DR_MDQS1 10,11
-DR_MDQS2 10,11
-DR_MDQS3 10,11
-DR_MDQS4 10,11
-DR_MDQS5 10,11
-DR_MDQS6 10,11
-DR_MDQS7 10,11
-DR_MDQS8 10,11
MAA[13..0]
MEMBANKA0 5,10
MEMBANKA1 5,10
SMBCLK1 8,18,27
SMBDATA1 8,18,27
DR_CHECK[7..0]
MEMCLK_H5 5,10
MEMCLK_L5 5,10
MEMCLK_H0 5,10
MEMCLK_L0 5,10
MEMCLK_H7 5,10
MEMCLK_L7 5,10
MCKE0 5,10
MCKE1 5,10
-MSCASA 5,10
-MSRASA 5,10
MAA[13..0] 5,10
DR_CHECK[7..0] 10,11
VDD_25_SUS
DDR_VREF
VREF routed as 40~50
mils trace wide ,
Space>25 mils
-MSWEB 5,10
C43
104P/25V/Y5V
R193 4.7K
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
C30
X_102P
WP2
-MSWEB
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
Place 104p and 1000p Cap. near the DIMM
DR_DM[8..0]
DR_DM[8..0] 10,11
3
2
VDD_25_SUS
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VSS0
VSS1
VSS2
VSS3
VSS4
3111826344250586674818993
DIMM2 SLAVE ADDRESS
= (1010001X)B = A2
Title
104
112
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
DDR DIMM
SOCKET
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
100
Micro Star Restricted Secret
System Memory : DDR DIMM 1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
128
136
VDDQ7
VDDQ8
VDDQ9
184
VSS13
VSS14
VSS15
116
124
143
156
VDDQ10
VDDQ11
VSS16
VSS17
132
139
164
172
VDDQ12
PIN
VSS18
145
152
1801582
VDDQ13
VDDQ14
VDDQ15
CK1#(CK0#)
NC(RESET#)
VSS19
VSS20
VSS21
160
176
184
VDDID
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
MS-6761N1
1
VDDSPD
-MCS2
157
-MCS3
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
-DR_MDQS8
47
MAB[13..0]
103
MAB0
48
A0
MAB1
43
A1
MAB2
41
A2
MAB3
130
A3
MAB4
37
A4
MAB5
32
A5
MAB6
125
A6
MAB7
29
A7
MAB8
122
A8
MAB9
27
A9
MAB10
141
MAB11
118
115
MAB13
167
MEMBAKB0
59
MEMBAKB1
52
113
SMBCLK1
92
SMBDATA1
91
181
182
183
DR_CHECK0
44
DR_CHECK1
45
DR_CHECK2
49
DR_CHECK3
51
DR_CHECK4
134
DR_CHECK5
135
DR_CHECK6
142
DR_CHECK7
144
MEMCLK_H4
16
MEMCLK_L4
17
MEMCLK_H1
137
MEMCLK_L1
138
MEMCLK_H6
76
MEMCLK_L6
75
173
10
MCKE0
21
MCKE1
111
-MSCASB
65
-MSRASB
154
DR_DM0
97
DR_DM1
107
DR_DM2
119
DR_DM3
129
DR_DM4
149
DR_DM5
159
DR_DM6
169
DR_DM7
177
DR_DM8
140
DDR2
DDRDIMM_184
N13-1840021-F02
MEMCLK_H5
Last Revision Date:
Wednesday, January 15, 2003
Sheet
9 36
1
-MCS2 5,10
-MCS3 5,10
MAB[13..0] 5,10
MEMBAKB0 5,10
MEMBAKB1 5,10
VDD_25_SUS
MEMCLK_H4 5,10
MEMCLK_L4 5,10
MEMCLK_H1 5,10
MEMCLK_L1 5,10
MEMCLK_H6 5,10
MEMCLK_L6 5,10
-MSCASB 5,10
-MSRASB 5,10
MEMCLK_H5 5,10
of
Rev
0A
5
4
3
2
1
DDR Terminations
VTT_DDR_SUS VTT_DDR_SUS
DR_MD40
DR_MD39
DR_MD35
D D
DR_MD59
DR_MD63
DR_MD58
DR_MD62
-DR_MDQS7
DR_DM7
DR_MD57
DR_MD61
DR_MD56
DR_MD60
DR_MD51
DR_MD55
C C
B B
MEMBANKA0 5,9
MEMBAKB0 5,9
MEMBANKA1 5,9
DR_MD50
DR_MD54
-DR_MDQS6
DR_DM6
MAA13
MAB13
DR_MD53
DR_MD52
DR_MD49
DR_MD48
DR_MD47
DR_MD46
DR_MD43
DR_MD42
DR_DM5
-DR_MDQS5
-MCS1
-MCS1 5,9
-MCS0
-MCS0 5,9
-MSCASA
-MSCASA 5,9
DR_MD41
-MSWEB
-MSWEB 5,9
DR_MD45
-MSRASB
-MSRASB 5,9
DR_MD44
-MSRASA
-MSRASA 5,9
RN76 8P4R-47
7 8
5 6
3 4
1 2
RN75 8P4R-47
7 8
5 6
3 4
1 2
RN74 8P4R-47
7 8
5 6
3 4
1 2
RN72 8P4R-47
7 8
5 6
3 4
1 2
RN70 8P4R-47
7 8
5 6
3 4
1 2
RN68 8P4R-47
7 8
5 6
3 4
1 2
RN66 8P4R-47
7 8
5 6
3 4
1 2
RN65 8P4R-47
7 8
5 6
3 4
1 2
RN62 8P4R-47
7 8
5 6
3 4
1 2
RN57 8P4R-47
7 8
5 6
3 4
1 2
MEMBAKB1 5,9
DR_MD38
DR_MD34
DR_DM4
-DR_MDQS4
DR_MD37
DR_MD33
DR_MD36
DR_MD32
DR_CHECK7
DR_CHECK3
DR_CHECK6
DR_CHECK2
DR_DM8
-DR_MDQS8
DR_CHECK1
DR_CHECK0
DR_CHECK5
DR_CHECK4
DR_MD31
DR_MD27
MAA1
MAB1
MAA2
MAB2
MAA3
MAA4
MAB4
MAA6
DR_MD30
MAB3
DR_MD26
DR_DM3
-DR_MDQS3
DR_MD25
DR_MD29
DR_MD28
MAB6
MAB5
MAA5
MAA8
VTT_DDR_SUS
RN54 8P4R-47
7 8
5 6
3 4
1 2
RN46 8P4R-47
7 8
5 6
3 4
1 2
RN45 8P4R-47
7 8
5 6
3 4
1 2
RN44 8P4R-47
7 8
5 6
3 4
1 2
RN41 8P4R-47
7 8
5 6
3 4
1 2
RN37 8P4R-47
7 8
5 6
3 4
1 2
RN31 8P4R-47
7 8
5 6
3 4
1 2
RN27 8P4R-47
7 8
5 6
3 4
1 2
RN30 8P4R-47
7 8
5 6
3 4
1 2
RN29 8P4R-47
7 8
5 6
3 4
1 2
RN24 8P4R-47
7 8
5 6
3 4
1 2
DR_MD24
DR_MD19
DR_MD23
MAA7
DR_DM2
MAA9
MAA11
MAA12
MAB8
DR_MD22
MAB7
DR_MD18
MAB9
MAB11
DR_MD21
-DR_MDQS2
DR_MD17
MAB12
DR_MD16
DR_MD20
DR_MD11
DR_MD10
DR_MD15
DR_MD14
DR_DM1
DR_MD13
-DR_MDQS1
DR_MD12
DR_MD9
DR_MD8
DR_MD3
DR_MD7
DR_MD6
DR_MD2
DR_DM0
-DR_MDQS0
DR_MD1
DR_MD5
DR_MD4
DR_MD0
MAB10
MAB0
MAA10
MAA0
RN22 8P4R-47
7 8
5 6
3 4
1 2
RN20 8P4R-47
7 8
5 6
3 4
1 2
RN18 8P4R-47
7 8
5 6
3 4
1 2
RN15 8P4R-47
7 8
5 6
3 4
1 2
RN13 8P4R-47
7 8
5 6
3 4
1 2
RN9 8P4R-47
7 8
5 6
3 4
1 2
RN7 8P4R-47
7 8
5 6
3 4
1 2
RN5 8P4R-47
7 8
5 6
3 4
1 2
RN4 8P4R-47
7 8
5 6
3 4
1 2
RN2 8P4R-47
7 8
5 6
3 4
1 2
RN39 8P4R-47
7 8
5 6
3 4
1 2
-MCS2
-MCS2 5,9
-MCS3
-MCS3 5,9
MAB13
MAA13
VTT_DDR_SUS
MCKE0 5,9
MCKE1 5,9
-MCS3
-MCS3 5,9
-MCS2
-MCS2 5,9
-MSCASB
-MSCASB 5,9
-MSWEA
-MSWEA 5,9
DR_DM[8..0] 9,11
-DR_MDQS[8..0] 9,11
DR_MD[63..0] 9,11
MAB[13..0] 5,9
MAA[13..0] 5,9
DR_CHECK[7..0] 9,11
R72 47
R68 47
RN63 8P4R-47
7 8
5 6
3 4
1 2
DR_DM[8..0]
-DR_MDQS[8..0]
DR_MD[63..0]
MAB[13..0]
MAA[13..0]
DR_CHECK[7..0]
MEMBAKB1 5,9
MEMBANKA1 5,9
MEMBAKB0 5,9
MEMBANKA0 5,9
MAB12
MAA12
MAB11
MAA11
MAB1
MAA1
MAB3
MAA3
MAB2
MAA2
MAB6
MAA6
MAB4
MAA4
MAB8
MAA8
MAA5
MAB5
MAA0
MAA10
MAB0
MAB10
-MSCASB
-MSCASB 5,9
-MCS0
-MCS0 5,9
-MSCASA
-MSCASA 5,9
-MCS1
-MCS1 5,9
MAA9
MAB9
MAB7
MAA7
-MSRASB
-MSRASB 5,9
-MSRASA
-MSRASA 5,9
-MSWEA
-MSWEA 5,9
-MSWEB
-MSWEB 5,9
MCKE1 5,9
MCKE0 5,9
CN19
8P4C-22P
CN6
8P4C-22P
CN14
8P4C-22P
CN12
8P4C-22P
CN11
8P4C-22P
CN10
8P4C-22P
CN15
8P4C-22P
CN18
8P4C-22P
CN8
8P4C-22P
CN17
8P4C-22P
CN16
8P4C-22P
CN5
8P4C-22P
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MEMCLK_H5 5,9
A A
MEMCLK_H0 5,9
MEMCLK_H6 5,9 MEMCLK_L6 5,9
MEMCLK_H1 5,9
MEMCLK_H5
MEMCLK_H0
MEMCLK_H4
MEMCLK_H6
MEMCLK_H1
5
R74 120RST
R103 120RST
R95 120RST
R73 120RST
R105 120RST
R93 120RST
MEMCLK_L5
MEMCLK_L7 MEMCLK_H7
MEMCLK_L0
MEMCLK_L4
MEMCLK_L6
MEMCLK_L1
MEMCLK_L5 5,9
MEMCLK_L7 5,9 MEMCLK_H7 5,9
MEMCLK_L0 5,9
MEMCLK_L4 5,9 MEMCLK_H4 5,9
MEMCLK_L1 5,9
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
http://www.msi.com.tw
2
Micro Star Restricted Secret
DDR Terminations Bank 0
MS-6761N1
Last Revision Date:
Tuesday, January 14, 2003
Sheet
10 36
of
1
Rev
0A
5
4
3
2
1
LAYOUT: Place on backside,
MD38
R126 10
RN43 8P4R-10
MEMCHECK7 DR_CHECK7
DDR Terminations
-MDQS0 -DR_MDQS0
D D
C C
B B
R66 10
RN6 8P4R-10
MD0
1 2
MD4
3 4
MD5
5 6
MD1
7 8
RN8 8P4R-10
DM0
1 2
3 4
MD6 DR_MD6
5 6
MD7 DR_MD7
7 8
RN10 8P4R-10
1 2
MD8 DR_MD8
3 4
MD9 DR_MD9
5 6
7 8
MD15
R76 10
RN12 8P4R-10
-MDQS1
1 2
MD13 DR_MD13
DM1
MD14 DR_MD14
3 4
5 6
7 8
RN19 8P4R-10
1 2
MD17
3 4
MD21 DR_MD21
5 6
DM2
7 8
MD18
R89 10
RN16 8P4R-10
MD10
1 2
3 4
MD20 DR_MD20
5 6
MD16 DR_MD16
7 8
RN23 8P4R-10
1 2
MD23 DR_MD23
3 4
5 6
MD24
7 8
RN26 8P4R-10
1 2
MD29
3 4
5 6
-MDQS3
7 8
RN32 8P4R-10
MD26
1 2
3 4
MD27
5 6
MD31 DR_MD31
7 8
DR_MD0
DR_MD4
DR_MD5
DR_MD1
DR_DM0
DR_MD2 MD2
DR_MD3 MD3
DR_MD12 MD12
DR_MD15
-DR_MDQS1
DR_DM1
-DR_MDQS2 -MDQS2
DR_MD17
DR_DM2
DR_MD18
DR_MD10
DR_MD11 MD11
DR_MD22 MD22
DR_MD19 MD19
DR_MD24
DR_MD28 MD28
DR_MD29
DR_MD25 MD25
-DR_MDQS3
DR_MD26
DR_MD30 MD30
DR_MD27
-MDQS7
MD63
MEMCHECK5
MEMCHECK0
MEMCHECK1
-MDQS8
1 2
3 4
5 6
7 8
RN47 8P4R-10
1 2
-MDQS4 -DR_MDQS4
3 4
DM4
5 6
MD34 DR_MD34
7 8
MD42
R133 10
RN56 8P4R-10
MD35 DR_MD35
1 2
MD39 DR_MD39
3 4
5 6
MD44 DR_MD44
7 8
RN60 8P4R-10
1 2
MD41 DR_MD41
3 4
-MDQS5 -DR_MDQS5
5 6
DM5 DR_DM5
7 8
RN64 8P4R-10
MD43
1 2
MD46 DR_MD46
3 4
MD47 DR_MD47
5 6
7 8
RN67 8P4R-10
1 2
3 4
MD53 DR_MD53
5 6
7 8
MD51
R169 10
RN69 8P4R-10
1 2
3 4
MD50
5 6
MD55
7 8
RN71 8P4R-10
1 2
MD56
3 4
MD61 DR_MD61
5 6
MD57 DR_MD57
7 8
RN73 8P4R-10
DM7
1 2
3 4
MD62 DR_MD62
5 6
MD58
7 8
R191 10
R189 10
RN38
1 2
3 4
5 6
7 8
8P4R-10
DM8
MEMCHECK2 DR_CHECK2
-MDQS[8..0] 5
-DR_MDQS[8..0] 9,10
DR_MD[63..0] 9,10
MD[63..0] 5
A A
MEMCHECK[7..0] 5
DR_CHECK[7..0] 9,10
DR_DM[8..0] 9,10
DM[8..0] 5
-MDQS[8..0]
-DR_MDQS[8..0]
DR_MD[63..0]
MD[63..0]
MEMCHECK[7..0]
DR_CHECK[7..0]
DR_DM[8..0]
DM[8..0]
5
MEMCHECK6
MEMCHECK3
MEMCHECK4
DM3
RN40
1 2
3 4
5 6
7 8
8P4R-10
R100 10
R94 10
DR_MD38
DR_MD32 MD32
DR_MD36 MD36
DR_MD33 MD33
DR_MD37 MD37
DR_DM4
DR_MD42
DR_MD40 MD40
DR_MD45 MD45
DR_MD43
DR_MD48 MD48
DR_MD49 MD49
DR_MD52 MD52
DR_DM6 DM6
DR_MD51
-DR_MDQS6 -MDQS6
DR_MD54 MD54
DR_MD50
DR_MD55
DR_MD60 MD60
DR_MD56
DR_DM7
-DR_MDQS7
DR_MD58
DR_MD59 MD59
VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS
VTT_DDR_SUS
VTT_DDR_SUS
evenly spaced around VTT fill.
VDD_25_SUS VDD_25_SUS
VTT_DDR_SUS VTT_DDR_SUS
C186
X_0.22u
{nopop}
C247
X_0.22u
{nopop}
C262
X_0.22u
{nopop}
C267
X_0.22u
{nopop}
C47
104P/25V/Y5V
C62
104P/25V/Y5V
C75
104P/25V/Y5V
C78
104P/25V/Y5V
C85
104P/25V/Y5V
C91
104P/25V/Y5V
C98
104P/25V/Y5V
LAYOUT: Place alternating caps to GND and VDD_2.5_SUS in a single line along VTT island.
C60
C73
104P/25V/Y5V
C76
104P/25V/Y5V
C81
104P/25V/Y5V
104P/25V/Y5V
C101
104P/25V/Y5V
C109
104P/25V/Y5V
C119
104P/25V/Y5V
C126
104P/25V/Y5V
C132
104P/25V/Y5V
C134
104P/25V/Y5V
C137
104P/25V/Y5V
C88
104P/25V/Y5V
C95
C12
X_0.22u
{nopop}
C56
X_0.22u
{nopop}
C28
X_0.22u
{nopop}
C11
X_0.22u
{nopop}
C58
X_0.22u
{nopop}
104P/25V/Y5V
C99
C105
104P/25V/Y5V
C143
104P/25V/Y5V
C145
104P/25V/Y5V
C147
104P/25V/Y5V
C160
104P/25V/Y5V
C165
104P/25V/Y5V
C169
104P/25V/Y5V
C176
104P/25V/Y5V
C112
104P/25V/Y5V
C122
104P/25V/Y5V
C131
104P/25V/Y5V
C182
104P/25V/Y5V
C188
104P/25V/Y5V
C191
104P/25V/Y5V
C195
104P/25V/Y5V
C202
104P/25V/Y5V
C209
104P/25V/Y5V
C218
104P/25V/Y5V
C133
104P/25V/Y5V
C136
104P/25V/Y5V
C140
104P/25V/Y5V
C144
104P/25V/Y5V
LAYOUT: Locate close
to Clawhammer
socket.
VTT_DDR_SUS
+
EC17
1000U/6.3V
VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS
C226
104P/25V/Y5V
C232
104P/25V/Y5V
C240
104P/25V/Y5V
C245
104P/25V/Y5V
C250
104P/25V/Y5V
C257
104P/25V/Y5V
C153
C146
104P/25V/Y5V
GND
104P/25V/Y5V
104P/25V/Y5V
GND
+
EC5
1000U/6.3V
DR_MD63
C215
DR_CHECK5
DR_CHECK0
DR_CHECK1
-DR_MDQS8
DR_DM8
DR_CHECK6
DR_CHECK3
DR_CHECK4
C163
104P/25V/Y5V
VTT_DDR_SUS
0.22u C74
C51
VTT_DDR_SUS
C167
4.7u/0805
C173
104P/25V/Y5V
C59
X_0.22u C57
10u/1206
C190
C185
C179
104P/25V/Y5V
104P/25V/Y5V
104P/25V/Y5V
LAYOUT: Locate close to
Clawhammer socket.
102P C25
C17
X_4.7u/0805
X_100P C18
C194
104P/25V/Y5V
X_102P C16
X_0.22u C10
C198
104P/25V/Y5V
X_100P C15
GND
C205
104P/25V/Y5V
DR_DM3
102P C172
X_100P C271
X_102P C273
4
C272
X_4.7u/0805
3
X_100P C270
C253
X_4.7u/0805
X_0.22u C243
C187
4.7u/0805
0.22u C151
C178
10u/1206
GND
104P/25V/Y5V
C220
104P/25V/Y5V
Title
C228
104P/25V/Y5V
C242
C235
104P/25V/Y5V
104P/25V/Y5V
Micro Star Restricted Secret
DDR Terminations Bank 1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
C248
104P/25V/Y5V
C254
104P/25V/Y5V
MS-6761N1
104P/25V/Y5V
C266
104P/25V/Y5V
GND
Last Revision Date:
Wednesday, January 15, 2003
Sheet
11 36
of
1
Rev
0A
A
4 4
A10
A24
A25
A26
B10
VLDT
VLDT
B9
VLDT
VLDT
B23
VLDT
B24
VLDT
A9
CADON[0..15] 5
CADOP[0..15] 5
CADON[0..15]
CADOP[0..15]
VLDT
VLDT
J10
VLDT
From Claw Hammer
CADOP15
CADOP14
CADOP13
CADOP12
CADOP11
CADOP10
CADOP9
3 3
2 2
CADOP8
CADOP7
CADOP6
CADOP5
CADOP4
CADOP3
CADOP2
CADOP1
CADOP0
CLKOP1 5
CLKON1 5
CLKOP0 5
CLKON0 5
CTLOP0 5
CTLON0 5
CLKOP1
CLKON1
CLKOP0
CLKON0
CTLOP0
CTLON0
CADON15
CADON14
CADON13
CADON12
CADON11
CADON10
CADON9
CADON8
CADON7
CADON6
CADON5
CADON4
CADON3
CADON2
CADON1
CADON0
G24
G23
H22
L22
K22
N22
M22
N24
N23
R22
P22
R24
R23
H26
G26
H24
H25
K26
K24
K25
M24
M25
P26
N26
P24
P25
T26
R26
L24
L23
M26
L26
F24
F25
F13
F18
K12
K13
K14
K15
K16
K17
J22
J24
J23
J26
J18
RCADP15
RCADN15
RCADP14
RCADN14
RCADP13
RCADN13
RCADP12
RCADN12
RCADP11
RCADN11
RCADP10
RCADN10
RCADP9
RCADN9
RCADP8
RCADN8
RCADP7
RCADN7
RCADP6
RCADN6
RCADP5
RCADN5
RCADP4
RCADN4
RCADP3
RCADN3
RCADP2
RCADN2
RCADP1
RCADN1
RCADP0
RCADN0
RCLKP1
RCLKN1
RCLKP0
RCLKN0
RCTLP
RCTLN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B25
VLDT
B26
VLDT
VLDT
C10
C11D9D10
C23
C9
VLDT
VLDT
VLDT
B
VLDT
C24
VLDT
C25
VLDT
VLDT
D22
D23
D24
D11E9E10
VLDT
VLDT
VLDT
VLDT
VDD_12_A
VLDT
VLDT
VLDT
E11
E21
VLDT
E22
VLDT
E23
VLDT
E24
VLDT
F10
VLDT
F11
VLDT
F15
VLDT
F16
VLDT
F19
VLDT
VLDT
F20
F21
VLDT
F22
VLDT
VLDT
C
K8T400M HT Interface
VAVDD2
F23
G21
VLDT
VLDT
G22
VLDT
H21
J11
VLDT
VLDT
J12
J13
VLDT
VLDT
J14
J15
VLDT
VLDT
H14
H13
NC_H13
H17
H18
NC_H14
NC_H17
TCADP15
TCADN15
TCADP14
TCADN14
TCADP13
TCADN13
TCADP12
TCADN12
TCADP11
TCADN11
TCADP10
TCADN10
TCADP9
TCADN9
TCADP8
TCADN8
TCADP7
TCADN7
TCADP6
TCADN6
TCADP5
TCADN5
TCADP4
TCADN4
TCADP3
TCADN3
TCADP2
TCADN2
TCADP1
TCADN1
TCADP0
TCADN0
TCLKP1
TCLKN1
TCLKP0
TCLKN0
RNCOMP
RTCOMP
RPCOMP
LDTRST
LDTSTOP
NC_H18
TCTLP
TCTLN
C22 C21
AVDD2 AVSS2
E20
D21
D19
C19
E18
E19
D17
C17
D15
C15
E14
E15
D13
C13
E12
E13
B20
C20
A19
A20
B18
C18
A17
A18
A15
A16
B14
C14
A13
A14
B12
C12
E16
E17
B16
C16
A21
A22
D26
C26
D25
B11
A12
U11A
X_K8T400M_#A
B01-0838505-V01
CADIN15
CADIN14
CADIN13
CADIN12
CADIN11
CADIN10
CADIN9
CADIN8
CADIN7
CADIN6
CADIN5
CADIN4
CADIN3
CADIN2
CADIN1
CADIN0
CLKIP1
CLKIN1
CLKIP0
CLKIN0
CTLIP0
CTLIN0
PNCOMP
RTCOMP
RPCOMP
-LDTRST
-LDTSTOP
D
CADIN[0..15]
CADIP[0..15]
To Claw Hammer
CADIP15
CADIP14
CADIP13
CADIP12
CADIP11
CADIP10
CADIP9
CADIP8
CADIP7
CADIP6
CADIP5
CADIP4
CADIP3
CADIP2
CADIP1
CADIP0
CLKIP1 5
CLKIN1 5
CLKIP0 5
CLKIN0 5
CTLIP0 5
CTLIN0 5
-LDTRST 32
-LDTSTOP 6,17
CADIN[0..15] 5
CADIP[0..15] 5
PNCOMP
RTCOMP
RPCOMP
E
Reserved
VAVDD2
VAGND2
C183 104P/25V/Y5V
C181 104P/25V/Y5V
Around NB
C551 X_104P/BACK
C549 X_104P/BACK
Decoupling capacitors
at NB BGA Area (On
Solder Layer)
R125 49.9RST
R122 100RST
R124 49.9RST
C180
X_103P
VDD_12_A
VDD_12_A
VDD_12_A
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
M18
N18
J17
J16
VDD_12_A
1 1
A
N21
K18
K21
L21
L18
VLDT
P18
P21
R18
T18
T21
T23
T24
T25
U18
U21
U22
U23
T22
B
U24
U25
VLDT
U26
VLDT
V21
V22
V23
V24
V25
V26
VLDT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M10
VSS
N10
P10
R10
T10
U10
VSS
K10
L10
K11
NC_K8
K8
C
NC_L8
L8
NC_J19
N19
J19
NC_P19
NC_N19
P19
P2
NC_P3
NC_P2
P3
NC_P4
P4
VAGND2
Title
Micro Star Restricted Secret
NORTH BRIDGE K8T400M/VER:0.4 (HT)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
D
MS-6761N1
Last Revision Date:
Sheet
Rev
Wednesday, January 15, 2003
12 36
of
E
0A
A
K8T400M AGP 8X ,V-Link, Misc. Control
VCC2_5
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
ST0
ST1
ST2
W14
W13
W12
AF18
AD18
AE18
AF17
AD17
AD16
AE16
AF16
AF14
AD14
AD13
AE13
AF13
AD12
AF12
AE12
AD10
AE10
AF10
AD9
AF9
AF8
AE9
AD8
AF6
AD7
AE6
AD5
AF5
AF4
AE4
AD4
AC2
AC3
AD1
AD2
AF2
AD3
AE3
AF3
AD15
AF11
AD11
AC7
AE15
AF15
AE7
AF7
AF1
AE1
AC5
AC4
AC9
AC10
AC14
AC11
AC12
AC16
AD6
AC1
AA3
AC15
AA2
AA1
AB1
AC13
AC6
A11
4 4
GAD[31..0] 16
3 3
SBA[7..0]
SBA[7..0] 16
GC/BE#[3..0] 16
2 2
1 1
GC/BE#[3..0]
AD_STBF0 16
AD_STBS0 16
AD_STBF1 16
AD_STBS1 16
GDEVSEL 16
AGP8XDET# 16
ST[2..0] 16
GCLK_NB 8
AGPVREF_GC 16
AD_STBF0
AD_STBS0
AD_STBF1
AD_STBS1
SB_STBF
SB_STBF 16
SB_STBS
SB_STBS 16
DBIH
DBIH 16
DBIL
DBIL 16
GFRAME 16
GIRDY 16
GTRDY 16
GSTOP 16
GPAR 16
RBF 16
WBF 16
GREQ 16
GGNT 16
GSERR 16
ST[2..0]
AGPPCOMP
AGPNCOMP AGPPCOMP
AGPVREF_GC
A
U1T2T3T4T5T8T9U2U3U4U5U8U9V2V3
M8
N8
VDD
VDD
VCC1
VCCQQ
VCC1
Y1
Y2
V1
W1
VDD
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
C/BE0
C/BE1
C/BE2
C/BE3
AD_STBF0
AD_STBS0
AD_STBF1
AD_STBS1
SB_STBF
SB_STBS
DBIH
DBIL
GFRAME
GIRDY
GTRDY
GDEVSEL
GSTOP
GPAR
RBF
WBF
GREQ
GGNT
GSERR
AGP8XDET
ST0
ST1
ST2
GCLK
AGPPCOMP
AGPNCOMP
AGPVREF0
AGPVREF1
VCC1
VCC1
VCC1
T1
VCC1
VCC1
VSSQQ
VCC1
VSS
P5R1R2R3R4
A8
VCC1
VSS
VCC1
VSS
VCC1
VSS
VCC1
VSS
VCC1
VSS
R5
VCC1
VSS
R21
B
VCC1
VSS
B
V4V5V8
VCC1
VSS
VCC1
VSS
W21
V9
VCC1
VSS
W22
V10
VCC1
VSS
W23
V11
VCC1
VSS
W24
V12
VCC1
VSS
W25
VDDQ
V13W2W3
VCC1
VSS
W26
VCC1
VSS
AB2
VCC1
VSS
AB3
W4W5W9
VCC1
VSS
AB4
VCC1
VSS
AB5
Y3Y4Y5
VCC1
VSS
AB6
VCC1
VSS
AB9
VCC1
VSS
AB10
AA4
VCC1
VSS
AB15
AA5
VCC1
VSS
AB16
AB7
VCC1
VSS
AC8
AB8
VCC1
VSS
AC24
AB11
VCC1
VSS
AE2
AB12
VCC1
VSS
AE5
AB13
VCC1
VSS
AE8
AB14
VCC1
VSS
AE11
VCC1
VSS
AE14
VSS
AE17
VSS
VSS
AE20
VSS
AE22
VSS
AE25
AVSS1
E26
C
C
VSUS2_5
E25
AVDD1
PWRGD
RESET
TESTIN
SUSST
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
VPAR
LVREF
LCOMPP
UPCMD
DNCMD
DNSTB
DNSTB
UPSTB
UPSTB
DEBUG
PIPE#
RSVD3
RSVD0
RSVD2
RSVD6
RSVD5
NC_M5
NC_N1
NC_N2
NC_N3
NC_N4
NC_N5
NC_P1
NC_L5
NC_W8
NC_Y8
NC_Y9
NC_Y10
VAGND1
VAVDD1
AC25
VSUS25
AE26
AD25
TESTIN
AC26
AD26
V14
V15
V16
V17
W15
W16
W17
W18
AB17
AB18
AB19
AB20
AC18
AC19
AC20
AC21
VLAD0
AD20
VLAD1
AD21
VLAD2
AF24
VLAD3
AE24
VLAD4
AE19
VLAD5
AF20
VLAD6
AD24
VLAD7
AF25
AE21
AF19
LVREF_NB
AF21
LCOMPP
AD19
AF26
AD23
AF22
AD22
AE23
AF23
AC17
M1
L3
L4
M2
M3
M4
M5
N1
N2
N3
N4
N5
P1
L5
W8
Y8
Y9
Y10
U11B
X_K8T400M_#A
B01-0838505-V01
C236
X_102P
VCC2_5
DEBUG
PWROK_NB# 18,19
SUSST# 18,19
VLAD0 17
VLAD1 17
VLAD2 17
VLAD3 17
VLAD4 17
VLAD5 17
VLAD6 17
VLAD7 17
VBE0# 17
VPAR 17
UPCMD 17
DNCMD 17
DNSTB 17
DNSTB# 17
UPSTB 17
UPSTB# 17
R176 10K
D
VSUS2_5
C237
104P/25V/Y5V
Near NB.
C239
X_102P
PCIRST# 17,29
LAYOUT: Place caps on the bottom of NB
C558 X_104P/BACK
C553 X_104P/BACK
C556 X_104P/BACK
C561 X_104P/BACK
C565 X_104P/BACK
C548 X_104P/BACK
C555 X_104P/BACK
C566 X_104P/BACK
C552 X_104P/BACK
C550 X_104P/BACK
LAYOUT: Place caps as close NB as possible
The voltage level of
LVREF_NB is
0.625V
Title
Micro Star Restricted Secret
NORTH BRIDGE K8T400M/VER:0.4 (AGP & VLINK)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
D
VDDQ
AGPVREF_GC
TESTIN
AGPNCOMP
LCOMPP
MS-6761N1
E
Reserved
VAVDD1
VAGND1
V-Link ->
LVREF=0.625 Volt
VCC2_5
R164
3KST
LVREF_NB
R161
1KRST
C560 X_104P/BACK
C564 X_104P/BACK
C559 X_104P/BACK
C571 X_104P/BACK
C573 X_104P/BACK
C277 104P/25V/Y5V
C275 105P/0805/16V
R179 4.7K
R170 60.4RST
R165 60.4RST
R180 360RST
Last Revision Date:
Wednesday, January 15, 2003
Sheet
13 36
of
E
C174
X_103P
C230
104P/25V/Y5V
C225
104P/25V/Y5V
VDDQ
VCC2_5
VDDQ
Rev
0A
A
B
C
D
E
K8T400M Power and Ground Connections
VDD_12_A VDD_12_A
C545 X_0.22u/BACK
C539 X_0.22u/BACK
C540 X_0.22u/BACK
C557 X_0.22u/BACK
C546 X_0.22u/BACK
C536 X_0.22u/BACK
C537 X_0.22u/BACK
Title
Micro Star Restricted Secret
NORTH BRIDGE K8T400M/VER:0.4 (POWER/GOUND)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
D
C543 X_4.7U/0805/BACK
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
14 36
of
E
Rev
0A
H8
J8
F9
H9
H10
H11
H12
H15
H16
K19
L19
M19
P8
R8
R19
T19
U19
V18
V19
W10
W11
W19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
AA21
AA22
AA23
AA24
AA25
AA26
AB21
AB22
AB23
AB24
AB25
AB26
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
C1
C2
C3
C4
C5
C6
C7
D1
D2
D3
D4
D5
D7
E1
E2
E3
E4
E7
F1
F2
F3
F4
F5
F6
G2
G3
G4
G5
H3
H4
H5
J1
J4
J5
VCC2_5
VCC2_5
C570 X_104P/BACK
C544 X_104P/BACK
C562 X_104P/BACK
C554 X_104P/BACK
C563 X_104P/BACK
C567 X_102P/BACK
C568 X_102P/BACK
C542 X_102P/BACK
C547 X_102P/BACK
C569 X_102P/BACK
LAYOUT : Popualte caps on the bottom side
of NB.
VDDQ
C219
104P/25V/Y5V
VDDQ
C294
105P/0805/16V
VDDQ
C290
105P/0805/16V
B
C299
X_104P
C295
105P/0805/16V
C264 X_105P/0805
C221 105P/0805/16V
VDDQ
C291
104P/25V/Y5V
C312
X_1U/0805
C276
X_104P
C259
105P/0805/16V
C324
104P/25V/Y5V
C293
X_1U/0805
K8T400M
C227
105P/10V/Y5V
C217
105P/0805/16V
VDDQ
C268
104P/25V/Y5V
C572
X_1U/0805/BACK
C
U11C
X_K8T400M_#A
B01-0838505-V01
VDD
NC_K1
NC_K5
K1
NC_L1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC_A1
NC_A2
NC_A3
NC_A4
NC_A5
NC_A6
NC_A7
NC_B1
NC_B2
NC_B3
NC_B4
NC_B5
NC_B6
NC_B7
NC_C1
NC_C2
NC_C3
NC_C4
NC_C5
NC_C6
NC_C7
NC_D1
NC_D2
NC_D3
NC_D4
NC_D5
NC_D7
NC_E1
NC_E2
NC_E3
NC_E4
NC_E7
NC_F1
NC_F2
NC_F3
NC_F4
NC_F5
NC_F6
NC_G2
NC_G3
NC_G4
NC_G5
NC_H3
NC_H4
NC_H5
NC_J1
NC_J4
NC_J5
A23
VSS
B8
VSS
B13
VSS
B15
VSS
B17
VSS
B19
4 4
3 3
2 2
1 1
B21
B22
D12
D14
D16
D18
D20
G25
H23
K23
M11
M12
M13
M14
M15
M16
M17
M21
M23
N11
N12
N13
N14
N15
N16
N17
N25
P11
P12
P13
P14
P15
P16
P17
P23
R11
R12
R13
R14
R15
R16
R17
R25
U11
U12
U13
U14
U15
U16
U17
AC22
AC23
VSS
VSS
VSS
C8
VSS
D6
VSS
D8
VSS
VSS
VSS
VSS
VSS
VSS
E5
VSS
E6
VSS
E8
VSS
F7
VSS
F8
VSS
F12
VSS
F14
VSS
F17
VSS
F26
VSS
VSS
H1
VSS
VSS
J2
VSS
J3
VSS
J21
VSS
J25
VSS
VSS
VSS
L11
VSS
L12
VSS
L13
VSS
L14
VSS
L15
VSS
L16
VSS
L17
VSS
L25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G1
VSS
H2
VSS
RSVD4
RSVD1
RSVD7
K2
K3K4K5L1L2
A
5
4
3
2
1
VCORE
VCC2_5
CT6
2200U/6.3V
CT9
2200U/6.3V
RN3
VID0
1 2
VID1
3 4
VID2
K8 Voltage Regular Module
D D
VCC
5VSB
Q8
2N3904S
C
B
E
R10 0
R19 154KST
COMP1
X22p/X7R C41
COREFB_H 6
R42 X51RST
R43 X51RST
COREFB_L 6
VCC
PG_VCORE 32
VCORE
R31
4.7K
R11 10K
R53 10KST
R44
0
VCORE
GND
EN_VCORE 32
VID[4..0] 6
C C
Droop Compensation
R12
R29
1K
Q6
2N7002S
VID4
VID3
VID2
VID1
VID0
CORE_PG
FS_ISL
C40 5600p/X7R
COMP
FB_ISL
R54
1KRST
VDIFF
IDROOP
4.7K
28
3
4
5
6
7
26
27
9
10
12
11 8
CHOK1 1.2uH/18A
+12V
U3
EN
VID4
VID3
VID2
VID1
VID0
PGOOD
FS/DIS
COMP
FB
VDIFF
IDROOP OFS
ISL6559CB
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3
PWM4
ISEN4
RGND
VCC
GND
GND
GND
VSEN
OVP
16
20
15
1
22
23
21
19
17
18
25
24
14
13
2
C155
39p/50V
ISEN1
ISEN2
CT8
820u/25V
VCC
CB2
105P/0805/16V
R9 3KST
R8 3KST
R7 3KST
VCC
OFS
R30
2.2K
CT7
820u/25V
+12V
R91
5.1/0805
CB5
105P/0805/16V
+12V
R92
5.1/0805
CB6
105P/0805/16V
VDD_12_VRM
CT1
820u/25V
VDD_P0
PWM1
VDD_P1
PWM2
C127
4.7U/1206
U7A
HIP6602B
I33-6602B03-I11
14
VCC
U_G1
BOOT1
PHASE1
3
GND
1
PWM1
L_G1
U7B
5 9
PVCC U_G2
BOOT2
PHASE2
6
PGND
2
PWM2
L_G2
HIP6602B
C31
4.7U/1206
R112
2.2/0805
U_G1
12
11
C107
104P/25V/Y5V
13
C142
X_103P/X7R
L_G1 L_G1A
4
10
8
7
R90
2.2/0805
C100
104P/25V/Y5V
C89
X_103P/X7R
R71
0/0805
R97
0/0805
U_G1A
PHASE1
VDD_12_VRM
U_G2A U_G2
PHASE2
L_G2A L_G2
CB4
105P/0805/16V
D S
G
Q16
09N03/DPACK
CHOK4 0.9uH/25A
D S
Q15
06N03/PACK
G
CB3
105P/0805/16V
D S
G
Q14
09N03/DPACK
CHOK3 0.9uH/25A
D S
Q13
06N03/PACK
G
CT10
2200U/6.3V
0.8V~1.55V/52A
VID3
VID4
CT4
2200U/6.3V
5 6
7 8
X_8P4R-4.7K
R48 X_4.7K
CT5
2200U/6.3V
CT3
2200U/6.3V
B B
+12V
VID4 VID3 VID2 VID1 VID0 Vout
1 1 1 1 0 0.800
1 1 1 0 1 0.825
1 1 1 0 0 0.850
1 1 0 1 1 0.875
1 1 0 1 0 0.900
1 1 0 0 1 0.925
1 1 0 0 0 0.950
VID4 VID3 VID2 VID1 VID0 Vout
0 1 1 1 0 1.200
0 1 1 0 1 1.225
0 1 1 0 0 1.250
0 1 0 1 1 1.275
0 1 0 1 0 1300
0 1 0 0 1 1.325
0 1 0 0 0 1.350
R5
5.1/0805
VDD_P2
CB1
105P/0805/16V
U2
6
VCC
PVCC
GND
PWM
U_G
BOOT
PHASE
L_G
7
4
3
MOSDVR-INTS-HIP6601-SOIC8
1
2
8
L_G3 PWM3
5
U_G3
C13
104P/25V/Y5V
C82
X_103P/X7R
R70
2.2/0805
R33
0/0805
U_G3A
PHASE3
L_G3A
VDD_12_VRM
D S
G
D S
G
CB7
105P/0805/16V
Q11
09N03/DPACK
Q10
06N03/PACK
CHOK2 0.9uH/25A
CT2
2200U/6.3V
1 0 1 1 1 0.975 0 0 1 1 1 1.375
0 0 1 1 0 1.400 1 0 1 1 0 1.000
1 0 1 0 1 1.025
A A
1 0 1 0 0 1.050
1 0 0 1 1 1.075
1 0 0 1 0 1.100
1 0 0 0 1 1.125
1 0 0 0 0 1.150
0 1 1 1 1 1.175
5
0 0 1 0 1 1.425
0 0 1 0 0 1.450
0 0 0 1 1 1.475
0 0 0 1 0 1.500
0 0 0 0 1 1.525
0 0 0 0 0 1.550
1 1 1 1 1 Shutdown
4
+12V
C4
104P/25V/Y5V
Near to Vcore Input-Chock ( CHOK1 )
3
60MIL
JPW1
3
12V
4
12V
D2x2-NPEG
GND
GND
1
2
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
Micro Star Restricted Secret
K8 CORE POWER
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
15 36
of
1
Rev
0A
5
4
3
2
1
AGP PRO Connector
VCC
R253 X_4.7K
PIRQ#B 17,20,21,22
GCLK_SLOT 8
GREQ 13
RBF 13
DBIL 13
SB_STBF 13
AD_STBF1 13 AD_STBS1 13
GIRDY 13
GDEVSEL 13
GSERR 13
AD_STBF0 13
VCC3
R168
4.7K
D S
Q28
2N7002S
G
AGP8XDET#
R167
10K
4
SB_STBF
AD_STBF0
AD_STBF1
SB_STBS
AD_STBS1
AD_STBS0
VREF_CG
C309
105P/0805/16V
C296
104P/25V/Y5V
R215 X_8.2K
R217 X_8.2K
R222 X_8.2K
R216 X_8.2K
R223 X_8.2K
R218 X_8.2K
R252
3.32KST
C298
104P/25V/Y5V
5
VDDQ
VDDQ
D S
G
Q44
R254
2N7002S
1.47KST
R255
1.02KST
"AGP8XDET_GC#"
=>4X=High,8X=Low
+12V
R183
1K
AGP8XDET_GC#
1 : 4X
0 : 8X 1 : 4X
D D
Reserved for test
C C
B B
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt ,
8X : 0.23*1.5 =0.345 Volt
4X : 0.75V
8X : 0.35V
A A
VCC3
USB-
GND
-INTA
-RST
-GNT
3.3V
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
GND
SBA5
SBA7
AD30
AD28
3.3V
AD26
AD24
GND
AD22
AD20
GND
AD18
AD16
-PME
GND
PAR
AD15
AD13
AD11
GND
AD9
AD6
GND
AD4
AD2
AD0
+12V
A1
12V
A2
A3
A4
A5
A6
A7
A8
A9
A10
ST1
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
+12V
R186
1K
Q30
2N3904S
3
VDDQ
VCC
AGP1
AGP-D124-BN/1.5V
N11-1240071-K06
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
GREQ
ST0
ST2
RBF
DBIL
SBA0
SBA2
SB_STBF
SBA4
SBA6
3VDUAL
GAD31
GAD29
GAD27
GAD25
AD_STBF1
GAD23
GAD21
GAD19
GAD17
GC/BE#2
GIRDY
GDEVSEL
GPERR
GSERR
GAD14
GAD12
GAD10
GAD8
AD_STBF0 AD_STBS0
GAD7
GAD5
GAD3
GAD1
VREF_CG
AGP8XDET# 13
0 : 8X
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
CLK
-REQ
3.3V
ST0
ST2
-RBF
GND
RESERVED
SBA0
3.3V
SBA2
SB_STB
GND
SBA4
SBA6
RSVD/KEY
GND/KEY
AUX3V/KEY
3.3V/KEY
AD31
AD29
3.3V
AD27
AD25
GND
AD_STB1
AD23
VDDQ
AD21
AD19
GND
AD17
C/-BE2
VDDQ
-IRDY
AUX3V/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-DEVSEL
VDDQ
-PERR
GND
-SERR
C/-BE1
VDDQ
AD14
AD12
GND
AD10
AD8
VDDQ
AD_STB0
AD7
GND
AD5
AD3
VDDQ
AD1
VREF_CG
AGP8XDET_GC#
1 : 4X
0 : 8X
-TYPEDET
RESERVED
RESERVED
-SB_STB
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-AD_STB1
C/-BE3
VDDQ
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
VDDQ
C/-BE0
VDDQ
-AD_STB0
VDDQ
VREF_GC
R178
10K
VDDQ
AGP_PME#
G
VDDQ
VCC3
D S
R188
Q33
2N7002S
R200
200RST
AGP8XDET_GC#
AGPGND
GGNT
ST1
MBDET#
WBF
SBA1
SBA3
SB_STBS
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STBS1
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME
GTRDY
GSTOP
R250 0
GPAR
GAD15 GC/BE#1
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
AGPVREF_GC
8.2K
GPERR
3VDUAL
3VDUAL
R210
4.7K
R219
4.7K
Q37
2N3904S
PIRQ#A 17,20,21,22
AGPRST# 17
GGNT 13
R221 0
DBIH 13
WBF 13
SB_STBS 13
GFRAME 13
GTRDY 13
GSTOP 13
PCI_PME# 18,19,20,21,22,26,27,29
GPAR 13
AD_STBS0 13
AGPVREF_GC 13
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
GAD[31..0] 13
SUSB# 18,31,32
C280 X_33P
SBA[7..0] 13
ST[2..0] 13
GC/BE#[3..0] 13
Add-in Card Power
VDDQ
VCC3
3VDUAL
VCC5
VCC12
Imax
2.0A
6.0A
0.75A
2.0A
1.0A
V_Min V_MaxVUnits
1.425 1.575
3.15 3.45
3.15 3.45VV
4.75 5.25
11.4 12.6
Micro Star Restricted Secret
AGP Slot
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
GAD[31..0]
SBA[7..0]
ST[2..0]
GC/BE#[3..0]
16 36
of
1
GAD31
GAD30
GAD29
GAD28
GAD27
GAD26
GAD25
GAD24
GAD23
GAD22
GAD21
GAD20
GAD19
GAD18
GAD17
GAD16
GAD15
GAD14
GAD13
GAD12
GAD11
GAD10
GAD9
GAD8
GAD7
GAD6
GAD5
GAD4
GAD3
GAD2
GAD1
GAD0
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
V
V
Rev
0A
5
AD[31..0] 20,21,22,24,26,27
D D
C_BE#[3..0] 20,21,22,24,26,27
C C
VCC3
RN100
1 2
3 4
5 6
7 8
8P4R-4.7K
B B
For NB & SIO
PCIRST# 13,29
74HCT14/SOIC14_#A
T37-0741403-F01
74HCT14/SOIC14_#A
T37-0741403-F01
A A
AD[31..0]
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H
VCC
VCC3
U29E
14
11 10
7
VCC3
14
1 2
U29A
7
74HCT14/SOIC14_#A
74HCT14/SOIC14_#A
74HCT14/SOIC14_#A
5
C_BE#[3..0]
FRAME# 8,20,21,22,24,26,27
DEVSEL# 20,21,22,24,26,27
IRDY# 20,21,22,24,26,27
TRDY# 20,21,22,24,26,27
STOP# 8,20,21,22,24,26,27
SERR# 20,21,22,24,26,27
PERR# 20,21,22,24,26,27
PIRQ#A 16,20,21,22
PIRQ#B 16,20,21,22
PIRQ#C 20,21,22
PIRQ#D 20,21,22
PREQ#0 8
PREQ#1 27
PREQ#2 24
PREQ#3 26
PREQ#4 20
PREQ#5 20
PGNT#0 8
PGNT#1 27
PGNT#2 24
PGNT#3 26
PGNT#4 20
PGNT#5 20
PCIRST#
R430 330
R433
4.7K
U29B
13 12
U29F
U29D
PAR 20,21,22,24,26,27
Q55
2N3904S
VCC3
3 4
VCC3
VCC3
9 8
14
7
14
7
14
7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
SERR#
PERR#
PAR
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
AGPRST#
PCIDEVRST#2
G2
J4
J3
H3
F1
G1
H4
F2
E1
G3
E3
D1
G4
D2
D3
F3
K3
L3
K2
K1
M4
L2
N4
L1
M2
M1
P4
N3
N2
N1
P1
P2
E2
C1
L4
M3
J1
H2
J2
H1
K4
C2
C3
F4
A4
B4
B5
C4
D4
E4
A3
B3
A5
B6
C5
D5
P3
R3
A6
D6
C6
E5
R4
R2
R1
For IDE Connector
AGPRST# 16
For AGP Slot
PCIDEVRST#2 24,26,27
PCIRST2# 8,20,21,22
4
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0
CBE1
CBE2
CBE3
FRAME
DEVSEL
IRDY
TRDY
STOP
SERR
PERR
PAR
INTA
INTB
INTC
INTD
INTE
INTF
INTG
INTH
REQ0
REQ1
REQ2
REQ3
REQ4
REQ5
GNT0
GNT1
GNT2
GNT3
GNT4
GNT5
PCIRST
HDDRST# 25
For On-Boaed Device
For PCI Slot
4
PCI
GND
A1A2B1
GND
GND
K21
L21
N21
N22
N23
N24
L23
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
GND
GND
GND
GND
GND
GND
GND
E8
GND
GND
GND
B2
J5K5P5R5V5W5F6F7L11
N25
VCCVK
GND
AA9
N26
P22
VCCVK
GND
AA10
PGNT#0
PGNT#5
PREQ#3
PREQ#1
PREQ#2
PREQ#4
PREQ#0
PREQ#5
VCC2_5
P23
VCCVK
VCCVK
GND
GND
M11
PGNT#1
PGNT#2
PGNT#3
PGNT#4
P24
VCCVK
GND
N11
P25
P26
M21
M22
M23
M24
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
GND
GND
GND
GND
GND
P11
R11
T11
L12
M12
N12
RN97
X_8P4R-4.7K
1 2
3 4
5 6
7 8
R417 X_4.7K
R376 X_4.7K
RN96
8P4R-2.7K
1 2
3 4
5 6
7 8
R416 2.7K
R375 2.7K
M25
VCCVK
VCCVK
GND
GND
P12
L19
VCCVK
GND
R12
3
M19
N19
P19
VCCVK
VCCVK
VCCVK
VLINK
CPU/APIC
GND
GND
GND
GND
GND
T12
L13
M13
N13
P13
VCC3
VCC
3
2
VCC2_5
C576
U23A
VLAD0
H25
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VD8
VD9
VD10
VD11
VD12
VD13
VD14
VD15
VPAR
VBE
UPCMD
DNCMD
UPSTB
UPSTB
DNSTB
DNSTB
VLREF
VCOMPP
VIIN
VIOUT
VCLK
A20M
FERR
IGNNE
INIT
INTR
NMI
SLP
SMI
STPCLK
APICCLK
APICD0/APICCS
APICD1/APICACK
DPSLP
GHI
PCICLK
GND
GND
GND
GND
GND
GND
GND
GND
R13
T13
L14
M14
N14
VT8235CE
P14
R14
T14
LAN_PIRQ 27
SATA_PIRQ 24
1394_PIRQ 26
VLAD1
G26
VLAD2
K26
VLAD3
J23
VLAD4
F26
VLAD5
G25
VLAD6
K22
VLAD7
K24
E24
G23
L26
L25
E26
E25
L24
M26
VPAR
F24
VBE0#
G24
UPCMD
K23
DNCMD
K25
UPSTB
J26
UPSTB#
J24
DNSTB
H26
DNSTB#
H24
VLREF_SB
H22
VCOMPP_SB
J22
G22
F23
VCLK
L22
A20M#
U26
FERR#
U24
IGNNE#
T24
CPUINIT#
R26
INTR
T25
NMI_SB
T26
SLP#
V26
SMI#
U25
STPCLK#
R24
APICCLK
U23
APICD0#
R25
APICD1#
T23
DPSLP# VLREF_SB
P21
GHI#
R22
SBPCLK
R23
1 3
K8T400M-CD(2-3)
K8T400M-CE(1-2)
LAN_PIRQ
SATA_PIRQ
1394_PIRQ
R345 360RST
2
R307 X_0
VLAD0 13
VLAD1 13
VLAD2 13
VLAD3 13
VLAD4 13
VLAD5 13
VLAD6 13
VLAD7 13
VPAR 13
VBE0# 13
UPCMD 13
DNCMD 13
UPSTB 13
UPSTB# 13
DNSTB 13
DNSTB# 13
VCLK 8
SLP# 18
APICCLK 8,19
SBPCLK 8
Default(2-3)
RN98 X_8P4R-0
1 2
3 4
5 6
7 8
RN99 8P4R-0
1 2
3 4
5 6
7 8
Title
X_104P/B
-LDTSTOP 6,12
DPSLP# SLP#
Ap Note : AN258
VT8237
PIRQ#E
PIRQ#F
PIRQ#G
VT8235
PIRQ#C
PIRQ#B
PIRQ#D
Micro Star Restricted Secret
VT8235 Part 1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
VCC3
C581
X_104P/B
Reserved for Test .
A20M#
IGNNE#
NMI_SB
SMI#
CPUINIT#
STPCLK#
INTR
FERR#
APICD0#
APICD1#
APICCLK
DPSLP#
GHI#
VLREF_SB =>
K8T400M= 0.65V ,
K8M400= 0.45V
V-Link ->
LVREF=0.625
Volt
MS-6761N1
Last Revision Date:
Sheet
1
C433 X_105P/BACK
C459 X_105P/BACK
C440 X_105P/BACK
C457 X_103P/BACK
C458 X_103P/BACK
C435 X_103P/BACK
RN80
X_8P4R-680
1 2
3 4
5 6
7 8
RN79
1 2
3 4
5 6
7 8
X_8P4R-680
R296 1K
R295 330
R294 330
R275 X_4.7K
R347 X_4.7K
R346 4.7K
RN104
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
STOP#
PIRQ#C
PIRQ#A
PIRQ#D
PIRQ#B
8P4R-2.7K
1 2
3 4
5 6
7 8
RN103
1 2
3 4
5 6
7 8
8P4R-2.7K
RN117
1 2
3 4
5 6
7 8
8P4R-2.7K
Thursday, January 16, 2003
17 36
of
1
VCC2_5
C382
104P/25V/Y5V
C369
104P/25V/Y5V
VCC
VCC
VCC3
Rev
VCC3
R324
3KST
R311
1KRST
0A
5
3VDUAL
R413 4.7K
R392 4.7K
R418 X_4.7K
VCC3
7 8
5 6
3 4
D D
1 2
R404 4.7K
R393 X_4.7K
VCC3
R403 10K
3VDUAL
R414 X_4.7K
R411 1M
VBAT
CTL_PLED1# 32
GPO1 SUSA#
VT8237(1-2) VT8235(2-3)
Strapping
VCC3
R371 4.7K
C C
Enable LPC ROM
R386 4.7K
Enable CPU FREQ
strapping
R374 4.7K
CTL_PLED1#
RN101
8P4R-4.7K
SUSC#
R415
2
X_0
1 3
VT8235CE
SPKR
SXO
INTRUDER
SXI
Enable Auto Reboot
R319 X_1K
R349 1K
*"PDA1/SDA1" => External loop test mode
0 - Disable (Default)
1 - Enable
VCC3
B B
VCC3
*"PDA0/SDA0" => LDT transmit timing control
0 - Disable (Default)
1 - Enable
R304 X_1K
VCC3
R344 1K
VCC3
*"PDA2/SDA2" => ROMSIP Select
0 - Disable
1 - Enable(Default)
SDCS#1
A A
*Eliminate Lan EEPROM
0 - Enable(Default)
1 - Disable
PDA1
SDA1
SDA0
2
1 3
R348 4.7K
PDA0
2
1 3
R318 X_4.7K
R352 X_10K
SDCS#3
R355 1K
PDCS#3
R289 X_1K
Default(2-3)
GPO0
SUSA#
AGPBZ#
VGATE
VRDSLP
VIDSEL
CLKRUN# 17
SUSB#
THRM#
Default(2-3)
VT8235
VT8235
VT8237
VT8235
VT8235
VT8237
PDA2
VT8237
SDA2
VT8235
VT8235
VT8235
VT8237
5
5VSB
R427 1K
VBAT1
BATTERY
VBAT
R431
3K
R422
1 2
A C
1K
C453 10P
C452 10P
R412 4.7K
VCC2_5
VCC3
L31 X_L02-8008044-J07
D20
1N4148S
D19
1N5817S
Y5
32.768KHZ
SB_OSC14 8
PWROK_NB# 13,19
ALL_PWRGD 32
RSMRST# 32
RI# 19,30
EXTSMI# 19,29,32
PCI_PME# 16,19,20,21,22,26,27,29
ATADET1 25
BATLOW# 19
SUSST# 13,19
SUSCLKIN 19
SUSB# 16,31,32
SUSC# 31,32
CLKRUN# 19
CPUSTP# 19
PCISTP# 19
THRM# 6,29
CPUMISS 19
SMBALRT# 19
SMBCLK1 8,9,27
SMBDATA1 8,9,27
SPKR 32
SERIRQ 19,29
GPO0 27
ATADET0 25
R377 4.7K
VCC3
R378 4.7K
KBCLK# 30
KBDAT# 30
MSCLK# 30
MSDAT# 30
L32 X_L02-8008044-J07
CP15
X_COPPER
CP14
X_COPPER
C456
PWRBTN#_S PWBTIN#
104P/25V/Y5V
4
VBAT
JBAT1
1
2
3
YJ103
C469
EC35
+
X_103P
X_47U/6.3V
AF4
VBAT
AE4
RTCX1
AF3
RTCX2
AB8
TEST
AD10
AC10
AB10
AE11
AF11
AF1
AC5
AD2
AD4
AA1
AC1
AB3
AA2
AD3
AF2
AB7
AC7
AD6
AE1
AB9
AC8
AC9
AB1
AC4
AB2
AC3
AD1
AF8
AD9
AE3
AA3
AC2
AE2
AE5
AD5
AF5
AC6
AF9
AE9
Y2
W4
V4
Y3
Y4
Y1
W3
V1
W1
W2
OSC
PWROK
PWRGD
PWRBTN
RSMRST
RING
EXTSMI
PME
LID
BATLOW
SUSST1
SUSCLK
SUSA
SUSB
SUSC
CLKRUN
CPUSTP
PCISTP
AOLGP/THRM
CPUMISS
INTRUDER
AGPBZ/GPI6
VRDSLP
VIDSEL
VGATE
SMBALRT
SMBCK1
SMBDT1
SMBCK2
SMBDT2
SPKR
SERIRQ
GPO1
GPO0
GPI1
GPI0
GPIOA/Strap1
GPIOB/Strap2
GPIOC/Strap0
GPIOD/Strap3
TPO
TEST
KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12
VDDA0
GNDA0
VDDA33
GNDA33
PWROK_NB#
ALL_PWRGD
PWRBTN#_S
RSMRST#
RI#
EXTSMI#
PCI_PME#
ATADET1
BATLOW#
SUSST#
SUSCLKIN PDCS#3
SUSA#
SUSB#
SUSC#
CLKRUN#
CPUSTP#
PCISTP#
THRM#
CPUMISS
INTRUDER
AGPBZ#
VRDSLP
VIDSEL
VGATE
SMBALRT#
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
SPKR
SERIRQ
GPO1
GPO0
ATADET0
GPI0
GPIOA
GPIOB
GPIOC
GPIOD
C437
X_104P
C438
X_104P
R402 68
4
VCC2_5 VSUS2_5
C575
C577
X_104P/B
X_104P/B
J9
K9
L9
M9
VDD
VDD
VDD
N9P9R9T9U9V9V10
VDD
VDD
VDD
VDD
VDD
VDD
VDD
J10
J11
VDD
VDD
PMU/AOL IDE
KBC
GND
GND
GND
GND
GND
GND
GND
GND
GND
L15
L16
M15
N15
P15
R15
T15
PWBTIN# 19,30,32
GND
GND
GND
GND
GND
GND
GND
M16
N16
P16
GND
K18
R16
T16
AE17
AB18
AC18
K19
AB19
VDD
GND
V11
VDD
GND
AE19
C580
X_104P/B
J12
V12
VDD
VDD
GND
GND
R21
J21
3
C578
C583
X_104P/B
X_104P/B
VSUS2_5 VCC2_5
V13
V14
V15
V16
V17
L18
M18
N18
P18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
T4
R18
T18
U18
V18
VDD
VDD
VDD
VDD
C393
104P/25V/Y5V
U4
VSUS25
VSUS25
3VDUAL
AA4
AB4
VSUS33
AB5
AB6
VSUS33
VSUS33
C584
X_104P/B
VSUS33
W12
W13
VDDATS
W14
W15
VDDATS
VDDATS
VDDATS
AB11
W16
VDDAS
VDDATS
AB17
VDDAS
AC11
VDDAS
SATA
GNDATS
GNDATS
AD15
AD16
GNDATS
AE12
AE14
GNDATS
GNDATS
GNDATS
AE16
AF12
SMBDATA2
SMBCLK2
SMBCLK1
SMBDATA1
GNDATS
AF14
AF16
GNDATS
GNDAS
AB12
AC12
GNDAS
GNDAS
AB16
RN110
8P4R-1K
GNDAS
AC16
GNDATS
GNDATS
GNDATS
GNDATS
GND
GND
GND
GND
GND
GND
GND
GND
GND
AB22
3
AE22
GND
H23
F25
J25
W25
AB25
AE25
T21
AA21
W22
GND
AB14
AC14
AD12
AD13
GNDATS
AD14
AC17
VDDAS
C426
X_104P
PDDREQ
SDD0/TBC1
SDD1/VALID
SDD3/RXD2
SDD4/RXD3
SDD5/RXD4
SDD6/RBC0
SDD7/RBC1
SDD8/RXD5
SDD9/RXD6
SDD10/RXD7
SDD11/RXD8
SDD12/RXD9
SDD13/TXD0
SDD14/TXD1
SDD15/TXD2
SDA0/TXD6
SDA1/TXD5
SDA2/TXD7
SDCS1/TXD8
SDCS3/TXD9
SDDACK/TBC0
SDDRQ/RXD1
SDIOW/TXD3
SDIOR/TXD4
SDRDY/RXD0
SCOMPP
SXI/Strap5
SXO/Strap4
3VDUAL
7 8
VCC3
5 6
3 4
1 2
2
L29 X_L02-8008044-J07
C420
X_104P
U23B
AA22
PDD0
Y24
PDD1
AA26
PDD2
AA25
PDD3
AB26
PDD4
AC26
PDD5
AC23
PDD6
AD25
PDD7
AD26
PDD8
AC24
PDD9
AC25
PDD10
AB24
PDD11
AB23
PDD12
AA24
PDD13
Y26
PDD14
AA23
PDD15
W23
PDA0
V25
PDA1
W24
PDA2
V22
PDCS1
V23
PDCS3
V24
PDDACK
Y23
AD24
IRQ14
Y25
PDIOW
W26
PDIOR
Y22
PDRDY
AC20
AB20
AC21
SDD2
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AF24
AC22
AE24
AF25
AF26
AD23
AD17
AE26
IRQ15
AE23
AF23
AF17
AB13
STXP1
AC13
STXN1
AF13
SRXN1
AE13
SRXP1
AB15
STXP2
AC15
STXN2
AF15
SRXN2
AE15
SRXP2
AC19
SVREF
AB21
AD11
SREXT
AF10
AE10
VT8235CE
2
VCC2_5
CP13
X_COPPER
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
Title
PDD14
PDD15
PDA0
PDA1
PDA2
PDCS#1
PDDACK#
PDREQ
IRQ14
PDIOW#
PDIOR#
PIORDY
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDA0
SDA1
SDA2
SDCS#1
SDCS#3
SDDACK#
SDREQ
IRQ15
SDIOW#
SDIOR#
SIORDY
STXP1_S
STXN1_S
SRXN1_S
SRXP1_S
STXP2_S
STXN2_S
SRXN2_S
SRXP2_S
SVREF
SCOMP
SREXT
SXI
SXO
PDD[15..0]
PDD[15..0] 25
PDA[2..0]
SDD[15..0]
SDA[2..0]
PDA[2..0] 25
SDD[15..0] 25
SDA[2..0] 25
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
C443
X_18P
Y4
C444 X_18P
PDCS#1 25
PDCS#3 25
PDDACK# 25
PDREQ 25
IRQ14 25
PDIOW# 25
PDIOR# 25
PIORDY 25
SDCS#1 25
SDCS#3 25
SDDACK# 25
SDREQ 25
IRQ15 25
SDIOW# 25
SDIOR# 25
SIORDY 25
C428 X_104P
C423 X_104P
C429 X_104P
C424 X_104P
C417 X_104P
C413 X_104P
C412 X_104P
C418 X_104P
X_25MHZ
Micro Star Restricted Secret
VT8235(CE) Part 2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
FM14
FM7
X
FM
PDDACK#
Disable external SATA PHY
PDCS#1
Disable SATA
Master/Slave
Mode
VT8237 Only
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
SVREF
SCOMP
SREXT
*"GPIO A C" => LDT Frequency
00 - 200MHz (Default)
01 - 400MHz
10 - 600MHz
11 - 800MHz
VCC3
Default(2-3)
VCC3
*"GPIO D" => Internal GTL pull up
0 - Enable (Default)
1 - Disable
VCC3
VCC3
MS-6761N1
Last Revision Date:
Thursday, January 16, 2003
Sheet
18 36
1
FM15
X
X
FM
FM
R325 X_4.7K
R277 X_4.7K
SATA2
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
X_SATA
SATA1
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
X_SATA
C407 104P/25V/Y5V
R366 360RST
R372 5.11KST
R373 1.02KST
GPIOA
2
1 3
R380 4.7K
GPIOC
2
1 3
R382 4.7K
Default(2-3)
GPIOD
2
1 3
R384 4.7K
*"GPIO B" => IOQ depth
0 - 12 Level (Default)
1 - 1 Level
GPIOB
2
1 3
R379 4.7K
Default(2-3)
of
VCC3
VCC3
Rev
0A
5
D D
VSUS2_5
VSUS2_5 VSUS2_5
C414
C411
104P/25V/Y5V
104P/25V/Y5V
C C
VCC2_5
R368 2.2
C430
105P/10V/Y5V
CP7
X_COPPER
VCC2_5
B B
VCC2_5
A A
L24
X_L02-8008044-J07
L25
X_L02-8008044-J07
CP8
X_COPPER
CP11
X_COPPER
L26
X_L02-8008044-J07
L27
X_L02-8008044-J07
CP12
X_COPPER
5
LPC_FRAME# 29
C383
105P/10V/Y5V
C391
105P/10V/Y5V
3VDUAL
SEEDI
LPC_AD0 29
LPC_AD1 29
LPC_AD2 29
LPC_AD3 29
LPC_REQ# 29
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_REQ#
AD8
AE7
AD7
AE6
AE8
4
VCC3
H9
H10
H11
H12J8K8L8M8N8P8R8T8U8V8W8W9
D12
MIISUS25
E12
MIISUS25
A11
MCRS
B11
MCOL
A7
MDCK
B7
MDIO
A10
MTXD0
B10
MTXD1
B9
MTXD2
A9
MTXD3
C11
MTXENA
C10
MTXCLK
C8
MRXD0
B8
MRXD1
A8
MRXD2
C7
MRXD3
D8
MRXDV
D10
MRXER
C9
MRXCLK
E7
RAMVCC
E6
RAMGND
D9
MIIVCC
E9
MIIVCC
E10
MIIVCC
E11
MIIVCC
D11
EECS
B12
EEDO
A12
EEDI
C12
EECK
D7
PHYRST
LAD0
AF7
LAD1
LAD2
LAD3
AF6
LFRM
LREQ0
LREQ1
T22
PLLVCC
U22
PLLGND
A23
PLLVDDA
B23
PLLVDDA
C23
PLLGNDA
D23
PLLGNDA
4
MII
LPC
ANALOG
POWER
USBGND
USBGND
USBGND
USBGND
A13
A15
A17
A19
VCC33
VCC33
USBGND
USBGND
A21
B13
VCC33
VCC33
USBGND
USBGND
B15
B17
VCC33
VCC33
USBGND
USBGND
B19
B21
VCC33
VCC33
USBGND
USBGND
C13
C14
C15
VCC33
USBGND
C16
VCC33
VCC33
USBGND
USBGND
C17
C18
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
C19
C20
VCC33
VCC33
USBGND
USBGND
C21
D13
W10
W11
VCC33
USBGND
D15
D17
W17
W18
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
D19
D21
R19
T19
VCC33
VCC33
USBGND
USBGND
E13
E15
U19
V19
VCC33
VCC33
USBGND
USBGND
E17
E19
3
W19
V21
VCC33
VCC33
USBGND
USBGND
E21
H13
3
W21
Y21
VCC33
VCC33
USB
USBGND
USBGND
H14
H15
USBGND
USBGND
H16
H17
H18
ACSDIN3/SLP_BTN
USBGND
2
VCC3 VCC3
EC32
+
X_1000U/6.3V
C574
X_104P/B
C582
X_104P/B
C579
X_104P/B
Place on Solder side
U23C
AC_BITCLK
ACBITCLK
ACSDIN0
ACSDIN1
ACSDIN2
ACSYNC
ACSDO
ACRST
USBP0+
USBP0-
USBP1+
USBP1-
USBP2+
USBP2-
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBP6+
USBP6-
USBP7+
USBP7-
USBOC0
USBOC1
USBOC2
USBOC3
USBOC4
USBOC5
USBOC6
USBOC7
USBCLK
USB REXT
USBSUS25
UDPWR
UDPWREN
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
VT8235CE
T1
U3
V2
U1
V3
T2
U2
T3
E20
D20
A20
B20
E18
D18
A18
B18
D16
E16
A16
B16
D14
E14
A14
B14
C26
D24
B26
C25
B24
A24
A26
A25
E23
R363 5.11KST
B25
C24
D26
D25
J18
J17
J16
J15
J14
J13
F22
E22
D22
C22
B22
A22
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SDIN3
ACSYNC
USBP0
USBN0
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP4
USBN4
USBP5
USBN5
USB_OC#1
USB_OC#3
USB_OC#5
USBCLK_SB
UDPWR
UDPWREN
7 8
5 6
3 4
1 2
VSUS2_5
R343 10K
EC26
C387
+
10U/16V-S
104P/25V/Y5V
AC_BITCLK 23
AC_SDIN0 23
RN108
AC_SYNC
AC_SDOUT
AC_RST#
8P4R-22
USBP0 28
USBN0 28
USBP1 28
USBN1 28
USBP2 28
USBN2 28
USBP3 28
USBN3 28
USBP4 28
USBN4 28
USBP5 28
USBN5 28
USB_OC#1 28
USB_OC#3 28
USB_OC#5 28
USBCLK_SB 8
R362 1KRST
L28
UDPWREN
X_L02-8008044-J07
CP10
X_COPPER
Title
AC_SYNC 23
AC_SDOUT 23
AC_RST# 23
3VDUAL
C396
104P/25V/Y5V
Micro Star Restricted Secret
VT8235(CE) Part 3
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
C455
X_104P
8237 strapping
0: Enable Auto
Reboot
VT8237
VT8237
CPUSTP# 18
LPC_REQ# 29
SERIRQ 18,29
SLP# 18
PCISTP# 18
APICCLK 8,17
PWROK_NB# 13,18
SUSST# 13,18
SUSCLKIN 18
SMBALRT# 18
EXTSMI# 18,29,32
PCI_PME# 16,18,20,21,22,26,27,29
PWBTIN# 18,30,32
CPUMISS 18
RI# 18,30
BATLOW# 18
MS-6761N1
Last Revision Date:
Sheet
1
AC_SDIN1
AC_SDIN2
AC_SDIN3
ACSD0 ACSD0
ACSYNC
RN105
1 2
3 4
5 6
7 8
8P4R-4.7K
VCC3
R409
VT8237
X_2.7K
R410
X_4.7K
R408 X_4.7K
Enable LPC ROM
SEEDI
R367 X_4.7K
SB Pull up resistors
CPUSTP#
LPC_REQ#
SERIRQ
SLP#
PCISTP#
APICCLK
PWROK_NB#
SUSST#
SUS_CLK
SMBALRT#
EXTSMI#
PCI_PME#
PWBTIN#
CPUMISS
RI#
BATLOW#
RN102
1 2
3 4
5 6
7 8
8P4R-4.7K
R370 4.7K
R276 X_4.7K
RN109
1 2
3 4
5 6
7 8
8P4R-4.7K
RN107
1 2
3 4
5 6
7 8
8P4R-4.7K
RN106
1 2
3 4
5 6
7 8
8P4R-4.7K
Rev
Thursday, January 16, 2003
19 36
of
1
VCC3
3VDUAL
0A
5
PCI Connectors
IDSEL = AD16
MASTER = PREQ#4
PIRQ#A
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
VCC3
VCC
D D
PIRQ#B 16,17,21,22
PIRQ#D 17,21,22
PCICLK1 8 PCICLK2 8
PREQ#4 17
C C
IRDY# 17,21,22,24,26,27
DEVSEL# 17,21,22,24,26,27
PLOCK# 21,22
PERR# 17,21,22,24,26,27
SERR# 17,21,22,24,26,27
B B
ACK64# 21,22
-12V
PIRQ#B PIRQ#C
PIRQ#D
PCICLK1
PREQ#4
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR# SDONE
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
4
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
3
AD[31..0] 17,21,22,24,26,27
C_BE#[3..0] 17,21,22,24,26,27
AD[31..0]
C_BE#[3..0]
2
IDSEL = AD17
MASTER = PREQ#5
1
PIRQ#B
VCC
+12V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#A
PIRQ#A 16,17,21,22
PIRQ#C 17,21,22
PCIRST2#
PGNT#4
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64# ACK64# ACK64# REQ64#
PCIRST2# 8,17,21,22
PGNT#4 17
PCI_PME# 16,18,19,21,22,26,27,29
AD16 AD17
FRAME# 8,17,21,22,24,26,27
TRDY# 17,21,22,24,26,27
STOP# 8,17,21,22,24,26,27
SDONE 21,22
SBO# 21,22
PAR 17,21,22,24,26,27
REQ64# 21,22
PIRQ#C
PIRQ#A
PCICLK2
PREQ#5 17
PREQ#5
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
VCC
-12V +12V VCC3 VCC3
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
VCC
VCC3
A1
A2
A3
A4
TDI
A5
+5V
+5V
+5V
+5V
+5V
+5V
+5V
PIRQ#B
A6
PIRQ#D
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
3VDUAL 3VDUAL
PCIRST2#
PGNT#5
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
PGNT#5 17
R364 100 R365 100
YSLOT120
N11-1200031-A10
VCC
PLOCK#
R470 2.7K
A A
5
ACK64#
REQ64#
SDONE
SBO#
RN118
1 2
3 4
5 6
7 8
8P4R-2.7K
4
3VDUAL
3
C447
X_104P
YSLOT120
N11-1200031-A10
Title
Micro Star Restricted Secret
PCI Connector 1 & 2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
MS-6761N1
Last Revision Date:
Sheet
Tuesday, January 14, 2003
20 36
of
1
Rev
0A
5
4
3
2
1
PCI Connectors
D D
PIRQ#D 17,20,22
PIRQ#B 16,17,20,22
PCICLK3 8 PCICLK4 8
PREQ#6 8
C C
IRDY# 17,20,22,24,26,27
DEVSEL# 17,20,22,24,26,27
PLOCK# 20,22
PERR# 17,20,22,24,26,27
SERR# 17,20,22,24,26,27
B B
ACK64# 20,22 REQ64# 20,22
-12V +12V -12V
PIRQ#D PIRQ#A
PIRQ#B
PCICLK3
PREQ#6
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
ACK64#
IDSEL = AD18
MASTER = PREQ#6
PIRQ#C
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
VCC3
PCI3
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
+5V
A11
A12
A13
A14
A15
A16
+5V
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
+5V
A60
A61
+5V
A62
+5V
VCC
VCC3
PIRQ#C
PCIRST2#
PGNT#6
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD13
AD9
AD6
AD2
AD[31..0] 17,20,22,24,26,27
C_BE#[3..0] 17,20,22,24,26,27
AD[31..0]
C_BE#[3..0]
IDSEL = AD19
MASTER = PREQ#7
PIRQ#D
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
VCC
VCC3
PIRQ#C 17,20,22
PIRQ#A 16,17,20,22
PCIRST2# 8,17,20,22
PGNT#6 8
PCI_PME# 16,18,19,20,22,26,27,29
R400 100 R428 100
FRAME# 8,17,20,22,24,26,27
TRDY# 17,20,22,24,26,27
STOP# 8,17,20,22,24,26,27
SDONE 20,22
SBO# 20,22
PAR 17,20,22,24,26,27
PREQ#7 8
PIRQ#A
PIRQ#C
PCICLK4
PREQ#7
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PCI4
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
TDI
+5V
+5V
+5V
+5V
+5V
+5V
+5V
VCC3 VCC
VCC
+12V
A1
A2
A3
A4
A5
PIRQ#D
A6
PIRQ#B
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
3VDUAL 3VDUAL
PCIRST2#
PGNT#7
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ64# ACK64# REQ64#
PGNT#7 8
AD19 AD18
YSLOT120
N11-1200031-A10
A A
5
4
3
YSLOT120
N11-1200031-A10
Title
Micro Star Restricted Secret
PCI Connector 3 & 4
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
MS-6761N1
Last Revision Date:
Sheet
Tuesday, January 14, 2003
21 36
of
1
Rev
0A
5
4
3
2
1
PCI Connectors
IDSEL = AD20
MASTER = PREQ#8
D D
PIRQ#B
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
VCC3 VCC3
VCC VCC
+12V
-12V
PIRQ#C PIRQ#D
PIRQ#C 17,20,21
PIRQ#A 16,17,20,21
PCICLK5 8
C C
B B
PREQ#8 8
DEVSEL# 17,20,21,24,26,27
PLOCK# 20,21
PIRQ#A
PREQ#8
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
IRDY# 17,20,21,24,26,27
DEVSEL#
PLOCK#
PERR#
PERR# 17,20,21,24,26,27
SERR#
SERR# 17,20,21,24,26,27
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
ACK64# 20,21 REQ64# 20,21
PCI5
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#B
3VDUAL
PCIRST2#
PGNT#8
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64# ACK64#
PIRQ#B 16,17,20,21
PIRQ#D 17,20,21
PCIRST2# 8,17,20,21
PGNT#8 8
PCI_PME# 16,18,19,20,21,26,27,29
R461 100
FRAME# 8,17,20,21,24,26,27
TRDY# 17,20,21,24,26,27
STOP# 8,17,20,21,24,26,27
SDONE 20,21
SBO# 20,21
PAR 17,20,21,24,26,27
AD20
8235 AD27 for USB
AD28 for SB
AD29 for LAN
YSLOT120
N11-1200031-A10
AD[31..0] 17,20,21,24,26,27
C_BE#[3..0] 17,20,21,24,26,27
A A
5
VCC3
C461
X_104P
C421
X_104P
C425
X_104P
4
AD[31..0]
C_BE#[3..0]
3VDUAL
C388
X_104P
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
http://www.msi.com.tw
2
Micro Star Restricted Secret
PCI Connector 5
MS-6761N1
Last Revision Date:
Tuesday, January 14, 2003
Sheet
22 36
of
1
Rev
0A
5
4
3
2
1
AUDIO CODEC
HP_OUT_R
HP_OUT_L LINE_OUT_L
D D
C C
B B
CODEC VCC3_3 NEED CAP
AS CLOSE AS POSSIBLE.
C431
X_22P
C409
X_10P
AC_SDOUT 19
AC_BITCLK 19
AC_SDIN0 19
AC_SYNC 19
AC_RST# 19
AC_14 8
R383
C449 X_10P
R381 0
GND
AC_BITCLK
GND
Y3
X_24.576MHZ
R369
X_1M
33
10mil
10mil
C442
X_22P
C415
104P/25V/Y5V
For EMI
C408
X_10P
C441
104P/25V/Y5V
VCC3
L30
1
2
R360 4.7K
R359 4.7K
601S/0603
1
2
3
4
5
6
7
8
9
10
11
12
SPDIFO
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
NC
CD_GND
AUXL
AUXR
10mil
5mil
10mil
EPAD
R398
R399
4.7K
4.7K
ID#0
ID#1
4847464544424140394338
NC
ID1#
ID0#
EPAD
SPDIF
AVSS3
AVDD3
HP_OUT_R
PHONE
AUXL
AUXR
JS1
JS0
CDLNCCDR
1314151617181920212223
JS1
JS0
AVSS2
AVDD2
HP_OUT_L
MIC1
MIC2
LINL
CD_GND
C405
104P/25V/Y5V
37
MONO
LINR
24
LOUTR
LOUTL
AVDD4
AVSS4
AFILT4
AFILT3
AFILT2
AFILT1
VREFOUT
VREF
AVSS1
AVDD1
AD1981B
U24
EC31 10U/16V/S
EC30 10U/16V/S
+5VR
L33
80_0805
C439
36
35
34
33
32
31
30
29
28
27
26
25
C410
104P/25V/Y5V
10mil
AUXR
C403 105P/0805/16V
AUXL
C404 105P/0805/16V
+
+
R397
1K
104P/25V/Y5V
AFILT4
AFILT3
AFILT2
AFILT1
VREFOUT
CODEC_VREF
C416
104P/25V/Y5V
C399 105P/0805/16V
C394 105P/0805/16V
C400 105P/0805/16V
C395 105P/0805/16V
C401
105P/0805/16V
C402
105P/0805/16V
1 2
1 2
R394
1K
EC28
+
10U/16V/S
LINE_IN_R
LINE_IN_L
MICIN2
MICIN
HP_OUTR
R396
HP_OUTL
R395
Mute1
D14 1N4148S
EPAD
R401 10K
EC27
C422
+
10U/16V/S
104P/25V/Y5V
JTV1
4
3
to TV board
2
1
YJ104-B
AUX1
4
3
2
AUX_IN Header
1
YJ104-BY
1
2
3
D16
1PS226
C427
270P
47
47
Q49
2N3904S
1
2
A C
EC34
+
10U/16V/S
C432
270P
3
D17
1PS226
R406 270
C434
C436
270P
270P
LINE_OUT_R
Q50
2N3904S
Q51
2N3904S
L22
1 2
301S/0603
+5VR
L14
1 2
301S/0603
C281
102P
6
7
8
9
17
C255
L15 601S/0603
102P
D16,D17 = SHORT ---- 4.5%
D16,D17 = 1SS355 ----2.6%
D16,D17 = 1SS380 ----0.1~0.05%
WHQL PC2001<= 0.056%
VREFOUT
VREFOUT
MICIN2
MICIN
LINE_IN_R
LINE_IN_L
R350 2.2K
R351 2.2K
L19
1 2
301S/0603
1 2
301S/0603
L21
Plastic
optical
fiber
VCC
C244
0.1u/25V/Y5V
A A
C249
X_10P
SPDIFO
R187
4.7K
transmit
connector
with door
2
VCC
3
IN
1
GND
5
SPDIF1
SPDIF-D3
+12V +5VR +12VR
R444
3.3/1206
C480
X_104P/25V
+
EC37
X_100u/16V
4
U28
YLT1087S-0.8A
3 2
VIN VOUT
ADJ
1
R424
100RST
R423
300RST
+
EC36
100u/16V
C468
104P/25V/Y5V
3
14.318MHz
24.576MHz
Internal pullup
ID#0 ID#1
0 0
1 1
Title
Micro Star Restricted Secret
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
AD1981B
J4A PHONE_JACK
LINE_OUT
2 1
THD at 1Vrms
L16
1 2
301S/0603
C274
102P
1 2
C279
102P
MS-6761N1
C265
102P
L20
301S/0603
C278
L13 601S/0603
102P
L12
Last Revision Date:
Thursday, January 16, 2003
Sheet
10
11
LINE_IN
12
13
18
L17 601S/0603
2 1
1
2
4
5
3
C390 X_104P
C478 X_104P
23 36
1
J4C PHONE_JACK
MIC_IN
2 1
80_0805
of
J4B PHONE_JACK
14
15
16
Rev
0A
5
Serial ATA Controller
VCC3
L34
F301S0805/BACK
D D
SATA
REQ#/GNT#2
AD[31..0] 17,20,21,22,26,27
C_BE#[3..0] 17,20,21,22,26,27
C502
104P/25V/Y5V
104P/25V/Y5V
C504
104P/25V/Y5V
104P/25V/Y5V
AD24
AD[31..0]
C_BE#[3..0]
AD24
R467 100
FRAME# 8,17,20,21,22,26,27
TRDY# 17,20,21,22,26,27
DEVSEL# 17,20,21,22,26,27
PERR# 17,20,21,22,26,27
SERR# 17,20,21,22,26,27
SATA_PIRQ 17
PREQ#2 17
PGNT#2 17
PCIDEVRST#2 17,26,27
SATAPCLK 8
C489
C499
5
IRDY# 17,20,21,22,26,27
STOP# 8,17,20,21,22,26,27
PAR 17,20,21,22,26,27
C486
104P/25V/Y5V
C488
104P/25V/Y5V
PCIDEVRST#2
SATAPCLK
C485
104P/25V/Y5V
C487
104P/25V/Y5V
INTB#
C C
B B
VCC1_8
C503
104P/25V/Y5V
VCC3
A A
C505
104P/25V/Y5V
C586
C589
104P/BACK
103P/BACK
AD0
50
128
127
125
123
122
117
121
118
119
120
49
48
46
45
43
42
41
39
38
37
35
34
33
32
30
16
15
13
12
10
9
7
6
3
2
1
40
29
17
4
5
18
19
21
22
24
28
26
25
2
BAD0
BAD1
BAD2
BAD3
BAD4
BAD5
BAD6
BAD7
BAD8
BAD9
BAD10
BAD11
BAD12
BAD13
BAD14
BAD15
BAD16
BAD17
BAD18
BAD19
BAD20
BAD21
BAD22
BAD23
BAD24
BAD25
BAD26
BAD27
BAD28
BAD29
BAD30
BAD31
BCBE0N
BCBE1N
BCBE2N
BCBE3N
IDSEL
BFRAMEN
BIRDYN
BTRDYN
BDEVSELN
BSTOPN
PAR
PERRN
SERRN
INTA
PCIREQN
PCIGNTN
RESTN
CLK
VCC
1 2
R465
220
2.5VREF
VR3
3 1
YREG431S
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23 PHIOW#
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
PERR#
SERR#
SATA_PIRQ
C592
102P/BACK
VCC3
142744
1247593
VDDPIO0
VDDPIO1
VDDPIO2
PCI
R463
1 2
220
4
VCC1_8
8203177839460555954112
VCC0
VCC1
VCC2
VDDHIO1
R462
220
1 2
VCC3
GND0
GND1
GND2
112336477387100
VDDPIO3
VDDHIO0
4
VCC4
GND3
VCC5
GND4
C588
104P/BACK
VAA1
VSS1
H_VAA2
H_VSS2
IDE
SERIAL
GND5
GND6
GND7
126
VCC3 VCC1_8
+12V
Q59
U32B
8 4
LM358
I71-LM35803-T07
5
+
7
6
-
C585
103P/BACK
C593
102P/BACK
113
VAA2
VSS2
D
40N03
C591
102P/BACK
103P/BACK
PBDSD0/FD0
PBDSD1/FD1
PBDSD2/FD2
PBDSD3/FD3
PBDSD4/FD4
PBDSD5/FD5
PBDSD6/FD6
PBDSD7/FD7
PBDSD8/FA5
PBDSD9/FA6
PBDSD10/FA7
PBDSD11/FA8
PBDSD12/FA9
PBDSD13/FA10
PBDSD14/FA11
PBDSD15/FA12
PBDSA0/FA13
PBDSA1/FA14
PBDSA2/FA15
PBCS0N/FWN
PBCS1N/FOEN
DMACK0N
DMARQ0N
DINT0
PIORDN
PIOWRN
PCHRDY
PCBLID
DEVPRSTN
H_TX_P
H_TX_M
H_RX_M
H_RX_P
S_TX_P
S_TX_M
S_RX_M
S_RX_P
XTLIN
XTLOUT
ISET
HD_ACT
SCAN_TM
SCAN_EN
STEST
SDA
SCL
FCSN
PDC20375
S
R466
G
100RST
R471
220RST
3
L37
F301S0805/BACK
C590
104P/BACK
U31
PHD0
74
PHD1
78
PHD2
80
PHD3
85
PHD4
88
PHD5
90
PHD6
95
PHD7
97
PHD8
96
PHD9
91
PHD10
89
PHD11
86
PHD12
81
PHD13
79
PHD14
76
PHD15
72
PHDA0
67
PHDA1
68
PHDA2
65
PHCS0#
66
PHCS1#
64
PDMACK#
70
PDMARQ
71
PINTR#
69
PHIOR#
92
82
PHIORDY
84
PCBLID
98
DRVRST#
63
HTX+
52
HTX-
53
HRX-
56
HRX+
57
STX+
115
STX-
114
SRX-
111
SRX+
110
XTLI
62
XTLO
61
58
106
116
109
51
R450 10K
108
R451 10K
107
105
104
FA0
103
FA1
102
FA2
101
FA3
99
FA4
EC40
+
470U/10V
SATA power "VCC1_8" is
about 500mA , Power
trace width > 20 mils
.
3
EC38
+
10U/16V/S
L38
F301S0805/BACK C587
*
*
*
R458 12.1KST
HD_ACT
XTLI
XTLO
8 4
3
+
2
-
VCC3
C498
105P/10V/Y5V
VCC3
VCC3
R457
33KST
U32A
LM358
I71-LM35803-T07
1
D21
S_1N4148S
C490 20P
Y6
20MHz
C492 20P
2
reserve
DRVRST#
R440 X_33
R441 X_10K
R445
4.7K
R469
S_100
R446
82
RN115
PHD3
1 2
PHD12
3 4
5 6
PHD13
7 8
X_8P4R-33
RN113
PHD7
1 2
PHD8
3 4
PHD6
5 6
PHD9
7 8
X_8P4R-33
RN112
PHDA1
1 2
PHDA0
3 4
5 6
7 8
X_8P4R-33
C484
X_20P
HDDLED 32
Micro Star Restricted Secret
PHIORDY
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
R_PHD7
R_PHD6
R_PHD5
VCC3
R_PHD3
R_PHD2
R_PHD1
R_PHD0
RPDMARQ
RPHIOW#
RPHIOR#
RPDMACK#
PIDEINT
RPHDA1
RPHDA0
RPHCS0#
R_PHD3
R_PHD2
R_PHD13
R_PHD7
R_PHD8
R_PHD6
R_PHD9
RPHDA1
RPHDA0
RPHDA2 PHDA2
R442
RPDMARQ PDMARQ PINTR# PIDEINT
82
R439
10K
Serial ATA Controller
1
IDE3
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
X_A_YJ220-CB
RN114
PHD5
1 2
PHD10 R_PHD12
3 4
PHD4 PHD2
5 6
PHD11
7 8
X_8P4R-33
RN116
PHD1
1 2
PHD14
3 4
PHD0
5 6
PHD15
7 8
X_8P4R-33
PHIOW# RPHIOW#
R443 X_22
PHIOR#
R448 X_22
PDMACK#
R436 X_22
PHCS1#
R438 X_33
PHCS0#
R437 X_33
SER2
1
HTX+
HTX-
HRXÂHRX+
STX+
STX-
SRXÂSRX+
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
SATA
SER1
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
SATA
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
24 36
1
C483
X_20P
of
R447
82
R_PHD8
R_PHD9
R_PHD10
R_PHD11 R_PHD4
R_PHD12
R_PHD13
R_PHD14
R_PHD15
PCBLID
RPHDA2
RPHCS1#
R_PHD5
R_PHD10
R_PHD4
R_PHD11
R_PHD1
R_PHD14
R_PHD0
R_PHD15
RPHIOR#
RPDMACK#
RPHCS1#
RPHCS0#
R432
10K
Rev
0A
5
4
3
2
1
ATA 33/66/100 Connector
PDD[15..0] 18
PDD[15..0]
PRIMARY IDE CONN.
D D
C C
B B
HDDRST# 17
IDEACTP# 32
IDEACTS# 32
R227
HDDRST#
33
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
PDREQ_R
PDIOW#_R
PDIOR#_R
PIORDY_R
PDDACK#_R
IRQ14_R
PDA1_I
PDA0_I PDA2_I
PDCS#1_R
IDEACTP#
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CB
ATADET0_R
PDCS#3_R
SECONDARY IDE CONN.
R228
HDDRST#
33
SDD_7
SDD_6
SDD_5
SDD_4 SDD_11
SDD_3 SDD_12
SDD_2
SDD_1 SDD_14
SDD_0 SDD_15
SDREQ_R
SDIOW#_R
SDIOR#_R
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_I
SDA0_I
SDCS#1_R
IDEACTS#
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
YJ220-CW
ATADET1_R
SDA2_I
SDCS#3_R
PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15
SDD_8
SDD_9
SDD_10
SDD_13
R156
470
R153
C207
X_473P
RESVD
470
RN50 8P4R-0
SDA0_R
SDA0_I
C206
X_473P
PDA0_R
PDA0_I
SDD13
SDD11
SDD12
SDD8
PDD1
PDD13
PDD2 PDD0
PDD3
PDD11
PDD10
PDD5
PDD6
PDD4
PDD8
PDD9
PDD12
PDA[2..0] 18
IRQ15 18
VT8235
1 2
3 4
5 6
7 8
RN91
8P4R-22
RN85
8P4R-22
RN83
8P4R-22
RN90
8P4R-22
PDA[2..0]
IRQ15
SDA1
SDD14
SDD2 SDD_2
SDD1
SDD0
SDD7
SDD6
SDD4
SDD3
IRQ14
PDD7
SDA2
SDA0
RESVD
PDA0_I
PDA0_R
SDA0_I
SDA0_R
VCC
PIORDY_R
SIORDY_R
IDEACTP#
IDEACTS#
A A
IRQ14_R
IRQ15_R
R159 4.7K
R158 4.7K
R132 10K
R128 10K
R331 8.2K
R336 8.2K
5
VCC
VCC
PDREQ_R
SDREQ_R
PDD_7
SDD_7
ATADET0_R
ATADET1_R
R177 5.6K
R162 5.6K
R337 4.7K
R229 4.7K
R143 15K
R139 15K
SDA1_R
SDA1_I
PDA1_R
PDA1_I
PDA1_I
PDA1_R
SDA1_I
SDA1_R
4
RN51 X_8P4R-0
RN55 8P4R-0
RN61 X_8P4R-0
3
1 2
3 4
5 6
7 8
VT8237
VT8235
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VT8237
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN88
7 8
5 6
3 4
1 2
8P4R-22
RN87
7 8
5 6
3 4
1 2
8P4R-22
RN93
7 8
5 6
3 4
1 2
8P4R-22
RN86
7 8
5 6
3 4
1 2
8P4R-22
Q17
YFET-NDS7002AS
R121
1K
Q20
YFET-NDS7002AS
SDD_13
SDD_11
SDD_12
SDD_8
PDD_1
PDD_13
PDD_2
PDD_3
PDD_11
PDD_10
PDD_5
PDD_6
PDD_4
PDD_8
PDD_9
PDD_12
IRQ15_R
SDA1_R
SDD_14
SDD_1
SDD_0
SDD_7
SDD_6
SDD_4
SDD_3
IRQ14_R
PDD_7
SDA2_R
SDA0_R
PDDACK# 18
PIORDY 18
PDIOR# 18
PDIOW# 18
PDREQ 18
PDCS#1 18
PDCS#3 18
SDA[2..0] 18
SDA[2..0] SDD[15..0]
PDDACK#
PIORDY
PDIOR#
PDIOW#
PDREQ
PDD15
PDD14
PDCS#1
PDCS#3
PDA2
PDA0
PDA1
SIORDY 18
SDREQ 18
ATADET1 18
ATADET0 18
SDCS#1 18
SDCS#3 18
SDDACK# 18
SDIOR# 18
SDIOW# 18 IRQ14 18
To prevent the SB strapping error when system power on.
HDDRST#
R144
1K
HDDRST#
Title
HDDRST# 17
SDA2_I
SDA2_R
PDA2_I
PDA2_R
PDA2_R
PDA2_I
SDA2_R
SDA2_I
RN49 8P4R-0
RN48 X_8P4R-0
VT8235
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VT8237
Micro Star Restricted Secret
ATA 33/66/100 Connector
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
SDD[15..0] 18
SDD10
SDD9
SDD5
SIORDY
SDREQ
ATADET1
ATADET0
SDCS#1
SDCS#3
SDDACK#
SDIOR#
SDIOW#
SDD15
MS-6761N1
R241 22
R242 22
RN84
8P4R-22
RN89
8P4R-22
RN82
8P4R-22
Last Revision Date:
Sheet
PDDACK#_R
7 8
PIORDY_R
5 6
PDIOR#_R
3 4
PDIOW#_R
1 2
PDREQ_R
7 8
PDD_0
5 6
PDD_15
3 4
PDD_14
1 2
PDCS#1_R
PDCS#3_R
7 8
PDA2_R
5 6
PDA0_R
3 4
PDA1_R
1 2
RN95
7 8
5 6
3 4
1 2
8P4R-22
RN94
7 8
5 6
3 4
1 2
8P4R-22
R353 22
R354 22
RN92
7 8
5 6
3 4
1 2
8P4R-22
Q18
YFET-NDS7002AS
R120
1K
Wednesday, January 15, 2003
25 36
of
1
SDD_10
SDD_9
SDD_5
SIORDY_R
SDREQ_R
ATADET1_R
ATADET0_R
SDCS#1_R
SDCS#3_R
SDDACK#_R
SDIOR#_R
SDIOW#_R
SDD_15
HDDRST#
Rev
0A
5
REAR PANEL 1394 CONNECTOR FOR 1394 PORT A0,B0
TPBIAS1
R306
56.2RST
D D
J3
SHLD
PWR
TPB+
TPB-
TPA+
TPAÂGND
SHLD
H_1394 CON
N5G-06M0021-K06
C C
R302
5.11KST
C348
270p
SHIELDR
8
2
VCC_BUS
B+1
3
B-1
4
A+1
5
A-1
6
1
7
1M
R298
56.2RST
R301
56.2RST
B-1
B+1
A-1
A+1
C168 R111
103P
R316
56.2RST
C353
105P/16V/Y5V
X_CMC-L02-9007030-C71
TPA+1
TPA-1
TPB+1
TPB-1
L9
1
2
3
4
RN42
1 2
3 4
5 6
7 8
8P4R-0
Near Pin 116
8
7
6
5
REAR PANEL 1394 CONNECTOR FOR 1394 PORT A1,B1
TPBIAS2
R332
56.2RST
R323
5.11KST
C367
270p
B B
IEEEAGND_F
B-2 B+2
BUS_PWR1 BUS_PWR1
IEEEAGND_F
TPBIAS0
R283
56.2RST
A A
R282
5.11KST
C326
270p
R279
56.2RST
R341
56.2RST
R322
56.2RST
R328
56.2RST
J5
2
4
6
8 7
10
R286
56.2RST
R281
56.2RST
TPAÂGND
TPBÂVCC VCC
GND
Pin remove
ph2X5-1
5
TPA+
GND
TPB+
C337
105P/16V/Y5V
TPA+0
TPA-0
TPB+0
TPB-0
TPA+2
TPA-2
TPB+2
TPB-2
1
3
5
9
C384
105P/16V/Y5V
Near Pin 116
A+2
A-2
B+2
B-2
A+2 A-2
IEEEAGND_F
TPB-0
TPB+0
TPA-0 A-0
TPA+0 A+0
L35
X_CMC-L02-9007030-C71
1
8
2
7
3
6
4
5
RN120
1 2
3 4
5 6
7 8
8P4R-0
CP18 X
CP23 X
L8 X_CMC-L02-9007030-C71
1
8
2
7
3
6
4
5
RN33
1 2
3 4
5 6
7 8
8P4R-0
PGND
B-0
B+0
TPB-1
TPB+1
TPA-1
TPA+1
TPA+2
TPA-2
TPB+2
TPB-2
CP19
X
4
IEEE-1394
Don't support S3 wake-up
NEC 1394
REQ#/GNT#3
VCC
C381
C323
104P/25V/Y5V
pin19
BUS_PWR1
IEEEAGND
A+0
A-0
B+0
B-0
4
105P/0805/16V
pin60
BUS POWER
D25
BRS340-S-CASE403-03
C508
102P/50V
IEEEAGND_F
J2
5
SHLD
4
TPA+
3
TPA-
2
TPB+
1
TPB-
6
SHLD
IEEE1394-4
MINI 4PIN
3
VCC3 VCC3 VCC
VCC3
75
PIN_EN
74
AD[31..0]
AD[31..0] 17,20,21,22,24,27
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD25 INTD#
+12V
C_BE#[3..0]
FRAME# 8,17,20,21,22,24,27
IRDY# 17,20,21,22,24,27
TRDY# 17,20,21,22,24,27
DEVSEL# 17,20,21,22,24,27
STOP# 8,17,20,21,22,24,27
PERR# 17,20,21,22,24,27
SERR# 17,20,21,22,24,27
1394_PIRQ 17
PCIDEVRST#2 17,24,27
1394_PCLK 8
PCI_PME# 16,18,19,20,21,22,27,29
P3VA
PAR 17,20,21,22,24,27
PGNT#3 17
PREQ#3 17
C358
104P/25V/Y5V
C_BE#[3..0] 17,20,21,22,24,27
AD25
F5
1 2
SMD150-2
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
1394_PIRQ
R340 100
1394_RST#
1394_PCLK
R338 X_0
C343
104P/25V/Y5V
114
119
9
10
12
13
15
16
17
18
23
24
26
27
28
29
32
33
47
48
49
50
52
53
55
56
58
59
62
63
65
66
67
68
21
34
45
57
35
36
37
39
40
41
42
44
4
22
5
6
7
8
2
3
C317
104P/25V/Y5V
RSMRST
D3CSUP
CARD_ON
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3
CBE2
CBE1
CBE0
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
SERR
PAR
INTA
IDSEL
PRST
PCLK
GNT
REQ
CLKRUN
PME
112030384654616983848994106
C303
104P/25V/Y5V
GND
GND
19
PCI_VDD
GND
GND
+
60
PCI_VDD
GND
GND
EC20
47u
GND
1
L_VDD
L_VDD
GND
GND
L_VDD
L_VDD
GND
GND
VCC3
NEAR EACH POWER PIN
5
6
2 1
3
4
VCC3
EC41
+
C378
C339
104P/25V/Y5V
104P/25V/Y5V
3
C376
104P/25V/Y5V
47u
5143312514
64
L_VDD
L_VDD
L_VDD
GND
GND
C304
104P/25V/Y5V
2
827973
P_DVDD
P_DVDD
P_DVDD
GND
GND
GND
12076777880
113
C305
104P/25V/Y5V
2
P3VA
9095112
86
U19
P_AVDD
P_AVDD
P_AVDD
P_AVDD
72
PC2
71
PC1
R274 1K
70
PC0
91
GND
GND
GND
GND
115
C302
104P/25V/Y5V
TPB2N
TPB2P
TPA2N
TPA2P
TPBIAS2
TPB1N
TPB1P
TPA1N
TPA1P
TPBIAS1
TPB0N
TPB0P
TPA0N
TPA0P
TPBIAS0
P_RESETB
CPS
GROM_EN
GROM_SCL
GROM_SDA
IC(N)
C311
104P/25V/Y5V
Title
RI0
RI1
C349
X_104p
R261 9.1K
92
107
108
109
110
111
102
103
104
105
97
98
99
100
101
96
88
XO
87
XI
C306 104P/25V/Y5V
81
R266 390K
93
R265 100K
118
EECK
117
EEDI
116
85
NEC PD72874-E
EC19
+
47u
Micro Star Restricted Secret
1394a Link Layer Controller
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
TPB-2
TPB+2
TPA-2
TPA+2
TPBIAS2
TPB-1
TPB+1
TPA-1
TPA+1
TPBIAS1
TPB-0
TPB+0
TPA-0
TPA+0
TPBIAS0
Y2
24.576MHZ
1 2
R335 10K
VCC3
R333
10K
EEDI
EECK
1
CP5
VCC3
C318
12p
C308
12p
VCC3
VCC_BUS
VCC3
X_COPPER
L23
X_60_0805
BUS POWER
VCC_BUS
D5
C159
102P/50V
1 2
BRS340-S-CASE403-03
1394-EEPROM 24C02
U21 24C02
3
A2
2
A1
1
R334
10K
A0
7
WP
5
SDA
6
SCL
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
26 36
1
of
F1
SMD150-2
GND
VCC
P3VA
+12V
4
VCC3
8
Rev
0A
5
4
3
2
1
Lan - I82540
REQ#/GNT#1
INTC#
D D
C C
B B
A A
AD26
C_BE#[3..0] 17,20,21,22,24,26
C_BE#[3..0]
AD[31..0] 17,20,21,22,24,26
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
STUFF CLOSE TO CHIP
5VSB
R308
100K
LAN_VIO
C356
0.1u/25V/Y5V
GA_LAN_MDI0P
GA_LAN_MDI0N
GA_LAN_MDI1P
GA_LAN_MDI1N
GA_LAN_MDI2P
GA_LAN_MDI2N
GA_LAN_MDI3P
GA_LAN_MDI3N
0.01u/50V/X7R C285
R237 49.9_1%
R238 49.9_1%
R235 49.9_1%
0.01u/50V/X7R C284
R236 49.9_1%
0.01u/50V/X7R C283
R233 49.9_1%
R234 49.9_1%
0.01u/50V/X7R C282
R231 49.9_1% C341
R232 49.9_1%
5
AD[31..0]
N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8
KENAI32
U17A
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
82540EM_BGA-196
CBE0#
CBE1#
CBE2#
CBE3#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL#
DEVSEL#
REQ#
GNT#
INTA#
CLK
M66EN/PCIRST#
RST#/ISOLATE#
SERR#
PERR#
VIO
ZN_COMP/NC
ZP_COMP/NC
LAN_PWR_GOOD/ALTRST#
APM_WAKEUP/CSTCHG
AUX_PWR/FLSH_ADDR1
LAN_V25
PME#
R181
0_0805
C238
4.7u/0805
RJ45_V25
M4
L3
F3
C4
J1
F2
F1
G3
H1
A4
H3
C3
J3
H2
G1
C2
B9
A2
J2
G2
H4
G4
A9
A6
C5
J12
VCC1_5SB
10u_1206
LAN_ID_SEL
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PAR
R293 100
PREQ#1 17
PGNT#1 17
LAN_PIRQ 17
M66EN
SERR#
PERR#
LAN_VIO
ZN_COMP
ZP_COMP
LANRSMRST#
R244 3.3K
C346
C375
0.01u/50V/X7R
CP4
X_COPPER
4
PAR 17,20,21,22,24,26
FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
GLAN_PCLK 8
10p C321
R309 33.2_1%
R310 53.6_1%
PCI_PME# 16,18,19,20,21,22,26,29
LINKA1000#
FRAME# 8,17,20,21,22,24,26
IRDY# 17,20,21,22,24,26
TRDY# 17,20,21,22,24,26
STOP# 8,17,20,21,22,24,26
LAN_ID_SEL
DEVSEL# 17,20,21,22,24,26
PCIDEVRST#2 17,24,26
SERR# 17,20,21,22,24,26
PERR# 17,20,21,22,24,26
3VDUAL
C338
C362
0.1u/25V/Y5V
0.1u/25V/Y5V
ACTLED
GA_LAN_MDI0P
GA_LAN_MDI0N
GA_LAN_MDI1P
GA_LAN_MDI1N
3VDUAL
VCC3
GA_LAN_MDI2P
GA_LAN_MDI2N
GA_LAN_MDI3P
GA_LAN_MDI3N
R163 300
R299 0
U20
5
4 3
3VDUAL
3VDUAL
LAN_15
YELLOW : For
Active/Link
C204 103P
R145 300
GREEN/ORANGE
: For Speed
1
2
X_NC7S08-SOT23
TJ1
1
2
X_D1x2
C289
R361
3.3K
R315
3.3K
GREEN = 100Mbit
LILED
RJ45_V25
GPO0 18
SMBDATA1 8,9,18
SMBCLK1 8,9,18
LAN_EECS
LAN_SHCLK
LAN_EEDIN
LAN_EEDOUT
LILED
ACTLED
LINKA1000#
LAN_15
LAN_25
LAN_KX1
LAN_KX2
Y1
1 2
25M_18p
C288
22p
22p
Q47
PNP-BCP69-S-SOT223
Ic=1A
Ptot = 1.5W
C360
4.7u
Pin-21 Pin-22
USB2B
19
20
13
18
12
17
11
16
10
15
9
14
21
22
YMD20_#B
N58-22F0031-S42
C211
G_0/0805
AD26
3
R251
2.49K_1%
AMBER+
AMBER-
GREEN+
GREEN-
3VDUAL
B10
A10
M10
P10
N10
A12
C11
B11
B12
P11
B13
N14
P13
N13
M12
N11
K14
B14
POWER
GND
U17C
SMBALRT#
C9
SMBDATA
SMBCLK
P7
EE_CS
EE_SK
EE_DI
EE_DO
LINKA#/LINK_LED
ACT_A#/ACT_LED
LINKA100#/SPEED_LED
LINKA1000#/TO
CTRL_15/XTAL2
CTRL_25/RBIAS100
SDP0/IOCHRDY
SDP1/FLSH_ADDR9
SDP6/FLSH_ADDR10
SDP7/FLSH_ADDR12
M8
CLK_VIEW/FLSH_OE#
NC/XTAL1
XTAL1/FLSH_ADDR2
J14
XTAL2/FLSH_DATA7
PHY_REF/RBIAS10
82540EM_BGA-196
VCC1_5SB
C361
C333
0.1u/25V/Y5V
0.01u/50V/X7R
ORANGE = 1Gbit
TD1+
TD1ÂTD2+
TD2ÂTD3+
TD3ÂTD4+
TD4-
C328
0.1u/25V/Y5V
0.01u/50V/X7R
3VDUAL
LAN_25
R407
47K
C464
105P/10V/Y5V
C357
0.01u/50V/X7R
MDIA0-/TX-
MDIA0+/TX+
MDIA1-/RX-
MDIA1+/RX+
MDIA2-/FLSH_DATA0
MDIA2+/FLSH_DATA1
MDIA3-/FLSH_DATA4
MDIA3+/FLSH_DATA5
JTAG_TCK/FLSH_ADDR3
JTAG_TDI/FLSH_ADDR7
JTAG_TDO/FLSH_ADDR6
JTAG_TMS/FLSH_ADDR5
JTAG_TRST#/FLSH_ADDR4
TEST
NC/CLK_RUN#
R264
3.3K
Q45
PNP-BCP69-S-SOT223
Ic=1A
R272
Ptot = 1.5W
3.3K
3VDUAL 3VDUAL 3VDUAL
14
3 4
7
U27B
74HCT14/SOIC14_#A
T37-0741403-F01
C300
0.1u/25V/Y5V
GA_LAN_MDI0N
C14
GA_LAN_MDI0P
C13
GA_LAN_MDI1N
E14
GA_LAN_MDI1P
E13
GA_LAN_MDI2N
F14
GA_LAN_MDI2P
F13
GA_LAN_MDI3N
H14
GA_LAN_MDI3P
H13
R243
Title
L14
M13
M14
L12
L13
A13
C8
C334
4.7u
5 6
VCC3
3.3K
R258
3.3K
TYP 250mA
LAN_V25
C327
C319
0.1u/25V/Y5V
0.01u/50V/X7R
14
7
U27C
74HCT14/SOIC14_#A
T37-0741403-F01
LANRSMRST#
3VDUAL
Micro Star Restricted Secret
Intel 82540EM G-bit Lan
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
R247
3.3K
3VDUAL
LAN_V25
U17B
L7
NC/MODEM_CS#
H12
NC/FLSH_DATA6
J13
NC/FLSH_DATA0
A1
NC
A14
NC
D10
NC
D12
NC/TI
D14
NC/TCK
J4
NC
P1
NC
P14
NC
F12
PHY_TP/FLSH_DATA2
M9
FLSH_CE#/FLSH_WE#
N9
FLSH_SCK/FLSH_CE#
M11
FLSH_SI/FLSH_ADDR12
P9
NC/FLSH_ADDR9
A3
3VDD
A7
3VDD
A11
3VDD
E1
3VDD
K3
3VDD
K4
3VDD
K13
3VDD
N6
3VDD
N8
3VDD
P2
3VDD
P12
3VDD
D9
2.5AVDD/NC
D11
2.5AVDD/NC
G12
2.5AVDD/FLSH_DATA3
L8
2.5AVDD/NC
82540EM_BGA-196
3VDUAL
R246
4.7K
TYP 470mA
U15
8
VCC
7
NC
6
NC
5
GND
512*8_SOIC-8
MS-6761N1
Last Revision Date:
Sheet
Wednesday, January 15, 2003
VCC1_5SB
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND/TEXEC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
CS
2
SK
3
DI
4
DO
1
L10
E11
E12
G5
G6
G13
H5
H6
H7
H8
H11
J5
J6
J7
J8
J9
J10
J11
K5
K6
K7
K8
K9
K10
K11
L4
L5
L9
B3
D4
B7
C10
C12
D5
D6
D7
D8
D13
E2
E4
E5
E6
E7
E8
E9
E10
F4
F5
F6
F7
F8
F9
F10
F11
G7
G8
G9
G10
G11
G14
H9
H10
K2
K12
L6
L11
M6
N1
N12
P8
LAN_EECS
LAN_SHCLK
LAN_EEDIN
LAN_EEDOUT
of
1.5DVDD/3.3V
1.5DVDD/NC
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/NC
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
1.5DVDD/3.3V
27 36
Rev
0A
5
4
3
2
1
FRONT USB PORT
5V_STR
D D
C C
REAR USB PORT
5V_STR
USB_OC#3 19
B B
F3
1.5A-miniSMDC200/S
USB_OC#3
C214
104P/25V/Y5V
R150
47K
R151
56K
V_BUSB
EC9
+
1000U/6.3V
C196
X_104P
F4
1.5A-miniSMDC200/S
USB_OC#5 19
USBP4 19
USBN4 19
USBP5 19
USBN5 19
V_FUSB
USB_OC#5
C506
X_104P
L36
X_CMC-L02-9007030-C71
1
8
2
7
3
6
4
5
RN121
1 2
3 4
5 6
7 8
8P4R-0
47K
R474
R472
56K
USB_D5ÂUSB_D5+
USB_D4ÂUSB_D4+
+
EC42
1000U/6.3V
C507
X_104P
STACKED USB CONNECTOR
L11
X_CMC-L02-9007030-C71
1
USBP2 19
USBN2 19
USBP3 19
USBN3 19
For EMI
A A
2
3
4
RN59
1 2
3 4
5 6
7 8
8P4R-0
CP22
X_COPPER
8
7
6
5
USB_D3ÂUSB_D3+
USB_D2ÂUSB_D2+
PGND
5
USB2A
5
6
7
8
1
2
3
4
DOWN
YMD20_#B
N58-22F0031-S42
PGND PGND
4
UP
23
24
25
26
27
28
29
30
Close to USB Port
USBN3
USBP3
USBN2
USBP2
USBP1
USBN1
USBP0
USBN0
3
USBP1 19
USBN1 19
USBP0 19
USBN0 19
RN58
1 2
3 4
5 6
7 8
8P4R-15K
RN53
7 8
5 6
3 4
1 2
8P4R-15K
Close to USB Port
USBN5
USBP5
USBN4
USBP4
V_FUSB USB_D5+
USB_D4+
USB_D4-
5V_STR
USB_OC#1 19
L10
X_CMC-L02-9007030-C71
1
2
3
4
RN52
1 2
3 4
5 6
7 8
8P4R-0
RN119
1 2
3 4
5 6
7 8
8P4R-15K
JUSB1
2
4
6
8 7
10
8
7
6
5
USB1P
+5V
Pin remove
USB01N
USB0P
USB0N GND
Pin remove
ph2X5-1
F2
1.5A-miniSMDC200/S
USB_OC#1
USB_D0ÂUSB_D0+
USB_D1ÂUSB_D1+
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
GND
GND
C175
104P/25V/Y5V
1
3
USB_D5-
5
9
KBVCC
R123
47K
R116
56K
USB_D0-
EC8
+
1000U/6.3V
PGND PGND
USB1
9
1
2
3
4
12 11
USB*2/WO-LAN
N53-08M0031-F02
Micro Star Restricted Secret
USB Port
MS-6761N1
Last Revision Date:
Sheet
R118
C177
X_104P
X_47K
10
5
6
7
8
USB_D1ÂUSB_D1+ USB_D0+
PGND PGND
Wednesday, January 15, 2003
28 36
of
1
Rev
0A
5
Near SIO
Super I/O
D D
LPC_REQ# 19
S0 = Low( After Reset = Low)
R75
4.7K
VCC3
PCIRST# 13,17
SIOPCLK 8
SERIRQ 18,19
LPC_FRAME# 19
LPC_AD0 19
LPC_AD1 19
LPC_AD2 19
LPC_AD3 19
S3 = tri-state(VDD_25_SUS = 2.5V, High)
S3 = tri-state(VDD_25_SUS = 0V, Low)
PASSWORD_CLEAR
VCC
R21 X_4.7K
PLED 32
VCC
C44
X_104P
R28
4.7K
R25 4.7K
R27 4.7K
R26 4.7K
VTIN1
VTIN2
VCC3
C45
X_104P
SOUTB
C93 3900P/X7R
C92 3900P/X7R
C C
Distribute near the VCC
power pin of the LPC
Power-on strap, enable 48MHz
B B
VCC
SOUTA
RTSA#
DTRA#
R22 X_4.7K
VTIN2 6
VCORE
C94
X_104P
C496
X_104P
VREF
VTIN1
-5VIN
-12VIN
+12VIN
VAVCC
FANPWM1
FANIO1
FANPWM2
FANIO2
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
XA0
XA1
XA2
XA3
XA4
XA5
XA6
XA7
XA8
XA9
XA10
XA11
XA12
XA13
XA14
XA15
XA16
XA17
XA18
C46
X_104P
28
19
21
20
27
26
25
24
23
125
123
128
121
126
124
127
122
120
119
106
103
104
112
111
110
109
105
108
107
116
114
115
113
94
93
92
91
89
88
87
86
85
84
83
82
81
80
79
78
77
76
74
73
72
71
70
69
68
67
66
4
VCC3 VCC 5VSB
C61
104P/25V/Y5V
LRESET#
LCLK
SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
GPBX/GP13
GPAY/GP15
GPAS1/GP10
GSAS2/GP17
GPAX/GP12
GPBY/GP14
GPBS1/GP11
GPBS2/GP16
MSO/GP50
MSI/GP51
VREF
VTIN2
VTIN1
AGND
-5VIN
-12VIN
+12VIN
AVCC
+3.3VIN
VCORE
FANPWM1
FANIO1
FANPWM2
FANIO2
XD0/GP20
XD1/GP21
XD2/GP22
XD3/GP23
XD4/GP24
XD5/GP25
XD6/GP26
XD7/GP27
XA0/GP30
XA1/GP31
XA2/GP32
XA3/GP33
XA4/GP34
XA5/GP35
XA6/GP36
XA7/GP37
XA8/GP40
XA9/GP41
XA10/GP42
XA11/GP43
XA12/GP44
XA13/GP45
XA14/GP46
XA15/GP47
XA16/GP55
XA17/GP56
XA18/GP57
C19
X_104P
C49
104P/25V/Y5V
22
VCC3
SIO
5
457599
VCC
VCC
VSS
186090
C84
104P/25V/Y5V
VCC
VSS
VSS
VSB
VBAT
102
DRVDEN0
VBAT
WRDATA#
TRACK0#
RDDATA#
DSKCHG#
CASEOPEN#
OVT#/SMI#
MEMW#/GP52
MEMR#/GP53
ROMCS#/GP54
W83697HF-VF
B02-83697F4-W03
C90
X_104P
INDEX#
MOA#
DSB#
DSA#
MOB#
STEP#
HEAD#
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX
CIRRX
IRTX
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
CLKIN
PME#
BEEP
3
FLOPPY DISK HEADER
U6
DRVDEN0
1
INDEX#
2
MOA#
3
DSB#
4
DSA#
6
MOB#
7
DIR#
8
DIR#
STEP#
9
WRDATA#
10
WE#
11
WE#
TRACK0#
12
WP#
13
WP#
RDDATA#
14
HEAD#
15
DSKCHG#
16
PD0
42
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RIA#
RIB#
PE
41
40
39
38
37
36
35
29
30
31
32
34
43
33
44
46
64
100
65
53
48
51
49
52
47
50
54
62
56
59
57
61
55
58
63
17
98
101
118
117
97
96
95
PD1
PD2
PD3
PD4
PD5
PD6
PD7
IRRX
IRTX
RTSA#
SOUTA
DTRA#
SOUTB
R67 X_0
CHASISS
BEEP
SIO_SMI#
MEMW#
MEMR#
ROMCS#
N32-2173021-H06
FDD1 YJ217-D
PD[7..0]
RSLCT 30
RPE 30
RBUSY 30
RACK# 30
RSLIN# 30
RINIT# 30
RERR# 30
RAFD# 30
RSTB# 30
IRRX 32
IRTX 32
DCDA# 30
DSRA# 30
SINA 30
RTSA# 30
SOUTA 30
CTSA# 30
DTRA# 30
RIA# 30
SIO48M 8
PCI_PME# 16,18,19,20,21,22,26,27
R98 0
R99 X_0
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
PD[7..0] 30
THRM# 6,18
EXTSMI# 18,19,32
J6
YJ102
2
1
2
XA18
R35 X_0
R88 4.7K
VCC
2M BIOS => Install R638 , Delete R637 ,
4M BIOS => Install R637 , Delete R638 .
PASSWORD_CLEAR
R485
1 2
8.2K
R484
4.7K
VCC5
1 2
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
ROMCS#
MEMR#
MEMW#
XA0
XA1
XA2
XA3
XA4
XA5
XA6
XA7
XA8
XA9
XA10
XA11
XA12
XA13
XA14
XA15
XA16
XA17
1
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
1 22
VCC
U9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18 CE#
W49F002UP-Socket
N14-0320041-C09
PGM#
GND
VCC
OE#
SYSTEM BIOS
RN34
8P4R-4.7K
RN35
8P4R-4.7K
RN36
8P4R-4.7K
13
D0
14
D1
15
D2
17
D3
18
D4
19
D5
20
D6
21
D7
32
ROMCS#
MEMR#
24
MEMW#
31
16
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
Hardware Monitor
R85
10KST
R78
30KST
L6 X_80S/0805/2A
VCC
1 2
CP2 X_COPPER
RESVD
R86 28KST
+12V
R84 232KST
-12V
R83 120KST
-5V
10KST
VTIN1 VREF
SYSTEM Thermal
VTIN2
R87
SMD
SMD
CPU Thermal
R81
56KST
RT2 YT103S-1N
RT1 X_YT103S-1N
VCC
C106
X_104P
VAVCC
C21
104P/25V/Y5V
+12VIN
-12VIN
-5VIN
R82
56KST
VREF
Chasiss Intrusion Header
J1
1
VCC
MS-6761N1
R20 10K
2
X_YJ102
BEEP
Last Revision Date:
Sheet
+12V
CPU FAN
D1
X_1N4148S
R14
Q4
EC2
+
ELS47U/16V-C
3
4.7K
CFAN1
3
2
1
YJ103-BO
N32-1030011-C09
R2
FANIO1
27K
R6
10K
R23
Q1
2N3904S
R16
4.7K
1K
2N-SI2303DS
+12V
+12V +12V
R80
A A
R77
FANPWM2
10K
10K
R220
Q12
10K
2N3904S
R79
10K
5
D8 X_1N4148S
R212 4.7K
Q36
2N3904S
R214
10K
POWER FAN
R209
15K
PSFAN1
3
2
1
YJ103-BO
N32-1030011-C09
4
R211
FANIO2
27K
R213
10K
FANPWM1
R17
470
SYSTEM FAN
L18
1 2
0/0805
Title
SFAN1
3
2
1
YJ103-BO
N32-1030011-C09
Micro Star Restricted Secret
Winbond W697HF
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
R69
CHASISS
2M
ALARM 32
Q5
2N3904S
VBAT
Thursday, January 16, 2003
29 36
of
1
Rev
0A
5
D D
X_10U/16V/S
KBDAT# 18
KBCLK# 18
MSCLK# 18
MSDAT# 18
EC4
KBVCC
+
104P/25V/Y5V
L1 X_80S/1206
1 2
C33
CP1 X_COPPER
L3
1 2
121S/0603
L5 121S/0603
1 2
L4 121S/0603
1 2
L2 121S/0603
1 2
4
PWBTIN# 18,19,32
XKBDAT1
XKBCLK1
XMSCLK1
XMSDAT1
For EMI
C6
104P/25V/Y5V
PGND
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
13
1
5
3
15 17
PGND PGND
YMD12P-1
3
N56-12F0031-F02
16
10
12
8
7
11
9
MSDAT#
KBDAT#
MSCLK#
KBCLK#
RN1
1 2
3 4
5 6
7 8
8P4R-4.7K
2
Keyboard/Mouse Ports
KBVCC
R15
X_330
XKBCLK1
XMSCLK1
XKBDAT1
XMSDAT1
1 2
3 4
5 6
7 8
1
CN1
8P4C-180P
PGND
LPT1
VCC
C C
B B
PD[7..0] 29
C2 104P/25V/Y5V
+12V
A A
-12V
1N4148S
RTSA# NRTSA
RTSA# 29
DTRA# NDTRA
DTRA# 29
SOUTA NSOUTA
SOUTA 29
RIA# NRIA#
RIA# 29
CTSA# NCTSA#
CTSA# 29
DSRA# NDSRA#
DSRA# 29
SINA NSINA
SINA 29
DCDA# NDCDA#
DCDA# 29
D3
1N4148S
C77
X_104P
LPT / COM PORTS
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RERR#
RACK#
RSLCT
RPE
RBUSY
RAFD#
RSTB#
RSLIN#
RINIT#
RN21
8P4R-33
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN14
8P4R-33
D2
RERR# 29
RACK# 29
RSLCT 29
RPE 29
RBUSY 29
RAFD# 29
RSTB# 29
RSLIN# 29
RINIT# 29
PD[7..0]
U5
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232S
I95-7523212-T07
Multiple RS232 Drivers and Receivers
5
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
PRND0
PRND1
PRND2
PRND3
PRND4
PRND5
PRND6
PRND7
20
5
6
8
2
3
4
7
9
11
R96 4.7K
RN11
7 8
5 6
3 4
1 2
8P4R-4.7K
RN28
7 8
5 6
3 4
1 2
8P4R-4.7K
RN25
8P4R-4.7K
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN17
8P4R-4.7K
VCC
4
NDCDA#
NSINA
NSOUTA
NDTRA
D4
1N4148S
1
2
3
4
5
11 10
PGND
COM1
NDSRA#
6
NRTSA
7
NCTSA#
8
NRIA#
9
COM-PORT
N51-09M0021-F02
CP3 X_COPPER
L7
1 2
N51-25F0041-F02
NRTSA
NDSRA#
NCTSA#
NRIA#
NDTRA
NSINA
NSOUTA
NDCDA#
X_80S/1206
LPT
48
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
51
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
CN2 8P4C-180P
CN3
8P4C-180P
PGND
3
RSLCT
RPE
RBUSY
RACK#
PRND7
PRND6
PRND5
PRND4
PRND3
RSLIN#
PRND2
RINIT#
PRND1
RERR#
PRND0
RAFD#
RSTB#
PGND
PGND
PGND
CP21 X_COPPER
POWER Management / COM Port Wake-Up event
D18
NRIA#
X_1N4148S
Micro Star Restricted Secret
PGND
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
CN4 8P4C-180P
RACK#
1 2
RSLCT
3 4
RPE
5 6
RBUSY
7 8
CN13 8P4C-180P
RERR#
1 2
RAFD#
3 4
RSTB#
5 6
RSLIN#
7 8
CN9 8P4C-180P
PRND0
1 2
PRND1
3 4
PRND2
5 6
PRND3
7 8
CN7 8P4C-180P
PRND4
1 2
PRND5
3 4
PRND6
5 6
PRND7
7 8
RINIT#
C135 180P
R425
X_10K
C472
X_104P
LPT / COM / PS2 Port
MS-6761N1
PGND
3VDUAL
R429
X_10K
RI# 18,19
Q52
X_2N3904S
R426
X_1K
Last Revision Date:
Wednesday, January 15, 2003
Sheet
30 36
of
1
Rev
0A
5
Charge Bump.
R385 8.2K
5VSB
U25
1
N/A
VCC
2
IN
3 4
GNDOUT
C454
74AHC1G14S
T70-0145009-T07
D D
103P C340
VT8235 Suspend 2.5V power
R357
X_330
VR2
R356
X_470
431/2.5V/150mA
C C
EN_DDR 32
B B
EN_DDR 32
SUSB# 16,18,32
PW_OK 32
A A
SUSC# 18,32
ON" in S0/S1/S3 and "OFF" in S4/S5 state
S0 - S3
SUSB#
SUSC#(H)
5V_STR(+5V)
U43 output H
R166
4.7K
2N3904S
R245
4.7K
VTT_SENSE 5
1 2
SUSB#_PWOK
3
D10
BAT54A
D7 1N4148S
5V_STR Power source
from 5VSB
5
C463
104P/25V/Y5V
D15
1N5817S
5
C448
4.7u/0805
5VSB 5VSB
R358
110/0805
G
2
3 1
I31-0431S09-S04
5VSB
R256
1K
Q42
B
3VDUAL
A C
5VSB
A C
1N5817S
A C
105P/16V/Y5V
3VDUAL
Q48
D
2N351AN/SOT23
S
5VSB
R160
4.7K
B
VDDIO_SENSE 6
D S
G
Q43
C
2N7002S
E
R240
X_0
C287
X_104P
R208 1.5KST
R207
1K
D13
C392
X_104P
2.5VREF1
R185
1K
C
Q27
E
2N3904S
R257
1.47KST
+12V
D12
1N4148S
C252
105P/16V/Y5V
VSUS2_5
D S
G
VDD_25_SUS
C301
X_104P
R249
100RST
R248
1.5KST
2.5VREF1
S0 - S5
SUSB#
SUSC#
5V_STR(+5V)
9VSB
R190
1K
Q32
2N7002S
C233
X_470P
3VDUAL
R171
X_0
R260
X
LM393
3
2
R206
1K
5
6
5VSB
8 4
+12V
+
-
U13A
8 4
U13B
+
-
LM393
5V_STR Power source
from
VCC(+5V=0,+12V=0)
5V_STR(0V)
U43 output H U43 output L U43 output H
R192
110/0805
VR1
RUN_MODE
9VSB
3
+
2
-
11 4
9VSB
8 4
3
+
2
-
5
+
6
-
R194 1K
1
7
4
5VSB
2
3 1
431/2.5V/150mA
I31-0431S09-S04
VCC2_9
2.5VREF1
R175
1K
1
U12A
LM324
R184 0
R182
X_1KRST
U14A
LM358
1
R230 0
R239 X_1KRST
U14B
8 4
LM358
I71-LM35803-T07
7
5VSB
4
2.5VREF1
R197
1K
C256
X_102P
G
G
G
Q41
P3055LD
G
R201
1K
5VSB
R199
1K
G
VCC2_9
D
S
VCC2_9
G
2.5VREF1
2.5V_REF
5
6
C261
X_102P
9VSB
10
+
9
-
D S
Q25
2N7002S
11 4
R204 160RST
R205
1KRST
DDR 2.5V
Q31
P3055LD
VDD_25_SUS
VTT_DDR_SUS VTT_DDR_SUS
D
Q39
P3055LD
S
VTT_DDR_SUS
D
DDR_VTT 1. 25V
S
VCC
5V_STR
S
Q29
P3055LD
5V_STR
D
D S
2N/SI2303DS
Q34
EC11
1000U/6.3V
SUSB#
PWOK
VCC3
D26 H_BRS340-S-CASE403-03
9VSB
1 2
VCC
D27 1N4001
5VSB
U12B
+
-
11 4
To CPU Copper trace
width > 250mils ,
Fill island behind
DIMM > 400mils .
+
G
7
LM324
R202
R203
1KRST
VCC3
U12C
S
8
G
LM324
D
C269
100U/1210
VCC2_9 Power source
from 3VDUAL
324RST
Q35
C39
100U/1210
D
S
P3055LD
Q63
3VDUAL
D9
P3055LD
3VDUAL
+
EC15
1000U/6.3V
3
1N4001S
VCC2_9
EN_VDD_12_A 32
VCC
3
+12V +12V
C501
104P/25V/Y5V
EN_VDDA_25 32
2.5VREF1
SUSB#_PWOK
R464
4.7K
2.5VREF1
R129
4.7K
EN_VDDA_25
R198 1K
R173 X_0
R172 0
RUN_MODE1
POWER - ON POWER - OFF
VCC2_9 Power source from 3VDUAL
SUSB#
PWOK
VCC3
R152
1KRST
2.5VREF1
C210
X_104P
RUN_MODE1
C22
104P/25V/Y5V
VCC
R330 0_0805
1 2
VCC
1 2
1 2
R339
C355
20K
105P/10V/Y5V
1 2
Q60
2N7002S
R138
634RST
1 2
D S
G
1 2
5VSB 2.5VREF1
R131
4.7K
C
Q19
B
2N3904S
E
2.5VREF1
5VSB
R4
4.7K
R196
X_10K
R174
X_R/0603
C370
470p
R329
14.7K
C368
5600p
1 2
R317
1.1KRST
R137
681RST
G
Q21
2N7002S
R32
1K C8
R3
4.7K
C
Q3
B
2N3904S
E
9VSB 9VSB
U12D
12
+
14
13
-
LM324
11 4
VCC2_9 Power source from VCC3
2
R149
R157
4.7K
2N7002S
7
COMP
C197
X_104P
D S
X_104P
Q2
2N7002S
RUN_MODE
X_1.5KST
G
Q23
G
U16A
74LVC07S
D S
5
VCC
GND
3
D S
1 2
VCC
U22
BOOT
UGATE
PHASE
LGATE FB
ISL6520A
+12V
8 4
3
+
2
-
R154 0
14
7
5
6
R342 0
D11 1N5817S
1
2
8
4 6
R313 1KRST
1 2
U10A
LM358
5
6
5VSB
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
Q24
P3055LD
VCC2_5
+
EC23
1000U/6.3V
CHOCK2 1.2u
1 2
C331
105P/10V/Y5V
CHOCK1 1.2u
6
7
8
VDD_12_A
VDD_12_A
3
2
Q7
NDS351AN
VDDA_25 To CPU
+
Copper trace
width > 50mils
.
R292
10K
RUN_MODE1
C345
X_102P
1
+
-
+12V
+
-
C366
0.022u
1
+
-
R268
8 4
8 4
1K
R288
C201
104P/25V/Y5V
U10B
LM358
7
R147
X_1.5KST
A C
C379
104P/25V/Y5V
1 2
3.3_0805
1 2
G
R155
X_100K
U4B
LM358
7
0
C344
X_102P
R146 0
105P/0805/16V
R305
R312
60.4
VCC2_5
D
S
3 4
U16B
74LVC07S
VCC3
D
G
S
C229
Q46
4 5
3
2
1
P07D03LV_SO8
VCC 1.5 Voltage Regulator
Q26
P3055LD
Routed as pour to
CPU width >
250mils .
VCC3 +12V
D S
G
EC1
470u/6.3V
14
7
Micro Star Restricted Secret
ACPI Power
MS-6761N1
Last Revision Date:
Wednesday, January 15, 2003
Sheet
31 36
1
VDD
1 2
+
EC24
1000U/6.3V
U4A
8 4
LM358
1
VDDA_25
VDDA_25
of
VCC
VDDQ
1 2
VDDQ
Rev
0A
5
R259
0/0805
R226
2.2K
2N3904S
PS_IN# 6
VCC
Follow Stella I
R483
330
JFP1
1
HDR_BLNK_GRN
HDDLED
VCC
IRRX 29
IRTX 29
Q64
2N3904S
Q40
HD_PWR
3
5 6
7
9
11
13
15
17 18
VCC
PCI RAID card access LED connecter
R482
330
PLED1
CTL_PLED1# 18 PLED 29
BZ1
BUZZER
RN77
1 2
3 4
5 6
7 8
8P4R-150
Q38
2N3904S
5VSB
R134
X_4.7K
HDR_BLNK_YEL
HDA
GND FPBUT_IN
FP_RESET
+5V
IRRX
GND
IRTX
GND CHS_SEC
NEC_FRONT-PANNEL
D24 1N4148S
HDDLED
D23 1N4148S
D22 1N4148S
CTL_PLED1#
2 1
TMP_SPK 6
C286
104P/25V/Y5V
5VSB
R136
0
C223
X_102P
FRONT PANEL
ESD Protect
C510 X_181P
HDDLED 24
D D
C C
B B
A A
CLK_RESET# 8
FP_RST#
CTL_LED
THRMTRIP_EN# 6
SUSB# 16,18,31
VCC3
VDD_25_SUS
1 2
VCC
ALARM 29
SPKR 18
R224 0
R225 1K
R479 4.7K
R478 C_0
R476 0
C509 X_104P
R468
220_0603
R475 1K
AMD Thermal protection
PS_OUT# 6
PS_ON#A 6
5
R141 0
4
PLED1
2
PLED2
GND
FPSLP#
GND
CUT
IR_PWR
4
PWRSW
8
EXTSMI#
10
12
14
16
IDEACTP# 25
IDEACTS# 25
JLED1
1
1
2
2
D1x2-WH
pitch : 2.00mm
CTL_LED
R473 1K
2
R421 0
1 3
VCC
R477
22
EXTSMI# 18,19,29
5VSB
R481
220_0603
1 2
Q62
2N3904S
C511
104P/25V/Y5V
CTL_PLED1#(GPI1) Default Value = Defined
S0
ON(PLED1=+5V) OFF(PLED2=L)
S3
S5
VCC3
R130
4.7K
-12V
PS_OUT# PS_IN#
-5V
VCC +12V
4
11
12
13
14
15
16
17
18
19
20
D6
X_1N5817S
JWR1
3.3V
-12V
GND
PS_ON
GND
GND
GND
-5V
5V
5V
ATX-PCON
3.3V
3.3V
GND
GND
GND
PW_OK
5V_SB
VCC3
1
2
3
4
5V
5
6
5V
7
8
9
10
12V
C184
104P/25V/Y5V
3
POWER OK Circuits
PWBTIN# 18,19,30
R455 4.7K
SUSB# 16,18,31
R452
5VSB
1K
R456
SUSC# 18,31
1 2
ON(PLED2=5VSB)OFF(PLED1=0.2V)
R480
220_0603
PLED2
VCC
R135
4.7K
C192
104P/25V/Y5V
4.7K
PW_OK 31
3
5VSB
Q61
2N3904S
FOR NEC ONLY
VCC
5VSB
Q58
2N3904S
5V_STR
Q56
2N3904S
R459
1K
CTL_PLED1# LED-G LED-Y
3VDUAL
C465
105P/10V/Y5V
PG_VCORE 15
VDD_12_A
VDDA_25
VDD_25_SUS
Q57
2N3904S
FP_RST#
LOW
HIGH
LOW OFF(VCC=0V) OFF(PLED2=L)
3VDUAL 3VDUAL
R420
10K
1 2
2
PG_VCORE
PS_IN#
PW_OK
R453 4.7K
VDD_12_A VDDA_25VDD_25_SUS
C493
104P/25V/Y5V
R460
U30
1
VCORE_GD
2
VLDT
3
VDDA
4
DDR_DUAL
5
PSON#
6
SLP_S3
7
ATX_PWRGD
8 9
GND ATX_PSON#
ASIC8
C491
104P/25V/Y5V
330
74HCT14/SOIC14_#A
T37-0741403-F01
S0
S3
S5
Power On
Sequence.
14
7
U27A
74HCT14/SOIC14_#A
T37-0741403-F01
PSON#
PS_OUT#
PW_OK
EN_DDR
EN_VDDA_25
EN_VCORE
PG_VCORE
EN_VDD_12_A
CPU_GD
14
9 8
7
U27D
74HCT14/SOIC14_#A
T37-0741403-F01
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
5VSB
C481
EN_VDD_12_A 31
EN_VDDA_25 31
EN_VCORE 15
EN_DDR 31
PS_OUT#
R449 1K
R454 1K
104P/25V/Y5V
Q53
2N3904S
C482
104P/25V/Y5V
VCC3
5 6
U29C
SB5V
VLDT_EN
VDDA_EN
VCORE_EN
DDR_DUAL_EN
CPU_GD
SB_GD
ASIC_RST#
14
7
16
15
14
13
12
11
10
SUSB# SUSC# SLP_S3
H H
H L
L L
5VSB
U16C
74LVC07S
14
5 6
7
14
9 8
7
U16D
74LVC07S
Reserved for Hyper-Transport
Reset Test .
VCC2_5
RSMRST# 18
-LDTRST 12
ALL_PWRGD
R290
330
Micro Star Restricted Secret
Power OK Circuits
MS-6761N1
Last Revision Date:
Sheet
1
VSUS2_5
3VDUAL
R435
R434
4.7K
4.7K
CPU_GD 6
ALL_PWRGD 18
C479
X_102P
Q54
2N3904S
L
H
L
14
11 10
7
13 12
R285
X_100
of
U16E
74LVC07S
14
7
U16F
74LVC07S
-CPURST 6
JHT1
1
2
X_YJ102
VSUS2_5
R291
330
Thursday, January 16, 2003
32 36
1
Rev
0A
5
4
3
2
1
BULK / Decopuling
Place on CPU Solder side
VCORE
D D
C C
C526
X_0.22u/BACK
VCORE
C534
X_104P/BACK
VCORE
VCC3
C535
X_104P/BACK
C170
X_0.22u
C538
X_104P/BACK
CPU
Place on inside of CPU Cavity ( 10 *
0.22uF/0603 X7R high-freq decoupling
Cap. )
VCORE
4.7U/1206
X
X_FM
FM6
C128
X_224P
C108
C83
4.7U/1206
FM13
X
X
X_FM
X_FM
FM19
X
X_FM
5
C154
B B
A A
X_224P
Buck-decoupling Mid-Freq. decoupling Cap.
( 6 * 4.7uF / 1206 X7R )
VCORE
4.7U/1206
C63
C97
4.7U/1206
FM9
FM8
X
X
X_FM
X_FM
F_PAD_M100
FM3
FM1
X
X_FM
F_PAD_M120
VDD_12_A
X_4.7U/1206/BACK
FM5
X
FM17
X
X_FM
C139
X_0.22u
C541
X_104P/BACK
C86
X_224P
X_FM
FM16
X
X_FM
C532
FM2
X
X_FM
C104
X_224P
C514
X_4.7U/1206/BACK
FM18
X
X_FM
FM10
VCC3
C351
104P/25V/Y5V
C466
104P/25V/Y5V
For EMI
VDD_12_A
+
EC10
1000U/6.3V
VDDQ
EC21
1000U/6.3V
FM12
FM11
X
X
X_FM
FM21
X
X_FM
X_FM
X
X_FM
FM20
X
X_FM
C329
104P/25V/Y5V
C474
X_104P
VTT_DDR_SUS
+
FM4
X
X_FM
4
VCC
C477
C222
X_104P
X_104P
VCC3 VCC
C246
104P/25V/Y5V
1 2
+
EC3
1000U/6.3V
EC16
+
X_1000U/6.3V
VCC VCC
C20
104P/25V/Y5V
5VSB
EC44
+
1000U/6.3V
C251
X_104P
+12V -12V
C446
104P/25V/Y5V
VCC3
VCC
VSUS2_5
SYSTEM
C234
104P/25V/Y5V
C494
104P/25V/Y5V
C231
104P/25V/Y5V
C419
C460
X_104P
C470
X_104P
+
+
VCC
C203
X_104P
EC6
1000U/6.3V
EC13
1000U/6.3V
C497
104P/25V/Y5V
VCC3
C445
X_104P
VCC
C512
104P/25V/Y5V
C471
X_104P
C3
104P/25V/Y5V
X_104P
C406
X_104P
VDD_25_SUS VDD_25_SUS VDD_25_SUS
VCC2_5
+
EC25
100u/16V
C500
104P/25V/Y5V
C258
X_104P
C297
C241
X_104P
104P/25V/Y5V
-5V
C193
104P/25V/Y5V
+
Near JWP1
C189
104P/25V/Y5V
C386
X_104P
3
C398
X_104P
VCC3
C26
104P/25V/Y5V
EC12
1000U/6.3V
EC29
+
X_1000U/6.3V
3VDUAL VCC3
C397
X_104P
VCC
VCC3
C322
X_104P
VCC2_5
EC7
+
X_1000U/6.3V
VCC 5VSB
EC39
+
1000U/6.3V
C475
104P/25V/Y5V
C473
X_104P
T2
1
2
X_YJ102
VCC
C495
X_104P
C467
104P/25V/Y5V
EC22
+
1000U/6.3V
C34
X_104P
Impedance Test
C292
X_104P
T1
1
2
X_YJ102
ATX VIA-Hole * 9
MH2
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH5
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH8
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
+12V
+
EC43
VCC3
EC14
+
1000U/6.3V
+
EC45
1000U/6.3V
470U/16V
Place between LPW1 & D34 .
3VDUAL
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
6
GND
7
GND
8
GND
9
GND
6
GND
7
GND
8
GND
9
GND
6
GND
7
GND
8
GND
9
GND
EC33
+
1000U/6.3V
EC18
+
X_1000U/6.3V
Micro Star Restricted Secret
BULK / Decopuling
PGND
MS-6761N1
Last Revision Date:
Sheet
MH7
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH4
1
2
3
4
5
MH1
1
2
3
4
5
MH3
1
2
3
4
5
1
2
3
4
5
1
2
3
4
5
6
GND
7
GND
8
GND
9
GND
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
MH6
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
MH9
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
6
7
8
9
6
7
8
9
6
7
8
9
6
7
8
9
6
7
8
9
Rev
Wednesday, January 15, 2003
33 36
of
1
0A
5
4
3
2
1
D D
C C
Q11-1
TO252-H
B B
VBAT1_1
YSKTBT
D06-0100101-P01
Q14-1
TO252-H
TO252-H
Q16-1
U9_1
FLASH/2M/W49F002UP12B
M31-4900208-W03
J6(1-2)
YJUMPER-MG
J6 Clear Password
Short 1-2
Open
JBAT1 Clear CMOS
Short 1-2
Short 2-3
YJUMPER-MG
Normal
Clear PW
Normal
Clear CMOS
JBAT1(1-2)
R348(2-3)
4.7K
R380(2-3)
4.7K
R382(2-3)
4.7K
R384(2-3)
4.7K
R379(2-3)
4.7K
R415(2-3)
0
R307(2-3)
*"PDA0/SDA0" => LDT transmit timing control
0 - Disable (Default)
1 - Enable
*"GPIO A C" => LDT Frequency
00 - 200MHz (Default)
*"GPIO D" => Internal GTL pull up
0 - Enable (Default)
*"GPIO B" => IOQ depth
0 - 12 Level (Default)
U11-F
PCB1 1676100A
0
MSI
Title
A A
P01-676100A-D05
5
DDR
NB-HEATSINK-W/Fan
E31-0400311-K08
4
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
3
Micro Star Restricted Secret
Option
MS-6761N1
Last Revision Date:
Sheet
2
Thursday, January 16, 2003
34 36
of
Rev
0A
1