5
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GRATIS - FOR FREE
4
3
2
1
AMD S1G2
DVT
EXTERNAL CLOCK GENERATOR
D D
C C
CS9LPRS472
RTL8111B
PCIE ETHERNET
Express CARD
USB7
16
33
31
USB1
38
MINI-PCIE
PCIE I/F
PCIE I/F
USB0
38
PCIE I/F MINI-PCIE
PCIE I/F
PROCESSOR
638-Pin uFCPGA 638
CPU REV 11
HT3 2600Mhz
5.2GT/s
16x16
ATI NB - RX780
HyperTransport LINK3 CPU I/F
DX10 IGP
LVDS/TVOUT/TMDS
1 X16 PCIE GFX I/F
1 X4 A-Link II-E I/F WITH SB
6 X1 PCIE GPP I/F
OUT
IN
RS780
11,12,13,14,15
A-LINK II
PCIE1.1
1X4 Lanes
2.5Gbps/L
5,6,7,8
DDRII 800MT/S
DDRII 800MT/S
X16 PEIE I/F
VGA CON
CRT
LVDS
TMDS
UNBUFFERED
DDR2 NEAR
SODIMM
200-PIN DDR2 SODIMM
UNBUFFERED
DDR2 FAR
SODIMM
200-PIN DDR2 SODIMM
9,10
ATI VGA - M82S
22,23,24,25,26,28,29
CRT
40
LVDS CON
LVDS
40
HDMI
9,10
TMDS
41
667M
667M
GDDRIII
GDDRIII
27
Option Orange for MS13321
Option Green for MS13331
27
ATI SB - SB700
USB2
USB3
FINGER
PRINT
36
36
USB5
USBCONN2
B B
BLUETOOTH
3in1
CONNECTOR
30
A A
36
CAMERA
36
USB4
USBCONN1
36
USB6
USBCONN3
USB8
36
USB9
RTS5158
CARD
READER
30
USB 2.0 (12 PORTS)
SATA II (6 PORTS)
ATA 66/100/133
SMBus 2.0
SPI I/F
LPC I/F
ACPI 2.0
INT RTC
HW MONITOR
PCI/PCI BDGE
17, 18, 19, 20, 21
LPC BUS
ENE3954
KBC ENE3945
SATA 1.5/2.5/3Gbps
UP TO SATAII
SATA 1.5/2.5/3Gbps
HD AUDIO I/F
39
CIR
(DNI)
36
ALC888
HD CODEC EARPHONE
FM2010
DSP
ARRAY
MICROPHONE
SATA H.D.D. CONN.
SATA O.D.D. CONN.
JACK
MICROPHONE
32
JACK
32
37
37
35 34
35
CPU&RS780 HT VLDT
POWER
CPU CORE POWER
SYSTEM MAIN POWER
CPU MEMORY POWER
RS780 CORE POWER
44 48
SB700 & PCIE POWER
45
46
BATTERY CHAGER
47
DISCHARGE CIRCUIT
48
50
46
PS2
SPI I/F
KBD
MOUSE
5
SPI
ROM
39 39
4
3
2
Title
BLOCK DIAGRAM
Size Document Number Rev
Custom
Date: Sheet
MS-13331
MICRO-STAR INT'L CO.,LTD.
of
15 5 Monday, August 20, 2007
1
0A
5
4
3
2
1
CPU_VDDA_RUN
+1.2V
+VCC_NB
+3.3V
+1.8V
+1.8V
+1.8V
+3.3V
+1.8V
+3.3V
+1.8V
CPU_VDD0_RUN
CPU_VDD1_RUN
CPU_VDDNB_RUN
BEAD
CPU_VDDIO_SUS
CPU_VTT_SUS
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BATTERY
11.1V
54WHr
D D
AC ADAPTOR
15-16V 90W
BATTERY
CHARGER
MAX1533
+VIN
CPU core
PWM
MAX17009
CPU core
PWM
MAX8792
DDR2 PWM
LDO VTT
MAX8632
+1.2V SW
+1V~+1.2V SW
MAX8717
CPU_VDD0_RUN
CPU_VDD1_RUN
CPU_VDDNB_RUN
CPU_VDDIO_SUS
CPU_VTT_SUS
+VCC_NB
+1.2V
+1.2V
+1.1V
Jumper
RS740/RS780
+1.2V
NB_VDD_MUX
NB_VDD_MUX
NB_VDD_MUX
+1.5V SW
+1.1V SW
C C
MAX8717
+2.5V SW
MAX1714
SW
OZ9956
+1.5V
+1.1V
+2.5VDUAL
VDD_LED_BL_RUN
+1.8V
NB_VDD_MUX
AMD S1G2
VCCA 2.5V
VDD0 CORE
0.375-1.500V
VDD1 CORE
18A
1.375-1.500V
VDDNB CORE
18A
1.375-1.500V
TPDA
VLDT 1.2V TPDA
VDD MEM TPDA
VTT_MEM TPDA
RS780
VDDHTTX 1.2V 0.5A
VDDHTRX 1.1V 0.45A
VDDHT 1.1V 0.6A
VDDPCIE 1.1V 0.7A
VDDA18 1.8V 0.25A
VDDC 1.0V-1.1V 7A
VDDG33 3.3V 0.03A
VDDG18 1.8V 0.005A
VDD18_MEM 1.8V 0.005A
VDD_MEM 1.8V 0.15A
AVDD 3.3V 0.135A
VDDLT18 0.08A
VDDLT33 0.22A
PLLs 1.8V 0.1A
PLLs 1.1/1.2V 0.15A
CPU_VDDIO_SUS
CPU_VTT_SUS
+1.8V
BEAD
+1.2V
BEAD
+3.3V
BEAD
+3.3V
BEAD
+5V
BEAD
+1.2VDUAL
+2.5VDUAL
+3.3VDUAL
+3.3VDUAL
+3.3VALW
+3.3V
+5V
BEAD
BEAD
BEAD
Jumper
RS740/RS780
SW
BEAD
+5V
VDD_LED_BL_RUN
+VIN
+5VDUAL
+3.3VALW
+5V SW
+3V SW
+5V LDO
+3V LDO
B B
+5VDUAL
+3.3VDUAL
+2.5VDUAL
MAX1533
SWITCH
SWITCH
SWITCH
+5VALW
+3.3VDUAL
+5VDUAL
+5V
+3.3V
+2.5V
+1.2V
+1.2V
+1.2V
+1.2V
VDD33_18
+1.2V
+1.2VDUAL
+3.3VDUAL
+3.3VDUAL
+1.2VDUAL
VDD33_18
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
SB SB700
PCIE IO 0.8A
PCIE PVDD 80mA
ATA I/O 0.2A
ATA PLL 0.01A
3.3V OR 1.8v I/O 0.45A
SB CORE 0.6A
1.2V S5 PW 0.22A
3.3V S5 PW 0.01A
USB I/O 0.2A
USB CORE 0.2A
+5VDUAL
+1.5V
+3.3V
+3.3VDUAL
+1.5V
+3.3V
+3.3VDUAL
+1.5V
+3.3V
+2.5VDUAL
+1.2V_S5
+1.2V
A A
CPU_VDDIO_SUS
+3.3V
+3.3VDUAL
5
LDO
SWITCH
SWITCH
2.5V LDO
1.2V LDO
4
+1.2V_S5
+1.2VDUAL
+1.8V
CPU_VDDA_RUN
+1.2VDUAL
3
MXM_EN
+1.8V
+2.5V
+3.3V
+5V
+VIN
SW
SW
SW
SW
SW
MXM HE
MXM_VDD_1.8V
MXM_VDD_2.5V
MXM_VDD_3.3V
MXM_VDD_5V
MXM_VDD_MAIN
2
+3.3VDUAL
+1.5V
+3.3V
+3.3VDUAL
Title
POWER DELIVERY CHART
Size Document Number Rev
Custom
Date: Sheet
DDRII SODIMMX2--SYSTEM
VDD MEM 4A
VTT_MEM 0.5A
DDRII SIDE PORT MEMORY
VDD MEM
CLOCK GEN
1.2V 0.2A
3.3V 0.5A
HD CODEC
3.3V CORE 0.3A
5V ANALOG 0.1A
GBIT ENTHENET
1.2V 0.5A
2.5V 0.5A
3.3V 0.5A
SMSC1100--EC
3.3V 0.5A
LCD PANEL
3.3V 1.5A
5V 0.5A
BACK LIGHT
+5V
LED_BL
+VDD_MAIN
USB X2 FR
5VDual
USB X7 FR
5VDual
EXPRESS CARD
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MINI PCIE SLOT1
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MINI PCIE SLOT2
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MINI PCIE SLOT2
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
AUDIO
OP
SIM
25 5 Monday, August 20, 2007
0A
of
5
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GRATIS - FOR FREE
CPU_LDTSTOP#
CPU_PWROK
CPU_RESET#
D D
CPU_CLKIN
Southbridge
PWR_GOOD
Northbridge
POWERGOOD
CPU_VLDT_RUN
CPU_VDDNB_RUN
CPU_VDD1_RUN
CPU_VDD0_RUN
4
15 mS delay
3
>1 mS
Req.
running
48 mS chipset delay
If use Internal Clk Gen
NB_PWRGD is
asserted by SB700
>1 mS
Req.
>1 mS
>1 mS
Req.
Req.
>1 uS
Req.
2
1
GROUP B
C C
B B
A A
CPU_VDDA_PG
CPU_VDDA_RUN
VDD_NB_CORE_RUN
GROUP A
SLP_S3_L
CPU_VTT_SUS
CPU_VDDIO_SUS
SLP_S5#
PWR_BTN#_SB
RSM_RST_L
DUAL RAILS
VDD_DUAL_EN
PWR_BTN#_HW
AC_OK
+3.3VALW/+5VALW
A_VBAT
+1.2V
+1.8V
+5V
+3.3V
+VIN
from S3
Battery inserted/AC IN
power button
locked out
20mS
delay
5VDUAL/3.3VDUAL/2.5VDUAL/1.2VDUAL
Power button pressed
AC not present scenario = LOW AC present= high
to S3
stays active if AC present
stays active if AC present
stays active if AC present
stays active if AC present
waiting for power button
Title
POWER SEQUENCE CHART
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
35 5 Monday, August 20, 2007
0A
of
5
D D
4
3
2
1
PCI CLK0
33MHZ
PCI CLK1
33MHZ
HTREFCLK
66MHZ
NB-OSC
C C
B B
NEAR SO-DIMM REV SO-DIMM
2 PAIR MEM CLK
ATHLON64 S1 CPU
2 PAIR MEM CLK
1 PAIR CPU CLK
LGA638 PACKAGE
EXTERNAL
CLK GEN.
200MHZ
14.318MHZ
NB PCIE CLK
100MHZ
SB PCIE CLK
100MHZ
SB-OSCIN
14.318MHZ
PCIE CLK
100MHZ
PCIE CLK
100MHZ
PCIE CLK
100MHZ
PCIE CLK
100MHZ
PCIE CLK
100MHZ
SUPER IO CLK
48MHZ
ATI NB - RX780
SB-OSCIN
TVCLKIN
TVCLKIN
PCIE GFX SLOT - 16 LANES
PCIE GPP SLOT 1 - 1 LANE
PCIE GPP SLOT 2 - 1 LANE
PCI EXPRESS CARD - 1 LANE
GIGABIT ETHERNET - 1 LANE
14.318MHZ
SB-OSCIN
14.318MHZ
25MHZ OSC INPUT
PCIE CLK
100MHZ
USB CLK
48MHZ
ATI SB
SB700
AZALIA_BITCLK
PCI CLK2
33MHZ
PCI CLK3
33MHZ
SUPER IO CLK
48MHZ
PCI CLK4
33MHZ
PCI CLK5
33MHZ
PCI CLK6
33MHZ
PCI CLK7
33MHZ
25M Hz
PCI SLOT0
PCI SLOT1
MINI PCI SLOT
SUPER IO
IT8712F
LPC SLOT
LPC BIOS
DEBUG POST
PCI SLOT2
AZALIA CODEC
KB_CLK
MS_CLK
KEYBOARD
MOUSE
32.768K Hz
14.31818MHz
A A
Title
CLOCK DISTRIBUTION
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
45 5 Monday, August 20, 2007
0A
of
5
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GRATIS - FOR FREE
4
3
2
1
+VLDT +VLDT
D D
HT_NB_CPU_CAD_H0 11
HT_NB_CPU_CAD_L0 11
HT_NB_CPU_CAD_H1 11
HT_NB_CPU_CAD_L1 11
HT_NB_CPU_CAD_H2 11
HT_NB_CPU_CAD_L2 11
HT_NB_CPU_CAD_H3 11
HT_NB_CPU_CAD_L3 11
HT_NB_CPU_CAD_H4 11
HT_NB_CPU_CAD_L4 11
HT_NB_CPU_CAD_H5 11
HT_NB_CPU_CAD_L5 11
HT_NB_CPU_CAD_H6 11
HT_NB_CPU_CAD_L6 11
HT_NB_CPU_CAD_H7 11
HT_NB_CPU_CAD_L7 11
C C
HT_NB_CPU_CAD_H8 11
HT_NB_CPU_CAD_L8 11
HT_NB_CPU_CAD_H9 11
HT_NB_CPU_CAD_L9 11
HT_NB_CPU_CAD_H10 11
HT_NB_CPU_CAD_L10 11
HT_NB_CPU_CAD_H11 11
HT_NB_CPU_CAD_L11 11
HT_NB_CPU_CAD_H12 11
HT_NB_CPU_CAD_L12 11
HT_NB_CPU_CAD_H13 11
HT_NB_CPU_CAD_L13 11
HT_NB_CPU_CAD_H14 11
HT_NB_CPU_CAD_L14 11
HT_NB_CPU_CAD_H15 11
HT_NB_CPU_CAD_L15 11
HT_NB_CPU_CLK_H0 11
B B
HT_NB_CPU_CLK_L0 11
HT_NB_CPU_CLK_H1 11
HT_NB_CPU_CLK_L1 11
HT_NB_CPU_CTL_H0 11
HT_NB_CPU_CTL_L0 11
HT_NB_CPU_CTL_H1 11
HT_NB_CPU_CTL_L1 11
U21A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
HT LINK
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
* If VLDT is connected only on one side,
one 4.7uF cap should be added to
the island side
HT_CPU_NB_CAD_H0 11
HT_CPU_NB_CAD_L0 11
HT_CPU_NB_CAD_H1 11
HT_CPU_NB_CAD_L1 11
HT_CPU_NB_CAD_H2 11
HT_CPU_NB_CAD_L2 11
HT_CPU_NB_CAD_H3 11
HT_CPU_NB_CAD_L3 11
HT_CPU_NB_CAD_H4 11
HT_CPU_NB_CAD_L4 11
HT_CPU_NB_CAD_H5 11
HT_CPU_NB_CAD_L5 11
HT_CPU_NB_CAD_H6 11
HT_CPU_NB_CAD_L6 11
HT_CPU_NB_CAD_H7 11
HT_CPU_NB_CAD_L7 11
HT_CPU_NB_CAD_H8 11
HT_CPU_NB_CAD_L8 11
HT_CPU_NB_CAD_H9 11
HT_CPU_NB_CAD_L9 11
HT_CPU_NB_CAD_H10 11
HT_CPU_NB_CAD_L10 11
HT_CPU_NB_CAD_H11 11
HT_CPU_NB_CAD_L11 11
HT_CPU_NB_CAD_H12 11
HT_CPU_NB_CAD_L12 11
HT_CPU_NB_CAD_H13 11
HT_CPU_NB_CAD_L13 11
HT_CPU_NB_CAD_H14 11
HT_CPU_NB_CAD_L14 11
HT_CPU_NB_CAD_H15 11
HT_CPU_NB_CAD_L15 11
HT_CPU_NB_CLK_H0 11
HT_CPU_NB_CLK_L0 11
HT_CPU_NB_CLK_H1 11
HT_CPU_NB_CLK_L1 11
HT_CPU_NB_CTL_H0 11
HT_CPU_NB_CTL_L0 11
HT_CPU_NB_CTL_H1 11
HT_CPU_NB_CTL_L1 11
+VLDT
C194
4.7U6.3X
C0603
LAYOUT: Place bypass cap on topside of board
AMD check list 4-24~4-27
C199
4.7U6.3X
C0603
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
C188
X
0.22U10X
C0402
C197
0.22U10X
C0402
C189
180P50N
C0402
C196
X
180P50N
C0402
SOCKET_638_PIN
BGA638P
N12-6380010-F02
NO STUB
A A
Only for RS740
5
4
3
Title
SOCKET S1G2 HT I/F
Size Document Number Rev
Custom
Date: Sheet
MS-13331
2
MICRO-STAR INT'L CO.,LTD.
of
55 5 Wednesday, August 22, 2007
1
0A
A
B
C
D
E
Processor Memory Interface
U21C
4 4
PLACE THEM CLOSE TO
CPU WITHIN 1"
R307 39.2R_1%R0603
MEM_MA_ADD[0..15] 9,10
C138
1000P50X
C0402
R308 39.2R_1%R0603
C147
X
0.1U10X
C0402
CPU_VDDIO_SUS
3 3
2 2
CPU_VDDIO_SUS CPU_M_VREF_SUS
VDD_VREF_SUS_CPU
R77
1K_1%
R0402
R76
1K_1%
R0402
CPU_VTT_SUS
M_ZP
M_ZN
MEM_MA_RESET#
TP21
MEM_MA0_ODT0 9,10
MEM_MA0_ODT1 9,10
MEM_MA1_ODT0
MEM_MA1_ODT1
TP12
TP18
MEM_MA0_CS#0 9,10
MEM_MA0_CS#1 9,10
MEM_MA1_CS#0
MEM_MA1_CS#1
TP14
TP16
MEM_MA_CKE0 9,10
MEM_MA_CKE1 9,10
TP19
TP13
MEM_MA_CLK1_P 9
MEM_MA_CLK1_N 9
MEM_MA_CLK7_P 9
MEM_MA_CLK7_N 9
MEM_MA_BANK0 9,10
MEM_MA_BANK1 9,10
MEM_MA_BANK2 9,10
MEM_MA_CLK4_P
MEM_MA_CLK4_N
TP15
TP17
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_RAS# 9,10
MEM_MA_CAS# 9,10
MEM_MA_WE# 9,10
LAYOUT:PLACE CLOSE TO CPU
U21B
D10
VTT1
MEM:CMD/CTRL/CLK
C10
VTT2
B10
VTT3
AD10
VTT4
AF10
MEMZP
AE10 Y10
MEMZN VTT_SENSE
H16
RSVD_M1
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
SOCKET_638_PIN
BGA638P
N12-6380010-F02
MEM_MA_CLK7_P 9
MEM_MA_CLK7_N 9
MEM_MA_CLK1_P 9
MEM_MA_CLK1_N 9
AMD check list 2-1
MEM_MB_CLK7_P 9
MEM_MB_CLK7_N 9
MEM_MB_CLK1_P 9
MEM_MB_CLK1_N 9
VTT5
VTT6
VTT7
VTT8
VTT9
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0 MA0_CS_L1
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
W10
AC10
AB10
AA10
A10
SNS_+0.9VTT
W17
MEM_MB_RESET#
B18
W26
W23
MEM_MB1_ODT0
Y26
V26 U19
W25
MEM_MB1_CS#0
U22
J25
H26
MEM_MB_CLK5_H
P22
MEM_MB_CLK5_L
R22
A17
A18
AF18
AF17
MEM_MB_CLK4_N
R26
MEM_MB_CLK4_N
R25
MEM_MB_ADD0
P24
MEM_MB_ADD1
N24
MEM_MB_ADD2
P26
MEM_MB_ADD3
N23
MEM_MB_ADD4
N26
MEM_MB_ADD5
L23
MEM_MB_ADD6
N25
MEM_MB_ADD7
L24
MEM_MB_ADD8
M26
MEM_MB_ADD9
K26
MEM_MB_ADD10
T26
MEM_MB_ADD11
L26
MEM_MB_ADD12
L25
MEM_MB_ADD13
W24
MEM_MB_ADD14
J23
MEM_MB_ADD15
J24
R24
U26
J26
U25
U24
U23
CPU_VTT_SUS
C165
X
CPU_VTT_SUS
1000P50X
C0402
TP20
MEM_MB0_ODT0 9,10
MEM_MB0_ODT1 9,10
TP6
MEM_MB0_CS#0 9,10
MEM_MB0_CS#1 9,10
TP9
MEM_MB_CKE0 9,10
MEM_MB_CKE1 9,10
TP11
TP10
MEM_MB_CLK1_P 9
MEM_MB_CLK1_N 9
MEM_MB_CLK7_P 9
MEM_MB_CLK7_N 9
TP8
TP7
MEM_MB_BANK0 9,10
MEM_MB_BANK1 9,10
MEM_MB_BANK2 9,10
MEM_MB_RAS# 9,10
MEM_MB_CAS# 9,10
MEM_MB_WE# 9,10
C150
1.5P50N
C0402
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C143
1.5P50N
C0402
C140
1.5P50N
C0402
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C141
1.5P50N
C0402
CPU_M_VREF_SUS
MEM_MB_ADD[0..15] 9,10
MEM_MB_DATA[0..63] 9
To reverse SODIMM
socket
MEM_MB_DM[0..7] 9
MEM_MB_DQS0_P 9
MEM_MB_DQS0_N 9
MEM_MB_DQS1_P 9
MEM_MB_DQS1_N 9 MEM_MA_DQS1_N 9
MEM_MB_DQS2_P 9
MEM_MB_DQS2_N 9
MEM_MB_DQS3_P 9
MEM_MB_DQS3_N 9
MEM_MB_DQS4_P 9
MEM_MB_DQS4_N 9
MEM_MB_DQS5_P 9
MEM_MB_DQS5_N 9
MEM_MB_DQS6_P 9
MEM_MB_DQS6_N 9
MEM_MB_DQS7_P 9
MEM_MB_DQS7_N 9
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y11
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
SOCKET_638_PIN
BGA638P
N12-6380010-F02
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19 MEM_MB_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41 MEM_MB_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DATA[0..63] 9
To normal SODIMM
MEM_MA_DM[0..7] 9
MEM_MA_DQS0_P 9
MEM_MA_DQS0_N 9
MEM_MA_DQS1_P 9
MEM_MA_DQS2_P 9
MEM_MA_DQS2_N 9
MEM_MA_DQS3_P 9
MEM_MA_DQS3_N 9
MEM_MA_DQS4_P 9
MEM_MA_DQS4_N 9
MEM_MA_DQS5_P 9
MEM_MA_DQS5_N 9
MEM_MA_DQS6_P 9
MEM_MA_DQS6_N 9
MEM_MA_DQS7_P 9
MEM_MA_DQS7_N 9
socket
1 1
Title
SOCKET S1G2 DDR2 MEMORY I/F
Size Document Number Rev
C
A
B
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
E
0A
of
65 5 Wednesday, August 22, 2007
5
hexainf@hotmail.com
GRATIS - FOR FREE
4
3
2
1
CPU_VDDA_2.5_RUN
maximun
+VDDA
D D
CPU_VDDIO_SUS
C C
B B
A A
+3VSUS
40 ohm
AMD check list 4-22
L1110L1000m_50L0402
C176
4.7U6.3X
C0603
R103
390R
R0402
CPU_PWRGD 17
CPU_LDT_STOP# 13,17
CPU_LDT_RST# 13,17
R110
390R
R0402
+1.8VRUN +1.8VRUN
R339
300R
R0402
CPU_LDT_REQ#_CPU
RN18 8P4R-10K RN0402_MSI
1
2
3
4
5
6
7
8
5
VDDA 2.5V ==> Max Current 250mA
C175
3300P50X
C0402
R94
1K
R0402
+1.8VRUN
R106
300R
R0402
T_CRIT_CPU# 48
T_CRIT_CPU#
SMB_THRMCPU_CLK
SMB_THRMCPU_DATA
CPU_THRM_ALERT-
0.22U10X
C0402
CPU_ALERT
CPU_SIC
CPU_SID
R340
300R
R0402
JNC44 NC_0402_6
JNC27 NC_0402_6
JNC45 NC_0402_6
JNC46 NC_0402_6
Cap close to
thermal
sensor
CPU_THERMDA
C158
2200P50X
CPU_THERMDC
C0402
CPU_CLKP 16
CPU_CLKN 16
PWRGD
LDT_STOP#
LDT_RST#
C200
0.1U10X
C0402
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
Keep trace from resisor to CPU within 0.6"
C542 3900P50X
C0603
R318
169R_1%
C543 3900P50X
C0603
If unused, the ALERT_L pin is left unconnected
R0402
keep trace from caps to CPU within 1.2"
place them to CPU within 1.5"
+VLDT
PWM PWM
CPU_LDT_REQ# 13
+3VSUS
U10
D+
DT_CRIT_A#
4
SMBCLK VDD
SMBDATA
ALERT#
GND
2
3
4
LM86CIMMXNOPB_MSOP8-RH
MSOP8_T
Close to CPU socket
8 1
7
6
5
CPU_VDDA_RUN
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
LDT_RST#
PWRGD
LDT_STOP#
CPU_LDT_REQ#_CPU
CPU_SIC
CPU_SID
CPU_ALERT
TP33
R112 44.2R 1%R0603
R116 44.2R 1%R0603
CPU_VDD0_RUN_FB_H 47
CPU_VDD0_RUN_FB_L 47
CPU_VDD1_RUN_FB_H 47
CPU_VDD1_RUN_FB_L 47
CPU_DBRDY
CPU_TMS
TP22
CPU_TCK
TP27
CPU_TRST#
TP26
CPU_TDI
TP25
TP65
CPU_TEST23_TSTUPD
TP31
CPU_TEST18_PLLTEST0
CPU_TEST19_PLLTEST1
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST27_SINGLECHAIN
CPU_TEST9_ANALOGIN
CPU_TEST6_DIECRACKMON
TP32
SMB_THRMCPU_CLK
SMB_THRMCPU_DATA
F8
F9
A9
A8
B7
A7
F10
C6
AF4
AF5
CPU_HTREF0
CPU_HTREF1
SMB_THRMCPU_CLK 39
SMB_THRMCPU_DATA 39
CPU_THRM_ALERT- 18,39
AE6
R6
P6
F6
E6
Y6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
G9
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
C2
AA6
A3
A5
B3
B5
C1
3
U21D
VDDA1
VDDA2
CLKIN_H
CLKIN_L
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
SIC
SID
ALERT_L
HT_REF0
HT_REF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
SOCKET_638_PIN
BGA638P
N12-6380010-F02
KEY1
KEY2
SVC
SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
M11
W18
CPU_SVC_R
A6
CPU_SVD_R
A4
CPU_THERMTRIP#_1.8V
AF6
CPU_PROCHOT#_1.8V
AC7
CPU_MEMHOT#_1.8V
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
VDDIO 46
CPU_VDDNB_RUN_FB_H 47
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST7_ANALOG_T
CPU_TEST10_ANALOGOUT
CPU_TEST8_DIG_T
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
CPU_SVC_R
CPU_SVD_R
PWRGD
2
CPU_VDDIO_SUS
R78
300R
R0402
R0402
R83
R80
300R
300R
R0402
JNC30 NC_0402_6
JNC42 NC_0402_6
JNC29 NC_0402_6
CPU_VDDIO_SUS
R79
10K
R0402C173
Q11
B
SMBT3904
SOT23EBC_T
E C
VRD_PROCHOT# 47
TP23
route as differential
TP64
as short as possible
testpoint under package
TP35
TP30
TP66
TP34
TP37
TP29
TP36
TP28
TP24
CPU_VDDIO_SUS
R102
1K
R0402
Q10
SMBT3904
B
SOT23EBC_T
E C
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST27_SINGLECHAIN
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST19_PLLTEST1
CPU_TEST18_PLLTEST0
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST9_ANALOGIN
CPU_PWRGD Pull up to 1.8VRun
R82
R81
10K
10K
R0402
R0402
Q12
SMBT3904
SOT23EBC_T
B
E C
JNC26 NC_0402_6
R101
R312
X
2.2K
1K
R0402
R0402
CPU_SVC 47
CPU_SVD 47
CPU_PWRGD_SVID_REG 47
CPU_MEMHOT# 10,18
CPU_PROCHOT# 17
CPU_THERMTRIP# 18
CPU_PROCHOT#_1.8V
CPU_VDDIO_SUS
R311 510RXR0402
R90 300RXR0402
R105 300RXR0402
R92 300RXR0402
R93 300RXR0402
R91 300RXR0402
R109 300RXR0402
R113 300RXR0402
R327 300RXR0402
R108 300RXR0402
R95 300RXR0402
R313 510RXR0402
R338 0RXR0402
PWM
MICRO-STAR INT'L CO.,LTD.
Title
SOCKET S1G2 CTRL
Size Document Number Rev
Custom
Date: Sheet
MS-13331
75 5 Wednesday, August 22, 2007
1
of
0A
5
D D
C C
B B
CPU_VDD0_RUN
CPU_VDDNB_RUN
CPU_VDDIO_SUS
U21E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17 P18
VDDIO12 VDDIO13
SOCKET_638_PIN
BGA638P
N12-6380010-F02
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
CPU_VDDIO_SUS
4
U21F
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
SOCKET_638_PIN
BGA638P
N12-6380010-F02
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
CPU_VTT_SUS
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
3
2
1
BOTTOMSIDE DECOUPLING
CPU_VDD0_RUN CPU_VDD1_RUN
C152
22U6.3X
C0805_67
CPU_VDD1_RUN
C157
22U6.3X
C0805_67
CPU_VDDNB_RUN
C149
22U6.3X
C0805_67
C155
22U6.3X
C0805_67
C169
22U6.3X
C0805_67
C144
22U6.3X
C0805_67
C172
22U6.3X
C0805_67
C156
22U6.3X
C0805_67
C185
22U6.3X
C0805_67
C170
22U6.3X
C0805_67
C166
0.22U10X
C0402
C181
0.22U10X
C0402
C154
10N16X
C0402
C187
10N16X
C0402
C151
180P50N
C0402
C153
180P50N
C0402
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU_VDDIO_SUS
C139
C142
4.7U6.3X
C0603
C148
4.7U6.3X
C0603
4.7U6.3X
C0603
CPU_VDDIO_SUS
C146
22U6.3X
C0805_67
C130
C133
4.7U6.3X
0.22U10X
C0603
C0402
AMD Check list 4-1~4-5
C129
22U6.3X
C0805_67
C136
0.22U10X
C0402
C131
0.22U10X
C0402
C137
0.22U10X
C0402
C145
0.22U10X
C0402
C134
0.22U10X
C0402
C520
10N16X
C0402
C525
10N16X
C0402
C515
180P50N
C0402
C517
180P50N
C0402
C12
C82
C38
C81
4.7U6.3X
C0603
4.7U6.3X
C0603
3
4.7U6.3X
PROCESSOR POWER AND GROUND
A A
5
4
C0603
4.7U6.3X
C0603
C4
0.22U10X
C0402
C5
0.22U10X
C0402
C36
0.22U10X
C0402
AMD check list 4-6~4-8,4-11
C67
0.22U10X
C0402
C161
1000P50X
C0402
2
C162
1000P50X
C0402
C128
C163
C167
C168
C164
1000P50X
180P50N
1000P50X
C0402
C0402
Title
SOCKET S1G2 PWR & GND
Size Document Number Rev
Custom
Date: Sheet
MS-13331
180P50N
C0402
C0402
MICRO-STAR INT'L CO.,LTD.
1
180P50N
C0402
C160
180P50N
C0402
85 5 Wednesday, August 22, 2007
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
CPU_VDDIO_SUS
MEM_MA_ADD[0..15] 6,10
D D
MEM_MA_BANK[2..0] 6,10
MEM_MA_DM[0..7] 6
MEM_MA_DQS0_P 6
MEM_MA_DQS1_P 6
MEM_MA_DQS2_P 6
MEM_MA_DQS3_P 6
C C
B B
A A
MEM_MA_DQS4_P 6
MEM_MA_DQS5_P 6
MEM_MA_DQS6_P 6
MEM_MA_DQS7_P 6
MEM_MA_DQS0_N 6
MEM_MA_DQS1_N 6
MEM_MA_DQS2_N 6
MEM_MA_DQS3_N 6
MEM_MA_DQS4_N 6
MEM_MA_DQS5_N 6
MEM_MA_DQS6_N 6
MEM_MA_DQS7_N 6
MEM_MA_CLK1_P 6
MEM_MA_CLK1_N 6
MEM_MA_CLK7_P 6
MEM_MA_CLK7_N 6
MEM_MA_CKE0 6,10
MEM_MA_CKE1 6,10
MEM_MA_RAS# 6,10
MEM_MA_CAS# 6,10
MEM_MA_WE# 6,10
MEM_MA0_CS#0 6,10
MEM_MA0_CS#1 6,10
MEM_MA0_ODT0 6,10
MEM_MA0_ODT1 6,10
SDATA0 10,16,18,32
5
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
SCLK0 10,16,18,32
+3VRUN
MEM_M_VREF_SUS
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14/NC
84
A15/NC
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
818287889596103
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
SO-DIMM
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
DDR2_SODIMM_RVS_H=5.2mm
DDR_SODIMM200P_5_2H
4
111
104
112
117
118
VDD6
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
(RVS)
VSS57
VSS58
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
132
128
127
122
1217877727166656059
4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
J65
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8 MEM_MA_ADD8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA32
123
MEM_MA_DATA33
125
MEM_MA_DATA34
135
MEM_MA_DATA35
137
MEM_MA_DATA36
124
MEM_MA_DATA37
126
MEM_MA_DATA38
134
MEM_MA_DATA39
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA42
151
MEM_MA_DATA43
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA46
152
MEM_MA_DATA47
154
MEM_MA_DATA48
157
MEM_MA_DATA49
159
MEM_MA_DATA50
173
MEM_MA_DATA51
175
MEM_MA_DATA52
158
MEM_MA_DATA53
160
MEM_MA_DATA54
174
MEM_MA_DATA55
176
MEM_MA_DATA56
179
MEM_MA_DATA57
181
MEM_MA_DATA58
189
MEM_MA_DATA59
191
MEM_MA_DATA60
180
MEM_MA_DATA61
182
MEM_MA_DATA62
192
MEM_MA_DATA63
194
MEMHOTDIMM0#
50
69
83
120
163
201
202
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
TP62
TP63
JNC10
NC_0402_6
MEM_MA_DATA[0..63] 6
MEMHOT_SODIMM# 10
CPU_VDDIO_SUS
LAYOUT: PLACE CLOSE TO DIMMs
3
MEM_MB_ADD[0..15] 6,10
MEM_MB_BANK[2..0] 6,10
MEM_MB_DM[0..7] 6
MEM_VREF_SUS
R25
1K_1%
R0402
R35
1K_1%
R0402
3
C27
0.1U10X
C0402
MEM_MB_DQS0_P 6
MEM_MB_DQS1_P 6
MEM_MB_DQS2_P 6
MEM_MB_DQS3_P 6
MEM_MB_DQS4_P 6
MEM_MB_DQS5_P 6
MEM_MB_DQS6_P 6
MEM_MB_DQS7_P 6
MEM_MB_DQS0_N 6
MEM_MB_DQS1_N 6
MEM_MB_DQS2_N 6
MEM_MB_DQS3_N 6
MEM_MB_DQS4_N 6
MEM_MB_DQS5_N 6
MEM_MB_DQS6_N 6
MEM_MB_DQS7_N 6
MEM_MB_CLK1_P 6
MEM_MB_CLK1_N 6
MEM_MB_CLK7_P 6
MEM_MB_CLK7_N 6
MEM_MB0_CS#0 6,10
MEM_MB0_CS#1 6,10
MEM_M_VREF_SUS
C63
1000P50X
C0402
MEM_MB_CKE0 6,10
MEM_MB_CKE1 6,10
MEM_MB_RAS# 6,10
MEM_MB_CAS# 6,10
MEM_MB_WE# 6,10
MEM_MB0_ODT0 6,10
MEM_MB0_ODT1 6,10
+3VRUN
SDATA0 10,16,18,32
SCLK0 10,16,18,32
+3VRUN
MEM_M_VREF_SUS
CPU_VDDIO_SUS
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
R291 4.7KR0402
2
818287889596103
102
A0
101
A1
VDD0
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14/NC
A15/NC
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VDD1
VSS22
VSS21
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
2
111
104
112
117
118
J64
DQ0
VDD2
VDD3
VSS24
VSS23
VDD4
VDD5
VSS26
VSS25
VDD6
VSS27
DQ1
VDD8
VDD7
VDD9
DQ2
VDD10
VDD11
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS57
VSS58
VSS56
SO-DIMM(RVS)
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
DDR2_SODIMM_RVS_H=9.2mm
132
128
127
122
1217877727166656059
DDR_SODIMM200P_9_2H
Title
DDR2 SODIMMS A/B CHANNEL
Size Document Number Rev
Custom
Date: Sheet
MEM_MB_DATA0
5
MEM_MB_DATA1
7
MEM_MB_DATA2
17
MEM_MB_DATA3
19
MEM_MB_DATA4
4
MEM_MB_DATA5
6
MEM_MB_DATA6
14
MEM_MB_DATA7
16
MEM_MB_DATA8
23
MEM_MB_DATA9
25
MEM_MB_DATA10
35
MEM_MB_DATA11
37
MEM_MB_DATA12
20
MEM_MB_DATA13
22
MEM_MB_DATA14
36
MEM_MB_DATA15
38
MEM_MB_DATA16
43
MEM_MB_DATA17
45
MEM_MB_DATA18
55
MEM_MB_DATA19
57
MEM_MB_DATA20
44
MEM_MB_DATA21
46
MEM_MB_DATA22
56
MEM_MB_DATA23
58
MEM_MB_DATA24
61
MEM_MB_DATA25
63
MEM_MB_DATA26
73
MEM_MB_DATA27
75
MEM_MB_DATA28
62
MEM_MB_DATA29
64
MEM_MB_DATA30
74
MEM_MB_DATA31
76
MEM_MB_DATA32
123
MEM_MB_DATA33
125
MEM_MB_DATA34
135
MEM_MB_DATA35
137
MEM_MB_DATA36
124
MEM_MB_DATA37
126
MEM_MB_DATA38
134
MEM_MB_DATA39
136
MEM_MB_DATA40
141
MEM_MB_DATA41
143
MEM_MB_DATA42
151
MEM_MB_DATA43
153
MEM_MB_DATA44
140
MEM_MB_DATA45
142
MEM_MB_DATA46
152
MEM_MB_DATA47
154
MEM_MB_DATA48
157
MEM_MB_DATA49
159
MEM_MB_DATA50
173
MEM_MB_DATA51
175
MEM_MB_DATA52
158
MEM_MB_DATA53
160
MEM_MB_DATA54
174
MEM_MB_DATA55
176
MEM_MB_DATA56
179
MEM_MB_DATA57
181
MEM_MB_DATA58
189
MEM_MB_DATA59
191
MEM_MB_DATA60
180
MEM_MB_DATA61
182
MEM_MB_DATA62
192
MEM_MB_DATA63
194
MEMHOTDIMM1#
50
69
83
120
163
201
202
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
MS-13331
TP61
TP60
1
MEM_MB_DATA[0..63] 6
MEMHOT_SODIMM#
JNC41 NC_0402_6
MICRO-STAR INT'L CO.,LTD.
95 5 Wednesday, August 22, 2007
1
of
0A
<
MEM_MA_ADD[0..15] 6,9
D D
MEM_MA_BANK[2..0] 6,9
C C
MEM_MB_ADD[0..15] 6,9
B B
MEM_MB_BANK[2..0] 6,9
A A
5
MEM_MA_ADD[0..15]
MEM_MA_BANK[2..0]
MEM_MA_CAS# 6,9
MEM_MA_WE# 6,9
MEM_MA_RAS# 6,9
MEM_MA0_CS#0 6,9
MEM_MA0_CS#1 6,9
MEM_MA0_ODT0 6,9
MEM_MA0_ODT1 6,9
MEM_MA_CKE1 6,9
MEM_MA_CKE0 6,9
MEM_MB_ADD[0..15]
MEM_MB_BANK[2..0]
MEM_MB_CAS# 6,9
MEM_MB_WE# 6,9
MEM_MB_RAS# 6,9
MEM_MB0_CS#0 6,9
MEM_MB0_CS#1 6,9
MEM_MB0_ODT0 6,9
MEM_MB0_ODT1 6,9
MEM_MB_CKE1 6,9
MEM_MB_CKE0 6,9
5
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA_RAS#
MEM_MA0_CS#0
MEM_MA0_CS#1
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CAS#
MEM_MB_WE#
MEM_MB_RAS#
MEM_MB0_CS#0
MEM_MB0_CS#1
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB_CKE1
MEM_MB_CKE0
4
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD9
MEM_MA_ADD12
MEM_MA_ADD8
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_BANK0
MEM_MA_RAS#
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_CKE1
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD11
MEM_MA_ADD5
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
MEM_MA_BANK1
MEM_MA_ADD10
MEM_MA_ADD0
MEM_MA_ADD4
MEM_MA0_ODT0
MEM_MA_ADD13
MEM_MA0_CS#0
MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD9
MEM_MB_ADD12
MEM_MB_ADD8
MEM_MB_ADD1
MEM_MB_ADD3
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_RAS#
MEM_MB_WE#
MEM_MB0_ODT1
MEM_MB_ADD13
MEM_MB_ADD11
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_CKE1
MEM_MB_ADD6
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD7
MEM_MB0_CS#1
MEM_MB_CAS#
MEM_MB_ADD2
MEM_MB_ADD0
MEM_MB0_CS#0
MEM_MB0_ODT0
4
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
8P4R-47R RN0402_MSI
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
8P4R-47R RN0402_MSI
1
3
5
7
1
3
5
7
8P4R-47R RN0402_MSI
CPU_VTT_SUS
RN14
2
4
6
8
RN16
2
4
6
8
RN15
2
4
6
8
RN13
2
4
6
8
RN12
2
4
6
8
RN11
2
4
6
8
RN10
2
4
6
8
RN9
2
4
6
8
CPU_VTT_SUS
RN8
2
4
6
8
RN7
2
4
6
8
RN6
2
4
6
8
RN5
2
4
6
8
RN4
2
4
6
8
RN3
2
4
6
8
RN2
2
4
6
8
RN1
2
4
6
8
C37 0.1U10X
C0402
C69 0.1U10X
C0402
C71 0.1U10X
C0402
C68 0.1U10X
C0402
C70 0.1U10X
C0402
C66 0.1U10X
C0402
C65 0.1U10X
C0402
C64 0.1U10X
C0402
C52 0.1U10X
C0402
C54 0.1U10X
C0402
C50 0.1U10X
C0402
C53 0.1U10X
C0402
C48 0.1U10X
C0402
C47 0.1U10X
C0402
C51 0.1U10X
C0402
C49 0.1U10X
C0402
C39 0.1U10X
C0402
C35 0.1U10X
C0402
C34 0.1U10X
C0402
C33 0.1U10X
C0402
C32 0.1U10X
C0402
C31 0.1U10X
C0402
C30 0.1U10X
C0402
C29 0.1U10X
C0402
C11 0.1U10X
C0402
C3 0.1U10X
C0402
C10 0.1U10X
C0402
C9 0.1U10X
C0402
C8 0.1U10X
C0402
C7 0.1U10X
C0402
C2 0.1U10X
C0402
C6 0.1U10X
C0402
3
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
3
SMBus Address
48h 7-bit
90h 8-bit
R99
X
10K
R0402
SDATA0 9,16,18,32
SCLK0 9,16,18,32
2
D0F-LM75C02-N04
+3VRUN
X
10K
R0402
R119
G
+3VRUN +3VRUN
D S
X
N-2N7002
SOT23SGD_T
C171
X
0.1U10X
C0402
7
A0
6
A1
5
R97
X
X
10K
10K
R0402
R0402
OVERTEMP SENSOR SO-DIMM REGION
Overtemperature Output Assertion Default Setting 80 C
A2
R98
1
SDA
2
SCL
O.S
GND VCC
U11
X
4 8
LM75
SOIC8
D0F-0100402-N04
3
Overtemperature Output Deassertion Default Setting 75 C
2
Q18
X
10K
R0402
X
33R
R0402
X
1U6.3Y
C0402
1
+3VRUN
R100
X
10K
R0402
R118
R114
C179
JNC28 NC_0402_6
D S
Q16
X
N-2N7002
SOT23SGD_T
G
MEMHOT_SODIMM# 9
Title
DDR2 SODIMMS TERMINATIONS
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
B
E C
1
R104
X
10K
R0402
Q14
X
SMBT3904
SOT23EBC_T
CPU_MEMHOT# 7,18
10 55 Wednesday, August 22, 2007
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
HT_CPU_NB_CAD_H0 5
HT_CPU_NB_CAD_L0 5 HT_NB_CPU_CAD_L0 5
HT_CPU_NB_CAD_H1 5
HT_CPU_NB_CAD_L1 5
HT_CPU_NB_CAD_H2 5
HT_CPU_NB_CAD_L2 5
D D
C C
B B
HT_CPU_NB_CAD_H3 5
HT_CPU_NB_CAD_L3 5
HT_CPU_NB_CAD_H4 5
HT_CPU_NB_CAD_L4 5
HT_CPU_NB_CAD_H5 5
HT_CPU_NB_CAD_L5 5
HT_CPU_NB_CAD_H6 5
HT_CPU_NB_CAD_H7 5
HT_CPU_NB_CAD_L7 5 HT_NB_CPU_CAD_L7 5
HT_CPU_NB_CAD_H8 5
HT_CPU_NB_CAD_L8 5
HT_CPU_NB_CAD_H9 5
HT_CPU_NB_CAD_H10 5
HT_CPU_NB_CAD_L10 5
HT_CPU_NB_CAD_H11 5
HT_CPU_NB_CAD_L11 5
HT_CPU_NB_CAD_H12 5
HT_CPU_NB_CAD_L12 5
HT_CPU_NB_CAD_H13 5
HT_CPU_NB_CAD_L13 5
HT_CPU_NB_CAD_H14 5
HT_CPU_NB_CAD_L14 5
HT_CPU_NB_CAD_H15 5
HT_CPU_NB_CAD_L15 5
HT_CPU_NB_CLK_H0 5
HT_CPU_NB_CLK_L0 5
HT_CPU_NB_CLK_H1 5
HT_CPU_NB_CLK_L1 5
HT_CPU_NB_CTL_H0 5
HT_CPU_NB_CTL_L0 5
HT_CPU_NB_CTL_H1 5
HT_CPU_NB_CTL_L1 5
R344 1.21K_1%
R0402
4
HT_RXCALP
HT_RXCALN
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
C23
A24
U23A
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
3
PART 1 OF 6
HYPER TRANSPORT CPU
I/F
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
AMD ( 215NDA7BKA11FG )
FCBGA528_SMDR14_TEST
B01-RX78005-A08
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
2
HT_TXCALP
HT_TXCALN
RS780M=301R
1
HT_NB_CPU_CAD_H0 5
HT_NB_CPU_CAD_H1 5
HT_NB_CPU_CAD_L1 5
HT_NB_CPU_CAD_H2 5
HT_NB_CPU_CAD_L2 5
HT_NB_CPU_CAD_H3 5
HT_NB_CPU_CAD_L3 5
HT_NB_CPU_CAD_H4 5
HT_NB_CPU_CAD_L4 5
HT_NB_CPU_CAD_H5 5
HT_NB_CPU_CAD_L5 5
HT_NB_CPU_CAD_H6 5
HT_NB_CPU_CAD_L6 5 HT_CPU_NB_CAD_L6 5
HT_NB_CPU_CAD_H7 5
HT_NB_CPU_CAD_H8 5
HT_NB_CPU_CAD_L8 5
HT_NB_CPU_CAD_H9 5
HT_NB_CPU_CAD_L9 5 HT_CPU_NB_CAD_L9 5
HT_NB_CPU_CAD_H10 5
HT_NB_CPU_CAD_L10 5
HT_NB_CPU_CAD_H11 5
HT_NB_CPU_CAD_L11 5
HT_NB_CPU_CAD_H12 5
HT_NB_CPU_CAD_L12 5
HT_NB_CPU_CAD_H13 5
HT_NB_CPU_CAD_L13 5
HT_NB_CPU_CAD_H14 5
HT_NB_CPU_CAD_L14 5
HT_NB_CPU_CAD_H15 5
HT_NB_CPU_CAD_L15 5
HT_NB_CPU_CLK_H0 5
HT_NB_CPU_CLK_L0 5
HT_NB_CPU_CLK_H1 5
HT_NB_CPU_CLK_L1 5
HT_NB_CPU_CTL_H0 5
HT_NB_CPU_CTL_L0 5
HT_NB_CPU_CTL_H1 5
HT_NB_CPU_CTL_L1 5
R342 1.21K_1%
R0402
RX780=1.21K
A A
Title
MICRO-STAR INT'L CO.,LTD.
RX/RS780 HT LINK I/F
Size Document Number Rev
A
5
4
3
Date: Sheet
MS-13331
2
11 55 Wednesday, August 22, 2007
of
1
0A
5
4
Close
3
2
1
RX780 RS780M
D D
C C
B B
A A
M82S_HDMI_TX2M_DPB3P 23
M82S_HDMI_TX2P_DPB3N 23
M82S_HDMI_TX1M_DPB2P 23
M82S_HDMI_TX1P_DPB2N 23
M82S_HDMI_TX0M_DPB1P 23
M82S_HDMI_TX0P_DPB1N 23
M82S_HDMI_TXCM_DPB0P 23
M82S_HDMI_TXCP_DPB0N 23
U23B
PCIE_NB_RX0P 22
PCIE_NB_RX0N 22
PCIE_NB_RX1P 22
PCIE_NB_RX1N 22
PCIE_NB_RX2P 22
PCIE_NB_RX2N 22
PCIE_NB_RX3P 22
PCIE_NB_RX3N 22
PCIE_NB_RX4P 22
PCIE_NB_RX4N 22
PCIE_NB_RX5P 22
PCIE_NB_RX5N 22
PCIE_NB_RX6P 22
PCIE_NB_RX6N 22
PCIE_NB_RX7P 22
PCIE_NB_RX7N 22
PCIE_NB_RX8P 22
PCIE_NB_RX8N 22
PCIE_NB_RX9P 22
PCIE_NB_RX9N 22
PCIE_NB_RX10P 22
PCIE_NB_RX10N 22
PCIE_NB_RX11P 22
PCIE_NB_RX11N 22
PCIE_NB_RX12P 22
PCIE_NB_RX12N 22
PCIE_NB_RX13P 22
PCIE_NB_RX13N 22
PCIE_NB_RX14P 22
PCIE_NB_RX14N 22
PCIE_NB_RX15P 22
PCIE_NB_RX15N 22
PCIE_EXPCARD_NB_RXP 31
PCIE_EXPCARD_NB_RXN 31
PCIE_PE1_NB_RXP 38
PCIE_PE1_NB_RXN 38
PCIE_PE2_NB_RXP 38
PCIE_PE2_NB_RXN 38
PCIE_LAN_NB_RXP 33
PCIE_LAN_NB_RXN 33
PCIE_SB_NB_RX0P 17
PCIE_SB_NB_RX0N 17
PCIE_SB_NB_RX1P 17
PCIE_SB_NB_RX1N 17
PCIE_SB_NB_RX2P 17
PCIE_SB_NB_RX2N 17
PCIE_SB_NB_RX3P 17
PCIE_SB_NB_RX3N 17
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
AMD ( 215NDA7BKA11FG )
FCBGA528_SMDR14_TEST
B01-RX78005-A08
R414 0R R0402
R412 0R R0402
R418 0R R0402
R416 0R R0402
R421 0R R0402
R425 0R R0402
R431 0R R0402
R428 0R R0402
PART 2 OF 6
PCIE I/F
GFX
PCIE I/F GPP
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
R413
X
0R
R0402
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
R411
X
0R
R0402
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
R417
R419
X
X
0R
0R
R0402
R0402
GFX_TX0P_C
GFX_TX0N_C
GFX_TX1P_C
GFX_TX1N_C
GFX_TX2P_C
GFX_TX2N_C
GFX_TX3P_C
GFX_TX3N_C
GFX_TX4P_C
GFX_TX4N_C
GFX_TX5P_C
GFX_TX5N_C
GFX_TX6P_C
GFX_TX6N_C
GFX_TX7P_C
GFX_TX7N_C
GFX_TX8P_C
GFX_TX8N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX15P_C
GFX_TX15N_C
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C
GPP_TX2P_C
GPP_TX2N_C
GPP_TX3P_C
GPP_TX3N_C
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
PCE_CALRP
PCE_CALRN
R174 1.27K_1%R0402
R186 2K_1%R0402
R422
X
0R
R0402
R432
R426
X
X
0R
0R
R0402
R0402
C300 0.1U10XC0402
C295 0.1U10XC0402
C311 0.1U10XC0402
C303 0.1U10XC0402
C317 0.1U10XC0402
C323 0.1U10XC0402
C328 0.1U10XC0402
C326 0.1U10XC0402
C642 0.1U10XC0402
C643 0.1U10XC0402
C621 0.1U10XC0402
C615 0.1U10XC0402
C632 0.1U10XC0402
C633 0.1U10XC0402
C616 0.1U10XC0402
C617 0.1U10XC0402
C640 0.1U10XC0402
C641 0.1U10XC0402
C622 0.1U10XC0402
C623 0.1U10XC0402
C634 0.1U10XC0402
C635 0.1U10XC0402
C613 0.1U10XC0402
C614 0.1U10XC0402
C638 0.1U10XC0402
C639 0.1U10XC0402
C618 0.1U10XC0402
C624 0.1U10XC0402
C636 0.1U10XC0402
C637 0.1U10XC0402
C620 0.1U10XC0402
C619 0.1U10XC0402
C611 0.1U10XC0402
C605 0.1U10XC0402
C628 0.1U10XC0402
C627 0.1U10XC0402
C625 0.1U10XC0402
C626 0.1U10XC0402
C631 0.1U10XC0402
C630 0.1U10XC0402
C573 0.1U10XC0402
C576 0.1U10XC0402
C583 0.1U10XC0402
C578 0.1U10XC0402
C305 0.1U10XC0402
C312 0.1U10XC0402
C587 0.1U10XC0402
C588 0.1U10XC0402
+1.1VRUN
R429
X
0R
R0402
HDMI_DATA2P 41
HDMI_DATA2N 41
HDMI_DATA1P 41
HDMI_DATA1N 41
HDMI_DATA0P 41
HDMI_DATA0N 41
HDMI_CLKP 41
HDMI_CLKN 41
PCIE_NB_TX0P 22
PCIE_NB_TX0N 22
PCIE_NB_TX1P 22
PCIE_NB_TX1N 22
PCIE_NB_TX2P 22
PCIE_NB_TX2N 22
PCIE_NB_TX3P 22
PCIE_NB_TX3N 22
PCIE_NB_TX4P 22
PCIE_NB_TX4N 22
PCIE_NB_TX5P 22
PCIE_NB_TX5N 22
PCIE_NB_TX6P 22
PCIE_NB_TX6N 22
PCIE_NB_TX7P 22
PCIE_NB_TX7N 22
PCIE_NB_TX8P 22
PCIE_NB_TX8N 22
PCIE_NB_TX9P 22
PCIE_NB_TX9N 22
PCIE_NB_TX10P 22
PCIE_NB_TX10N 22
PCIE_NB_TX11P 22
PCIE_NB_TX11N 22
PCIE_NB_TX12P 22
PCIE_NB_TX12N 22
PCIE_NB_TX13P 22
PCIE_NB_TX13N 22
PCIE_NB_TX14P 22
PCIE_NB_TX14N 22
PCIE_NB_TX15P 22
PCIE_NB_TX15N 22
PCIE_NB_EXPCARD_TXP 31
PCIE_NB_EXPCARD_TXN 31
PCIE_NB_PE1_TXP 38
PCIE_NB_PE1_TXN 38
PCIE_NB_PE2_TXP 38
PCIE_NB_PE2_TXN 38
PCIE_NB_LAN_TXP 33
PCIE_NB_LAN_TXN 33
PCIE_NB_SB_TX0P 17
PCIE_NB_SB_TX0N 17
PCIE_NB_SB_TX1P 17
PCIE_NB_SB_TX1N 17
PCIE_NB_SB_TX2P 17
PCIE_NB_SB_TX2N 17
PCIE_NB_SB_TX3P 17
PCIE_NB_SB_TX3N 17
Close to RX780
RX780
PCIE16X
ExpressCard
MiniPCIE
LAN
A-Link
MICRO-STAR INT'L CO.,LTD.
Title
RX/RS780 PCI-E LINK&GPP
Size Document Number Rev
B
5
4
3
2
Date: Sheet
MS-13331
12 55 Wednesday, August 22, 2007
1
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
RS780M
R176 0R R0402
A_RST# 15,16,17,19,31,33,38,39
CPU_LDT_RST# 7,17
D D
X
R170 0RR0402
RX780
RX780 1.8V,RS780 3.3V
NB_RST#_IN
RX740/RS740/RS780 difference table
RS740
NB_PWRGD
IN
ALLOW_LDTSTOP
OUT(default)/IN
LDT_STOP#
IN(default)/IN
*, CLMC mode: NB send LDT_STOP#, ALLOW_LDTSTOP will become input
C C
CPU_LDT_STOP# 7,17
3.3V IN
OC
3.3V IN 1.8V IN
+1.1VRUN
+1.8VRUN
RS780M
X
N-FDV301N
SOT23SGD_T
C308
2.2U6.3Y
C0603
Q23
RX780
1.8V IN
OC
RX780
RS780M RS780M
Q21
X
N-FDV301N
SOT23SGD_T
CPU_LDT_REQ# 7
ALLOW_LDTSTOP 17
VDDG_NB VDDG_NB
B B
R180
R184
4.7K
4.7K
R0402
R0402
R341
0R
R0402
RX780
PA_RS780A2
NB_I2C_CLK
NB_I2C_DATA
RX780
RS780M=3.3V RX780=1.8V
+1.8VRUN +3VRUN
VDDG_NB
R177
X
0R
R0603
A A
R171
0R
R0603
RS780
1.8V IN
OC/3.3V IN
*
3.3V IN/OC
*
RS780M
L64 300L300m L0603
1 2
X
L28 300L300m L0603
1 2
X
L27 300L300m L0603
1 2
L34 300L300m L0603
1 2
RS780M
+1.8VRUN
VDDG_NB
RS780M
R166
X
G
4.7K
R0402
NB_LDT_STOP#
D S
R169 0RR0402
VDDG_NB
+1.8VRUN
R145
X
G
4.7K
R0402
NB_ALLOW_LDTSTOP
D S
R144 0RR0402
VDDG_NB
R151
10K
R0402
STRP_DATA
R153
X
2.2K
R0402
NB_R 40
NB_G 40
NB_B 40
NB_HSYNC# 15,40
NB_VSYNC# 15,40
DAC_SCL 40
DAC_SDAT 40
C574
X
2.2U6.3Y
C0603
X
+1.1VRUN
ReferenceDesign=4.7K
RS780M
1.8V Pull up
Optionally
connected
to STRAP EPROM
PA_RS780A3 PU = Optionally
connected to STRAP EPROM
4
+3VRUN
+1.8VRUN
+1.8VRUN
+1.1VRUN
C272
X
2.2U6.3Y
C0603
R172150R 1%R0402
PA_RS780A3 page5
STRP_DATA
L29
RS780M
X
300L600m
L0603
1 2
L25
X
300L300m
L0603
1 2
L24
X
300L300m
L0603
150R termination < 1 inch trace
R152 150R 1%R0402
X
R150 150R 1%R0402
X
R147 150R 1%R0402
X
RS780M
R179 2K_1%R0402
R182 2K_1%R0402
for RX780 PA_RS780A2
DNI for RS780M
C296
C268
2.2U6.3Y
2.2U6.3Y
C0603
C0603
NB_REFCLK_N
R175150R 1% R0402
X
3.3V
1.8V
RS780 RX780
3.3V Pull up
(Connected to
STRAP EPROM
or PWM ckt)
NBGFX_CLKP 16
NBGFX_CLKN 16
NBGPP_CLKP 16
NBGPP_CLKN 16
SBLINK_CLKP 16
SBLINK_CLKN 16
NB_I2C_CLK 40
NB_I2C_DATA 40
NB_DDC0CLK 41
NB_DDC0DAT 41
C276
X
2.2U6.3Y
C0603
C266
X
2.2U6.3Y
C0603
C256
X
2.2U6.3Y
C0603
NB_TV_C 15
RX780
NB_PWRGD 48
NBHT_CLKP 16
NBHT_CLKN 16
NB_AVDD
AVDDDI
AVDDQ
NB_OSC 16
TP44
TP43
TP46
TP42
TP41
RS780M
X
PLLVDD
PLLVDD18
VDDA18HTPLL
VDDA18PCIEPLL
NB_RST#_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
RX780 1.8V,RS780 1.1V
STRP_DATA
R168715R_1%
TP48
TP91
DAC_RSET
R0402
3
RX780M DFT_GPIO[5..0] 1 1 1 1 1 1
U23C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
B8
DDC_CLK0/AUX0P(NC)
A8
DDC_DATA0/AUX0N(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
AMD ( 215NDA7BKA11FG )
FCBGA528_SMDR14_TEST
B01-RX78005-A08
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
PM CLOCKs PLL PWR
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
MIS.
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
TMDS_HPD(NC) I2C_DATA
SUS_STAT#(PWM_GPIO5)
HPD(NC)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
2
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
D9 A9
D10
D12
AE8
AD8
D13
DBG_GPIO2
DNI for
RX,RS780
PA_RS780A2
R183
1.27K_1%
R0402
TEST_EN
X
TP89
TP88
TP86
TP45
TP90
TP87
VDDLTP18
VDDLT18
X
0.1U10X
C0402
R187
1.27K_1%
R0402
PA_RS780A3
for RX780
R391 0R R0402
RS780M
R404
1.8K_1%
R0402
C267
RX780/RS740/RS780 DEBUG PIN MAPPING
DEBUG_OUT0
DEBUG_OUT1
DEBUG_OUT2
DEBUG_OUT3
DEBUG_OUT4
DEBUG_OUT5
DEBUG_OUT6 X
DEBUG_OUT7
RED(DFT_GPIO0)
GREEN(DFT_GPIO1)
Y(DFT_GPIO2)
BLUE(DFT_GPIO3)
TXOUT_L2N(DBG_GPIO0)
TXCLK_LP(DBG_GPIO1)
TXOUT_L3N(DBG_GPIO2)
TXCLK_LN(DBG_GPIO3)
RX780
RX780
C571
X
2.2U6.3Y
C0603
C264
X
4.7U6.3X
C0603
NB_LVDS_TX_L0P 40
NB_LVDS_TX_L0N 40
NB_LVDS_TX_L1P 40
NB_LVDS_TX_L1N 40
NB_LVDS_TX_L2P 40
NB_LVDS_TX_L2N 40
NB_LVDS_TX_CLKLP 40
NB_LVDS_TX_CLKLN 40
NB_LVDS_DIGON 40
NB_LVDS_BLON 40
TP47
COMB_Pb(DFT_GPIO4) X
C_Pr(DFT_GPIO5)
L62 300L300m
1 2
X
L23 220L3A
X
HPD 23,41
SUS_STAT# 18
SUS_STAT#_R 15
LVDS_DIGON
LVDS_ENA_BL
LVDS_BLON
TMDS_HPD
X
X
X
X
L0805_67
RS740
1
+1.8VRUN
L0603
+1.8VRUN
RS780M
RS780
LVDS_DIGON
LVDS_ENA_BL
LVDS_BLON
TMDS_HPD
AUX1N
AUX1P
HPD
AUX_CAL
X
X
Title
RX/RS780 SYSTEM I/F
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
13 55 Wednesday, August 22, 2007
0A
of
5
4
3
2
1
RS740/RX780/RS780 POWER DIFFERENCE TABLE
D11G8E14
E15
J12
K14
M11
VSS4
VSS5
J15
VSS6
VSS7
VSS8
VSS9
L15
U23F
AMD ( 215NDA7BKA11FG )
FCBGA528_SMDR14_TEST
VSS10
B01-RX78005-A08
A2B1D3D5E4G1G2G4H7J4R7L1L2L4L7
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
D D
VSSAPCIE9
M6N4P6R1R2R4V7U4V8V6W1W2W4W7W8Y6AA4
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
VSS2
VSS3
VSS1
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
GROUND
PART 6/6
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
AB15
AB17
VSS34
VSS33
AB19
AE20
K11
AB21
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
POWER
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
C288
0.1U10X
C0402
C281
0.1U10X
C0402
VDD_MEM
NB_VDD33
1.1V(RX780;RS780)
C297
0.1U10X
C0402
C282
0.1U10X
C0402
C283
0.1U10X
C0402
C294
1U6.3Y
C0402
C273
0.1U10X
C0402
C291
1U6.3Y
C0402
C259
4.7U6.3X
C0603
C274
0.1U10X
C0402
Check the
Orange in
this page
MS1332
whether DNI
or Common
Isolated power for side-port memory or DVO interface
C278
X
0.1U10X
C0402
C286
X
0.1U10X
C0402
3
VSSAHT20
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
H20
C C
NB_VDD_MUX=>+1.1VRUN
+1.1VRUN
C271
0.1U10X
C0402
C235
0.1U10X
C0402
C262
0.1U10X
C0402
C299
4.7U6.3X
C0603
C570
X
1U6.3Y
C0402
1.1V(RX780;RS780)
C270
0.1U10X
C0402
1.1V(RX780;RS780)
C243
0.1U10X
C0402
1.2V
C260
0.1U10X
C0402
C290
0.1U10X
C0402
5
C255
0.1U10X
C0402
C289
0.1U10X
C0402
L26 220L3AL0805_67
C263
4.7U6.3X
C0603
L22 220L3AL0805_67
C241
4.7U6.3X
C0603
+1.2VRUN
L21 220L3AL0805_67
B B
+1.8VRUN
+1.8VRUN
A A
+1.8VRUN
C251
4.7U6.3X
C0603
L31 220L3AL0805_67
C298
4.7U6.3X
C0603
C569
1U6.3Y
C0402
R392 0R R0402
X
RS780M
1.8V power for side-port memory or DVO interface
C269
0.1U10X
C0402
C242
0.1U10X
C0402
VDDHT_1
VDDHTRX
VDDHTTX
C254
0.1U10X
C0402
VDDA18PCIE
C293
0.1U10X
C0402
C292
0.1U10X
C0402
NB_MEM
AE25
AD24
AC23
AB22
AA21
AE11
AD11
AB11
U23E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDD18_1
G9
VDD18_2
VDD18_MEM1(NC)
VDD18_MEM2(NC)
AMD ( 215NDA7BKA11FG )
FCBGA528_SMDR14_TEST
B01-RX78005-A08
4
PIN NAME
VDDHT
VDDHTRX
VDDHTTX
VDDA18PCIE
VDDG18
VDD18_MEM
VDDPCIE
VDDC
VDD_MEM
VDDG33
IOPLLVDD18
+1.1VRUN
C285
0.1U10X
C0402
L61 220L3AL0805_67
X
R173 0R R0402
X
C284
0.1U10X
C0402
RS740
NC
NC
+1.2V
NC
+1.8V
NC
+1.2V
+1.2V
+1.8V/1.5V
+3.3V
+1.8V
+1.8VRUN
+3VRUN
C275
10U6.3X
C0603
2
RX780
+1.1V
+1.1V
+1.2V
+1.8V
+1.8V
NC
+1.1V
NC
NC
NC
RS780 VCCNB=1.1V
RX780 VCCNB 1.2V ERRATA RX780-004,FIX A21
C280
10U6.3X
C0603
RS780
+1.1V
+1.1V
+1.2V
+1.8V
+1.8V
+1.1V +1.1V
+1.1V
+1.8V/1.5V
+3.3V
+1.8V
VCC_NB
PIN NAME
IOPLLVDD
AVDD
AVDDDI +1.8V
AVDDQ
PLLVDD18
VDDA18PCIEPLL
VDDA18HTPLL
VDDLTP18
VDDLT18
VDDLT33
Title
RX/RS780 POWER & GND
Size Document Number Rev
Custom
Date: Sheet
MS-13331
RS740
+3.3V
+1.8V
+1.8V
+1.2V
+1.8V
+1.8V
+3.3V
MICRO-STAR INT'L CO.,LTD.
RX780
NC +1.2V
NC
NC
NC
NC +1.8V
NC
+1.8V
+1.8V +1.8V
NC
NC
NC
1
RS780
+1.1V
+3.3V
+1.8V
+1.8V
+1.1V +1.2V PLLVDD
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
NC
of
14 55 Wednesday, August 22, 2007
0A
U23D
hexainf@hotmail.com
GRATIS - FOR FREE
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
AD14
MEM_A7(NC)
AD13
MEM_A8(NC)
AD15
MEM_A9(NC)
AC16
MEM_A10(NC)
AE13
D D
MEM_A11(NC)
AC14
MEM_A12(NC)
Y14
MEM_A13(NC)
AD16
MEM_BA0(NC)
AE17
MEM_BA1(NC)
AD17
MEM_BA2(NC)
W12
MEM_RASb(NC)
Y12
MEM_CASb(NC)
AD18
MEM_WEb(NC)
AB13
MEM_CSb(NC)
AB18
MEM_CKE(NC)
V14
MEM_ODT(NC)
V15
MEM_CKP(NC)
W14
MEM_CKN(NC)
AE12
MEM_COMPP(NC)
AD12 AE18
MEM_COMPN(NC) MEM_VREF(NC)
AMD ( 215NDA7BKA11FG )
FCBGA528_SMDR14_TEST
B01-RX78005-A08
5
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
please make a
provision for tying to
their power rails
IOPLLVDD18
IOPLLVDD
MEN_VREF
Check the Orange in this page MS1332
whether DNI or Common
R362 0RR0402
X
R351 0RR0402
X
R367 0RR0402
X
RS740/RX780/RS780: LOAD_EEPROM_STRAPS
RS780M
C C
SUS_STAT#_R 13 A_RST# 13,16,17,19,31,33,38,39
D11 BAS40WSXDIODE_SOD323
A C
RS780M
NB_VSYNC# 13,40
NB_TV_C 13
R407 3KXR0402
R158 1KXR0402
PA_RX7X0A1
RX780
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RX780: pin DFT_GPIO1
RS780: pin SUS_STAT#
STRAP_DEBU G_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO.
1 : Enable (RX780, RS780)
0 : Disable (RX780, RS780)
PIN: RX780-->NB_TV_C (pin DFT_GPIO5) ; RS780--> VSYNC# (pin VSYNC)
4
+1.8VRUN +1.1VRUN
+1.8VRUN
3
2
1
RS740/RX780/RS780: STRAP_SIDE-PORT MEMORY ENABLE
Enables Side port memory
1 : Disable (RS740/RS780)
0 : Enable (RS740/RS780)
RS780: pin HSYNC
RX780: Not Applicable
RS780M
R405 3KR0402
NB_HSYNC# 13,40
X
+3VRUNR406 3K XR0402
RX740: DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]
These pin straps are used to configure PCI-E GPP mode.
000 : 00001
B B
A A
5
001 : 00010
010 : 01011
011 : 00100
100 : 01010
101 : 01100
111 : 01011
RX780: STRAP_PCIE_GPP_CFG[2:0] (Pins:RX780_DFT_GPIO[4:2])
111: 1-1-1-1-1-1 Mode L default
110: 1-1-1-1-1-1 Mode L
101: 2-0-2-0-2-0 Mode C2
100: 2-0-2-0-1-1 Mode K
011: 2-0-1-1-1-1 Mode E
010: 1-1-1-1-1-1 Mode L
001: 4-0-0-0-1-1 Mode C
000: 4-0-0-0-2-0 Mode B
RS780: STRAP_PCIE_GPP_CFG[2:0] (configurable thru register settings only)
1-1-1-1-1-1 Mode L default
1-1-1-1-1-1 Mode L
2-0-2-0-2-0 Mode C2
2-0-2-0-1-1 Mode K
2-0-1-1-1-1 Mode E
1-1-1-1-1-1 Mode L
4-0-0-0-1-1 Mode C
4-0-0-0-2-0 Mode B
4
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
Enables Test debug bus over PCIE bus
(Applicable to RX780 & RS780 Only)
1. Disable (can be enabled thru nbcfg register)
0 : Enable
RX780: pin DFT_GPIO0
RS780: configurable thru register setting only
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
RX780: Enables the Test Debug Bus using PCIE bus
1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS740) Enable (RS780)
0 : Enable (RS740) Disable(RS780)
Title
RX/RS780-DVO
Size Document Number Rev
Custom
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
0A
of
15 55 Wednesday, August 22, 2007
<
<
<
5
4
3
2
1
L4 300L600m L0603
D D
1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U11
2- PUT DECOUPLING CAPS CLOSE TO U11
POWER PIN
C C
B B
CLK_VDD +3VRUN
C15
C44
0.1U10X
22U6.3X
C0402
C0805_67
+3VRUN
L5 300L300m L0603
1 2
L6 300L300m L0603
1 2
C17
0.1U10X
C0402
C55
0.1U10X
C0402
C58
0.1U10X
C0402
0.1U10X
C0402
+3VRUN
L1 300L300m L0603
1 2
VDDREF
0.1U10X
C0402
VDD48
C45
X
0.1U10X
C0402
C43
C18
Parallel Resonance Crystal
C56 33P50N C0402
C57 33P50N C0402
when driven low
SB_SRC clocks slow
to reduced setpoint
only supported with
custom CG IC
C16
0.1U10X
C0402
14.31818MHz
A_RST# 13,15,17,19,31,33,38,39
X
0.1U10X
C0402
Dynamic Over Clocking pin: real time frequency selection 0: Normal; 1: Frequency will transition to a preprogrammed value in the I2c. Pin 6,7
C60
C13
22U6.3X
C0805_67
Y1
TXC7A
SDATA0 9,10,18,32
CLK_VDD
SCLK0 9,10,18,32
C59
1U6.3Y
C0402
X
1M
R0402
1 2
CLK_VDD
A C
D2
BAS40WS
DIODE_SOD323
CLK_VDDA
VDDREF
VDD48
CLK_VDD
R48
X14I
X14O
R26 8.2KR0402
RESTORE#
R24
8.2K
R0402
U4
44
VDDA
43
GNDA
61
GNDREF
64
VDD48
34
VDDATIG
48
VDDCPU
56
VDDHTT
25
VDDSB_SRC
11
VDDSRC
39
VDDSATA
16
VDDSRC
3
GND48
33
GNDATIG
28
GNDATIG
47
GNDCPU
53
GNDHTT
42
GNDSATA
24
GNDSB_SRC
10
GNDSRC
17
GNDSRC
62
X1
63
X2
51
PD#
4
SMBCLK
5
SMBDAT
52
RESTORE#
ICS ( ICS9LPRS477AKLFT )
QFN_64
I11-RS47700-I02
OVER CLOCK
CPUKG0T_LPRS
CPUKG0C_LPRS
CPUKG1T_LPRS
CPUKG1C_LPRS VDDREF
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
DOC_1/SRC5T_LPRS
DOC_0/SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
HTT0T_LPRS/66M
HTT0C_LPRS/66M
SEL_DOC/48MHz_1
REF0/SEL_HTT66
REF1/SEL_SATA
GND
65
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
ATIG3T_LPRS
ATIG3C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
48MHz_0
REF2
CPU_CLKP_R
50
CPU_CLKN_R
49
46
45 60
NBGFX_CLKP_R
38
NBGFX_CLKN_R
37
GFX_CLKP_R
36
GFX_CLKN_R
35
PCIE_PE2_CLKP_R
32
PCIE_PE2_CLKN_R
31
30
29
27
26
23
22
NBGPP_CLKP_R
21
NBGPP_CLKN_R
20
PCIE_EXPCARD_CLKP_R
19
PCIE_EXPCARD_CLKN_R
18
PCIE_PE1_CLKP_R
15
PCIE_PE1_CLKN_R
14
NBSLINK_CLKP_R
13
NBSLINK_CLKN_R
12
PCIE_LAN_CLKP_R
9
PCIE_LAN_CLKN_R
8
FQ_SL0
7
FQ_SL1
6
SBSRC_CLKP_R
41
SBSRC_CLKN_R
40
NBHTREF_CLKP_R
55
NBHTREF_CLKN_R
54
48M_USB_R
2
SELDOC
1
SEL_HT66
59
SEL_SATA
58
NB_OSC_R
57
RX780
RS780
Place within 0.5" of CLKGEN
X
JNC4 NC_0402_6
JNC5 NC_0402_6
RX780
R20 0R R0402
R21 0R R0402
R22 0R R0402
R23 0R R0402
JNC6 NC_0402_6
JNC7 NC_0402_6
R45 0R R0402
R47 0R R0402
JNC11 NC_0402_6
JNC12 NC_0402_6
JNC14 NC_0402_6
JNC13 NC_0402_6
JNC18 NC_0402_6
JNC17 NC_0402_6
JNC20 NC_0402_6
JNC19 NC_0402_6
JNC16 NC_0402_6
JNC15 NC_0402_6
JNC2 NC_0402_6
JNC3 NC_0402_6
JNC9 NC_0402_6
JNC8 NC_0402_6
R51 33R
R53 10K R0402
R52 10K R0402
X
R41 33R
R0402
OSC_14M_NB
1.8V 33R/43R
1.1V 200R/100R
SEL_SATA
SEL_HT66
R39
8.2K
R0402
R16 261R R0402
R0402
R38
43.2R_1%
R0402
CLK_VDD
R40
8.2K
R0402
R37
X
8.2K
R0402
CPU_CLKP 7
CPU_CLKN 7
NBGFX_CLKP 13
NBGFX_CLKN 13
GFX_CLKP 22
GFX_CLKN 22
PCIE_PE2_CLKP 38
PCIE_PE2_CLKN 38
NBGPP_CLKP 13
NBGPP_CLKN 13
PCIE_EXPCARD_CLKP 31
PCIE_EXPCARD_CLKN 31
PCIE_PE1_CLKP 38
PCIE_PE1_CLKN 38
SBLINK_CLKP 13
SBLINK_CLKN 13
PCIE_LAN_CLKP 33
PCIE_LAN_CLKN 33
FREQ_SL0 39
FREQ_SL1 39
SBSRC_CLKP 17
SBSRC_CLKN 17
NBHT_CLKP 13
NBHT_CLKN 13
CLK_48M_USB 18
+3VRUN
NB_OSC 13
Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.
NB CLOCK INPUT TABL E
NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK
* RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output
mode.
RS740
66M SE(SINGLE END)
NC
14M SE (3.3V)
NC REFCLK_N
100M DIFF
NC
100M DIFF
RX780
100M DIFF
100M DIFF
14M SE (1.8V)
NC
100M DIFF
100M DIFF
100M DIFF
EMI 07/23
EC243 22P50N C0402
X
EC244 22P50N C0402
X
EC245 22P50N C0402
EC246 22P50N C0402
X
EC247 22P50N C0402
X
1
SEL_HTT66
SEL_SATA
* default
*
*1
0
CPU_CLKP
CPU_CLKN
CLK_48M_USB
PCIE_LAN_CLKP_R
PCIE_LAN_CLKN_R
66 MHz 3.3V single ended HTT clock
100 MHz differential HTT clock 0
100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
RS780
100M DIFF
100M DIFF
14M SE (1.1V)
vref
100M DIFF(IN/OUT)*
NC or 100M DIFF OUTPUT
100M DIFF
A A
Title
CLOCK GENERATOR
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
16 55 Wednesday, August 22, 2007
0A
of
<
hexainf@hotmail.com
GRATIS - FOR FREE
<
D D
C C
B B
A A
5
PLACE THESE PCIE AC COUPLING
CAPS CLOSE TO U600
Y5 32.768KHz xtal4p_ma306
1 4
R360
X
20M
R0603
PLACE THESE COMPONENTS CLOSE TO SB700,
AND USE GROUND GUARD FOR 32K_X1 AND
32K_X2
2 3
R365 20M R0603
C567
18P50N
C0402
PCIE_SB_NB_RX0P 12
PCIE_SB_NB_RX0N 12
PCIE_SB_NB_RX1P 12
PCIE_SB_NB_RX1N 12
PCIE_SB_NB_RX2P 12
PCIE_SB_NB_RX2N 12
PCIE_SB_NB_RX3P 12
PCIE_SB_NB_RX3N 12
PCIE_NB_SB_TX0P 12
PCIE_NB_SB_TX0N 12
PCIE_NB_SB_TX1P 12
PCIE_NB_SB_TX1N 12
PCIE_NB_SB_TX2P 12
PCIE_NB_SB_TX2N 12
PCIE_NB_SB_TX3P 12
PCIE_NB_SB_TX3N 12
+1.2VRUN
L57 220L3A L0805_67
C608 AND C609 CLOSE
TO U600
C568
18P50N
C0402
4
which one need connect to LAN_RST S5_3.3V
A_RST# 13,15,16,19,31,33,38,39
C191 0.1U10X C0402
C549 0.1U10X C0402
C546 0.1U10X C0402
C192 0.1U10X C0402
PCIE_VDDR
C545
10U6.3X
C0603
ALLOW_LDTSTOP 13
CPU_PROCHOT# PU 3.3v BECAUSE FOR FAN CONTROL.
OTHERWISE, PU TO VDDIO.
SBSRC_CLKP 16
SBSRC_CLKN 16
CPU_PROCHOT# 7
CPU_PWRGD 7
CPU_LDT_STOP# 7,13
CPU_LDT_RST# 7,13
R376 33R
C190 0.1U10X C0402
C548 0.1U10X C0402
C547 0.1U10X C0402
C193 0.1U10X C0402
562_1%
R329
R0402
R328 2.05k_1%
R0402
C551
1U6.3Y
C0402
+3VRUN
R333
10K
R0402
R0402
32K_X1
32K_X2
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
SB_PE_CP
SB_PE_CN
PCIEPVDD
+1.8VRUN
ARST#
R332
10K
R0402
U22A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
AMD ( 218S7EALA11FG )
FCBGA528
B01-SB70005-A08
3
SB700
Part 1 of 5
PCI EXPRESS INTERFACE
RTC XTAL
LPC RTC
CPU
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCIRST#
FRAME#
PCI INTERFACE
DEVSEL#
REQ3#/GPIO70
REQ4#/GPIO71
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
CLOCK GENERATOR
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0
LPCCLK1
LFRAME#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
INTRUDER_ALERT#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
GNT0#
GNT1#
GNT2#
LOCK#
LAD0
LAD1
LAD2
LAD3
LDRQ0#
SERIRQ
RTCCLK
VBAT
P4
P3
P1
P2
T4
T3
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
AD3
AC4
AE2
AE3
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
C3
C2
B2
PCICLKRUN#
PCI_CLK0_R
PCI_CLK1_R
PCI_CLK5_R
PCI_RST#
X
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
R348 0RR0402
LPC_CK0
R330 22R R0402
LPC_CK1
R331 22R R0402
INTRUDER_ALERT#
RTCVCC
C258
1U6.3Y
C0402
2
R380 22R R0402
R379 22R R0402
R381 22R R0402
R397 22R
R0402
PCI_AD23 21
PCI_AD24 21
PCI_AD25 21
PCI_AD26 21
PCI_AD27 21
PCI_AD28 21
C253
0.1U10X
C0402
TP85
TP84
TP38
TP39
TP83
TP40
PCI_CLK0
PCI_CLK1 32
PCI_CLK2 21
PCI_CLK3 21
PCI_CLK4 21
PCI_CLK5 21,39
PCI_CLK5
PCI_CLK4
PCI_CLK3
PCI_CLK2
PCI_CLK1
PCI_CLK0
EC219
22P50N
C0402
PCI_CLKRUN# 39
LPC_CLK0 21
LPC_CLK1 21
LAD0 39
LAD1 39
LAD2 39
LAD3 39
LFRAME# 39
LDRQ#0 39
SERIRQ 39
RTC_CLK 21
PCI CLK 1 ==>Array Mic
EC218
22P50N
C0402
EC217
22P50N
C0402
EC216
22P50N
C0402
POWER EXPRESS SUPPORT
PE_GPIO1 MXM POWER ENABLE
PE_GPIO2 MODE SWITCH(BY NB)
TMDS_HPD0 MXM HOT PLUG
INTRUDER_ALERT#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
1
EC220
EC221
22P50N
22P50N
C0402
C0402
R366 8.2K R0402
X
R359 8.2K R0402
X
R343 8.2K R0402
X
R345 8.2K R0402
X
R352 8.2K R0402
X
H: Enable PE_GPIO0 MXM RESET
H: Enable
H:MXM
L:NB
RTCVCC
R148
X
1M
R0402
1
D10
S-BAT54C
1PS226_T
2
R159
510R
R0402
RTCVDD
1
2
CN3
BH1X2S#_white-1.25pitch-RH
3 4
53398_02
N32-1020660-A10
+3VRUN
RTCVCC +3VALW
3
C261
1U6.3Y
C0402
Title
SB700 PCIE/PCI/CPU/LPC
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
17 55 Wednesday, August 22, 2007
0A
of
<
<
<
D D
C C
+3VRUN
+3VSUS
B B
5
R396 4.7K R0402
R122 2.2K R0402
R123 2.2K R0402
R374 2.2K R0402
R146 2.2K R0402
4
PCIE_WAKE# 33
SB_PWRON# 39
SB_PWRGD 48
SUS_STAT# 13
KA20M#_SB 39
KRST#_SB 39
KBSCI# 39
LPC_SMI# 39
PCIE_CLKEN 31
PCIE_WAKE_UP# 31,38
CPU_THERMTRIP# 7
WD_PWRGD 48
RSMRST# 39
6/4 Justin
SB_DEPOP# 35
SDATA0 9,10,16,32
SDATA1 31,38
CPU_THRM_ALERT- 7,39
CPU_MEMHOT# 7,10
SUS_STAT#
SCLK0
SDATA0 AZSDATAOUT
SCLK1
SDATA1
JTAG MAPPING:
TCK = GPM2
TDI = GPM1
TDO = GPM3
TMS = TEST1
RST# = GPM0
AZ_BIT_CLK 31,34
AZ_SDATA_OUT 31,34
ACZ_SDATA_IN0 34
AZ_SYNC 31,34
JNC47
NC_0402_6
SLP_S3# 39,48
JNC48
SLP_S5# 39
NC_0402_6
SPKR 34
SCLK0 9,10,16,32
SCLK1 31,38
D19
BAS40WS
DIODE_SOD323
C720
X
22P50N
C0402
R137
33R
R0402
AZ_RST# 21,31,34,35
R141
33R
R0402
CPU_MEMHOT#_IN
A C
R483
0R
R0402
R375
33R
R0402
AZSYNC
AZRST#
SLPS3#
SLPS5#
SB_TEST2
SB_TEST1
SB_TEST0
U22D
E1
PCI_PME#/GEVENT4#
E2
RI#/EXTEVNT0#
H7
SLP_S2/GPM9#
F5
SLP_S3#
G1
SLP_S5#
H2
PWR_BTN#
H1
PWR_GOOD
K3
SUS_STAT#
H5
TEST2
H4
TEST1
H3
TEST0
Y15
GA20IN/GEVENT0#
W15
KBRST#/GEVENT1#
K4
LPC_PME#/GEVENT3#
K24
LPC_SMI#/EXTEVNT1#
F1
S3_STATE/GEVENT5#
J2
SYS_RESET#/GPM7#
H6
WAKE#/GEVENT8#
F2
BLINK/GPM6#
J6
SMBALERT#/THRMTRIP#/GEVENT2#
W14
NB_PWRGD
D3
RSMRST#
AE18
SATA_IS0#/GPIO10
AD18
CLK_REQ3#/SATA_IS1#/GPIO6
AA19
SMARTVOLT/SATA_IS2#/GPIO4
W17
CLK_REQ0#/SATA_IS3#/GPIO0
V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21
SPKR/GPIO2
AA18
SCL0/GPOC0#
W18
SDA0/GPOC1#
K1
SCL1/GPOC2#
K2
SDA1/GPOC3#
AA20
DDC1_SCL/GPIO9
Y18
DDC1_SDA/GPIO8
C1
LLB#/GPIO66
Y19
SHUTDOWN#/GPIO5
G5
DDR3_RST#/GEVENT7#
B9
USB_OC6#/IR_TX1/GEVENT6#
B8
USB_OC5#/IR_TX0/GPM5#
A8
USB_OC4#/IR_RX0/GPM4#
A9
USB_OC3#/IR_RX1/GPM3#
E5
USB_OC2#/GPM2#
F8
USB_OC1#/GPM1#
E4
USB_OC0#/GPM0#
M1
AZ_BITCLK
M2
AZ_SDOUT
J7
AZ_SDIN0/GPIO42
J8
AZ_SDIN1/GPIO43
L8
AZ_SDIN2/GPIO44
M3
AZ_SDIN3/GPIO46
L6
AZ_SYNC
M4
AZ_RST#
L5
AZ_DOCK_RST#/GPM8#
H19
IMC_GPIO0
H20
IMC_GPIO1
H21
SPI_CS2#/IMC_GPIO2
F25
IDE_RST#/F_RST#/IMC_GPO3
D22
IMC_GPIO4
E24
IMC_GPIO5
E25
IMC_GPIO6
D23
IMC_GPIO7
AMD ( 218S7EALA11FG )
FCBGA528
B01-SB70005-A08
3
HD AUDIO
SB700
USBCLK/14M_25M_48M_OSC
ACPI / WAKE UP EVENTS
USB OC
INTEGRATED uC
INTEGRATED uC
Part 4 of 5
USB_RCOMP
USB MISC
USB_FSD13P
USB_FSD13N
USB_FSD12P
USB_FSD12N
USB 1.1
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB 2.0
USB_HSD4N
USB_HSD3P
GPIO
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
C8
G8
E6
E7
F7
E8
H11
J10
E11
F11
A11
B11
C10
D10
G11
H12
E12
E14
C12
D12
B12
A12
G12
G14
H14
H15
A13
B13
B14
A14
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
USB_RCOMP
2
CLK_48M_USB 16
R135 11.8K_1% R0402
USBP9 30
USBN9 30
USBP8 36
USBN8 36
USBP7 31
USBN7 31
USBP6 36
USBN6 36
USBP5 36
USBN5 36
USBP4 36
USBN4 36
USBP3 36
USBN3 36
USBP2 36
USBN2 36
USBP1 38
USBN1 38
USBP0 38
USBN0 38
GP16 21
GP17 21 ACZ_SDATA_IN1 31
STRAP pin to define
use LPC or SPI
ROM
CardReader
Bluetooth
ExpressCard
Connector3
Connector2
Connector1
FingerPrint
WebCamera
MiniPCIE2
MiniPCIE1
SB_TEST2
SB_TEST0
SB_TEST1
1
TEST Pins
TEST0 TEST control data input
TEST1 TEST control mode
TEST2 Reserve TEST input
TEST2 TEST1 TEST0 TEST Mode Description
0 0 0 None Normal operation
0 0 1 Reserved Reserved for ASIC debug
0 1 x Test Mode Enalbe Test Mode
1 x x Reserved Reserved for ASIC debug
SB700 SB_TEST0,SB_TEST1,SB_TEST2 has internal 10K PD.
+3VSUS
R371
X
2.2K
R0402
R372
X
10K
R0402
X
2.2K
R0402
X
10K
R0402
R395
R373
R140
X
2.2K
R0402
R138
X
10K
R0402
A A
Title
SB700 ACPI/GPIO/USB/AUDIO
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
18 55 Wednesday, August 22, 2007
0A
of
5
hexainf@hotmail.com
GRATIS - FOR FREE
PLACE SATA AC COUPLING
CAPS CLOSE TO SB700
SATA_TX0+_C 37
D D
SATA_TX0-_C 37
SATA_RX0-_C 37
SATA_RX0+_C 37
SATA_TX0+_C
SATA_RX0-_C
SATA_RX0+_C
C566 10N16X C0402
C565 10N16X C0402
C561 10N16X C0402
C560 10N16X C0402
SATA_TX0+
SATA_TX0- SATA_TX0-_C
SATA_RX0SATA_RX0+
ODD
HDD
SATA_TX4+_C 37
C C
B B
A A
SATA_TX4-_C 37
SATA_RX4-_C 37
SATA_RX4+_C 37
SATA_TX4+_C
SATA_TX4-_C
SATA_RX4-_C
SATA_RX4+_C
R134 10M_1% R0402
Y4 25MHz
OSC_5_2X3_4
C222
10P50N
C0402
L18 220R_200m L0603
+3VRUN
L17 220R_200m L0603
5
C559 10N16X C0402
C558 10N16X C0402
C554 10N16X C0402
C557 10N16X C0402
R133 1K_1%R0402
C229
10P50N
C0402
PLLVDD_ATA +1.2VRUN
C228
1U6.3Y
C0402
XTLVDD_ATA
C220
1U6.3Y
C0402
SATA_TX4+
SATA_TX4-
SATA_RX4SATA_RX4+
SATA_CAL
SATA_X1
SATA_X2
SATA_ACT# 37
PLLVDD_ATA
XTLVDD_ATA
NOTE:
PLACE SATA_CAL
RES VERY CLOSE
TO BALL OF U600
4
U22B
AD9
SATA_TX0P
AE9
SATA_TX0N
AB10
SATA_RX0N
AC10
SATA_RX0P
AE10
SATA_TX1P
AD10
SATA_TX1N
AD11
SATA_RX1N
AE11
SATA_RX1P
AB12
SATA_TX2P
AC12
SATA_TX2N
AE12
SATA_RX2N
AD12
SATA_RX2P
AD13
SATA_TX3P
AE13
SATA_TX3N
AB14
SATA_RX3N
AC14
SATA_RX3P
AE14
SATA_TX4P
AD14
SATA_TX4N
AD15
SATA_RX4N
AE15
SATA_RX4P
AB16
SATA_TX5P
AC16
SATA_TX5N
AE16
SATA_RX5N
AD16
SATA_RX5P
V12
SATA_CAL
Y12
SATA_X1
AA12
SATA_X2
W11
SATA_ACT#/GPIO67
AA11
PLLVDD_SATA
W12
XTLVDD_SATA
AMD ( 218S7EALA11FG )
FCBGA528
B01-SB70005-A08
LAN_RST
A_RST# 13,15,16,17,31,33,38,39
4
SB700
Part 2 of 5
SATA PWR SERIAL ATA
R132 0R R0402
X
R370 0R R0402
RX780
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
ATA 66/100/133
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO13
SPI ROM
ROM_RST#/GPIO14
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53
VIN1/GPIO54
HW MONITOR
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
PCIE_RST 22
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
AVDD
AVSS
3
AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
U15
J1
M8
M5
M7
P5
P8
R8
C6
B6
A6
A5
B5
A4
B4
C4
D4
D5
D6
A7
B7
F6
G7
LAN_RST
C230
X
0.1U10X
C0402
TP69
TP72
TP75
TP71
TP76
TP79
TP70
TP82
TP81
TP78
TP80
TP77
TP67
TP74
TP73
TP68
SB_AVDD
HWM_AGND
L20 220R_200mL0603
X
C234
X
2.2U6.3Y
C0603
JNC33 NC_0402_6
2
+3VSUS
1
MICRO-STAR INT'L CO.,LTD.
Title
SB700 SATA/IDE/HWM/SPI
Size Document Number Rev
B
3
2
Date: Sheet
MS-13331
19 55 Wednesday, August 22, 2007
1
of
0A
5
4
3
2
1
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS
POSSIBLE.
+3VRUN
D D
C C
B B
C233
0.1U10X
C0402
+1.2VRUN
+1.2VRUN
+3VSUS
L58 220L3AL0805_67
C224
C239
22U6.3X
0.1U10X
C0805_67
C0402
L13 220L3A L0805_67
C174
22U6.3X
C0805_67
L15 220L3AL0805_67
C207
22U6.3X
C0805_67
C212
C214
1U6.3Y
1U6.3Y
C0402
C0402
+1.2VRUN
C245
1U6.3Y
1U6.3Y
C0402
C0402
VDD33_18
+1.8V : FLASH MEMORY MODE(DEFAULT)
+3.3V : IDE MODE
C537
C539
1U6.3Y
1U6.3Y
C0402
C0402
C204
C216
0.1U10X
0.1U10X
C0402
C0402
C205
C213
C206
1U6.3Y
C0402
+3VRUN
0.1U10X
0.1U10X
C0402
C0402
L16 300L300m
1 2
L12 220L3A L0805_67
C195
0.1U10X
C0402
1U6.3Y
C0402
C541
1U6.3Y
C0402
C215
1U6.3Y
C0402
AVDDCK_3.3V
L0603
C208
2.2U6.3Y
C0603
C186
1U6.3Y
C0402
C211
0.1U10X
C0402
1U6.3Y
C0402
C183
0.1U10X
C0402
C210
1U6.3Y
C0402
C184
1U6.3Y
C0402
AVDD_SATA
C247
C246
C244
C556
10U6.3X
C0603
C226
1U6.3Y
C0402
C536
0.1U10X
C0402
C180
10U6.3X
C0603
Please make a
provision for
tying to
+3.3V_S0
PCIE_VDDR
AVDD_USB
C555
10U6.3X
C0603
C182
0.1U10X
C0402
+1.2V_CKVDD
U22C
L9
VDDQ_1
M9
VDDQ_2
T15
VDDQ_3
U9
VDDQ_4
U16
VDDQ_5
U17
VDDQ_6
V8
VDDQ_7
W7
VDDQ_8
Y6
VDDQ_9
AA4
VDDQ_10
AB5
VDDQ_11
AB21
VDDQ_12
Y20
VDD33_18_1
AA21
VDD33_18_2
AA22
VDD33_18_3
AE25
VDD33_18_4
P18
PCIE_VDDR_1
P19
PCIE_VDDR_2
P20
PCIE_VDDR_3
P21
PCIE_VDDR_4
R22
PCIE_VDDR_5
R24
PCIE_VDDR_6
R25
PCIE_VDDR_7
AA14
AVDD_SATA_1
AB18
AVDD_SATA_4
AA15
AVDD_SATA_2
AA17
AVDD_SATA_3
AC18
AVDD_SATA_5
AD17
AVDD_SATA_6
AE17
AVDD_SATA_7
A16
AVDDTX_0
B16
AVDDTX_1
C16
AVDDTX_2
D16
AVDDTX_3
D17
AVDDTX_4
E17
AVDDTX_5
F15
AVDDRX_0
F17
AVDDRX_1
F18
AVDDRX_2
G15
AVDDRX_3
G17
AVDDRX_4
G18
AVDDRX_5
AMD ( 218S7EALA11FG )
FCBGA528
B01-SB70005-A08
SB700
Part 3 of 5
PCI/GPIO I/O
IDE/FLSH I/O
POWER
A-LINK I/O
3.3V_S5 I/O CORE S5
SATA I/O
USB_PHY_1.2V_1
USB_PHY_1.2V_2
PLL CLKGEN I/O
USB I/O
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
CORE S0
VDD_9
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
S5_1.2V_1
S5_1.2V_2
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
AVDDC
L15
M12
M14
N13
P12
P14
R11
R15
T16
L21
L22
L24
L25
A17
A24
B17
J4
J5
L1
L2
G2
G4
A10
B10
AE7
J16
K17
E9
+1.2VSUS
C209
1U6.3Y
C0402
+1.2V_CKVDD
+1.2VSUS
+1.2VSUS
C237
1U16Y
C0603
ERRATA PA_SB700AA1
R131 0R R0603
X
C227
C218
1U6.3Y
1U6.3Y
C0402
C0402
C252
C201
22U6.3X
1U6.3Y
C0805_67
C0402
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
+3.3V_AVDDC
+3.3V_AVDDC
C238
C236
2.2U6.3Y
0.1U10X
C0603
C0402
+1.2VRUN +1.2VSUS
SB_VDD
C203
C217
22U6.3X
1U6.3Y
C0805_67
C0402
+3VSUS
C240
1U6.3Y
C0402
R139 1K R0402
D9
BAS40WS
DIODE_SOD323
L19
1 2
300L300m
L0603
R136 0R R0603
C223
0.1U10X
C0402
+5VRUN
+3VRUN
A C
+3VSUS
U22E
T10
AVSS_SATA_1
U10
AVSS_SATA_2
U11
AVSS_SATA_3
U12
AVSS_SATA_4
V11
AVSS_SATA_5
V14
AVSS_SATA_6
W9
AVSS_SATA_7
Y9
AVSS_SATA_8
Y11
AVSS_SATA_9
Y14
AVSS_SATA_10
Y17
AVSS_SATA_11
AA9
AVSS_SATA_12
AB9
AVSS_SATA_13
AB11
AVSS_SATA_14
AB13
AVSS_SATA_15
AB15
AVSS_SATA_16
AB17
AVSS_SATA_17
AC8
AVSS_SATA_18
AD8
AVSS_SATA_19
AE8
AVSS_SATA_20
A15
AVSS_USB_1
B15
AVSS_USB_2
C14
AVSS_USB_3
D8
AVSS_USB_4
D9
AVSS_USB_5
D11
AVSS_USB_6
D13
AVSS_USB_7
D14
AVSS_USB_8
D15
AVSS_USB_9
E15
AVSS_USB_10
F12
AVSS_USB_11
F14
AVSS_USB_12
G9
AVSS_USB_13
H9
AVSS_USB_14
H17
AVSS_USB_15
J9
AVSS_USB_16
J11
AVSS_USB_17
J12
AVSS_USB_18
J14
AVSS_USB_19
J15
AVSS_USB_20
K10
AVSS_USB_21
K12
AVSS_USB_22
K14
AVSS_USB_23
K15
AVSS_USB_24
H18
PCIE_CK_VSS_1
J17
PCIE_CK_VSS_2
J22
PCIE_CK_VSS_3
K25
PCIE_CK_VSS_4
M16
PCIE_CK_VSS_5
M17
PCIE_CK_VSS_6
M21
PCIE_CK_VSS_7
P16
PCIE_CK_VSS_8
F9
AVSSC
AMD ( 218S7EALA11FG )
FCBGA528
B01-SB70005-A08
SB700
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
Part 5 of 5
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
GROUND
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
A A
L14 300L300mL0603
1 2
5
C202
2.2U6.3Y
C0603
4
AVDDCK_1.2V
C564
C562
22U6.3X
C0805_67
3
0.1U10X
C0402
C249
0.1U10X
C0402
C250
1U6.3Y
C0402
C563
1U6.3Y
C0402
Title
SB700 POWER & GND
Size Document Number Rev
Custom
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
20 55 Wednesday, August 22, 2007
0A
of
<
hexainf@hotmail.com
GRATIS - FOR FREE
<
<
<
<
<
<
<
<
<
5
4
3
2
1
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
X
R355
2.2K
R0402
+3VSUS
R143
X
10K
R0402
+3VRUN
R155
10K
R0402
R164
X
10K
R0402
R163
X
D D
PCI_CLK2 17
PCI_CLK3 17
PCI_CLK4 17
PCI_CLK5 17,39
LPC_CLK0 17
LPC_CLK1 17
RTC_CLK 17
AZ_RST# 18,31,34,35
GP17 18
GP16 18
10K
R0402
R156
10K
R0402
+3VRUN
R161
X
10K
R0402
X
R157
2.2K
R0402
R162
10K
R0402
+3VRUN +3VRUN
+3VSUS +3VSUS
R323
X
10K
R0402
R154
X
10K
R0402
R324
10K
R0402
+3VSUS
R321
X
10K
R0402
R322
10K
R0402
X
R356
10K
R0402
R142
10K
R0402
X
+3VSUS
R130
2.2K
R0402
R129
2.2K
R0402
+3VSUS
R127
2.2K
R0402
R128
X
2.2K
R0402
REQUIRED STRAPS
PCI_CLK2 RTC_CLK
PULL
C C
HIGH
PULL
LOW
BOOTFAIL
TIMER
ENABLED
BOOTFAIL
TIMER
DISABLED
DEFAULT
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
PCI_CLK4 PCI_CLK3
RESERVED
DEBUG STRAPS
PCI_CLK5
RESERVED
ENABLE PCI
MEM BOOT
DISABLE PCI
MEM BOOT
DEFAULT
LPC_CLK1
CLKGEN
ENABLED
CLKGEN
DISABLED
DEFAULT
INTERNAL
RTC
DEFAULT
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
AZ_RST LPC_CLK0
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
+3VRUN +3VRUN
+3VRUN
+3VRUN
+3VRUN
EC
ENABLED
EC
DISABLED
DEFAULT
GP17
H,H = Reserved
L,H = LPC ROM
(DEFAULT)
H,L = SPI ROM
L,L = FWH ROM
+3VRUN
GP16
R402
B B
PCI_AD28 17
PCI_AD27 17
PCI_AD26 17
PCI_AD25 17
PCI_AD24 17
PCI_AD23 17
X
10K
R0402
X
R387
2.2K
R0402
PCI_AD28
4
PULL
HIGH
PULL
LOW
A A
5
USE
LONG
RESET
DEFAULT
USE
SHORT
RESET
R401
X
10K
R0402
X
R386
2.2K
R0402
PCI_AD27
USE PCI
PLL
DEFAULT
BYPASS
PCI PLL
R400
X
10K
R0402
X
R385
2.2K
R0402
PCI_AD26
USE ACPI
BCLK
DEFAULT
BYPASS
ACPI
BCLK
R403
X
10K
R0402
R388
X
2.2K
R0402
PCI_AD25
USE IDE
PLL
DEFAULT
BYPASS IDE
PLL
3
R399
X
10K
R0402
R384
X
2.2K
R0402
PCI_AD24
USE DEFAULT
PCIE STRAPS
DEFAULT
USE EEPROM
PCIE
STRAPS
R398
X
10K
R0402
X
R383
2.2K
R0402
PCI_AD23
RESERVED
Use 2.2K PD.
Title
SB700 STRAPS
Size Document Number Rev
Custom
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
21 55 Wednesday, August 22, 2007
0A
of
RX780
5
4
3
2
1
U25A
D D
C C
B B
A A
5
PCIE_NB_TX0P 12
PCIE_NB_TX0N 12
PCIE_NB_TX1P 12
PCIE_NB_TX1N 12
PCIE_NB_TX2P 12
PCIE_NB_TX2N 12
PCIE_NB_TX3P 12
PCIE_NB_TX3N 12
PCIE_NB_TX4P 12
PCIE_NB_TX4N 12
PCIE_NB_TX5P 12
PCIE_NB_TX5N 12
PCIE_NB_TX6P 12
PCIE_NB_TX6N 12
PCIE_NB_TX7P 12
PCIE_NB_TX7N 12
PCIE_NB_TX8P 12
PCIE_NB_TX8N 12
PCIE_NB_TX9P 12
PCIE_NB_TX9N 12
PCIE_NB_TX10P 12
PCIE_NB_TX10N 12
PCIE_NB_TX11P 12
PCIE_NB_TX11N 12
PCIE_NB_TX12P 12
PCIE_NB_TX12N 12
PCIE_NB_TX13P 12
PCIE_NB_TX13N 12
PCIE_NB_TX14P 12
PCIE_NB_TX14N 12
PCIE_NB_TX15P 12
PCIE_NB_TX15N 12
GFX_CLKP 16
GFX_CLKN 16
PCIE_RST 19
4
AC30
AC31
AC29
AB29
AB31
AB30
AA31
AA30
W30
W31
W29
V29
V31
V30
U31
U30
P30
P31
P29
N29
N31
N30
M31
M30
K30
K31
K29
J29
J31
J30
H31
H30
AD29
AD30
AC28
AC27
AG25
M82-S
BGA632
B03-00M8205-A08
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
Clock
PCIE_REFCLKP
PCIE_REFCLKN
SM BUS
NC_SMBCLK
NC_SMBDATA
PERSTB
PART 1 OF 6
P
C
I
E
X
P
R
E
S
S
I
N
T
E
R
F
A
C
E
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
PCIE_CALRN
PCIE_CALRP
3
NC_1
NC_2
AA28
AA27
AA25
AA24
Y28
Y27
Y25
Y24
V28
V27
V25
V24
T28
T27
T25
T24
P28
P27
P25
P24
M28
M27
M25
M24
L28
L27
L25
L24
J28
J27
G28
G27
AF25
AE25
AE23
AH30
PCIE_TXP0
PCIE_TXN0
PCIE_TXP1
PCIE_TXN1
PCIE_TXP2
PCIE_TXN2
PCIE_TXP3
PCIE_TXN3
PCIE_TXP4
PCIE_TXN4
PCIE_TXP5
PCIE_TXN5
PCIE_TXP6
PCIE_TXN6
PCIE_TXP7
PCIE_TXN7
PCIE_TXP8
PCIE_TXN8
PCIE_TXP9
PCIE_TXN9
PCIE_TXP10
PCIE_TXN10
PCIE_TXP11
PCIE_TXN11
PCIE_TXP12
PCIE_TXN12
PCIE_TXP13
PCIE_TXN13
PCIE_TXP14
PCIE_TXN14
PCIE_TXP15
PCIE_TXN15
VGA_PE_CN
VGA_PE_CP
C338 0.1U10X C0402
C336 0.1U10X C0402
C330 0.1U10X C0402
C327 0.1U10X C0402
C358 0.1U10X C0402
C353 0.1U10X C0402
C346 0.1U10X C0402
C345 0.1U10X C0402
C368 0.1U10X C0402
C363 0.1U10X C0402
C354 0.1U10X C0402
C349 0.1U10X C0402
C380 0.1U10X C0402
C377 0.1U10X C0402
C376 0.1U10X C0402
C369 0.1U10X C0402
C392 0.1U10X C0402
C396 0.1U10X C0402
C386 0.1U10X C0402
C384 0.1U10X C0402
C402 0.1U10X C0402
C399 0.1U10X C0402
C403 0.1U10X C0402
C408 0.1U10X C0402
C410 0.1U10X C0402
C412 0.1U10X C0402
C423 0.1U10X C0402
C427 0.1U10X C0402
C413 0.1U10X C0402
C414 0.1U10X C0402
C416 0.1U10X C0402
C422 0.1U10X C0402
R209
2K_1%
R0402
R204
1.27K_1%
R0402
PCIE_VDDC
PCIE_NB_RX0P 12
PCIE_NB_RX0N 12
PCIE_NB_RX1P 12
PCIE_NB_RX1N 12
PCIE_NB_RX2P 12
PCIE_NB_RX2N 12
PCIE_NB_RX3P 12
PCIE_NB_RX3N 12
PCIE_NB_RX4P 12
PCIE_NB_RX4N 12
PCIE_NB_RX5P 12
PCIE_NB_RX5N 12
PCIE_NB_RX6P 12
PCIE_NB_RX6N 12
PCIE_NB_RX7P 12
PCIE_NB_RX7N 12
PCIE_NB_RX8P 12
PCIE_NB_RX8N 12
PCIE_NB_RX9P 12
PCIE_NB_RX9N 12
PCIE_NB_RX10P 12
PCIE_NB_RX10N 12
PCIE_NB_RX11P 12
PCIE_NB_RX11N 12
PCIE_NB_RX12P 12
PCIE_NB_RX12N 12
PCIE_NB_RX13P 12
PCIE_NB_RX13N 12
PCIE_NB_RX14P 12
PCIE_NB_RX14N 12
PCIE_NB_RX15P 12
PCIE_NB_RX15N 12
MICRO-STAR INT'L CO.,LTD.
Title
M82S PCI-E LINK
Size Document Number Rev
B
2
Date: Sheet
MS-13331
22 55 Wednesday, August 22, 2007
1
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
RX780
D D
GPIO_17_THERMAL_INT
Thermal monitor interrupt.
GPIO_17_THERMAL_INT is used for ASIC
temperature control. It is connected to the ALERTb
signal of the thermal monitor which measures the
C C
temperature of the ASIC. If the ASIC
temperature falls outside a defined range, the ALERTb
signal is asserted. Low level on
GPIO_17_THERMAL_INT causes M74/M72 to generate
an interrupt (the polarity of this interrupt
is programmable – the default is active low). Software
can then activate the implemented
temperature control scheme.
Back Bias (BB) control:
When GPIO_21_BB_EN = 0V then
back bias is disabled on the PCB (ie
B B
BPP=VDDC and
BBN=VSS).
When GIO_21_BB_EN = 3.3V then
back bias is enabled on the PCB.
Can function as a GPIO if not
required for BB control.
GPIO_22_ROMCSB
BIOS_ROM_EN
Enable external BIOS ROM device
0 - Disable external BIOS ROM
device
1 - Enable external BIOS ROM
device
A A
DVALID
1.)Transport stream data valid input or general purpose I/O
Note: Can be left unconnected if not used.
2.)This signals is also used for video capture and as an
initialization pin strap.
3.)Internal use only. Other logic must not affect this signal
during RESET.
PSYNC VGA_DIS(Internal pulldown)
VGA Disable determines whether or not the card will be
recognized as the system's VGA controller (via the
SUBCLASS field in the PCI configuration space).
0 – VGA Controller capacity enabled
1 – The device will not be recognized as the system’s
VGA controller
Power Control signals control the
core voltage regulator.
At Reset, these signals will be inputs
with weak internal pull-down
resistors.
VBIOS can define these signals to be
either 3.3V outputs or open drain
outputs.
The output state (high/low) of these
signals is programmable for each
PowerPlay state.
1.8VGA
R201
499R_1%
R0402
R211
249R_1%
R0402
5
M82S_LVDS_BLON 24,40
GPIO_23_CLKREQB
DRIVES LOW
DURING RESET
VREFG VOLTAGE DIVIDER IS
(VREFG = VDDR4,5(1.8V) / 3 = .6V)
C344
0.1U10X
C0402
THE PINS WITH TEST POINTS
ARE REQUIRED TO BE ACCESSIBLE
FOR DEBUG AND BOUNDRY SCAN
PURPOSES USING TEST POINT
VIAS IF UNUSED OR COMPONENT
PADS
ENSURE DEBUG_ACCESS STRAP
IS ALSO ACCESSIBLE
SEE CONFIG STRAPPING PAGE
ACCESS TO ATI DEBUG PORT
IS MANDATORY ON INITIAL
PROTOTYPE DESIGNS
R221 0R R0402
X
R441 100K
R217 10K R0402
R223 1K R0402
PLACE VREF DIVIDER
AND CAP CLOSE TO
ASIC
R434
1M
R0402
Y6 27MHz
OSC_5_2X3_4
C646
18P50N
C0402
DVPDATA20 29
DVPDATA21 29
DVPDATA22 29
DVPDATA23 29
R0402
TP98
TP94
GPIO20_PSW_0 45
GPIO20_PSW_1 45
C644
18P50N
C0402
4
DVALID 29
PSYNC 29
DVPDATA0
TP112
DVPDATA1
TP111
DVPDATA2
TP54
DVPDATA3
TP113
DVPDATA4
TP52
DVPDATA5
TP109
DVPDATA6
TP108
DVPDATA7
TP50
DVPDATA8
TP105
DVPDATA9
TP110
DVPDATA10
TP107
DVPDATA11
TP106
DVPDATA12
TP104
DVPDATA13
TP102
DVPDATA14
TP101
DVPDATA15
TP49
DVPDATA16
TP100
DVPDATA17
TP97
DVPDATA18
TP96
DVPDATA19
TP95
TP93
TP92
GPIO0 29
GPIO1 29
GPIO2 29
GPIO3 29
GPIO4 29
GPIO5 29
GPIO6 29
M82S_BLON
GPIO8 29
GPIO9 29
GPIO11 29
GPIO12 29
GPIO13 29
M82_THRM_ALERT-
BB_ENA 28
GPIO22 29
TP58
TP57
TP55
TP56
TP59
TP51
TP53
R424 100K R0402
M82S_VREFG
DPLL_PVDD
PCIE_PVDD
MPVDD
DPLL_VDDC
M82S_XTALIN
M82S_XTALOUT
M82S_TESTEN
R196
1K
R0402
4
U25B
AJ4
TXCM_DPA0P
AJ5
TXCP_DPA0N
AL5
TX0M_DPA1P
AK5
TX0P_DPA1N
AL6
TX1M_DPA2P
AK6
TX1P_DPA2N
AK8
TX2M_DPA3P
AL8
TX2P_DPA3N
AD9
DVALID
AE7
PSYNC_NEW
AK4
DVPCNTL_MVP_0
AL3
DVPCNTL_MVP_1
V2
DVPCNTL_0
V1
DVPCNTL_1
W3
DVPCNTL_2
W1
DVPCLK
Y1
DVPDATA_0
Y2
DVPDATA_1
Y3
DVPDATA_2
AA2
DVPDATA_3
AA3
DVPDATA_4
AB1
DVPDATA_5
AB2
DVPDATA_6
AB3
DVPDATA_7
AC1
DVPDATA_8
AC3
DVPDATA_9
AD1
DVPDATA_10
AD2
DVPDATA_11
AD3
DVPDATA_12
AF3
DVPDATA_13
AG3
DVPDATA_14
AH3
DVPDATA_15
AG1
DVPDATA_16
AH2
DVPDATA_17
AH1
DVPDATA_18
AJ3
DVPDATA_19
AJ1
DVPDATA_20
AJ2
DVPDATA_21
AK2
DVPDATA_22
AK3
DVPDATA_23
Y4
GPIO_0
V3
GPIO_1
V4
GPIO_2
V5
GPIO_3
U3
GPIO_4
U2
GPIO_5
T4
GPIO_6
T5
GPIO_7_BLON
T7
GPIO_8_ROMSO
T8
GPIO_9_ROMSI
R1
GPIO_10_ROMSCK
R2
GPIO_11
R3
GPIO_12
P1
GPIO_13
P3
GPIO_14_HPD2
N1
GPIO_15_PWRCNTL0
N2
GPIO_16_SSIN
P4
GPIO_17_THERMAL_INT
P7
GPIO_18_HPD3
P8
GPIO_19_CTFB
P5
GPIO_20_PWRCNTL1
V7
GPIO_21_BB_EN
N3
GPIO_22_ROMCSB
Y5
GPIO_23_CLKREQB
M4
GPIO_24_JMODE
M5
GPIO_25_TDI
M7
GPIO_26_TCK
M8
GPIO_27_TMS
L8
GPIO_28_TDO
Y8
GEN_A
Y7
GEN_B
V8
GEN_C
AH6
GEN_D_HPD4
AG6
GEN_E
AC11
VREFG
AH12
DPLL_PVDD
AG12
DPLL_PVSS
AH31
PCIE_PVDD
A9
MPVDD
B9
MPVSS
AE12
DPLL_VDDC
AJ31
XTALIN
AJ30
XTALOUT
AH26
TESTEN
AD12
PLLTEST
M82-S
BGA632
B03-00M8205-A08
INTEGRATED
TMDS/DP PORT
EXT TMDS
DVO
GENERAL
PURPOSE
I/O
PLL &
XTAL
TEST
PART 2 OF 6
DAC1 / CRT
DAC2 (TV/CRT2)
SERIAL
BUSES
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP
THERMAL
3
TXCM_DPB0P
TXCP_DPB0N
TX0M_DPB1P
TX0P_DPB1N
TX1M_DPB2P
TX1P_DPB2N
TX2M_DPB3P
TX2P_DPB3N
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
DPA_VDDR_1
DPA_VDDR_2
DPB_VDDR_1
DPB_VDDR_2
DPB_VSSR_5
DPB_VSSR_4
DPB_VSSR_3
DPB_VSSR_2
DPB_VSSR_1
DPA_VSSR_5
DPA_VSSR_4
DPA_VSSR_3
DPA_VSSR_2
DPA_VSSR_1
DP_CALR
HPD1
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
COMP
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
R2SET
SDA
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
TS_FDO
DPLUS
DMINUS
3
R2B
G2B
B2B
SCL
2
AK9
AL9
AJ9
AJ10
AL10
AK10
AL11
AK11
AL7
AK7
AE11
AF11
AJ12
AJ13
AK13
AL13
AL12
AK12
AJ11
AH9
AH11
AJ8
AF7
AG7
AJ7
AH7
AG11
AA8
AL28
R
AK28
RB
AL27
G
AK27
GB
AL26
B
AK26
BB
AK29
AK30
AJ28
AL29
AH28
AJ27
AJ26
AL17
R2
AK17
AL15
G2
AK15
AL14
B2
AK14
AJ17
C
AJ15
Y
AJ14
AE16
AF16
AH14
AH16
AG16
AF18
AE18
AG14
AA5
AA4
AJ29
AH29
AC5
AC4
AF4
AH4
AF9
AG9
AE14
AE5
AE4
M82S_HDMI_TXCM_DPB0P 12
M82S_HDMI_TXCP_DPB0N 12
M82S_HDMI_TX0M_DPB1P 12
M82S_HDMI_TX0P_DPB1N 12
M82S_HDMI_TX1M_DPB2P 12
M82S_HDMI_TX1P_DPB2N 12
M82S_HDMI_TX2M_DPB3P 12
M82S_HDMI_TX2P_DPB3N 12
TPVDD
DPA_VDDR
DPB_VDDR
JNC50 NC_0402_6
R193 150R 1%
JNC49 NC_0402_6
JNC51 NC_0402_6
JNC52 NC_0402_6
M82S_HSYNC# 29,40
M82S_VSYNC# 29,40
M82S_AVDD
VDDDI
M82S_H2SYNC# 29
M82S_V2SYNC# 29
A2VDD
A2VDDQ
VDDDI
M82S_R2SET
M82S_DDC1DAT 40
M82S_DDC1CLK 40
M82S_DDC2DAT 40
M82S_DDC2CLK 40
M82S_DDC4DAT 41
M82S_DDC4CLK 41
M82_THERMDA
M82_THERMDC
M82S_RSET
R195
715R_1%
R0402
M8x
STRAPPING
R0402
R415
499R_1%
R0402
PLACE OR RESISTORS CLOSE TO ASIC
CRT
LVDS
HDMI
HDMI
WITH M8x ASIC
INSTALL M8x STRAP RESISTORS
AND
DO NOT INSTALL M7x STRAP
RESISTORS
HPD 13,41
M82S_R 40
M82S_G 40
M82S_B 40
3.3V
3.3V
5V
CRT
OPTIONAL 0 OHM STRAPS TO GROUND
FOR RB,GB,BB AND R2B,G2B,B2B
SEE DAC1_RGB AND DAC2_RGB
SHEETS
Cap close to
thermal sensor
M82_THERMDA
C589
2200P50X
C0402
M82_THERMDC
T_CRIT_M82# 48
2
IF HOT PLUG DETECT IS NOT REQUIRED
REMOVE ALL THIS LOGIC EXCEPT
FOR 100K PULL DOWN
Close to M82S
+3VSUS
C585
0.1U10X
C0402
+3VSUS
3.3V TO 5V LEVEL SHIFT LOGIC REQUIRED
IF DDC1,DDC2 USED ON M8x OR DDC1,DDC2,DDC3
USED ON M7x
DDC3,DDC4 ARE 5V TOLERANT ON M8x
U24
2
D+
3
D-
4
T_CRIT_A#
LM86CIMMXNOPB_MSOP8-RH
MSOP8_T
RN19 8P4R-10K RN0402_MSI
1
3
5
7
Title
Size Document Number Rev
Custom
Date: Sheet of
SMBCLK VDD
SMBDATA
ALERT#
GND
2
4
6
8
M82S I/O
MS-13331
8 1
7
6
5
T_CRIT_M82#
M82_THRM_ALERTSMB_THRMM82_DATA
SMB_THRMM82_CLK
1
SMB_THRMM82_CLK 39
SMB_THRMM82_DATA 39
M82_THRM_ALERT- 39
M82S
MICRO-STAR INT'L CO.,LTD.
23 55 Wednesday, August 22, 2007
1
0A
5
4
3
2
1
RX780
VARY_BL
LCD PWM (Pulse Width Modulated) output to adjust LCD brightness. Active
D D
U25F
PART 6 OF 6
M82SLVDSBLON
AF20
LVDDR
LVDDC
C C
LPVDD
B B
AG20
AJ18
AH20
AF23
AF21
AL18
AJ22
AJ25
AK18
AK23
AK25
AJ21
AL23
AL25
AG18
AH18
M82-S
BGA632
B03-00M8205-A08
LVDDR_1
LVDDR_2
LVDDC_1
LVDDC_2
LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
LVSSR_8
LVSSR_9
LVSSR_10
LVSSR_11
LPVDD
LPVSS
VARY_BL
Control
DIGON
LVDS channel
TXCLK_UP
TXCLK_UN
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
AA7
AC6
AD21
AE21
AJ24
AJ23
AK24
AL24
AG21
AH21
AG23
AH23
AL19
AK19
AJ20
AJ19
AK20
AL20
AK21
AL21
AK22
AL22
R214
10K
R0402
M82S_LVDS_TXLCKP 40
M82S_LVDS_TXLCKN 40
M82S_LVDS_TXL0P 40
M82S_LVDS_TXL0N 40
M82S_LVDS_TXL1P 40
M82S_LVDS_TXL1N 40
M82S_LVDS_TXL2P 40
M82S_LVDS_TXL2N 40
high.
LVTMA_BL_MOD_CNTL.LVTMA_BL_MOD_LEVEL can be used to control the
backlight level by means of pulse width modulation.
Alternatively, VARY_BL can be used to control backlight on/off (backlight
enable) by setting LVTMA_BL_MOD_CNTL.LVTMA_BL_MOD_EN = 0.
Note: External pull-down recommended
JNC36 0R
DIGON
Controls Panel Digital Power On/Off
Note: External pull-down
recommended.
M82S_LVDS_BLON 23,40
M82S_LVDS_DIGON 40
LVDS
A A
Title
MICRO-STAR INT'L CO.,LTD.
M82S LVDS
Size Document Number Rev
Custom
5
4
3
Date: Sheet
MS-13331
2
24 55 Wednesday, August 22, 2007
of
1
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
RX780
D D
C C
B B
U25E
AA26
PCIE_VSS_1
AA29
PCIE_VSS_2
AC26
PCIE_VSS_3
AD31
PCIE_VSS_4
AE29
PCIE_VSS_5
AE30
PCIE_VSS_6
AE31
PCIE_VSS_7
F28
PCIE_VSS_8
G26
PCIE_VSS_9
G29
PCIE_VSS_10
G30
PCIE_VSS_11
G31
PCIE_VSS_12
H29
PCIE_VSS_13
J25
PCIE_VSS_14
J26
PCIE_VSS_15
L26
PCIE_VSS_16
L29
PCIE_VSS_17
L30
PCIE_VSS_18
L31
PCIE_VSS_19
M26
PCIE_VSS_20
M29
PCIE_VSS_21
P26
PCIE_VSS_22
R29
PCIE_VSS_23
R30
PCIE_VSS_24
R31
PCIE_VSS_25
T26
PCIE_VSS_26
U29
PCIE_VSS_27
V26
PCIE_VSS_28
Y26
PCIE_VSS_29
Y29
PCIE_VSS_30
Y30
PCIE_VSS_31
Y31
PCIE_VSS_32
A13
VSS_1
A2
VSS_2
C18
VSS_3
A24
VSS_4
A30
VSS_5
AA1
VSS_6
AA11
VSS_7
AA14
VSS_8
AA17
VSS_9
AA20
VSS_10
AA6
VSS_11
AC2
VSS_12
AC7
VSS_13
AE3
VSS_15
AL4
VSS_16
AD14
VSS_17
AF12
VSS_18
AF14
VSS_19
AD16
VSS_20
AD18
VSS_21
AE6
VSS_22
AG2
VSS_23
AE9
VSS_24
AH25
VSS_25
AK1
VSS_26
AK31
VSS_27
AJ6
VSS_28
AL2
VSS_29
AL30
VSS_30
B1
VSS_31
C13
VSS_32
CORE GND
M82-S
BGA632
B03-00M8205-A08
Part 5 of 6
PCI-Express GND
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
B25
J8
B5
D11
C17
C22
C27
D29
C3
C6
D3
D28
F29
D4
F11
F12
F14
F16
F18
F20
F21
F23
F25
F7
F9
G3
G6
H23
J3
J4
J6
K1
L12
L15
L18
L21
L6
M11
M14
M17
M20
M6
P12
P15
P18
P21
P6
AC21
R14
R17
R20
T6
U1
U12
U15
U18
U21
AE20
V14
V17
V20
P2
V6
W2
Y12
Y15
Y18
Y21
Y6
M9
VDDC>VDDR1>PCIE_VDDC>VDDR3
3.3V_DELAY
Q46
P-NDS352AP
SOT23SGD_T
A A
5
R178
47K
C287
R0402
0.1U10X
C0402
OPTIONAL RC NETWORK
TO FINE TUNE
POWER SEQUENCING
VCCNB_PG 44,48
G
+3VRUN
D S
1.8VGA
3.3V_DELAY
1.8VGA
R410
100K
R0402
Q24
N-2N7002
SOT23SGD_T
4
3
U25D
2
1
PART 4 OF 6
A15
VDDR1_1
A22
VDDR1_2
A28
3
AC18
AC16
AC14
AC12
AD11
H11
H12
H14
H16
H18
H20
H21
B31
AA9
J11
J20
J21
AF1
AF2
AE1
AE2
A10
A19
B10
B19
V11
U11
R11
P11
A4
A8
B8
C9
D1
H1
M1
Y9
V9
T9
L9
M2
M3
L4
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDD_CT_1
VDD_CT_2
VDD_CT_3
VDD_CT_4
VDD_CT_5
VDD_CT_6
VDD_CT_7
VDD_CT_8
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR4_1
VDDR4_2
VDDR5_1
VDDR5_2
RSVD_1
RSVD_2
RSVD_3
RSVD_4
VDDRH_1
Clock
VDDRH_2
VSSRH_1
VSSRH_2
BBN_1
BBN_2
BBP_1
BBP_2
M82-S
BGA632
B03-00M8205-A08
P
O
I/O Internal
W
E
R
Memory
I/O
VDD_CT (External TMDS enabled External TMDS enabled 120mA)
Level translation between core and I/O, excluding memory receivers.
VDD_CT must remain powered whenever the ASIC is powered.
VDDR4
DVOA_MSB_VMODE register bit; '1' - 3.3V(default); '0' - 1.8V
VDDR5
DVOA_LSB_VMODE register bit; '1' -3.3V(default); '0' - 1.8V
VDDRH
Dedicated power pins for memory clock pads for each channel.
Should have the same voltage level as VDDR1.
C415
10U6.3X
C0603
C393
1U6.3Y
C0402
C434
1U6.3Y
C0402
C579
10U6.3X
C0603
C429
10U6.3X
C0603
C397
1U6.3Y
C0402
4
C420
10U6.3X
C0603
C425
1U6.3Y
C0402
C400
1U6.3Y
C0402
C352
1U6.3Y
C0402
0.1U10X
C0402
C409
1U6.3Y
C0402
-BBN
VSS-1.0V to VSS
-BBN
C367
1U6.3Y
C0402
+BBP
C378
1U6.3Y
C0402
Back Bias Pins
Back bias is a new feature which will require additional engineering
verification and characterization. Prototype designs need to
provide the option
to disable/by-pass this feature.
+BBP
Back Bias Enabled: (GPIO_21_BB_EN = 3.3V): 1.5V or 1.8V
Back Bias Disabled: (GPIO_21_BB_EN = 0V): VDDC
Connect to VBBP back bias regulator / generator.
If back bias is not used, connect directly to VDDC.
-BBN
Back Bias Enabled: (GPIO_21_BB_EN = 3.3V): -0.55V or -0.85V
Back Bias Disabled: (GPIO_21_BB_EN = 0V): VSS
Connect to VBBN back bias regulator / generator.
If back bias is not used connect directly to VSS.
C418
C419
10U6.3X
10U6.3X
C0603
C0603
C406
C365
1U6.3Y
1U6.3Y
C0402
C0402
C340
C433
1U6.3Y
1U6.3Y
C0402
C0402
( 3.3V @ 50MA VDDR3)
C355
C347
1U6.3Y
1U6.3Y
C0402
C0402
C417
VDDR5
1U6.3Y
Power for DVP control pins
C0402
(DVPCNTL_[0-2] and
DVPCLK) and
DVPDATA_[11:0] - external
TMDS or GPIO
VDD_MEM_CLK0
VDD_MEM_CLK1
C375
1U6.3Y
C0402
+BBP
C379
1U6.3Y
VDDC to VDDC+1.0V
C0402
VDD_CT
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
Memory I/O
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8
PCIE_VDDC_9
PCIE_VDDC_10
PCIE_VDDC_11
PCI-Express
PCIE_VDDC_12
Core
Back Bias
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
AF30
AF31
AF29
AF27
AF28
AG29
AG30
AG31
AA23
AC24
AC25
AE26
AE27
AE28
L23
M23
P23
T23
V23
Y23
L11
L14
L17
L20
M12
M15
M18
M21
AC20
P14
P17
P20
R12
R15
R18
R21
AD20
U14
U17
U20
V12
V15
V18
V21
Y11
Y14
Y17
Y20
AA12
AA15
AA18
AA21
P9
J12
J14
J16
J18
2
M82S_PCIE_VDDR
PCIE_VDDC
M82S_VDD_CORE
C360
C391
1U6.3Y
10U6.3X
C0402
C0603
C390
C371
10U6.3X
1U6.3Y
C0603
C0402
C350
C385
10U6.3X
1U6.3Y
C0603
C0402
M82S_VDDCI
C404
10U6.3X
C0603
Title
M82S PWR&GND
Size Document Number Rev
Custom
Date: Sheet of
MS-13331
C364
C395
1U6.3Y
C0402
1U6.3Y
C0402
C356
10U6.3X
C0603C645
C381
1U6.3Y
C0402
C405
1U6.3Y
C0402
C348
1U6.3Y
C0402
C374
1U6.3Y
C0402
C389
1U6.3Y
C0402
C394
1U6.3Y
C0402
C373
1U6.3Y
C0402
C362
1U6.3Y
C0402
C351
1U6.3Y
C0402
L41
220R_200m
L0603
MICRO-STAR INT'L CO.,LTD.
25 55 Wednesday, August 22, 2007
1
C357
1U6.3Y
C0402
0A
5
RX780
D D
WDQSA[7..0] 27
RDQSA[7..0] 27
DQMA#[7..0] 27
C C
B B
MDA[63..0] 27
MAA[11..0] 27
DIVIDER RESISTORS DDR2 DDR3
MVREF TO 1.8V
MVREF TO GND
A A
WDQSA[7..0]
RDQSA[7..0]
DQMA#[7..0]
MDA[63..0]
MAA[11..0]
PLACE MVREF DIVIDERS
AND CAPS CLOSE TO
ASIC
1.8VGA
100R 40.2R
100R 100R
R451
40.2R_1%
R0402
R452
100R
R0402
4
1.8VGA
R448
40.2R_1%
R0402
GDDR III = 0.7*VDDR1
R449
100R
R0402
GDDR III = 0.7*VDDR1
TEST_YCLK TEST_MCLK Internal use only.
Must be connected to either VDDR1 or
ground.
C662
0.1U10X
C0402
R224
4.7K
R0402
C657
0.1U10X
C0402
R226
4.7K
R0402
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MVREFD
MVREFS
TEST_MCLK
TEST_YCLK
MEMTEST
R227
243R_1%
R0402
MEMTEST This pin is used to control the
variable drive capability of the memory
section I/Os. 240Ω PL
U25C
E29
DQ_0
E30
DQ_1
E31
DQ_2
D31
DQ_3
C29
DQ_4
B29
DQ_5
B30
DQ_6
A29
DQ_7
E26
DQ_8
D26
DQ_9
E25
DQ_10
D25
DQ_11
G23
DQ_12
G21
DQ_13
E21
DQ_14
D21
DQ_15
C28
DQ_16
B28
DQ_17
B27
DQ_18
A27
DQ_19
C25
DQ_20
A25
DQ_21
C24
DQ_22
B24
DQ_23
C23
DQ_24
B23
DQ_25
A23
DQ_26
B22
DQ_27
C20
DQ_28
B20
DQ_29
A20
DQ_30
C19
DQ_31
C8
DQ_32
C7
DQ_33
B7
DQ_34
A7
DQ_35
A5
DQ_36
C4
DQ_37
B4
DQ_38
A3
DQ_39
G9
DQ_40
E9
DQ_41
D9
DQ_42
G7
DQ_43
G5
DQ_44
F5
DQ_45
G4
DQ_46
F4
DQ_47
B3
DQ_48
B2
DQ_49
C2
DQ_50
C1
DQ_51
E3
DQ_52
F3
DQ_53
F2
DQ_54
F1
DQ_55
G2
DQ_56
G1
DQ_57
H3
DQ_58
H2
DQ_59
K2
DQ_60
L3
DQ_61
L2
DQ_62
L1
DQ_63
F30
MVREFD
F31
MVREFS
L5
TEST_MCLK
L7
TEST_YCLK
J7
MEMTEST
M82-S
BGA632
B03-00M8205-A08
3
Part 3 of 6
MEMORY
INTERFACE
write strobe read strobe
MA_0
MA_1
MA_2
MA_3
MA_4
MA_5
MA_6
MA_7
MA_8
MA_9
MA_10
MA_11
MA_BA0
MA_BA1
MA_A12
MA_BA2
DQMb_0
DQMb_1
DQMb_2
DQMb_3
DQMb_4
DQMb_5
DQMb_6
DQMb_7
QS_0
QS_1
QS_2
QS_3
QS_4
QS_5
QS_6
QS_7
QS_0B
QS_1B
QS_2B
QS_3B
QS_4B
QS_5B
QS_6B
QS_7B
ODT0
ODT1
CLK0
CLK1
CLK0b
CLK1b
RAS0b
RAS1b
CAS0b
CAS1b
CS0b_0
CS0b_1
CS1b_0
CS1b_1
CKE0
CKE1
WE0b
WE1b
DRAM_RST
MAA0
B14
MAA1
A14
MAA2
B13
MAA3
E14
MAA4
B17
MAA5
A17
MAA6
C15
MAA7
G16
MAA8
E16
MAA9
C14
MAA10
A12
MAA11
B12
BA0
C12
BA1
D14
MAA12
B15
BA2
G14
DQMA#0
D30
DQMA#1
G25
DQMA#2
C26
DQMA#3
C21
DQMA#4
C5
DQMA#5
D6
DQMA#6
D2
DQMA#7
K3
RDQSA0
C30
RDQSA1
D23
RDQSA2
B26
RDQSA3
B21
RDQSA4
B6
RDQSA5
E7
RDQSA6
E2
RDQSA7
J2
WDQSA0
C31
WDQSA1
E23
WDQSA2
A26
WDQSA3
A21
WDQSA4
A6
WDQSA5
D7
WDQSA6
E1
WDQSA7
J1
E20
On Die Termination control for
C11
channel NC for GDDR3.
CLKA0
A18
CLKA1
A11
CLKA0#
B18
CLKA1#
B11
RASA0#
G20
RASA1#
D12
CASA0#
D20
CASA1#
E12
CSA0_0#
E18
CSA0_1#
G18
CSA1_0#
G11
CSA1_1#
E11
CKEA0
D18
CKEA1
G12
WEA0#
D16
WEA1#
C10
J5
R225
4.7K
R0402
BA0 27
BA1 27
MAA12 27
BA2 27
CLKA0 27
CLKA1 27
CLKA0# 27
CLKA1# 27
RASA0# 27
RASA1# 27
CASA0# 27
CASA1# 27
CSA0_0# 27
CSA0_1# 27
CSA1_0# 27
CSA1_1# 27
CKEA0 27
CKEA1 27
WEA0# 27
WEA1# 27
MEM_RST 27
1.8VGA
2
FOR DUAL RANK CONNECTIONS
USE THE CSxB_1 CHIP SELECT
PINS
1
MICRO-STAR INT'L CO.,LTD.
Title
M82S MEMORY
Size Document Number Rev
B
5
4
3
2
Date: Sheet
MS-13331
26 55 Wednesday, August 22, 2007
1
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
MDA18
RX780
D D
Group2
Group3
Group1
Group0
BA2 26
BA1 26
BA0 26
C C
B B
1.8VGA
R477
2.37K_1%
R0402
VREF = 0.7*VDDQ
C708
R478
5.49K_1%
R0402
A A
0.1U10X
C0402
VREF = 0.7*VDDQ
R250
5.49K_1%
R0402
MDA16
MDA19
MDA17
MDA21
MDA22
MDA20
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA31
MDA30
MDA29
MDA8
MDA11
MDA10
MDA9
MDA12
MDA13
MDA15
MDA14
MDA0
MDA1
MDA2
MDA3
MDA5
MDA7
MDA6
MDA4
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
CSA0_0#
WEA0#
RASA0#
CASA0#
CKEA0
CLKA0#
CLKA0
RDQSA2
RDQSA3
RDQSA1
RDQSA0
WDQSA2
WDQSA3
WDQSA1
WDQSA0
DQMA#2
DQMA#3
DQMA#1
DQMA#0
MEM_RST 26 MEM_RST 26
R467 243R_1%
R0402
GDDR3_VREF0
1.8VGA
R256
2.37K_1%
R0402
GDDR3_VREF0#
C455
0.1U10X
C0402
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
H10
BA2 | RAS
G9
BA1 | BA0
G4
BA0 | BA1
L4
A11 | A7
K2
A10 | A8
M9
A9 | A3
K11
A8/AP | A10
L9
A7 | A11
K10
A6 | A2
H11
A5 | A1
K9
A4 | A0
M4
A3 | A9
K3
A2 | A6
H2
A1 | A5
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
P3
RDQS3 | RDQS2
P10
RDQS2 | RDQS3
D10
RDQS1 | RDQS0
D3
RDQS0 | RDQS1
P2
WDQS3 | WDQS2
P11
WDQS2 | WDQS3
D11
WDQS1 | WDQS0
D2
WDQS0 | WDQS1
N3
DM3 | DM2
N10
DM2 | DM3
E10
DM1 | DM0
E3
DM0 | DM1
V9
RESET
ZQ0
A4
ZQ
H1
VREF
H12
VREF#H12
U31
HY5RS123235BFP-14
FBGA136
M12-5RS1225-H23
PLACE VREF DIVIDER COMPONENTS
AS CLOSE TO MEMORY AS POSSIBLE
VDDQ
VDDQ#A12
VDDQ#C1
VDDQ#C4
VDDQ#C9
VDDQ#C12
VDDQ#E1
VDDQ#E4
VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9
VDDQ#N12
VDDQ#R1
VDDQ#R4
VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1
VSSQ#D4
VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VDDA#K12
VSSA#J12
VSSA
RFU
RFU0
GND | VDD
4
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
A11
F1
F12
M1
M12
V2
V11
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
K1
K12
C471
0.1U10X
C0402
J12
J1
J3
J2
NC
V4
A9
MF
1.8VGA
C487
0.1U10X
C0402
V4 Scan Enable.
Logic HIGH would enable the
device into scan mode and will
be disabled at logic LOW.
Must be tied to GND when not
in use.
1.8VGA
J3 RFU NC the pin, in
the scan order, will
read as a logic"0"
Group7
Group5
Group4
Group6
R480
5.49K_1%
R0402
1.8VGA
R481
2.37K_1%
R0402
R268
5.49K_1%
R0402
C705
0.1U10X
C0402
VREF = 0.7*VDDQ
3
BA2 26
BA1 26
BA0 26
VREF = 0.7*VDDQ
1.8VGA
MDA61
MDA63
MDA60
MDA62
MDA57
MDA58
MDA56
MDA59
MDA45
MDA47
MDA44
MDA46
MDA40
MDA43
MDA41
MDA42
MDA37
MDA36
MDA39
MDA38
MDA35
MDA32
MDA34
MDA33
MDA49
MDA48
MDA50
MDA51
MDA55
MDA52
MDA54
MDA53
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
CSA1_0#
WEA1#
RASA1#
CASA1#
CKEA1
CLKA1#
CLKA1
RDQSA7
RDQSA5
RDQSA4
RDQSA6
WDQSA7
WDQSA5
WDQSA4
WDQSA6
DQMA#7
DQMA#5
DQMA#4
DQMA#6
R276
243R_1%
R0402
GDDR3_VREF1
R275
2.37K_1%
R0402
GDDR3_VREF1#
C481
0.1U10X
C0402
ZQ1
M10
M11
G10
T10
T11
R10
R11
N11
L10
F11
F10
E11
C10
C11
B10
B11
H10
K11
K10
H11
P10
D10
P11
D11
N10
E10
H12
R3
R2
M3
N2
M2
G3
E2
C3
C2
B3
B2
G9
G4
K2
M9
K9
M4
K3
H2
K4
H9
H3
H4
J10
J11
P3
D3
P2
D2
N3
E3
V9
A4
H1
T3
T2
L3
F2
F3
L4
L9
F9
F4
C483
1U6.3Y
C0402
DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8
BA2 | RAS
BA1 | BA0
BA0 | BA1
A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK
CK
RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1
WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1
DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1
RESET
ZQ
VREF
VREF#H12
U32
HY5RS123235BFP-14
FBGA136
M12-5RS1225-H23
C489
1U6.3Y
C0402
VDDQ
VDDQ#A12
VDDQ#C1
VDDQ#C4
VDDQ#C9
VDDQ#C12
VDDQ#E1
VDDQ#E4
VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9
VDDQ#N12
VDDQ#R1
VDDQ#R4
VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1
VSSQ#D4
VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VDDA#K12
VSSA#J12
VSSA
RFU
RFU0
GND | VDD
NC
MF
C482
10U6.3X
C0603
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
A11
F1
F12
M1
M12
V2
V11
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
K1
K12
C490
0.1U10X
C0402
J12
J1
J3
J2
V4
A9
2
1.8VGA
C457
0.1U10X
C0402
1.8VGA
MAA[11..0] 26
WDQSA[7..0] 26
RDQSA[7..0] 26
DQMA#[7..0] 26
MDA[63..0] 26
DDR3 MEMORY CONTROL SIGNAL PULLUP RESISTOR VALUES
MAY CHANGE BETWEEN M62S,M64S,M71S AND M72S.
SEE DATA BOOK FOR LATESTINFORMATION
CHECK M82S Spec.
RASA0# 26
RASA1# 26
CASA0# 26
CASA1# 26
CSA0_0# 26
CSA1_0# 26
CSA0_1# 26
CSA1_1# 26
GDDR3 32MX32 MEMORY
HY5RS123235BFP-14
VDD/VDDQ=1.8V 700MHz
1400Mbps/pin(Max Data Rate)
POD_18(Interface)
1
MAA[11..0]
WDQSA[7..0]
RDQSA[7..0]
DQMA#[7..0]
MDA[63..0]
1.8VGA
R257 121R_1%R0402
R266 121R_1%R0402
R251 121R_1%R0402
R269 121R_1%R0402
WEA0# 26
WEA1# 26
CKEA0 26
CKEA1 26
CLKA0 26
CLKA0# 26
CLKA1 26
CLKA1# 26
R252 121R_1%R0402
R271 121R_1%R0402
R260 121R_1%R0402
R274 121R_1%R0402
R262 121R_1%R0402
R265 121R_1%R0402
R253 121R_1%R0402
R267 121R_1%R0402
R255 60.4R_1%R0402
R254 60.4R_1%R0402
R261 60.4R_1%R0402
R259 60.4R_1%R0402
32M x 32
CSA1_1# CSA0_1#
MAA12 26 MAA12 26
Configuration 4M x 32 x 8 banks
Refresh Count 8 k
Bank Address BA0 - BA2
Row Address A0~A12
Column Address A0~A7, A9
AP Flag A8
1.8VGA
C488
10U6.3X
C0603
C446
10N16X
C0402
C478
10N16X
C0402
C473
0.1U10X
C0402
C453
0.1U10X
C0402
C475
0.1U10X
C0402
C474
0.1U10X
C0402
C443
0.1U10X
C0402
C451
0.1U10X
C0402
1.8VGA
C456
1U6.3Y
C0402
C486
1U6.3Y
C0402
5
C442
10U6.3X
C0603
C492
10U6.3X
C0603
C462
10N16X
C0402
C449
10N16X
C0402
C445
0.1U10X
C0402
C472
0.1U10X
C0402
C479
C452
C448
0.1U10X
0.1U10X
C0402
C0402
4
0.1U10X
C0402
C476
0.1U10X
C0402
3
2
Title
GDDR3 32X32M
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
27 55 Wednesday, August 22, 2007
0A
of
5
RX780
1.8VGA
L33 300L300m
1 2
L0603
C306
10U6.3X
C0603
C313
1U6.3Y
C0402
X
L35 60L1_1000m
D D
C C
B B
A A
1.8VGA
1.8VGA
1.8VGA
1.8VGA
3.3V_DELAY
1.8VGA
1.8VGA
1.8VGA
+1.1VRUN
+1.1VRUN
1.8VGA
1.8VGA
1.8VGA
1.8VGA
1.8VGA
L1206_113
L32 220R_200m
L0603
L37 220R_200m
L0603
L39 220R_200m
L0603
L38 220R_200m
L0603
L67 220R_200m
L0603
L68 220R_200m
L0603
L69 220R_200m
L0603
L70 220R_200m
L0603
L66 220R_200m
L0603
L71 220R_200m
L0603
L42 220R_200m
L0603
L30 60L1_1000m
L1206_113
L73 220R_200m
L0603
L44 220R_200m
L0603
5
C320
C334
10U6.3X
0.1U10X
C0603
C0402
C319
C302
1U6.3Y
10U6.3X
C0402
C0603
C315
C309
1U6.3Y
10U6.3X
C0402
C0603
C331
C324
1U6.3Y
10U6.3X
C0402
C0603
C318
C304
0.1U10X
10U6.3X
C0402
C0603
C597
C590
1U6.3Y
10U6.3X
C0402
C0603
C592
C599
10U6.3X
0.1U10X
C0603
C0402
C593
C598
10U6.3X
0.1U10X
C0603
C0402
C594
C600
10U6.3X
1U6.3Y
C0603
C0402
C591
C596
10U6.3X
1U6.3Y
C0603
C0402
C595
C601
10U6.3X
0.1U10X
C0603
C0402
C411
C407
10U6.3X
0.1U10X
C0603
C0402
C307
C314
10U6.3X
1U6.3Y
C0603
C0402
PLACE ALL DECOUPLING AS CLOSE TO ASIC AS POSSIBLE
C682
10U6.3X
C0603
C431
10U6.3X
C0603
C683
1U6.3Y
C0402
C437
1U6.3Y
C0402
C684
0.1U10X
C0402
C436
0.1U10X
C0402
4
LVDDR
C321
0.1U10X
C0402
R192 0R R0603
LVDDC
C337
0.1U10X
C0402
LPVDD
C329
0.1U10X
*
C0402
DPLL_PVDD
C332
0.1U10X
C0402
*
PCIE_PVDD
C335
0.1U10X
*
C0402
A2VDD
C339
1000P50X
C0402
A2VDDQ
C602
*
0.1U10X
C0402
VDDDI
C608
1000P50X
*
C0402
M82S_AVDD
C606
1000P50X
C0402
DPA_VDDR
C609
0.1U10X
C0402
DPB_VDDR
C603
0.1U10X
C0402
TPVDD
C610
1000P50X
*
C0402
VDD_CT
C401
1000P50X
C0402
M82S_PCIE_VDDR
C322
0.1U10X
C0402
VDD_MEM_CLK0
VDD_MEM_CLK1
4
(3.3V @ 250MA LVDDR)
(1.8V @ 100MA LVDDC)
(1.8V @ 400MA LVDDC,LVDDR)
(1.8V @ 20MA LPVDD)
(1.8V @ 40MA DPLL_PVDD)
(1.8V @ 40MA PCIE_PVDD)
(3.3V @ 135MA A2VDD)
(1.8V @ 2MA A2VDDQ)
( 1.8V @ 100MA VDD1DI,VDD2DI)
(1.8V @ 65MA AVDD)
(1.8V @ 100MA EACH SINGLE LINK)
(1.1V @ 200MA EACH SINGLE LINK)
(1.8V @ 20MA TPVDD EACH SINGLE LINK)
(VDD_CT 1.8V @ 110MA (VDD_CT)
(1.8V @ 400MA PCIE_VDDR)
(1.8V @ MA VDDRHA_1
INCLUDED IN VDDR1)
(1.8V @ MA VDDRHA_2
INCLUDED IN VDDR1)
3
FOR M7x
INSTALL LVDDR TO +3.3V AND
LVDDC TO 1.8V
WITH SEPARATE FILTERS
DO NOT INSTALL STRAP RESISTOR
FOR M8x
INSTALL LVDDR AND LVDDC TO +1.8V
WITH THE ONE LVDDC FILTER
DO NOT INSTALL LVDDR FILTER
INSTALL STRAP RESISTOR
FOR M8x
INSTALL DPA_VDDR TO +1.1V AND
DPB_VDDR TO +1.1V
WITH SEPARATE FILTERS
DO NOT INSTALL STRAP RESISTOR
FOR M7x
INSTALL DPA_VDDR AND DPB_VDDR TO +1.8V
WITH THE ONE DPA_VDDR FILTER
DO NOT INSTALL DPB_VDDR FILTER
INSTALL STRAP RESISTOR
PLACE ALL DECOUPLING CAPS
CLOSE TO THE ASIC
*
AND RUN DEDICATED TRACES
FROM ASIC PINS
TO JOIN THE GROUND PLANE
WITH ONE VIA AT THE CAP
C333
2.2U6.3Y
C0603
BB_ENA
BB_ENA = 0V FOR BACK BIASING DISABLED
MAX1673 SHUTDOWN
-BBN = 0V VIA MAX1673 INTERNAL 1 OHM TO GROUND
N FET A = OFF, P FET B = OFF, N FET C = ON
+BBP = VDD_CORE
BB_ENA = +3.3V FOR BACK BIASING ENABLED
MAX1673 ENABLED
-BBN = -.85V
N FET A = ON, P FET B = ON, N FET C = OFF
+BBP = +1.8V
3
THE OPTIMAL +BBP OFFSET VOLTAGE
(POWERPLAY VDDC MINUS 1.5V OR 1.8V RAIL)
IS YET TO BE DETERMINED
U16
1 8
LIN/SKIP# IN
2
CAP+
4
SHDN#
MAX1673ESA
SOIC8
+1.1VRUN
M82S_VDD_CORE
BB_ENA 23
7
GND
6 3
FB CAP-
5
OUT
2
L63 220L3A
L36 220R_200m
L45 300L300m
1 2
R203
10K
R0402
2
L0805_67
L0603
G
1
PCIE_VDDC
C575
C584
10U6.3X
1U6.3Y
C0603
C0402
C398
C370
1U6.3Y
1U6.3Y
C0402
C0402
C310
C316
10U6.3X
1U6.3Y
C0603
C0402
L0603
C435
C438
10U6.3X
1U6.3Y
C0603
C0402
THE OPTIMAL -BBN OFFSET VOLTAGE
(0V MINUS -.6V TO -.9V)
IS YET TO BE DETERMINED
BUT MAX1673 DIVIDER RESISTORS
MUST BE ADJUSTED FOR THE SAME
OFFSET AS +BBP
M82S_VDD_CORE
+5VRUN
D S
C325
10U6.3X
C0603
R200
17.4K_1%
R0402
R216
100K
R0402
PQ28
N-2N7002
SOT23SGD_T
(+1.8V 0R +1.1V @ 1A MAX)
N-SI2304DS
SOT23SGD_T
FET C
1.7A
+3VRUN
R194
100K
R0402
-BB_VGA= -(+3VRUN) * R2138 / R2134
C343
10U6.3X
C0603
Title
M82S_PWR & FILTER
Size Document Number Rev
Custom
Date: Sheet
MS-13331
(PCIE_VDDC 1.1V @ 1A )
C359
0.1U10X
C0402
C387
1U6.3Y
C0402
C341
0.1U10X
C0402
C439
0.1U10X
C0402
C342
10U6.3X
C0603
DPLL_VDDC
Q28
(+1.1V)
*
MPVDD
( .95V-1.1V @ 230MA MPVDD)
*
D S
G
FET B
1.8A
-BBN
R206
X
0R
R0402
(DPLL_VDDC 1.1V @ 100 MA)
1.8VGA
Q29
P-SI2301DS
SOT23SGD_T
M82S_VDD_CORE
MICRO-STAR INT'L CO.,LTD.
1
28 55 Wednesday, August 22, 2007
R213
X
0R
R0402
C366
1U6.3Y
C0402
+BBP
0A
of
5
hexainf@hotmail.com
GRATIS - FOR FREE
4
3
2
1
RX780
CHECK M82S Spec. and Reference
Schematic and ATi FAE
GPIO0 23
GPIO1 23
D D
C C
GPIO22=0 GPIO_9 GPIO_[13:11]= CONFIG[3:0]
a) If BIOS_ROM_EN = 1, then Config[3:0] defines the
ROM type. See “ROM Configurations”
b) If BIOS_ROM_EN = 0, then Config[2:0] defines the
primary memory aperture size. (Config 3 = don’t care).
B B
Size of the primary memory apertures CONFIG[3:0]
128MB x000
256MB x001
64MB x010
32MB x011
512MB x100
1GB x101
2GB x110
4GB x111
GPIO2 23
GPIO3 23
GPIO4 23
GPIO5 23
GPIO6 23
GPIO8 23
GPIO11 23
GPIO12 23
GPIO13 23
GPIO9 23
GPIO22 23
DVALID 23
PSYNC 23
M82S_HSYNC# 23,40
M82S_VSYNC# 23,40
DVPDATA20 23
DVPDATA21 23
DVPDATA22 23
DVPDATA23 23
M82S_H2SYNC# 23
M82S_V2SYNC# 23
R205 10K R0402
R437 10K R0402
R210 10K R0402
X
R212 10K R0402
X
R218 10K R0402
X
R438 10K R0402
X
R215 10K R0402
X
R220 10K R0402
R439 10K R0402
X
R219 10K R0402
X
R440 10K R0402
R222 10K R0402
X
R442 10K R0402
X
R202 10K R0402
X
R199 10K R0402
X
R191 10K R0402
R190 10K R0402
X
R430 10K R0402
X
R427 10K R0402
X
R423 10K R0402
X
R420 10K R0402
X
R198 10K R0402
X
R197 10K R0402
X
Only populate the required straps,
see table and databook
+3VRUN
CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
STRAPS
BIF_MSI_DIS
BIF_AUDIO_EN
BIF_64BAR_EN_A
TX_PWRS_ENB
TX_DEEMPH_EN
BIF_DEBUG_ACCESS
BIF_AUDIO_EN
BIOS_ROM_EN
ROMIDCFG(3:0)
VIP_DEVICE_STRAP_ENA
BIF_VGA DIS VGA ENABLED = LOW
BIF_HDMI_EN
MEM_TYPE
BIF_GEN2_EN_A GPIO5 Debug use only (disables PCI-E 5.0 GT/s negotiation) = LOW 0
PIN
VIP1
VIP3
VIP5
GPIO1
GPIO4
GPIO8
GPIO22 BIOS_ROM_EN Enable external BIOS ROM device
GPIO_22_ROMCSB
GPIO[13:11,9]
M82S_VSYNC#
PSYNC
M82S_HSYNC#
ANY UNUSED
GPIO OR DVP
THAT ARE NOT
CONFIG STRAPS
FOR EXAMPLE
DVPDATA20:23
IN THIS DESIGN
DESCRIPTION OF DEFAULT SETTINGS
MESSAGE SIGNAL INTERRUPT ENABLED
ENABLE HD AUDIO (M7x) = HIGHT
64 BIT BARS DISABLED
PCIE FULL TX OUTPUT SWING = HIGH
PCIE TRANSMITTER DE-EMPHASIS ENABLED = HIGH
DEBUG SIGNALS MUXED OUT
ENABLE HD AUDIO (M8x) = HIGH
DISABLE EXTERNAL BIOS ROM
IGNORE VIP DEVICE STRAPS = LOW
HDMI ENABLE = HIGHT (SEE NOTE 2)
MEMORY TYPE,MAKE AND SIZE INFO
ATI RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESE
GPIO5
GPIO3
GPIO2
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
GENERICC
GPIO21_BB_EN
GPIO6
GPIO_28_TDO
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RSVD = ATI RESERVED
(DO NOT INSTALL)
M8x M7x
X
X
DVALID
H2SYNC
X
X
0
X
0
X GPIO0
X
0
RSVD
0
X
X
X
0
X
X
X
X
X
NA
NA
NA
X
1
0
X
0
NA
X
X SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
X
00
0
X
X
X
X
V2SYNC
NOTE 1: HD AUDIO MUST ONLY BE ENABLED
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM
DESIGNER TO ENSURE ENTITLEMENT
NOTE 2: HDMI MUST ONLY BE ENABLED
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM
DESIGNER TO ENSURE ENTITLEMENT
A A
5
4
AND NOT NECESSARILY QUALIFIED
3
Title
MICRO-STAR INT'L CO.,LTD.
M82S_CONGIF STARP
Size Document Number Rev
B
2
Date: Sheet
MS-13331
29 55 Wednesday, August 22, 2007
1
of
0A
COMPONENTS SHOWN ARE EXAMPLES ONLY
5
D D
R476
10K
R0402
JNC55 NC_0402_6
VREG
C C
C718
1U6.3Y
C0402
C697
1U6.3Y
C0402
C711
0.1U10X
C0402
R482 R0402
C712 0.1U10X C0402
C713 0.1U10X C0402
C717 0.1U10X C0402
C675 0.1U10X C0402
Y7
12 MHz
TXC7A
R479 270K_1%R0402
C709
15P50N
C0402
6.2K_1%
USBN9 18
USBP9 18
+3VRUN
MODE_SEL
XTLI
XTLO
C710
15P50N
C0402
AV_PLL
RREF
A3V3
A3V3
CARD_3V3
VREG
D3V3
GND
4
48
XTLO
2
RREF
3
AV33
4
DM
5
DP
6
AG33
7
A3V3_OUT
8
5V_IN
9
CARD_3V3
10
VREG
11
D3V3_OUT
12
DGND
47
XTLI
3
GND
46
AG_PLL
45
MODE_SEL
43
44
RST#
XD_CLE/CF_D3
SD_DATA2
SD_DATA3
38
39
40
41
42
XD_ALE/CF_D4
XD_CE#/CF_D11
SD_DAT7/XD_D2/MS_D2/CF_IOWR#
SD_DAT1/XD_D3/MS_D1/CF_IORDY
XD_RDY/CF_D13
SD_DAT3/XD_WE#/CF_D5
SD_DAT2/XD_RE#/CF_D12
SD_DAT5/XD_D0/CF_D14
SD_CLK/XD_D1/MS_CLK/CF_D7
SD_DAT6/XD_D7/MS_D3/CF_D15
SD_DAT0/XD_D6/MS_D0/CF_RST#
XD_D5/MS_BS/CF_A2
2
SD_CMD AV_PLL
D3V3
DGND
CF_CS0#
MS_INS#/CF_IORD#
A3V3
R475
100K
R0402
RST#
C691
1U6.3Y
C0402
36 1
35
CARD_CLK
34
D3V3
33
GND
32
SD_DATA6/MS_DATA3
31
30
29
SD_DATA7/MS_DATA2
28
27
JNC53 NC_0402_6
26
25
SD_CMD
JNC54
NC_0402_6
MS_INS#
SD/MS_DATA0
1
SD/MS_CLK
C719 0.1U10X C0402
SD/MS_DATA1
MS BS
B B
CF_CD#
GPIO0
CF_D10
CF_D9
CF_D2
CF_D8/SM_CD#
CF_D1/XD_CD#
CF_D0/SM_WPM#/SD_WP
CF_A0/SD_CD#
CF_DMACK#
CF_A1/XD_D4
CF_DMARQ SD_DAT4/XD_WP#/CF_D6
4IN1
131415
16
17
18
19
20
21
22
23
24 37
U30
RTS5158
LQFP48
B07-0515804-R09
CARDREADER
SD_CD#
SD/MS_DATA1
SD/MS_DATA0
C674 10P50N
X
C0402
C716 0.1U10X
C0402
A A
SD/MS_CLK
CARD_3V3
SD_CMD
SD_DATA3
SD_DATA2
SD_WP
5
1
CD_SW
3
SD_DAT1
5
SD_DAT0
7
SD_VSS
9
SD_CLK
11
SD_VDD
13
SD_VSS
15
SD_CMD
17
SD_CD/SD_DAT3
19
SD_DAT2
26
SD_WP
25
GND
27
NP1
28
NP2
J73
CONN-SD_MMC_MS CARD-RH-1
MMC_MS_26P
N58-20F0300-N40
4
MS_VSS
MS_BS
MS_DAT1
MS_SDIO/DAT0
MS_DAT2
MS_INS
MS_DAT3
MS_SCLK
MS_VCC
MS_VSS
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
21
22
23
24
MS BS
SD/MS_DATA1
SD/MS_DATA0
SD_DATA7/MS_DATA2
MS_INS#
SD_DATA6/MS_DATA3
SD/MS_CLK
CARD_3V3
C666 10P50N C0402
X
C715
3
SD_WP
0.1U10X C0402
SD_CD#
R458
X
0R
R0402
SD/MS_DATA1
MICRO-STAR INT'L CO.,LTD.
Title
CARD READER(RTS5158)
Size Document Number Rev
Custom
Date: Sheet
MS-13331
2
+3VRUN
C714
1U6.3Y
C0402
0A
30 55 Wednesday, August 22, 2007
of
1
<
hexainf@hotmail.com
GRATIS - FOR FREE
5
4
3
2
1
EXPRESS CARD
26
GND0
PCIE_NB_EXPCARD_TXP 12
+3VRUN_PCIE
+3VSUS_PCIE
+1_5VRUN_PCIE
4 3
PCIE_NB_EXPCARD_TXN 12
PCIE_EXPCARD_NB_RXP 12
PCIE_EXPCARD_NB_RXN 12
PCIE_EXPCARD_CLKP 16
PCIE_EXPCARD_CLKN 16
PCIE_WAKE_UP#
1 2
CPPE#
CONN_CLKREQ#
NEWCARD_PERST#
JNC38 NC_0402_6
CPUSB#
NCARD_WAKE#
U26
1
SMDATAI
2
SYSRST#
3
SHDN#
4
STBY#
5
3.3VIN
6
3.3VIN
7 18
3.3VOUT 1.5VIN
8
3.3VOUT
10
NC
11
GND
TPS2231PWP
SSOP24
+3VRUN_PCIE
C650
0.1U10X
C0402
X
X
+3VRUN
A_RST#
R436 10K R0402
R435 10K R0402
NEWCARD_PERST#
C658
0.1U10X
C0402
A_RST# 13,15,16,17,19,33,38,39
D D
+3VSUS +3VRUN_PCIE +1_5VRUN
C C
C660
0.1U10X
C0402
+3VSUS
+3VRUN
C649
10U6.3X
C0603
SMDATAO
3.3VAUX_IN
CLKEN
3.3VAUX_OUT
1.5VIN
1.5VOUT
1.5VOUT PERST#
CPPE#
CPUSB#
SMCLKO SMCLKI
OC#
C652
0.1U10X
C0402
24
23
21
22
20
19
17
16 9
15
14
13 12
SDATA1
PCIECKE
SCLK1
+1_5VRUN_PCIE
+3VSUS
R447 10K R0402
X
+3VSUS_PCIE
+1_5VRUN
+1_5VRUN_PCIE
CPPE#
CPUSB#
C661
10U6.3X
C0603
JNC37
NC_0402_6
R450 100K R0402
X
R446 100K R0402
X
C656
0.1U10X
C0402
+3VSUS_PCIE
C659
0.1U10X
C0402
PCIE_CLKEN 18
+3VSUS
+3VSUS
R228
X
10K
R0402
CONN_CLKREQ#
PCIE_WAKE_UP# 18,38
SDATA1 18,38
SCLK1 18,38
USBP7 18
L46
X
CMC_180ohm
CCHK_ACM2012
USBN7 18
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PETp0
PETn0
GND1
PERp0
PERn0
GND2
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3VS_0
+3.3VS_1
PERST#
+3.3VAUX
WAKE#
+1.5V_1
+1.5V_2
SMB_DATA
SMB_CLK
RESV1
RESV2
CPUSB#
USB_D+
USB_DGND3
NEW CARD Connect
32
GND9
31
GND8
30
GND7
29
GND6
CN4
NEWCARD_H5.0
CARDBUS_S26
N5D-26F0060-SH4
+3VSUS
B B
C607
0.1U10X
C0402
A A
C629
0.1U50Y
C0603
5
AC_SDIN1_1
AZ_SDATA_OUT 18,34
AZ_SYNC 18,34
AZ_RST# 18,21,34,35 AZ_BIT_CLK 18,34
R409 22R
AC_SDIN1_1
4
R0402
C581
10P50N
C0402
ACZ_SDATA_IN1 18
CN10
1
GND
3
AZALIA_SDO
5
GND
7
AZALIA_SYNC
9
AZALIA_SDI
11
AZALIA_RST#
MDC
RESERVED1
RESERVED2
3.3Vmain/aux
AZALIA_BCLK
GND
GND
GND
GND
MDC_CONN
313233
34
BTB_CON_A31793970_12P
N5C-12F0020-SH4
GND
GND
+3VSUS
2
TP103
4
TP99
6
8
10
BIT_CLK2
12
3
R408 33R
C580
22P50N
C0402
R0402
Title
NEW CARD & MDC
Size Document Number Rev
Custom
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
31 55 Wednesday, August 22, 2007
0A
of
5
R243
475R
R0402
R445
2.2K
R0402
+1.8VRUN_CODEC
R443
2.2K
R0402
AGND_DSP
LINEOUT_L 34,35
LINEOUT_R 34,35
MIC2_VREFOUT_L 34
D D
MIC1P
MIC0N
EC232
47P50N
C0402
EMI 1/30
EC233
EC231
47P50N
47P50N
C0402
C0402
EC235
47P50N
C0402
5020 N/A
AGND_DSP
InternalMic
C C
B B
MIC0P
MIC0N
MIC1P
MIC1N
J71
1
2
3
4
MOLEX_53261-0490
N32-1040430-H06
53398_04
5
6
AGND_DSP
R244
X
475R
R0402
R444
2.2K
R0402
AGND_DSP
C653 10N16XC0402
C655 10N16XC0402
R463
2.2K
R0402
C690
0.22U10X
C0402
C692
0.22U10X
C0402
4
C440
2.2U6.3Y
C0603
C663 0.1U10X
C670 0.1U10X
C680 0.1U10X
C687 0.1U10X
R471
2.2K
R0402
R474
2.2K
R0402
+3VRUN
C0402
C0402
C0402
C0402
R469
100K
R0402
R470
100K
R0402
MIC1_N MIC1N
MIC1_P
MIC0_N
MIC0_P MIC0P
+3VRUN
1
+
3
-
C689
1000P50X
C0402
AGND_DSP
U27
FM2010-N
QFN48_T207
B07-FM2010C-F54
4
U29
LM321
2 5
SOT23_5_NPC30X
R472
1K
R0402
37
39
40
41
42
43
44
45
46
47
48
C693
0.1U10X
C0402
C701
10N16X
C0402
3
NC
MIC1_P
MIC0_N
MIC0_P
NC
NC
NC
NC
NC
NC
VSS_CODEC
NC
R453
100K
R0402
363835
NC
C696
0.1U10X
C0402
AGND_DSP
INT_MIC2 34
34
TEST
MIC1_N
LINE_IN_PNCLINE_IN_N
VREF
31524
C694
0.1U10X
C0402
32
33
NC
NC
AGND_DSP
NC
R454
10K
R0402
31
6
C695
0.1U10X
C0402
+1.8VRUN_FM2010
30
292728
NC
PWD_LED
NC
LINE_OUT
7
8
AGND_DSP
NC
NC
VDD_CODEC
VCOM
9
C699
4.7U6.3X
C0603
2
25
26
NC
NC
SCLK_CE
IRQ_ANA
XTAL_OUT
XTAL_IN
NC
NC
11
10
12
+1.8VRUN_CODEC
SDA_CE
RESET
SHI_S
VDD
GND
24
NC
23
22
NC
21
20
19
18
NC
17
16
15
NC
14
13
NC
33MHz
PCI_CLK1 17
+1.8VRUN_FM2010
R457 10K R0402
C668 0.1U10X C0402
FN_RST#
R462 10KR0402
R473
100K
R0402
+1.8VRUN_FM2010
TP114
1
SCLK0 9,10,16,18
SDATA0 9,10,16,18
AGND_DSP
+1.8VRUN
1 2
L75
300L300m
L0603
A A
5
4
C698
0.1U10X
C0402
+1.8VRUN_CODEC
1 2
L74
300L300m
L0603
C700
4.7U6.3X
C0603
AGND_DSP
C688
0.1U10X
C0402
3
+1.8VRUN_FM2010
C686
4.7U6.3X
C0603
AGND_DSP
L40 80L07_3000mL0805_67
C654
0.1U10X
C0402
C388
X
0.1U10X
C0402
2
AGND_DSP
Title
Size Document Number Rev
Date: Sheet
Array Mic FM2010
Custom
MICRO-STAR INT'L CO.,LTD.
MS-12221
1
1.0
32 55 Wednesday, August 22, 2007
of
5
hexainf@hotmail.com
GRATIS - FOR FREE
C91 22P50N
C89 22P50N
D D
AVDD33
DVDD15
1
C120
22U6.3X
C0805_67
5
AVDD18
VDD33
C77
0.1U10X
C0402
PCIE_NB_LAN_TXP 12
PCIE_NB_LAN_TXN 12
VDD33
C115
0.1U10X
C0402
Icc33=103mA
Total(LAN)=Icc33+Icc18+Icc15
=103+198+367
=668mA
VDD33
Only for 8111B
and 8100E
3 2
Q6
P-BCP69
SOT_223
4
C75
X
0.1U10X
C0402
C72
0.1U10X
C0402
C C
L10 60L1_1000m L1206_113
+3VSUS
B B
A A
C119
22U6.3X
C0805_67
VDD33 AVDD33
CTRL18
L7
60L1_1000m
L1206_113
C85
X
1U6.3Y
C0402
R54 2.49K_1% R0402
CTRL18
MDI0+
MDI0-
MDI1+
MDI1-
MDI2+
MDI2-
MDI3+
MDI3-
EVDD18
A_RST# 13,15,16,17,19,31,38,39
C76
0.1U10X
C0402
JNC21 NC_0805_67_16
C0402
C0402
C79
4.7U6.3X
C0603
LAN_GND
10
11
12
13
14
15
16
65
A_RST#
C73
0.1U10X
C0402
1
2
3
4
5
6
7
8
9
X_IN
Y3
25MHz
OSC_5_2X3_4
X_OUT
GVDD
C83
0.1U10X
C0402
RSET
U7
646362616059585756555453525150
VCTRL18
AVDD33
MDIP0
MDIN0
AVDD18
MDIP1
MDIN1
AVDD18
MDIP2
MDIN2
AVDD18
MDIP3
MDIN3
AVDD18
VDD15
VDD33
GND
17
C87
0.1U10X
C0402
4
AVDD33
C61
0.1U10X
C0402
VDD33
CTRL15
LED0
LED1
LED2
CKTAL1
AVDD33
VDD15
LED3
VDD33
VDD15
RSET
GVDD
CKTAL2
VCTRL15
RTL8111B-GR
NC
NC
LANWAKEB
PERSTB
VDD15
EVDD18
HSIP
HSIN
EGND
REFCLK_P
REFCLK_N
EVDD18
HSOP
181920212223242526272829303132
LAN_GND
LAN_GND
AVDD18
Icc18=198mA
C84
X
0.1U10X
C0402
4
C110
X
0.1U10X
C0402
EVDD18
C74
X
0.1U10X
C0402
C96
0.1U10X
C0402
49
NC
NC
VDD15
EESK
EEDI
VDD33
EEDO
EECS
VDD15
VDD15
VDD15
VDD33
ISOLATEB
VDD15
HSON
EGND
VDD15
QFP_64P_CON
B06-8111B0C-R09
LAN_PEN1
LAN_PEP1
NC
NC
NC
NC
NC
LAN_GND
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
X
X
VDD33
1 2
R59
X
10K
R0402
DVDD15
C522 0.1U10XC0402
C524 10N16XC0402
R58
3.6K_1%
R0402
EECS
EESK
EEDI
EEDO
EESK
EEDI
EEDO
EECS
ISOLATEB
C97 0.1U10X C0402
C95 0.1U10X C0402
PCIE_LAN_CLKN 16 PCIE_WAKE# 18
PCIE_LAN_CLKP 16
CTRL15
+3VRUN
1
2
3
4
R66
1K
R0402
LAN_GND
3
U8
CS
SK
DI
DO
AT93C46DN-1.8
SOIC8
PCIE_LAN_NB_RXN 12
PCIE_LAN_NB_RXP 12
X
1
8
VCC
7
DC
6
ORG
5
GND
VDD33
C103
0.1U10X
C0402
VDD33
C99
0.1U10X
C0402
R65
15K
R0402
C521 0.1U10XC0402
C523 10N16XC0402
C111 1000P2KXC1808MS
VDD33
Only for 8111B
and 8100E
3 2
Q5
P-BCP69
SOT_223
4
C112
22U6.3X
C0805_67
3
VDD33
C116
0.1U10X
C0402
C107
0.1U10X
C0402
L9 300L700m L0805_67
X
L8 300L700m L0805_67
LAN_GND
C106
0.1U10X
C0402
2
LAN MAGNETICS
U20
C105
0.1U10X
C0402
V_DAC
1
TCT1
2
TD1+
3
1
2
3
4
5
6
7
8
C104
0.1U10X
C0402
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
GST5009 LF-RH
SOIC24_1MM
10 9
V_DAC
V_DAC
V_DAC
2
24
MCT1
23
MX1+
22
MX1-
21
MCT2
20
MX2+
19
MX2-
18
MCT3
17
MX3+
16
MX3-
15
MCT4
14
MX4+
13
MX4-
C102
X
0.1U10X
C0402
C100
X
0.1U10X
C0402
Title
Size Document Number Rev
Custom
Date: Sheet
MDI3MDI3+
MDI2MDI2+ TRD2+
MDI1MDI1+
MDI0MDI0+
C94
0.1U10X
C0402
C514 10N16XC0402
C516 10N16XC0402
C518 10N16XC0402
C519 10N16XC0402
TRD3TRD3+
TRD1TRD2TRD2+
TRD1+
TRD0TRD0+
CON7
CONN-RJ45[B]_smd-RH
LAN_RJ45_8P_SMT
N55-08F0250-A10
C98
0.1U10X
C0402
1
RN17
8P4R-75R
RN0402_MSI
MCT4
MCT3
MCT2
MCT1
TRD3TRD3+
TRD2-
TRD1TRD1+
TRD0TRD0+
MCT1
MCT2
MCT3
MCT4
Icc15=367mA
C101
X
0.1U10X
C0402
C88
X
0.1U10X
C0402
X
0.1U10X
C0402
MICRO-STAR INT'L CO.,LTD.
GIGA LAN (RTL8111B)
MS-13331
1
C78
1
3
5
7
DVDD15
2
4
6
8
33 55 Thursday, August 23, 2007
0A
of
5
Low (Mute) High (turn on)
DEPOP_MUTE#
SPEAKER_MUTE#
D D
Normal keep
High
Normal keep
High
Power On/Down &
S3
Line-out Jack
IN
SPEAKERMUTE# 35
SPDIFO 35
4
Close to ALC888
R232 10R
R0402
CODEC_3V
4847464544434241403938
U17
AGND
AVDD_5V
37
3
R231
20K_1%
R0402
AGND
2
AVDD_5V
C685
X
4700P25X
C0402
AGND
C669
4700P25X
C0402
C678
X
0.1U10X
C0402
C679
0.1U10X
C0402
C432
10U10Y
C0805_67
1
Q32
N-AO3404
SOT23SGD_T
D S
G
RUND 43,44,46,47
+5VSUS
R240
10K
R0402
DEPOP_MUTE# 35
SPEAKER_MUTE# 35
AZ_BIT_CLK 18,31
C C
B B
R242 22R R0402
C441
X
22P50N
C0402
AZ_SDATA_OUT 18,31
ACZ_SDATA_IN0 18
AZ_SYNC 18,31
AZ_RST# 18,21,31,35
SPKR 18
FRONT-JD 35
MIC-JD 35
LINEOUT_L 32,35
LINEOUT_R 32,35
mute
R246 22R R0402
CODEC_3V
R248 0R R0402
X
R236
X
10K
R0402
AC_BIT_CLK
ACZ_SD_IN0
PC_BEEP
R258 5.1K_1% R0402
R263 20K_1% R0402
1
2
3
4
5
6
7
8
9
10
11
12
SPDIFO
DVDD1
GPIO0
GPIO1
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
SENSE A
1314151617181920212223
AVSS2
LFE_OUT
CEN_OUT
SPDIFI / EAPD
SIDE_SURR_L
SIDE_SURR_R
REALTEK
ALC888
LINE2_L
LINE2_R
MIC2_L
MIC2_R
C465 1U16Y
MIC_2R
MIC_2L
C464 1U16Y
JDREF
SURR_OUT_L
SURR_OUT_R
CD_L
CD_GND
CD_R
C0603
C0603
AVDD2
FRONT_OUT_R
FRONT_OUT_L
SENSE B
DCVOL
LINE1_VREFOUT_R
MIC1_VREFOUT_R
LINE2_VREFOUT
MIC2_VREFOUT_L
LINE1_VREFOUT_L
MIC1_VREFOUT_L
VREF
AVSS1
AVDD1
MIC1_L
MIC1_R
LINE1_L
LINE1_R
ALC888
24
W83781D
B09-LC88804-R09
MIC_1R
MIC_1L
36
35
34
33
32
31
30
29
28
27
26
25
AVDD_5V
X5R
C463 2.2U10X C0603
C466 2.2U10X C0603
INT_MIC2 32
AGND
C444
0.1U10X
C0402
INTSPK_R 35
INTSPK_L 35
MIC1_VREFOUT_R 35
MIC2_VREFOUT_L 32
MIC1_VREFOUT_L 35
AGND
MIC1_R 35
MIC1_L 35
C450
10U6.3X
C0603
CODEC_3V
C447
X
0.1U10X
C0402
C424 1000P50XC0402
C493 1000P50XC0402
X
C428
0.1U10X
C0402
C421
10U6.3X
C0603
AGND
EMI
L43
1 2
80L07_3000m
L0805_67
change to 5010
1 2
L49
80L07_3000m
L0805_67
C480
0.1U10X
C0402
X
0.1U10X
C0402
+3VRUN
C485
AGND
A A
MICRO-STAR INT'L CO.,LTD.
Title
AUDIO(ALC883)
Size Document Number Rev
B
5
4
3
2
Date: Sheet
MS-13331
34 55 Wednesday, August 22, 2007
1
of
0A
<
hexainf@hotmail.com
GRATIS - FOR FREE
<
AVDD_5V
C707
10U10Y
C0805_67
D D
C C
AGND
5
C703
C677
X
0.1U10X
0.1U10X
C0402
C0402
GAIN0
6dB 0
0
010dB
15.6dB
21.6dB11
X
4.3dB
INTSPK_R 34
INTSPK_L 34
GAIN1
1
0
1
X
C702
4700P25X
C0402
R237
75R
R0402
SYS_OFF
SYS_ON
SE/BTL#
0
0
0
0
1
R235
75R
R0402
INSPK_R
INSPK_L
AVDD_5V
R465 100KXR0402
R459 100KXR0402
R468 100KR0402
R456 100KR0402
AGND
D-S interchange
Q33
N-2N7002DW
SOT_363
G2
S2
G1
S1
D2
D1
POWER ON/OFF/S3/S4 NOISE CONTROL
INSP_R
INSP_L
S1
G1
S2
G2
Q34
N-2N7002DW
SOT_363
D1
D2
4
LINEOUT_L 32,34
LINEOUT_R 32,34
GAIN0
GAIN1
GAIN0
GAIN1
DEPOP_R
DEPOP_L
C6760.1U10X C0402
C7040.1U10X C0402
C673 0.47U10XC0603
C672 0.47U10XC0603
C671 0.47U10XC0603
AGND
GAIN0
GAIN1
AVDD_5V
LNO_L
LNO_R
3
U28
6
PVDD#6
15
PVDD
16
VDD
5
LIN-
17 12
RIN+#17 NC
7
RIN+
9
LIN+
10
BYPASS
2
GAIN0
3
GAIN1
ROUT+
ROUTLOUT+
LOUT-
SHUTDOWN
21
GND#11
GND
GND#1
GND#20
APA2031RI-TRL
TSSOP20_EP
C454 100U6.3V-SOD C_B_3528
DEPOP_L
DEPOP_R DEP_R
C459 100U6.3V-SOD C_B_3528
18
14
4
8
19
21
11
13
1
20
SPK_OUT_R+
SPK_OUT_R-
SPK_OUT_L+
SPK_OUT_L-
MUTE_INTSPKR
AGND
+
1 2
+
1 2
SPEAKER_MUTE# 34
L47 300L300m L0603
DE_L DEP_L
DE_R
R264
22K
R0402
L48 300L300m L0603
R249
22K
R0402
AGND
AGND
1 2
1 2
2
PWR_SRC
R455
100K
R0402
G
C458
100P16N
C0402
AGND
SPK_OUT_RSPK_OUT_R+
SPK_OUT_L+
SPK_OUT_L-
C667
1000P50X
C0402
+3VRUN +3V_SPDIF
D S
Q51
N-2N7002
SOT23SGD_T
SPDIFO 34
FRONT-JD 34
C477
100P16N
C0402
C706
1000P50X
C0402
AGND
D S
G
C460
100P16N
C0402
C664
1000P50X
C0402
Q50
N-2N7002
SOT23SGD_T
+3V_SPDIF
C461
0.1U10X
C0402
C665
1000P50X
C0402
1
EarPhoneJack
CON4
9
GND
8
VCC
VIN
10
6
5
4
2
3
1
JNC40
NC_0402_6
AGND
SPEAKER
1
2
3
4
5
BH1X5#S_white-1.25pitch-1
53261_05
N32-1050150-H06
2F11381-SJ5-TR
SPDIF_MINI_JACK
N58-09F0041-F02
J72
6
7
11
12 7
AGND
MIC1_VREFOUT_R 34
MIC1_R 34 MIC-JD 34
B B
R238 1K R0402
PWR_SRC
R460 100KR0402
X
R233 1K R0402
A C
D14
BAS40WS
DIODE_SOD323
R234 10K R0402
PWR
R464
180K
R0603
SB_DEPOP# 18
DEPOP_MUTE# 34
AZ_RST# 18,21,31,34
A A
+5VALW
R247
10K
R0402
D S
G
Q36
N-2N7002
SOT23SGD_T
C430
4.7U10Y
C0805_67
SPEAKERMUTE# 34
SPEAKER_MUTE# 34
Close To Power Source
D S
G
R466 100KR0402
Q52
N-2N7002
SOT23SGD_T
R229 10K R0402
D S
G
Q49
N-2N7002
SOT23SGD_T
SYS_ON SYS_OFF
C681
10U25X
C1210MS
A C
+3VRUN
A C
D15 BAS40WS DIODE_SOD323
D S
G
R461 100K R0402
D S
G
Q35
N-2N7002
SOT23SGD_T
D16 BAS40WS DIODE_SOD323
Q30
X
N-2N7002
SOT23SGD_T
POWER ON/OFF/S3/S4 NOISE CONTROL
PWR PWR
(MUTE SPEAKER)
AVDD_5V
G
AGND
R230
100K
R0402
MUTE_INTSPKR
D S
Q31
N-2N7002
SOT23SGD_T
Modify Sch 03/06
SE_MODE#
->MUTE Sch
AGND
POWER ON/OFF/S3/S4 NOISE CONTROL
C426
0.47U10X
C0603
MIC1_VREFOUT_L 34
MIC1_L 34
Mobile Configuation:
(3 external jacks, 1 internal Mic, 2 sets stereo internal speaker)
Pin Assignment
SURR (pin-39/41)
CEN/LFE (pin-43/44)
SIDESURR (pin-45/46) X
LINE1 (pin-23/24)
MIC2 (pin-16/17)
5
4
3
MIC1_VREFOUT_R
MIC1_R
MIC1_VREFOUT_L
MIC1_L
Location
SPDIF jack, AMP
X
X
Line-in jack
MIC-in jack MIC1 (pin-21/22)
Int.MIC
R241 2.2KR0402
C467
X
1000P50X
C0402
AGND
R245 2.2KR0402
C469
X
1000P50X
C0402
AGND
2
Re-tasking
SPDIF output, AMP output(Int.SPKR), ? FRONT(pin-35/36)
X
X
X
Line input, ?
Mic input, ?
Int.Mic input
C468
C470
1000P50X
1000P50X
C0402
C0402
For EMI
Title
AMP & SPK & MIC & SPK
Size Document Number Rev
Custom
Date: Sheet
MS-13331
MicPhoneJack
7
8
CN5
5
4
3
6
2
1
JACK-AUIDO6PSPRING_BLACK-RH
AUDIO_JACK_6P_OB
N54-06F0481-A10
AGND
Description is Blue, but ME say is Black
MICRO-STAR INT'L CO.,LTD.
35 55 Wednesday, August 22, 2007
1
of
0A
5
+5VRUN
F3
1.5A_MSMD_POLY_SW
MINISMD050
D D
C C
B B
+5VRUN
X
0.1U10X
C0402
USB5V_C
X
22U10Y
C1206_113
1.5A_MSMD_POLY_SW
MINISMD050
C117
F1
C572
USBN5 18
USBP5 18
USB5V_C
USB5V_C
C122
X
1000P50X
C0402
C586
0.1U10X
C0402
C219
X
1000P50X
C0402
USB5V_A
1 2
USBN4 18
USBP4 18
C121
330U6.3V-SOD
C_D_7343
C582
1000P50X
C0402
4 3
L65
X
CMC_180ohm
CCHK_ACM2012
+
1 2
C221
330U6.3V-SOD
C_D_7343
1 2
+
C231
1000P50X
C0402
4 3
C118
1000P50X
C0402
C577
0.1U10X
C0402
1 2
4
J70
AMP ( 6-1734038-1 )
USB_A1_4
N53-04M0530-A10
C232
0.1U10X
C0402
L59
X
CMC_180ohm
CCHK_ACM2012
C123
0.1U10X
C0402
RVS
1
1
2
2
3
3
4
4
4
3
2
1
J69
USB-D-WH-B
USB_CONN_0517
N53-04M0411-A10
4
3
2
1
5 6
5 6
RVS
3
+5VRUN
R71
TP_DATA
1
.
.
3
C113
X
0.1U10X
C0402
TP_CLK
2
.
ED1
X
P-B/NY66
SOT523
USBN3 18
USBP3 18
TP_DATA 39
TP_CLK 39
10K
R0402
EC45
X
100P50N
C0402
CAMERA_ON- 39
C108
10U10Y
C0805_67
+3VRUN
C114
ED2
X
P-B/NY66
SOT523
X
0.1U10X
C0402
USBP3
1
.
.
3
USBN3
2
.
C109
10U10Y
C0805_67
5 6
5 6
R72
10K
R0402
EC46
X
100P50N
C0402
+3VRUN
+3VRUN
R304 4.7K R0402
USBN2 18
USBP2 18
4 3
2
MS12223 & MS12224
TouchPad & FingerPrint
FINGERPRINT
CN2
1
1
2
2
3
3
4
4
5
5
13
6
6
7
7
14
8
8
9
9
10
10
11
11
12
12
CONN-FPC12U_white-RH
FPC_SD54548_1211
N5A-12F0130-M06
605-6837D-050
Q42
P-NDS352AP
SOT23SGD_T
D S
Q41
N-2N7002
C509
10P50N
C0402
1 2
SOT23SGD_T
G
L53
X
CMC_180ohm
CCHK_ACM2012
+5VRUN_BT
USBN8 18
USBP8 18
13
14
EC output Default ==> Low ,High active
L54 300L600m L0603
C511
X
22P50N
C0402
+5VRUN
BT_PWR_ON- 39
C512
X
22U10Y
C1206_113
4 3
R361 4.7KR0402
C510
X
22P50N
C0402
1
BLUETOOTH
1
2
3
4
5
6
BT_RADIO_ON#
USBN8
1 2
X
L60
CMC_180ohm
CCHK_ACM2012
USBP8
+5VRUN +5VRUN_BT
BT_RADIO_ON#
G
+3V_CAMERA
C513
X
10N16X
C0402
CAMERA
N32-1050050-H06
1
2
3
4
5
CON6
BH1X5#S_white-1.25pitch-1
53261_05
N32-1050150-H06
7
8
CN9
BH1X8S_white-1.25pitch
53398_08
N32-1080280-A81
Q44
P-NDS352AP
SOT23SGD_T
D S
Q45
N-2N7002
SOT23SGD_T
6
7
9
10
N5A-06F0120-M06
RVS
4
USBN6 18
A A
USBP6 18
5
4 3
1 2
L55
X
CMC_180ohm
CCHK_ACM2012
4
3
2
1
J66
USB-D-WH-B
USB_CONN_0517
N53-04M0411-A10
5 6
5 6
4
3
2
1
C484
X
10U10Y
C0805_67
+5VRUN +5VSUS +5VRUN +5VSUS
R270
R272
X
X
22R
22R
R0402
R0402
3
X
10K
R0402
CIR
3
VDD
DATA
2 1
GND GND
U18
X
IR_RECIVER
IR_Reciver_4P
D0B-0623800-V02
R273
4
R277
X
10K
R0402
C491
X
22P50N
C0402
CIR_DATA 39
2
Title
MICRO-STAR INT'L CO.,LTD.
USB,CIR,BT,FP,CAMERA
Size Document Number Rev
B
Date: Sheet
MS-13331
36 55 Wednesday, August 22, 2007
1
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
4
3
2
1
H.D.D.
2.5"HD DRIVE
SATA_TX0+_C 19
SATA_TX0-_C 19
SATA_RX0-_C 19
D D
C C
+5VRUN
1 2
C46
150U6.3V-SOD
C_D_7343
C41
X
0.1U10X
C0402
C40
0.1U10X
C0402
SATA_RX0+_C 19
S2
TX
S3
TX#
S5
RX#
S6
RX
P1
3.3V_1
P2
3.3V_2
P3
3.3V_3_PC
P7
5V_7_PC
P8
5V_8
P9 P10
5V_9 GND_2M_P_10
P11
P_Reserver_11
P13
V_12_13_PC
P14
V_12_14
P15
V_12_15
GND_2M_S_1
GND_2M_S_4
GND_2M_S_7
GND_1M_P_4
GND_2M_P_5
GND_2M_P_6
GND_1M_P_12
GND1
GND2
GND3
GND4
CN7
SATA CONN_22P
SATA_CON_22P
N5N-22F0080-A10
S1
S4
S7
P4
P5
P6
P12
G1
G2
M1
M2
The MD (P4) pin is for ODD
PN & FOOTPRINT N/A
manufacturer debug
SATA_TX4+_C 19
SATA_TX4-_C 19
B B
+5VRUN
1 2
C159
150U6.3V-SOD
C_D_7343
C178
X
0.1U10X
C0402
SATA_RX4-_C 19
SATA_RX4+_C 19
C177
0.1U10X
C0402
O.D.D.
S1
GND1
S2
A+
S3
A-
S4
GND2
S5
B-
S6
B+
S7
GND3
P1
PD
P2
+5V_1
P3
+5V_2
P4
MD
P5
GND4
P6 P7
GND5 GND7
CN8
SATA CONN_13P
SATA_S13
N5N-13M0010-A10
The PD (P1) pin is for host GIO to detect if
GND6
S8
LED_HDD# 38
4
U12
NC7SZ08M5X
SOT23_5_NPC30X
+3VRUN
5 3
R124
10K
R0402
2
1
SATA_ACT#
+3VRUN
R125
10K
R0402
SATA_ACT# 19
the ODD is present or not. In the drive, the
pin is “pull-low”. So when host side detects
A A
5
4
this pin as high,then no device; when host
side detect this pin as low, then the device
present.
3
MICRO-STAR INT'L CO.,LTD.
Title
SATA HDD/PATA CDROM CONN
Size Document Number Rev
Custom
Date: Sheet of
2
MS-13331
37 55 Wednesday, August 22, 2007
1
0A
5
WLAN CARD
1 2
PCIE_WAKE_UP# 18,31
D D
C C
PCIE_PE1_CLKN 16
PCIE_PE1_CLKP 16
PCIE_PE1_NB_RXN 12
PCIE_PE1_NB_RXP 12
PCIE_NB_PE1_TXN 12
PCIE_NB_PE1_TXP 12
1 2
L56
X
CMC_180ohm
CCHK_ACM2012
USBN0
USBP0
4 3
WAKE# +3.3V_1
3 4
RSVD1 GND7
5 6
RSVD2 +1.5V_1
7
CLKREQ#
9
GND1
11
REFCLK-
13
REFCLK+
15
GND2
17
RSVD3
19
RSVD4
21
GND3
23
PER_N0
25
PER_P0
27
GND4
29
GND5
31
PET_N0
33
PET_P0
35
GND6
37
RSVD5
39
RSVD6
41
RSVD7
43
RSVD8
45
RSVD9
47
RSVD10
49
RSVD11
51
RSVD12
53
GNDM1
55
NC1
56
NC2
CON8
SLOT-MINIPCI52_black-RH-1
MINI_PCI_SMT_52P
N11-0520020-SH4
KEY
+3.3_AUX
SMB_CLK
SMB_DATA
LED_WWAN#
LED_WLAN#
LED_WPAN#
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
GND8
RSVD18
PERST#
GND9
+1.5V_2
GND10
USB_D-
USB_D+
GND11
+1.5V_3
GND12
+3.3V_2
GNDM2
4
+3VRUN
C529
C527
10U6.3X
0.1U10X
C0603
C530
X
10U6.3X
C0603
C0402
C528
X
0.1U10X
C0402
+3VSUS
EC output Default ==> Low ,High active
C526
X
2.2U6.3Y
C0603
+1_5VRUN
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
WLAN_PWRON 39
A_RST# 13,15,16,17,19,31,33,39
SCLK1 18,31
SDATA1 18,31
USBN0 18
USBP0 18
+3VRUN_TV
3
2
1
Main PCB
+5VRUN
+5VRUN
+5VALW
+5VALW
+5VSUS
+3VRUN
R283 220R R0603
R282 220R R0603
R279 220R R0603
R280 220R R0603
R278 220R R0603
R281 220R R0603
LED2 LED-B_20125 LEDS_SML210
1 2
LED5 LED-G_20125 LEDS_SML210
1 2
LED3 LED-G_20125 LEDS_SML210
1 2
LED4 LED-O_20125 LEDS_SML210
1 2
LED1 LED-G_20125 LEDS_SML210
1 2
LED6 LED-O_20125 LEDS_SML210
1 2
BLUETOOTH_LED- 39
LED_WLAN- 39
LED_CHARGE- 39
LED_BATLOW- 39
LED_ACPI- 39
LED_HDD# 37
C604
C612
0.1U10X
10U6.3X
C0402
TV TUNER
1 2
PCIE_WAKE_UP# 18,31
PCIE_PE2_CLKN 16
PCIE_PE2_CLKP 16
B B
PCIE_PE2_NB_RXN 12
PCIE_PE2_NB_RXP 12
PCIE_NB_PE2_TXN 12
PCIE_NB_PE2_TXP 12
A A
5
WAKE# +3.3V_1
3 4
RSVD1 GND7
5 6
RSVD2 +1.5V_1
7
CLKREQ#
9
GND1
11
REFCLK-
13
REFCLK+
15
GND2
17
RSVD3
19
RSVD4
21
GND3
23
PER_N0
25
PER_P0
27
GND4
29
GND5
31
PET_N0
33
PET_P0
35
GND6
37
RSVD5
39
RSVD6
41
RSVD7
43
RSVD8
45
RSVD9
47
RSVD10
49
RSVD11
51
RSVD12
53
GNDM1
55
NC1
56
NC2
CON10
SLOT-MINIPCI52_black-RH-1
MINI_PCI_SMT_52P
N11-0520020-SH4
KEY
+3.3_AUX
SMB_CLK
SMB_DATA
LED_WWAN#
LED_WLAN#
LED_WPAN#
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
GND8
RSVD18
PERST#
GND9
+1.5V_2
GND10
USB_DUSB_D+
GND11
+1.5V_3
GND12
+3.3V_2
GNDM2
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
4
+1_5VRUN
C0603
C648
X
0.1U10X
C0402
+3VRUN
R433 10K R0402
DTV_PWRON 39
C647
+3VSUS
G
X
10U6.3X
C0603
DTV_PWRON 39
A_RST# 13,15,16,17,19,31,33,39
SCLK1 18,31
SDATA1 18,31
USBN1 18
USBP1 18
+3VRUN
EC output Default ==> Low ,High active
EC output Default ==> Low ,High active
C651
X
2.2U6.3Y
C0603
+3VRUN_TV
Q48
P-SI2301DS
SOT23SGD_T
D S
Q47
N-2N7002
SOT23SGD_T
3
MS12222
SwitchBoard
and LEDs
SW/Board
CON2
1
+3VRUN
+3VRUN
BT_WLAN_TV_K- 39
CAMERA_K- 39
HOT_START 39
PWR_SW- 39
LED_NUM# 39
LED_CAP# 39
LED_SCR# 39
1 2
L72
X
CMC_180ohm
CCHK_ACM2012
USBN1
USBP1
2
4 3
+5VSUS
+5VRUN
+3VALW
LED_ACPI-
C124
0.1U10X
C0402
2
3
4
5
6
7
8
9
10
21
11
22
12
13
14
15
16
17
18
19
20
CONN-FPC20U
FPC_S20
N5A-20F0140-A81
C125
X
0.1U10X
C0402
Title
MINI-PCIE X2& LED &SW
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
of
38 55 Wednesday, August 22, 2007
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
+3VALW
C62 0.1U10XC0402
C80 0.1U10XC0402
EC_CS-
D D
C C
EC_RD-
1
2
3
CHANGE
4
+3VALW
R1
3.3K
R0402
SPI_HOLD-
CE#
VDD
SO
HOLD#
WP#
SCK
VSS
SI
U6
W25X80VSSIG-RH
SIC8_SST_S2A
SPI Conn.
EC_RDEC_WREC_CSEC_SPICLK
+3VRUN +3VALW
8
7
6
5
SPI_HOLDEC_SPICLK
EC_WR-
10
9
8
7
6
5
4
3
2
1
CON1
EC_SPI_CONN
BHEADSMD1X10
N32-1100240-A81
D4
BAS40WS
DIODE_SOD323
11
12
RX780
R18
4.7K
R0402
SMB_THRMM82_CLK 23
Q3
N-2N7002
SOT23SGD_T
RX780
Q4
B B
+3VRUN
X
R69 10K R0402
R70 10K R0402
X
R68 10K R0402
X
X
R67 10K R0402
R42 100KR0402
R43 100KR0402
R50 100KR0402
R29 100KXR0402
SUSPWROK
A A
SLP_S3# RUN_ON
SLP_S5#
5
N-2N7002
SOT23SGD_T
KA20M#_SB
KRST#_SB
KBSCI#
LPC_SMI#
PRE_CHG
ENCHG
ENCHG_1P
RSMRST#
R61 0R R0402
R30 0RXR0402
R49 0RXR0402
G
D S
G
RSMRST#
S5_ON
R34
2.2K
R0402
D S
R33
2.2K
R0402
BATCLK_M
BATDATA_M
HOT_START 38
BT_WLAN_TV_K- 38
CAMERA_K- 38
LED_ACPI- 38
PWR_SW- 38
AC_CTL 49
SLP_S5# 18
CIR_DATA 36
4
A_RST# 13,15,16,17,19,31,33,38
SERIRQ 17
PCI_CLK5 17,21
PCI_CLKRUN# 17
R57
10K
R0402
C93
1U6.3Y
C0402
SLP_S3# 18,48
SUSPWROK 48
PWRBT-
EC_SPICLK
LFRAME# 17
TP_CLK 36
TP_DATA 36SMB_THRMM82_DATA 23
AC_OK# 49,50
M_BATIN# 49
ER1 33RR0402
EC40
22P50N
C0402
+3VALW
A C
JNC25 NC_0402_6
JNC23 NC_0402_6
JNC24 NC_0402_6
JNC22 NC_0402_6
4
LAD0 17
LAD1 17
LAD2 17
LAD3 17
TP1
TP2
LID- 40
For EMI
KRST#
GA_20
KB_SCIEC_RST#
KBIN0
KBIN1
KBIN2
KBIN3
KBIN4
KBIN5
KBIN6
KBIN7
KBOUT0
KBOUT1
KBOUT2
KBOUT3
KBOUT4
KBOUT5
KBOUT6
KBOUT7
KBOUT8
KBOUT9
KBOUT10
KBOUT11
KBOUT12
KBOUT13
KBOUT14
KBOUT15
KB_SMI-
U5
13
GND
28
GND
39
GND
129
GND
103
GND
15
GPIO05/LRST#
3
SERIRQ
5
LFRAME#
12
LAD0
10
LAD1
9
LAD2
6
LAD3
14
LCLK
44
GPIO1D/CLKRUN#
2
GPIO01/KBRST#
1
GPIO00/GA20
24
GPIO0E/ECSCI#
42
ECRST#
63
GPIO30/KSI0/ISPE51_RX
64
GPIO31/KSI1
65
GPIO32/KSI2
66
GPIO33/KSI3
67
GPIO34/KSI4
68
GPIO35/KSI5
69
GPIO36/KSI6
70
GPIO37/KSI7
47
GPIO20/KSO0/TP_TEST
48
GPIO21/KSO1/TP_PLL
49
GPIO22/KSO2
50
GPIO23/KSO3/ISP_EN#
51
GPIO24/KSO4
52
GPIO25/KSO5
53
GPIO26/KSO6
54
GPIO27/KSO7
55
GPIO28/KSO8
56
GPIO29/KSO9
57
GPIO2A/KSO10
58
GPIO2B/KSO11
59
GPIO2C/KSO12
60
GPIO2D/KSO13
61
GPIO2E/KSO14
62
GPIO2F/KSO15/ISPE51_TX
89
GPIO48/KSO16
90
GPIO49/KSO17
91
GPIO4A/PSCLK1/P80_CLK
92
GPIO4B/PSDAT1/P80_DAT
93
GPIO4C/PSCLK2
94
GPIO4D/PSDAT2
95
GPIO4E/PSCLK3
96
GPIO4F/PSDAT3
4
GPIO02
7
GPIO03
8
GPIO04
16
GPIO06
17
GPIO07
18
GPIO08
19
GPIO09
20
GPIO0A
21
GPIO0B
22
GPIO0C
23
GPIO0D
29
GPIO11
36
GPIO18
38
GPIO19
41
GPIO1B
43
GPIO1C
45
GPIO1E
46
GPIO1F
101
GPIO54
104
GPIO56
137
GPIO57
142
GPIO58/SPI_CLK
143
GPIO59
82
GPIO41/CIR_RLC_TX
81
GPIO40/CIR_RX
POWER & GND
LPC
KBC
PS2 I/F
GPIO
CIR
3
GPXIOA0/SPI_SEL#
X-BUS
SELMEM#/SPI_CS#
GPIO50/SELIO1#
GPIO52/E51_CS#
GPIO16/E51_TX
GPIO17/E51_RX
SM-BUS
PWM
GPIO12/FANPWM3
GPIO13/FANPWM4
GPIO14/FANFB1
GPIO15/FANFB2
D/A
A/D
KB LED
GPIO1A/NUMLED
GPIO53/E51_TMR1/CAPLED
GPIO55/E51_INT0/SCRLED
CLOCKS
ENE3925_B1
LQFP144_CB1410
B07-0392514-E18
3
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
AGND
GPXIOA1
GPXIOA2
GPXIOA3
GPXIOA4
GPXIOA5
GPXIOA6
GPXIOA7
GPXIOA8
GPXIOA9
GPXIOA10
GPXIOA11
GPXIOA12
GPXIOA13
GPXIOA14
GPXIOA15
GPXOA16
GPXOA17
GPXOA18
GPIO51/A19
GPXID0
GPXID1
GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
RD#/SPI_DI
WR#/SPI_DO
GPIO44/SCL1
GPIO45/SDA1
GPIO46/SCL2
GPIO47/SDA2
GPIO0F/PWM1
GPIO10/PWM2
GPO3C/DA0
GPO3D/DA1
GPO3E/DA2
GPO3F/DA3
GPI38/AD0
GPI39/AD1
GPI3A/AD2
GPI3B/AD3
GPI42/AD4
GPI43/AD5
XCLKI
XCLKO
XCLKO_GND
C92
1U6.3Y
C0402
11
26
37
105
127
141
75
77
111
112
113
114
115
116
117
118
119
120
121
122
123
124
110
109
108
107
106
98
125
126
128
130
131
132
133
134
135
136
144
97
99
34
35
85
86
87
88
25
27
30
31
32
33
76
78
79
80
71
72
73
74
83
84
40
100
102
138
139
140
+3VALW
L3 80L700m_200 L0603
R44 10KR0402
SPI_SEL#
R46 0R R0402
R31 0R R0402
R28 0RXR0402
EC_RDEC_WREC_CS-
R56 10M_1% R0402
X
1 4
2 3
C90
18P50N
C0402
2
1 2
C25
0.1U10X
C0402
S5_ON 46
DTV_PWRON 38
CAMERA_ON- 36
BT_PWR_ON- 36
WLAN_PWRON 38
LED_CHARGE- 38
LED_BATLOW- 38
BLUETOOTH_LED- 38
LED_WLAN- 38
ENCHG_1P 50
ENCHG 49,50
PRE_CHG 50
SUS_ON 43
RUN_ON 43,48
RSMRST# 18
CPU_THRM_ALERT- 7,18
M82_THRM_ALERT- 23
FREQ_SL0 16
FREQ_SL1 16
TP3
EC_BLON 40
TP4
TP5
BATCLK_M 49
BATDATA_M 49
SMB_THRMCPU_CLK 7
SMB_THRMCPU_DATA 7
FAN_PWM 42
FAN_TACH0 42
BR-AD-ADJ 40
FAN_DA 42
LED_NUM# 38
LED_CAP# 38
LED_SCR# 38
Y2
32.768KHz
xtal4p_ma306
C86
18P50N
C0402
2
1
KeyBoard
C22
C24
X
0.1U10X
C0402
C23
X
0.1U10X
C0402
Title
KBC (ENE3925) & SPI ROM
Size Document Number Rev
Custom
Date: Sheet
C20
0.1U10X
10U6.3X
C0402
C0603
KA20M#_SB 18
KRST#_SB 18
SB_PWRON# 18
KBSCI# 18
LPC_SMI# 18
For SW Debug
LDRQ#0 17
A_RST# 13,15,16,17,19,31,33,38
+5VRUN
+3VRUN
R2
X
10K
R0402
MICRO-STAR INT'L CO.,LTD.
MS-13331
LFRAME#
LAD3
LAD2
LAD1
LAD0
LDRQ#0
PCI_CLK5
SERIRQ
FWH_ID0
D7 BAS40WS
D8 BAS40WS
D3 BAS40WS
D5 BAS40WS
D6 BAS40WS
CON3
CONN-FPC25B_white-RH
FPC_S25
N5A-25F0070-A10
R63 0R R0402
A C
DIODE_SOD323
R64 0R R0402
A C
DIODE_SOD323
R55 0R R0402
A C
DIODE_SOD323
R62 0R R0402
A C
DIODE_SOD323
R60 0R R0402
A C
DIODE_SOD323
SW Debug
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CN1
BH1X4#S_WHITE-1.25PITCH-RH
53398_14
N32-1140080-A81
1
KBOUT0
KBOUT1
KBOUT2
KBIN0
KBIN1
KBIN2
KBIN3
KBOUT3
KBOUT4
KBIN4
KBIN5
KBIN6
KBIN7
KBOUT5
KBOUT6
KBOUT7
KBOUT8
KBOUT9
KBOUT10
KBOUT11
KBOUT12
KBOUT13
KBOUT14
KBOUT15
GA_20
KRST#
PWRBT-
KB_SMI-
1
2
3
4
5
15
6
16
7
8
9
10
11
12
13
14
39 55 Wednesday, August 22, 2007
KB_SCI-
15
16
of
26 27
26 27
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0A
<
<
<
M82S_DDC1DAT 23
DAC_SDAT 13
D D
M82S_DDC1CLK 23
DAC_SCL 13
+5VRUN
RB551V-30
DIODE_SOD323
NB_HSYNC# 13,15
M82S_HSYNC# 23,29
C C
B B
A A
NB_VSYNC# 13,15
M82S_VSYNC# 23,29
M82S_LVDS_BLON 23,24
NB_LVDS_BLON 13
C42
C21
10U25X
0.1U50Y
C1210MS
C0603
BL-ON
RX780
R32 0R R0402
R36 0R R0402
X
RS780M
RX780
R12 0R R0402
X
RS780M
A C
D1
RS780M
R11 0R R0402
X
R15 0R R0402
RX780
RS780M
R5 0R R0402
X
R7 0R R0402
RX780
EC_BLON 39
C503
0.1U10X
C0402
5
R14 0R R0402
+CRT5V
JNC1 NC_0402_6
RX780
R8 0R R0402
R6 0R R0402
X
RS780M
C28
X
0.1U50Y
C0603
BR-AD-ADJ 39
5
+3VRUN
N-FDV301N
SOT23SGD_T
+3VRUN
N-FDV301N
SOT23SGD_T
2
PWR_SRC
C501
0.1U10X
C0402
R27
10K
R0402
G
Q2
R10
10K
R0402
G
Q1
+CRT5V
5
1
2
NC7SZ125M5X
3
SOT23_5_NPC30X
5
1
NC7SZ125M5X
3
SOT23_5_NPC30X
LID-
L2
80L07_3000m
L0805_67
For EMI
M82S_R 23
M82S_G 23
M82S_B 23
D S
D S
U3
4
U1
4
+3VSUS
2
1
3 5
R9
10K
R0402
RX780=10K
RS780M=1M
INVERTER
1
2
3
4
5
6
BOX/HEADER/1*6
53398_06
N32-1060170-H06
NB_R 13
NB_G 13
NB_B 13
BL-ON
4
U2
NC7SZ08M5X
SOT23_5_NPC30X
CN6
7
8
M82S_LVDS_DIGON 24
NB_LVDS_DIGON 13
4
RS780M
R302 0R R0402
X
R298 0R R0402
X
R295 0R R0402
X
R303 0R R0402
R299 0R R0402
R296 0R R0402
RX780
R
G
B
R_HSYN
R301
75R
R0402
RX780=75R
RS780M=150R
C14
0.1U10X
C0402
U19
APX9131AI
SOT23_3P
I36-0913109-A30
4
R300
75R
R0402
2
1
VDD
VOUT
GND
C19
1000P50X
3
C0402
RX780
R284 0R R0402
R285 0R R0402
X
RS780M
R
G
B
R297
75R
R0402
+3VSUS
R17
10K
R0402
3
+5VRUN +CRT5V
A C
D17
RB551V-30
DIODE_SOD323
R13
R290
2K_1%
2K_1%
R0402
R0402
L52 60L500m L0603
L51 60L500m L0603
L50 60L500m L0603
R19 0R R0402
R292 0R R0402
R294 33R R0402
C508
22P50N
C0402
C505
22P50N
C0402
R293 33R R0402C1 0.1U10X C0402
C500
22P50N
C0402
C507
22P50N
C0402
C506
22P50N
C0402
C504
22P50N
C0402
C26
22P50N
C0402
LVDS_TXL0P
LVDS_TXL0N
LVDS_TXL1P
LVDS_TXL1N
LVDS_TXL2P
LVDS_TXL2N
LVDS_TXLCKP
LVDS_TXLCKN
C497
22P50N
C0402
C499
22P50N
C0402
LVDS
1
2
3
4
5
6
7
8
9
10
21 22
23 24
25 26
LVC-D20SFYG3TP
LVC_D20SFYG
N5Q-20F0040-H21
+V3.3S_LVDS_PANEL
R286
47R
R0805_67
D S
G
Q39
N-2N7002
SOT23SGD_T
JLCD1
1
2
3
4
5
6
7
8
9
10
21 22
23 24
25 26
11
12
13
14
15
16
17
18
19
20
+V3.3S_LVDS_PANEL +3VRUN
C496
22U10Y
C1206_113
11
12
13
14
15
16
17
18
19
20
C495
10N16X
C0402
LID- 39
+3VRUN
R287
100K
R0402
D S
G
Q37
N-2N7002
SOT23SGD_T
PWR_SRC
R288
100K
R0402
G
D S
Q38
N-2N7002
SOT23SGD_T
+V3.3S_LVDS_PANEL
R289 10K R0402
LVDS_TXL0N
LVDS_TXL0P
LVDS_TXL1N
LVDS_TXL1P
Q40
N-Si3456DV
TSOP_6
6
5
2
1
3
3
4
C494
1000P50X
C0402
LRED
LGREEN
LBLUE
DDC2BD
DDC2BC
HSYN
VSYN R_VSYN
C498
22P50N
C0402
LVDS_TXL2N
LVDS_TXL2P
LVDS_TXLCKN
LVDS_TXLCKP
LVDS_I2C_CLK
LVDS_I2C_DATA
2
+3VRUN +3VRUN
2
Pin 18 & 19
CRT
R350 0R R0402
X
R347 0R R0402
X
R358 0R R0402
X
R354 0R R0402
X
R364 0R R0402
X
R369 0R R0402
X
R394 0R R0402
X
R390 0R R0402
X
R349 0R R0402
R346 0R R0402
R357 0R R0402
R353 0R R0402
R363 0R R0402
R368 0R R0402
R393 0R R0402
R389 0R R0402
+3VRUN
R4
R3
4.7K
4.7K
R0402
R0402
1
C502
0.1U10X
C0402
DDC2BD
HSYN
VSYN
DDC2BC
RS780M
LCD CABLE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NB_I2C_CLK 13
NB_I2C_DATA 13
M82S_DDC2CLK 23
M82S_DDC2DAT 23
16 17
18 19
6
1
7
2
8
3
9
4
10
5
P11
CONN-VGA15PF_BLACK-RH
SILM_DSUB_15PF_T
N59-15F0451-A10
RS780M
RX780
RX780=4.7K
RS780M=3K
R188 0R R0402
X
R185 0R R0402
X
R207 0R R0402
R208 0R R0402
塑膠件
11
12
13
14
15
NB_LVDS_TX_L0P 13
NB_LVDS_TX_L0N 13
NB_LVDS_TX_L1P 13
NB_LVDS_TX_L1N 13
NB_LVDS_TX_L2P 13
NB_LVDS_TX_L2N 13
NB_LVDS_TX_CLKLP 13
NB_LVDS_TX_CLKLN 13
M82S_LVDS_TXL0P 24
M82S_LVDS_TXL0N 24
M82S_LVDS_TXL1P 24
M82S_LVDS_TXL1N 24
M82S_LVDS_TXL2P 24
M82S_LVDS_TXL2N 24
M82S_LVDS_TXLCKP 24
M82S_LVDS_TXLCKN 24
RX780
Title
LVDS,CRT,INVERTER,LID
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
GND
====>
==========>
==========>
==========>
NC ====>
==========>
==========>
==========>
GND ====>
==========>
==========>
====>
GND
==========>
GND
====>
==========>
====>
GND
GND
====>
40 55 Wednesday, August 22, 2007
JLCD1
1
2
17
18
20
5 ==========>
6
8
9
11 ==========>
12
14
15 ==========>
3.3V
3.3V
0A
of
5
hexainf@hotmail.com
GRATIS - FOR FREE
4
3
2
1
RS780M
Close to HDMI connect
D D
AN_M74_A3 07/02
RX780
HDMI_DATA2P 12
HDMI_DATA2N 12
HDMI_DATA1P 12
HDMI_DATA1N 12
HDMI_DATA0P 12
HDMI_DATA0N 12
C C
HDMI_CLKP 12
HDMI_CLKN 12
RX780=180n
RS780M=0.1u
R336 180R R0402
R326 180R R0402
R319 180R R0402
R315 180R R0402
R126
R121
499R_1%
499R_1%
R0402
R0402
AN_M76_A1
For M82S NC for MS1332
C553 0.22U10XC0402
C552 0.22U10XC0402
C550 0.22U10XC0402
C544 0.22U10XC0402
C540 0.22U10XC0402
C538 0.22U10XC0402
C535 0.22U10XC0402
C534 0.22U10XC0402
R120
499R_1%
R0402
Q20
X
N-2N7002
SOT23SGD_T
R337
X
715R_1%
R0402
R117
499R_1%
R0402
6/5 Justin
D S
+5VRUN
+3VRUN
G
R335
X
715R_1%
R0402
G
Q19
X
N-2N7002
SOT23SGD_T
R334
X
715R_1%
R0402
R115
499R_1%
R0402
D S
Q43
N-2N7002
SOT23SGD_T
+3VRUN +3VRUN
G
D S
X
715R_1%
R0402
R111
499R_1%
R0402
R325
R107
499R_1%
R0402
R320
X
715R_1%
R0402
D S
X
715R_1%
R0402
R96
499R_1%
R0402
RX780
G
Q17
X
N-2N7002
SOT23SGD_T
R317
X
715R_1%
R0402
+5VRUN
C532
10U10Y
C0805_67
+3VRUN
G
Q15
X
N-2N7002
D S
SOT23SGD_T
R316
F2
1.5A_MSMD_POLY_SW
MINISMD050
R314
X
715R_1%
R0402
HDMI_DT2P
HDMI_DT2N
HDMI_DT1P
HDMI_DT1N
HDMI_DT0P
HDMI_DT0N
HDMI_CP
HDMI_CN
DDC_CLK_HDMI
DDC_DATA_HDMI
+5VRUN_HDMI
HPD_HDMI
C533
0.1U10X
C0402
HDMI
G23
G22
20
23
22
21
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
CON9
CONN-STAR TAKE19_black-RH
HDMI_SMT_TYPEII_NP_H6_18
N5I-19M0210-L41
0620 Change Footprint & PN by ME
0703 Change Footprint & PN by ME again
SHELL2
B B
A A
RS780M
NB_DDC0DAT 13
RS/RX VDD18
RS/RX VDD18
NB_DDC0CLK 13
+1.8VRUN +1.8VRUN
R85
X
39K
R0402
+1.8VRUN
R89
X
39K
R0402
Q9
X
N-FDV301N
G
SOT23SGD_T
D S
+1.8VRUN
Q13
X
N-FDV301N
G
SOT23SGD_T
D S
DDC_DATA_HDMI
DDC_CLK_HDMI
RX780
M82S_DDC4CLK 23
M82S_DDC4DAT 23
HPD_HDMI
R88 0R R0402
R310
100K
R0402
A C
DDC_CLK_HDMI
R84 0R R0402
D18
BAS40WS
DIODE_SOD323
+5VRUN
R87
6.2K_1%
R0402
DDC_DATA_HDMI
20K_1% R306
R0402
RX780=6.2K
RS780M=15K
+5VRUN
R86
6.2K_1%
R0402
HPD 13,23
MICRO-STAR INT'L CO.,LTD.
Title
PWRGD
Size Document Number Rev
Custom
5
4
3
Date: Sheet of
2
MS-13331
41 55 Wednesday, August 22, 2007
1
0A
5
D D
4
3
2
1
OptionA
BY EC 0628
+3VRUN +5VRUN PWR_SRC +5VRUN
OptionB
C C
EC D/A
FAN_DA 39
C126
B B
X
0.1U10X
C0402
U9
LM321
SOT23_5_NPC30X
1
3
C127 47P50N C0402
R74 100K R0402
R73
100K
R0402
+
-
4
2 5
FANPWM0
VCCFAN1
EC PWM
FAN_PWM 39
G
R75
X
100K
R0402
D S
Q7
X
N-2N7002
SOT23SGD_T
3
C135
10U6.3X
C0603
65241
Q8
N-Si3456DV
TSOP_6
VCCFAN1
C132
0.1U10X
C0402
C531
0.1U10X
C0402
R305
10K
R0402
FAN_TACH0 39
J67
BH1X3#_white-1.25pitch
53398_03
N32-1030130-H06
1
2
3
4
5
FAN
A A
Title
MICRO-STAR INT'L CO.,LTD.
FAN
Size Document Number Rev
A
5
4
3
Date: Sheet
MS-13331
2
42 55 Wednesday, August 22, 2007
of
1
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
4
3
2
1
2
EN1
VBST1
DRVH1
DRVL1
LL1
+5VALW
PU4
TPS51120RHBR
QFN_L32_5X5
I32-511200C-T07
SKIPSEL
32
TONSEL
31
30
29
28
27
26
25
PC76
1U16Y
C0603
PC63
10U10Y
C0805_67
PR61
4.7R
R0603
PC77
PC61
1U16Y
2.2U16Y
C0603
C0805_67
PC148
0.1U50Y
C0603
PQ43
AO4932
JNC32
NC_0402_6
SOIC8
2
3
4
PC70
0.1U50Y
C0603
LL1
+3VSUS
PR57
100K
R0402
8 1
7
6
5
PC145
2200P50X
C0402
PL9
CH-4.7U_10A
CHO_256X98
PWR_SRC
1 2
+
PC150
15U25V-SOD
C_D_7343
TONSEL
SKIPSEL
Current limit at 7A for 5V
Imax at 4A
+5VSUS
G3 JUMPER_40X160MIL
PQ17
AO4468
SOIC8
+5VRUN
2 1
4
PC83
0.1U10X
C0402
VREF2
PR132
X
0R
R0402
PC87
1U16Y
C0603
1 2
+
PC86
220U6.3V-SOD
C_D_7343
RUND
PC134
1000P50X
C0402
876
2
351
PWR_SRC
PR146
4.7R
Place these CAPs
close to FETs
D D
Current limit at 7A for 3.3V
Imax at 4A
+3VSUS
C C
RUND
+3VRUN
B B
G2 JUMPER_40X160MIL
876
4
2
351
PC85
220U6.3V-SOD
C_D_7343
PQ18
AO4468
SOIC8
2 1
1 2
+
PC84
0.1U10X
C0402
PL10
CH-4.7U_10A
CHO_256X98
J33 nc_93519
PC147
0.1U50Y
C0603
8 1
7
6
5
PC144
2200P50X
C0402
PQ44
AO4932
SOIC8
PC71
0.1U50Y
C0603
2
3
4
PR62
4.7R
R0603
JNC31
NC_0402_6
max voltage 5.5
SUS_ON 39
R0603
VINVIN
PC143
1U25Y
C0805_67
VO2
9
EN5
10
EN3
11
PGOOD2
12
EN2
13
VBST2
14
PR59
240K
R0402
PR60
2K_1%
R0402
DRVH2
15
LL2
16
DRVL2
33
GNDA
PGND2
18
17
PR66
14.3K_1%
R0402
+3VALW
PC75
10U6.3X
C0603
PC66
0.1U10X
C0402
LL2
678
VFB2
COMP2
VREG3
CS2
19
1
VREF2
54321
GND
VFB1
VREF2
VIN
VREG5
V5FILT
VIN
PD8
3
RB717F
SOT323
VO1
COMP1
SKIPSEL
TONSEL
PGOOD1
PGND1
CS1
2423222120
PR68
14.3K_1%
R0402
PR67
4.7R
R0402
JNC43
NC_0402_6
PR53
120R
R0805_67
PQ14
N-2N7002
SOT23SGD_T
PWR_SRC +3VRUN PWR_SRC +5VRUN
PR52
100K_1/10
R0603
D S
G
PQ15
N-2N7002
SOT23SGD_T
2
PR51
X
470K
R0603
RUND
RUND 34,44,46,47
PC56
0.1U25Y
C0402
Title
SYSTEM POWER 3/5V 2.5VSUS
Size Document Number Rev
Custom
MS-13331
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
1
43 55 Wednesday, August 22, 2007
0A
+1.2VSUS +3VSUS PWR_SRC
PR112
100K
PR55
100K
R0402
SUS_ON#
A A
SUS_ON 39
D S
G
PQ39
N-2N7002
SOT23SGD_T
PR54
100K
R0402
5
PR127
120R
R0805_67
D S
G
PQ38
N-2N7002
SOT23SGD_T
PR56
X
120R
R0805_67
D S
D S
G
PQ16
X
N-2N7002
SOT23SGD_T
4
RUN_ON 39,48
G
PQ36
N-2N7002
SOT23SGD_T
3
R0402
RUN_ON#
PR111
100K
R0402
PR50
120R
R0805_67
D S
G
PQ35
N-2N7002
SOT23SGD_T
D S
G
5
4
3
2
1
PC161
1U16Y
C0603
PC151
1000P50X
C0402
D D
1.2VSUS_PWRGD 48
C C
B B
1
VOUT
2
VCCA
4
PGD
17
TPAD
PU12
MLPQ_16P
I32-SC4110C-S04
1.2V_SC411_VCCA
PR148
1M
R0402
14
15
16
NC
TON
EN/PSV
SC411
PGNDFBVSSA
NC
736
5
+1.2VRUN_PG
+5VSUS
PR152
10R
R0603
PWR_SRC
PD10
A C
S-RB751V-40
DIODE_SOD323
G
13
BST
DH
LX
ILIM
VDDP
DL
8
PC155
0.1U50Y
C0603
12
11
PR150 7.15K_1% R0402
10
9
Rds 6m
PC162
1U16Y
C0603
S
PQ45
AOL1426
ULTRA_SO8
G
S
PQ46
AOL1412
ULTRA_SO8
PC152
0.1U50Y
D
C0603
D
PR151
X
2.2R_1%
R0603
PC160
X
2200P50X
C0402
FOR EMI
+1.2VSUS
PC81
220P25N
C0402
DRV
ADJ
PGD
PR70
X
100R
R0402
6
5
4
PC89
0.1U10X
C0402
+5VSUS
PR78
10K
R0402
1
IN
2
GND
3
EN
PU7
SC339
SOT26
I33-SC33909-S04
PC90
0.1U10X
C0402
X
PC153
2200P50X
C0402
8
7
6
5
1 2
+
PL11
1.5u33A
CHK_2P_8_5
PQ19
FDS6676AS
SOIC8
4
PC157
15U25V-SOD
C_D_7343
PR149
14.3K_1%
R0402
PR147
10K_1%
R0402
3
2
1
PR75
100K
R0402
X
100P16N
C0402
+3VRUN
PC154
PC82
10U25X
C1210MS
Current limit at 10A for 1.2V
Imax at 7A
1 2
PC91
0.1U10X
C0402
VCCNB_PG 25,48
PC159
+
330U2.5V-SOD
C_D_7343
PR79
11.8K_1%
R0402
PR80
10K_1%
R0402
PC156
2200P50X
C0402
G4 JUMPER_40X160MIL
VCC_NB
RX780 VCCNB=1.2V
+1.2VSUS
REMOVE VER A21
+1.2VSUS
G7 JUMPER_40X160MIL
PC158
0.1U10X
C0402
1.1V
+1.1VRUN
2 1
PR77
X
0.01R_1%
R_3720W
1.2V_RUND
+1.2VRUN
2 1
4
RS780 VCCNB=1.1V
NB_VDD_MUX=>+1.1VRUN
876
2
351
RX780-004 ERRATA VCCNB=1.2V
PQ21
FDS6676AS
SOIC8
1.2V_RUND
VCC_NB
876
PQ23
FDS6676AS
SOIC8
4
2
351
PR84
POK
EN
10R
R0603
6
5
VIN
VCNTL
9
VIN
4
VOUT
3
VOUT
2
FB
GND
PR87
18K 1%
1
R0402
1 2
4
1_5_VCC
PC92
+3VRUN
+1.2VRUN +3VSUS
PR88
PR83
A A
1K
R0402
100K
R0402
B
PQ26
MMBT3904
E C
SOT23EBC_T
PR76
100K
R0402
+1.2VRUN_PG
D S
PQ25
N-2N7002
G
SOT23SGD_T
5
4.7U10Y
C0805_67
1_5_VCC
PU8
APL5915
SOP8P_APL5912
I31-0591502-A30
7
8
PR86
15.8K_1%
R0402
1 2
+5VRUN
PC94
4.7U6.3X
C0603
PC93
10N16X
C0402
+1.8VRUN
PC95
100U6.3Y
C1210MS
+1_5VRUN
VGA1.8VPG 45
3
RUND 34,43,46,47
+1.8VRUN +5VSUS
PR81
1K
R0603
B
PR74
100K
R0402
PQ22
SMBT3904
SOT23EBC_T
E C
PR73
1M
R0603
D S
Q22
N-2N7002
G
SOT23SGD_T
1.2V_RUND
X
2.2U16Y
C0805_67
Harry 10/02
3.3V>1.8V>1.2V>1.1V=VCC_NB
2
PC88
Title
VCC_NB 1.2VSUS 1.5/1.2/1.1VRUN
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
of
44 55 Wednesday, August 22, 2007
0A
3
hexainf@hotmail.com
GRATIS - FOR FREE
RX780
VGA1.8VPG 44
PWR_SRC
C C
Current limit at 6A for 1.8V
Imax at 4A
PC169
0.1U10X
C0402
PL13
2.2uH_4.3A
IND_SLF7045T
FOR EMI
1.8VGA
B B
2 1
PC170
220U2.5V-SOD
C_D_7343
1 2
+
G9
JUMPER_40X160MIL
PC106
0.1U50Y
C0603
PR103
X
2.2R_1%
R0603
PC108
X
2200P50X
C0402
C0402
2200P50X
PC107
PQ30
AO4932
SOIC8
8 1
7
6
5
PC102
0.1U50Y
C0603
2
3
4
VGA_PG
M82S_VDDC>1.8VRUN>1.2VRUN>1.1VRUN
+5VRUN
PD9
3
RB717F
SOT323
2
1
PR98
10K_1%
R0402
22
19421
20
DH2
ILIM2
PGD1
MLPQ_24_4X4MM
I32-SC4150C-S04
VOUT2
FB2
12
PGD2
PU9
RTN
TON
9
10
18
LX2
17
BST2
16
VDD2
15
DL2
14 5
EN2 EN1
13
SS2
PC103
10N16X
C0402
PC104
1U16Y
C0603
23
ILIM1
FB1
PR93
7.15K_1%
R0402
24
DH1
LX1
BST1
VDD1
DL1
SS1
GNDA
VOUT1
7118
2
VGA_PG
SC415
1
2
3
6
25
PR95
100K
R0402
PC97
10N16X
C0402
PC96
0.1U50Y
C0603
PC98
X
0.1U10X
C0402
+3VRUN
4
4
PQ48
FDS6676AS
SOIC8
PR91
1K
R0402
PWR_SRC
876
2
351
876
2
351
+5VRUN
PQ47
AO4468
SOIC8
PC166
0.1U50Y
C0603
PL12
1.5u33A
CHK_2P_8_5
PR153
X
2.2R_1%
R0603
PC165
X
2200P50X
C0402
FOR EMI
PC167
2200P50X
C0402
1 2
PC168
+
15U25V-SOD
C_D_7343
1 2
+
+1_2V_P
PC163
330U2.5V-SOD
C_D_7343
PC171
10U25X
C1210MS
Current limit at 13A for M82S
Imax at 15A
PC164
0.1U10X
C0402
1
M82S_VDD_CORE
2 1
G8
JUMPER_40X160MIL
PR99 14.3K_1% R0402
PR92
PC101
X
100P16N
C0402
PR100
10K_1%
R0402
J35 nc_93519
PR97
1M
R0402
PWR_SRC
PC100
1000P50X
C0402
M82S_VDD_CORE=
A A
Need to add a NOT Gate or change GPIO state
14.3K_1%
R0402
PR90
11.8K_1%
R0402
0.75(PR48+PR50+PR51)
PR50+PR51
PR94 7.15K_1% R0402
PC99
X
100P16N
C0402
PQ29
N-2N7002
D S
SOT23SGD_T
G
PC105
0.1U10X
C0402
PR102
10K
R0402
X
PR101
100K
R0402
+3VRUN
JNC39 NC_0402_6
R239 0R R0402
X
Control H = 1.1V
L = 0.95V
GPIO20_PSW_0 23
GPIO20_PSW_1 23
0 ==> 1.1V
1 ==> 0.95V
UVD STATE ==>1.1V
AC/DC STATE ==>0.95V
Title
VGA POWER
Size Document Number Rev
Custom
3
2
Date: Sheet
1
MICRO-STAR INT'L CO.,LTD.
MS-13331
0A
of
45 55 Wednesday, August 22, 2007
5
4
3
2
1
+5VSUS
PR106 7.15K_1%
R0402
Rds 6m
PU1
1
VIN
2
GND
3
REFEN
4 5
OUTPUT VCNTL
APL5331
SOP8P_APL5912
I31-0533102-A30
PC2
10U6.3X
C0603
PD1
A C
S-RB751V-40
DIODE_SOD323
PC114
0.1U50Y
C0603
PQ32
FDS6676AS
SOIC8
876
PQ31
4
4
PC117
10U6.3X
C0603
AO4468
SOIC8
2
351
876
2
351
8
VCNTL
7
VCNTL
6
VCNTL
9
GND1
GROUP A VDDIO = VTT > VDDA
PC116
PC115
0.1U50Y
2200P50X
C0603
C0402
PR5
X
2.2R_1%
R0603
PC5
X
2200P50X
C0402
FOR EMI
+5VSUS
PC7
4.7U10Y
C0805_67
G6 JUMPER_40X160MIL
PC118
0.1U10X
C0402
+VDDA
3
CPU_VTT_SUS
2 1
S-RB751V-40
DIODE_SOD323
PR65
1K
R0402
PWR_SRC
1 2
PC109
+
15U25V-SOD
C_D_7343
PL3
1.5u10A
CHK_SIL104R_150_S
PR107
26.7K_1%
R0402
PR108
10K_1%
R0402
A C
PD7
PR63
100K
R0402
PC119
X
100P16N
C0402
VDDA_PG
PC69
2.2U6.3Y
C0603
Current limit at 10A for 1.8V
Imax at 7A
VDDIO 7
PC112
220U2.5V-SOD
C_D_7343
1 2
+
PC111
2200P50X
C0402
RUND 34,43,44,47
M82S_VDDC>1.8VRUN>1.2VRUN>1.1VRUN
+3VSUS
PC80
1U6.3Y
C0402
1
IN
BP
3
SHDN
5 2
OUT GND
PU5
RT9167/A
SOT23_5_NPC30X
VDDA_EN 48
+VDDA
VDDA 2.5V
VDDA_PG 48
VDDA_EN
PC74
10U6.3X
C0603
MICRO-STAR INT'L CO.,LTD.
Title
CPU GROUP A
Size Document Number Rev
B
2
Date: Sheet
MS-13331
CPU_VDDIO_SUS
G5 JUMPER_40X160MIL
PC110
0.1U10X
C0402
4
2 1
4
+1.8VRUN
PC78
10N16X
C0402
1
2
46 55 Wednesday, August 22, 2007
876
351
of
PQ13
_
AO4468
SOIC8
0A
PR104
1M
R0402
13
14
NC
BST
ILIM
VDDP
DL
PGNDFBVSSA
MLPQ_16P
8
736
I32-SC4110C-S04
PR4
10R
R0603
DH
LX
PC10
0.1U10X
C0402
4
12
11
10
9
1_8V_REFEN
PC4
0.1U10X
C0402
PC6
1U16Y
C0603
PC8
1U16Y
C0603
PC113
1000P50X
D D
C0402
X
S5_ON 39
+3VSUS
PR109
100K
VTT_VDDIO_PG 48
C C
B B
S5_ON 39
A A
R0402
J15
N-2N7002DW
SOT_363
PR1
X
100K
R0402
NC_93519
PQ1
5
SC411_VCCA
+5VSUS
PR3
100K
R0402
S1
PC1
0.1U10X
C0402
PR105
1K
R0402
CPU_VDDIO_SUS
D1
G2
S2D2G1
1
2
4
17
PR6 100K R0402
SC411_VCCA
PC3
0.1U10X
C0402
PU10
16
TON
VOUT
VCCA
SC411
PGD
TPAD
NC
5
CPU_VDDIO_SUS
PC9
10U6.3X
C0603
PR2
100K
R0402
15
EN/PSV
5
hexainf@hotmail.com
GRATIS - FOR FREE
PR58
10R
R0603
PC64
2.2U16Y
+5V_CTRL
CPU_SVC 7
CPU_SVD 7
PC131
1U6.3Y
C0402
J31
J68
J34
C0805_67
PC132 0.22U10X
PR129 100K_1%
PR137 0R R0402
VCORE_EN
PR118
0R
R0402
PR126
0R
R0402
+5V_CTRL
PR133 10K
GND_NB
PR142 10R
PC141 1000P50X
NB_SKIP#
NBV_BUF
NC_93519
NC_93519
NC_93519
PR130 162K_1%
PR131 121K_1%
C0402
R0402
PC172 0.1U10X C0402
R0402
R0402
C0402
D D
CPU_VDDIO_SUS
CPU_PWRGD_SVID_REG 7
+3VRUN
PR122
100K
R0402
PR125
10K
R0402
VRD_PROCHOT# 7
5
VDD_EN 48
VRM_PWRGD 48
C C
B B
A A
R0402
R0402
PC58
1000P50X
C0402
GND_NB
VCORE_EN
VRM_PWRGD
PR128
40.2k_1%
R0402
GND_NB
GND_NB
18
14
36
37
33
32
10
15
19
41
PU11
VCC
6
OSC
7
TIME
4
REF
5
ILIM
VDDIO
8
SVC
9
SVD
PGD_IN
3
SHDN
OPTION
PRO
1
PWRGD
VR_HOT
THRM
GNDS_NB
NB_SKIP
2
NBV_BUF
GNDA
MAX17009
QFN40_TSMDQ142
I32-170090C-M27
CPU_VDD1_RUN_FB_L 7
CPU_VDD0_RUN_FB_L 7
CPU_VDD1_RUN_FB_H 7
CPU_VDD0_RUN_FB_H 7
PC43 1U16Y
C0603
PC40 1000P50X
C0402
PR40 100K_1%
R0402
NB_SKIP#
NBV_BUF
PC41 100P50N
C0402
PR48 0R R0402
PR44 0R R0402
J30
NC_93519
28
VDD1
4
PC60
1U16Y
C0603
23
29
BST1
PC133
0.22U16X
VDD2
C0603
31
DH1
30
LX1
27
DL1
26
GND1
34
CSP1
35
SCN1
PC126 1000P50XC0402
16
CSN2
17
CSP2
PC142 1000P50XC0402
22
BST2
PC135
0.22U16X
20
C0603
DH2
21
LX2
24
DL2
25
GDN2
38
FBAC1
PR1191.2K_1% R0402
39
FBDC1
PC125 1000P50XC0402
13
FBAC2
PR1341.2K_1% R0402
12
FBDC2
40
GNDS1
11
GNDS2
PU3
13 2
VCC VDD
11
REF
PR41
100K_1%
9
R0402
ILIM
12
SKIP
10
REFIN
GND_NB
15
GND
1
EN
14
PGOOD
MAX8792
TDFN14
I32-087920C-M27
4
+5VRUN
PC62
1U16Y
C0603
PR124 1.5K_1% R0402
PR135 1.5K_1% R0402
PC137 1000P50XC0402
PR123 100RR0402
PC130 4700P25XC0402
PR136 100R R0402
PC136 4700P25XC0402
+5VRUN
7
TON
6
BST
5
DH
4
LX
3
DL
8
FB
CPU_VDDNB_RUN_FB_H 7
PR116 100R R0402
PC128 4700P25XC0402
PR141 100R R0402
PC139 4700P25XC0402
PR140
PR117
10R
10R
R0402
R0402
PC48 1U16Y
C0603
PR49 100K_1%R0402
PC47 0.22U16X C0603
2
3
4
PQ40
FDS6676AS
SOIC8
PR143 10R
PR115 10R
8 1
7
6
5
PQ12
AO4932
SOIC8
3
4
PQ37
FDS6676AS
SOIC8
4
R0402
R0402
3
G
S
PC121
0.1U50Y
C0603
G
S
876
4
2
351
D
PQ42
AOL1426
ULTRA_SO8
876
4
2
351
CPU_VDD1_RUN
CPU_VDD0_RUN
PR42
10K_1%
R0402
PR45
1K_1%
R0402
PC45
0.22U16X
C0603
PWR_SRC_SYS
D
PQ33
AOL1426
ULTRA_SO8
2
PQ34
FDS6676AS
SOIC8
PWR_SRC_SYS
2
PC122
2200P50X
C0402
PL4
2.2uH_4.3A
IND_SLF7045T
876
351
876
PQ41
FDS6676AS
SOIC8
351
PC124
0.1U50Y
C0603
PWR_SRC
1 2
+
PR46
10R
R0402
PC146
0.1U50Y
C0603
PC120
15U25V-SOD
C_D_7343
X
2.2R_1%
R0603
X
2200P50X
C0402
PC52
2200P50X
C0402
PC50
2200P50X
C0402
PR110
PC123
PC149
2200P50X
C0402
VLDT_EN 48
PC49
0.1U10X
C0402
PR120
X
1K_1%
R0402
PC127
X
220P25N
C0402
PC140
X
220P25N
C0402
PR139
X
1K_1%
R0402
PR64
X
2.2R_1%
R0603
PC67
X
2200P50X
C0402
RUND 34,43,44,46
+
2
1 2
+
PC54
15U25V-SOD
C_D_7343
PR121
2.37K_1%
R0402
PR138
2.37K_1%
R0402
1 2
PC51
220U2.5V-SOD
C_D_7343
2
PC129
0.22U16X
C0603
PR71
100K
R0402
PC72
15U25V-SOD
C_D_7343
1 2
PR113
10K_NTC_1%
R0603
PR145
10K_NTC_1%
R0603
1 2
PU6
N-2N7002DW
SOT_363
CPU_VDDNB_RUN
2 1
1 2
PR69
1M
R0402
1 2
+
PL7 0.36u_30A CHK_2P_8_5
PR114
4.02K_1%
R0402
PC138
0.22U16X
C0603
PR144
4.02K_1%
R0402
PL8
0.36u_30A
CHK_2P_8_5
+5VSUS
PR72
100K
R0402
D1
G2
S2D2G1
S1
G1 JUMPER_40X160MIL
+
PC55
15U25V-SOD
C_D_7343
+
1
PL6
80L03_6000m
PWR_SRC
L0805_67
2 1
CPU_VDD0_RUN
1 2
1 2
+
+
PC53
330U2.5V-SOD
C_D_7343
1 2
1 2
+
PC65
330U2.5V-SOD
C_D_7343
+1.2VRUN
PQ20
AO4468
SOIC8
8
7
6
5
+VLDT
PR89
1K
R0402
Title
Size Document Number Rev
Custom
Date: Sheet
1 2
+
PC57
PC59
330U2.5V-SOD
330U2.5V-SOD
C_D_7343
C_D_7343
1 2
+
PC68
B
3
2
1
+3VSUS
PR85
100K
R0402
PQ27
MMBT3904
SOT23EBC_T
E C
PC73
330U2.5V-SOD
C_D_7343
+VLDT
G
330U2.5V-SOD
C_D_7343
4
CPU GROUB B
MS-13331
CPU_VDD1_RUN
PC79
10U6.3X
C0603
+3VRUN
PR82
100K
R0402
D S
PQ24
N-2N7002
SOT23SGD_T
MICRO-STAR INT'L CO.,LTD.
1
VLDT_PG 48
47 55 Wednesday, August 22, 2007
0A
of
5
4
3
2
1
+3VSUS
R149
100K
D D
1.2VSUS_PWRGD 44
C265
0.68U10X
C0603
C C
B B
VLDT_PG 47
VCCNB_PG 25,44
R0402
A C
X
BAS40WS
DIODE_SOD323
+3VSUS +3VSUS
X
0.1U10X
C0402
1 6
U14A
X
2 5
NC7WZ14-SC70
SC70_6
A C
D12
X
BAS40WS
DIODE_SOD323
RX780
D13
+3VSUS +3VSUS
R181
4.7K
R0402
D S
Q25
G
N-2N7002
SOT23SGD_T
D S
Q27
G
N-2N7002
SOT23SGD_T
C257
3 4
2 5
JNC34 NC_0402_6
T_CRIT_CPU# 7
T_CRIT_M82# 23
R189
100K
R0402
D S
Q26
N-2N7002
G
SOT23SGD_T
U14B
X
NC7WZ14-SC70
SC70_6
Rising
time must
< 50ms
SB_PWRGD 18
C301
0.33U16Y
C0603
SUSPWROK 39
SB_PWRGD
VTT_VDDIO_PG 46
SLP_S3# 18,39
VDDA_PG 46
VTT_VDDIO_PG 46
VRM_PWRGD 47
RUN_ON 39,43
R165 0R R0402
NC
1
A
2
GND
3
U15
LVC1G17DBVR
SOT23_5_NPC30X
VCC
Y
+3VSUS
1
2
9
10
4
5
5
4
C198
0.1U10X
C0402
3
7 14
8
6
JNC35 NC_0402_6
WD_PWRGD 18
U13A
LCX08MTC_NL
TSSOP_14
U13C
12
LCX08MTC_NL
TSSOP_14
13
U13B
LCX08MTC_NL
TSSOP_14
+1.8VRUN +1.8VRUN
R160 0R R0402
X
NB_PG=SB_PG
R167
4.7K
R0402
U13D
LCX08MTC_NL
TSSOP_14
11
VDDA_EN 46
VDD_EN 47
VLDT_EN 47
NB_PWRGD 13
A A
MICRO-STAR INT'L CO.,LTD.
Title
PWRGD
Size Document Number Rev
B
5
4
3
2
Date: Sheet
MS-13331
48 55 Wednesday, August 22, 2007
1
of
0A
5
hexainf@hotmail.com
GRATIS - FOR FREE
PL1
80L03_6000m
L0805_67
EC170
X
0.1U50Y
C0603
2 1
PL2
80L03_6000m
L0805_67
2 1
EC31
X
2200P50X
C0402
EC30
X
0.1U50Y
C0603
D D
AC-JACK
PJ1
PWR-JACK3P_black-5.2mm
DCJACK_5
N92-03M0131-A10
1
2
3
4
5
B
E
PQ6
P-DTA114EKA
SOT23EBC_T
C
4
+DC_IN
PC16
0.47U25X
C0805_67
PR15
240K
R0402
PQ7
P-AO4433
SOIC8
1
2
3
3
DC_IN+
8
7
6
5
PC19
0.1U50Y
4
C0603
PR17
47K
R0402
PC17
10U25X
C1210MS
BATCLK_M 39
BATDATA_M 39
M_BATIN# 39
PR8
100K
R0402
PC12
0.1U10X
C0402
+3VALW
UDZ3.3B
DIODE_SOD323
PD2
2
1
BAT-CONN.
CON5
1
10
2
10
3
4
5
9
9
6
1: B-
PWR-6P_black-2pitch-RH
BAT_2MM_B21_103_T
N93-06M0141-A10
PR9 100R R0402
PR7 100R R0402
+VBATA
PC13
PD3
UDZ3.3B
DIODE_SOD323
A C
A C
10P50N
C0402
PC11
10P50N
C0402
1
2
3
4
5
6
PC14
0.1U50Y
C0603
2: SMCLK
3: SMDATA
4: BT Thermal
D S
PQ8
N-2N7002
PR19
100K
R0402
G
SOT23SGD_T
+3VALW
PR12
100K
R0402
AC_OK
D1
PQ3
N-2N7002DW
SOT_363
G2
S2D2G1
AC_OK# 39,50
S1
SDC_IN+
PR10
10K
R0402
PQ5A
P-AO4805
SOIC8
1 7
8
2
PR11
100K
R0402
C C
AC_CTL 39
5: VBATA
6: VBATA
PWR_SRC
B B
V_CHG
PR14 10K R0402
PR18
10K
R0402
ENCHG 39,50
A A
5
D S
PQ4
N-2N7002
G
SOT23SGD_T
PQ5B
P-AO4805
SOIC8
3 5
6
4
PC15 0.1U50Y C0603
PR13 100K R0402
CHG_BATT_N
4
1 7
2
PQ2A
P-AO4805
SOIC8
8
+VBATA
3
2
PD4
ES3BB_DO214AA
DIODE_SMB
A C
PQ2B
P-AO4805
SOIC8
3 5
6
4
PR16
470K
R0402
Title
Battery Select
Size Document Number Rev
Custom
Date: Sheet
MS-13331
PWR_SRC
MICRO-STAR INT'L CO.,LTD.
of
49 55 Wednesday, August 22, 2007
1
0A
5
4
3
2
1
Adapter= 65 W
Adapter input voltage set 19 Voltage
D D
ENCHG_1P 39
PRE_CHG 39
C C
ENCHG 39,49
4S1P: Charge current set 1.5 Amp
4S2P: Charge current set 3.0 Amp
Pre-charger: Charge current set
220mA
B B
PQ9
N-2N7002DW
SOT_363
S1
G1
S2
G2
PQ10
N-2N7002DW
SOT_363
S1
G1
S2
G2
DC_IN+
D1
D2
D1
D2
PC26
2200P50X
For
C0402
EMI
PR28 18K 1% R0402
PR30 1.4K_1% R0402
PR35 100K R0402
MAX8724_ICTL
+3VALW
AC_OK# 39,49
PC22
0.1U50Y
C0603
MAX8724_ICTL
+5VALW
PR27
100K
R0402
PC18
10U25X
C1210MS
PR26
53.6K_1%
R0603
A C
PD5
S-RB751V-40
DIODE_SOD323
PC27
1U25Y
C0805_67
MAX8724_ACIN
MAX8724_LDO
PR36
52.3K_1%
R0402
PR34
28.7K_1%
R0402
PR21
1K_1%
R0402
PC21
0.1U10X
C0402
PR25 7.15K_1% R0402
PR31
768_1%
R0402
MAX8724_LDO
MAX8724_REFIN
MAX8724_ICTL
PR33
1.1K_1%
R0402
MAX8724_ACIN
MAX8724_LDO
PR23 100K R0402
MAX8724_CCV
MAX8724_CCI
MAX8724_CCS
PC24
PC25
10N16X
10N16X
C0402
C0402
PC28
0.1U50Y
C0603
PU2
1
DCIN
15
VCTL
12
REFIN
13
ICTL
10
ACIN
8
SHDN
11
ACOK
9
ICHG
28
IINP
7
CCV
6
CCI
5
CCS
MAX8724_REF
PC20
1U16Y
C0603
27
CSSP
PR24
10R
R0603
PR29
0.01R_1%
R_3720W
REF
4
PR22
28.7K_1%
R0402
SDC_IN+
PR32
10R
R0603
26
CSSN
CELLS
LDO
BST
DLOV
DHI
LX
DLO
PGND
CSIP
CSIN
BATT
GND
GND
CLS
MAX8724ETI
3
QFN28L_5X5
I32-087240C-M27
CELL GND=2 CELLS
FLOAT=3 CELLS
REFIN=4 CELLS
PC29
0.1U50Y
C0603
MAX8724_REFIN
17
2
24
22
25
23
21
20
19
18
16
14
29
MAX8724_LDO
MAX8724_LDO
PD6
S-RB751V-40
DIODE_SOD323
PC31 0.1U50Y
CSIP
CSIN
JT1 NC_93519
PR37
33R
R0402
A C
C0603
PC23
1U16Y
C0603
PC34
0.1U50Y
C0603
PC33
0.1U10X
C0402
PR39 10R_1% R0603
PR38 10R_1% R0603
PC35
0.1U50Y
C0603
2
3
4
PQ11
AO4932
SOIC8
SDC_IN+
PC30
0.1U50Y
C0603
PC42
10U25X
C1210MS
PR43
0.015R_1%
R_3720W
PC37
10U25X
C1210MS
PC32
0.1U50Y
C0603
PC36
10U25X
C1210MS
PC38
10U25X
C1210MS
V_CHG
PC39
10U25X
C1210MS
PC46
2200P50X
C0402
8 1
7
6
5
PL5
15u_104R
CHK_SIL104R_150_S
PR47
X
2.2R_1%
R0603
PC44
X
2200P50X
C0402
PR20
19.1K_1%
ENCHG-1P
PRE_CHG
0
A A
0
1
X
5
ENCHG
1
0
0
X
1
Pre-charge
4S2P-Fast charge 1
4S1P-Fast charge
1
STOP CHARGE
0
4
R0402
Title
M_Battery Charger
Size Document Number Rev
Custom
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-13331
1
0A
of
50 55 Wednesday, August 22, 2007
J36
hexainf@hotmail.com
GRATIS - FOR FREE
L3_4mil_60_Ohm L3_8mil_40 Ohm
X_PIN1*2
5
J63
L4_4mil_60_Ohm
X_PIN1*2
Normal Signal 60 Ohm
J37
D D
L3_5mil_50 Ohm
X_PIN1*2
J50
L4_5mil_50 Ohm
X_PIN1*2
RGB Signal 50 Ohm
4
J1
X_PIN1*2
VRAM Signal 40 Ohm
J5
L3_10mil_35 Ohm L4_10mil_35 Ohm
X_PIN1*2
USB_RCOMP Signal 35 Ohm
3
J18
L4_8mil_40 Ohm
X_PIN1*2
J23
X_PIN1*2
2
J10
X_PIN1*2
J11
L3_DIFF_6/7/6_80 Ohm-
X_PIN1*2
J46
L1_DIFF_5.5/5.5/5.5_80 Ohm+
J26
L4_DIFF_6/7/6_80 Ohm+ L3_DIFF_6/7/6_80 Ohm+
X_PIN1*2
J27
L4_DIFF_6/7/6_80 Ohm-
X_PIN1*2
J59
L6_DIFF_5.5/5.5/5.5_80 Ohm+
1
X_PIN1*2
J60
L6_DIFF_5.5/5.5/5.5_80 Ohm-
X_PIN1*2
J12
L3_DIFF_4/8/4_100 Ohm+
J24
L4_DIFF_4/8/4_100 Ohm+
J7
L3_DIFF_5/7.5/5_90 Ohm+
J16
L4_DIFF_5/7.5/5_90 Ohm+
X_PIN1*2
J47
L1_DIFF_5.5/5.5/5.5_80 Ohm-
X_PIN1*2
Differential Pair 80 Ohm
X_PIN1*2
J13
C C
L3_DIFF_4/8/4_100 Ohm- L4_DIFF_4/8/4_100 Ohm-
X_PIN1*2
J38
L1_DIFF_4/7/4_100 Ohm+
X_PIN1*2
J39
L1_DIFF_4/7/4_100 Ohm-
X_PIN1*2
X_PIN1*2
J25
X_PIN1*2
J51
L6_DIFF_4/7/4_100 Ohm+
X_PIN1*2
J52
L6_DIFF_4/7/4_100 Ohm-
X_PIN1*2
Differential Pair 100 Ohm
B B
J14
L3_DIFF_4.5/7.5/4.5_93 Ohm+
X_PIN1*2
J6
L3_DIFF_4.5/7.5/4.5_93 Ohm-
X_PIN1*2
J44
L1_DIFF_4.5/7/4.5_93 Ohm+
X_PIN1*2
A A
J43
L1_DIFF_4.5/7/4.5_93 Ohm-
J19
L4_DIFF_4.5/7.5/4.5_93 Ohm+
X_PIN1*2
J20
L4_DIFF_4.5/7.5/4.5_93 Ohm-
X_PIN1*2
J53
L6_DIFF_4.5/7/4.5_93 Ohm+
X_PIN1*2
J54
L6_DIFF_4.5/7/4.5_93 Ohm-
X_PIN1*2
J8
L3_DIFF_5/7.5/5_90 Ohm-
X_PIN1*2
J45
L1_DIFF_4.5/6.5/4.5_90 Ohm+
X_PIN1*2
J40
L1_DIFF_4.5/6.5/4.5_90 Ohm-
X_PIN1*2
Differential Pair 90 Ohm
J9
X_PIN1*2
J2
L3_DIFF_5.5/7/5.5_85 Ohm-
X_PIN1*2
J41
L1_DIFF_5/6/5_85 Ohm+
X_PIN1*2
J42
L1_DIFF_5/6/5_85 Ohm-
X_PIN1*2
J17
L4_DIFF_5/7.5/5_90 Ohm-
X_PIN1*2
J55
L6_DIFF_4.5/6.5/4.5_90 Ohm+
X_PIN1*2
J56
L6_DIFF_4.5/6.5/4.5_90 Ohm-
X_PIN1*2
J21
L4_DIFF_5.5/7/5.5_85 Ohm+ L3_DIFF_5.5/7/5.5_85 Ohm+
X_PIN1*2
J22
L4_DIFF_5.5/7/5.5_85 Ohm-
X_PIN1*2
J57
L6_DIFF_5/6/5_85 Ohm+
X_PIN1*2
J58
L6_DIFF_5/6/5_85 Ohm-
J3
L3_DIFF_7.5/6.5/7.5_72 Ohm+
X_PIN1*2
J4
L3_DIFF_7.5/6.5/7.5_72 Ohm-
X_PIN1*2
J48
L1_DIFF_7/5.5/7_72 Ohm+
X_PIN1*2
J49
L1_DIFF_7/5.5/7_72 Ohm-
X_PIN1*2
Differential Pair 72 Ohm
J28
L4_DIFF_7.5/6.5/7.5_72 Ohm+
X_PIN1*2
J29
L4_DIFF_7.5/6.5/7.5_72 Ohm-
X_PIN1*2
J61
L6_DIFF_7/5.5/7_720 Ohm+
X_PIN1*2
J62
L6_DIFF_7/5.5/7_72 Ohm-
X_PIN1*2
MICRO-STAR INT'L CO.,LTD.
X_PIN1*2
Differential Pair 93 Ohm
X_PIN1*2
5
X_PIN1*2
X_PIN1*2
Differential Pair 85 Ohm
4
3
2
Title
IMPEDANCE
Size Document Number Rev
B
Date: Sheet
MS-13331
51 55 Wednesday, August 22, 2007
1
of
0A
5
CPU_VDDIO_SUS
D D
+5VSUS
+1.8VRUN
C C
+VLDT
+1.2VRUN
B B
+3VRUN
A A
between the memorry
slot to CPU
EC6 0.1U10XC0402
EC187 0.1U10XC0402
EC180 0.1U10XC0402
EC196 0.1U10XC0402
EC199 0.1U10XC0402
EC166 0.1U10XC0402
EC11 0.1U10XC0402
EC165 0.1U10XC0402
EC176 0.1U10XC0402
EC169 0.1U10XC0402
EC195 0.1U10XC0402
EC174 0.1U10XC0402
EC188 0.1U10XC0402
EC48 0.1U10XC0402
EC161 0.1U10XC0402
EC101 0.1U10XC0402
EC160 0.1U10XC0402
EC265 0.1U10XC0402
EC266 0.1U10XC0402
EC267 0.1U10XC0402
EC268 0.1U10XC0402
EC269 0.1U10XC0402
EC79 0.1U10XC0402
EC73 0.1U10XC0402
EC80 0.1U10XC0402
EC71 0.1U10XC0402
EC102 0.1U10XC0402
EC97 0.1U10XC0402
EC116 0.1U10XC0402
EC88 0.1U10XC0402
EC278 0.1U10XC0402
EC280 0.1U10XC0402
EC283 0.1U10XC0402
EC286 0.1U10XC0402
EC4 0.1U10XC0402
EC57 0.1U10XC0402
EC91 0.1U10XC0402
EC93 0.1U10XC0402
EC82 0.1U10XC0402
EC83 0.1U10XC0402
EC104 0.1U10XC0402
EC227 0.1U10XC0402
EC237 0.1U10XC0402
EC115 0.1U10XC0402
EC87 0.1U10XC0402
EC123 0.1U10XC0402
EC113 0.1U10XC0402
EC112 0.1U10XC0402
EC122 0.1U10XC0402
EC84 0.1U10XC0402
EC162 0.1U10XC0402
EC37 0.1U10XC0402
EC19 0.1U10XC0402
EC67 0.1U10XC0402
EC111 0.1U10XC0402
EC114 0.1U10XC0402
CPU_VDDIO_SUS
CPU_VTT_SUS
AGND AGND_DSP
DC_IN+
PWR_SRC
5
memorry slot under to
motherboard
EC194 0.1U10XC0402
EC182 0.1U10XC0402
EC198 0.1U10XC0402
EC178 0.1U10XC0402
EC202 0.1U10XC0402
EC204 0.1U10XC0402
EC197 0.1U10XC0402
EC175 0.1U10XC0402
EC181 0.1U10XC0402
EC192 0.1U10XC0402
EC177 0.1U10XC0402
EC205 0.1U10XC0402
EC164 0.1U10XC0402
EC190 0.1U10XC0402
EC179 0.1U10XC0402
EC189 0.1U10XC0402
EC168 0.1U10XC0402
EC167 0.1U10XC0402
EC185 0.1U10XC0402
EC184 0.1U10XC0402
EC186 0.1U10XC0402
EC183 0.1U10XC0402
EC193 0.1U10XC0402
EC203 0.1U10XC0402
EC200 0.1U10XC0402
EC66 0.1U10XC0402
EC68 0.1U10XC0402
EC36 0.1U10XC0402
EC27 0.1U10XC0402
EC26 0.1U10XC0402
EC38 0.1U10XC0402
EC18 0.1U10XC0402
EC33 0.1U10XC0402
EC29 0.1U10XC0402
EC16 0.1U10XC0402
EC24 0.1U10XC0402
EC23 0.1U10XC0402
EC7 0.1U10XC0402
EC15 0.1U10XC0402
EC25 0.1U10XC0402
EC35 0.1U10XC0402
EC17 0.1U10XC0402
EC28 0.1U10XC0402
EC34 0.1U10XC0402
EC337 0.1U10XC0402
EC338 0.1U10XC0402
EC339 0.1U10XC0402
EC340 0.1U10XC0402
EC341 0.1U10XC0402
EC342 0.1U10XC0402
EC121 0.1U10XC0402
EC281 0.1U10XC0402
EC284 0.1U10XC0402
EC287 0.1U10XC0402
EC288 0.1U10XC0402
EC289 0.1U10XC0402
EC124 0.1U10XC0402
EC236 0.1U10XC0402
EC125 0.1U10XC0402
EC302 0.1U10XC0402
EC305 0.1U10XC0402
EC41 0.1U25YC0402
EC39 0.1U25YC0402
EC42 0.1U25YC0402
EC32 0.1U25YC0402
EC53 0.1U25YC0402
EC1 0.1U25YC0402
EC56 0.1U25YC0402
EC62 0.1U25YC0402
4
+3VRUN PWR_SRC
EC251 0.1U25YC0402
EC252 0.1U25YC0402
CPU_VDD0_RUN
EC256 0.1U10XC0402
EC258 0.1U10XC0402
EC260 0.1U10XC0402
EC262 0.1U10XC0402
EC264 0.1U10XC0402
CPU_VDD1_RUN
EC78 0.1U10XC0402
EC74 0.1U10XC0402
EC69 0.1U10XC0402
EC64 0.1U10XC0402
EC65 0.1U10XC0402
EC75 0.1U10XC0402
EC77 0.1U10XC0402
EC81 0.1U10XC0402
EC209 0.1U10XC0402
EC86 0.1U10XC0402
EC212 0.1U10XC0402
EC85 0.1U10XC0402
EC63 0.1U10XC0402
EC76 0.1U10XC0402
near RX780 and
+1.8VRUN
+3VSUS
AGND_DSP
+5VRUN
4
RTS5158
EC59 0.1U10XC0402
EC118 0.1U10XC0402
EC47 0.1U10XC0402
EC70 0.1U10XC0402
EC89 0.1U10XC0402
EC226 0.1U10XC0402
EC225 0.1U10XC0402
EC109 0.1U10XC0402
EC58 0.1U10XC0402
EC72 0.1U10XC0402
EC61 0.1U10XC0402
EC100 0.1U10XC0402
EC117 0.1U10XC0402
EC105 0.1U10XC0402
EC50 0.1U10XC0402
EC44 0.1U10XC0402
EC325 0.1U10XC0402
EC327 0.1U10XC0402
EC329 0.1U10XC0402
EC331 0.1U10XC0402
EC332 0.1U10XC0402
EC333 0.1U10XC0402
EC60 0.1U10XC0402
EC201 0.1U10XC0402
3
+1.2VSUS
EC248 0.1U10XC0402
EC249 0.1U10XC0402
EC250 0.1U10XC0402
EC129 0.1U10XC0402
PWR_SRC ==> OVER 19V
PWR_SRC
EC12 0.1U25YC0402
EC13 0.1U25YC0402
EC51 0.1U25YC0402
EC14 0.1U25YC0402
EC21 0.1U25YC0402
EC22 0.1U25YC0402
VDD33
EC49 0.1U10X
C0402
EC270 0.1U10XC0402
EC271 0.1U10XC0402
EC272 0.1U10XC0402
1.8VGA
EC234 0.1U10XC0402
EC119 0.1U10XC0402
EC238 0.1U10XC0402
+3VRUN
EC290 0.1U10XC0402
EC292 0.1U10XC0402
EC294 0.1U10XC0402
EC296 0.1U10XC0402
EC298 0.1U10XC0402
EC300 0.1U10XC0402
EC303 0.1U10XC0402
EC306 0.1U10XC0402
EC308 0.1U10XC0402
EC310 0.1U10XC0402
EC312 0.1U10XC0402
EC314 0.1U10XC0402
EC316 0.1U10XC0402
EC318 0.1U10XC0402
EC319 0.1U10XC0402
EC320 0.1U10XC0402
EC322 0.1U10XC0402
EC324 0.1U10XC0402
EC326 0.1U10XC0402
EC328 0.1U10XC0402
EC330 0.1U10XC0402
M82S_VDD_CORE
3
EC334 0.1U10XC0402
EC335 0.1U10XC0402
EC336 0.1U10XC0402
+3VSUS +1.2VSUS
+3VSUS
+3VSUS +5VRUN
+1.1VRUN
2
+5VRUN
2
1
PWR_SRC ==> OVER 19V
PWR_SRC
EC207 0.1U25YC0402
EC210 0.1U25YC0402
EC213 0.1U25YC0402
EC211 0.1U25YC0402
EC159 0.1U25YC0402
EC55 0.1U25YC0402
EC206 0.1U25YC0402
EC214 0.1U25YC0402
EC54 0.1U25YC0402
EC215 0.1U25YC0402
EC94 0.1U25YC0402
EC52 0.1U25YC0402EC191 0.1U10XC0402
EC253 0.1U25YC0402
EC254 0.1U25YC0402
EC255 0.1U25YC0402
EC257 0.1U25YC0402
EC259 0.1U25YC0402
EC261 0.1U25YC0402
EC263 0.1U25YC0402
+5VRUN
EC222 0.1U10XC0402
EC10 0.1U10XC0402
EC171 0.1U10XC0402
EC5 0.1U10XC0402
EC208 0.1U10XC0402
+5VRUN
EC274 0.1U10XC0402
EC276 0.1U10XC0402
EC273 0.1U10XC0402
EC275 0.1U10XC0402
EC277 0.1U10XC0402
EC279 0.1U10XC0402
EC282 0.1U10XC0402
EC285 0.1U10XC0402
EC291 0.1U10XC0402
EC293 0.1U10XC0402
EC295 0.1U10XC0402
EC297 0.1U10XC0402
EC299 0.1U10XC0402
EC301 0.1U10XC0402
EC304 0.1U10XC0402
EC307 0.1U10XC0402
EC309 0.1U10XC0402
EC311 0.1U10XC0402
EC313 0.1U10XC0402
EC315 0.1U10XC0402
EC317 0.1U10XC0402
EC321 0.1U10XC0402
EC323 0.1U10XC0402
AGND_DSP
+3VALW
+1.1VRUN VCC_NB
AGND
EC230 0.1U10XC0402
EC229 0.1U10XC0402
EC126 0.1U10XC0402
EC137 0.1U10XC0402
EC20 0.1U10XC0402
EC43 0.1U10XC0402
EC2 0.1U10XC0402
EC3 0.1U10XC0402
MICRO-STAR INT'L CO.,LTD.
Title
EMI
Size Document Number Rev
B
Date: Sheet
MS-13331
1
+3VRUN
52 55 Wednesday, August 22, 2007
0A
of
5
hexainf@hotmail.com
GRATIS - FOR FREE
H27
X
HOLES_S276D118T148_VIA8
7
1
2
D D
HOLES_S276D118T148_VIA5
1 6
X
HOLES_S276D118T148_VIA8
1
2
C C
B B
3
4
5
6
H26
X
234
5
H25
3
4
5
6
X
HOLES_R177D91
X
NPTH_80
8
9
7
8
9
H4
1
H2
1
H15
X
HOLES_S276D118T148
1
H22
X
HOLES_S276D118T148
1
H20
X
HOLES_S276D118T148_VIA5
234
5
X
H3
HOLES_R177D91
1
X
H10
NPTH_80
1
1 6
H13
X
HOLES_S276D118T148
1
HOLES_S276D118T148_VIA8
1
2
H5
X
HOLES_R177D91
1
H19
X
3
HOLES_R177D91
HOLES_R177D91
New Card
PCB1
A A
P30-133310A-D05
BAT1
D06-0100300-H04
5
MDC1
X
S52-2801150-Q09
H12
X
HOLES_S276D118T148_VIA8
1
2
4
5
6
X
H11
1
X
H23
1
3
4
5
6
7
8
9
H1
X
HOLES_S276D118T148
1
HOLES_R236d91_PT
E2B-1221010-L63
NB Stand off
HOLES_R256D91B97_PT
E2B-1221010-L63
MDC
7
8
9
4
H16
X
HOLES_S276D118T148_VIA8
7
1
2
H21
X
holes236d118_PM
1
3
8
9
4
5
6
CPU HEATSINK
H14
X
HOLES_S276D118T148_VIA8
7
1
2
H9
1
H8
1
3
4
5
4
8
9
6
HOLES_R177D91
E2B-1022020-A89
X
FM44
F_PAD_M100
X
FM27
F_PAD_M100
H17
X
HOLES_S276D118T148
1
H18
X
HOLES_S276D118T148
1
H6
HOLES_R177D91
E2B-1024030-A89
1
Increase by
ME for
MiniPCIE
card
H7
1
MDC Stand off
X
FM28
F_PAD_M100
X
FM31
F_PAD_M100
1
1
1
1
H24
HOLES_R177D91
E2B-1022020-A89
1
P9
X
ATE_C006_106
GND
E23-1029050-CA7
P2
X
ATE_C006_106
GND
E23-1029050-CA7
P15
X
ATE_C006_106
GND
E23-1029050-CA7
P10
X
ATE_C006_106
GND
E23-1029050-CA7
HT1
X
HOLE157
1
SH1
E2M-2210111-SH4
X
FM30
F_PAD_M100
X
FM35
F_PAD_M100
3
P4
X
ATE_C006_106
1
E23-1029050-CA7
P3
X
ATE_C006_106
1
E23-1029050-CA7
P7
X
ATE_C006_106
1
E23-1029050-CA7
P8
X
ATE_C006_106
1
E23-1029050-CA7
3
GND
GND
GND
GND
HT2
X
HOLE157
1
X
FM39
F_PAD_M100
X
FM24
F_PAD_M100
P6
X
ATE_C006_106
1
GND
E23-1029050-CA7
P1
X
ATE_C006_106
1
GND
E23-1029050-CA7
P13
X
ATE_C006_106
1
GND
E23-1029050-CA7
P12
X
ATE_C006_106
1
GND
E23-1029050-CA7
HT3
X
HOLE157
1
SC3
E43-1203003-H29
New Card Screw x2
X
FM26
F_PAD_M100
X
FM10
F_PAD_M100
P5
X
ATE_C006_106
1
GND
E23-1029050-CA7
P14
X
ATE_C006_106
1
GND
E23-1029050-CA7
HT4
X
HOLE157
1
SC4
E43-1203003-H29
2
MYLAR1
E2Y-2210211-G40
MYLAR4
E2P-2211611-G40
X
FM19
F_PAD_M100
X
FM18
F_PAD_M100
2
1
FM37
X
F_PAD_M100
FM1
X
F_PAD_M100
FM13
X
F_PAD_M100
FM16
X
F_PAD_M100
FM14
X
F_PAD_M100
FM17
X
F_PAD_M100
FM11
X
F_PAD_M100
FM20
X
F_PAD_M100
FM21
X
panel_PAD
FM41
X
panel_PAD
MYLAR2
E2Y-2210311-G40
MYLAR5
E2P-2211711-G40
MYLAR3
E2Y-2210411-G40
MYLAR6
E2P-2211511-G40
FM5
X
F_PAD_M100
FM9
X
F_PAD_M100
FM32
X
F_PAD_M100
FM25
X
F_PAD_M100
FM43
X
F_PAD_M100
FM6
X
F_PAD_M100
FM12
X
F_PAD_M100
FM38
X
F_PAD_M100
FM29
X
F_PAD_M100
FM22
X
F_PAD_M120
FM42
X
F_PAD_M120
MYLAR7
E2P-2213111-G40
MYLAR8
E2P-2213211-G40
FM33
X
F_PAD_M100
FM36
X
F_PAD_M100
FM40
X
F_PAD_M100
FM15
X
F_PAD_M100
FM3
X
F_PAD_M100
FM8
X
F_PAD_M100
FM7
X
F_PAD_M100
FM4
X
F_PAD_M100
FM34
X
F_PAD_M100
FM23
X
F_PAD_M120
FM2
X
F_PAD_M120
MICRO-STAR INT'L CO.,LTD.
Title
ME Parts
Size Document Number Rev
B
Date: Sheet
MS-12221
53 55 Wednesday, August 22, 2007
1
1.0
of