5
4
3
2
1
MSI
MS-1039 Ver:0B
D D
DDR 333/400
GDDR3
16MX32bit*4PCS
15~16
AMD K8 Socket 754
3~6
HT
8
7
DDR SODIMM * 2
Clock Generator
17
LCD
LVDS
32
VGA
C C
DVI
32
TV OUT
32
RGB
ATI M56-P
12~14
PCIE
North Bridge
ATI RX480
9~11
PCIE
PCIE
NEW CARD (PCI-E/USB PCI-E)
26
LAN
RTL8111B
30
Mini PCI
CAMEARA(USBX1)
31
Socket
29
Oz711MP
CARDBUS
CARDREADER
USB 2.0 x4
31
USB
PCI
1394a
27 28
South Bridge
SATA HD
33
B B
CD-ROM
33
SATA
SIDE
ATI SB450
18~22
LPC
KBC
ENE3910
23
X-BUS
BIOS
23
FANX1
26
MDC
31
AZALIA
Keyboard
23
AUDIO CODEC
Internal MIC
25
A A
MIC IN
25
ALC882
24
Audio Amp
FAN7031
25
Touch PAD
23
Speaker
25
LINE IN
25
HP & SPDIF
25
5
4
3
2
Title
BLOCK DIAGRAM
Size Document Number Rev
C
Date: Sheet of
MSI CORPORATION
MS-1039
1
1 46 Tuesday, November 29, 2005
0.A
5
4
3
2
1
MS-1039 System Power on Sequency From PC Mode
PWR_SRC
+3VALW/+5VALW
D D
PWRBTN#(TO EC) T>10mS
SUS_ON(FROM EC)
+3VSUS/+5VSUS
+1.8VSUS/+1.2VSUS
+2_5VSUS
T>20mS
+1.8VSUS_PG
SUSPWROK
PWRBTN_SB#(TO EC)
S5_DELAY(FORM EC)
delay 100 ms by EC
T=8mS
PM_SLP_S5#(TO EC)
C C
PM_SLP_S3#(TO EC)
RUN_ON(FROM EC)
+5VRUN
M56_CORE
T>1mS
RUND/+3VRUN/+1.2VRUN/+1.8VRUN
VDDIO/VTT_EN
VDDIO/VTT_PG
+2.5VRUN
VGA_PG
PWOER_OK
B B
VDDA_EN
+VDDA
VDDA_PG
VDD_EN
V_CORE
VDD_PG
VLDT_EN
+VLDT
VLDT_PG
NB_PWRGO
SB_PWRGO
CPU_PWRGD(FROM SB)
A A
A,PCIRST#(FROM SB)
T>15mS
T>33mS
T>48mS
T>51mS
T>2mS
CPURST#(FROM SB)
MSI CORPORATION
Title
POWER SEQUENCE
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
MS-1039
2 46 Tuesday, November 29, 2005
1
0.A
A
B
C
D
E
Clawhammer HT Interface
LAYOUT: Place HT bypass caps on topside
near unconnected Clawhammer HT Link
4 4
G6
2 1
+VLDT_OUT +VLDT
VLDT Power Decoupling
VLDT Plane Rout with 250 mil trace or a plane
VLDT plane In CPU pins rout >100 mil
AH29
AH27
AG28
AG26
AF29
AE28
AF25
N26
N27
L25
M25
L26
L27
J25
K25
G25
H25
G26
G27
E25
F25
E26
E27
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29
+VLDT_OUT +VLDT
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
0.1UF_0402
C395
C383
0.1UF_0402 C827
C389
0.1UF_0402
0.1UF_0402
C382
HT_CADOUT_H[15:0] 9
HT_CADOUT_L[15:0] 9
C385
47UF_1206
47UF_1206
0.1UF_0402
0.1UF_0402
U2A
C397
C384
C396
C828
47UF_1206
3 3
2 2
C381
47UF_1206
0.1UF_0402
HT_CADIN_H[15:0] 9
HT_CADIN_L[15:0] 9
0.1UF_0402
C386
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
VLDT_A6
VLDT_A5
VLDT_A4
VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
J26
J27
J29
K29
N25
P25
P28
P27
CTLOP1
CTLON1
HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9
TP53
TP52
HT_CTLOUT_H0 9
HT_CTLOUT_L0 9
+VLDT
CTLIP1
CTLIN1
Y25
W25
Y27
Y28
R27
R26
T29
R29
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
HT_CLKIN_H1 9
HT_CLKIN_L1 9
HT_CLKIN_H0 9
HT_CLKIN_L0 9
R201 49.9R1%0402
HT_CTLIN_H0 9
HT_CTLIN_L0 9
ZIF_SOCKET754
R200
49.9R1%0402
1 1
MSI CORPORATION
Title
CPU SocketA (Host)
Size Document Number Rev
C
A
B
C
D
Date: Sheet of
MS-1039
3 46 Thursday, December 01, 2005
E
0.A
A
B
C
D
E
Clawhammer DDR Interface
SMDDR_VREF
DDRVREF_CPU
C447
1000PF_0402
MEMZN
MEMZP
MEMZN,MEMZP with
5/10,<1000 mils
+VTT
C435
FOR EMI
C452
0.1UF_0402
+VDDIO
R222 34.8_1%
R221 34.8_1%
C423
0.1UF_0402
D
Title
CPU SocketA (DDR Interface)
Size Document Number Rev
Custom
Date: Sheet of
MS-1039
DDRVREF with
40~50 mil, 25
mil clearance
or shielded by
GND
0.1 UF, 0603, X7R
1000 PF, 0603, X7R
Near Socket
Routing
in the top layer
MEMDATA[63:0] with 5/15
MEMDQS[8:0] with 5/20
in the bottom layer
MEMADDA[13:0] with 5/15
MA COMMAND with 5/15
MEMCLK_H/L are routed
20/5/5/5/20 trace
width/spacing., 20 mil
spacing
Rout DDR nets 50 mil
sapcing to their own
net
+VDDIO
DM8
DQS8
1 2
3 4
5 6
7 8
RN1
10K_8P4R_0402
TP84
TP83
DCLK1ÂDCLK1+
DCLK0ÂDCLK0+
MSI CORPORATION
4 46 Thursday, December 01, 2005
E
0.A
1000PF_0402_NC
+VTT
4 4
MD[63:0] 8
3 3
2 2
DM[7:0] 8
DQS[7:0] 8
1 1
C442
A
SNS_+1.25VTT
DDRVREF_CPU
MEMZN
MEMZP
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
DM8
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
AE13
AG12
D14
C14
A16
B15
A12
B11
A17
A15
C13
A11
A10
B9
C7
A6
C11
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
G3
M1
W1
W3
AC1
AC3
W2
Y1
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
R1
A13
A7
C2
H1
AA1
AG1
AH7
AH13
T1
A14
A8
D1
AB1
AJ2
AJ8
AJ13
L3
L1
J2
L2
J1
U2B
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
ZIF_SOCKET754
RSVD_MEMADDA15
RSVD_MEMADDA14
RSVD_MEMADDB_B15
RSVD_MEMADDB_B14
B
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
MEMADDB_B13
MEMADDB_B12
MEMADDB_B11
MEMADDB_B10
MEMADDB_B9
MEMADDB_B8
MEMADDB_B7
MEMADDB_B6
MEMADDB_B5
MEMADDB_B4
MEMADDB_B3
MEMADDB_B2
MEMADDB_B1
MEMADDB_B0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
+VTT
MEMRST#
DCLK7+
DCLK7ÂDCLK6+
DCLK6ÂDCLK5+
DCLK5ÂDCLK4+
DCLK4ÂDCLK3+
DCLK3ÂDCLK2+
DCLK2ÂDCLK1+
DCLK1ÂDCLK0+
DCLK0-
CS7#
CS6#
CS5#
CS4#
CS3#
CS2#
CS1#
CS0#
MA15
MA14
MA13
MA12
MA11
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
MB15
MB14
MB13
MB12
MB11
MB10
MB9
MB8
MB7
MB6
MB5
MB4
MB3
MB2
MB1
MB0
TP74
CKE0 7,8
CKE1 7,8
DCLK7+ 7,8
DCLK7- 7,8
DCLK6+ 7,8
DCLK6- 7,8
DCLK5+ 7,8
DCLK5- 7,8
DCLK4+ 7,8
DCLK4- 7,8
TP82
TP81
TP79
TP80
TP76
TP77
TP75
TP78
CS3# 7,8
CS2# 7,8
CS1# 7,8
CS0# 7,8
SRASA# 7,8
SCASA# 7,8
SWEA# 7,8
MEMBAA1 7,8
MEMBAA0 7,8
TP65
TP68
MA[13:0] 7,8
SRASB# 7,8
SCASB# 7,8
SWEB# 7,8
MEMBAB1 7,8
MEMBAB0 7,8
TP69
TP66
MB[13:0] 7,8
C
0.1UF_0402
A
B
C
D
E
+VDDA
4 4
Near CPU in 0.5" .
C419
3900PF
R207
169_1%
3900PF
CPUCLK0_H 17
CPUCLK0_L 17
C414
Rout 5/5/5 mil,
Long:<500 mils and
Max current 300 mA
L44 180nH/1210
CPUCK+
CPUCK-
+VLDT_OUT
Place near CPU in 1" , Routed
=> 5:10/Trace:Space , Same
Length
Long:500~750mil
R203 44.2_1%
R8 44.2_1%
C405
10UF_0805
C8
1000PF_0402
20 mils spacing
3 3
+3VALW
SMB_THRMCPU_CLK
SMB_THRMCPU_DATA
CPU_THRM_ALERTÂT_CRIT_CPU#
2 2
RN54
1 2
3 4
5 6
7 8
10K_8P4R_0402
+3VSUS
V_CORE
+VDDIO
+3VALW
1000PF_0402_NC
C406
1000PF_0402_NC
C475
CORE_SENSE
SNS_+2.5VDIMM
+VTT
Width:50mil and Long:500mil Width:50mil and
1000PF_0402
C394
1000PF_0402
+VDDIO
+2.5VRUN
11/16
C393
COREFB+ 37
COREFB- 37
TP71
TP67
R205 820
R206 820
TP55
TP54
TP62
TP63
TP59
TP61
TP58
TP57
R27 1K_0402
R23 1K_0402
C392
0.1UF_0402
CORE_SENSE
SNS_+2.5VDIMM
CPURST#
CPU_PWRGD
HTSTOP#
COREFB+
COREFB-
VDDIOFB+
VDDIOFB-
CPUCK+
CPUCK-
BPSCLK+
BPSCLK-
PLLCHRZ+
PLLCHRZ-
DBRDY
DCLKTWO
TMS
TCK
TRST#
TDI
NC_C18
NC_A19
AH25
AJ25
AF20
AE18
AJ27
AF27
AE26
A23
A24
B23
AE12
AF12
AE11
AJ21
AH21
AJ23
AH23
AE24
AF24
C16
AG15
AH17
C15
E20
E17
B21
A21
C18
A19
A28
AJ28
U2C
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC
NC
NC
NC
VTT_A5
VTT_B5
DBRDY
NC
TMS
TCK
TRST_L
TDI
NC
NC
KEY1
KEY0
Clawhammer Control and Debug
THERMTRIP_L
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
NC
NC
NC
NC
G_FBCLKOUT_H
G_FBCLKOUT_L
DBREQ_L
NC
NC
NC
NC
NC
TDO
NC
A20
A26
A27
AG13
AF14
AG14
AF15
AE15
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
AF18
THERMDA
THERMDC
FBCLKOUT+
TDO
THERMTRIP#
VID4
VID3
VID2
VID1
VID0
NC_AG17
NC_AJ18
FBCLKOUT-
DBREQ#
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
VID4 37
VID3 37
VID2 37
VID1 37
VID0 37
R211 80.6_1%
Zdiff = 80 ohm
TP60
+VDDIO
TP56
LAYOUT: Route
FBCLKOUT_H/L differentially
with 20/8/5/8/20 spacing and
trace width. ( In CPU
breakout => routed 5:5:5 )
AE23
Cap close to
thermal
sensor
T_CRIT_CPU# 34
1 1
LDT_RST# 20
SB_CPUPWRGD 20
LDTSTOP# 10,20 H_THERMTRIP# 18
THERMDA
C391
1000PF_0402
0_0402_NC
R204
11/18
R209
A
0.1UF_0402
0_0402
0_0402 R213
0_0402 R199
0_0402 R372
C420
CPURST#
CPU_PWRGD
HTSTOP#
U20
SMBCLK VDD
2
D+
3
D-
4
T_CRIT_A#
LM86_MSOP8
SMBDATA
ALERT#
GND
Close to CPU socket
RS480M_RST# 10 NB_RST# 20
SMB_THRMCPU_CLK
8 1
SMB_THRMCPU_DATA
7
6
5
+2.5VRUN
R526
1K_0402
THERMTRIP#
B
SMB_THRMCPU_CLK 23
SMB_THRMCPU_DATA 23
CPU_THRM_ALERT- 23
+2.5VRUN
R19
1K_0402
B
E C
Q39
MMBT3904
+3VSUS
R22
10K_0402
C
AF23
AF22
AF21
C1
R3
AA2
D3
AG2
B18
AH1
AE21
C20
AG4
C6
AG6
AE9
AG9
J3
NC
NC
NC
NC
FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
ZIF_SOCKET754
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
D
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
NC_AJ18 THERMDC
NC_AG17
NC_C21
NC_D20
NC_D18
NC_C19
NC_B19
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R26 1K_0402
RN55
1K_8P4R_0402
RN53
1K_8P4R_0402
MSI CORPORATION
Title
CPU SocketA (Control and Debug)
Size Document Number Rev
B
Date: Sheet of
MS-1039
E
5 46 Thursday, December 01, 2005
0.A
A
V_CORE +VDDIO
U2D
L7
VDD1
AC15
VDD2
H18
VDD3
B20
VDD4
E21
VDD5
H22
VDD6
J23
VDD7
H24
4 4
3 3
2 2
1 1
F26
N7
V10
G13
K14
Y14
AB14
G15
J15
AA15
H16
K16
Y16
AB16
G17
J17
AA17
AC17
AE17
F18
K18
Y18
AB18
AD18
AG19
E19
G19
AC19
AA19
J19
F20
H20
K20
M20
P20
T20
V20
Y20
AB20
AD20
G21
J21
L21
N21
R21
U21
W21
AA21
AC21
F22
K22
M22
P22
T22
V22
Y22
AB22
AD22
E23
G23
L23
N23
R23
U23
W23
AA23
AC23
B24
D24
F24
K24
M24
P24
T24
V24
Y24
AB24
AD24
AH24
AE25
K26
P26
V26
L9
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
ZIF_SOCKET754
A
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD96
VDD97
VDD98
VDD99
VDD93
VDD94
VDD95
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
V_CORE
AH20
AB21
AG25
AG27
AA10
AE16
AA20
AC20
AE20
AG20
AJ20
AD21
AG21
AG29
AA22
AC22
AG22
AH22
AJ22
AB23
AD23
AG23
AA24
AC24
AG24
AJ24
AD26
AF26
AH26
AB17
AD17
AA18
AC18
AB19
AD19
AF19
U2E
B2
VSS1
VSS3
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
VSS8
VSS9
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
VSS14
AB9
VSS15
VSS16
J12
VSS17
B14
VSS18
Y15
VSS19
VSS20
J18
VSS21
G20
VSS22
R20
VSS23
U20
VSS24
W20
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
D21
VSS31
F21
VSS32
H21
VSS33
K21
VSS34
M21
VSS35
P21
VSS36
T21
VSS37
V21
VSS38
Y21
VSS39
VSS40
VSS41
B22
VSS42
E22
VSS43
G22
VSS44
J22
VSS45
L22
VSS46
N22
VSS47
R22
VSS48
U22
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
D23
VSS56
F23
VSS57
H23
VSS58
K23
VSS59
P23
VSS60
T23
VSS61
V23
VSS62
Y23
VSS63
VSS64
VSS65
VSS66
E24
VSS67
G24
VSS68
J24
VSS69
N24
VSS70
R24
VSS71
U24
VSS72
W24
VSS73
VSS74
VSS75
VSS76
VSS77
B25
VSS78
C25
VSS79
B26
VSS80
D26
VSS81
H26
VSS82
M26
VSS83
T26
VSS84
Y26
VSS85
VSS86
VSS87
VSS88
C27
VSS89
B28
VSS90
D28
VSS91
G28
VSS92
F15
VSS187
H15
VSS188
VSS206
VSS207
B16
VSS208
G18
VSS209
VSS210
VSS211
D19
VSS212
F19
VSS213
H19
VSS214
K19
VSS215
Y19
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
N20
VSS222
ZIF_SOCKET754
B
L28
VSS93
R28
VSS94
W28
VSS95
AC28
VSS96
AF28
VSS97
AH28
VSS98
C29
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
B
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
C
D
E
Clawhammer Power and Ground Connections
EMI
V_CORE
6.8PF_0402 C402
6.8PF_0402 C390
6.8PF_0402 C418
6.8PF_0402 C408
6.8PF_0402 C388
6.8PF_0402 C411
6.8PF_0402 C403
V_CORE
1000PF_0402 C457 6.8PF_0402 C387
1000PF_0402 C448
1000PF_0402 C470
backside
+VDDIO +VDDIO
V_CORE V_CORE
C461 0.1UF_0402
C436 0.1UF_0402
C489 0.1UF_0402
C416 0.1UF_0402
C440 0.1UF_0402
C437 10UF_0805
+VDDIO
C488 0.1UF_0402
C500 0.1UF_0402
C501 0.1UF_0402
C459 0.1UF_0402
C415 0.1UF_0402
C401 0.1UF_0402
C454 10UF_0805
+VDDIO
C73 220UF/6.3V
C74 220UF/6.3V
Near
DIMM
Place these decoupling capacitors on solder
layer of processor
V_CORE V_CORE
+VDDIO
EMIC57
0.1UF_0402
+3VRUN
EMIC58
0.1UF_0402
Title
CPU SocketA (CPU_POWER)
Size Document Number Rev
Custom
C
D
Date: Sheet of
V_CORE
C24 0.1UF_0402
C23 0.1UF_0402
C22 0.1UF_0402
C15 0.1UF_0402
C16 0.1UF_0402
C17 0.1UF_0402
C25 10UF_0805
C20 10UF_0805
C19 10UF_0805
C13 10UF_0805
Place these capacitors in
uPGA socket cavity
C493 0.1UF_0402
C509 0.1UF_0402
C492 0.1UF_0402
C496 0.1UF_0402
C443 0.1UF_0402
C425 0.1UF_0402
Near
Socket
Close
to
socket
C624 10UF_0805
C516 10UF_0805
C513 10UF_0805
C503 10UF_0805
C464 10UF_0805
C622 10UF_0805
2 Near
DIMM; 4
Near Socket
V_CORE
C450 10UF_0805
C446 10UF_0805
C439 10UF_0805
C413 10UF_0805
C407 10UF_0805
C431 10UF_0805
C460 10UF_0805
C412 10UF_0805
Place these capacitors near socket
MSI CORPORATION
MS-1039
E
0.A
6 46 Thursday, December 01, 2005
A
B
C
D
E
+VDDIO
Unbuffered DDR333 SODIMM Sockets
+VDDIO
DIMM1
VDD
GND
192
132
144
156
168
180
VDD
VDD
VDD
VDD
VDD
VDDQ
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
GND
GND
GND
GND
GND
GND
GND
138
150
162
174
126
186
201
202
MD_0
5
MD_1
7
MD_2
13
MD_3
17
MD_4
6
MD_5
8
MD_6
14
MD_7
18
MD_8
19
MD_9
23
MD_10
29
MD_11
31
MD_12
20
MD_13
24
MD_14
30
MD_15
32
MD_16
41
MD_17
43
MD_18
49
MD_19
53
MD_20
42
MD_21
44
MD_22
50
MD_23
54
MD_24
55
MD_25
59
MD_26
65
MD_27
67
MD_28
56
MD_29
60
MD_30
66
MD_31
68
MD_32
127
MD_33
129
MD_34
135
MD_35
139
MD_36
128
MD_37
130
MD_38
136
MD_39
140
MD_40
141
MD_41
145
MD_42
151
MD_43
153
MD_44
142
MD_45
146
MD_46
152
MD_47
154
MD_48
163
MD_49
165
MD_50
171
MD_51
175
MD_52
164
MD_53
166
MD_54
172
MD_55
176
MD_56
177
MD_57
181
MD_58
187
MD_59
189
MD_60
178
MD_61
182
MD_62
188
MD_63
190
71
73
79
83
72
74
80
84
AMP_DDR-SO-DIMM-REVERSE
MD_[63:0] 8
0.1UF_0402
SMDDR_VREF
C677
1000PF_0402
MB[13:0] 4,8
C747
+VDDIO
921334557698193113
MA13
MEMBAA0
MEMBAA1
TP130
TP131
TP7
TP8
TP121
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
DM_0
DM_1
DM_2
DM_3
DM_4
DM_5
DM_6
DM_7
SWEA#
SCASA#
SRASA#
CKE0
DCLK5+
DCLK5ÂDCLK7+
DCLK7-
DQS_0
DQS_1
DQS_2
DQS_3
DQS_4
DQS_5
DQS_6
DQS_7
MA[13:0] 4,8
4 4
MEMBAA0 4,8
MEMBAA1 4,8
CS0# 4,8
CS1# 4,8
DM_[7:0] 8
SWEA# 4,8
SCASA# 4,8
SRASA# 4,8
CKE0 4,8
3 3
DCLK5+ 4,8
DCLK5- 4,8
DCLK7+ 4,8
DCLK7- 4,8
DQS_[7:0] 8
SMB_DATA 17,18,26
SMB_CLK 17,18,26
SMDDR_VREF
TP119
C604
+VDDIO
TP5
MA13
TP132
TP128
C613
0.1UF_0402
1000PF_0402
2 2
TP6
SMB_DATA
SMB_CLK
TP129
112
111
110
109
108
107
106
105
102
101
115
100
117
116
121
122
134
148
170
184
119
120
118
160
158
133
147
169
183
193
195
194
196
198
199
197
123
124
200
99
97
98
12
26
48
62
78
96
95
35
37
89
91
11
25
47
61
77
1
2
86
85
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VREF
VDDID
VDDSPD
NC//DU/RESET
NC/DU
NC/DU
NC/DU
NC/DU
GND
GND
3
203
204
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
15273951637587
VDDQ
GND
VDDQ
VDDQ
GND
GND
103
131
VDDQ
VDDQ
GND
GND
125
143
VDDQ
GND
137
155
VDDQ
GND
149
157
159
167
VDDQ
VDDQ
GND
GND
161
179
173
1911022343646587082
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
VDD
GND
VDDQ
GND
GND
GND
1854162838405264768890
9294114
VDD
VDD
GND
GND
VDD
GND
104
MB0
MB1
MB2
MB3
MB4
MB5
MB6
MB7
MB8
MB9
MB10
MB11
MB12
MB13
MEMBAB0 4,8
MEMBAB1 4,8
SWEB# 4,8
SCASB# 4,8
SRASB# 4,8
MEMBAB0
MEMBAB1
TP142
CS2# 4,8
CS3# 4,8
DM_0
DM_1
DM_2
DM_3
DM_4
DM_5
DM_6
DM_7
TP140
SWEB#
SCASB#
SRASB#
CKE1
CKE1 4,8
DCLK4+ 4,8
DCLK4- 4,8
DCLK6+ 4,8
DCLK6- 4,8
TP137
TP134
TP136
+VDDIO
TP133
+VDDIO
TP141
TP138
MB13
TP143
TP139
TP135
DQS_0
DQS_1
DQS_2
DQS_3
DQS_4
DQS_5
DQS_6
DQS_7
SMB_DATA
SMB_CLK
112
111
110
109
108
107
106
105
102
101
115
100
117
116
121
122
134
148
170
184
119
120
118
160
158
133
147
169
183
193
195
194
196
198
199
197
123
124
200
99
97
98
12
26
48
62
78
96
95
35
37
89
91
11
25
47
61
77
1
2
86
85
921334557698193113
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VREF
VDDID
VDDSPD
NC//DU/RESET
NC/DU
NC/DU
NC/DU
NC/DU
3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
15273951637587
VDDQ
VDDQ
GND
GND
VDDQ
GND
103
SMDDR_VREF
+VDDIO
C626
22UF_1206
C687
22UF_1206
+VDDIO
0.1UF_0402
C620
C628
C682
C668
C681
C684
C667
C662
C740
C735
C676
C738
C599 4.7U/10V_0805
C663 0.1UF_0402
Place these two decoupling caps near DIMMs
C741
1000PF_0402
1000PF_0402
C739
C627
1000PF_0402
1000PF_0402
C691
C742
1000PF_0402
1000PF_0402
C737
C683
0.1UF_0402
C618
0.1UF_0402
C743
0.1UF_0402
C686
0.1UF_0402
C678
0.1UF_0402
C736
0.1UF_0402
C661
0.1UF_0402
C665
C685
0.1UF_0402
0.1UF_0402
C631
0.1UF_0402
131
143
VDDQ
VDDQ
VDDQ
GND
GND
GND
125
137
C666
0.1UF_0402
179
155
157
167
1911022343646587082
VDD
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
149
159
161
173
1854162838405264768890
C633
C629
47PF_0402
0.1UF_0402
VDD
VDD
VDD
GND
GND
GND
47PF_0402
C625
VDD
VDD
VDD
GND
GND
GND
47PF_0402
9294114
VDD
VDD
VDD
GND
GND
GND
47PF_0402
C660
C654
132
VDD
VDD
GND
GND
104
126
47PF_0402
144
156
VDD
VDD
GND
GND
138
150
C659
47PF_0402
VDD
GND
DIMM2
192
168
180
VDD
VDD
VDDQ
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
GND
GND
GND
GND
162
174
186
201
202
MD_0
5
MD_1
7
MD_2
13
MD_3
17
MD_4
6
MD_5
8
MD_6
14
MD_7
18
MD_8
19
MD_9
23
MD_10
29
MD_11
31
MD_12
20
MD_13
24
MD_14
30
MD_15
32
MD_16
41
MD_17
43
MD_18
49
MD_19
53
MD_20
42
MD_21
44
MD_22
50
MD_23
54
MD_24
55
MD_25
59
MD_26
65
MD_27
67
MD_28
56
MD_29
60
MD_30
66
MD_31
68
MD_32
127
MD_33
129
MD_34
135
MD_35
139
MD_36
128
MD_37
130
MD_38
136
MD_39
140
MD_40
141
MD_41
145
MD_42
151
MD_43
153
MD_44
142
MD_45
146
MD_46
152
MD_47
154
MD_48
163
MD_49
165
MD_50
171
MD_51
175
MD_52
164
MD_53
166
MD_54
172
MD_55
176
MD_56
177
MD_57
181
MD_58
187
MD_59
189
MD_60
178
MD_61
182
MD_62
188
MD_63
190
71
73
79
83
72
74
80
84
AMP_DDR-SO-DIMM-STANDARD
+VDDIO
C744
C746
22UF_1206
C658
22UF_1206
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
MA0 MA1 MA2 MA3 MA7 MA5 MA4 MA6 MB0 MA11 MA13 MA9 MA8 MB1 MA12 MA10 MB8 MB5 MB7 MB3 MB2 MB9 MB6 MB4 MB10 MB13 MB12 MB11
EMIC131
10P_0402
1 1
MEMBAA0 MEMBAA1 MEMBAB1
EMIC160
10P_0402
EMIC132
10P_0402
EMIC161
10P_0402
EMIC133
10P_0402
MEMBAB0
EMIC162
10P_0402
EMIC134
10P_0402
EMIC163
10P_0402
A
EMIC135
10P_0402
EMIC136
10P_0402
EMIC137
10P_0402
EMIC138
10P_0402
CS0# CS1# CS2# CS3# SRASB# CKE0 SWEA# CKE1 SWEB# SCASA# SRASA# SCASB#
EMIC164
10P_0402
EMIC165
10P_0402
EMIC166
10P_0402
EMIC167
10P_0402
EMIC139
10P_0402
EMIC140
10P_0402
EMIC168
10P_0402
B
EMIC141
10P_0402
EMIC169
10P_0402
EMIC142
10P_0402
EMIC170
10P_0402
EMIC143
10P_0402
EMIC171
10P_0402
EMIC144
10P_0402
EMIC172
10P_0402
EMIC145
10P_0402
EMIC173
10P_0402
EMIC146
10P_0402
EMIC174
10P_0402
EMIC147
10P_0402
C
EMIC175
10P_0402
EMIC148
10P_0402
EMIC149
10P_0402
EMIC150
10P_0402
EMIC151
10P_0402
EMIC152
10P_0402
11/18 FOR EMI IMPROVAL DDR NOISE
EMIC153
10P_0402
D
EMIC154
10P_0402
EMIC155
10P_0402
EMIC156
10P_0402
EMIC157
10P_0402
EMIC158
10P_0402
Title
DIMM1 & DIMM2 (DDR SODIMM)
Size Document Number Rev
C
Date: Sheet of
MSI CORPORATION
MS-1039
E
7 46 Thursday, December 01, 2005
0.A
A
B
C
D
E
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
MD_[63:0]
DQS_[7:0]
DM_[7:0]
+VTT
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
R235 121_1%_0402
R229 121_1%_0402
R236 121_1%_0402
R232 121_1%_0402
RN34
47_8P4R_0402
RN37
47_8P4R_0402
RN36
47_8P4R_0402
RN35
47_8P4R_0402
RN32
47_8P4R_0402
RN44
47_8P4R_0402
RN33
47_8P4R_0402
RN40
47_8P4R_0402
RN42
47_8P4R_0402
RN38
47_8P4R_0402
RN43
47_8P4R_0402
DCLK7+ 4,7
DCLK6+ 4,7
DCLK5+ 4,7
DCLK4+ 4,7
MD_[63:0] 7
DQS_[7:0] 7
DM_[7:0] 7
+VTT
MEMBAB0 4,7
MEMBAB1 4,7
MEMBAA0 4,7
MEMBAA1 4,7
SCASA# 4,7
SCASB# 4,7
SWEA# 4,7
SWEB# 4,7
SRASA# 4,7
SRASB# 4,7
C441
For EMI
CKE0 4,7
CKE1 4,7
CS0# 4,7
CS1# 4,7
CS2# 4,7
CS3# 4,7
+VDDIO
0.1UF_0402
0.1UF_0402 C705
0.1UF_0402 C434
0.1UF_0402 C432
MEMBAB0
MEMBAB1
MEMBAA0
MEMBAA1
CKE0
CKE1
CS0#
CS1#
CS2#
CS3#
SCASA#
SCASB#
SWEA#
SWEB#
SRASA#
SRASB#
+VTT
LAYOUT: Add 100pF and 1000pF
VTT fill near Clawhammer and
near DIMMs (Both Sides)
+VTT
1000PF_0402 C179
1000PF_0402 C173
+VTT
0.1UF_0402 C184
0.1UF_0402 C182
0.1UF_0402 C186
0.1UF_0402 C185
0.1UF_0402 C171
0.1UF_0402 C178
0.1UF_0402 C176
0.1UF_0402 C175
0.1UF_0402 C174
0.1UF_0402 C168
0.1UF_0402 C170
0.1UF_0402 C172
0.1UF_0402 C165
0.1UF_0402 C151
0.1UF_0402 C189
0.1UF_0402 C163
0.1UF_0402 C162
0.1UF_0402 C156
0.1UF_0402 C153
0.1UF_0402 C154
0.1UF_0402 C148 0.1UF_0402 C180
0.1UF_0402 C152
0.1UF_0402 C167
0.1UF_0402 C188
0.1UF_0402 C187
0.1UF_0402 C159
0.1UF_0402 C177
0.1UF_0402 C160
backside
LAYOUT: Place alternating caps to GND and
+2.5VDIMM in a single line along VTT island.
LAYOUT: Place a cap every 1 inch on VTT
trace between Clawhammer and DDR.
+VTT
0.1UF_0402
C143
0.1UF_0402
C155
C142
4.7U/10V_0805
47UF_1206
+VTT
C723
C144
100UF/6.3V_1210
C822
47UF_1206
LAYOUT: Locate close to
ClawHammer socket.
From CPU
MD0
MD4
MD5
MD1
DQS0
DM0
4 4
3 3
2 2
1 1
MD2
MD6
MD14
MD15
MD10
MD11
MD20
MD16
MD17
DQS2
MD21
DM2
MD18
MD22
MD26
MD30
MD27
MD31
MD19
MD23
MD24
MD28
MD25
MD29
DQS3
DM3
MD32
MD36
MD33
MD37
DQS4
MD34
DM4
MD38
MD41
DQS5
DM5
MD45
MD48
MD49
MD52
MD53
DM6
DQS6
MD54
MD50
MD55
MD51
MD60
MD56
MD61
MD57
DM7
DQS7
MD62
MD58
MD63
MD59
MD7
MD3
MD8
MD9
MD42
MD43
MD46
MD47
MD12
DQS1
MD13
DM1
MD39
MD35
MD40
MD44
To DDR Socket
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
MD_0
MD_4
MD_5
MD_1
DQS_0
DM_0
MD_2
MD_6
MD_14
MD_15
MD_10
MD_11
MD_20
MD_16
MD_17
DQS_2
MD_21
DM_2
MD_18
MD_22
MD_26
MD_30
MD_27 MD_32
MD_31
MD_19
MD_23
MD_24
MD_28
MD_25
MD_29
DQS_3
DM_3
MD_32
MD_36
MD_33
MD_37
DQS_4
MD_34
DM_4
MD_38
MD_41
DQS_5
DM_5
MD_45
MD_48
MD_49
MD_52
MD_53
DM_6
DQS_6
MD_54
MD_50
MD_55
MD_51
MD_60
MD_56
MD_61
MD_57
DM_7
DQS_7
MD_62
MD_58
MD_63
MD_59
MD_7
MD_3
MD_8
MD_9
MD_42
MD_43
MD_46
MD_47
MD_12
DQS_1
MD_13
DM_1
MD_39
MD_35
MD_40
MD_44
RN21
10_8P4R_0402
RN20
10_8P4R_0402
RN17
10_8P4R_0402
RN16
10_8P4R_0402
RN15
10_8P4R_0402
RN12
10_8P4R_0402
RN14
10_8P4R_0402
RN13
10_8P4R_0402
RN11
10_8P4R_0402
RN10
10_8P4R_0402
RN8
10_8P4R_0402
RN6
10_8P4R_0402
RN5
10_8P4R_0402
RN4
10_8P4R_0402
RN3
10_8P4R_0402
RN2
10_8P4R_0402
RN19
10_8P4R_0402
RN7
10_8P4R_0402
RN18
10_8P4R_0402
RN9
10_8P4R_0402
MD_1
MD_0
MD_2
DQS_0
MD_27
MD_26
DQS_3
MD_25
MD_24
MD_19
MD_18
DQS_2
MD_4
MD_5
DM_0
MD_6
MD_29
DM_3
MD_30
MD_31
MD_36
MD_37
MD_33
MD_40
MD_35
MD_46
MD_47
MD_52
MD_53
DM_6
MD_54
MD_41
DQS_5
MD_43
MD_42
MD_62
MD_63
MD_49
MD_48
DM_4
MD_38
MD_39
MD_44
MD_14
MD_15
MD_20
MD_21
MD_34
DQS_4
MD_45
DM_5
MD_10
MD_11
MD_16
MD_17
MD_7
MD_12
MD_13
DM_1
DM_2
MD_22
MD_23
MD_28
MD_55
MD_60
MD_61
DM_7
MD_50
DQS_6
MD_56
MD_51
MD_8
MD_3
DQS_1
MD_9
DQS_7
MD_57
MD_59
MD_58
+VTT
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
RN52
68_8P4R_0402
RN49
68_8P4R_0402
RN48
68_8P4R_0402
RN47
68_8P4R_0402
RN39
68_8P4R_0402
RN31
68_8P4R_0402
RN28
68_8P4R_0402
RN26
68_8P4R_0402
RN27
68_8P4R_0402
RN24
68_8P4R_0402
RN30
68_8P4R_0402
RN45
68_8P4R_0402
RN29
68_8P4R_0402
RN50
68_8P4R_0402
RN46
68_8P4R_0402
RN41
68_8P4R_0402
RN25
68_8P4R_0402
RN23
68_8P4R_0402
RN51
68_8P4R_0402
RN22
68_8P4R_0402
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
To DDR Socket
DCLK7- 4,7
DCLK6- 4,7
DCLK5- 4,7
DCLK4- 4,7
MA[13:0] 4,7
MB[13:0] 4,7
MD[63:0] 4
DQS[7:0] 4
DM[7:0] 4
MB2
MB0
MA13
MB10
MA6
MA4
MB3
MA3
MA2
MA1
MB1
MA0
MA10
CS0#
MB6
MB4
SCASB#
CS3#
SWEB#
CS2#
MB12
CKE0
MA7
MA12
MEMBAB1
SRASB#
MEMBAB0
MB13
MA8
MB5
SCASA#
CS1#
SRASA#
MEMBAA1
SWEA#
MEMBAA0
CKE1
MB11
MB8
MA5
MA11
MA9
MB7
MB9
MD[63:0]
DQS[7:0]
DM[7:0]
MA[13:0]
MB[13:0]
MSI CORPORATION
Title
DDR TERMINATION
Size Document Number Rev
C
A
B
C
D
Date: Sheet of
MS-1039
8 46 Thursday, December 01, 2005
E
0.A
5
4
3
2
1
U3A
HT_CADOUT_H[15:0] 3
D D
C C
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
HT_CLKOUT_H1 3
HT_CLKOUT_H0 3
HT_CLKOUT_L0 3
HT_CTLOUT_H0 3
HT_CTLOUT_L0 3
+1.2VRUN
R11 49.9R1%0402 100R_1%_0402 R10
R12 49.9R1%0402
HT_RXCALN
HT_RXCALP
T26
R26
U25
U24
V26
U26
W25
W24
AA25
AA24
AB26
AA26
AC25
AC24
AD26
AC26
R29
R28
T30
R30
T28
T29
V29
U29
Y30
W30
Y28
Y29
AB29
AA29
AC29
AC28
Y26
W26
W29
W28
P29
N29
D27
E27
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALN
HT_RXCALP
R24
R25
N26
P26
N24
N25
L26
M26
J26
K26
J24
J25
G26
H26
G24
G25
L30
M30
L28
L29
J29
K29
H30
H29
E29
E28
D30
E30
D28
D29
B29
C29
L24
L25
F29
G29
M29
M28
B28
A28
I/F
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
PART 1OF6
HYPER TRANSPORT CPU
RS480M_A13
B B
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
HT_TXCALP
HT_TXCALN
HT_CLKIN_H1 3
HT_CLKIN_L1 3 HT_CLKOUT_L1 3
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
0402
HT_CADIN_H[15:0] 3
HT_CADIN_L[15:0] 3 HT_CADOUT_L[15:0] 3
PCIE_RXP1 30
PCIE_RXN1 30
PLACE THESE CAP CLOSE
U3B
TO CONNECTOR
PART 2 OF 6
GFX_RX0P 12
GFX_RX0N 12
GFX_RX1P 12
GFX_RX1N 12
GFX_RX2P 12
GFX_RX2N 12
GFX_RX3P 12 GFX_TX3P 12
GFX_RX3N 12
GFX_RX4P 12
GFX_RX4N 12
GFX_RX5P 12
GFX_RX5N 12
GFX_RX6P 12
GFX_RX6N 12
GFX_RX7P 12
GFX_RX7N 12
GFX_RX8P 12
GFX_RX8N 12
GFX_RX9P 12
GFX_RX9N 12
GFX_RX10P 12
GFX_RX10N 12
GFX_RX11P 12
GFX_RX11N 12
GFX_RX12P 12
GFX_RX12N 12
GFX_RX13P 12
GFX_RX13N 12
GFX_RX14P 12
GFX_RX14N 12
GFX_RX15P 12
GFX_RX15N 12
GPP_RX2P 26
GPP_RX2N 26
D8
GFX_RX0P
D7
GFX_RX0N
D5
GFX_RX1P
D4
GFX_RX1N
E4
GFX_RX2P
F4
GFX_RX2N
G5
GFX_RX3P
G4
GFX_RX3N
H4
GFX_RX4P
J4
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
G1
GFX_RX6P
G2
GFX_RX6N
K5
GFX_RX7P
K4
GFX_RX7N
L4
GFX_RX8P
M4
GFX_RX8N
N5
GFX_RX9P
N4
GFX_RX9N
P4
GFX_RX10P
R4
GFX_RX10N
P5
GFX_RX11P
P6
GFX_RX11N
P2
GFX_RX12P
R2
GFX_RX12N
T5
GFX_RX13P
T4
GFX_RX13N
U4
GFX_RX14P
V4
GFX_RX14N
W1
GFX_RX15P
W2
GFX_RX15N
AE1
GPP_RX0P/SB_RX2P
AE2
GPP_RX0N/SB_RX2N
AB2
GPP_RX1P/SB_RX3P
AC2
GPP_RX1N/SB_RX3N
AB5
GPP_RX2P
AB4
GPP_RX2N
Y4
GPP_RX3P
AA4
GPP_RX3N
PCIE I/F TO
VIDEO
GPP_TX0P/SB_TX2P
GPP_TX0N/SB_TX2N
GPP_TX1P/SB_TX3P
GPP_TX1N/SB_TX3N
PCIE I/F TO SLOT
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
A7
B7
B6
B5
A5
A4
B3
B2
C1
D1
D2
E2
F2
F1
H2
J2
J1
K1
K2
L2
M2
M1
N1
N2
R1
T1
T2
U2
V2
V1
Y2
AA2
AD2
AD1
AA1
AB1
Y5
Y6
W5
W4
C21 0.1UF_0402
C27 0.1UF_0402
C29 0.1UF_0402
C31 0.1UF_0402
C32 0.1UF_0402
C34 0.1UF_0402
C36 0.1UF_0402
C38 0.1UF_0402
C46 0.1UF_0402
C49 0.1UF_0402
C52 0.1UF_0402
C53 0.1UF_0402
C54 0.1UF_0402
C57 0.1UF_0402
C58 0.1UF_0402
C59 0.1UF_0402
C60 0.1UF_0402
C62 0.1UF_0402
C63 0.1UF_0402
C64 0.1UF_0402
C65 0.1UF_0402
C67 0.1UF_0402
C68 0.1UF_0402
C69 0.1UF_0402
C70 0.1UF_0402
C72 0.1UF_0402
C75 0.1UF_0402
C82 0.1UF_0402
C85 0.1UF_0402
C86 0.1UF_0402
C87 0.1UF_0402
C88 0.1UF_0402
SB_PETP1
SB_PETN1
C538 0.1UF_0402
C841 0.1UF_0402
C842 0.1UF_0402
C535 0.1UF_0402
GFX_TX0P 12
GFX_TX0N 12
GFX_TX1P 12
GFX_TX1N 12
GFX_TX2P 12
GFX_TX2N 12
GFX_TX3N 12
GFX_TX4P 12
GFX_TX4N 12
GFX_TX5P 12
GFX_TX5N 12
GFX_TX6P 12
GFX_TX6N 12
GFX_TX7P 12
GFX_TX7N 12
GFX_TX8P 12
GFX_TX8N 12
GFX_TX9P 12
GFX_TX9N 12
GFX_TX10P 12
GFX_TX10N 12
GFX_TX11P 12
GFX_TX11N 12
GFX_TX12P 12
GFX_TX12N 12
GFX_TX13P 12
GFX_TX13N 12
GFX_TX14P 12
GFX_TX14N 12
GFX_TX15P 12
GFX_TX15N 12
11/16 11/16
PCIE_TXP1 30
PCIE_TXN1 30
GPP_TX2P 26
GPP_TX2N 26
A_RX0P 20
A_RX0N 20
A_RX1P 20
A_RX1N 20
10K_1% R48
8.25K_1% R50
AG1
AH1
AC5
AC6
AH3
AJ3
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
PCE_ISET
PCE_TXISET
PCIE I/F TO SB
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_PCAL
PCE_NCAL
AF2
AG2
AC4
AD4
AH2
AJ2
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
R263
RS480M_A13
A A
C544 0.1UF_0402
C539 0.1UF_0402
150R_1% R49
82.5R_1%_0402
C550 0.1UF_0402
C541 0.1UF_0402
+1.2VRUN
A_TX0P 20
A_TX0N 20
A_TX1P 20
A_TX1N 20
MSI CORPORATION
Title
RX480-HT/PCIE
Size Document Number Rev
B
5
4
3
2
Date: Sheet of
MS-1039
1
9 46 Thursday, December 01, 2005
0.A
5
4
3
2
1
U3C
AF17
MEM_A0
AK17
MEM_A1
AH16
MEM_A2
AF16
MEM_A3
AJ22
MEM_A4
AJ21
MEM_A5
AH20
MEM_A6
D D
C C
B B
AH21
AK19
AH19
AJ17
AG16
AG17
AH17
AJ18
AG26
AJ29
AE21
AH24
AH12
AG13
AH8
AE8
AF25
AH30
AG20
AJ25
AH13
AF14
AJ7
AG8
AG25
AH29
AF21
AK25
AJ12
AF13
AK7
AF9
AE17
AH18
AE18
AJ19
AF18
AK16
AJ16
AE28
AJ4
AJ20
AK20
AJ15
AJ14
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P
MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_CKP
MEM_CKN
MEM_CAP1
MEM_CAP2
MEM_VMODE
MEM_VREF
MPVDD
MPVSS
PART 3 OF 6
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_A I/F
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_COMPP
MEM_COMPN
AF28
AF27
AG28
AF26
AE25
AE24
AF24
AG23
AE29
AF29
AG30
AG29
AH28
AJ28
AH27
AJ27
AE23
AG22
AF23
AF22
AE20
AG19
AF20
AF19
AH26
AJ26
AK26
AH25
AJ24
AH23
AJ23
AH22
AK14
AH14
AK13
AJ13
AJ11
AH11
AJ10
AH10
AE15
AF15
AG14
AE14
AE12
AF12
AG11
AE11
AJ9
AH9
AJ8
AK8
AH7
AJ6
AH6
AJ5
AG10
AF11
AF10
AE9
AG7
AF8
AF7
AE7
AH5
AD30
RS480M_A13
TP85
TP73
AVDD
DAC VDD (2.5V)
DIGITAL VDD (1.8V) AVDDDI
DAC2 BANDGAP REF (1.8V)
PLL VDD (1.8V) PLLVDD
HT PLL VDD (1.2V) HTPVDD
+3VRUN
1 2
L46 FB_220_0.2A
NB STRAP PIN
AP NOTE RECOMMAND
RS480 side port
RX480 NC Pin
+1.8VRUN
A A
1 2
L88
C896
2.2UF
FB_220_0.2A
11/16
5
LOAD_ROM#:LOAD ROM STRAP ENABLE strap
High, LOAD ROM STRAP DISABLE
Low, LOAD ROM STRAP ENABLE
ATI has internal pull up
R218 3K_NC
LOAD_ROM# SPMEM_EN#
4
R219 3K_NC
+3VRUN
L86 FB_220_0.2A
VDDA18
L87
VDDA18
+1.8VSUS
C451
2.2UF
BMREQ# 20
+3VRUN
11/16
1 2
FB_220_0.2A
1 2
150R_1% R228
R47
4.7K_0402
C895
2.2UF
C18
2.2UF
C455
2.2UF
RS480M_RST# 5
NB_PWRGD 34
ALLOW_LDTSTOP 20
OSC14M 17
SPMEM_EN#
LOAD_ROM#
R25 10K_0402
R233 10K_0402
LDTSTOP# 5,20
3K_NC R220
TP64
TP1
DFT_GPIO2
DDC1_SCLK
DDC1_SDATA
harry 0322
U3D
B27
AVDD1
C27
AVDD2
D26
AVSSN1
D25
AVSSN2
C24
AVDDDI
B24
AVSSDI
E24
AVDDQ
D24
AVSSQ
B25
C
A25
Y
A24
COMP
C25
RED
A26
GREEN
B26
BLUE
A11
DACVSYNC
B11
DACHSYNC
C26
RSET
E11
DACSCL
F11
DACSDA
A14
PLLVDD
B14
PLLVSS
M23
HTPVDD
L23
HTPVSS
D14
SYSRESET#
B15
POWERGOOD
B12
LDTSTOP#
C12
ALLOW_LDTSTOP
AH4
SUS_STAT#
H13
VDDR3_1
H12
VDDR3_2
A13
OSCIN
B13
OSCOUT
B9
TVCLKIN
F12
DFT_GPIO0/RSV
E13
DFT_GPIO1/RSV
D13
DFT_GPIO2/RSV
F10
BMREQb
C10
I2C_CLK
C11
I2C_DATA
AF4
THERMALDIODE_P
AE4
THERMALDIODE_N
RS480M_A13
ATI has internal pull up
+3VRUN +3VRUN
SPMEM_EN#:SIDE PORT MEMORY ENABLE strap
R224 3K_NC
R226 3K_NC
High, SIDE PORT MEMORY DISABLE
Low, SIDE PORT MEMORY ENABLE
3
PART 4 OF 6
CRT/TVOUT
LVDS
LVDDR18A_1
LVDDR18A_2
PLL PWR
PM
LVDS_DIGON
CLOCKs
DFT_GPIO3/RSV
DFT_GPIO4/RSV
DFT_GPIO5/RSV
MIS.
2
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN
LPVDD
LPVSS
LVDDR18D
LVSSR1
LVSSR2
LVSSR3
LVSSR4
LVSSR5
LVSSR6
LVSSR7
LVSSR8
LVDS_BLON
LVDS_BLEN
GFX_CLKP
GFX_CLKN
HTTSTCLK
HTREFCLK
SB_CLKP
SB_CLKN
TMDS_HPD
STRP_DATA
DDC_DATA
TESTMODE
D18
C18
B19
A19
D19
C19
D20
C20
B16
A16
D16
C16
B17
A17
E17
D17
B20
A20
B18
C17
E18
F17
E19
G20
H20
G19
E20
F20
H18
G18
F19
H19
F18
E14
F14
F13
B8
A8
P23
N23
E8
E7
C13
C14
C15
A10
E10
B10
E12
LVDS_BLEN
R231 10K_0402
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
STRP_DATA
DDC_DATA
R234 10K_0402
R230
4.7K_0402
TP72
NBSRCCLK 17
NBSRCCLK# 17
HTREFCLK 17
SBLINKCLK 17
SBLINKCLK# 17
TP70
3K_NC R24
3K_NC R18
3K_NC R13
+3VRUN
MSI CORPORATION
Title
RX480-SIDE PORT MEMORY I/F
Size Document Number Rev
B
Date: Sheet of
MS-1039
1
10 46 Thursday, December 01, 2005
0.A
5
4
3
2
1
NB RX480 POWER STATES
S1
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
S3
OFF
OFF
OFF
OFF
OFF
OFF
OFF AVDD
OFF
OFF
OFF
OFF
OFF
OFF
S4/S5
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
C42
4.7U/10V_0805
C93
4.7U/10V_0805
C9
4.7U/10V_0805
C30
4.7U/10V_0805
Power Signal
VDDHT
VDDR,VDDRCK
VDD18
R5
AE5V5N3F7F5R3AA6T3M6C5F8M8Y8V3C3W3K8D3C6
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
D D
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
AA3A2AB3P8J6C8AD3V8F3
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
AE3
AF3M5AB7G3B4P7AA5C9C7J5R6J3AD5D6C4K3AB8T7Y7
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
AD6K7H7M3V6H8C2
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
AG3L6AJ1M7V7F6E6U5U6E5L5
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
T8
VSSA68
F28
H28
VSS113
VSS114
M24
J28
VSS115
VSS116
N19
K28
VSS117
VSS118
T23
L27
VSS119
VSS120
M27
H24
VSS122
VSS123
N28
P25
VSS124
VSS125
P28
E26
VSS126
VSS127
K25
U28
VSS128
VSS129
V25
V28
VSS130
R23
VSS131
VSS132
U3F
RS480M_A13
VDDC
VDDA18
VDDA12
S0
ON
ON
ON
ON
ON
ON
ON
GROUND
PAR 6 OF 6
AVDDDI
PLLVDD
HTPVDD
VDDR3
LPVDD
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
G10
G12
AD29
AD27
AC27
G15
G14
Y24
G13E9D15D9AD9
VDDA12
L49
80_6A_0805
C C
B B
A A
C484
22UF_0805
0.1UF_0402
C469
G11
C428
0.1UF_0402
F16
G30
AB28
0.1UF_0402
+1.8VRUN
AB25
D12
AD24
AA28
C422
0.1UF_0402
G17
Y23
AC9
R19
FB_26_0.6A_0805
L48
0.1UF_0402
Y27
C28
G16
F25
C498
0.1UF_0402
C477
B30
T24
F26
0.1UF_0402
W27
D11
H11
AD25
C421
C514
0.1UF_0402
H17
H10
H16
H14
E16
D10
HT_VDD_12
C474
0.1UF_0402
VDDHT30
VDDHT31
VDD18
C510
0.1UF_0402
E15
F15
U15
V14
R15
T14
N27
U27
V27
G27
V24
H27
K24
AB24
P27
J27
AA27
K27
P24
AB27
AB23
V23
G23
E23
W23
K23
J23
H23
U23
AA23
D23
F23
C23
B23
A23
A29
AC30
AK23
AK28
AK11
AK4
AE30
AC14
AD12
AC18
AC20
AD10
AD14
AD15
AD20
AC10
AD18
AC12
AD22
AC22
AH15
H15
AC17
AC15
B21
C21
A22
B22
C22
F21
F22
E21
G21
N15
V12
N13
P14
U3E
VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19
VDD_HT20
VDD_HT21
VDD_HT22
VDD_HT23
VDD_HT24
VDD_HT25
VDD_HT26
VDD_HT27
VDD_HT28
VDD_HT29
VDD_HT30
VDD_HT31
VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDD_MEM7
VDD_MEM8
VDD_MEM9
VDD_MEM10
VDD_MEM11
VDD_MEM12
VDD_MEM13
VDD_MEM14
VDD_MEM15
VDD_MEM16
VDD_MEM17
VDD_MEM18
VDD_MEMCK
VDD_18_1
VDD_18_2
VDD_18_3
VDD_CORE47
VDD_CORE46
VDD_CORE45
VDD_CORE44
VDD_CORE43
VDD_CORE42
VDD_CORE41
VDD_CORE40
VDD_CORE39
RS480M_A13
U17
T16
R17
P12
PART 5 OF 6
T12
R13
W13
W17
P18
POWER
V18
M18
U13
N17
W15
VDDA_12_14
VDDA_12_1
VDDA_12_2
VDDA_12_3
VDDA_12_4
VDDA_12_5
VDDA_12_6
VDDA_12_7
VDDA_12_8
VDDA_12_9
VDDA_12_10
VDDA_12_11
VDDA_12_12
VDDA_12_13
VDDA_18_1
VDDA_18_2
VDDA_18_3
VDDA_18_4
VDDA_18_5
VDDA_18_6
VDDA_18_7
VDDA_18_8
VDDA_18_9
VDDA_18_10
VDDA_18_11
VDDA_18_12
VDDA_18_13
VDD_CORE1
VDD_CORE2
VDD_CORE3
VDD_CORE4
VDD_CORE5
VDD_CORE6
VDD_CORE7
VDD_CORE8
VDD_CORE9
VDD_CORE10
VDD_CORE11
VDD_CORE12
VDD_CORE13
VDD_CORE14
VDD_CORE15
VDD_CORE16
VDD_CORE17
VDD_CORE18
VDD_CORE19
VDD_CORE20
VDD_CORE21
VDD_CORE22
VDD_CORE23
VDD_CORE24
VDD_CORE25
VDD_CORE26
VDD_CORE27
VDD_CORE28
VDD_CORE29
VDD_CORE30
VDD_CORE31
VDD_CORE32
VDD_CORE33
VDD_CORE34
VDD_CORE35
VDD_CORE36
VDD_CORE37
VDD_CORE38
V16
T18
M14
H9
AA7
G9
U8
N7
N8
U7
F9
AA8
G8
G7
J8
J7
B1
AG4
R8
AC8
AC7
AF6
AE6
L8
W8
W7
L7
R7
AF5
AK2
N16
M13
M15
W16
N18
P19
N12
P15
N14
M17
T19
G22
R12
P13
R14
V19
R18
U16
U12
T13
U14
T17
U18
E22
R16
V13
T15
P17
W18
D22
W12
V15
W14
V17
M19
H22
H21
D21
M12
M16
P16
U19
AC16
AG18
AC23
VDDA_12
VDDA12_13
22UF_0805
VDDA18_13
AD8
AD11
AD13
AD16
C515
AD19
AD23
1UF_0402
AG5
AG6
C522
1UF_0402
C520
AG21
AD17
AG15
AG12
AF30
AG24
AG9
AC19
AG27
AC11
AD7
AJ30
AC21
AK5
AK10
AC13
AD21
1UF_0402
1UF_0402
C502
0.1UF_0402
C476
C525
Core_12
C483
0.1UF_0402
1UF_0402
C531
1UF_0402
C479
22UF_0805
C504
VDDA18
C491
0.1UF_0402
1UF_0402
C511
0.1UF_0402
THE CAPS SHOULD PLACE UNDER
NB, ALL GND USE COPPER FLOOD
TOGETHER, AND NB POWER VIA
TREAT AS SAME.
AK22
AK29
W19
C482
1UF_0402
C524
AE26
AE27
1UF_0402
C529
1UF_0402
C424
0.1UF_0402
C505
0.1UF_0402
T27
R27
C521
AD28
F24
F27
G28
VDDA12
22UF_0805 C463
L51
FB_30_3A_0805
C445
0.1UF_0402
C517
1 2
C497
0.1UF_0402
L52
80_6A_0805
+1.8VRUN
L50
80_6A_0805
LVDDR18
LVDDR25 OFF ON ON OFF OFF
+1.2VRUN
+1.2VRUN
ON
ON
ON
ON
ON
ON
VDDA12_13
VDDA18_13
VDDHT30
VDDHT31
PUT DECOUPLING CAPS ON THE TOP, CLOSE
TO BALLS
G3
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Title
RX480-POWER
MSI CORPORATION
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
MS-1039
1
11 46 Thursday, December 01, 2005
0.A
5
4
3
2
1
U6A
GFX_TX0P 9
GFX_TX0N 9
GFX_TX1P 9
GFX_TX1N 9
D D
C C
+3VRUN
B B
A A
+3VRUN
C715
0.1UF_0402
GFX_TX2P 9
GFX_TX2N 9
GFX_TX3N 9
GFX_TX4P 9
GFX_TX4N 9
GFX_TX5P 9 GFX_RX5P 9
GFX_TX5N 9 GFX_RX5N 9
GFX_TX6P 9
GFX_TX6N 9
GFX_TX7P 9
GFX_TX7N 9
GFX_TX8P 9
GFX_TX8N 9
GFX_TX9P 9
GFX_TX9N 9
GFX_TX10P 9
GFX_TX10N 9
GFX_TX11P 9 GFX_RX11P 9
GFX_TX11N 9
GFX_TX12P 9
GFX_TX12N 9
GFX_TX13P 9
GFX_TX13N 9
GFX_TX14P 9
GFX_TX14N 9
GFX_TX15P 9
GFX_TX15N 9
M26CLK 17
M26CLK# 17
M26_RST# 20
R284
4.7K_0402
R281
4.7K_0402
T_CRIT_M26# 34
M26_THRMDC
XIN
OSC_SPREAD
R310
0
C716
1000PF_0402
0 R291
C840
0.1UF_0402
M26_THRMDA
C565
2200P_0402
T_CRIT_M26#
R307 33_0402
R306 10K_0402
AJ31
PCIE_RX0P
AH31
PCIE_RX0N
AH30
PCIE_RX1P
AG30
PCIE_RX1N
AG32
PCIE_RX2P
AF32
PCIE_RX2N
AF31
PCIE_RX3P
AE31
PCIE_RX3N
AE30
PCIE_RX4P
AD30
PCIE_RX4N
AD32
PCIE_RX5P
AC32
PCIE_RX5N
AC31
PCIE_RX6P
AB31
PCIE_RX6N
AB30
PCIE_RX7P
AA30
PCIE_RX7N
AA32
PCIE_RX8P
Y32
PCIE_RX8N
Y31
PCIE_RX9P
W31
PCIE_RX9N
W30
PCIE_RX10P
V30
PCIE_RX10N
V32
PCIE_RX11P
U32
PCIE_RX11N
U31
PCIE_RX12P
T31
PCIE_RX12N
T30
PCIE_RX13P
R30
PCIE_RX13N
R32
PCIE_RX14P
P32
PCIE_RX14N
P31
PCIE_RX15P
N31
PCIE_RX15N
AL28
PCIE_REFCLKP
AK28
PCIE_REFCLKN
AG24
PERSTB
AA24
PCIE_TEST
AF24
PERSTB_MASK
216CPHAKA11F
+3VALW
R528
0
C560
0.1UF_0402
U26
1 8
XIN/CLKIN XOUT
2
VSS
VDD
ModOut
4
5
Y3
VCC
27MHZ
PD# SRS
Ref
4
P1819B_TSSOP8
Clock
2
3
4
Close toM26
OUT
VSS OE
Tie To VSS
11/18
U24
D+
DÂT_CRIT_A#
LM86_SOIC8
XOUT
7
6 3
+3VRUN
5
R309 261R_1%
VGA_27M Z016
3
2 1
PART 1 OF 7
P
C
I
ÂE
X
P
R
E
S
S
I
N
T
E
R
F
A
C
E
SMBCLK VDD
SMBDATA
ALERT#
GND
M10XIN
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
8 1
7
M26_THRM_ALERT#
6
5
1 2
TP144
R308
150R_1%
R298 261R_1%_NC
R303
0
FB_80_3A_0805
C750
1UF_0402
R297
150R_1%_NC
XIN
C718 0.1UF_0402
AK27
C717 0.1UF_0402
AJ27
C702 0.1UF_0402
AJ25
C701 0.1UF_0402
AH25
C727 0.1UF_0402
AH28
C726 0.1UF_0402
AG28
C700 0.1UF_0402
AG27
C699 0.1UF_0402
AF27
C722 0.1UF_0402
AF25
C721 0.1UF_0402
AE25
C693 0.1UF_0402
AE28
C694 0.1UF_0402
AD28
C725 0.1UF_0402
AD27
C724 0.1UF_0402
AC27
C698 0.1UF_0402
AC25
C697 0.1UF_0402
AB25
C729 0.1UF_0402
AB28
C728 0.1UF_0402
AA28
C696 0.1UF_0402
AA27
C695 0.1UF_0402
Y27
C720 0.1UF_0402
Y25
C719 0.1UF_0402
W25
C712 0.1UF_0402
W28
C711 0.1UF_0402
V28
C730 0.1UF_0402
V27
C731 0.1UF_0402
U27
C710 0.1UF_0402
U25
C709 0.1UF_0402
T25
C733 0.1UF_0402
T28
C734 0.1UF_0402
R28
C708 0.1UF_0402
R27
C707 0.1UF_0402
P27
R292 2K_1%_0402
AE24
R293 562_1%0402
AD24
R299
AB24
L69
1.47K_1%
SMB_THRMM26_CLK
SMB_THRMM26_DATA
M26_THRM_ALERT#
T_CRIT_M26#
SMB_THRMM26_CLK 23
SMB_THRMM26_DATA 23
+3VRUN
C751
1000PF_0402
M10XIN
1 2
3 4
5 6
7 8
+2.5VRUN
30ohm_0.5A_0603
M26_CORE
30ohm_0.5A_0603
4
GFX_RX0P 9
GFX_RX0N 9
GFX_RX1P 9
GFX_RX1N 9
GFX_RX2P 9
GFX_RX2N 9
GFX_RX3P 9 GFX_TX3P 9
GFX_RX3N 9
GFX_RX4P 9
GFX_RX4N 9
GFX_RX6P 9
GFX_RX6N 9
GFX_RX7P 9
GFX_RX7N 9
GFX_RX8P 9
GFX_RX8N 9
GFX_RX9P 9
GFX_RX9N 9
GFX_RX10P 9
GFX_RX10N 9
GFX_RX11N 9
GFX_RX12P 9
GFX_RX12N 9
GFX_RX13P 9
GFX_RX13N 9
GFX_RX14P 9
GFX_RX14N 9
GFX_RX15P 9
GFX_RX15N 9
+1.2VRUN
RN57
10K_8P4R_0402
L61
1 2
JP8
1 2
SHORT
L56
1 2
JP6
1 2
SHORT
+3VALW
+3VSUS
DDC3DATA 32
DDC3CLK 32
+3VRUN
R268
0
+3VRUN
C597
10UF_0805
C554
10UF_0805
POW_SW 41
100R_1%_0402
C596
1UF_0402
C558
1UF_0402
M10XIN
R271
R270
TP3
TP89
TP2
TP97
TP90
TP95
TP98
TP92
100R_1%_0402 R267
VRAM_ID0
VRAM_ID1
+3VRUN
6.8K
R80 0
R79 0_NC
R286 1K_1%
PVDD
C595
0.1UF_0402
PVSS
MPVDD
C557
0.1UF_0402
MPVSS
TP112
TP109
TP107
TP104
TP103
TP106
TP99
TP101
TP91
TP94
TP100
TP110
TP105
TP96
TP108
TP115
TP114
TP87
TP88
R46 10K_1%
R39 10K_1%
R45 10K_1%
R38 10K_1%
R259
6.8K
TX_PWRS_EN#
TX_DEEMPH_EN
PCIE_MODE0
PCIE_MODE1
GPIO5
TMDS_EN
POW_SW
OSC_SPREAD
TP102
M26_THRMDA
M26_THRMDC
PVDD
PVSS
MPVDD
MPVSS
U6B
AF10
GPIO_18
AG10
GPIO_19
AH9
GPIO_20
AJ8
GPIO_21
AH8
GPIO_22
AG9
GPIO_23
AH7
GPIO_24
AG8
GPIO_25
AF7
GPIO_26
AH6
GPIO_27
AF8
GPIO_28
AE10
GPIO_29
AE9
GPIO_30
AG7
GPIO_31
AF9
GPIO_32
AE13
GPIO_33
AF13
GPIO_34
AK4
DVOVMODE_0
AL4
DVOVMODE_1
AF2
DVPCNTL_0
AF1
DVPCNTL_1
AF3
DVPCNTL_2
AG1
DVPCLK
AG2
DVPDATA_0
AG3
DVPDATA_1
AH2
DVPDATA_2
AH3
DVPDATA_3
AJ2
DVPDATA_4
AJ1
DVPDATA_5
AK2
DVPDATA_6
AK1
DVPDATA_7
AK3
DVPDATA_8
AL2
DVPDATA_9
AL3
DVPDATA_10
AM3
DVPDATA_11
AE6
DVPDATA_12
AF4
DVPDATA_13
AF5
DVPDATA_14
AG4
DVPDATA_15
AJ3
DVPDATA_16
AH4
DVPDATA_17
AJ4
DVPDATA_18
AG5
DVPDATA_19
AH5
DVPDATA_20
AF6
DVPDATA_21
AE7
DVPDATA_22
AG6
DVPDATA_23
AD4
GPIO_0
AD2
GPIO_1
AD1
GPIO_2
AD3
GPIO_3
AC1
GPIO_4
AC2
GPIO_5
AC3
GPIO_6
AB2
GPIO_7
AC6
GPIO_8
AC5
GPIO_9
AC4
GPIO_10
AB3
GPIO_11
AB4
GPIO_12
AB5
GPIO_13
AD5
GPIO_14
AB8
GPIO_15
AA8
GPIO_16
AB7
GPIO_17
AB6
NC_AB6
AC8
VREFG
AG12
DPLUS
AH12
DMINUS
AJ14
PVDD
AH14
PVSS
A6
MPVDD
A5
MPVSS
AL26
XTALIN
AM26
XTALOUT
AG14
PLLTEST
AG22
TESTEN
AC7
ROMCSb
AK17
LVSSR_1
AJ19
LVSSR_2
AF18
LVSSR_3
AH17
LVSSR_4
AG17
LVSSR_5
AG19
LVSSR_6
AH19 AF21
LVSSR_7 LVSSR_8
216CPHAKA11F
+3VRUN
R260 10K_0402
R43 10K_0402
R44 10K_0402
R40 10K_0402_NC
R41 10K_0402_NC
R516 10K_0402
3
General
Purpose
I/O
Thermal
Diode
PLL &
XTAL
Test
ROM
LVDS PLL
and I/O
GND
PART 2 OF 7
V
I
D
E
O
Expand GPIO
&
M
U
L
T
I
M
E
D
I
A
VIP Host/External
TMDS
External
SSC
LVDS PLL
and I/O
GND
Integrated
TMDS
TPVDD
TPVSS
TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4
TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5
DAC / CRT
HSYNC
VSYNC
STEREOSYNC
GENERICB
AVDD_1
AVDD_2
AVSSQ
AVSSN_1
AVSSN_2
VDD1DI
VSS1DI
DAC2 (TV/CRT2)
H2SYNC
V2SYNC
R2SET
A2VDD_1
A2VDD_2
A2VSSN_1
A2VSSN_2
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
Monitor
Interface
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
GENERICC
LPVSS
LVSSR_10
LVSSR_9
TMDS_EN
TX_PWRS_EN#
TX_DEEMPH_EN
PCIE_MODE0
PCIE_MODE1
GPIO5
AL9
TXCM
AM9
TXCP
AK10
TX0M
AL10
TX0P
AL11
TX1M
AM11
TX1P
AL12
TX2M
AM12
TX2P
AK9
TX3M
AJ9
TX3P
AK11
TX4M
AJ11
TX4P
AK12
TX5M
AJ12
TX5P
RSET
COMP
HPD1
TPVDD
AM8
TPVSS
AL8
AJ6
AK6
AL6
AM6
AJ7
AK7
AL7
AM7
AK8
AK24
R
AM24
G
AL24
B
AJ23
AJ22
AK22
AF23
AL22
AL25
AM25
AK23
AK25
AJ24
AM23
AL23
AK15
R2
AM15
G2
AL15
B2
AF15
AG15
AJ15
Y
AJ13
C
AH15
AK14
AM16
AL16
AM17
AL17
AL14
AK13
AJ16
AJ17
AF11
AH22
AH23
AH13
AG13
AE12
AF12
AE23
AE18
AF22
AF17
TXVDDR
C92
1000PF_0402
R71 10K_1%
1K_1% R289
R73 499R_1%
AVDD
C124
1000PF_0402
AVSSN
M26_VDD_DI
M26_VSS_DI
H2SYNC
V2SYNC
715R_1% R67
A2VDD
A2VSSN
A2VDDQ
A2VSSQ
M26_VDD_DI
M26_VSS_DI
TP124
TP125
TP111
TP113
GND_LPVSS
1K_1% R285
GND_LVSSR GND_LVSSR
Internal TMDS Enable
Transmitter Full Tx output swing
Transmitter De-emphasis Enable
PCI-E mode selection
R52 330_0402
R57 330_0402
R62 330_0402
R65 330_0402
C556
1UF_0402
C91
0.1UF_0402
HSYNC
VSYNC
0.1UF_0402
C117
1000PF_0402
TP118
TP116
C108
1000PF_0402
HPD1 32
DAC_SDAT 32
DAC_SCL 32
GND_LPVSS 14
2
L57
C555
10UF_0805
L13
C94
10UF_0805
ROUT 32
GOUT 32
BOUT 32
HSYNC# 32
VSYNC# 32
C123
C116
0.1UF_0402
TV_Y_G 32
TV_C_R_PR 32
TV_COMP_B_PB 32
C109
0.1UF_0402
GND_LVSSR 14
RTCVCC 20
0_0402 R51
0_0402 R53
0_0402 R54
0_0402 R56
0_0402 R59
0_0402 R63
0_0402 R64
0_0402 R66
1 2
30ohm_0.5A_0603
1 2
SHORT
1 2
30ohm_0.5A_0603
JP2
1 2
SHORT
1 2
C126
10UF_0805
SHORT
C115
C107
VRAM_ID0
VRAM_ID1
RTCVCC
TXCM 32
TXCP 32
TX0M 32
TX0P 32
TX1M 32
TX1P 32
TX2M 32
TX2P 32
+2.5VRUN
JP5
+2.5VRUN
L17
30ohm_0.5A_0603
JP4
1 2
L16 30ohm_0.5A_0603
10UF_0805
10UF_0805
+2.5VRUN
1 2
L14
1 2
30ohm_0.5A_0603
JP3
1 2
SHORT
A2VDDQ
A2VSSQ
1UF_0402_NC
Title
M26-X_HOST INTERFACE
Size Document Number Rev
C
Date: Sheet of
M56 TPVDD
LPVDD
TXVDDR
PVDD
A2VDD
VDD*DI
AVDD =2.5V
+2.5VRUN
+2.5VRUN
M56 A2VDDQ=NC
C581
0.1UF_0402_NC
1 2
3 4
5 6
7 8
C582
+3VRUN
RN56
10K_8P4R_0402
1 2
C583
10UF_0805_NC
SW2
1
2
3
4
hch_hds4-04-e_sw-dip_NC
MSI CORPORATION
MS-1039
1
1 2
8
7
6
5
12 46 Thursday, December 01, 2005
+2.5VRUN
JP7
SHORT
L60
30ohm_0.5A_0603_NC
0.A
A
B
C
D
E
RV410 MEMORY CHANNELS A and B
4 4
MDA[63..0] 15
3 3
+1.8VRUN
R302
40.2_1%_0402
CHECK DDR3
2 2
R301
100R_1%_0402
+1.8VRUN
R82
40.2_1%_0402
MVREFS
R81
100R_1%_0402
MDA[63..0]
C689
0.1UF_0402
CHECK DDR3
MVREFD
C547
0.1UF_0402
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
U6C
M31
M30
L31
L30
H30
G31
G30
F31
M27
M29
L28
L27
J27
H29
G29
G27
M26
L26
M25
L25
J25
G28
H27
H26
F26
G26
H25
H24
H23
H22
J23
J22
E23
D22
D23
E22
E20
F20
D19
D18
B19
B18
C17
B17
C14
B14
C13
B13
D17
E18
E17
F17
E15
E14
F14
D13
H18
H17
G18
G17
G15
G14
H14
J14
C31
C30
216CPHAKA11F
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
MVREFD_0
MVREFS_0
Channel A
Part 3 of 7
MEMORY INTERFACE
A
DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7
write strobe read strobe
CSA0b_0
CSA0b_1
CSA1b_0
CSA1b_1
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B
ODTA
ODTA1
CLKA0
CLKA0b
CKEA0
RASA0b
CASA0b
WEA0b
CLKA1
CLKA1b
CKEA1
RASA1b
CASA1b
WEA1b
MAA[11..0] 15
MAA0 MAB1
D26
MAA1
F28
MAA2
D28
MAA3
D25
MAA4
E24
E26
D27
F25
C26
B26
D29
B27
B25
C25
E27
E29
H31
J29
J26
G23
E21
B15
D14
J17
J31
K29
K25
F23
D20
B16
D16
H15
K31
K28
K26
G24
D21
C16
D15
J15
F29
D24
D31
E31
B30
B28
C29
B31
B29
C28
B20
C19
C22
B24
B22
B21
B23
C23
MAA5
MAA6
MAA7
MAA8
MAA9
MAA11
MAA14
MAA15
MAA13
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4 MDA33
QSA5
QSA6
QSA7
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
RASA#
CASA#
WEA#
CSA#0
RASA#1
CASA#1
WEA#1
CSA#1_0
TP127
CLKA0 15
CLKA#0 15
CKEA 15
RASA# 15
CASA# 15
WEA# 15
CSA#0 15
CLKA1 15
CLKA#1 15
CKEA1 15
RASA#1 15
CASA#1 15
WEA#1 15
CSA#1_0 15
M56 B25 MAA14
M56 C25 MAA15
M56 E27 MAA12
M56 E29 MAA13
MAA14 15
MAA15 15
MAA13 15
DQMA#[7..0] 15
QSA[7..0] 15
QSA#[7..0] 15
+1.8VRUN
R274
40.2_1%_0402
CHECK DDR3
R275
100R_1%_0402
+1.8VRUN
R273
40.2_1%_0402
R272
100R_1%_0402
MDB[63..0] 16
C552
0.1UF_0402
C546
0.1UF_0402
MVREFD_1
MVREFS_1
NI
R262 4.7K_0402
R269 4.7K_0402
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16 MDA15
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
TEST_MCLK
TEST_YCLK
R42 4.7K_0402
R261 243_1%_0402
U6D
B12
DQB_0
C12
DQB_1
B11
DQB_2
C11
DQB_3
C8
DQB_4
B7
DQB_5
C7
DQB_6
B6
DQB_7
F12
DQB_8
D12
DQB_9
E11
DQB_10
F11
DQB_11
F9
DQB_12
D8
DQB_13
D7
DQB_14
F7
DQB_15
G12
DQB_16
G11
DQB_17
H12
DQB_18
H11
DQB_19
H9
DQB_20
E7
DQB_21
F8
DQB_22
G8
DQB_23
G6
DQB_24
G7
DQB_25
H8
DQB_26
J8
DQB_27
K8
DQB_28
L8
DQB_29
K9
DQB_30
L9
DQB_31
K5
DQB_32
L4
DQB_33
K4
DQB_34
L5
DQB_35
N5
DQB_36
N6
DQB_37
P4
DQB_38
R4
DQB_39
P2
DQB_40
R2
DQB_41
T3
DQB_42
T2
DQB_43
W3
DQB_44
W2
DQB_45
Y3
DQB_46
Y2
DQB_47
T4
DQB_48
R5
DQB_49
T5
DQB_50
T6
DQB_51
V5
DQB_52
W5
DQB_53
W6
DQB_54
Y4
DQB_55
R8
DQB_56
T8
DQB_57
R7
DQB_58
T7
DQB_59
V7
DQB_60
W7
DQB_61
W8
DQB_62
W9
DQB_63
B3
MVREFD_1
C3
MVREFS_1
AA3
DRAM_RST
AA5
TEST_MCLK
AA2
TEST_YCLK
AA7
MEMTEST
216CPHAKA11F
Channel B
Part 4 of 7
MEMORY INTERFACE
MAB[11..0] 16
MAB0
G4
MAB_0
E6
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15
DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
B
DQMBb_7
QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7
QSB_0B
QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B
write strobe read strobe
ODTB
ODTB1
CLKB0
CLKB0b
CKEB0
RASB0b
CASB0b
WEB0b
CSB0b_0
CSB0b_1
CLKB1
CLKB1b
CKEB1
RASB1b
CASB1b
WEB1b
CSB1b_0
CSB1b_1
E4
H4
J5
G5
F4
H6
G3
G2
D4
F2
H2
H3
F5
D5
B8
D9
G9
K7
M5
V2
W4
T9
B9
D10
H10
K6
N4
U2
U4
V8
B10
E10
G10
J7
M4
U3
V4
V9
D6
J4
B4
B5
C2
E2
D3
B2
D2
E3
N2
P3
L3
J2
L2
M2
K2
K3
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11 MAA10
MAB14
MAB15
MAB13
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
RASB#
CASB#
WEB#
CSB#0
RASB#1
CASB#1
WEB#1
CSB#1_0
TP93
M56 H2 MAB14
M56 H3 MAB15
M56 F5 MAB12
M56 D5 MAB13
MAB14 16
MAB15 16
MAB13 16
CKEB1 16
RASB#1 16
CASB#1 16
WEB#1 16
CSB#1_0 16
DQMB#[7..0] 16
QSB[7..0] 16
QSB#[7..0] 16
CLKB0 16
CLKB#0 16
CKEB 16
RASB# 16
CASB# 16
WEB# 16
CSB#0 16
CLKB1 16
CLKB#1 16
RESET
RESET 15,16
1 1
Title
M26-X_MEM INTERFACE
Size Document Number Rev
C
A
B
C
D
Date: Sheet of
MSI CORPORATION
MS-1039
E
13 46 Thursday, December 01, 2005
0.A
A
2400mA NOT INCLUDED VRAM
C106
C542
C579
22UF_0805
4 4
C563
C553
1UF_0402
1UF_0402
3 3
+3VRUN
+3VRUN
+1.8VRUN
2 2
0.1UF_0402
EMIC159
1 1
1UF_0402
1UF_0402
C713
22UF_0805
C572
22UF_0805
C540
1UF_0402
+3VRUN
1 2
L12 FB_220_0.2A
1 2
L10 FB_220_0.2A
1 2
L11
FB_220_0.2A
M26_CORE
C830
1UF_0402
1UF_0402
C561
1UF_0402
C578
22UF_0805
C114
1UF_0402
C50
C609
1UF_0402
L18
1UF_0402
1 2
C831
1UF_0402
A
C569
1UF_0402
C566
1UF_0402
1UF_0402
C543
C100
1UF_0402
1UF_0402
C589
C603
1UF_0402
1UF_0402
C564
1UF_0402
VDDR4 for DVPDATA[12..23]
FB_220_0.2A
1 2
C76
C84
1UF_0402
JP1
SHORT
C833
1UF_0402
C671
C650
C573
1UF_0402
1UF_0402
C692
1UF_0402
C612
1UF_0402
1UF_0402
C89
1UF_0402
VDDR5 for DVPDATA[0..11]
1UF_0402
C127
1UF_0402
M26_CORE
C619
1UF_0402
C580
1UF_0402
C608
C90
0.1UF_0402
C71
0.1UF_0402
C128
1UF_0402
M56 OFFSET
+2.5VRUN
C690
1UF_0402
C568
1UF_0402
C1
J1
M1
R1
V1
AA1
A3
P9
J10
N9
P10
A9
Y10
P8
R9
Y9
J11
A21
M10
N10
Y8
J18
J19
K21
A12
H13
A15
J20
J13
K11
K19
A18
L23
K20
K24
L24
H19
A24
K13
J32
A30
C32
F32
L32
AB9
AB10
AA9
AC19
AD18
AC20
AD19
AD20
AJ5
AM5
AL5
AK5
AE2
AE3
AE4
AE5
A27
F1
A28
E1
CHECK FAE
M56 VDD25=2.5V
U6E
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_45
VDDR1_46
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
VDDR5_1
VDDR5_2
VDDR5_3
VDDR5_4
VDDRH0
VDDRH1
VSSRH0
VSSRH1
216CPHAKA11F
1UF_0402
C638
10UF_0805
B
C637
B
I/O
Clock
C571
1UF_0402
1UF_0402
PART 5 OF 7
Memory I/O
I/0
Memory
C576
C
L20
30ohm_3A_0805
C139
C636
22UF_0805
1UF_0402
C714
C732
C704
22UF_0805
1UF_0402
C133
1UF_0402
C606
1UF_0402
C131
1UF_0402
C602
1UF_0402
C614
1UF_0402
22UF_0805
C600
1UF_0402
C138
C598
1UF_0402
C615
1UF_0402
M56 LPVDD=2.5V
C607
1UF_0402
C635
1UF_0402
AD12
AE11
AD23
AJ21
AK21
AH21
AG21
AG20
AH20
AK20
AJ20
AG18
AH18
AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AL18
AM18
C642
1UF_0402
C634
0.1UF_0402
GND_LVSSR
+2.5VRUN
LVDS_TXUCKP 32
LVDS_TXUCKN 32
LVDS_TXU2P 32
LVDS_TXU2N 32
LVDS_TXU1P 32
LVDS_TXU1N 32
LVDS_TXU0P 32
LVDS_TXU0N 32
LVDS_TXL0N 32
LVDS_TXL0P 32
LVDS_TXL1N 32
LVDS_TXL1P 32
LVDS_TXL2N 32
LVDS_TXL2P 32
LVDS_TXLCKN 32
LVDS_TXLCKP 32
30ohm_3A_0805
L68
2000mA
22UF_0805
C592
1UF_0402
C588
1UF_0402
C593
C584
22UF_0805
22UF_0805 C77
1 2
C640
22UF_0805
R264
10K_1%
LVDS_BLON 32
LVDS_DIGON 32
TP123
TP122
TP4
TP120
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDD15_1
VDD15_2
VDD15_3
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_5
VDDCI_6
VDDCI_7
VDDCI_8
V23
N23
P23
U23
N29
N28
N27
N26
N25
AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27
AC11
AC12
P14
U15
W14
W15
R17
R15
V15
V16
T16
U16
T17
U17
V14
R18
T18
V18
P18
P19
R19
W19
AD11
AC13
AC16
AC18
W10
T14
W17
P16
AC15
T23
K14
U19
AE19
AF20
AE20
AF19
AC21
AC22
AD22
AE21
AD21
AE22
M56 N25~N29 PCIE_VDDR12
1UF_0402
C132
1UF_0402
1UF_0402
M56 AC13 16 18 VDD25
C644
1UF_0402
C112
1UF_0402
JP9
GND_LPVSS
1 2
M56 AF19 20 AE20 =LVDDR=2.5V
SHORT
PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4
PCIE_PVDD_18_1
PCIE_PVDD_18_2
PCIE_PVDD_18_3
PCIE_PVDD_18_4
PCIE_PVDD_18_5
PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCI-Express
PCIE_VDDR_12_8
PCIE_VDDR_12_9
P
O
W
E
R
LPVDD/VDDL0
LVDDR_18/VDDL0_1
LVDDR_18/VDDL0_2
LVDDR_18/VDDL0_3
LVDDR_25/VDDL1_1
LVDDR_25/VDDL1_2
LVDDR_25/VDDL1_3
LVDDR_25/VDDL2_1
LVDDR_25/VDDL2_2
LVDDR_25/VDDL2_3
LVDS PLL, I/O I/O Internal Core
200mA
C643
0.1UF_0402
BLON
DIGON
GENERICD
TXCLK_UP
TXCLK_UN
TXOUT_U3P
TXOUT_U3N
TXOUT_U2P
TXOUT_U2N
TXOUT_U1P
TXOUT_U1N
TXOUT_U0P
TXOUT_U0N
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
Y23
K15
R10
AC17
AC14
M23
V10
K18
L10
K22
AA10
U6G
Forward
Compatibility
BBN_4
BBN_3
BBN_2
BBN_1
BBP_4
BBP_3
BBP_2
BBP_1
VDD25B_1
VDD25B_2
VDD25A
216CPHAKA11F
JP10
GND_LVSSR
1 2
SHORT
PART 7 OF 7
Control and External SSC
LVDS channel
C641
1UF_0402
C
C141
1UF_0402
1UF_0402
M26_CORE
C610
L66
FB_220_0.2A
100mA
L19
30ohm_3A_0805
18A MARGIN
C587
C601
1UF_0402
C585
C586
1UF_0402
+2.5VRUN
C113
22UF_0805
L65
1 2
FB_220_0.2A
GND_LPVSS 12
+2.5VRUN
GND_LVSSR 12
R283
10K_1%
L15
1 2
30ohm_0.5A_0603
+1.2VRUN
C616
22UF_0805
C594
1UF_0402
+2.5VRUN
D
+1.2VRUN +1.8VRUN
22UF_0805
+1.2VRUN
D
M26_CORE
C611
AH27
AC23
AL27
R23
P25
R25
U26
W26
AB26
AC26
AD25
AE26
AF26
AD26
AG25
AH26
AC28
U28
P28
AH29
AF28
V29
AC29
W27
AB27
V26
AJ26
AJ32
AK29
P26
P29
R29
U29
W29
AA29
AB29
AD29
AE29
AF29
AG29
AJ29
AK26
AK30
AG26
N30
R31
AF30
AC30
V31
P30
AA31
U30
AD31
AK32
AJ28
AJ30
AK31
AA23
AG31
N24
W23
AB23
P24
R24
U24
V24
W24
AC24
AH24
V25
AA25
R26
AA26
AE27
AD7
AE8
AL1
AM2
AD10
K10
E12
AC9
AF14
AD8
AA4
AG11
AG16
T26
Y26
Y28
T29
Y29
Y30
T24
Y24
T27
T10
F10
B1
H1
L1
P1
U1
Y1
A2
E8
H5
M8
C5
J3
L6
M6
P6
V3
R3
C6
C9
F6
H7
J6
U6F
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43
PCIE_VSS_44
PCIE_VSS_45
PCIE_VSS_46
PCIE_VSS_47
PCIE_VSS_48
PCIE_VSS_49
PCIE_VSS_50
PCIE_VSS_51
PCIE_VSS_52
PCIE_VSS_53
PCIE_VSS_54
PCIE_VSS_55
PCIE_VSS_56
PCIE_VSS_57
PCIE_VSS_58
PCIE_VSS_59
PCIE_VSS_60
PCIE_VSS_61
PCIE_VSS_62
PCIE_VSS_63
PCIE_VSS_64
PCIE_VSS_65
PCIE_VSS_66
PCIE_VSS_67
PCIE_VSS_69
PCIE_VSS_70
PCIE_VSS_71
PCIE_VSS_72
PCIE_VSS_73
PCIE_VSS_74
PCIE_VSS_75
PCIE_VSS_76
PCIE_VSS_77
PCIE_VSS_78
PCIE_VSS_79
PCIE_VSS_80
PCIE_VSS_81
PCIE_VSS_82
PCIE_VSS_83
PCIE_VSS_84
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
216CPHAKA11F
E
Part 6 of 7
AD16
VSS_45
AA6
VSS_44
P7
VSS_43
P5
VSS_42
M3
VSS_41
M9
VSS_40
L7
VSS_39
M7
VSS_38
AD17
VSS_47
AH11
VSS_48
A8
VSS_49
U7
VSS_50
C10
VSS_51
E9
VSS_52
F3
VSS_53
J9
VSS_54
N7
VSS_55
N3
VSS_56
Y5
VSS_57
AM13
VSS_58
AC10
VSS_59
Y6
VSS_60
U6
VSS_61
E5
VSS_62
AL13
VSS_63
A11
VSS_64
U8
VSS_65
PCI-Express GND
CORE GND
Title
M26-X_POWER
Size Document Number Rev
C
Date: Sheet of
MSI CORPORATION
MS-1039
E
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_163
VSS_164
VSS_165
14 46 Thursday, December 01, 2005
U9
U10
R6
AD6
V6
AD14
AD13
D11
J12
K12
A13
F13
E13
F15
K16
J21
H16
T15
V17
C15
C4
U14
P15
A16
E16
G13
G16
P17
R16
R14
W16
C18
F16
W18
U18
AE16
AE17
A19
H32
F19
G19
N8
Y7
T19
V19
G21
C21
F21
AE14
AK16
U5
F22
F18
K30
C24
F24
M24
A25
D30
E25
G25
G20
G22
F27
E28
H21
C27
E32
H28
J30
K17
K27
M32
A22
C20
E19
H20
J24
M28
J28
J16
F30
K23
L29
A31
B32
E30
AE15
AG23
AD9
AF16
AH10
AJ10
AD15
AH16
0.A