Motorola MVME2603-1131A, MVME2603-2141A, MVME2603-2121A, MVME2603-2131A, MVME2603-2191A Installation And Use Manual

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MVME2600 Series

Single Board Computer

Installation and Use

V2600A/IH2

Notice

While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.

No part of this material may be reproduced or copied in any tangible medium, or stored in a retrieval system, or transmitted in any form, or by any means, radio, electronic, mechanical, photocopying, recording or facsimile, or otherwise, without the prior written permission of Motorola, Inc.

It is possible that this publication may contain reference to, or information about Motorola products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that Motorola intends to announce such Motorola products, programming, or services in your country.

Restricted Rights Legend

If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply unless otherwise agreed to in writing by Motorola, Inc.

Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the Rights in Technical Data and Computer Software clause at DFARS 252.227-7013.

Motorola, Inc.

Computer Group

2900 South Diablo Way

Tempe, Arizona 85282

Preface

The

MVME2600 Series Single Board Computer Installation and Use

general information, hardware preparation and installation instructions, operating instructions, a functional description, and various types of interfacing information for the MVME2603/MVME2604 family of Single Board Computers.The information in this manual applies to the following MVME2603/MVME2604 models.

MVME2603-1121A MVME2603-1131A MVME2603-1141A MVME2603-1191A MVME2603-2121A MVME2603-2131A MVME2603-2141A MVME2603-2191A MVME2604-1021A MVME2604-1031A MVME2604-1041A MVME2604-1091A MVME2604-1121A MVME2604-1131A MVME2604-1141A MVME2604-1191A MVME2604-2021A MVME2604-2031A MVME2604-2041A MVME2604-2091A MVME2604-2121A MVME2604-2131A MVME2604-2141A MVME2604-2191A

This manual is intended for anyone who wants to supply OEM systems, add capability to an existing compatible system, or work in a lab environment for experimental purposes. A basic knowledge of computers and digital logic is assumed.

manual provides

After using this manual, you may wish to become familiar with the publications listed in the

Motorola

Related Documentation

and the Motorola symbol are registered trademarks of Motorola, Inc.

section in Appendix A of this manual.

AIXª is a trademark of IBM Corp.

PowerPCª is a trademark of IBM Corp. and is used by Motorola with permission.

All other products mentioned in this document are trademarks or registered trademarks of their respective holders.

Printed in the United States of America

May 1998

Safety Summary

Safety Depends On You

The following general safety precautions must be observed during all phases of operation, service, and repair of this equipment. Failure to comply with these precautions or with speciÞc warnings elsewhere in this manual violates safety standards of design, manufacture, and intended use of the equipment. Motorola, Inc. assumes no liability for the customer's failure to comply with these requirements.

The safety precautions listed below represent warnings of certain dangers of which Motorola is aware. You, as the user of the product, should follow these warnings and all other safety precautions necessary for the safe operation of the equipment in your operating environment.

Ground the Instrument.

To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical ground. The equipment is supplied with a three-conductor AC power cable. The power cable must be plugged into an approved three-contact electrical outlet. The power jack and mating plug of the power cable must meet International Electrotechnical Commission (IEC) safety standards.

Do Not Operate in an Explosive Atmosphere.

Do not operate the equipment in the presence of ßammable gases or fumes. Operation of any electrical equipment in such an environment constitutes a deÞnite safety hazard.

Keep Away From Live Circuits.

Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other qualiÞed maintenance personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment. Do not replace components with power cable connected. Under certain conditions, dangerous voltages may exist even with the power cable removed. To avoid injuries, always disconnect power and discharge circuits before touching them.

Do Not Service or Adjust Alone.

Do not attempt internal service or adjustment unless another person capable of rendering Þrst aid and resuscitation is present.

Use Caution When Exposing or Handling the CRT.

Breakage of the Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implosion). To prevent CRT implosion, avoid rough handling or jarring of the equipment. Handling of the CRT should be done only by qualiÞed maintenance personnel using approved safety mask and gloves.

Do Not Substitute Parts or Modify Equipment.

Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized modiÞcation of the equipment. Contact your local Motorola representative for service and repair to ensure that safety features are maintained.

Dangerous Procedure Warnings.

Warnings, such as the example below, precede potentially dangerous procedures throughout this manual. Instructions contained in the warnings must be followed. You should also employ all other safety precautions which you deem necessary for the operation of the equipment in your operating environment.

Dangerous voltages, capable of causing death, are

WARNING

present in this equipment. Use extreme caution when handling, testing, and adjusting.

All Motorola PWBs (printed wiring boards) are manufactured by UL-recognized manufacturers, with a ßammability rating of 94V-0.

This equipment generates, uses, and can radiate electro-

WARNING

magnetic energy. It may cause or be susceptible to electro-magnetic interference (EMI) if not installed and used in a cabinet with adequate EMI protection.

If any modifications are made to the product, the modifier assumes responsibility for radio frequency interference issues. Changes or modifications not expressly approved by Motorola Computer Group could void the userÕs authority to operate the equipment.

European Notice: Board products with the CE marking comply with the EMC Directive (89/336/EEC). Compliance with this directive implies conformity to the following European Norms:

EN55022 (CISPR 22) Radio Frequency Interference

EN50082-1 (IEC801-2, IEC801-3, IEEC801-4) Electromagnetic Immunity

This board product was tested in a representative system to show compliance with the above mentioned requirements. A proper installation in a CE-marked system will maintain the required EMC/safety performance.

For minimum RF emissions, it is essential that you implement the following conditions:

1. Install shielded cables on all external I/O ports.

2. Connect conductive chassis rails to earth ground to provide a path for connecting shields to earth ground.

3. Tighten all front panel screws.

Contents

Chapter 1 Hardware Preparation and Installation

Introduction ..........................................................................................................1-1

Equipment Required............................................................................................1-3

Overview of Startup Procedure .........................................................................1-4

Unpacking Instructions.......................................................................................1-5

Hardware ConÞguration.....................................................................................1-5

MVME2603/2604 Base Board Preparation.......................................................1-6

Cache Mode Control (J3) ..............................................................................1-7

Flash Bank Selection (J10).............................................................................1-7

Serial Port 4 Receive Clock ConÞguration (J16)........................................1-9

Serial Port 4 Transmit Clock ConÞguration (J17)....................................1-11

Serial Port 4 Transmit Clock Receiver Buffer Control (J20) ...................1-12

Serial Port 3 Transmit Clock ConÞguration (J18)....................................1-13

System Controller Selection (J22) ..............................................................1-14

Remote Status and Control.........................................................................1-14

MVME712M Transition Module Preparation ................................................1-15

Serial Ports 1-4 DCE/DTE ConÞguration................................................1-17

Serial Port 4 Clock ConÞguration..............................................................1-17

P2 Adapter Preparation ..............................................................................1-24

MVME761 Transition Module Preparation ....................................................1-25

Serial Ports 1 and 2 ......................................................................................1-27

ConÞguration of Serial Ports 3 and 4........................................................1-27

P2 Adapter Preparation (Three-Row).......................................................1-32

P2 Adapter Preparation (Five-Row)..........................................................1-34

Hardware Installation........................................................................................1-35

ESD Precautions...........................................................................................1-35

RAM200 Memory Mezzanine Installation .....................................................1-36

PMC Module Installation..................................................................................1-38

PMC Carrier Board Installation .......................................................................1-40

MVME2603/2604 VMEmodule Installation...................................................1-42

MVME712M Transition Module Installation .................................................1-44

MVME761 Transition Module Installation .....................................................1-48

System Considerations ......................................................................................1-50

MVME2603/2604 VMEmodule .................................................................1-52

vii

Chapter 2 Operating Instructions

Introduction .......................................................................................................... 2-1

Applying Power...................................................................................................2-1

ABORT Switch (S1) ....................................................................................... 2-2

RESET Switch (S2)......................................................................................... 2-3

Front Panel Indicators (DS1 - DS6) .............................................................2-4

Memory Maps ......................................................................................................2-5

Processor Memory Map................................................................................2-5

Default Processor Memory Map 2-5

PCI Local Bus Memory Map........................................................................ 2-6

VMEbus Memory Map ................................................................................. 2-7

Programming Considerations............................................................................ 2-7

PCI Arbitration .............................................................................................. 2-9

Interrupt Handling...................................................................................... 2-10

DMA Channels............................................................................................. 2-12

Sources of Reset ........................................................................................... 2-12

Endian Issues ...............................................................................................2-13

Processor/Memory Domain 2-14

PCI Domain 2-14

VMEbus Domain 2-15

Chapter 3 Functional Description

Introduction .......................................................................................................... 3-1

Features .................................................................................................................3-1

General Description............................................................................................. 3-3

Block Diagram ...................................................................................................... 3-5

SCSI Interface................................................................................................. 3-6

SCSI Termination 3-6

Ethernet Interface .......................................................................................... 3-7

PCI Mezzanine Interface ..............................................................................3-8

VMEbus Interface..........................................................................................3-9

ISA Super I/O Device (ISASIO) .................................................................. 3-9

Asynchronous Serial Ports 3-11

Parallel Port 3-11

Disk Drive Controller 3-12

Keyboard and Mouse Interface 3-12

PCI-ISA Bridge (PIB) Controller................................................................ 3-12

viii

Real-Time Clock/NVRAM/Timer Function ...........................................3-13

Programmable Timers.................................................................................3-14

Interval Timers 3-14 16-Bit Timers 3-15

Serial Communications Interface ..............................................................3-15

Z8536 CIO Device 3-16

Base Module Feature Register ...................................................................3-16

P2 Signal Multiplexing................................................................................3-17

ABORT Switch (S1)......................................................................................3-18

RESET Switch (S2) .......................................................................................3-19

Front Panel Indicators (DS1 - DS6)............................................................3-19

Polyswitches (Resettable Fuses) ................................................................3-20

I/O Power ............................................................................................. 3-20

Speaker Control............................................................................................3-21

PM603/604 Processor..................................................................................3-21

Flash Memory....................................................................................... 3-22

RAM200 Memory Module .........................................................................3-23

MVME712M Transition Module................................................................3-23

MVME761 Transition Module....................................................................3-24

Serial Interface Modules 3-25

Chapter 4 Connector Pin Assignments

MVME2603/2604 Connectors ............................................................................4-1

Common Connectors...........................................................................................4-3

LED Mezzanine Connector J1......................................................................4-3

Debug Connector J2.......................................................................................4-3

Floppy/LED Connector J4 ...........................................................................4-7

PCI Expansion Connector J5 ........................................................................4-8

Keyboard and Mouse Connectors J6, J8 ...................................................4-10

DRAM Mezzanine Connector J7 ...............................................................4-10

PCI Mezzanine Card Connectors ..............................................................4-13

VMEbus Connector P1................................................................................4-15

MVME712M-Compatible Versions..................................................................4-17

VMEbus Connector P2 (MVME712M I/O Mode) ..................................4-17

SCSI Connector (MVME712M I/O Mode)...............................................4-17

Serial Ports 1-4 (MVME712M I/O Mode) ................................................4-20

Parallel Connector (MVME712M I/O Mode)..........................................4-21

Ethernet AUI Connector .............................................................................4-22

MVME761-Compatible Versions ..................................................................... 4-23

VMEbus Connector P2 (MVME761 I/O Mode)...................................... 4-23

Serial Ports 1 and 2 (MVME761 I/O Mode) ............................................ 4-25

Serial Ports 3 and 4 (MVME761 I/O Mode) ............................................ 4-26

Parallel Connector (MVME761 I/O Mode) ............................................. 4-27

Ethernet 10Base-T/100Base-TX Connector.............................................. 4-28

Chapter 5 PPCBug

Overview............................................................................................................... 5-1

Memory Requirements................................................................................. 5-2

PPCBug Implementation.............................................................................. 5-2

Using the Debugger............................................................................................. 5-3

Debugger Commands................................................................................... 5-4

Diagnostic Tests .............................................................................................5-8

Chapter 6 CNFG and ENV Commands

Overview............................................................................................................... 6-1

CNFG - ConÞgure Board Information Block ................................................... 6-2

ENV - Set Environment....................................................................................... 6-3

ConÞguring the PPCBug Parameters.........................................................6-3

ConÞguring the VMEbus Interface........................................................... 6-12

Motorola Computer Group Documents..........................................................A-1

ManufacturersÕ Documents...............................................................................A-2

Related SpeciÞcations.........................................................................................A-6

Appendix B Specifications

SpeciÞcations ........................................................................................................B-1

Cooling Requirements.........................................................................................B-2

FCC Compliance ..................................................................................................B-3

Appendix C Serial Interconnections

Introduction ......................................................................................................... C-1

EIA-232-D Connections...................................................................................... C-2

Interface Characteristics .............................................................................. C-4

EIA-530 Connections .......................................................................................... C-5

Interface Characteristics...............................................................................C-8

Proper Grounding............................................................................................... C-9

Appendix D Troubleshooting CPU Boards: Solving Startup Problems

Introduction .........................................................................................................D-1

Glossary

Abbreviations, Acronyms, and Terms to Know........................................... GL-1

xii

Figures

Figure 1-1. MVME2603/2604 Base Board Block Diagram.............................1-2

Figure 1-2. MVME2603/2604 Switches, Headers, Connectors, Fuses,

LEDs ..........................................................................................................1-10

Figure 1-3. MVME712M Connector and Header Locations ........................1-16

Figure 1-4. J15 Clock Line ConÞguration.......................................................1-17

Figure 1-5. MVME712M Serial Port 1 DCE/DTE ConÞguration ...............1-18

Figure 1-6. MVME712M Serial Port 2 DCE/DTE ConÞguration ...............1-19

Figure 1-7. MVME712M Serial Port 3 DCE ConÞguration..........................1-20

Figure 1-8. MVME712M Serial Port 3 DTE ConÞguration ..........................1-21

Figure 1-9. MVME712M Serial Port 4 DCE ConÞguration..........................1-22

Figure 1-10. MVME712M Serial Port 4 DTE ConÞguration.........................1-23

Figure 1-11. MVME712M P2 Adapter Component Placement ....................1-24

Figure 1-12. MVME761 Connector and Header Locations...........................1-26

Figure 1-13. MVME761 Serial Ports 1 and 2 (DCE Only) .............................1-29

Figure 1-14. MVME761 Serial Ports 3 and 4 DCE ConÞguration................1-30

Figure 1-15. MVME761 Serial Ports 3 and 4 DTE ConÞguration ................1-31

Figure 1-16. MVME761 P2 Adapter (Three-Row) Component Placement 1-33 Figure 1-17. MVME761 P2 Adapter (Five-Row) Component Placement...1-34

Figure 1-18. RAM200 Placement on MVME2603/2604 ................................1-37

Figure 1-19. PMC Module Placement on MVME2603/2604........................1-39

Figure 1-20. PMC Carrier Board Placement on MVME2603/2604 .............1-41

Figure 1-21. MVME712M/MVME2603/2604 Cable Connections ..............1-47

Figure 1-22. MVME761/MVME2603/2604 Cable Connections..................1-49

Figure 2-1. PPCBug System Startup..................................................................2-2

Figure 2-2. VMEbus Master Mapping ..............................................................2-8

Figure 2-3. MVME2603/MVME2604 Interrupt Architecture...................... 2-11

Figure 3-1. MVME2603/2604 Block Diagram .................................................3-5

xiii

xiv

Tab les

Table 1-1. VMEmodule/Transition Module Correspondence .......................1-3

Table 1-2. Startup Overview ...............................................................................1-4

Table 1-3. MVME712M Port/Jumper Correspondence ................................1-17

Table 2-1. Processor Default View of the Memory Map .................................2-6

Table 2-2. PCI Arbitration Assignments............................................................2-9

Table 2-3. IBC DMA Channel Assignments....................................................2-12

Table 2-4. Classes of Reset and Effectiveness .................................................2-13

Table 3-1. MVME2603/2604 Features................................................................3-1

Table 3-2. P2 Multiplexing Sequence...............................................................3-18

Table 3-3. Fuse Assignments.............................................................................3-20

Table 3-4. SIM Type IdentiÞcation ...................................................................3-25

Table 4-1. LED Mezzanine Connector ...............................................................4-3

Table 4-2. Debug Connector................................................................................4-4

Table 4-3. Floppy/LED Connector.....................................................................4-7

Table 4-4. PCI Expansion Connector .................................................................4-8

Table 4-5. Keyboard Connector ........................................................................4-10

Table 4-6. Mouse Connector..............................................................................4-10

Table 4-7. DRAM Mezzanine Connector ........................................................ 4-11

Table 4-8. PCI Mezzanine Card Connector.....................................................4-14

Table 4-8. PCI Mezzanine Card Connector (Continued) ..............................4-15

Table 4-9. VMEbus Connector P1.....................................................................4-16

Table 4-10. VMEbus Connector P2 (MVME712M I/O Mode) .....................4-18

Table 4-11. SCSI Connector (MVME712M).....................................................4-19

Table 4-12. Serial ConnectionsÑMVME712M Ports 1-4...............................4-20

Table 4-13. Parallel I/O Connector (MVME712M)........................................4-21

Table 4-14. Ethernet AUI Connector (MVME712M)......................................4-22

Table 4-15. VMEbus Connector P2 (MVME761 I/O Mode).........................4-24

Table 4-16. Serial ConnectionsÑPorts 1 and 2 (MVME761).........................4-25

Table 4-17. Serial ConnectionsÑPorts 3 and 4 (MVME761).........................4-26

Table 4-18. Parallel I/O Connector (MVME761)............................................4-27

Table 4-19. Ethernet 10Base-T/100Base-TX Connector (MVME761) ..........4-28

Table 5-1. Debugger Commands........................................................................5-4

Table 5-2. Diagnostic Test Groups...................................................................... 5-8

Table A-1. Motorola Computer Group Documents .......................................A-1

Table A-2. ManufacturersÕ Documents ............................................................ A-2

Table A-3. Related SpeciÞcations ......................................................................A-6

Table B-1. MVME2603/2604 SpeciÞcations......................................................B-1

Table C-1. EIA-232-D Interconnect Signals...................................................... C-3

Table C-2. EIA-232-D Interface Transmitter Characteristics ......................... C-4

Table C-3. EIA-232-D Interface Receiver Characteristics .............................. C-5

Table C-4. MVME761 EIA-530 Interconnect Signals ...................................... C-6

Table C-5. EIA-530 Interface Transmitter Characteristics.............................. C-8

Table C-6. EIA-530 Interface Receiver Characteristics................................... C-9

Table D-1. Troubleshooting MVME2603/2604 Boards .................................. D-1

xvi

1Hardware Preparation and

Introduction

This manual provides general information, hardware preparation and installation instructions, operating instructions, and a functional description of the MVME2603/2604 family of Single Board Computers.

The MVME2603/2604 is a single-slot VMEmodule equipped with a PowerPCª Series microprocessor. The MVME2603 is equipped with a PowerPC 603 microprocessor; the MVME2604 has a PowerPC 604 microprocessor. 256KB L2 cache (level 2 secondary cache memory) is available as an option on all versions.

The complete MVME2603/2604 consists of the base board plus:

❏

Installation

An ECC DRAM module (RAM200) for memory

❏

An optional PCI mezzanine card (PMC) for additional versatility

❏

An optional carrier board for additional PCI expansion

The block diagram in Figure 1-1 illustrates the architecture of the MVME2603/2604 base board.

1-1

Introduction

CLOCK

GENERATOR

PHB & MPIC

RAVEN ASIC

64-BIT PMC SLOT

L2 CACHE

256K

PROCESSOR

MPC603/604

REGISTERS

ISA

FLASH

1MB

MEMORY CONTROLLER

FALCON CHIPSET

66MHz MPC604 PROCESSOR BUS

33MHz 32/64-BIT PCI LOCAL BUS

PIB

W83C553

ETHERNET

DEC21140

AUI/10BT/100BTX

MEMORY EXPANSION CONNECTORSDEBUG CONNECTOR

SCSI

53C825A

FLASH

4MB or 8MB

SYSTEM

REGISTERS

PCI EXPANSION

VME BRIDGE

UNIVERSE

BUFFERS

RTC/NVRAM/WD

MOUSE KBD FLOPPY & LED

PMC FRONT I/O SLOT

FRONT PANEL

SUPER I/O

PC87308

SERIAL

PARALLEL

ISA BUS

712/761 P2 I/O OPTIONS

VME P2 VME P1

ESCC 85230

MK48T59

CIO

Z8536

Figure 1-1. MVME2603/2604 Base Board Block Diagram

11536.00 9611

1-2

Equipment Required

The following equipment is required to complete an MVME2603/ 2604 system:

❏

VME system enclosure

❏

System console terminal

❏

Operating system (and/or application software)

❏

Disk drives (and/or other I/O) and controllers

❏

Transition module (MVME712M or MVME761) and connecting cables

MVME2603/2604 VMEmodules are factory-configured for I/O handling via either MVME712M or MVME761 transition modules. The following table shows the relationship between MVME2603/ 2604 model numbers and the applicable transition module.

Hardware Preparation and Installation

Caution

Table 1-1. VMEmodule/Transition Module Correspondence

MVME761-Compatible Models MVME712-Compatible Models

MVME2603-1121A MVME2603-2121A MVME2603-1131A MVME2603-2131A MVME2603-1141A MVME2603-2141A MVME2603-1151A MVME2603-2151A MVME2603-1161A MVME2603-2161A MVME2604-1121A MVME2604-2121A MVME2604-1131A MVME2604-2131A MVME2604-1141A MVME2604-2141A MVME2604-1151A MVME2604-2151A MVME2604-1161A MVME2604-2161A

MVME2600-1XXX (MVME761-compatible models) will be damaged if they are mistakenly connected to the MVME712 family of boards instead of the correct MVME761 transition modules.

MVME2600-2XXX (MVME712-compatible models) will be damaged if they are mistakenly connected to the MVME761 transition modules instead of the correct MVME712 family of boards.

1-3

Overview of Startup Procedure

In models of the MVME2603/2604 that are configured for MVME712M I/O mode, the pin assignments of VMEbus connector P2 are fully compatible with other transition modules of the MVME712 series. In MVME761-compatible models, certain signals are multiplexed through P2 for additional I/O capacity. Refer to

Signal Multiplexing

in Chapter 3 for details.

Overview of Startup Procedure

The following table lists the things you will need to do before you can use this board and tells where to find the information you need to perform each step. Be sure to read this entire chapter, including all Caution and Warning notes, before you begin.

Table 1-2. Startup Overview

What you need to do... Refer to... On page...

Unpack the hardware. ConÞgure the hardware by

setting jumpers on the boards and transition modules.

Ensure memory mezzanines are properly installed on the base board.

Install the MVME2603/2604 VMEmodule in the chassis.

Install the transition module in the chassis.

Connect a console terminal.

Connect any other equipment you will be using.

Power up the system.

Unpacking Instructions MVME2603/2604 Base Board Preparation

MVME712M Transition Module Preparation MVME761 Transition Module Preparation

RAM200 Memory Mezzanine Installation

MVME2603/2604 VMEmodule Installation

MVME712M Transition Module Installation MVME761 Transition Module Installation

System Considerations

VMEmodule

Connector Pin Assignments

For more information on optional devices and equipment, refer to the documentation provided with the equipment.

Applying Power Troubleshooting CPU Boards ; Solving Start-Up

Problems

, MVME2603/2604

and

1-5

1-6 and

1-15 or 1-25

1-33

1-35

1-38

or 1-41

1-46

4-1

2-1

D-1

1-4

Hardware Preparation and Installation

Table 1-2. Startup Overview (Continued)

What you need to do... Refer to... On page...

Note that the debugger initializes the MVME2603/

2604.

Initialize the system clock.

Examine and/or change environmental parameters.

Program the board as needed for your applications.

Using the Debugger

You may also wish to obtain the

Firmware Package UserÕs Manual

Appendix A,

Using the Debugger

SET

command

CNFG and ENV Commands

MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide

Related Documentation

in Appendix A.)

Some options, however, are not software-programmable. Such options are controlled through manual installation or removal of header jumpers or interface modules on the base board or the associated transition module.

MVME2603/2604 Base Board Preparation

Figure 1-2 illustrates the placement of the switches, jumper headers, connectors, and LED indicators on the MVME2603/2604. Manually configurable items on the base board include:

❏

Cache mode control (J3)

❏

Flash bank selection (J10)

❏

Serial Port 4 receive clock configuration (J16)

❏

Serial Port 4 transmit clock configuration (J17)

❏

Serial Port 4 transmit clock receiver buffer control (J20)

❏

Serial Port 3 transmit clock configuration (J18)

❏ System controller selection (J22)

In conjunction with the serial port settings on the base board, serial ports on the associated MVME712M or MVME761 transition module are also manually configurable. For a discussion of the configurable items on the transition module, refer in this chapter to the sections entitled MVME712M Transition Module Preparation, MVME761 Transition Module Preparation, or to the respective userÕs manuals for the transition modules (listed in the Related Documentation appendix) as necessary.

1-6

The MVME2603/2604 is factory tested and shipped with the configurations described in the following sections. The MVME2603/2604Õs required and factory-installed debug monitor, PPCBug, operates with those factory settings.

Cache Mode Control (J3)

256KB of L2 cache memory is available on the MVME2603/2604. L2 cache operation is transparent to users, but its write-through mode is configurable via header J3 on older boards. On newer MVME2603/2604 boards, header J3 is not provided. With a jumper installed on J3, cache write-through is under CPU control. With the jumper removed, cache write-through occurs in all cases.

Hardware Preparation and Installation

1212

Cache Write-Through under CPU Control

Flash Bank Selection (J10)

The MVME2603/2604 base board has provision for 1MB of 16-bit Flash memory. The RAM200 memory mezzanine accommodates 4MB or 8MB of additional 64-bit Flash memory.

The Flash memory is organized in either one or two banks, each bank either 16 or 64 bits wide. Both banks contain the onboard debugger, PPCBug.

Cache Write-Through Always

(factory conﬁguration)

1-7

MVME2603/2604 Base Board Preparation

To enable Flash bank A (4MB or 8MB of firmware resident on soldered-in devices on the RAM200 mezzanine), place a jumper across header J10 pins 1 and 2. To enable Flash bank B (1MB of firmware located in sockets on the base board), place a jumper across header J10 pins 2 and 3.

J10

3 2

Flash Bank A Enabled (4MB/8MB, Soldered)

(factory conﬁguration)

J10

3 2

Flash Bank B Enabled (1MB, Sockets)

1-8

Hardware Preparation and Installation

Serial Port 4 Receive Clock Conﬁguration (J16)

In synchronous serial communications, you can configure Serial Port 4 on the MVME2603/2604 to use the clock signals provided by the RxC signal line. On MVME712M-compatible versions of the base board, header J16 configures port 4 to either drive or receive RxC. The factory configuration has port 4 set to receive RxC. J16 remains open on MVME761-compatible versions.

To complete the configuration of Serial Port 4, you must set the following configuration headers as well:

❏ J17 (Serial Port 4 transmit clock configuration)

❏ J20 (Serial Port 4 transmit clock receiver buffer control)

❏ J15 on the MVME712M transition module or J3 on the

MVME761 transition module (Serial Port 4 clock configuration)

Figures 1-8/1-9 (for the MVME712M) and Figures 1-14/1-15 (for the MVME761) diagram the overall jumper settings required on the MVME2603/2604 and transition module for a Serial Port 4 DCE or DTE configuration.

For additional details on the configuration of those headers, refer to the MVME712M or MVME761 Transition Module sections or to the userÕs manual for the transition module you are using (listed in the Related Documentation appendix).

J16

3 2

Drive RxC

(factory conﬁguration)

J16

3 2

Receive RxC

1-9

MVME2603/2604 Base Board Preparation

252449

ABT

RST

FLOPPY/LED

CHS BFL

CPU

PCI

FUS

SYS

A1B1C1

A32

B32

C32

D32

KEYBOARD MOUSE

PCI MEZZANINE CARD

11517.00 9608

4213

J10

XU1 XU2

A1B1C1

J11

J13

J16

J15

J23

J18

J17

J12

J14

A32

B32

C32D1D32

J22

J20

Figure 1-2. MVME2603/2604 Switches, Headers, Connectors, Fuses, LEDs

1-10

Hardware Preparation and Installation

Serial Port 4 Transmit Clock Conﬁguration (J17)

In synchronous serial communications, you can configure Serial Port 4 on the MVME2603/2604 to use the clock signals provided by the TxC signal line. Header J17 configures port 4 to either drive or receive TxC. The factory configuration has port 4 set to receive TxC.

To complete the configuration of Serial Port 4, you must set the following configuration headers as well:

❏ J16 (Serial Port 4 receive clock configuration)

❏ J20 (Serial Port 4 transmit clock receiver buffer control)

❏ J15 on the MVME712M transition module or J3 on the

MVME761 transition module (Serial Port 4 clock configuration)

J17

3 2

Drive TxC

(factory conﬁguration)

J17

3 2

Receive TxC

1-11

MVME2603/2604 Base Board Preparation

Serial Port 4 Transmit Clock Receiver Buffer Control (J20)

As described in other sections, a complete configuration of Serial Port 4 requires that you set the following jumper headers on the MVME2603/2604 or the transition module:

❏ J16 (Serial Port 4 receive clock configuration) on

MVME712M-compatible versions of the base board

❏ J17 (Serial Port 4 transmit clock configuration) ❏ J20 (Serial Port 4 transmit clock receiver buffer control) on

MVME712M-compatible versions of the base board

❏ J15 on the MVME712M transition module or J3 on the

MVME761 (Serial Port 4 clock configuration)

A transmit clock receiver buffer (controlled by header J20) is associated with Serial Port 4. Installing a jumper on J20 enables the buffer. Removing the jumper disables the buffer. The factory configuration has the Serial Port 4 buffer enabled.

J20 remains open on MVME761-compatible versions. On MVME712M-compatible versions, J20 is set in tandem with J17 to configure the Serial Port 4 transmit clock. If one deviates from the factory configuration, so must the other. Figures 1-8/1-9 (for the MVME712M) and Figures 1-14/1-15 (for the MVME761) diagram the overall jumper settings required on the MVME2603/2604 and transition module for a Serial Port 4 DCE or DTE configuration.

J20

Buffer Enabled

(factory conﬁguration)

J20

Buffer Disabled

1-12

Hardware Preparation and Installation

Serial Port 3 Transmit Clock Conﬁguration (J18)

In synchronous serial communications using the MVME761 transition module, you can configure Serial Port 3 on the MVME2603/2604 to use the clock signals provided by the TxC signal line. On MVME761-compatible versions of the base board, header J18 configures port 3 to either drive or receive TxC. The factory configuration has port 3 set to receive TxC. J18 remains open on MVME712M-compatible versions.

To complete the configuration of Serial Port 3, you must set J2 on the MVME761 transition module (Serial Port 3 clock configuration) as well.

Figures 1-6/1-7 (for the MVME712M) and Figures 1-14/1-15 (for the MVME761) diagram the overall jumper settings required on the MVME2603/2604 and transition module for a Serial Port 3 DCE or DTE configuration.

For additional details on the configuration of the MVME761 headers, refer to the MVME761 Transition Module section or to the userÕs manual for the module (listed in the Related Documentation appendix).

J18

3 2

Drive TxC

(factory conﬁguration)

J18

3 2

Receive TxC

1-13

MVME2603/2604 Base Board Preparation

System Controller Selection (J22)

The MVME2603/2604 is factory-configured as a VMEbus system controller by jumper header J22. If you select the ÔÔautomaticÕÕ system controller function by placing a jumper on J22 pins 2 and 3, the MVME2603/2604 determines whether it is the system controller by its position on the bus. If the board is in the first slot from the left, it configures itself as the system controller. If the MVME2603/2604 is not to be system controller under any circumstances, place the jumper on J22 pins 1 and 2. When the board is functioning as system controller, the

SCON LED is turned on.

J22

3 2

Not System Controller

Remote Status and Control

The MVME2603/2604 front panel LEDs and switches are mounted on a removable mezzanine board. Removing the LED mezzanine makes the mezzanine connector (J1, a keyed double-row 14-pin connector) available for service as a remote status and control connector. In this application, J1 can be connected to a usersupplied external cable to carry the Reset and Abort signals and the LED lines to a control panel located apart from the MVME2603/2604. Maximum cable length is 15 feet.

J22

3 2

Auto System Controller

(factory conﬁguration)

J22

3 2

System Controller

Table 4-1 lists the pin numbers and signal mnemonics for J1.

1-14

Hardware Preparation and Installation

MVME712M Transition Module Preparation

The MVME712M transition module (Figure 1-3) and P2 adapter board are used in conjunction with the following models of the MVME2603/2604 base board:

MVME2603-2121A MVME2604-2121A MVME2603-2131A MVME2604-2131A MVME2603-2141A MVME2604-2141A MVME2603-2151A MVME2604-2151A MVME2603-2161A MVME2604-2161A

The features of the MVME712M include:

❏ A parallel printer port

❏ An Ethernet interface supporting AUI connections

❏ One synchronous/asynchronous, and three asynchronous

only, EIA-232-D multiprotocol serial ports

❏ An SCSI interface (via P2 adapter) for connection to both

internal and external devices

❏ Socket-mounted SCSI terminating resistors for end-of-cable

or middle-of-cable configurations

❏ Provision for modem connection

❏ Green LED for SCSI terminator power; yellow LED for

Ethernet transceiver power

The features of the P2 adapter board include:

❏ A 50-pin connector for SCSI cabling to the MVME712M

and/or to other SCSI devices

❏ Socket-mounted SCSI terminating resistors for end-of-cable

or middle-of-cable configurations

❏ Fused SCSI teminator power developed from the +5Vdc

present at connector P2

❏ A 64-pin DIN connector to interface the EIA-232-D, parallel,

SCSI, and Ethernet signals to the MVME712M

1-15

MVME712M Transition Module Preparation

MVME712M

SERIAL PORT 1 / CONSOLE

SERIAL PORT 3

132513

13 1

14 2

J11

SERIAL PORT 4

ETHERNET

PRINTER

SERIAL PORT 2 / TTY01

INTERFACE

SCSI

PRIMARY SIDE

J10

1141

J13

J14

J15

212

132513

J16

14 2

J17

J20

1141

DS2DS1

915

18 1

R49

13 1

J18

C1 C32

J19

J21

C1 C2 C3

R50

cb228 9212

Figure 1-3. MVME712M Connector and Header Locations

1-16

R51

A32

Hardware Preparation and Installation

Serial Ports 1-4 DCE/DTE Conﬁguration

Serial ports 1 through 4 are configurable as modems (DCE) for connection to terminals, or as terminals (DTE) for connection to modems. The MVME712M is shipped with the serial ports configured for DTE operation. Serial port DCE/DTE configuration is accomplished by positioning jumpers on one of two headers per port. The following table lists the serial ports with their corresponding jumper headers.

Table 1-3. MVME712M Port/Jumper Correspondence

Serial Port

Port 1 J7 SERIAL PORT 1/ CONSOLE J1/J11 Port 2 J8 SERIAL PORT 2/ TTY J16/J17 Port 3 J9 SERIAL PORT 3 J13/J14 Port 4 J10 SERIAL PORT 4 J18/J19

Board

Connector

Panel Connector

The next six figures illustrate the MVME2603/2604 base board and MVME712M transition module with the interconnections and jumper settings for DCE/DTE configuration on each serial port.

Serial Port 4 Clock Conﬁguration

Port 4 can be configured via J15 (Figure 1-4) to use the TrxC4 and RtxC4 signal lines. Part of the configuration is done with headers J16, J17, and J20 on the MVME2603/2604 (Figures 1-9 and 1-10).

J15

Jumper Header

TRXC4 TO PORT 4 PIN 15

TRXC4 TO PORT 4 PIN 17

TRXC4 TO PORT 4 PIN 24

Figure 1-4. J15 Clock Line Conﬁguration

31 957 11

RTXC4 TO PORT 4 PIN 24

RTXC4 TO PORT 4 PIN 17

RTXC4 TO PORT 4 PIN 15

1-17

MVME712M Transition Module Preparation

MVME2603/2604 P2 ADAPTER

BOARD

PC87308

SOUT1

64-PIN CABLE

MVME712M

MODULE

RXD

DB9

DCE

RTS1#

DTR1#

SIN1

CTS1#

DCD1#

DSR1#

R11#

MVME2603/2604 P2 ADAPTER

+5V

PC87308

SOUT1

BOARD

64-PIN CABLE

+12V

MVME712M

MODULE

CTS

DCD

TXD

RTS

DSR

GND

11551.00 9609 (1-8)

DB9

TXD

1-18

RTS1#

+5V

+12V

11551.00 9609 (2-8)

DTE

DTR1#

SIN1

CTS1#

DCD1#

DSR1#

R11#

Figure 1-5. MVME712M Serial Port 1 DCE/DTE Conﬁguration

RTS

DTR

RXD

CTS

GND

Hardware Preparation and Installation

MVME2603/2604 P2 ADAPTER

BOARD

64-PIN CABLE

MVME712M

MODULE

DB9

DCE

PC87308

SOUT2

RTS2#

DTR2#

SIN2

CTS2#

DCD2#

DSR2#

R12#

MVME2603/2604 P2 ADAPTER

+5V

PC87308

SOUT2

BOARD

64-PIN CABLE

+12V

11551.00 9609 (3-8)

MVME712M

MODULE

RXD

CTS

DCD

TXD

RTS

DTR

DSR

GND

TXD

DB9

RTS2#

DTR2#

SIN2

DTE

CTS2#

DCD2#

DSR2#

R12#

+5V

11551.00 9609 (4-8)

Figure 1-6. MVME712M Serial Port 2 DCE/DTE Conﬁguration

RTS

DTR

RXD

CTS

DCD

GND

1-19

MVME712M Transition Module Preparation

DCE

MVME2603/2604 64-PIN

Z85230

TXDA

RTSA#

DCDA#

RXDA

CTSA#

TRXCA#

RTXCA#

Z8536

DTR3#

LLB3#

+5V

ADAPTER

CABLE

MVME712M

MODULE

RXD

CTS

DTR

TXD

RTS

DCD

DB9

RLB3#

DSR3#

R13#

TM3#

NOTE : J18 OPEN

+5V

+12V

DSR

GND

11551.00 9609 (5-8)

Figure 1-7. MVME712M Serial Port 3 DCE Conﬁguration

1-20

Hardware Preparation and Installation

DTE

MVME2603/2604 64-PIN

Z85230

TXDA

RTSA#

DCDA#

RXDA

CTSA#

TRXCA#

RTXCA#

Z8536

DTR3#

LLB3#

+5V

ADAPTER

CABLE

MVME712M

MODULE

TXD

RTS

DCD

RXD

CTS

DTR

DB25

RLB3#

DSR3#

R13#

TM3#

NOTE : J18 OPEN

+5V

GND

11551.00 9609 (6-8)

Figure 1-8. MVME712M Serial Port 3 DTE Conﬁguration

1-21

MVME712M Transition Module Preparation

DCE

MVME2603/2604 64-PIN

Z85230

TXDB

RTSB#

DCDB#

RXDB

CTSB#

J20

TRXCB RTXCB

Z8536

DTR4#

LLB4#

J17

J16

+5V

ADAPTER

CABLE

MVME712M

MODULE

RXD

CTS

DTR

TXD

RTS

TXCI

RXCI

TXCO

DCD

DB25

15 17 24

RLB4#

DSR4#

R14#

TM4#

NOTE : J20 OPEN

J16 1-2 J17 1-2

+5V

+12V

DSR

GND

11551.00 9609 (7-8)

Figure 1-9. MVME712M Serial Port 4 DCE Conﬁguration

1-22

Hardware Preparation and Installation

DTE

MVME2603/2604 64-PIN

Z85230

TXDB

RTSB#

DCDB#

RXDB

CTSB#

J20

TRXCB RTXCB

Z8536

DTR4#

LLB4#

J17

J16

+5V

ADAPTER

CABLE

MVME712M

MODULE

TXD

RTS

DCD

RXD

CTS

TXCI

RXCI

TXCO

DCD

DB25

15 17 24

RLB4#

DSR4#

R14#

TM4#

NOTE : J20 1-2

J16 2-3 J17 2-3

+5V

GND

+5V

11551.00 9609 (8-8)

Figure 1-10. MVME712M Serial Port 4 DTE Conﬁguration

1-23

1Hardware Preparation and Installation 0

P2 Adapter Preparation

Preparation of the P2 adapter for the MVME712M consists of removing or installing the SCSI terminating resistors. Figure 1-11 illustrates the location of the resistors, fuse, and connectors.

For further information on the preparation of the transition module and the P2 adapter, refer to the userÕs manual for the MVME712M (listed in the Related Documentation appendix) as necessary.

A1 B1 C1

2 1

C1 B1 A1

C1 C2 C3 F1

R2 R3R1

CR1

A32 B32 C32

50 49

C32 B32 A32

1 2

Figure 1-11. MVME712M P2 Adapter Component Placement

cb211 9212

1-24

Hardware Preparation and Installation

MVME761 Transition Module Preparation

The MVME761 transition module (Figure 1-12) and P2 adapter board are used in conjunction with the following models of the MVME2603/2604 base board:

MVME2603-1121A MVME2604-1121A MVME2603-1131A MVME2604-1131A MVME2603-1141A MVME2604-1141A MVME2603-1151A MVME2604-1151A MVME2603-1161A MVME2604-1161A

The features of the MVME761 include:

❏ A parallel printer port (IEEE 1284-I compliant)

❏ An Ethernet interface supporting 10Base-T/100Base-TX

connections

❏ Two EIA-232-D asynchronous serial ports (identified as COM1

and

COM2 on the front panel)

❏ Two synchronous serial ports (SERIAL 3 and SERIAL 4 on the

front panel), configurable for EIA-232-D, EIA-530, V.35, or X.21 protocols

❏ Two 60-pin Serial Interface Module (SIM) connectors, used

on configuring serial ports 3 and 4

The features of the P2 adapter board for the MVME761 include:

❏ A 50-pin connector for SCSI cabling to SCSI devices

❏ Jumper-selectable SCSI terminating resistors

❏ Fused SCSI teminator power developed from the +5Vdc

present at connector P2

❏ A 64-pin 3M connector to the MVME761

1-25

MVME761 Transition Module Preparation

MVME

761-001

DTE

DCE

SERIAL 3COM1 COM2 PARALLEL

10/100 BASETSERIAL

60 59

DTE

1 3

DCE

J12

2 1

1910 9609

Figure 1-12. MVME761 Connector and Header Locations

1-26

Hardware Preparation and Installation

Serial Ports 1 and 2

On MVME761-compatible models of the MVME2603/2604 base board, the asynchronous serial ports (Serial Ports 1 and 2) are configured permanently as data circuit-terminating equipment (DCE). The port configuration is illustrated in Figure 1-14.

Conﬁguration of Serial Ports 3 and 4

The synchronous serial ports, Serial Port 3 and Serial Port 4, are configurable through a combination of serial interface module (SIM) selection and jumper settings. The following table lists the SIM connectors and jumper headers corresponding to each of the synchronous serial ports.

Synchronous

Port

Port 3 J7 J1 J2

Port 4 J8 J12 J3

Board

Connector

SIM

Connector

Jumper Header

Port 3 is routed to board connector J7. Port 4 is available at board connector J8. Eight serial interface modules are available:

❏ EIA-232-D (DCE and DTE)

❏ EIA-530 (DCE and DTE)

❏ V.35 (DCE and DTE)

❏ X.21 (DCE and DTE)

You can configure Serial Ports 3 and 4 for any of the above serial protocols by installing the appropriate serial interface module and setting the corresponding jumper. SIMs can be ordered separately as required.

1-27

MVME761 Transition Module Preparation

Headers J2 and J3 are used to configure Serial Port 3 and Serial Port 4, respectively, in tandem with SIM selection. With the jumper in position 1-2, the port is configured as a DTE. With the jumper in position 2-3, the port is configured as a DCE. The jumper setting of the port should match the configuration of the corresponding SIM module.

123

DCE DTE

123

DCE DTE

Serial Port 3 jumper settings

123

Serial Port 4 jumper settings

123

When installing the SIM modules, note that the headers are keyed for proper orientation.

For further information on the preparation of the transition module, refer to the userÕs manual for the MVME761 (listed in the Related Documentation appendix) as necessary.

The next three figures illustrate the MVME2603/2604 base board and MVME761 transition module with the interconnections and jumper settings for DCE/DTE configuration on each serial port.

1-28

Hardware Preparation and Installation

DCE

MVME2603/2604

SOUT1

RTS1#

DTR1#

SIN1

CTS1#

DSR1#

DCD1#

RI1#

PC87308 P2/P2MX

SOUT2

RTS2#

DTR2#

MVME761

DB9

COM1

SIN2

CTS2#

DSR2#

DCD2#

RI2#

11552.00 9609 (1-3)

DB9

COM2

Figure 1-13. MVME761 Serial Ports 1 and 2 (DCE Only)

1-29

MVME761 Transition Module Preparation

DCE

MVME3600 SERIES

Z85230 SCC

TXD

RTS#

RXD

CTS#

DCD#

TRXC

RTXC

Z8536 CIO

DTR#

LLB#

RLB#

J15

3 2

P2/P2MX

J2/J3

3 2

MVME761

EIA232-DCE SIM

HD26

DSR#

RI#

TM#

11552.00 9802 (2-5)

Figure 1-14. MVME761 Serial Ports 3 and 4 DCE Conﬁguration

1-30

Hardware Preparation and Installation

DTE

MVME2603/2604 SERIES

Z85230 SCC

TXD

RTS#

RXD

CTS#

DCD#

TRXC

RTXC

Z8536 CIO

DTR#

LLB#

RLB#

J15

3 2

P2/P2MX

J2/J3

3 2

MVME761 EIA232-DTE SIM

HD26

DSR#

RI#

TM#

11552.00 9802 (4-5)

Figure 1-15. MVME761 Serial Ports 3 and 4 DTE Conﬁguration

1-31

MVME761 Transition Module Preparation

P2 Adapter Preparation (Three-Row)

The P2 adapter for the MVME761 transition module routes the synchronous and asynchronous serial, parallel, and Ethernet signals to the MVME761. The P2 adapter also has a 50-pin female connector (J2) that carries 8-bit SCSI signals from the MVME2603/2604. To run SCSI devices, you may install an additional transition module that is equipped with a SCSI port, such as the MVME712B.

Preparation of the P2 adapter for the MVME761 consists of installing a jumper on header J1 to enable the SCSI terminating resistors if necessary. Figure 1-16 illustrates the location of the jumper header, resistors, fuse, and connectors.

SCSI Enabled

(factory conﬁguration)

SCSI Disabled

1-32

Hardware Preparation and Installation

For further information on the preparation of the transition module and the P2 adapter, refer to the userÕs manual for the MVME761 (listed in the Related Documentation appendix) as necessary.

50 49

64 63

C B A

1933 9610

2 1

1 32

C B A

CR1

Figure 1-16. MVME761 P2 Adapter (Three-Row) Component Placement

1-33

MVME761 Transition Module Preparation

P2 Adapter Preparation (Five-Row)

The MVME761 transition module uses a five-row P2 adapter to transfer the synchronous and asynchronous serial, parallel, and Ethernet signals to and from the MVME2600 series VMEmodule. The P2 adapter has a 68-pin female connector (J1) that carries 16-bit SCSI signals from the MVME2600. (To run SCSI devices, you may install an optional front panel extension, MVME761EXT, next to the MVME761. The panel extension supplies both 8- and 16-bit SCSI.)The P2 adapter for the MVME761 also supports PMC I/O via connectors J3 and J4.

Preparation of the P2 adapter for the MVME761 consists of installing a jumper on header J5 to enable the SCSI terminating resistors if necessary. Figure 1-16.1 illustrates the location of the jumper header and connectors.

For further information on the preparation of the transition module and the P2 adapter, refer to the userÕs manual for the MVME761 (listed in the Related Documentation appendix) as necessary.

2 1

133

1 32

D C B A Z

64 63

CR1

D C B A Z

Figure 1-17. MVME761 P2 Adapter (Five-Row) Component Placement

1-34

1999 9701

Hardware Installation

The following sections discuss the placement of mezzanine cards on the MVME2603/2604 base board, the installation of the complete MVME2603/2604 VMEmodule assembly and transition module into a VME chassis, and the system considerations relevant to the installation. Before installing the MVME2603/2604, ensure that the serial ports and all header jumpers are configured as desired.

In most cases, the mezzanine cardsÑthe RAM200 ECC DRAM module, the optional PCI mezzanine (if applicable), and the optional carrier board for additional PCI expansion (if applicable)Ñare already in place on the MVME2603/2604. The user-configurable jumpers are accessible with the mezzanines installed.

Hardware Preparation and Installation

Should it be necessary to install mezzanines on the base board, refer to the following sections for a brief description of the installation procedure.

ESD Precautions

Use ESD

Wrist Strap

Motorola strongly recommends that you use an antistatic wrist strap and a conductive foam pad when installing or upgrading a system. Electronic components, such as disk drives, computer boards, and memory modules, can be extremely sensitive to ESD. After removing the component from the system or its protective wrapper, place the component flat on a grounded, static-free surface (and in the case of a board, component side up). Do not slide the component over any surface.

If an ESD station is not available, you can avoid damage resulting from ESD by wearing an antistatic wrist strap (available at electronics stores) that is attached to an unpainted metal part of the system chassis.

1-35

RAM200 Memory Mezzanine Installation

The RAM200 DRAM mezzanine mounts on top of the MVME2603/2604 base board. To upgrade or install a RAM200 mezzanine, refer to Figure 1-18 and proceed as follows:

1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to the chassis as a ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

2. Perform an operating system shutdown. Turn the AC or DC power off and remove the AC cord or DC power lines from the system. Remove chassis or system cover(s) as necessary for access to the VMEmodules.

Inserting or removing modules with power applied

may result in damage to module components.

Caution

Warning

Caution

Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting.

3. Carefully remove the MVME2603/2604 from its VMEbus card slot and lay it flat, with connectors P1 and P2 facing you.

Avoid touching areas of integrated circuitry; static discharge can damage these circuits.

1-36

Hardware Preparation and Installation

4. Place the RAM200 mezzanine module on top of the base board. Connector J9 on the underside of the RAM200 should connect smoothly with the corresponding connector J7 on the MVME2603/2604.

Figure 1-18. RAM200 Placement on MVME2603/2604

5. Insert the four short Phillips screws through the holes at the corners of the RAM200, into the standoffs on the MVME2603/2604. Tighten the screws.

6. Reinstall the MVME2603/2604 assembly in its proper card slot. Be sure the module is well seated in the backplane connectors. Do not damage or bend connector pins.

7. Replace the chassis or system cover(s), reconnect the system to the AC or DC power source, and turn the equipment power on.

11661.00 9611 (2-3)

1-37

PMC Module Installation

PCI mezzanine card (PMC) modules mount beside the RAM200 mezzanine on top of the MVME2603/2604 base board. To install a PMC module, refer to Figure 1-19 and proceed as follows:

1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to the chassis as a ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

Inserting or removing modules with power applied

may result in damage to module components.

Caution

Warning

Caution

Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting.

3. Carefully remove the MVME2603/2604 from its VMEbus card slot and lay it flat, with connectors P1 and P2 facing you.

Avoid touching areas of integrated circuitry; static discharge can damage these circuits.

1-38

Hardware Preparation and Installation

4. Remove the PCI filler from the front panel.

Figure 1-19. PMC Module Placement on MVME2603/2604

5. Slide the edge connector of the PMC module into the front panel opening from behind and place the PMC module on top of the base board. The four connectors on the underside of the PMC module should then connect smoothly with the corresponding connectors (J11/12/13/14) on the MVME2603/2604.

6. Insert the two short Phillips screws through the holes at the forward corners of the PMC module, into the standoffs on the MVME2603/2604. Tighten the screws.

7. Reinstall the MVME2603/2604 assembly in its proper card slot. Be sure the module is well seated in the backplane connectors. Do not damage or bend connector pins.

8. Replace the chassis or system cover(s), reconnect the system to the AC or DC power source, and turn the equipment power on.

11661.00 9611 (3-3)

1-39

PMC Carrier Board Installation

PCI mezzanine card (PMC) carrier boards mount above the RAM200 mezzanine and (if installed) PMC module on the MVME2603/2604 base board. To install a PMC carrier board for additional PCI expansion, refer to Figure 1-20 and proceed as follows:

1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to the chassis as a ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

Caution

Warning

Caution

Inserting or removing modules with power applied may result in damage to module components.

Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting.

3. Carefully remove the MVME2603/2604 from its VMEbus card slot and lay it flat, with connectors P1 and P2 facing you.

Avoid touching areas of integrated circuitry; static discharge can damage these circuits.

4. If PMC modules are to be installed on the carrier board, install the modules at this point.

1-40

Hardware Preparation and Installation

Figure 1-20. PMC Carrier Board Placement on MVME2603/2604

5. Remove the LED module screw located at the upper front corner of the base board. Install a short (0.394 inch) standoff in its place.

11661.00 9611 (1-3)

1-41

MVME2603/2604 VMEmodule Installation

6. At the other three corners of the base board, install long (0.737 inch) standoffs.

7. Place the PMC carrier board on top of the base board. The connector on the underside of the carrier board should connect smoothly with the corresponding connector J5 (located between P1 and P2) on the MVME2603/2604.

8. Insert the four short Phillips screws through the holes at the corners of the carrier board, into the standoffs on the MVME2603/2604. Tighten the screws.

9. Reinstall the MVME2603/2604 assembly in its proper card slot. Be sure the module is well seated in the backplane connectors. Do not damage or bend connector pins.

10. Replace the chassis or system cover(s), reconnect the system to the AC or DC power source, and turn the equipment power on.

MVME2603/2604 VMEmodule Installation

With mezzanine board(s) installed and headers properly configured, proceed as follows to install the MVME2603/2604 in the VME chassis:

1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to the chassis as a ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

Inserting or removing modules with power applied

Caution

may result in damage to module components.

1-42

Warning

Hardware Preparation and Installation

Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting.

3. Remove the filler panel from the card slot where you are going to install the MVME2603/2604.

Ð If you intend to use the MVME2603/2604 as system

controller, it must occupy the leftmost card slot (slot 1). The system controller must be in slot 1 to correctly initiate the bus-grant daisy-chain and to ensure proper operation of the IACK daisy-chain driver.

Ð If you do not intend to use the MVME2603/2604 as system

controller, it can occupy any unused double-height card slot.

Caution

4. Slide the MVME2603/2604 into the selected card slot. Be sure the module is well seated in the P1 and P2 connectors on the backplane. Do not damage or bend connector pins.

Avoid touching areas of integrated circuitry; static discharge can damage these circuits

5. Secure the MVME2603/2604 in the chassis with the screws provided, making good contact with the transverse mounting rails to minimize RF emissions.

6. On the chassis backplane, remove the

ACKNOWLEDGE (IACK) and BUS GRANT (BG) jumpers from

the header for the card slot occupied by the MVME2603/2604.

INTERRUPT

1-43

MVME712M Transition Module Installation

Note Some VME backplanes (e.g., those used in Motorola

ÔÔModular ChassisÕÕ systems) have an autojumpering feature for automatic propagation of the IACK and BG signals. Step 6 does not apply to such backplane designs.

7. If necessary, install an MVME712M or MVME761 transition module and cable it to the MVME2603/2604 as described in the following sections of this document.

8. Replace the chassis or system cover(s), cable peripherals to the panel connectors as appropriate, reconnect the system to the AC or DC power source, and turn the equipment power on.

MVME712M Transition Module Installation

This section applies to MVME712M-compatible models of the MVME2603/2604 VMEmodule. With the MVME2603/2604 installed, refer to Figure 1-22 and proceed as follows to install an MVME712M transition module:

1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to the chassis as a ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

MVME2600-2XXX (MVME712-compatible models) will

Caution

be damaged if they are mistakenly connected to the MVME761 transition modules instead of the correct MVME712 family of boards.

Inserting or removing modules with power applied

Caution

1-44

may result in damage to module components.

Warning

Hardware Preparation and Installation

Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting.

3. Remove the filler panel(s) from the appropriate card slot(s) at the front or rear of the chassis. (You may need to shift other modules in the chassis to allow space for the MVME712M, which has a double-wide front panel.)

4. Attach the P2 adapter board to the P2 backplane connector at the slot occupied by the MVME2603/2604 VMEmodule.

5. Route the 64-conductor cable furnished with the MVME712M from J2 on the P2 adapter board to J2 on the transition module. Be sure to orient cable pin 1 with connector pin 1.

Caution

Avoid touching areas of integrated circuitry; static discharge can damage these circuits

6. Secure the MVME712M in the chassis with the screws provided, making good contact with the transverse mounting rails to minimize RF emissions.

7. Referring to the userÕs manual for the MVME712M (listed in the Related Documentation appendix), route the 50-conductor cable to the internal or external SCSI devices as appropriate to your system configuration. Be sure to orient cable pin 1 with connector pin 1.

Note The SCSI cabling can be configured in a number of

ways to accommodate various device and system configurations. Figure 1-22 shows a possible configuration for use with internal SCSI devices. For more detailed information on installing the P2 adapter

1-45

MVME712M Transition Module Installation

board and the MVME712M transition module, refer to the userÕs manual (listed in the Related Documentation appendix).

8. Replace the chassis or system cover(s), making sure no cables are pinched. Cable the peripherals to the panel connectors, reconnect the system to the AC or DC power source, and turn the equipment power on.

Note Not all peripheral cables are provided with the

MVME712M; you may need to fabricate or purchase certain cables. (To minimize radiation, Motorola recommends shielded cable for peripheral connections where possible.)

1-46

Hardware Preparation and Installation

TERMINATORS

INSTALLED

MVME712M

J10

50-CONDUCTOR

CABLE

64-CONDUCTOR

CABLE

P2 ADAPTER

SCSI

DEVICE

SCSI

DEVICE

MVME2600

TERMINATORS

REMOVED

TERMINATORS

INSTALLED

ENCLOSURE BOUNDARY

Figure 1-21. MVME712M/MVME2603/2604 Cable Connections

cb2349301

1-47

MVME761 Transition Module Installation

This section applies to MVME761-compatible models of the MVME2603/2604 VMEmodule. With the MVME2603/2604 installed, refer to Figure 1-22 and proceed as follows to install an MVME761 transition module:

1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to the chassis as a ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

Caution

Warning

MVME2600-1XXX (MVME761-compatible models) will be damaged if they are mistakenly connected to the MVME712 family of boards instead of the correct MVME761 transition modules.

Inserting or removing modules with power applied may result in damage to module components.

Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting.

3. Remove the filler panel(s) from the appropriate card slot(s) at the front or rear of the chassis. (You may need to shift other modules in the chassis to allow space for the cabling to the MVME761.)

4. Attach the P2 adapter board to the P2 backplane connector at the slot occupied by the MVME2603/2604 VMEmodule.

1-48

Hardware Preparation and Installation

MVME761-001

64-CONDUCTOR

CABLE

ENCLOSURE BOUNDARY

P2 ADAPTER

MVME2600/MVME3600

Caution

11635.00 9610

Figure 1-22. MVME761/MVME2603/2604 Cable Connections

5. Route the 64-conductor cable furnished with the MVME761 from J3 on the P2 adapter board to P2 on the transition module. Be sure to orient cable pin 1 with connector pin 1.

Avoid touching areas of integrated circuitry; static discharge can damage these circuits

1-49

System Considerations

6. Secure the MVME761 in the chassis with the screws provided, making good contact with the transverse mounting rails to minimize RF emissions.

Note The cabling can be configured in a number of ways to

accommodate various device and system configurations. Figure 1-22 shows one possible configuration. For more detailed information on installing the P2 adapter board and the MVME761 transition module, refer to the userÕs manual (listed in the Related Documentation appendix).

7. Replace the chassis or system cover(s), making sure no cables are pinched. Cable the peripherals to the panel connectors, reconnect the system to the AC or DC power source, and turn the equipment power on.

Note Not all peripheral cables are provided with the

MVME761; you may need to fabricate or purchase certain cables. (To minimize radiation, Motorola recommends shielded cable for peripheral connections where possible.)

System Considerations

The MVME2603/2604 draws power from VMEbus backplane connectors P1 and P2. P2 is also used for the upper 16 bits of data in 32-bit transfers, and for the upper 8 address lines in extended addressing mode. The MVME2603/2604 may not function properly without its main board connected to VMEbus backplane connectors P1 and P2.

Whether the MVME2603/2604 operates as a VMEbus master or as a VMEbus slave, it is configured for 32 bits of address and 32 bits of data (A32/D32). However, it handles A16 or A24 devices in the

1-50

Hardware Preparation and Installation

address ranges indicated in Chapter 2. D8 and/or D16 devices in the system must be handled by the PowerPCª processor software. Refer to the memory maps in Chapter 2.

The MVME2603/2604 contains shared onboard DRAM (and, optionally, secondary cache memory) whose base address is software-selectable. Both the onboard processor and offboard VMEbus devices see this local DRAM at base physical address $00000000, as programmed by the firmware. This may be changed via software to any other base address. Refer to the MVME2600 Series Single Board Computer Programmer's Reference Guide for more information.

If the MVME2603/2604 tries to access offboard resources in a nonexistent location and is not system controller, and if the system does not have a global bus timeout, the MVME2603/2604 waits forever for the VMEbus cycle to complete. This will cause the system to lock up. There is only one situation in which the system might lack this global bus timeout: when the MVME2603/2604 is not the system controller and there is no global bus timeout elsewhere in the system.

Multiple MVME2603/2604s may be installed in a single VME chassis. In general, hardware multiprocessor features are supported.

Other MPUs on the VMEbus can interrupt, disable, communicate with, and determine the operational status of the processor(s). One register of the GCSR (global control/status register) set includes four bits that function as location monitors to allow one MVME2603/2604 processor to broadcast a signal to any other MVME2603/2604 processors. All eight registers are accessible from any local processor as well as from the VMEbus.

The MVME2603/2604 VMEmodule draws +5Vdc, +12Vdc, and Ð12Vdc power from the VMEbus backplane through connectors P1 and P2. The 3.3Vdc and the processor core voltage power is supplied by the on-board +5Vdc.

1-51

System Considerations

MVME2603/2604 VMEmodule

The MVME2603/2604 VMEmodule furnishes +12Vdc and (in MVME761 I/O mode) Ð12Vdc power to the transition module through polyswitches (resettable fuses) R34 and R28 respectively. These voltage sources power the serial port drivers and any LAN transceivers connected to the transition module. Fused +5Vdc power is supplied to the base boardÕs keyboard and mouse connectors through polyswitch R30 and to the 14-pin combined LED-mezzanine/remote-reset connector, J1. The the MVME2603/2604 front panel illuminates when all three voltages are available.

In MVME712M I/O mode, the MVME2603/2604 supplies SCSI terminator power through a 1A fuse (F1) located on the P2 adapter board. If the fuse is blown, the SCSI device(s) may function erratically or not at all. With the P2 adapter board cabled to a transition module and with an SCSI bus connected to the transition module, the green terminator power is available. If the module flickers during SCSI bus operation, check fuse F1 on the P2 adapter board.

SCSI LED on the module illuminates when SCSI

FUS LED (DS5) on

SCSI LED on the transition

1-52

Note Because any device on the SCSI bus can provide the

TERMPWR signal, and because the MVME2603/2604

FUS LED monitors the status of several voltages, the

LED does not directly indicate the condition of any single fuse. If the

FUS LED flickers or goes out, check

all the fuses (polyswitches).

In MVME761 I/O mode, the MVME2603/2604 supplies SCSI terminator power through a polyswitch (resettable fuse) located on the P2 adapter board.

Hardware Preparation and Installation

The MVME2603/2604 base board supplies a SPEAKER_OUT signal to the 14-pin combined LED-mezzanine/remote-reset connector, J1. When J1 is used as a remote reset connector with the LED mezzanine removed, the

SPEAKER_OUT signal can be cabled to an

external speaker. For the pin assignments of J1, refer to Table 4-1.

On the MVME2603/2604 base board, the standard serial console port (

COM1) serves as the PPCBug debugger console port. The

firmware console should be set up as follows:

❏ Eight bits per character

❏ One stop bit per character

❏ Parity disabled (no parity)

❏ Baud rate of 9600 baud

9600 baud is the power-up default for serial ports on MVME2603/ 2604 boards. After power-up you can reconfigure the baud rate if you wish, using the PPCBug PF (Port Format) command via the command line interface. Whatever the baud rate, some type of hardware handshaking Ñ either XON/OFF or via the RTS/CTS line Ñ is desirable if the system supports it.

1-53

System Considerations

1-54

2Operating Instructions

Introduction

This chapter supplies information for use of the MVME2603/2604 family of Single Board Computers in a system configuration. Here you will find the power-up procedure and descriptions of the switches and LEDs, memory maps, and software initialization.

Applying Power

After you have verified that all necessary hardware preparation has been done, that all connections have been made correctly, and that the installation is complete, you can power up the system. The MPU, hardware, and firmware initialization process is performed by the PowerPCª PPCBug power-up or system reset. The firmware initializes the devices on the SBC module in preparation for booting the operating system.

The firmware is shipped from the factory with an appropriate set of defaults. In most cases there is no need to modify the firmware configuration before you boot the operating system.

The following flowchart shows the basic initialization process that takes place during PowerPC system startup.

For further information on PPCBug, refer to Chapter 5, PPCBug; to Appendix D, Troubleshooting CPU Boards; or to the PPCBug Firmware Package UserÕs Manual.

2-1

Applying Power

ST AR TUP

SYSTEM

INITIALIZA TION

CONSOLE

DETECTION

RUN SELFTESTS

(IF ENABLED)

Figure 2-1. PPCBug System Startup

The MVME2603/2604 front panel has and six LED (light-emitting diode) status indicators (

PCI, FUS, SYS). The switches and LEDs are mounted on an LED

mezzanine board that plugs into the base board.

ABORT Switch (S1)

When activated by software, the ABORT switch can generate an interrupt signal from the base board to the processor at a userprogrammable level. The interrupt is normally used to abort program execution and return control to the debugger firmware located in the MVME2603/2604 ROM and Flash memory. The interrupt signal reaches the processor module via ISA bus interrupt

AUTOBOOT

(IF ENABLED)

OPERA TING

SYSTEM

11734.00 9702

ABORT and RESET switches

CHS, BFL, CPU,

2-2

Operating Instructions

line IRQ8∗. The signal is also available at pin PB7 of the Z8536 CIO device, which handles various status signals, serial I/O lines, and counters.

The interrupter connected to the ABORT switch is an edge-sensitive circuit, filtered to remove switch bounce.

RESET Switch (S2)

The RESET switch resets all onboard devices; it also drives a

SYSRESET

The Universe ASIC includes both a global and a local reset driver. When the Universe operates as the VMEbus system controller, the reset driver provides a global system reset by asserting the VMEbus signal

RESET switch, a power-up reset, a watchdog timeout, or by a

control bit in the Miscellaneous Control Register (MISC_CTL) in the Universe ASIC. required by the VMEbus specification.

∗ signal if the MVME2603/2604 is the system controller.

SYSRESET∗. A SYSRESET∗ signal may be generated by the

SYSRESET∗ remains asserted for at least 200 ms, as

Similarly, the Universe ASIC supplies an input signal and a control bit to initiate a local reset operation. By setting a control bit, software can maintain a board in a reset state, disabling a faulty board from participating in normal system operation. The local reset driver is enabled even when the Universe ASIC is not system controller. Local resets may be generated by the power-up reset, a watchdog timeout, a VMEbus

RESET switch, a

SYSRESET∗, or a

control bit in the MISC_CTL register.

2-3

Applying Power

Front Panel Indicators (DS1 - DS6)

There are six LEDs on the MVME2603/2604 front panel: CHS, BFL,

CPU, PCI, FUS, and SYS.

❏ CHS (DS1, yellow). Checkstop; driven by the MPC603/604

status lines on the MVME2603/2604. Lights when a halt condition from the processor is detected.

❏ BFL (DS2, yellow). Board Failure; lights when the BRDFAIL∗

signal line is active.

❏ CPU (DS3, green). CPU activity; lights when the DBB∗ (Data

Bus Busy) signal line on the processor bus is active.

❏ PCI (DS4, green). PCI activity; lights when the IRDY∗ (Initiator

Ready) signal line on the PCI bus is active. This indicates that the PCI mezzanine (if installed) is active.

❏ FUS (DS5, green). Fuse OK; lights when +5Vdc, +12Vdc, and

Ð12Vdc power is available from the base board to the transition module and remote devices.

Note Because the

FUS LED monitors the status of several

voltages on the MVME2603/2604, it does not directly indicate the condition of any single fuse. If the LED flickers or goes out, check all the fuses (polyswitches).

❏ SYS (DS6, green). System Controller; lights when the

Universe ASIC in the MVME2603/2604 is the VMEbus system controller.

2-4

Operating Instructions

Memory Maps

There are three points of view for memory maps:

❏ The mapping of all resources as viewed by the processor

(MPU bus memory map)

❏ The mapping of onboard resources as viewed by PCI local

bus masters (PCI bus memory map)

❏ The mapping of onboard resources as viewed by VMEbus

masters (VMEbus memory map)

The following sections give a general description of the MVME2603/2604 memory organization from the above three points of view. Detailed memory maps can be found in the

MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

Processor Memory Map

The processor memory map configuration is under the control of the Raven bridge controller ASIC and the Falcon memory controller chip set. The Raven and Falcon devices adjust system mapping to suit a given application via programmable map decoder registers. At system power-up or reset, a default processor memory map takes over.

Default Processor Memory Map

The default processor memory map that is valid at power-up or reset remains in effect until reprogrammed for specific applications. Table 2-1 defines the entire default map ($00000000 to $FFFFFFFF). Table 2-2 further defines the map for the local I/O devices (accessible through the PCI/ISA I/O Space).

2-5

Memory Maps

Table 2-1. Processor Default View of the Memory Map

Processor Address

Start End

00000000 7FFFFFFF 2GB Not Mapped

80000000 8001FFFF 128KB PCI/ISA I/O Space 1

80020000 FEF7FFFF 2GB-16MB-640KB Not Mapped

FEF80000 FEF8FFFF 64KB Falcon Registers

FEF90000 FEFEFFFF 384KB Not Mapped

FEFF0000 FEFFFFFF 64KB Raven Registers

FF000000 FFEFFFFF 15MB Not Mapped

FFF00000 FFFFFFFF 1MB ROM/Flash Bank A or Bank B 2

Notes

1. Default map for PCI/ISA I/O space. Allows software to determine whether the system is MPC105-based or Falcon/Raven-based by examining either the PHB Device ID or the CPU Type register.

2. The first 1MB of ROM/Flash bank A (soldered 4MB or 8MB ROM/Flash) appears in this range after a reset if the rom_b_rv control bit in the FalconÕs ROM B Base/Size register is cleared. If the rom_b_rv control bit is set, this address range maps to ROM/Flash bank B (socketed 1MB ROM/Flash).

Size DeÞnition Notes

For detailed processor memory maps, including suggested CHRPand PREP-compatible memory maps, refer to the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

PCI Local Bus Memory Map

The PCI memory map is controlled by the Raven MPU/PCI bus bridge controller ASIC and by the Universe PCI/VME bus bridge ASIC. The Raven and Universe devices adjust system mapping to suit a given application via programmable map decoder registers.

No default PCI memory map exists. Resetting the system turns the PCI map decoders off, and they must be reprogrammed in software for the intended application.

2-6

Operating Instructions

For detailed PCI memory maps, including suggested CHRP- and PREP-compatible memory maps, refer to the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

VMEbus Memory Map

The VMEbus is programmable. Like other parts of the MVME2603/2604 memory map, the mapping of local resources as viewed by VMEbus masters varies among applications.

The Universe PCI/VME bus bridge ASIC includes a userprogrammable map decoder for the VMEbus-to-local-bus interface. The address translation capabilities of the Universe enable the processor to access any range of addresses on the VMEbus.

Recommendations for VMEbus mapping, including suggested CHRP- and PREP-compatible memory maps, can be found in the

MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG). The following figure shows the

overall mapping approach from the standpoint of a VMEbus master.

Programming Considerations

Good programming practice dictates that only one MPU at a time have control of the MVME2603/2604 control registers. Of particular note are:

❏ Registers that modify the address map

❏ Registers that require two cycles to access

❏ VMEbus interrupt request registers

2-7

Programming Considerations

ONBOARD

MEMORY

PCI MEMORY

SPACE

PCI/ISA

MEMORY SPACE

PCI

I/O SPACE

NOTE 1

PCI MEMORYPROCESSOR

NOTE 2

NOTE 3

VMEBUS

PROGRAMMABLE

SPACE

VME A24

VME A16

VME A24

VME A16

VME A24

VME A16

VME A24

VME A16

MPC

RESOURCES

NOTES:

1. Programmable mapping done by Raven ASIC.

2. Programmable mapping performed via PCI Slave images in Universe ASIC.

3. Programmable mapping performed via Special Slave image (SLSI) in Universe ASIC.

Figure 2-2. VMEbus Master Mapping

2-8

11553.00 9609

Operating Instructions

PCI Arbitration

There are 7 potential PCI bus masters on the MVME2603/2604 single-board computer:

❏ Raven ASIC (MPU/PCI bus bridge controller)

❏ Winbond W83C553 PIB (PCI/ISA bus bridge controller)

❏ DECchip 21140 Ethernet controller

❏ SYM53C825A SCSI controller

❏ Universe ASIC (PCI/VME bus bridge controller)

❏ PMC Slot 1 (PCI mezzanine card)

❏ PMC Slot 2 (PCI expansion)

The Winbond W83C553 PIB device supplies the PCI arbitration support for these seven types of devices. The PIB supports flexible arbitration modes of fixed priority, rotating priority, and mixed priority, as appropriate in a given application. Details on PCI arbitration can be found in the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

The arbitration assignments for the MVME2603/2604 are shown in the following table.

Table 2-2. PCI Arbitration Assignments

PCI Bus Request PCI Master(s)

PIB (Internal) PIB CPU Secondary Ethernet

Secondary SCSI

Raven ASIC Request 0 PMC Slot 2 (PCIX) Request 1 PMC Slot 1 Request 2 Ethernet Request 3 SCSI Request 4 VMEbus (Universe ASIC)

2-9

Programming Considerations

Interrupt Handling

The Raven ASIC, which controls PHB (PCI Host Bridge) MPU/local bus interface functions on the MVME2603/2604, performs interrupt handling as well. Sources of interrupts may be any of the following:

❏ The Raven ASIC itself (timer interrupts or transfer error

interrupts)

❏ The processor (processor self-interrupts)

❏ The Falcon chip set (memory error interrupts)

❏ The PCI bus (interrupts from PCI devices)

❏ The ISA bus (interrupts from ISA devices)

The following figure illustrates interrupt architecture on the MVME2603/2604. For details on interrupt handling, refer to the

MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

2-10

INT

Operating Instructions

INT_

PIB

(8529 Pair)

Processor

MCP_

RavenMPIC

SERR_& PERR_

PCI Interrupts

ISA Interrupts

Figure 2-3. MVME2603/MVME2604 Interrupt Architecture

11559.00 9609

2-11

Programming Considerations

DMA Channels

The PIB supports seven DMA channels. Channels 0 through 3 support 8-bit DMA devices. Channels 5 through 7 are dedicated to 16-bit DMA devices. The channels are allocated as follows:

Table 2-3. IBC DMA Channel Assignments

IBC

Priority

1 Channel 0

2 Channel 1 Serial Port 3 Transmitter (Z85230 Port A Tx)

3 Channel 2 Floppy Drive Controller

4 Channel 3 Parallel Port

5 Channel 4

6 Channel 5 Serial Port 4 Receiver (Z85230 Port B Rx)

7 Channel 6 Serial Port 4 Transmitter (Z85230 Port B Tx)

IBC Label Controller DMA Assignment

Serial Port 3 Receiver (Z85230 Port A Rx)

DMA1

Not available Ñ Cascaded from DMA1

DMA2

8 Channel 7 Not Used

Sources of Reset

The MVME2603/2604 SBC has nine potential sources of reset:

1. Power-on reset

RESET switch (resets the VMEbus when the MVME2603/2604

2. is system controller)

3. Watchdog timer Reset function controlled by the SGSThomson MK48T559 timekeeper device (resets the VMEbus when the MVME2603/2604 is system controller)

ALT_RST∗ function controlled by the Port 92 register in the

PIB (resets the VMEbus when the MVME2603/2604 is system controller)

5. PCI/ISA I/O Reset function controlled by the Clock Divisor register in the PIB

2-12

Operating Instructions

6. The VMEbus SYSRESET∗ signal

7. VMEbus Reset sources from the Universe ASIC (PCI/VME bus bridge controller): the System Software reset, Local Software Reset, and VME CSR Reset functions

The following table shows which devices are affected by the various types of resets. For details on using resets, refer to the

MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

Table 2-4. Classes of Reset and Effectiveness

Device Affected

Processor

Reset Source

Power-On reset √√√√√ √ Reset switch √√√√√ √ Watchdog reset √√√√√ √ VME SYSRESET∗signal √√√√√ √

Raven

ASIC

Falcon

Chip Set

PCI

Devices

ISA

Devices

VMEbus

(as system

controller

VME System SW reset √√√√√ √ VME Local SW reset √√√√√ VME CSR reset √√√√√ Hot reset (Port 92) √√√√√ PCI/ISA reset √√

Endian Issues

The MVME2603/2604 supports both little-endian (e.g., Windows NT) and big-endian (e.g., AIX) software. The PowerPC processor and the VMEbus are inherently big-endian, while the PCI bus is inherently little-endian. The following sections summarize how the MVME2603/2604 handles software and hardware differences in big- and little-endian operations. For further details on endian considerations, refer to the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

2-13

Programming Considerations

Processor/Memory Domain

The MPC603/604 processor can operate in both big-endian and little-endian mode. However, it always treats the external processor/memory bus as big-endian by performing address rearrangement and reordering when running in little-endian mode. The MPC registers in the Raven MPU/PCI bus bridge controller ASIC and the Falcon memory controller chip set, as well as DRAM, ROM/Flash, and system registers, always appear as big-endian.

Role of the Raven ASIC

Because the PCI bus is little-endian, the Raven performs byte swapping in both directions (from PCI to memory and from the processor to PCI) to maintain address invariance while programmed to operate in big-endian mode with the processor and the memory subsystem.

In little-endian mode, the Raven reverse-rearranges the address for PCI-bound accesses and rearranges the address for memory-bound accesses (from PCI). In this case, no byte swapping is done.

PCI Domain

The PCI bus is inherently little-endian. All devices connected directly to the PCI bus operate in little-endian mode, regardless of the mode of operation in the processorÕs domain.

PCI and SCSI

SCSI is byte-stream-oriented; the byte having the lowest address in memory is the first one to be transferred regardless of the endian mode. Since the Raven ASIC maintains address invariance in both little-endian and big-endian modes, no endian issues should arise for SCSI data. Big-endian software must still take the byteswapping effect into account when accessing the registers of the PCI/SCSI device, however.

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Operating Instructions

PCI and Ethernet

Ethernet is also byte-stream-oriented; the byte having the lowest address in memory is the first one to be transferred regardless of the endian mode. Since the Raven maintains address invariance in both little-endian and big-endian mode, no endian issues should arise for Ethernet data. Big-endian software must still take the byteswapping effect into account when accessing the registers of the PCI/Ethernet device, however.

Role of the Universe ASIC

Because the PCI bus is little-endian while the VMEbus is bigendian, the Universe PCI/VME bus bridge ASIC performs byte swapping in both directions (from PCI to VMEbus and from VMEbus to PCI) to maintain address invariance, regardless of the mode of operation in the processorÕs domain.

VMEbus Domain

The VMEbus is inherently big-endian. All devices connected directly to the VMEbus must operate in big-endian mode, regardless of the mode of operation in the processorÕs domain.

In big-endian mode, byte-swapping is performed first by the Universe ASIC and then by the Raven. The result is transparent to big-endian software (a desirable effect).

In little-endian mode, however, software must take the byteswapping effect of the Universe ASIC and the address reverse- rearranging effect of the Raven into account.

For further details on endian considerations, refer to the

MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide (part number V2600A/PG).

2-15

Programming Considerations

2-16

Introduction

This chapter describes the MVME2603/2604 single-board computer on a block diagram level. The General Description provides an overview of the MVME2603/2604, followed by a detailed description of several blocks of circuitry. Figure 3-1 shows a block diagram of the overall board architecture.

Detailed descriptions of other MVME2603/2604 blocks, including programmable registers in the ASICs and peripheral chips, can be found in the ProgrammerÕs Reference Guide (part number V2600A/PG). Refer to it for a functional description of the MVME2603/2604 in greater depth.

3Functional Description

Features

The following table summarizes the features of the MVME2603/2604 single-board computers.

Table 3-1. MVME2603/2604 Features

Feature Description

Microprocessor

ECC DRAM 16MB-256MB on RAM200 module L2 cache memory (Optional) 256KB on base board

Flash Memory

Real-time clock Switches RESET and ABORT

Status LEDs Six: CHS, BFL, CPU, PCI, FUS, and SYS

MPC603 PowerPC MPC604 PowerPC

Two 32-pin PLCC sockets (1MB 16-bit Flash) on base board; two banks (4MB or 8MB 64-bit Flash) on RAM200 module

8KB NVRAM with RTC and battery backup (SGS-Thomson M48T59/T559)

processor (MVME2603-n1n1 models)

processor (MVME2604-n1n1 models)

3-1

Features

Table 3-1. MVME2603/2604 Features (Continued)

Feature Description

Tick timers

Watchdog timer Provided in SGS-Thomson M48T59

Interrupts

VME I/O VMEbus P2 connector

Serial I/O

Parallel I/O

SCSI I/O

Four programmable 16-bit timers (one in S82378ZB ISA bridge; three in Z8536 CIO device)

Software interrupt handling via Raven (PCI-MPU bridge) and Winbond (PCI-ISA bridge) controllers

MVME712M-compatible models: 3 async ports, 1 sync/async port via P2 and transition module

MVME761-compatible models: 2 async ports, 2 sync/async ports via P2 and transition module

MVME712M-compatible models: Centronics parallel port (PC87308 SIO) via P2 and transition module

MVME761-compatible models: IEEE 1284 bidirectional parallel port (PC87308 SIO) via P2 and transition module

MVME712M-compatible models: 8-bit/16-bit single-ended fast SCSI-2 interface (SYM53C825A) via P2 and transition module

MVME761-compatible models: 8-bit/16-bit single-ended fast SCSI-2 interface (SYM53C825A) via P2

Ethernet I/O

PCI interface

Keyboard/mouse interface

Floppy disk controller

MVME712M-compatible models: AUI connections via P2 and transition module

MVME761-compatible models: 10Base-T/100Base-TX connections via P2 and transition module

One IEEE P1386.1 PCI Mezzanine Card (PMC) slot; one 114-pin Mictor connector for additional PMC carrier board

Support for keyboard and mouse input (PC87308 SIO) via front panel

Support for ßoppy disk drive (PC87308 SIO) via front panel connector

3-2

Table 3-1. MVME2603/2604 Features (Continued)

Feature Description

Functional Description

VMEbus system controller functions VMEbus-to-local-bus interface (A24/A32, D8/D16/D32/block

transfer [D8/D16/D32/D64]) Local-bus-to-VMEbus interface (A16/A24/A32, D8/D16/D32)

VMEbus interface

VMEbus interrupter VMEbus interrupt handler Global control/status register for interprocessor communications DMA for fast local memory/VMEbus transfers (A16/A24/A32,

D16/D32/D64)

General Description

The MVME2603/2604 is a VMEmodule single-board computer equipped with a PowerPCª Series microprocessor. The MVME2603 is equipped with a PowerPC 603 microprocessor; the MVME2604 has a PowerPC 604. 256KB L2 cache (level 2 secondary cache memory) is available as an option on all versions.

As shown in the Features section, The MVME2603/2604 offers many standard features desirable in a computer systemÑsuch as synchronous and asynchronous serial ports, parallel port, boot ROM and DRAM, SCSI, Ethernet, support for an external disk drive, and keyboard and mouse supportÑin a single-slot VME package. Its flexible mezzanine architecture allows relatively easy upgrades in memory and functionality.

A key feature of the MVME2603/2604 family is the PCI (Peripheral Component Interconnect) bus. In addition to the on-board local bus peripherals, the PCI bus supports an industry-standard mezzanine interface, IEEE P1386.1 PMC (PCI Mezzanine Card). PMC modules offer a variety of possibilities for I/O expansion through FDDI (Fiber Distributed Data Interface), ATM (Asynchronous Transfer

3-3

General Description

Mode), graphics, Ethernet, or SCSI ports. The base board supports PMC front panel I/O. There is also provision for additional expansion via a PMC carrier board.

3-4

Block Diagram

Figure 3-1 is a block diagram of the MVME2603/2604Õs overall

architecture.

Functional Description

PS/2 Floppy

Dram

FLASH

Sys CSR

Processor L2 Cache

60X System Bus

Falcon Falcon

Raven

Parallel

Keyboard

Mouse

Async Serial

Sync SerialISA SIO

ISA Local Resource Bus

NVRAM

ISA CSRPIB

RTC

Slot 1 Slot 2

PMC/PCIXPMC

Figure 3-1. MVME2603/2604 Block Diagram

33MHz 32/64-BIT PCI Local Bus

EthernetSCSIVME

11540.00 96111 (3-3)

3-5

Block Diagram

SCSI Interface

The MVME2603/2604 VMEmodule supports mass storage subsystems through the industry-standard SCSI bus. These subsystems may include hard and floppy disk drives, streaming tape drives, and other mass storage devices. The SCSI interface is implemented using the Symbios 53C825A SCSI I/O controller at a clock speed of 40MHz. The SCSI I/O controller connects directly to the PCI local bus.

The MVME2603/2604 routes its SCSI lines through the P2 connector to the MVME712M transition module (as illustrated in

Figure 1-22). The SCSI control lines have filter networks to

minimize the effects of VMEbus signal noise at P2.

The SCSI bus is 16 bits wide in systems that support the VME64 extension (i.e., those equipped with 5-row, 160-pin VME backplane connectors). The SCSI bus is 8 bits wide in VME systems that do not support the extension. Refer to the MVME712M User's Manual for the pin assignments of the SCSI connectors used on the transition module. Refer to the Symbios 53C825A data manual for detailed programming information.

SCSI T ermination

The individual configuring the system must ensure that the SCSI bus is properly terminated at both ends.

In MVME712M I/O mode, the MVME2603/2604 base board uses the sockets provided for SCSI bus terminators on the P2 adapter board used with the MVME712M. If the SCSI bus ends at the adapter board, termination resistors must be installed there. +5Vdc power to the SCSI bus supplied through a fuse located on the adapter board.

In MVME761 I/O mode, the P2 adapter board used with the MVME761 has a jumper to enable/disable SCSI bus terminators. +5Vdc power for SCSI termination is supplied through a polyswitch located on the adapter board.

3-6

TERMPWR signal and termination resistors is

Ethernet Interface

The MVME2603/2604 VMEmodule uses Digital EquipmentÕs DECchip 21140 PCI Fast Ethernet LAN controller to implement an Ethernet interface that supports both AUI (via MVME712M) and 10Base-T/100Base-TX (via MVME761) connections. The balanced differential transceiver lines are coupled via on-board transformers.

The MVME2603/2604 routes its AUI and 10Base-T/100Base-TX lines through the P2 connector to the transition module (as illustrated in Figure 1-22 and Figure 1-22). The MVME712M front panel has an industry-standard DB15 connector for an AUI connection. The MVME761 supports 10Base-T/100Base-TX connections.

Every MVME2603/2604 is assigned an Ethernet station address. The address is $08003E2xxxxx, where xxxxx is the unique 5-nibble number assigned to the board (i.e., every board has a different value for xxxxx).

Functional Description

Each MVME2603/2604 displays its Ethernet station address on a label attached to the base board in the PMC connector keepout area just behind the front panel. In addition, the six bytes including the Ethernet station address are stored in an SROM off the DECchip Ethernet controller. That is, the value 08003E2xxxxx is stored in SROM. At an offset of $1F2C, the upper four bytes (08003E2x) can be read. At an offset of $1F30, the lower two bytes (xxxx) can be read. The MVME2603/2604 debugger, PPCBug, has the capability to retrieve or set the Ethernet station address via the CNFG command.

If the data in SROM is lost, use the number on the label in the PMC connector keepout area to restore it.

For the pin assignments of the transition module AUI or 10BaseT/100Base-TX connector, refer to the userÕs manual for the MVME712M or MVME761 (listed in the Related Documentation appendix) respectively. Refer to the BBRAM/TOD Clock memory

3-7

Block Diagram

map description in the MVME2600 Series Single Board Computer Programmer's Reference Guide for detailed programming information.

PCI Mezzanine Interface

A key feature of the MVME2603/2604 family is the PCI (Peripheral Component Interconnect) bus. In addition to the on-board local bus devices (SCSI, Ethernet, graphics, etc.), the PCI bus supports an industry-standard mezzanine interface, IEEE P1386.1 PMC (PCI Mezzanine Card).

PMC modules offer a variety of possibilities for I/O expansion through FDDI (Fiber Distributed Data Interface), ATM (Asynchronous Transfer Mode), graphics, Ethernet, or SCSI ports. The base board supports PMC front panel and rear P2 I/O. There is also provision for stacking a PMC carrier board on the base board for additional expansion.

The MVME2603/2604 supports one PMC slot. Four 64-pin connectors on the base board (J11, J12, J13, and J14) interface with 32-bit IEEE P1386.1 PMC-compatible mezzanines to add any desirable function. The PCI Mezzanine Card slot has the following characteristics:

Mezzanine Type PMC (PCI Mezzanine Card)

Mezzanine Size

PMC Connectors

Signaling Voltage Vio = 5.0Vdc

S1B: Single width, standard depth (75mm x 150mm) with front panel

J11 and J12 (32/64-Bit PCI with front and rear I/O)

The PMC carrier board connector (J5) is a 114-pin Mictor connector.

3-8

Refer to Chapter 4 for the pin assignments of the PMC connectors. For detailed programming information, refer to the PCI bus descriptions in the MVME2603/2604 Programmer's Reference Guide and to the user documentation for the PMC modules you intend to use.

VMEbus Interface

The VMEbus interface is implemented with the CA91C042 ÔÔUniverseÕÕ ASIC. The Universe chip interfaces the 32/64-bit PCI local bus to the VMEbus.

The Universe ASIC provides:

❏ The PCI-bus-to-VMEbus interface

❏ The VMEbus-to-PCI-bus interface

Functional Description

❏ The DMA controller functions of the local VMEbus

The Universe chip includes Universe Control and Status Registers (UCSRs) for interprocessor communications. It can provide the VMEbus system controller functions as well. For detailed programming information, refer to the Universe UserÕs Manual and to the discussions in the MVME2603/2604 Programmer's Reference Guide.

ISA Super I/O Device (ISASIO)

The MVME2603/2604 uses a PC87308 ISASIO chip from National Semiconductor to implement certain segments of the P2 and frontpanel I/O:

❏ Two asynchronous serial ports (COM1 and COM2) via P2

and transition module

❏ Parallel port via P2 and transition module:

Ð Centronics printer port in MVME712M-compatible

models

3-9

Block Diagram

Ð IEEE1284 bidirectional parallel port in MVME761-

compatible models

❏ Floppy disk drive support via drive/power connector J4

❏ Keyboard and mouse interface via circular DIN connectors J6

and J8

3-10

Asynchronous Serial Ports

The two asynchronous ports provided by the ISASIO device employ TTL-level signals that are buffered through EIA-232-D drivers and receivers and routed to the P2 connector.

Hardware initializes the two serial ports as COM1 and COM2 with ISA I/O base addresses of $3F8 and $2F8 respectively. This default configuration also assigns COM1 to PIB (PCI/ISA Bridge Controller) interrupt request line IRQ4 and COM2 to IRQ3. You can change the default configuration by reprogramming the ISASIO device. For detailed programming information, refer to the PCI and ISA bus discussions in the MVME2603/2604 Programmer's Reference Guide and to the vendor documentation for the ISASIO device.

Parallel Port

The parallel port is a Centronics printer interface in MVME712Mcompatible models, and a full IEEE1284 bidirectional parallel port in MVME761-compatible models. Both versions are implemented with the ISASIO device. All parallel I/O interface signals are routed to P2 through series damping resistors.

Functional Description

Hardware initializes the parallel port as PPT1 with an ISA IO base address of $3BC. This default configuration also assigns the parallel port to PIB (PCI/ISA Bridge Controller) interrupt request line IRQ7. You can change the default configuration by reprogramming the ISASIO device. For detailed programming information, refer to the PCI and ISA bus discussions in the MVME2603/2604 Programmer's Reference Guide and to the vendor documentation for the ISASIO device.

3-11

Block Diagram

Disk Drive Controller

The ISASIO device incorporates a PS/2-compatible low- and highdensity disk drive controller for use with an optional external disk drive. The drive interfaces with the ISASIO controller via base board connector J4, which relays both power and control signals.

The ISASIO disk drive controller is compatible with the DP8473, 765A, and N82077 devices commonly used to implement floppy disk controllers. Software written for those devices may be used without change to operate the ISASIO controller. The ISASIO device may be used to support any of the following devices:

❏ 3

❏ 5

❏ Standard 250kbps to 2Mbps tape drive system

/2-inch 1.44MB floppy disk drive

/4-inch 1.2MB floppy disk drive

Keyboard and Mouse Interface

The National Semiconductor PC87308 ISASIO chip used to implement certain segments of the P2 and front-panel I/O provides ROM-based keyboard and mouse interface control. The front panel of the MVME2603/2604 board has two 6-pin circular DIN connectors for the keyboard and mouse connections.

PCI-ISA Bridge (PIB) Controller

The MVME2603/2604 uses a Winbond W83C553 bridge controller to supply the interface between the PCI local bus and the ISA system I/O bus (diagrammed in Figure 1-1).

3-12

Functional Description

The PIB controller provides the following functions:

❏ PCI bus arbitration for:

Ð ISA (Industry Standard Architecture) bus DMA Ð The PHB (PCI Host Bridge) MPU/local bus interface

function, implemented by the Raven ASIC Ð All on-board PCI devices Ð The PMC (PCI Mezzanine Card) slot

❏ ISA (Industry Standard Architecture) bus arbitration for

DMA devices

❏ ISA interrupt mapping for four PCI interrupts

❏ Interrupt controller functionality to support 14 ISA interrupts

❏ Edge/level control for ISA interrupts

❏ Seven independently programmable DMA channels

❏ One 16-bit timer

❏ Three interval counters/timers

Accesses to the configuration space for the PIB (PCI/ISA Bridge) controller are performed by way of the CONADD and CONDAT (Configuration Address and Data) registers in the Raven bridge controller ASIC. The registers are located at offsets $CF8 and $CFC, respectively, from the PCI I/O base address.

Real-Time Clock/NVRAM/Timer Function

The MVME2603/2604 employs an SGS-Thomson surface-mount M48T59/T559 RAM and clock chip to provide 8KB of non-volatile static RAM, a real-time clock, and a watchdog timer function. This chip supplies a clock, oscillator, crystal, power failure detection, memory write protection, 8KB of NVRAM, and a battery in a package consisting of two parts:

3-13

Block Diagram

❏ A 28-pin 330mil SO device containing the real-time clock, the

oscillator, power failure detection circuitry, timer logic, 8KB of static RAM, and gold-plated sockets for a battery

❏ A SNAPHAT battery housing a crystal along with the battery

The SNAPHAT battery package is mounted on top of the M48T59/T559 device. The battery housing is keyed to prevent reverse insertion.

The clock furnishes seconds, minutes, hours, day, date, month, and year in BCD 24-hour format. Corrections for 28-, 29- (leap year), and 30-day months are made automatically. The clock generates no interrupts. Although the M48T59/T559 is an 8-bit device, 8-, 16-, and 32-bit accesses from the ISA bus to the M48T59/T559 are supported. Refer to the MVME2603/2604 Programmer's Reference Guide and to the M48T59/T559 data sheet for detailed programming and battery life information.

Programmable Timers

Among the resources available to the local processor are a number of programmable timers. Timers are incorporated into the PIB controller and the Z8536 CIO device (diagrammed in Figure 1-1 and

Figure 3-1). They can be programmed to generate periodic

interrupts to the processor.

Interval Timers

The PCI-ISA Bridge controller has three built-in counters that are equivalent to those found in an 82C54 programmable interval timer. The counters are grouped into one timer unit, Timer 1, in the PIB controller. Each counter output has a specific function:

❏ Counter 0 is associated with interrupt request line IRQ0. It

can be used for system timing functions, such as a timer interrupt for a time-of-day function.

❏ Counter 1 generates a refresh request signal for ISA memory.

This timer is not used in the MVME2603/2604.

3-14

Motorola MVME2603-1131A, MVME2603-2141A, MVME2603-2121A, MVME2603-2131A, MVME2603-2191A Installation And Use Manual

Specifications and Main Features

Frequently Asked Questions

User Manual