Motorola MVME187 User Manual

MVME187
RISC Single Board Computer
Installation Guide
MVME187IG/D4

Notice

While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
No part of this material may be reproduced or copied in any tangible medium, or stored in a retrieval system, or transmitted in any form, or by any means, radio, electronic, mechanical, photocopying, recording or facsimile, or otherwise, without the prior written permission of Motorola, Inc.
It is possible that this publication may contain reference to, or information about Motorola products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that Motorola intends to announce such Motorola products, programming, or services in your country.

Restricted Rights Legend

If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply unless otherwise agreed to in writing by Motorola, Inc.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the Rights in Technical Data and Computer Software clause at DFARS 252.227-7013.
Motorola, Inc.
Computer Group
2900 South Diablo Way
Tempe, Arizona 85282-9602

Preface

This manual provides a general board level hardware description, hardware preparation and installation instructions, debugger general information, and information about using the debugger.
This manual applies to the following MVME187 RISC Single Board Computers:
Assembly Item Board Description
MVME187 MVME187 MVME187 MVME187 MVME187 MVME187 MVME187 MVME187 MVME187 MVME MVME187 MVME187
-001B 25MHZ, 4MB Parity
-002B 25MHZ, 8MB Parity
-003B 25MHZ, 16MB Parity
-004B 25MHZ, 32MB Parity
-023B 33MHZ, 16MB ECC, 128
-024B 33MHZ, 32MB ECC, 128C
-031B 33MHZ, 4MB ECC
-032B 33MHZ, 8MB ECC
-033B 33MHZ, 16MB ECC
187-034B 33MHZ, 32MB ECC
-035B 33MHZ, 64MB ECC
-036B 33MHZ, 128MB ECC
This manual is intended for anyone who wants to provide OEM systems, supply additional capability to an existing compatible system, or work in a lab environment for experimental purposes.
Anyone using this manual should have a basic knowledge of computers and digital logic.
Safety Summary
Safety Depends On You
The following general safety precautions must be observed during all phases of operation, service, and repair of this equipment. Failure to comply with these precautions or with speciÞc warnings elsewhere in this manual violates safety standards of design, manufacture, and intended use of the equipment. Motorola, Inc. assumes no liability for the customer's failure to comply with these requirements.
The safety precautions listed below represent warnings of certain dangers of which Motorola is aware. You, as the user of the product, should follow these warnings and all other safety precautions necessary for the safe operation of the equipment in your operating environment.

Ground the Instrument.

To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical ground. The equipment is supplied with a three-conductor ac power cable. The power cable must be plugged into an approved three-contact electrical outlet. The power jack and mating plug of the power cable meet International Electrotechnical Commission (IEC) safety standards.

Do Not Operate in an Explosive Atmosphere.

Do not operate the equipment in the presence of ßammable gases or fumes. Operation of any electrical equipment in such an environment constitutes a deÞnite safety hazard.

Keep Away From Live Circuits.

Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other qualiÞed maintenance personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment. Do not replace components with power cable connected. Under certain conditions, dangerous voltages may exist even with the power cable removed. To avoid injuries, always disconnect power and discharge circuits before touching them.

Do Not Service or Adjust Alone.

Do not attempt internal service or adjustment unless another person capable of rendering Þrst aid and resuscitation is present.

Use Caution When Exposing or Handling the CRT.

Breakage of the Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implosion). To prevent CRT implosion, avoid rough handling or jarring of the equipment. Handling of the CRT should be done only by qualiÞed maintenance personnel using approved safety mask and gloves.

Do Not Substitute Parts or Modify Equipment.

Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized modiÞcation of the equipment. Contact your local Motorola representative for service and repair to ensure that safety features are maintained.

Dangerous Procedure Warnings.

Warnings, such as the example below, precede potentially dangerous procedures throughout this manual. Instructions contained in the warnings must be followed. You should also employ all other safety precautions which you deem necessary for the operation of the equipment in your operating environment.
Dangerous voltages, capable of causing death, are
!
WARNING
present in this equipment. Use extreme caution when handling, testing, and adjusting.
All Motorola PWBs (printed wiring boards) are manufactured by UL-recognized manufacturers, with a ßammability rating of 94V-0.
This equipment generates, uses, and can radiate electro-
!
WARNING
magnetic energy. It may cause or be susceptible to electro-magnetic interference (EMI) if not installed and used in a cabinet with adequate EMI protection.
European Notice: Board products with the CE marking comply with the EMC Directive (89/336/EEC). Compliance with this directive implies conformity to the following European Norms:
EN55022 (CISPR 22) Radio Frequency Interference
EN50082-1 (IEC801-2, IEC801-3, IEEC801-4) Electromagnetic Immunity
The product also fulÞlls EN60950 (product safety) which is essentially the requirement for the Low Voltage Directive (73/23/EEC).
This board product was tested in a representative system to show compliance with the above mentioned requirements. A proper installation in a CE-marked system will maintain the required EMC/safety performance.
The computer programs stored in the Read Only Memory of this device contain material copyrighted by Motorola Inc., 1995, and may be used only under a license such as those contained in MotorolaÕs software licenses.
¨
Motorola
and the Motorola symbol are registered trademarks of Motorola, Inc.
All other products mentioned in this document are trademarks or registered trademarks of their respective holders.
©Copyright Motorola 1997
All Rights Reserved
Printed in the United States of America
March 1997
Contents
This Chapter Covers 1-1 About this Manual 1-1 Terminology, Conventions, and DeÞnitions Used in this Manual 1-2
Data and Address Parameter Numeric Formats 1-2 Signal Name Conventions 1-2 Assertion and Negation Conventions 1-3 Data and Address Size DeÞnitions 1-3 Big-Endian Byte Ordering 1-3 Control and Status Bit DeÞnitions 1-4 True/False Bit State DeÞnitions 1-4 Bit Value Descriptions 1-4
Related Documentation 1-5
xx
Document Set for MVME187-0 Additional Manuals for this Board 1-6 Other Applicable Motorola Publications 1-6 Non-Motorola Peripheral Controllers Publications Bundle 1-7 Applicable Non-Motorola Publications 1-9
This Chapter Covers 2-1 General Description 2-1
Onboard Memory Mezzanine Module 2-2 SCSI Mass Storage Interface 2-2 Serial Ports 2-3 Parallel (Printer) Port 2-3 Ethernet Transceiver Interface 2-3 187Bug Firmware 2-4
Features 2-4 SpeciÞcations 2-6
Conformance to Requirements 2-6
Board Level Overview 2-7
Connectors 2-7 Adapters 2-7 Transition Modules 2-8 ASICs 2-8
VMEchip2 ASIC 2-9 PCCchip2 ASIC 2-9 MEMC040 Memory Controller ASIC 2-10
Board 1-5
MCECC Memory Controller ASIC 2-10
Functional Description 2-10
Front Panel Switches and LEDs 2-11 Data Bus Structure 2-12
Local Bus Arbitration 2-12 M88000 MPU 2-12 EPROM 2-13
Programmable EPROM Features 2-13 Static RAM 2-13
Optional SRAM Battery Backup 2-14 Onboard DRAM 2-15
Stacking Mezzanines 2-16
DRAM Programming Considerations 2-16 Battery Backed Up RAM and Clock 2-17 VMEbus Interface 2-18 I/O Interfaces 2-18
Serial Port Interface 2-18
Parallel Port Interface 2-20
Ethernet Interface 2-21
SCSI Interface 2-22 Local Resources 2-23
Programmable Tick Timers 2-23
Watchdog Timer 2-23
Software-Programmable Hardware Interrupts 2-23
Local Bus Timeout 2-23
Memory Maps 2-24
Local Bus Memory Map 2-24
Normal Address Range Devices 2-24 VMEbus Memory Map 2-28
VMEbus Accesses to the Local Bus 2-28
VMEbus Short I/O Memory Map 2-28
This Chapter Covers 3-1 Unpacking the Equipment 3-1 Overview of Startup Procedure 3-2 Preparing the Hardware 3-5
Modifying ConÞguration before Installation 3-5
Option Modification 3-5 Checking the 187Bug EPROMs 3-7
EPROM Location 3-7
EPROM Orientation 3-7
User-programmed EPROMs 3-7
Jumper Settings 3-7
Optional Jumper Settings 3-8 General Purpose Software Readable Header J1 3-8 System Controller Header J2 3-10 Optional SRAM Backup Power Source Select Header J6 3-11
Serial Port 4 Clock Configuration Select Headers J7 and J8 3-11 Preparing the MVME187 for Installation 3-14 Preparing the System Chassis 3-15
Installing the Hardware 3-16
Installing the MVME187 in the Chassis 3-16 Transition Modules and Adapter Boards Overview 3-17
Equipment Connections 3-19 Installing Transition Modules and Adapter Boards 3-20 Connecting Peripherals 3-20 Completing the Installation 3-24 Starting the System 3-24
Powering Up the System 3-25
Initializing the Real-Time Clock 3-25
Examining and/or Changing Environmental Parameters 3-25
Programming the PCCchip2 and VMEchip2 3-26
System Considerations 3-27
Backplane Power Connections 3-27
Memory Address Ranges 3-27
DRAM Addressing 3-27
Global Bus Timeout 3-27
Multiple Module Cage Configuration 3-28
GCSR Location Monitor Register 3-28
Ethernet LAN (+12 Vdc) Fuse 3-28
SCSI Bus Termination 3-29
Storage and the Real-Time Clock 3-29
This Chapter Covers 4-1 Introduction to MVME187Bug 4-1
Overview of M88000 Firmware 4-1 Description of 187Bug 4-2
Command Facilities 4-2
Trap #496 Routines 4-2
Debugger or Diagnostic Directories 4-3
Keyboard Control 4-3 Comparison with M68000-Based Firmware 4-4 187Bug Implementation 4-4 Memory Requirements 4-5
Booting and Restarting 187Bug 4-5
Starting Up 187Bug 4-6 Autoboot 4-6
Autoboot Sequence 4-6
ROMboot 4-7
ROMboot Sequence 4-7
Network Boot 4-8
Network Boot Sequence 4-8
Restarting the System 4-9
Reset 4-10 Abort 4-10 Break 4-11 SYSFAIL* Assertion/Negation 4-12 MPU Clock Speed Calculation 4-12
Disk I/O Support 4-13
Disk Support Facilities 4-13
Parameter Tables 4-13
Supported Controllers 4-13 Blocks Versus Sectors 4-14 Device Probe Function 4-14 Disk I/O via 187Bug Commands 4-15
IOI (Input/Output Inquiry) 4-15
IOP (Physical I/O to Disk) 4-15
IOT (I/O Teach) 4-15
IOC (I/O Control) 4-15
BO (Bootstrap Operating System) 4-15
BH (Bootstrap and Halt) 4-16 Disk I/O via 187Bug System Calls 4-16
Controller Command Packets 4-16 Default 187Bug Controller and Device Parameters 4-17 Disk I/O Error Codes 4-18
Network I/O Support 4-19
Intel 82596 LAN Coprocessor Ethernet Driver 4-19 UDP/IP Protocol Modules 4-19 RARP/ARP Protocol Modules 4-20 BOOTP Protocol Module 4-20 TFTP Protocol Module 4-20 Network Boot Control Module 4-20 Network I/O Error Codes 4-21
Multiprocessor Support 4-21
Multiprocessor Control Register (MPCR) Method 4-21
MPCR Status Codes 4-22 Multiprocessor Address Register (MPAR) 4-22 MPCR Powerup Sequence 4-22
Global Control and Status Register (GCSR) Method 4-24
Diagnostic Facilities 4-25
187Bug Diagnostic Test Groups 4-27
This Chapter Covers 5-1 Entering Debugger Command Lines 5-1
Terminal Input/Output Control 5-1 Debugger Command Syntax 5-3 Syntactic Variables 5-4
Expression as a Parameter 5-4 Address as a Parameter 5-5 Address Formats 5-6 Offset Registers 5-7
Port Numbers 5-7
Entering and Debugging Programs 5-8
Creating a Program with the Assembler/Disassembler 5-8 Downloading an S-Record Object File 5-8 Read the Program from Disk 5-9
Calling System Utilities from User Programs 5-9 Preserving the Debugger Operating Environment 5-10
187Bug Vector Table and Workspace 5-10 Hardware Functions 5-11 Exception Vectors Used by 187Bug 5-11 CPU/MPU Registers 5-11
Floating Point Support 5-11
Single Precision Real 5-13 Double Precision Real 5-13 ScientiÞc Notation 5-14
The 187Bug Debugger Command Set 5-15 This Appendix Covers A-1 ConÞguring the Board Information Block A-1 Setting Environment to Bug/Operating System A-3 Disk/Tape Controller Modules Supported B-1 Disk/Tape Controller Default ConÞgurations B-2 IOT Command Parameters for Supported Floppy Types B-4 Network Controller Modules Supported C-1 Introduction E-1 Levels of Implementation E-3
Signal Adaptations E-4 Sample ConÞgurations E-4 Proper Grounding E-7
List of Figures
MVME187 General Block Diagram 2-7 MVME187 Switches, Headers, Connectors, Fuses, and LEDs 3-6 Typical Internal SCSI and Serial Port Connections 3-18 Using MVME712A/AM and MVME712B 3-22 Typical Transition Module Peripheral Port Connectors 3-23
List of Tables
MVME187 General SpeciÞcations 2-6 Bus Transfers 2-9 Front Panel Switches 2-11 Front Panel LEDs 2-11 Local Bus Memory Map 2-25 Local I/O Devices Memory Map 2-26 Startup Overview 3-2 J1 Bit Descriptions 3-9 Factory Settings for J1 General Purpose Readable Jumpers 3-9 Settings for J2 System Controller Header 3-10 Settings for Optional J6 SRAM Backup Power Source
Select Header 3-12 Settings for J7 and J8 Serial Port 4 Clock ConÞguration
Select Headers 3-13 MVME187 Preparation Procedure 3-14 Chassis Preparation/Slot Selection Procedure 3-15 MVME187 Installation Procedure 3-16 Peripheral Connections 3-19 Transition Module and Adapter Board Installation Overview 3-20 Peripheral Connection Procedures 3-21 Installation Completion Procedure 3-24 System Startup Overview 3-24 RTC Initialization Procedure 3-26 Diagnostic Monitor Commands/PreÞxes 4-25 Diagnostic Utilities 4-26 Diagnostic Test Groups 4-27 Debugger Commands 5-15
xiv
1Introduction to the MVME187
Installation Guide

This Chapter Covers

Details about this manual
Terminology, conventions, and definitions used
Other publications relevant to the MVME187

About this Manual

This manual supports the setup, installation, and debugging of the RISC-based MVME187 Single Board Computer; a high­performance engine for VMEbus-based low- and mid-range OEM and integrated systems, embedded controllers, and other single­board computer applications.
This manual provides:
A general
Board Level Hardware Description
1
in Chapter 2
Hardware Preparation and Installation
Debugger General Information
Debugger/monitor commands, and other information about
Using the 187Bug Debugger
Other information needed for start-up and troubleshooting of
the MVME187 RISC Single Board Computer, including Ð
Configure and Environment Commands
Ð
Disk/Tape Controller Data
modules supported by 187Bug
Ð
Network Controller Data
Ð Procedures for Ð
EIA-232-D Interconnections
Troubleshooting CPU Boards
in Chapter 4
in Chapter 5
in Appendix B for controller
in Appendix C
instructions in Chapter 3
in Appendix A
in Appendix D
in Appendix E
1-1
1
Introduction to the MVME187 Installation Guide
Terminology, Conventions, and Definitions Used in this Manual

Data and Address Parameter Numeric Formats

Throughout this manual, a character identifying the numeric format precedes data and address parameters as follows:
$ dollar speciÞes a hexadecimal character % percent speciÞes a binary number & ampersand speciÞes a decimal number
For example, Ò12Ó is the decimal number twelve, and Ò$12Ó is the decimal number eighteen.
Unless otherwise specified, all address references are in hexadecimal.

Signal Name Conventions

An asterisk (*) follows signal names for signals which are level or edge significant:

Term * Indicates

level
signiÞcant
edge
signiÞcant
1-2
The signal is true or valid when the signal is low.
The actions initiated by that signal occur on high to low transition.
Terminology, Conventions, and Definitions Used in this Manual

Assertion and Negation Conventions

Assertion and negation are used to specify forcing a signal to a particular state. These terms are used independently of the voltage level (high or low) that they represent.

Term Indicates

1

Assertion and assert

Negation and negate

The signal is active or true.
The signal is inactive or false.
Data and Address Size Definitions
Data and address sizes are defined as follows:

Name Size Numbered SigniÞcance Called

Byte 8 bits 0 through 7
Two-byte 16 bits 0 through 15
Four-byte 32 bits 0 through 31

Big-Endian Byte Ordering

bit 0 is the least signiÞcant
bit 0 is the least signiÞcant
bit 0 is the least signiÞcant
half­word
word
This manual assumes that the MPU on the MVME187 always programs the CMMUs with big-endian byte ordering, as shown below. Any attempt to use little-endian byte ordering will immediately render the MVME187Bug debugger unusable.
BIT BIT
31 24 23 16 15 08 07 00

ADR0 ADR1 ADR2 ADR3

1-3
1
Introduction to the MVME187 Installation Guide
Control and Status Bit Definitions
The terms control bit and status bit are used extensively in this document to describe certain bits in registers.

Term Describes

Control bit

Status bit

The status bit can be read by software to determine
The bit can be set and cleared under software control
.
The bit reflects a specific condition
operational or exception conditions.
True/False Bit State Definitions
True and False indicate whether a bit enables or disables the function it controls:

Term Indicates

True

False

Enables the function it controls.
Disables the function it controls.

Bit V alue Descriptions

In all tables, the terms 0 and 1 are used to describe the actual value that should be written to the bit, or the value that it yields when read.
.
1-4

Related Documentation

The MVME187 ships with a start-up installation guide (MVME187IG/D, the document you are presently reading) which includes installation instructions, jumper configuration information, memory maps, debugger/monitor commands, and any other information needed for start-up of the board.
If you wish to develop your own applications or need more detailed information about your MVME187 Single Board Computer, you may purchase the additional documentation (listed on the following pages) through your local Motorola sales office.
If any supplements have been issued for a manual or guide, they will be furnished along with the particular document. Each Motorola Computer Group manual publication number is suffixed with characters which represent the revision level of the document, such as Ò/D2Ó (the second revision of a manual); a supplement bears the same number as a manual but has a suffix such as Ò/D2A1Ó (the first supplement to the second edition of the manual).
Related Documentation
1
Document Set for MVME187-0xx Board
You may order the manuals in this list individually or as a set. The manual set
68-M187SET
Motorola
Publication Number
MVME187/D MVME187 RISC Single Board Computer UserÕs Manual
88KBUG1/D 88KBUG2/D
MVME187BUG MVME187Bug Debugging Package UserÕs Manual
VMESBCA1/PG VMESBCA2/PG
Debugging Package for Motorola 88K RISC CPUs UserÕs Manual (Parts 1 and 2)
Single Board Computer ProgrammerÕs Reference Guide (Parts 1 and 2)
includes:

Description

1-5
1
Introduction to the MVME187 Installation Guide
Motorola
Publication Number
SBCSCSI/D Single Board Computers SCSI Software UserÕs Manual

Description

Additional Manuals for this Board

Also available but
Motorola
Publication Number
MVME187IG/D MVME187 RISC Single Board Computer Installation
Guide (this manual)
SIMVME187/D MVME187 RISC Single Board Computer Support
Information The SIMVME187 manual contains the connector
interconnect signal information, parts lists, and the schematics for the MVME187.
not
included in the set:

Description

Other Applicable Motorola Publications

The following publications are applicable to the MVME187 and may provide additional helpful information. They may be purchased through your local Motorola sales office.
Motorola
Publication Number
MVME712M MVME712M Transition Module and P2 Adapter
Board User's Manual
MVME712A MVME712-12, MVME712-13, MVME712A,
MVME712AM, and MVME712B Transition Modules and LCP2 Adapter Board User's Manual
1-6
Description
Related Documentation
1
Motorola
Publication Number
MC88100UM MC88100 RISC Microprocessor User's Manual
MC88200UM MC88200 Cache/Memory Management Unit
(CMMU) User's Manual
MC88204 MC88204 64K-Byte Cache/Memory Management
Unit (CMMU) data sheet A

Description

Non-Motorola Peripheral Controllers Publications Bundle
For your convenience, we have collected user's manuals for each of the peripheral controllers used on the MVME187 from the suppliers. This bundle, which can be ordered as part number
1X7DS

Part Number Description

NCR53C710DM NCR 53C710 SCSI I/O Processor Data Manual
NCR53C710PG NCR 53C710 SCSI I/O Processor ProgrammerÕs Guide
, includes the following manuals:
68-
CL-CD2400/2401 Cirrus Logic CD2401 Serial Controller UserÕs Manual
UM95SCC0100 Zilog Z85230 Serial Communications Controller
UserÕs Manual
290218 Intel Networking Components Data Manual
290435 Intel i28F008 Flash Memory Data Sheet
290245 Intel i28F020 Flash Memory Data Sheet
292095 Intel i28F008SA Software Drivers Application Note
292099 Intel i28F008SA Automation and Algorithms
Application Note
1-7
1
Introduction to the MVME187 Installation Guide
Part Number Description
MK48T08/18B SGS-THOMSON MK48T08 Time Clock/NVRAM
Data Sheet
MC68230/D MC68230 Parallel Interface Timer (PI/T) Data Sheet
SBCCOMPS/L Customer Letter for Component Alternatives
1-8

Applicable Non-Motorola Publications

The following non-Motorola publications are also available from the sources indicated.

Document Title Source

Related Documentation
1
Versatile Backplane Bus: VMEbus,
ANSI/IEEE Std 1014-1987
(VMEbus SpeciÞcation) (This is also
Microprocessor System Bus for 1 to 4 Byte Data, IEC 821
ANSI Small Computer System Interface-2 (SCSI-2), Draft Document X3.131-198X, Revision 10c
CL-CD2400/2401 Four-Channel Multi­Protocol Communications Controller Data Sheet, order number 542400-003
82596CA Local Area Network Coprocessor Data Sheet, order number 290218; and 82596 User's Manual, order number 296853
NCR 53C710 SCSI I/O Processor Data Manual, order number NCR53C710DM
NCR 53C710 SCSI I/O Processor ProgrammerÕs Guide, order number
BUS)
NCR53C710PG
MK48T08(B) Timekeeper Zeropower RAMs Databook, order number DBSRAM71
TM
RAM data sheet in Static
TM
and 8Kx8
The Institute of Electrical and Electronics Engineers, Inc. 345 East 47th St. New York, NY 10017
Bureau Central de la Commission Electrotechnique Internationale 3, rue de VarembŽ Geneva, Switzerland
Global Engineering Documents 15 Inverness Way East Englewood, CO 80112-5704
Cirrus Logic, Inc. 3100 West Warren Ave. Fremont, CA 94538
Intel Corporation, Literature Sales P.O. Box 58130 Santa Clara, CA 95052-8130
NCR Corporation Microelectronics Products Division 1635 Aeroplaza Dr. Colorado Springs, CO 80916
SGS-THOMSON Microelectronics Group Marketing Headquarters 1000 East Bell Rd. Phoenix, AZ 85022-2699
1-9
1
Introduction to the MVME187 Installation Guide
1-10
2Board Level Hardware

This Chapter Covers

A general description of the MVME187 RISC Single Board
Computer
Features and specifications
A board-level hardware overview
A detailed hardware functional description, including front
panel switches and indicators
Memory maps

General Description

The MVME187 is a high functionality VMEbus RISC single board computer designed around the M88000 chip set. It features:
Description
2
Onboard memory expansion mezzanine module with
4, 8, 16, 32, 64 or 128MB of onboard DRAM
SCSI bus interface with DMA
Four serial ports with EIA-232-D interface
Centronics (parallel) printer port
Ethernet transceiver interface with DMA
187Bug debug monitor firmware
2-1
Board Level Hardware Description
2

Onboard Memory Mezzanine Module

The MVME187 onboard DRAM mezzanine boards are available in different sizes and with programmable parity protection or Error Checking and Correction (ECC) protection.
The main board and a single mezzanine board together take
one slot.
Motorola software supports mixed parity and ECC memory
boards on the same main board.
Mezzanine board sizes are 4, 8, 16, or 32 MB (parity), or 4, 8,
16, 32, 64, or 128 MB (ECC); Ð Two mezzanine boards may be stacked to provide 256MB
of onboard RAM (ECC) or 64 MB (parity). The stacked configuration requires two VMEbus slots.
The DRAM is four-way interleaved to efficiently support
cache burst cycles.
The parity mezzanines are only supported on 25 MHz main
boards.
A functional description of the Onboard DRAM starts on page 2-15.

SCSI Mass Storage Interface

The MVME187 provides for mass storage subsystems through the industry-standard SCSI bus. These subsystems may include
Hard and floppy disk drives
Streaming tape drives
Other mass storage devices.
A functional description of the SCSI Interface starts on page 2-22.
2-2
General Description

Serial Ports

The serial ports support standard baud rates of 110 to 38.4K baud.
Serial
Port
1 Minimum Asynchronous RXD, CTS, TXD, and RTS
2
and 3 Full Asynchronous RXD, CTS, DCD, TXD, RTS,
4 Full Both RXD, CTS, DCD, TXD, RTS,

Function

Synchronous/
Asynchronous

Signals Bit Rates

and DTR
and DTR
All four serial ports use EIA-232-D drivers and receivers located on the main board, and all the signal lines are routed to the I/O connector.
A functional description of the Serial Port Interface starts on page
2-18.

Parallel (Printer) Port

2
Synchronous up to 64 k bits per second
The 8-bit bidirectional parallel port may be used as a Centronics­compatible parallel printer port or as a general parallel I/O port.
A functional description of the Parallel Port Interface starts on page
2-20.

Ethernet T ransceiver Interface

The Ethernet transceiver interface is located on the MVME187, and the industry standard connector is located on the MVME712X transition module.
A functional description of the Ethernet Interface starts on page
2-21.
2-3
Board Level Hardware Description
2

187Bug Firmware

The MVME187Bug debug monitor firmware (187Bug) is provided in two of the four EPROM sockets on the MVME187.
It provides:
Over 50 debug commands
Up/down load commands
Disk bootstrap load commands
A full set of onboard diagnostics
A one-line assembler/disassembler
The 187Bug user interface accepts commands from the system console terminal.
187Bug can also operate in a System Mode, which includes choices from a service menu.

Features

2-4
M88000 Microprocessor (one MC88100 MPU and two
MC88200 or MC88204 CMMUs)
4/8/16/32/64MB of 32-bit DRAM with parity or
4/8/16/32/64/128/256MB of 32-bit DRAM with ECC protection
Four 44-pin PLCC ROM sockets (organized as two banks of
32 bits)
128KB Static RAM (with optional battery backup as a factory
build special request)
Status LEDs for FAIL, STAT, RUN, SCON, LAN, +12V (LAN
power),
8K by 8 static RAM and time of day clock with battery backup
SCSI, and VME.
Features
RESET and ABORT switches
Four 32-bit tick timers for periodic interrupts
Watchdog timer
Eight software interrupts
I/O
Ð SCSI Bus interface with DMA Ð Four serial ports with EIA-232-D buffers with DMA Ð Centronics printer port Ð Ethernet transceiver interface with DMA
VMEbus interface
Ð VMEbus system controller functions Ð VMEbus interface to local bus (A24/A32, D8/D16/D32
and D8/D16/D32/D64BLT) (BLT = Block Transfer)
Ð Local bus to VMEbus interface (A16/A24/A32,
D8/D16/D32) Ð VMEbus interrupter Ð VMEbus interrupt handler Ð Global CSR for interprocessor communications Ð DMA for fast local memory - VMEbus transfers
(A16/A24/A32, D16/D32 and D16/D32/D64BLT)
2
2-5
Board Level Hardware Description
2
Specifications
Table 2-1. MVME187 General Specifications

Characteristics SpeciÞcations

Power requirements (with all four EPROM sockets populated and excluding external LAN transceiver)
Operating temperature 0û to 55û C at point of entry of forced air
Storage temperature -40û to +85û C
Relative humidity 5% to 90% (non-condensing)
Physical dimensions
Double-high VMEboard
PC board with mezzanine module only
PC board with connectors and front panel
+5 Vdc (+/-5%) 3.5 A (typical), 4.5 A (maximum)
(at 25 MHz, with 32MB parity DRAM)
5.0 A (typical), 6.5 A (maximum) (at 33 MHz, with 128MB ECC DRAM)
+12 Vdc (+/-5%) 100 mA (maximum)
(1.0 A (maximum) with offboard LAN
transceiver)
-12 Vdc (+/- 5%) 100 mA (maximum)
(approximately 490 LFM)
Height 9.187 inches (233.35 mm)
Depth 6.299 inches (160.00 mm)
Thickness 0.662 inches (16.77 mm)
Height 10.309 inches (261.85 mm)
Depth 7.4 inches (188 mm)
Thickness 0.80 inches (20.32 mm)

Conformance to Requirements

These boards are designed to conform to the requirements of the following specifications:
VMEbus Specification (IEEE 1014-87)
EIA-232-D Serial Interface Specification, EIA
SCSI Specification
2-6
Loading...
+ 143 hidden pages