Motorola MRFIC1806 Datasheet
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
Order this document
by MRFIC1806/D
Designed primarily for use in DECT, Japan Personal Handy System (PHS),
and other wireless Personal Communication Systems (PCS) applications. The
MRFIC1806 includes a two stage driver amplifier and transmit waveform
shaping circuitry in a low–cost SOIC–16 package. The amplifier portion
employs depletion mode power GaAs MESFETs to produce +21 dBm output
with 0 dBm input. The ramping circuit controls the burst–mode transmit rise and
fall time and is adjustable through external components. This circuitry also
places the amplifier in standby during TDMA receive mode. The MRFIC1806 is
sized to drive the MRFIC1807 P A/Switch.
Together with the rest of the MRFIC1800 GaAs ICs, this family offers the
complete transmit and receive functions, less LO and filters, needed for a
typical 1.8 GHz cordless telephone.
• Usable 1500–2500 MHz
• 23 dB Typical Gain
• +21 dBm Typical 1.0 dB Compression
• Simple Off–Chip Matching for Maximum Flexibility
• 3.0 to 5.0 Volt Supply
• Low Cost Surface Mount Plastic Package
• Order MRFIC1806R2 for Tape and Reel.
R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel.
• Device Marking = M1806
1.8 GHz DRIVER AMPLIFIER
AND RAMP CIRCUIT
GaAs MONOLITHIC
INTEGRATED CIRCUIT
CASE 751B–05
(SO–16)
C1/VRAMP VDR
TX RAMP GND
REG V
PCNTRL V
1
2
LOGIC
3
DD
4
GND GND
5
GND GND
6
RF IN RF OUT
7
V
DD
8
XLATOR
VSSV
20K
RAMP
DD
GATE
BIAS
16
15
14
13
12
11
10
VD1
GND
9
SS
Figure 1. Pin Connections and Functional Block Diagram
REV 2
MOTOROLA
Motorola, Inc. 1997
MRFIC1806
1
ABSOLUTE MAXIMUM RATINGS
Rating
Supply Voltage
Supply Voltage
Supply Voltage
Bias Control Voltage
RF Input Power
Ramp Circuit Input Voltage (High)
Storage Temperature Range
Ambient Operating Temperature
Thermal Resistance, Junction to Case
(TA = 25°C unless otherwise noted)
RECOMMENDED OPERATING RANGES
Parameter
RF Input Frequency
Supply Voltage
Supply Voltage
Supply Voltage
Bias Control Voltage
RF Input Power
Transmit Burst Enable V oltage (High)
Transmit Burst Enable V oltage (Low)
Symbol
V
DD
V
SS
REG V
DD
PCNTRL
P
IN
TX RAMP
T
stg
T
A
θ
JC
Symbol
f
RF
V
DD
V
SS
REG V
DD
PCNTRL
P
IN
TX RAMP
TX RAMP
Limit
6.0
–4.0
4.5
3.0
10
6.0
–65 to +150
–10 to +70
100
Value
1.5–2.5
3.0 to 5.0
–2.75 to –2.25
2.9 to 3.1
0.5 to 1.5
–20 to +5
2.8 to 3.5
–0.2 to +0.2
Unit
Vdc
Vdc
Vdc
Vdc
dBm
Vdc
°C
°C
°C/W
Unit
GHz
Vdc
Vdc
Vdc
Vdc
dBm
Vdc
Vdc
MRFIC1806
2
MOTOROLA
ELECTRICAL CHARACTERISTICS
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
Á
DECT Application with Internal Logic Translator (See Figure 2. VDD = 3.5 V, REG VDD = 3.0 V, TA = 25°C, VSS = –2.5 V,
TX RAMP = 3.0 V, PCNTRL set for Quiescent IDD = 120 mA, PIN = –3.0 dBm @ 1.9 GHz unless otherwise stated.)
ББББББББББББББББББББББББББББББББ
БББББББББББББББББ
Small Signal Gain (PIN = –7.0 dBm)
БББББББББББББББББ
Input Return Loss
БББББББББББББББББ
Reverse Isolation
БББББББББББББББББ
Output Power
БББББББББББББББББ
Harmonic Output
БББББББББББББББББ
Output Third Order Intercept
БББББББББББББББББ
Supply Current, ISS (Pin 9)
БББББББББББББББББ
Supply Current, IDD (Pin 7)
БББББББББББББББББ
Supply Current, REG IDD (Pin 3)
БББББББББББББББББ
Ramp Circuit Dynamic Range
БББББББББББББББББ
ББББББББББББББББББББББББББББББББ
STANDBY MODE (TX RAMP = 0 V)
Characteristic
Characteristic
Output Power
Supply Current, ISS (Pin 9)
Supply Current, REG IDD (Pin 3)
Min
ÁÁÁ
ÁÁÁ21ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ18ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ—ÁÁÁ
ÁÁÁ40ÁÁÁ
Min
—
—
—
Typ
ÁÁÁ
23
12
36
19.5
–36
33
0.35
115
0.6
44
Typ
–25
0.4
0.25
Max
ÁÁÁ
—
ÁÁÁ
—
ÁÁÁ
—
ÁÁÁ
—
ÁÁÁ
—
ÁÁÁ
—
ÁÁÁ
0.6
ÁÁÁ
135
ÁÁÁ
0.9
ÁÁÁ
—
ÁÁÁ
Max
—
0.6
0.4
Unit
ÁÁÁ
dB
ÁÁÁ
dB
ÁÁÁ
dB
ÁÁÁ
dBm
ÁÁÁ
dBc
ÁÁÁ
dBm
ÁÁÁ
mA
ÁÁÁ
mA
ÁÁÁ
mA
ÁÁÁ
dB
ÁÁÁ
Unit
dBm
mA
mA
RF IN
50 OHM
3 V (ON)
TX RAMP
0 V (OFF)
C9
1.5 pF
C1
330 pFC2330 pF
R1
22K
REG V
DD
3.0 V
T2 (FR4)
Zo = 100
1
20K
2
LOGIC
3
XLATOR
VSSV
RAMP
DD
4
5
16
15
14
13
12
R2
2.2
330 pF
C4
22 pF T1 (FR4)
Zo = 100
L = 20 mm
L = 8.5 mm
C7
4700 pF
V
DD
3.5 V
6
7
GATE
8
BIAS
11
10
C6
1.5 pF
22 pF
V
9
SS
–2.5 V
PCNTRL
1.4 V TYP
Figure 2. Applications Circuit Details for DECT using Internal Logic Translator
C3
C5
RF OUT
50 OHM
MOTOROLA
MRFIC1806
3
ELECTRICAL CHARACTERISTICS
Á
General Application without Internal Logic Translator (See Figure 3. VDD = 3.5 V, REG VDD (Pin 2) open, VSS = –2.5 V,
TX RAMP (Pin 2) grounded, V
ББББББББББББББББББББББББББББББББ
stated.)
Small Signal Gain (PIN = –7.0 dBm)
Output Power (PIN = 0 dBm)
Output Power (PIN = +4.0 dBm)
Supply Current, ISS (Pin 9)
Supply Current, IDD (Pin 7)
= 3.0 V , PCNTRL set for Quiescent IDD = 120 mA, PIN = 0 dBm @ 1.9 GHz, TA = 25°C unless otherwise
RAMP
Characteristic
Min
21
20
—
—
—
Typ
23
22
23
0.3
130
Max
—
—
—
0.5
145
Unit
dB
dBm
dBm
mA
mA
STANDBY MODE (V
Output Power
Supply Current, ISS (Pin 9)
V RAMP
RF IN
50 OHM
C9
1.5 pF
= –2.4 V)
RAMP
Characteristic
T2 (FR4)
Zo = 100
L = 8.5 mm
4700 pF
V
C7
R1
1K
N/C
DD
PCNTRL
1.4 V TYP
Min
—
—
1
20K
2
LOGIC
3
XLATOR
VSSV
RAMP
DD
4
16
15
14
13
Typ
–25
0.4
C4
22 pF T1 (FR4)
R2
2.2
Max
—
0.6
C3
330 pF
Zo = 100
Unit
dBm
mA
L = 20 mm
5
6
7
GATE
8
BIAS
12
11
10
RF OUT
C6
C5
1.5 pF
22 pF
V
9
SS
–2.5 V
50 OHM
Freq (GHz)
1.5
1.6
1.7
1.8
1.9
БББББ
БББББ
2.0
2.1
2.2
2.3
2.4
2.5
MRFIC1806
4
Figure 3. 1.9 GHz General Application Circuit Details (Internal Translator Disabled)
T able 1. Small Signal S–Parameters
(VDD = 3.5 V, IDQ = 120 mA, TA = 25°C, no matching circuit, reference plane at pins 6 and 11.)
Mag
0.734
0.654
0.620
0.636
0.607
0.592
ÁÁ
0.581
ÁÁ
0.571
0.560
0.541
0.521
S
11
Angle
–76.8
–82.4
–72.6
–79.8
–80.6
–79.4
ÁÁ
–79.4
ÁÁ
–78.9
–79.1
–79.8
–80.1
ÁÁÁ
ÁÁÁ
Mag
13.11
13.01
11.17
12.25
10.77
10.88
9.64
9.30
7.95
7.80
6.90
S
21
Angle
–87.9
–109.4
–117.4
–137.0
–151.3
–165.1
ÁÁ
–174.9
ÁÁ
174.1
166.9
155.7
147.2
Mag
0.009
0.012
0.011
0.014
0.017
0.019
ÁÁÁ
0.024
ÁÁÁ
0.026
0.029
0.033
0.042
S
12
Angle
–176
178
152
170
169
163
ÁÁ
163
ÁÁ
158
157
153
154
Mag
0.278
0.326
0.344
0.423
0.421
0.427
ÁÁÁ
0.432
ÁÁÁ
0.429
0.432
0.442
0.445
S
22
–116.4
–109.8
–134.1
–147.7
–161.8
ÁÁ
–172.3
ÁÁ
MOTOROLA
Angle
–98.9
178.8
171.1
164.6
161.7
Loading...