Motorola MMDF2P02ER2 Datasheet

1
Motorola TMOS Power MOSFET Transistor Device Data
  
Medium Power Surface Mount Products
     
DS(on)
and true logic level performance. They are capable of withstanding high energy in the avalanche and commutation modes and the drain–to–source diode has a low reverse recovery time. MiniMOS devices are designed for use in low voltage, high speed switching applications where power efficiency is important. Typical applications are dc–dc converters, a nd power m anagement in portable a nd battery powered products such as computers, printers, cellular and cordless phones. They can also be used for low voltage motor controls in mass storage products such as disk drives and tape drives. The a valanche energy i s specified to e liminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients.
Ultra Low R
DS(on)
Provides Higher Efficiency and Extends Battery Life
Logic Level Gate Drive — Can Be Driven by Logic ICs
Miniature SO–8 Surface Mount Package — Saves Board Space
Diode Is Characterized for Use In Bridge Circuits
Diode Exhibits High Speed, with Soft Recovery
I
DSS
Specified at Elevated Temperatures
Avalanche Energy Specified
Mounting Information for SO–8 Package Provided
MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted)
(1)
Rating
Symbol Value Unit
Drain–to–Source Voltage V
DSS
25 Vdc
Gate–to–Source Voltage — Continuous V
GS
± 20 Vdc
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 100°C Drain Current — Single Pulse (tp 10 µs)
I
D
I
D
I
DM
2.5
1.7 13
Adc
Apk
Total Power Dissipation @ TA = 25°C
(2)
Derate above 25°C
P
D
2.0 16
W
mW/°C
Operating and Storage Temperature Range TJ, T
stg
–55 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 10 Vdc, Peak IL = 7.0 Apk, L = 10 mH, RG = 25)
E
AS
245
mJ
Thermal Resistance, Junction to Ambient
(2)
R
θJA
62.5 °C/W
Maximum Lead Temperature for Soldering Purposes, 0.0625″ from case for 10 seconds T
L
260 °C
DEVICE MARKING
F2P02
(1) Negative sign for P–Channel device omitted for clarity. (2) Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided) with one die operating, 10 sec. max.
ORDERING INFORMATION
Device Reel Size Tape Width Quantity
MMDF2P02ER2 13 12 mm embossed tape 2500
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s, E–FET and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trademark of the Bergquist Company.
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SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMDF2P02E/D
Motorola, Inc. 1996
D
S
G
DUAL TMOS MOSFET
2.5 AMPERES 25 VOLTS
R
DS(on)
= 0.250 OHM
CASE 751–05, Style 11
SO–8
Source–1
1 2 3 4
8 7 6 5
Top View
Gate–1
Source–2
Gate–2
Drain–1 Drain–1 Drain–2 Drain–2
REV 5
MMDF2P02E
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
(1)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc) Temperature Coefficient (Positive)
V
(BR)DSS
25 —
2.2
— —
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 20 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 125°C)
I
DSS
— —
— —
1.0 10
µAdc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
GSS
100 nAdc
ON CHARACTERISTICS
(2)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc) Temperature Coefficient (Negative)
V
GS(th)
1.0 –
2.0
3.8
3.0 –
Vdc
Static Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 2.0 Adc) (VGS = 4.5 Vdc, ID = 1.0 Adc)
R
DS(on)
— —
0.19
0.3
0.25
0.4
Ohm
Forward Transconductance (VDS = 3.0 Vdc, ID = 1.0 Adc) g
FS
1.0 2.8 Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
340 475 pF
Output Capacitance
(VDS = 16 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
C
oss
220 300
Transfer Capacitance
f = 1.0 MHz)
C
rss
75 150
SWITCHING CHARACTERISTICS
(3)
Turn–On Delay Time
t
d(on)
20 40
Rise Time
t
r
40 80
Turn–Off Delay Time
VGS = 5.0 Vdc,
RG = 6.0 )
t
d(off)
53 106
Fall Time
G
= 6.0 )
t
f
41 82
Turn–On Delay Time
t
d(on)
13 26
Rise Time
t
r
29 58
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 6.0 )
t
d(off)
30 60
Fall Time
G
= 6.0 )
t
f
28 56
Gate Charge
Q
T
10 15 nC
DS
= 16 Vdc, ID = 2.0 Adc,
Q
1
1.0
(VDS = 16 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc)
Q
2
3.5
Q
3
3.0
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(2)
(IS = 2.0 Adc, VGS = 0 Vdc) V
SD
1.5 2.0 Vdc
t
rr
32 64
See Figure 11
S
= 2.0 Adc, VGS = 0 Vdc,
t
a
19
(IS = 2.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
t
b
12
Reverse Recovery Storage Charge Q
RR
0.035 µC
(1) Negative sign for P–Channel device omitted for clarity. (2) Pulse Test: Pulse Width 300 µs, Duty Cycle 2%. (3) Switching characteristics are independent of operating junction temperature.
Reverse Recovery Time
(VDD = 10 Vdc, ID = 2.0 Adc,
(VDD = 10 Vdc, ID = 2.0 Adc,
(V
(I
ns
ns
MMDF2P02E
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
3.5 V
10 V
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (NORMALIZED)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
0
0 0.4 0.8 1.2 1.6 2
0
2
3
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
I
D
, DRAIN CURRENT (AMPS)
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
3 4 5 10
0.3
0.4
0.6
0.1
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)
1
TJ, JUNCTION TEMPERATURE (
°
C) VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
0.2
6 8
–50 0 50 100 150
4
1
0
3.3 V
TJ = 25°C
VGS = 10
2
3
4
1
2.5 3 3.5 4 4.5
0.1
0.4
0.5
0.6
0.3
0.2
0 0.5 1 1.5 2
0
I
DSS
, LEAKAGE (nA)
100
10
0 4 8 12 20
0.5
1.0
1.5
2.0 VGS = 10 V
ID = 2 A
1257525–25
VDS ≥ 10 V
25°C
100°C
TJ = –55°C
VGS = 4.5
TJ = 25°C
9
7
0.5
ID = 1 A TJ = 25
°
C
16
3.7 V
3.9 V
4.1 V
4.3 V
4.5 V
5 V
4.7 V
7 V
VGS = 0 V
TJ = 125°C
100°C
Figure 1. On–Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On–Resistance versus
Gate–to–Source Voltage
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
Figure 5. On–Resistance Variation with
Temperature
Figure 6. Drain–to–Source Leakage Current
versus Voltage
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