Motorola MMDF2N05ZR2 Datasheet
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMDF2N05ZR2/D
Medium Power Surface Mount Products
!
EZFETs are an advanced series of power MOSFETs which
utilize Motorola’s High Cell Density TMOS process and contain
monolithic back–to–back zener diodes. These zener diodes
provide protection against ESD and unexpected transients. These
miniature surface mount MOSFETs feature ultra low R
true logic level performance. They are capable of withstanding high
energy in the avalanche and commutation modes and the
drain–to–source diode has a very low reverse recovery time.
EZFET devices are designed for use in low voltage, high speed
switching applications where power efficiency is important. Typical
applications are dc–dc converters, and power management in
portable and battery powered products such as computers,
printers, cellular and cordless phones. They can also be used for
low voltage motor controls in mass storage products such as disk
drives and tape drives.
• Ultra Low R
Provides Higher Efficiency and Extends Battery Life
DS(on)
• Logic Level Gate Drive — Can Be Driven by Logic ICs
• Miniature SO–8 Surface Mount Package — Saves Board Space
• Diode Is Characterized for Use In Bridge Circuits
• Diode Exhibits High Speed, With Soft Recovery
• I
Specified at Elevated Temperature
DSS
• Mounting Information for SO–8 Package Provided
DS(on)
and
Motorola Preferred Device
DUAL TMOS
POWER MOSFET
2.0 AMPERES
50 VOLTS
R
D
G
S
CASE 751–05, Style 11
Source–1
Gate–1
Source–2
Gate–2
DS(on)
= 0.300 OHM
SO–8
1
8
Drain–1
2
7
Drain–1
3
6
Drain–2
4
5
Drain–2
Top View
MAXIMUM RATINGS
Drain–to–Source Voltage V
Drain–to–Gate Voltage (RGS = 1.0 MΩ) V
Gate–to–Source Voltage — Continuous V
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 70°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ TA = 25°C (1) P
Operating and Storage Temperature Range TJ, T
Thermal Resistance — Junction to Ambient R
Maximum Temperature for Soldering Purposes T
(TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
DSS
DGR
GS
I
D
I
D
I
DM
D
θJA
L
stg
50 Vdc
50 Vdc
± 15 Vdc
2.0
1.7
8.0
2.0 Watts
– 55 to 150 °C
62.5 °C/W
260 °C
Adc
Apk
DEVICE MARKING
D2N05Z
ORDERING INFORMATION
Device Reel Size Tape Width Quantity
MMDF2N05ZR2 13″ 12 mm embossed tape 2500 units
(1) When mounted on G10/FR–4 glass epoxy board using minimum recommended footprint.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
Designer’s, HDTMOS and EZFET are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trademark of the Bergquist Company.
REV 1
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
1
MMDF2N05ZR2
)
f = 1.0 MHz)
V
G
)
(
DS
,
D
,
)
dIS/dt = 100 A/µs)
ELECTRICAL CHARACTERISTICS
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage (Cpk ≥ 2.0) (3)
(VGS = 0 Vdc, ID = 0.25 mAdc)
T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 15 Vdc, VGS = 0 Vdc)
(VDS = 15 Vdc, VGS = 0 Vdc, TJ = 55°C)
Gate–Body Leakage Current (VGS = ± 15 Vdc, VDS = 0) I
ON CHARACTERISTICS
Gate Threshold Voltage (Cpk ≥ 2.0) (3)
(VDS = VGS, ID = 0.25 mAdc)
Threshold Temperature Coefficient (Negative)
Static Drain–to–Source On–Resistance (Cpk ≥ 2.0) (3)
(VGS = 10 Vdc, ID = 1.5 Adc)
(VGS = 5.0 Vdc, ID = 0.6 Adc)
Forward Transconductance
(VDS = 15 Vdc, ID = 2.5 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(see figure 8)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
Reverse Recovery Time
Reverse Recovery Storage Charge Q
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(1)
(TA = 25°C unless otherwise noted)
(VDS = 15 Vdc, VGS = 0 Vdc,
(2)
(VDD = 30 Vdc, ID = 0.6 Adc,
(VDS = 25 Vdc, ID = 1.3 Adc,
f = 1.0 MHz
= 10 Vdc,
GS
RG = 25 Ω)
VGS = 10 Vdc)
(IS = 2.0 Adc, VGS = 0 Vdc)
(IS = 2.0 Adc, VGS = 0 Vdc,
dI
/dt = 100 A/µs
V
(BR)DSS
I
DSS
GSS
V
GS(th)
R
DS(on)
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
V
SD
t
rr
t
a
t
b
RR
50
—
—
—
— 0.14 0.5
2.0
—
—
—
— 2.0 —
— 104 — pF
— 58 —
— 16 —
— 24 48 ns
— 46 92
— 130 260
— 71 142
T
1
2
3
— 3.3 4.6 nC
— 0.7 —
— 1.3 —
— 1.4 —
— 0.82 1.4
— 66 —
— 23 —
— 43 —
— 0.08 — µC
56
55
—
—
3.0
–5.0
200
350
—
—
2.0
25
4.0
—
300
500
Vdc
mV/°C
µAdc
Vdc
mV/°C
mΩ
mMhos
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MMDF2N05ZR2
4
3.5
3
2.5
2
1.5
, DRAIN CURRENT (AMPS)
D
1
I
0.5
0
0 0.4 0.8 1.2 1.6 2
VGS = 10 V
TJ = 25°C
0.2 0.6
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
6.5 V7 V
6.0 V
Figure 1. On–Region Characteristics
1.2
1.0
0.8
0.6
ID = 1.5 A
TJ = 25
5.5 V
5.0 V
4.3 V
3.9 V
1.81.41
°
C
4
3.5
3
2.5
2
1.5
, DRAIN CURRENT (AMPS)
D
1
I
0.5
0
0.65
0.45
VDS ≥ 10 V
TJ = 25
°
C
100°C
TJ = –55°C
4.5 5.5 6 6.5
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
TJ = 25°C
VGS = 5.0 V
25°C
52.5 3 3.5 4
0.4
0.2
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0
DS(on)
5
R
5.5 6 6.5 87 7.5 9 10
VGS, GATE–T O–SOURCE VOLT AGE (VOLTS)
8.5 9.5 3.5 4
Figure 3. On–Resistance versus
Gate–to–Source V oltage
2.0
VGS = 10 V
ID = 1 A
1.5
1.0
0.5
, DRAIN–TO–SOURCE RESIST ANCE (NORMALIZED)
0
–50 0 50 100 150
DS(on)
R
TJ, JUNCTION TEMPERATURE (°C)
0.25
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.05
DS(on)
0 0.5 1 2.5 3
ID, DRAIN CURRENT (AMPS)
10 V
1.5 2
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
100
VGS = 0 V
10
1
, LEAKAGE (nA) R
DSS
I
0.1
0.01
1257525–25
0 5 10 15 30
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
TJ = 125°C
100°C
25°C
20 25
35 40 45 50
Figure 5. On–Resistance Variation
with Temperature
Motorola TMOS Power MOSFET Transistor Device Data
Figure 6. Drain–to–Source Leakage Current
versus V oltage
3
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