Datasheet MMBT5087LT3, MMBT5087LT1 Datasheet (MOTOROLA)

1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
  
PNP Silicon
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector–Emitter Voltage V
CEO
Collector–Base Voltage V
CBO
Emitter–Base Voltage V
EBO
–3.0 Vdc
Collector Current — Continuous I
C
–50 mAdc
DEVICE MARKING
MMBT5087LT1 = 2Q
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR-5 Board
(1)
TA = 25°C Derate above 25°C
P
D
225
1.8
mW
mW/°C
Thermal Resistance, Junction to Ambient R
θJA
556 °C/W
Total Device Dissipation
Alumina Substrate,
(2)
TA = 25°C
Derate above 25°C
P
D
300
2.4
mW
mW/°C
Thermal Resistance, Junction to Ambient R
θJA
417 °C/W
Junction and Storage Temperature TJ, T
stg
–55 to +150 °C
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise noted)
Characteristic
Symbol Min Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage
(IC = –1.0 mAdc, IB = 0)
V
(BR)CEO
–50 Vdc
Collector–Base Breakdown Voltage
(IC = –100 µAdc, IE = 0)
V
(BR)CBO
–50 Vdc
Collector Cutoff Current
(VCB = –10 Vdc, IE = 0) (VCB = –35 Vdc, IE = 0)
I
CBO
— —
–10 –50
nAdc
1. FR–5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MMBT5087LT1/D

SEMICONDUCTOR TECHNICAL DATA

Motorola Preferred Device
1
2
3
CASE 318–08, STYLE 6
SOT–23 (TO–236AB)
Motorola, Inc. 1996
COLLECTOR
3
1
BASE
2
EMITTER
MMBT5087LT1
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted) (Continued)
Characteristic
Symbol Min Max Unit
ON CHARACTERISTICS
DC Current Gain
(IC = –100 µAdc, VCE = –5.0 Vdc) (IC = –1.0 mAdc, VCE = –5.0 Vdc) (IC = –10 mAdc, VCE = –5.0 Vdc)
h
FE
250 250 250
800
— —
Collector–Emitter Saturation Voltage
(IC = –10 mAdc, IB = –1.0 mAdc)
V
CE(sat)
–0.3 Vdc
Base–Emitter Saturation Voltage
(IC = –10 mAdc, IB = –1.0 mAdc)
V
BE(sat)
0.85 Vdc
SMALL–SIGNAL CHARACTERISTICS
Current–Gain — Bandwidth Product
(IC = –500 µAdc, VCE = –5.0 Vdc, f = 20 MHz)
f
T
40 MHz
Output Capacitance
(VCB = –5.0 Vdc, IE = 0, f = 1.0 MHz)
C
obo
4.0 pF
Small–Signal Current Gain
(IC = –1.0 mAdc, VCE = –5.0 Vdc, f = 1.0 kHz)
h
fe
250 900
Noise Figure
(IC = –20 mAdc, VCE = –5.0 Vdc, RS = 10 k, f = 1.0 kHz) (IC = –100 µAdc, VCE = –5.0 Vdc, RS = 3.0 k, f = 1.0 kHz)
NF
— —
2.0
2.0
dB
MMBT5087LT1
3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
TYPICAL NOISE CHARACTERISTICS
(VCE = –ā5.0 Vdc, TA = 25°C)
Figure 1. Noise Voltage
f, FREQUENCY (Hz)
5.0
7.0
10
3.0
Figure 2. Noise Current
f, FREQUENCY (Hz)
1.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k
1.0
7.0
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.1
BANDWIDTH = 1.0 Hz
RS
0
IC = 10 µA
100 µA
e
n
, NOISE VOLTAGE (nV)
I
n
, NOISE CURRENT (pA)
30 µA
BANDWIDTH = 1.0 Hz
RS
≈ ∞
IC = 1.0 mA
300 µA
100 µA
30 µA
10 µA
10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k
2.0
1.0 mA
0.2
300 µA
NOISE FIGURE CONTOURS
(VCE = –ā5.0 Vdc, TA = 25°C)
500 k
100
200
500
1.0 k
10 k
5.0 k
20 k
50 k
100 k
200 k
2.0 k
1.0 M
500 k
100
200
500
1.0 k
10 k
5.0 k
20 k
50 k
100 k
200 k
2.0 k
1.0 M
Figure 3. Narrow Band, 100 Hz
IC, COLLECTOR CURRENT (µA)
Figure 4. Narrow Band, 1.0 kHz
IC, COLLECTOR CURRENT (µA)
10
0.5 dB
BANDWIDTH = 1.0 Hz
R
S
, SOURCE RESISTANCE (OHMS)
R
S
, SOURCE RESISTANCE (OHMS)
Figure 5. Wideband
IC, COLLECTOR CURRENT (µA)
10
10 Hz to 15.7 kHz
R
S
, SOURCE RESISTANCE (OHMS)
Noise Figure is Defined as:
NF+20 log
10
ƪ
e
n
2
)
4KTRS)
I
n
2
R
S
2
4KTR
S
ƫ
1ń2
= Noise Voltage of the T ransistor referred to the input. (Figure 3) = Noise Current of the Transistor referred to the input. (Figure 4) = Boltzman’s Constant (1.38 x 10
–23
j/°K) = Temperature of the Source Resistance (°K) = Source Resistance (Ohms)
e
n
I
n
K T R
S
1.0 dB
2.0 dB
3.0 dB
20 30 50 70 100 200 300 500 700 1.0 k 10 20 30 50 70 100 200 300 500 700 1.0 k
500 k
100
200
500
1.0 k
10 k
5.0 k
20 k
50 k
100 k
200 k
2.0 k
1.0 M
20 30 50 70 100 200 300 500 700 1.0 k
BANDWIDTH = 1.0 Hz
5.0 dB
0.5 dB
1.0 dB
2.0 dB
3.0 dB
5.0 dB
0.5 dB
1.0 dB
2.0 dB
3.0 dB
5.0 dB
MMBT5087LT1
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
TYPICAL STATIC CHARACTERISTICS
Figure 6. Collector Saturation Region
IC, COLLECTOR CURRENT (mA)
1.4
Figure 7. Collector Characteristics
IC, COLLECTOR CURRENT (mA)
V, VOLTAGE (VOLTS)
1.0 2.0 5.0 10 20
50
1.6
100
TJ = 25°C
V
BE(sat)
@ IC/IB = 10
V
CE(sat)
@ IC/IB = 10
V
BE(on)
@ VCE = 1.0 V
*
q
VC
for V
CE(sat)
q
VB
for V
BE
0.1 0.2 0.5
Figure 8. “On” Voltages
IB, BASE CURRENT (mA)
0.4
0.6
0.8
1.0
0.2
0
V
CE
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
0.002
TA = 25°C
IC = 1.0 mA 10 mA 100 mA
Figure 9. Temperature Coefficients
50 mA
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
40
60
80
100
20
0
0
I
C
, COLLECTOR CURRENT (mA)
TA = 25°C
PULSE WIDTH = 300
µ
s
DUTY CYCLE
2.0%
IB = 400 µA
350 µA
300 µA
250 µA
200 µA
*APPLIES for IC/IB ≤ hFE/2
25°C to 125°C
–55°C to 25°C
25°C to 125°C
–55°C to 25°C
0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 5.0 10 15 20 25 30 35 40
1.2
1.0
0.8
0.6
0.4
0.2 0
2.4
0.8
0
1.6
0.8
1.0 2.0 5.0 10 20
50
100
0.1 0.2 0.5
V
, TEMPERATURE COEFFICIENTS (mV/ C)
°θ
150 µA
100 µA
50 µA
MMBT5087LT1
5
Motorola Small–Signal Transistors, FETs and Diodes Device Data
TYPICAL DYNAMIC CHARACTERISTICS
C, CAPACITANCE (pF)
Figure 10. Turn–On Time
IC, COLLECTOR CURRENT (mA)
500
Figure 11. Turn–Off Time
IC, COLLECTOR CURRENT (mA)
2.0 5.0 10
20 30 50
1000
Figure 12. Current–Gain — Bandwidth Product
IC, COLLECTOR CURRENT (mA)
Figure 13. Capacitance
VR, REVERSE VOLTAGE (VOLTS)
3.01.0
500
0.5
10
t, TIME (ns)
t, TIME (ns)
f , CURRENT–GAIN — BANDWIDTH PRODUCT (MHz)
T
5.0
7.0
10
20
30
50
70
100
300
7.0
70 100
VCC = 3.0 V IC/IB = 10 TJ = 25°C
td @ V
BE(off)
= 0.5 V
t
r
10
20
30
50
70
100
200
300
500
700
ā
2.0
–1.0
VCC = –ā3.0 V IC/IB = 10 IB1 = I
B2
TJ = 25
°
C
t
s
t
f
50
70
100
200
300
0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50
TJ = 25°C
VCE = 20 V
5.0 V
1.0
2.0
3.0
5.0
7.0
0.1 0.2 0.5 1.0 2.0 5.0 10 20 500.05
C
ib
C
ob
200
ā
3.0
ā
5.0 –ā7.0
ā
20
–10
ā30
ā
50 –ā70
–100
TJ = 25°C
Figure 14. Thermal Response
t, TIME (ms)
1.0
0.01
r(t) TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
0.01
0.02
0.03
0.05
0.07
0.1
0.2
0.3
0.5
0.7
0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k
50 k
100 k
D = 0.5
0.2
0.1
0.05
0.02
0.01 SINGLE PULSE
DUTY CYCLE, D = t1/t
2
D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 (SEE AN–569) Z
θ
JA(t)
= r(t)
R
θ
JA
T
J(pk)
– TA = P
(pk)
Z
θ
JA(t)
t
1
t
2
P
(pk)
FIGURE 16
MMBT5087LT1
6
Motorola Small–Signal Transistors, FETs and Diodes Device Data
TJ, JUNCTION TEMPERATURE (°C)
10
4
–4
0
I
C
, COLLECTOR CURRENT (nA)
Figure 15. Typical Collector Leakage Current
DESIGN NOTE: USE OF THERMAL RESPONSE DATA
A train of periodical power pulses can be represented by the model as shown in Figure 16. Using the model and the device thermal response the normalized effective transient thermal resistance of Figure 14 was calculated for various duty cycles.
To find Z
θJA(t)
, multiply the value obtained from Figure 14 by the
steady state value R
θJA
.
Example: Dissipating 2.0 watts peak under the following conditions:
t1 = 1.0 ms, t2 = 5.0 ms (D = 0.2) Using Figure 14 at a pulse width of 1.0 ms and D = 0.2, the reading of r(t) is 0.22.
The peak rise in junction temperature is therefore
T = r(t) x P
(pk)
x R
θJA
= 0.22 x 2.0 x 200 = 88°C.
For more information, see AN–569.
10
–2
10
–1
10
0
10
1
10
2
10
3
–200 +20 +40 +60 + 80 + 100 + 120 +140 +160
VCC = 30 V
I
CEO
I
CBO
AND
I
CEX
@ V
BE(off)
= 3.0 V
MMBT5087LT1
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct s ize to i nsure proper solder connection
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum p ad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T
J(max)
, the maximum rated junction temperature of the
die, R
θJA
, the thermal resistance from the device junction to ambient, and the o perating temperature, TA. Using t he values provided on the data sheet for the SOT–23 package, PD can be calculated as follows:
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts.
The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result i n device failure. Therefore, t he following items s hould always be observed in o rder to minimize the thermal s tress to w hich t he devices a re subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
PD =
T
PD =
150°C – 25°C
556°C/W
J(max)
R
θJA
– T
A
= 225 milliwatts
MMBT5087LT1
8
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
D
J
K
L
A
C
B
S
H
GV
3
1
2
CASE 318–08
ISSUE AE
SOT–23 (TO–236AB)
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
DIMAMIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B 0.0472 0.0551 1.20 1.40 C 0.0350 0.0440 0.89 1.11 D 0.0150 0.0200 0.37 0.50 G 0.0701 0.0807 1.78 2.04 H 0.0005 0.0040 0.013 0.100
J 0.0034 0.0070 0.085 0.177
K 0.0180 0.0236 0.45 0.60
L 0.0350 0.0401 0.89 1.02 S 0.0830 0.0984 2.10 2.50 V 0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
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MMBT5087LT1/D
*MMBT5087LT1/D*
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