Motorola MJW16212 Datasheet
3–1
Motorola Bipolar Power Transistor Device Data
NPN Bipolar Power Deflection Transistor
For High and Very High Resolution Monitors
The MJW16212 is a state–of–the–art SWITCHMODE bipolar power transistor. It
is specifically designed for use in horizontal deflection circuits for 20 mm diameter
neck, high and very high resolution, full page, monochrome monitors.
• 1500 Volt Collector–Emitter Breakdown Capability
• Typical Dynamic Desaturation Specified (New Turn–Off Characteristic)
• Application Specific State–of–the–Art Die Design
• Fast Switching:
200 ns Inductive Fall Time (Typ)
2000 ns Inductive Storage Time (Typ)
• Low Saturation Voltage:
0.15 Volts at 5.5 Amps Collector Current and 2.5 A Base Drive
• Low Collector–Emitter Leakage Current — 250 µA Max at 1500 Volts — V
CES
• High Emitter–Base Breakdown Capability For High Voltage Off Drive Circuits —
8.0 Volts (Min)
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector–Emitter Breakdown Voltage
V
CES
1500
Vdc
Collector–Emitter Sustaining Voltage
V
CEO(sus)
650
Vdc
Emitter–Base Voltage
V
EBO
8.0
Vdc
RMS Isolation Voltage (2)
(for 1 sec, TA = 25_C, Per Fig. 14
Rel. Humidity < 30%) Per Fig. 15
V
ISOL
—
—
V
Collector Current — Continuous
Collector Current — Pulsed (1)
I
C
I
CM
10
15
Adc
Base Current — Continuous
Base Current — Pulsed (1)
I
B
I
BM
5.0
10
Adc
Maximum Repetitive Emitter–Base
Avalanche Energy
W (BER)
0.2
mJ
Total Power Dissipation @ TC = 25_C
Total Power Dissipation @ TC = 100_C
Derated above TC = 25_C
P
D
150
39
1.49
Watts
W/_C
Operating and Storage Temperature Range
TJ, T
stg
–55 to 125
_
C
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance — Junction to Case
R
θJC
0.67
_
C/W
Lead Temperature for Soldering Purposes
1/8″ from the case for 5 seconds
T
L
275
_
C
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle v 10%.
(2) Proper strike and creepage distance must be provided.
Preferred devices are Motorola recommended choices for future use and best overall value.
SCANSWITCH and SWITCHMODE are trademarks of Motorola Inc.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJW16212/D
Motorola, Inc. 1995
POWER TRANSISTOR
10 AMPERES
1500 VOLTS – V
CES
50 AND 150 WATTS
*Motorola Preferred Device
CASE 340F–03
TO–247AE
REV 1
MJW16212
3–2
Motorola Bipolar Power Transistor Device Data
ELECTRICAL CHARACTERISTICS (T
C
= 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
ÎÎÎ
ÎÎÎ
ÎÎÎ
Unit
OFF CHARACTERISTICS (2)
Collector Cutoff Current (VCE = 1500 V, VBE = 0 V)
Collector Cutoff Current (VCE = 1200 V, VBE = 0 V)
I
CES
—
—
—
—
250
25
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
µAdc
Emitter–Base Leakage (VEB = 8.0 Vdc, IC = 0)
I
EBO
—
—
25
ÎÎÎ
ÎÎÎ
ÎÎÎ
µAdc
Emitter–Base Breakdown Voltage (IE = 1.0 mA, IC = 0)
V
(BR)EBO
8.0
11
—
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
Collector–Emitter Sustaining Voltage (Table 1) (IC = 10 mAdc, IB = 0)
V
CEO(sus)
650
—
—
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
ON CHARACTERISTICS (2)
Collector–Emitter Saturation Voltage (IC = 5.5 Adc, IB = 2.2 Adc)
Collector–Emitter Saturation Voltage (IC = 3.0 Adc, IB = 400 mAdc)
V
CE(sat)
—
—
0.15
0.14
1.0
1.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
Base–Emitter Saturation Voltage (IC = 5.5 Adc, IB = 2.2 Adc)
V
BE(sat)
—
0.9
1.5
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
DC Current Gain (IC = 1.0 A, VCE = 5.0 Vdc)
DC Current Gain (IC = 10 A, VCE = 5.0 Vdc)
h
FE
—
4.0
24
6.0
—
10
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
—
DYNAMIC CHARACTERISTICS
Dynamic Desaturation Interval (IC = 5.5 A, IB1 = 2.2 A, LB = 1.5 µH)
t
ds
—
350
—
ÎÎÎ
ÎÎÎ
ÎÎÎ
ns
Output Capacitance
(VCE = 10 Vdc, IE = 0, f
test
= 100 kHz)
C
ob
—
180
350
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
pF
Gain Bandwidth Product
(VCE = 10 Vdc, IC = 0.5 A, f
test
= 1.0 MHz)
f
T
—
2.75
—
ÎÎÎ
ÎÎÎ
ÎÎÎ
MHz
Emitter–Base Turn–Off Energy
(EB
(avalanche)
= 500 ns, RBE = 22 Ω)
EB
(off)
—
35
—
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
µJ
Collector–Heatsink Capacitance — MJF16212 Isolated Package
(Mounted on a 1″ x 2″ x 1/16″ Copper Heatsink, VCE = 0, f
test
= 100 kHz)
C
c–hs
—
5.0
—
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
pF
SWITCHING CHARACTERISTICS
Inductive Load (IC = 5.5 A, IB = 2.2 A), High Resolution Deflection
Simulator Circuit Table 2
Storage
Fall Time
t
sv
t
fi
—
—
2000
200
4000
350
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ns
(2) Pulse Test: Pulse Width = 300 µs, Duty Cycle v 2.0%.
I
C
, COLLECTOR CURRENT (A)
VCE, COLLECTOR–EMITTER VOLTAGE (V)
Figure 1. Maximum Forward Bias
Safe Operating Area
50
1
10
1
0.02
70
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN
I
C
, COLLECTOR–EMITTER CURRENT (A)
0.1
7 20 1K
20
0.2
DC
TJ = 25°C
5 ms
10 µs
2
5
0.5
50 300 1500
IC/IB = 5
TJ
≤
100°C
0
VCE, COLLECTOR–EMITTER VOLTAGE (V)
900
Figure 2. Maximum Reverse Bias
Safe Operating Area
10
18
6
2
600 1200
100
0.05
0.01
1003 10 20030
MJH16212
14
2 300 5005 700
100
ns
II
SAFE OPERATING AREA
MJW16212
3–3
Motorola Bipolar Power Transistor Device Data
SAFE OPERATING AREA (continued)
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 1 is based on TC = 25_C; T
J(pk)
is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the
voltages shown on Figure 1 may be found at any case temperature by using the appropriate curve on Figure 3.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limitations imposed by second breakdown.
Figure 3. Power Derating
25
TC, CASE TEMPERATURE (
°
C)
0
45 85 125
0.6
POWER DERATING FACTOR
SECOND BREAKDOWN
DERATING
1
0.8
0.4
0.2
65
THERMAL
DERATING
105
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc.
The safe level for these devices is specified as Reverse
Biased Safe Operating Area and represents the voltage–
current condition allowable during reverse biased turnoff.
This rating is verified under clamped conditions so that the
device is never subjected to an avalanche mode. Figure 2
gives the RBSOA characteristics.
H.P. 214
OR EQUIV.
P.G.
0
≈
–35 V
50
500
1
µ
F
100
–V
2N5337
2N6191
+V
≈
11 V
100
0.02
µ
F
20
10 µF
0.02
µ
F
+ –
R
B1
R
B2
A
A
50
T
1
+V
0 V
–V
*I
B
*I
C
T.U.T.
L
MR856
V
clamp
V
CC
I
C
V
CE
I
B
I
B1
I
B2
I
C(pk)
V
CE(pk)
T1[
L
coil(ICpk
)
V
CC
Note: Adjust –V to obtain desired V
BE(off)
at Point A.
T1 adjusted to obtain I
C(pk)
V
(BR)CEO
L = 10 mH
RB2 = ∞
VCC = 20 Volts
RBSOA
L = 200 µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired I
B1
*Tektronix
*P–6042 or
*Equivalent
+
–
Table 1. RBSOA/V
(BR)CEO(SUS)
Test Circuit
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