The Motorola products described in this manual may include copyrighted Motorola computer programs stored
in semiconductor memories or other media. Laws in the United States and other countries preserve for
Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or
reproduce in any form, the copyrighted computer program. Accordingly, any copyrighted Motorola computer
programs contained in the Motorola products described in this manual may not be copied or reproduced in
any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola products shall not be deemed to grant, either directly or by implication, estoppel or otherwise, any license under
the copyrights, patents or patent applications of Motorola, except for the normal non-exclusive royalty-free
license to use that arises by operation of law in the sale of a product.
www.myradio168.net
Page 3
Safety Information
SAFETY INFORMATION
Read this information before using your radio.
SAFE AND EFFICIENT OPERATION OF MOTOROLA TWO-WAY RADIOS
This document provides information and instructions for the safe and efficient oper ation of Motorola P ortable and
Mobile Two-Way Radios. The information provided in this document supersedes the general safety information
contained in user guides published prior to 1 January 1998.
For information regarding radio use in hazardous areas, please ref er to the F actory Mutual (FM) approv al manual
supplement.
EXPOSURE TO RADIO FREQUENCY ENERGY
Your Motorola Two-Way Radio, which generates and radiates radio frequency (RF) electromagnetic energy
(EME), is designed to comply with the following National and International Standards and Guidelines regarding
exposure of human beings to radio frequency electromagnetic energy:
●
Federal Communications Commission Report and Order No. FCC 96-326 (August 1996)
●
American National Standards Institute (C95.1 - 1992)
National Council on Radiation Protection and Measurements (NCRP-1986)
●
●
International Commission on Non-Ionizing Radiation Protection (ICNRP- 1986)
European Committee for Electrotechnical Standardization (CENELEC):
●
- ENV 50166-1 1995 EHuman exposure to electromagnetic fields Low
frequency (0 Hz to 10 kHz)
- ENV 50166-2 1995 EHuman exposure to electromagnetic fields High
frequency (10 kHz to 300 GHz)
- Proceedings of SC211/B 1996“Safety Considerations for Human Exposure to EMFs from
Mobile Telecommunication Equipment (MTE) in the Frequency Range 30MHz - 6 GHz.” (EMF - Electro-Magnetic
Fields)
To assure optimal radio performance and to ensure that your exposure to radio frequency electromagnetic
energy is within the guidelines in the above standards, always adhere to the following procedures:
MOBILE RADIO OPERATION AND EME EXPOSURE
●
Transmit only when people inside and outside the vehicle are at least the minimum distance away from a
properly installed, externally mounted antenna.
Table 1 below lists the minimum distance for several different ranges of rated radio power.
Table 1:
Rated Power of V ehicle-Installed
www.myradio168.net
Mobile T wo-Way Radio
7-15 Watts
Rated Power versus Distance
Minimum Distance From
Transmitting Antenna
1 Foot (30.5 Centimeters)
16-50 Watts2 Feet (61 Centimeters)
More Than 50 Watts3 Feet (91.5 Centimeters)
MOBILE ANTENNA INSTALLATION
A vehicle antenna must be installed external to the vehicle and in accordance with:
●
The requirements of the antenna manufacturer/supplier
Instructions in the Radio Installation Manual
●
i
Page 4
Safety Information
CONTROL STATION OPERATION
When radio equipment is used to operate as a control station, it is important that the antenna be installed outside
the building and away from places where people may be in close proximity.
NOTE
Refer to Table 1 for rated power and minimum distance values for transmitting antennas.
ELECTROMAGNETIC INTERFERENCE/COMPATIBILITY
NOTE
Nearly every electronic device is susceptible to electromagnetic interference (EMI) if inadequately shielded, designed, or alternately configured for electromagnetic compatibility.
To avoid electromagnetic interference and/or compatibility conflicts, turn off your radio in any facility where
●
posted notices instruct you to do so. Hospital or health facilities may be using equipment that is sensitive to
external RF energy.
When instructed to do so, turn off your radio when on board an aircraft. Any use of a radio must be in accor-
●
dance with airline regulations or crew instructions.
OPERATIONAL WARNINGS
Potentially explosive atmospheres
WARNING: Turn off your T w o-W a y radio when y ou are in an y area with a potentiall y e xplosive
atmosphere, unless it is a radio type especially qualified for use in such areas (e.g. FM or
!
Cenelec approved). Sparks in a potentially explosive atmosphere can cause an explosion or
fire resulting in bodily injury or even death.
Blasting caps and areas
WARNING: To avoid possible interf erence with b lasting operations, turn off your radio when
you are near electrical blasting caps. In a “
!
radio
”, obey all signs and instructions.
blasting area
” or in areas posted “
turn off two-way
NOTE
The areas with potentially explosive atmospheres referred to above include fuelling areas such as:
below decks on boats; fuel or chemical transfer or storage facilities; areas where the air contains
chemicals or particles, such as grain, dust or metal powders; and any other area where you would
normally be advised to turn off your vehicle engine. Areas with potentially explosive atmospheres
are often but not always posted.
OPERATIONAL CAUTIONS
Damaged antennas
CAUTION: Do not use any two-way radio that has a damaged antenna. If a damaged antenna
comes into contact with your skin, a minor burn can result.
!
www.myradio168.net
ii
Page 5
Cautions and Warnings
CAUTION
ELECTROSTATIC SENSITIVE DEVICES
PRECAUTIONS SHOULD BE TAKEN TO MINIMIZE THE RISK OF DAMAGE BY
ELECTROSTATIC DISCHARGE TO ELECTROSTATIC SENSITIVE DEVICES (ESDs).
ANY DEVICES EMPLOYING METAL OXIDE SILICON (MOS) TECHNOLOGY ARE
PARTICULARLY SUSCEPTIBLE.
CIRCUIT DIAGRAMS MARKED WITH THE ABOVE SYMBOL INDICATE ELECTRONIC
CIRCUITS (PECs) FOR WHICH ESD HANDLING PRECAUTIONS ARE NECESSARY.
THE USER SHOULD REFER TO BS5783, 1984: HANDLING OF ELECTROSTATIC
SENSITIVE DEVICES. THIS BRITISH STANDARD SUPERSEDES DEF STAN 59-98,
ISSUE 2.
www.myradio168.net
iii
Page 6
Cautions and Warnings
www.myradio168.net
iv
Page 7
Cautions and Warnings
WARNING
SAFETY W ARNINGS
THE ELECTRICAL POWER USED IN THIS EQUIPMENT IS AT A VOLTAGE HIGH
ENOUGH TO ENDANGER LIFE.
BEFORE CARRYING OUT MAINTENANCE OR REPAIR, PERSONS CONCERNED
MUST ENSURE THAT THIS EQUIPMENT IS ISOLATED FROM THE ELECTRICAL
SUPPLY AND TESTS ARE MADE TO ENSURE THAT ISOLATION IS COMPLETE.
WHEN THE SUPPLY CANNOT BE ISOLATED, MAINTENANCE AND REPAIR MUST BE
UNDERTAKEN BY PERSONS WHO ARE FULLY AWARE OF THE DANGERS INVOLVED
AND WHO HAVE TAKEN ADEQUATE PRECAUTIONS TO PROTECT THEMSELVES.
COMPONENTS CONTAINING BERYLLIUM OXIDE ARE USED IN THIS EQUIPMENT.
DUST FROM THIS MATERIAL IS A HEALTH HAZARD IF INHALED OR ALLOWED TO
COME INTO CONTACT WITH THE SKIN.
GREAT CARE MUST BE TAKEN WHEN HANDLING THESE COMPONENTS WHICH
MUST NOT BE BROKEN OR SUBJECTED TO EXCESSIVE HEATING. DEFECTIVE
COMPONENTS MUST BE DISPOSED OF IN ACCORDANCE WITH CURRENT
INSTRUCTIONS.
LEAD ACID BATTERIES MAY BE FITTED AS THE STANDBY BATTER Y. CARE MUST BE
TAKEN WHEN REMOVING OR INSTALLING THESE BATTERIES TO:
www.myradio168.net
1. ENSURE THAT THE TERMINALS ARE NOT SHORTED TOGETHER.
2. PREVENT SPILLAGE OF THE CORROSIVE ELECTROLYTE.
v
Page 8
Cautions and Warnings
www.myradio168.net
vi
Page 9
Contents
Service Manual
Contents
Chapter
1.0Introduction
Gives a brief introduction into the manual and the service policy.
2.0Model Chart and Accessories
Provides list of models and accessories available for the mobile radio.
3.0Maintenance
Describes how to disassemble/assemble the radio for maintenance pur poses
and gives details on safety precautions. The radio tuning procedure is also
provided in this chapter.
4.0Theory Of Operation
Gives a detailed description about the operation of the radio. The infor mation is
supplied to circuit reference detail.
5.0Schematic Diagrams and Parts Lists
Provides schematic diagrams, component location diagrams and associated
parts lists.
This chapter outlines the scope and use of the service manual and provides an overview of the
warranty and service support. The radio specifications are also supplied in this chapter.
2.0Scope of Manual
This manual is intended for use by experienced technicians familiar with similar types of equipment.
It contains service information required for the equipment described and is current as of the printing
date. Changes which occur after the printing date are incorporated by a complete Service Manual
revision to your Product Manual.
3.0How to Use This Manual
This manual contains introductory material such as overview, model charts, specifications and
accessories and the remaining chapters deal with specific service aspects of the radio.
Refer to the Table of Contents for a general overview of the manual.
Introduction
4.0Warranty and Service Support
Motorola offers long term support for its products. This support includes full exchange and/or repair
of the product during the warranty period, and service/ repair or spare parts support out of warranty.
Any "return-for-exchange" or "return-for-repair" by an authorised Motorola Dealer must be
accompanied by a Warranty Claim Form. Warranty Claim Forms are obtained by contacting an
Authorised Motorola Dealer.
4.1Warranty Period
The terms and conditions of warranty are defined fully in the Motorola Dealer or Distributor or
Reseller contract. These conditions may change from time to time and the following notes are for
guidance purposes only.
In instances where the product is covered under a "return for replacement" or "return for repair"
warranty, a check of the product should be performed prior to shipping the unit back to Motorola. To
ensure the product has been correctly programmed or has not been subjected to damage outside
the terms of the warranty.
www.myradio168.net
Prior to shipping any radios back to the appropriate Motorola warranty depot, please contact
Customer Services. All returns must be accompanied by a Warranty Claim Form, available from
your Customer Services representative. Products should be shipped back in the original packaging,
or correctly packaged to ensure no damage occurs in transit.
4.2After Warranty Period
After the Warranty period, Motorola continues to support its products in two ways.
Motorola's Accessories and Aftermarket Division (AAD) offers a repair service to both end
users and dealers at competitive prices.
AAD supplies individual parts and modules that can be purchased by dealers who are technically capable of performing fault analysis and repair.
Introduction1-1
Page 14
Warranty and Service Support
4.3Piece Parts
Some replacement parts, spare parts, and/or product information can be ordered directly. If a
complete Motorola part number is assigned to the part, it is available from Motorola’s Accessories
and Aftermarket Division (AAD). If no part number is assigned, the part is not normally available
from Motorola. If the part number is appended with an asterisk, the part is serviceable by Motorola
Depot only. If a parts list is not included, this generally means that no user-serviceable parts are
available for that kit or assembly.
All orders for parts/information should include the complete Motorola identification number. All part
orders should be directed to your local AAD office. Please refer to your latest price pages.
4.4Technical Support
Technical support is available to assist the dealer/distributor in resolving any malfunction which ma y
be encountered. Initial contact should be by telephone wherever possible. When contacting
Motorola Technical Support, be prepared to provide the product model number and the unit’s serial
number .
Toll-Free
CountryNumber
Australia1800-774457
China800-810-0976
Hong Kong25904800
Indonesia0800-1-686868
Korea080-300-7400
Malaysia1800-801687
New Zealand0800-442109
Philippines1800-16510271
Singapore1800-4855333
Taiwan0080-651661
Thailand (outside Bangkok)088-225412
Non-Toll-Free
www.myradio168.net
CountryNumber
India80-6658922
Thailand (Bangkok area)2548388
All Other CountriesIDD Code+(65)-4855333
1-2Introduction
Page 15
5.0Specifications
Specifications
5.1General
Frequency Range 336-390MHz
Channel Spacing25kHz
ModulationFM,
Type 8K5G3,14G3,16G3
Antenna Impedance50 Ohms
Mode of OperationTrunked/Conventional
Power Supply VDC 10.8 - 15.6
Operating Temperature - 25 to + 55°C
Storage Temperature- 40 to + 85°C
EnvironmentalIP 54, MILSTD 810E
Frequency Stability300MHz: 3 ppm
Dimensions168x160x44 (HxWxD)
Weight1030g
5.3Transmitter
Power Output
(no degradation) ...........
Maximum Deviation
25kHz± 5kHz
Audio Distortion
(@1kHz, 60% deviation)
Spurious and Harmonics- 36dBm
Switching Bandwidth
No degradation336-390MHz
5 - 25W
5%
5.2Receiver
25kHz
Sensitivity
12dB SINAD µV0.35µV
Audio Output Power
<5% distortion @1kHz
with rated audio output
This chapter lists the models and accessories available for the MCX600E mobile radio.
2.0Model Chart
Overview
MCX600E
336-390 MHz
Description
MCX600E 336-390 MHz 25 kHz 25W MPS
N
_
Model
AZM08PHN6DL5
XGBN6147Packaging Kit
XGLN7331Blank Control Head
XGLN7317MPT T runnion Kit
XPMMN4005Hand Held Control Head
www.myradio168.net
XPMUD1663MCX600E S/T 336-390MHz 25k MPS
XGKN6270Power Cable
X6804111J88MCX600E User Guide
X = Indicates one of each required
ItemDescription
Model Chart and Accessories2-1
Page 20
Accessories
3.0Accessories
3.1Mechanical Hardware Kits
GLN7317_Standard Trunnion kit
GLN7324_Low Profile Trunnion kit
GLN7331_Blank Control Head
3.2Speakers
All speaker connecting cables have 16-pin accessory connector plug.
GSN6059_13W External Speaker, square
3.3Cables
GKN6270_Battery power cable 3m, 10A fuse (Standard)
GKN6271_Ignition switch cable
3.4Other
GKN6272_Alarm, Relay and Cable Kit
GLN7323_External PTT
GLN7318_Base Tray
GPN6126_24/12V DC Converter, 6A
GPN6127_24/12V DC Converter, 15A
GPN6133_EMC approved mains Power Supply
HPN4002_Non-EMC approved mains Power Supply
HPN8393_Non-EMC approved mains Power Supply
This chapter explains, step by step, how to disassemble and assemble the radio, to transceiver
board level. The chapter also contains a list of test equipment required to service the radio and the
procedure for radio alignment/test setup is also available in this chapter.
Note: Control head type may differ from the diagram shown in this section, depending on the
models supported. However, the instructions pertaining to its removal and assembly are
the same across models.
2.0Disassemble the Radio
2.1Remove the Control Head
Overview
Recess
Figure 3-1 Control Head Removal.
Insert a small flat blade screw driver, or similar, in the recess between the control head and the
transceiver (to minimise cosmetic damage to the radio cover start from the bottom side).
Press until the side of the control head releases and then repeat the operation on the opposite
side of the radio.
Pull the control head away from the transceiver.
Remove the flex from the socket on the control head board.
www.myradio168.net
Maintenance3-1
Page 24
1.
2.
1.
2.
Disassemble the Radio
2.2Remove the Top Cover
Insert a small flat blade screw driver in the side recess of the radio chassis.
Lift the top cover over the chassis.
Recess
Figure 3-2 Top Cover Removal.
2.3Remove the Transceiver Board
Protruding T abs
Flex
Chassis
Clip
Recess
www.myradio168.net
Transceiver Board
Clip
Recess
Top Cover
Figure 3-3 Transceiver Board Removal.
Remove the power and antenna connector retaining clips by inserting a small flat blade screw
driver between the clip and the top of the chassis wall and gently prying the clip upwards.
Remove 13 screws from the transceiver board using a T8 TORX driver.
3-2Maintenance
Page 25
Recess
3.
1.
2.
3.
1.
2.
3.
Carefully remove the transceiver board by rotating it out of the chassis:
Slowly lift the board on the front edge, the side with the connector that mates with the control
head, and pull gently toward the front of the radio.
CAUTION: The thermal grease can act as an adhesive and cause the leads of the
heat dissipating devises to be ov er stressed if the board is lifted too quic kly.
3.0Assemble Radio
3.1Replace the Transceiver Board
Inspect and if necessary, reapply thermal grease to the heatsinking pads in the chassis.
Before installing the connector retaining clips, ensure that the board is sitting flush on the
chassis mounting surface.
Install the 13 screws with 0.4 -07 NM (4-6 in lbs) of torque using a T8 TORX driver.
Assemble Radio
3.2Replace the Top Cover and Control Head
Position the top cover over the chassis and replace. Ensure that the cross snaps into the
recesses.
Connect the control head to the radio by the flex.
Press the control head onto the radio chassis until the protruding tabs on the chassis snap into
the recesses inside the control housing, see Figure 3-4.
The list in table 3-1 includes service aids recommended for working on the radio.
PART No.DESCRIPTIONAPPLICATION
GTF376Test Box CableConnects radio to GTF180 test box.
Service Aids
Table 3-1 Service Aids.
GTF374Combined Interface
Cable
GTF377Combined Interface
Cable
GPN6133Power SupplyUsed to supply power to the radio.
GKN6266DC Power Cable for radioInterconnects radio to power supply.
GTF180Test BoxEnables connection to the universal connector. Allows
RLN4008Radio Interface BoxEnables communications between the radio and the
EPN4040Power SupplyUsed to supply power to the RIB (240 VAC).
EPN4041Power SupplyUsed to supply power to the RIB (220 VAC).
3080369B72Computer Interface
Cable
3080369B71Computer Interface
Cable
PMVN4022DPTX600/MCX600E
DPS_Dealer
PMVN4023DPTX600/MCX600E
DPS_Network
Connects radio to RLN4008 RIB.
Connects Databox radio to RLN4008 RIB.
switching for radio testing.
computer’s serial communications adapter.
Connects the computer’s serial communications adapter
(9 pin) to the RIB.
Connects the computer’s serial communications adapter
(25 pin) to the RIB.
DPS Dealer Software, 3.5” floppy disks
DPS Network Software, 3.5” floppy disks
www.myradio168.net
Maintenance3-5
Page 28
Test Equipment
6.0Test Equipment
The list in table 3-2 includes all standard test equipment required for servicing two-way mobile
radios, as well as sev eral unique items designed specifically f or servicing the radio . Battery-operated
test equipment is recommended when available. The “Characteristics” column is included so that
equivalent equipment may be substituted; however, when no information is provided in this column,
the specific Motorola model listed is either a unique item or no substitution is recommended.
MODEL No.DESCRIPTIONCHARACTERISTICSAPPLICATION
Table 3-2 Recommended Test Equipment.
R2000 Series System AnalyserThis monitor will
substitute for items with
an asterisk (*)
*R1150CCode SynthesizerInjection of audio and digital
*S1053D
*HM-203-7
*SKN6008A
*SKN6001A
*S1350C
*ST1213B (VHF)
*ST1223B (UHF)
R1065ALoad Resistor10-watt BroadbandFor use with Wattmeter
S1339ARF Millivolt Meter
*R1013ASINAD MeterReceiver sensitivity
S1347D or
S1348D
(programmable)
220 V AC Voltmeter
110 V AC Voltmeter
Power Cable for Meter
Test Leads for Meter
Watt Meter
Plug-in Element
RF Dummy Load
10kHz to 1.2 GHz
DC Power Supply0-20Vdc, 0-5 AmpsBench supply for 13.2Vdc current
1mV to 300V, 10-Mohm
Input impedance
50 ohm, ±5% accuracy
10 Watts, maximum
0-1000 MHz, 300W
100µV to 3V rfRF level measurements
Frequency/deviation meter and
signal generator for wide-range
troubleshooting and alignment.
signalling codes
Audio voltage measurements
Transmitter power o/p
measurements
measurements
limited
* Any of the R2000 Series system analysers will substitute for items with an asterisk (*)
www.myradio168.net
3-6Maintenance
Page 29
7.0Radio T uning Procedure
7.1General
The recommended hardware platform is a 386 or 486 DX 33 PC (personal computer) with 8 Mbytes
RAM, MS DOS 5.0, Windows 3.1, and DPS (Dealer Programming Software). These are required to
align the radio. Refer to your DPS Installation Manual for installation and setup procedures for the
required software; the user manual is accessed (and can be printed if required) via the DPS.
To perform the alignment procedures, the radio must be connected to the PC, RIB (Radio Interface
Box), and Universal Test Set as shown in Figure 3-6.
Radio T uning Procedure
MIC IN
PROGRAM/TEST CABLE
GTF377 (Databox Radios only)
or GTF374
RADIO
SMA-BNC
58-80348B33
TEST CABLE
GTF-376
Note: Battery can be used in RIB
making power supply optional
All tuning procedures are performed from the Service menu.
Before going into the Service menu, the radio must first be read using the File / Read Radio menu (if
the radio has just been programmed with data loaded from disk or from a newly created codeplug,
then it must still be read so that the DPS will have the radio’s actual tuning values).
All Service windows read and program the radio codeplug directly; y ou do NO T ha v e to use the DPS
Read Radio / Write Radio functions to program new tuning values.
CAUTION:DO NOT switch radios in the middle of any Service procedure. Always use the
Program or Cancel key to close the tuning windo w bef ore disconnecting the r adio.
Improper exits from the Service window may leave the radio in an improperly
configured state and result in seriously degraded radio or system performance.
Maintenance3-7
Page 30
Radio T uning Procedure
The Service windows introduce the concept of the “Softpot”, an analog SOFTware controlled
POTentiometer used for adjusting all transceiver alignment controls. A softpot can be selected by
clicking with the mouse at the value or the slider or by hitting the TAB key until the value or the slider
is highlighted.
Each Service window provides the capability to increase or decrease the ‘softpot’ value with the
mouse, the arrow ke ys or by entering a value with the keyboard. The window displays the minimum,
maximum, and step value of the softpot. In addition transmitter tuning windows indicate whether the
radio is keyed and the transmitter frequency.
Adjusting the softpot value sends information to the radio to increase (or decrease) a DC voltage in
the corresponding circuit. F or e xample , increasing the value in the Ref erence Oscillator tune windo w
instructs the radio microprocessor to increases the voltage across a varactor in the reference
oscillator to increase the frequency. Pressing the Program button stores all the softpot values of the
current window permanently in the radio.
In ALL cases, the softpot value is just a relative number corresponding to a D/A (Digital-to-Analog)
generated voltage in the radio. All standard measurement procedures and test equipment are
similar to previous radios.
1.
2.
3.
4.
5.
6.
Refer to the DPS on-line help for information on the tuning software.
Perform the following procedures in the sequence indicated.
Note: All tuning procedures must be performed at a supply voltage of 13.2V unless otherwise
stated.
7.2PA Bias Voltage
Adjustment of the PA Bias is critical for proper radio operation. Improper adjustment will result in
poor operation and may damage the PA FET device . For this reason, the PA bias must be set before
the transmitter is keyed the first time.
Note: For certain radio models there are two bias voltage settings. For these radios both ‘ Bias 1
Voltage ’ and ‘ Bias 2 Voltage ‘ need to be adjusted when aligning the PA Bias. For models that only
have one bias voltage setting, the ‘ Bias 2 Voltage ‘ will be shown in grey on the service menu.
From the Service menu, select Transmitter Alignment.
Select Bias Voltage Tuning to open the bias voltage tuning window. If the control voltage is out
of range, an error message will be displayed. In this case the radio hardware has a problem
and tuning must be stopped immediately.
Click the button labelled “0” to set the quiescent current temporarily to 0 mA
Measure the DC current of the radio. Note the measured value and add the specified quiescent
current shown in table 3-3. The result is the tuning target.
Adjust the current per the target calculated in step 3.
Click the Program button to store the softpot value.
www.myradio168.net
Table 3-3 Quiescent Current Alignment
RF-BandTarget
UHF
VHF / 336-390MHz
3-8Maintenance
440mA±10%
150mA±15%
Page 31
7.3Transmitter Power
The radio has two power level settings, a high power level setting, and a low power level setting.
IMPORTANT : To set the transmitter power for customer applications use the Common Radio
Parameters window under the Edit menu and set the “Low Power Level” and “High Power Level”
powers to the desired values. Only if the transmitter components have been changed or the
transmitter does not transmit with the power set in the Common Radio Parameters window the
following procedure should be performed.
The advanced power setting technology employed in the radio makes use of two reference power
level settings along with parameters describing the circuit beha viour . To determine these parameters
the DPS requires the power values measured for two different settings.
From the Service menu, select Transmitter Alignment.
Select RF Power Tuning to open the RF power tuning window. The window will indicate the
transmit test frequencies to be used.
Select Point 1 value of the first frequency.
Click Toggle PTT to key the radio. The status bar will indicate that the radio is transmitting.
Measure the transmitter power on your power meter.
Enter the measured value in the box Point 1.
Select Point 2 value of the first frequency.
Measure the transmitter power on your power meter.
Enter the measured value in the box Point 2.
10. Click Toggle PTT to dekey the radio.
11. Repeat steps 4 - 7 for all test frequencies shown in the window.
12. Click Program to store the softpot values.
1.
2.
3.
4.
5.
6.
7.
8.
9.
1.
2.
3.
4.
5.
6.
7.
Radio T uning Procedure
7.4Battery Threshold
The radio uses 2 battery threshold levels Tx High and Tx Low to determine the battery condition.
The Program buttons must only be activ ated when the pow er supply is set to the indicated voltage . If
the DPS detects that the voltage is not within the expected range f or the threshold in question then a
message will be displayed to warn that the radio may not be set up correctly for the alignment
operation.
CAUTION: Inadvertant use of the program buttons may result in radio failure.
www.myradio168.net
From the Service menu, select Transmitter Alignment.
Select Battery Threshold to open the battery threshold tuning window. The current softpot
values are displayed for information only and can´t be edited.
Set the supply voltage to the value indicated for TX High.
Click the TX High Program button to store the softpot value for TX High.
Set the supply voltage to the value indicated for TX Low.
Click the TX Low Program button to store the softpot value for TX Low.
Close the window by clicking Cancel.
Maintenance3-9
Page 32
Radio T uning Procedure
7.5Reference Oscillator
Adjustment of the reference oscillator is critical for proper radio operation. Improper adjustment will
not only result in poor operation, but also a misaligned radio that will interfere with other users
operating on adjacent channels. For this reason, the reference oscillator should be checked every
time the radio is serviced. The frequency counter used for this procedure must have a stability of 0.1
ppm (or better).
From the Service menu, select Transmitter Alignment.
Select Reference Oscillator to open the reference oscillator tuning window. The tuning window
will indicate the target transmit frequency.
Click Toggle PTT to key the radio. The status bar will indicate that the radio is transmitting.
Measure the transmit frequency on your frequency counter.
Adjust the reference oscillator softpot in the tuning window to achieve a transmit frequency
within the limits shown in table 3-4.
Click Toggle PTT again to dekey the radio and then press Program to store the softpot value.
1.
2.
3.
4.
5.
6.
1.
2.
3.
4.
5.
6.
7.
8.
9.
7.6Front-End Pre-Selector
Alignment of the front-end pre-selector is normally not required on these radios. Only if the r adio has
poor receiver sensitivity or the pre-selector parts has been replaced the following procedure should
be performed. The softpot value sets the control voltage of the pre-selector . Its value needs to be set
at 7 frequencies across the frequency range.
Set the test box (GTF180) meter selection switch to the "Audio PA" position and connect a
SINAD meter to the "METER" port.
From the Service menu, select Receiver Alignment.
Select Front End Filter to open the pre-selector tuning window. The window will indicate the
receive test frequencies to be used.
Select the first test frequency shown, and set the corresponding value to maximum.
Set the RF test generator to the receive test frequency, and set the RF level to 10µV modulated
with a 1 kHz tone at the normal test deviation shown in table 3-5.
Measure the RSSI voltage at accessory connector pin 15 with a dc voltmeter capable of 1 mV
resolution.
Change the softpot value by the stepsize shown in table 3-6 and note the RSSI voltage.The
target softpot value is achieved when the measured RSSI voltage change between step 6 and
step 7 is lower than the tuning target for the first time. The tuning target, shown in table 3-6, is
expressed as the percentage of the measured RSSI voltage and must be recalculated f or e v ery
tuning step. If the measured RSSI voltage decreases before the target value has been
achieved, approximation should be stopped and the current softpot value should be used as
target value. Set test box (GTF180B) audio switch to the “SPKR” position. The 1 kHz tone must
be audible at the target value to make sure the radio is receiving.
Repeat steps 4 - 7 for all test frequencies shown in the window.
Click the Program button to store the softpot values.
www.myradio168.net
Table 3-4 Reference Oscillator Alignment
RF-BandTarget
All bands±150 Hz
3-10Maintenance
Page 33
Table 3-5 Normal T est Deviation.
Channel SpacingDeviation
1.
2.
3.
4.
5.
6.
1.
2.
3.
Radio T uning Procedure
6.
7.
4.
5.
336-390MHz
7.7Rated Volume
The rated volume softpot sets the volume at normal test modulation.
Set test box (GTF180) meter selection switch to the “AUDIO PA” position and the speaker load
switch to the "MAXAR" position. Connect an AC voltmeter to the test box meter port.
From the Service menu, select Receiver Alignment.
Select Rated Volume to open the rated volume tuning window. The screen will indicate the
receive test frequency to be used.
Set the RF test generator to the receive test frequency, and set the RF level to 1mVolt
modulated with a 1 kHz tone at the normal test deviation shown in table 3-5. Set test box
(GTF180) audio switch to the “SPKR” position. The 1 kHz tone must be audible to make sure
the radio is receiving.
Adjust the value of the softpot to obtain rated audio volume (as close to 3.87 Vrms).
Click the Program button to store the softpot value.
12.5 kHz
20 kHz
25 kHz
Table 3-6 Start Value for Front-End Pre-selector Tuning.
RF-BandTar getStepsizeStart Value
UHF
VHF
0.5%
0.42%
0.84
1.5 kHz
2.4 kHz
3 kHz
-2
+2
-2
Maximum
Minimum
Maximum
7.8Squelch
The squelch softpots set the signal to noise ratio at which the squelch opens. The squelch value
needs to be set at 7 frequencies across the frequency range.
www.myradio168.net
Set the test box (GTF180) meter selection switch to the "Audio PA" position and connect a
SINAD meter to the "METER" port.
From the Service menu, select Receiver Alignment.
Select Squelch Attenuation to open the squelch attenuation tuning window. The window will
indicate the receive test frequencies to be used.
Select the first test frequency shown, and set the corresponding value to 0.
Set the RF test generator to the test frequency and modulate the signal generator at the normal
test deviation shown in table 3-5, with 1 kHz tone. Adjust the generator for a 8-10 dB SINAD
level (weighted with psophometric filter).
Adjust the softpot value until the squelch just closes.
Monitor for squelch chatter; if chatter is present, repeat step 6.
Maintenance3-11
Page 34
Radio T uning Procedure
8.When no chatter is detected, select the next softpot and repeat steps 4 - 7 for all test
frequencies shown in the window.
9.Click the Program button to store the softpot values.
7.9Transmit V oltage Limit
The transmit control voltage limit softpot sets the maximum power control voltage. All 7 voltage limit
softpots are tuned and programmed automatically when the Program button is clicked.
1.From the Service menu, select Transmitter Alignment.
2.Select Voltage Limit to open the voltage limit tuning window.
3.Set the Power Factor to 1.3.
4.Click the Program button to store the softpot values.
7.10Transmit Deviation Balance (Compensation)
Compensation alignment balances the modulation sensitivity of the VCO and reference modulation
(synthesiser low frequency port) lines. Compensation algorithm is critical to the operation of
signalling schemes that have very low frequency components (e.g. DPL) and could result in
distorted waveforms if improperly adjusted. The compensation value needs to be set at 7
frequencies across the frequency range.
1.From the Service menu, select Transmitter Alignment.
2.Select Modulation Attenuation to open the deviation balance tuning window. The window will
indicate the transmit test frequencies to be used.
3.Set the Test Bo x (GTF180) meter selector s witch to the “GEN” position, and inject a 80 Hz tone
at 200 mVrms into the "Audio In" port. (The deviation measured at step 6 should be about
1-4kHz.) Connect an AC meter to the meter port to insure the proper input signal level.
4.Select the first test frequency shown in the window.
5.Click Toggle PTT to key the radio. The status bar will indicate that the radio is transmitting.
6.Measure the transmitter deviation.
7.Change the input tone to 3 kHz, 200 mVrms.
8.Adjust the deviation to within ±2% of the value recorded in step 6.
9.Check the deviation at 80 Hz again and repeat step 7-8, if it has changed since step 6.
10. Click the Toggle PTT to dekey the radio.
11. Repeat steps 3 - 10 for the remaining test frequencies.
12. Click the Program button to store the softpot values.
Note:The step size change for step 8 is approximately 2.5% softpot value.
www.myradio168.net
3-12Maintenance
Page 35
7.11Transmit Deviation Limit
The transmit deviation limit softpot sets the maximum deviation of the carrier. The deviation value
needs to be set at 7 frequencies across the frequency range.
1.From the Service menu, select Transmitter Alignment.
2.Select Reference Attenuation to open the reference attenuation tuning window.
3.Set the maximum value and press Program to store the softpot value.
4.From the Service menu, select Transmitter Alignment.
5.Select VCO Attenuation to open the deviation limit tuning window. The window will indicate the
transmit test frequencies to be used.
6.Set the Test Bo x (GTF180) meter selector switch to the “GEN” position, and inject a 1 kHz tone
at 800 mVrms into the "Audio In" port. Connect an AC meter to the meter port to ensure the
proper input signal level.
7.Select the first test frequency shown in the window.
8.Click the Toggle PTT to key the radio. The status bar will indicate that the radio is transmitting.
9.Adjust the transmitter deviation to the value shown in table 3-6.
10. Click the Toggle PTT to dekey the radio.
11. Repeat steps 8 - 10 for the remaining test frequencies.
12. Click the Program button to store the softpot values.
Radio T uning Procedure
7.12Signalling Alignments
7.12.1MPT RSSI Threshold Level
The Program buttons must only be activated when the required signal is input to the radio and the
radio is receiving. If the DPS detects that the input signal is not within the expected range for the
RSSI level in question then a message will be displayed to warn that the radio may not be set up
correctly for the alignment operation.
INADVERTANT USE OF THE PROGRAM BUTTONS MAY RESULT IN RADIO FAILURE.
1.Set test box (GTF180) meter selection switch to the “AUDIO PA” position and the speaker load
2.From the Service menu, select Receiver Alignment.
3.Select RSSI to open the RSSI tuning window. The screen will indicate the receive test
4.Set the RF test generator to the receive test frequency, and set the RF level to the value
indicated for RSSI Level 0, modulated with a 1 kHz tone at the normal test deviation shown in
table 3-5. Set test box (GTF180) audio switch to the “SPKR” position. The 1 kHz tone must be
audible to make sure the radio is receiving.
5.Click the Program button to store the softpot value for RSSI Level 0.
6.Repeat steps 4 - 5 for the remaining RSSI levels.
The MPT1327 Deviation Softpot is used to tune the FFSK signalling deviation. Tuning is performed
at one frequency. The radio generates an alternating bit pattern for tuning. Values for other
frequencies are calculated by the radio software.
The DTMF Deviation Softpot is used to tune the DTMF signalling deviation. Tuning is performed at
one frequency. The radio generates a DTMF signal for tuning. Values for other frequencies are
calculated by the radio software.
1.From the Service menu, select Transmitter Alignment.
2.Select Signalling Deviation to open the signalling deviation tuning window.
3.Select the MPT value and press Toggle PTT to key the radio. The status bar will indicate that
the radio is transmitting.
4.Adjust the transmitter deviation to the value shown in table 3-8.
5.Click the Toggle PTT to dekey the radio.
6.Repeat steps 3 - 5 for DTMF deviation.
7.Click the Program button to store the softpot value.
Table 3-8 Signalling Deviation
This section provides a detailed theory of operation for the radio and its components. The main radio
is a single board design, consisting of the transmitter, receiver, and controller circuits.
The control head is either mounted directly on the front of the radio or connected via an extension
cable in remote mount operation. The control head contains a speaker, LED indicators, a
microphone connector, buttons and dependent of radio type, a display. These provide the user with
interface control over the various features of the radio.
In addition to the power cable and antenna cable, an accessory cable can be attached to a
connector on the rear of the radio. The accessory cable provides the necessary connections for
items such as external speaker, emergency switch, foot operated PTT, ignition sensing, etc.
2.0Open Controller
Overview
2.1General
The radio controller consists of 4 main subsections:
■
■
Digital Control
■
Audio Processing
■
■
Power Control
■
■
■
Voltage Regulation
The digital control section of the radio board is based upon an open architecture controller
configuration. It consists of a microprocessor, support memory, support logic, signal MUX ICs, the
On/Off circuit, and general purpose Input/Output circuitry.
The controller uses the Motorola 68HC11K1 microprocessor (U0101). In addition to the
microprocessor, the controller has 3 external memory devices. The 3 memory devices consist of a
32 kByte SRAM (U0103), a 256kByte FLASH EEPROM (U0102), and an optional EEPROM (U0104
or U0107) upto 16kByte.
Note: From this point on the 68HC11K1 microprocessor will be referred to as µP or K1µP.
2.2Voltage Regulators
www.myradio168.net
Voltage regulation for the controller is provided by 3 separate devices; U0631 (LP2951CM) +5V,
U0601 (LM2941T) +9.3V, and UNSW 5V (a combination of R0621 and VR0621). An additional
regulator is located in the RF section.
V oltage regulation pro viding 5V f or the digital circuitry is done by U0631. Input and output capacitors
(C0631/C0632 and C0633-C0635) are used to reduce high frequency noise and provide proper
operation during battery transients. This regulator provides a reset output (pin 5) that goes to 0 volts
if the regulator output goes out of regulation. This is used to reset the controller to prevent improper
operation. Diode D0631 prevents discharge of C0632 by negative spikes on the 9V3 voltage
Theory of Operation4-1
Page 40
Open Controller
Regulator U0601 is used to generate the 9.3 volts required by some audio circuits, the RF circuitry
and power control circuitry. Input and output capacitors (C0601-C0603 and C0604/C0605) are used
to reduce high frequency noise. R0602/R0603 set the output voltage of the regulator. If the voltage
at pin 1 is greater than 1.3 volts the regulator output decreases and if the voltage is less than 1.3
volts the regulator output increases. This regulator output is electronically enabled by a 0 volt signal
on pin 2. Q0601 and associated circuitry (R0601/R0604/R0605) are used to disable the regulator
when the radio is turned off.
UNSW 5V is only used in a few areas which draw low current and require 5 V while the radio is off.
UNSW 5V CL is used to buffer the internal RAM. C0622 allows the battery voltage to be
disconnected for a couple of seconds without losing RAM parameters. Diode D0621 prevents radio
circuitry from discharging this capacitor.
The voltage 9V3 SUPP is only used in the VHF radio (T1) to supply the drain current f or the RF MOS
FET in the PA.
The voltage SW B+ is monitored by the µP through the voltage divider R0641/R0642 and line
BATTERY VOLTAGE. Diode VR0641 limits the divided voltage to 5.1V to protect the µP.
Diode D5601 (UHF) / D3601 (VHF) / D8601 (336-390MHz) located on the PA section acts as
protection against transients and wrong polarity of the supply voltage.
2.3Electronic On/Off
The radio has circuitry which allows radio software and/or external triggers to turn the radio on or off
without direct user action. For example, automatic turn on when ignition is sensed and off when
ignition is off.
Q0611 is used to provide SW B+ to the various radio circuits. Q0611 acts as an electronic on/off
switch controlled by Q0612. The switch is on when the collector of Q0612 is low. When the radio is
off Q0612 is cutoff and the voltage at Q0611-base is at A+. This effectively prevents current flow
through Q0611 from emitter to collector. When the radio is turned on the voltage at the base of
Q0612 is high (about 0.6V) and Q0612 switches on (saturation) and pulls down the voltage at
Q0611-base. With Transistor Q0611 now enabled current flows through the device. This path has a
very low impedance (less than 1 Ω ) from emitter to collector. This effectively provides the same
voltage level at SWB+ as at A+.
The electronic on/off circuitry can be enabled by the microprocessor (through ASFIC port GCB2,
line B+ CONTROL), the emergency switch (line EMERGENCY CONTROL), the mechanical On/Off
button on the control head (line ON OFF CONTROL), or the ignition sense circuitry (line IGNITION
CONTROL). If any of the 4 paths cause a low at the collector of Q0612, the electronic ON is
engaged.
www.myradio168.net
2.4Emergency
The emergency switch (J0400-9), when engaged, grounds the base of Q0441 and pulls the line
EMERGENCY CONTROL to low via D0441. EMER IGN SENSE is pulled high by R0441. When the
emergency switch is released the base of Q0441 is pulled high by R0442. This causes the collector
of transistor Q0441 to go low (0.2V), thereby setting the EMER IGN SENSE line to low.
4-2Theory of Operation
Page 41
While EMERGENCY CONTROL is low, SW B+ is on, the microprocessor starts execution, reads
that the emergency input is active through the voltage level of EMER IGN SENSE, and sets the B+
CONTROL output of the ASFIC pin B4 to a logic high. This high will keep Q0611 switched on
through Q0612. This operation allows a momentary press of the emergency switch to power up the
radio. When the microprocessor has finished processing the emergency press, it sets the B+
CONTROL line to a logic 0. This turns off Q0611 and the radio turns off. Notice that the
microprocessor is alerted to the emergency condition via line EMER IGN SENSE. If the radio was
already on when emergency was triggered then B+ CONTROL would already be high.
2.5Mechanical On/Off
This refers to the typical on/off button, located on the control head or mic, and which turns the radio
on and off. If the radio is turned off and the on/off button is pressed, line ON OFF CONTROL goes
high and switches the radio on as long as the button is pressed. The microprocessor is alerted
through line ANALOG 3 which is pulled to low by Q0925 (Control Head with display) while the on/off
button is pressed. If the softw are detects a lo w state it asserts B+ CONTROL via ASFIC pin B4 high
which keeps Q0612 and Q0611, and in turn the radio switched on.
Open Controller
If the on/off button is pressed and held while the radio is on, the software detects the line ANALOG
3 changing to low and switches the radio off by setting B+ CONTROL to low.
2.6Ignition
Ignition sense is used to prevent the radio from draining the vehicle’s battery because the engine is
not running.
When the IGNITION input (J0400-10) goes above 6 volts Q0612 is turned on via line IGNITION
CONTROL. Q0612 turns on SW B+ by turning on Q0611 and the microprocessor starts execution. A
high IGNITION input reduces the voltage of line EMER IGN SENSE by turning on Q0450. The
software reads the line EMER IGN SENSE, determines from the level (Emergency has a different
level) that the IGNITION input is active and sets the B+ CONTROL output of the ASFIC pin B4 to
high to latch on SW B+.
When the IGNITION input goes below 6 volts, Q0450 switches off and R0449, R0450 pull line
EMER IGN SENSE high. The software is alerted by line EMER IGN SENSE to switch off the radio
by setting B+ CONTROL to low. The next time the IGNITION input goes above 6 volts the above
process will be repeated.
2.7Hook RSS
The HOOK RSS input is used to inform the µP when the Microphone’s hang-up switch is engaged.
Dependent on the radio model the µP may take actions like turning the audio PA on or off.
The signal is routed from J0101-3 and J0400-14 through transistor Q0101 to the µP U0101-23. The
voltage range of HOOK RSS in normal operating mode is 0-5V.
www.myradio168.net
To start SBEP communication with the radio this voltage must be above 6V. This condition generates
a µP interrupt via VR0102, Q0105, Q0104, Q0106 and enables the BUS+ line f or comm unication via
Q0122, Q0121.
Theory of Operation4-3
Page 42
Open Controller
2.8Microprocessor Clock Synthesizer
The clock source for the microprocessor system is generated by the ASFIC (U0201). Upon powerup the synthesizer U5701 (UHF) / U3701 (VHF) / U8701 (300MHz-R1) generates a 2.1 MHz
waveform that is routed from the RF section (via C0202) to the ASFIC (on U0201-E1) For the main
board controller the ASFIC uses 2.1MHz as a reference input clock signal f or its internal synthesizer .
The ASFIC, in addition to audio circuitry, has a programmable synthesizer which can generate a
synthesized signal ranging from 1200Hz to 32.769MHz in 1200 Hz steps.
When power is first applied, the ASFIC will generate its default 3.6864 MHz CMOS square w ave µ P
CLK (on U0201-D1) and this is routed to the microprocessor (U0101-73). After the microprocessor
starts operation, it reprograms the ASFIC clock synthesizer to a higher µ P CLK frequency (usually
7.9488 MHz) and continues operation.
The ASFIC may be reprogrammed to change the clock synthesizer frequencies at various times
depending on the software features that are executing. In addition, the clock frequency of the
synthesizer is changed in small amounts if there is a possibility of harmonics of this clock source
interfering with the desired radio receive frequency.
The ASFIC synthesizer loop uses C0228, C0229 and R0222 to set the switching time and jitter of
the clock output. If the synthesizer cannot gener ate the required clock frequency it will s witch back to
its default 3.6864MHz output.
Because the ASFIC synthesizer and the µP system will not operate without the 2.1MHz reference
clock, it (and the voltage regulators) should be checked first when debugging the system.
2.9Serial Peripheral Interface (SPI)
The µP communicates to many of the ICs through its SPI port. This port consists of SPI TRANSMIT
DATA (MOSI) (U0101-1), SPI RECEIVE DATA (MISO) (U0101-80), SPI CLK (U0101-2) and chip
select lines going to the various ICs, connected on the SPI PORT (BUS). This BUS is a synchronous
bus, in that the timing clock signal CLK is sent while SPI data (SPI TRANSMIT DATA or SPI
RECEIVE DATA) is sent. Therefore, whenev er there is activity on either SPI TRANSMIT DATA or SPI
RECEIVE DATA there should be a uniform signal on CLK. The SPI TRANSMIT D ATA is used to send
serial from a µ P to a device, and SPI RECEIVE D ATA is used to send data from a de vice to a µ P. The
only device from which data can be received via SPI RECEIVE DATA is the EEPROM (U0104 or
U0107).
On the controller there are three ICs on the SPI BUS, ASFIC (U0201-F2), EEPROM (U0104-1 or
U0107-1) and D/A (U0731-6). In the RF sections there is one IC on the SPI BUS which is the
FRAC-N Synthesizer. The SPI TRANSMIT DATA and CLK lines going to the RF section are filtered
by L0131/L0132 to minimize noise. The chip select lines for the IC´s are decoded by the address
decoder U0105.
www.myradio168.net
The SPI BUS is also used for the control head. U0106-2,3 buffer the SPI TRANSMIT DA TA and CLK
lines to the control head. U0106-1 switch off the CLK signal for the LCD display if it is not selected
via LCD CE and Q0141.
When the µ P needs to program any of these IC’s it brings the chip select line for that IC to a logic 0
and then sends the proper data and clock signals. The amount of data sent to the various IC’s are
different, for example the FRAC-N can receive up to 13 bytes (97 bits) while the D A C can receive up
to 3 bytes (24 bits). After the data has been sent the chip select line is returned to a logic 1.
4-4Theory of Operation
Page 43
2.10SPEB Serial Interface
The SBEP serial interface allows the radio to communicate with the Dealer Programming Software
(DPS) via the Radio Interface Box (RIB). This interface connects to the accessory connector J04006 and comprises BUS+ (J0101-15). The line is bi-directional, meaning that either the radio or the
DPS can drive the line.
When the RIB (Radio Interface Box) is connected to the radio, a voltage on the HOOK RSS line
above 6 volts switches on Q0105. The low state at collector of Q0105 switches Q0104 off and in
turn, Q0106 on. A high to low transition at the collector of Q0106 generates an interrupt via µP pin
61. The µP determines the interrupt source by reading a high at the collector of Q0104 via µP pin 6
and R0125. The switched on Q0105 also switches off Q0122 enabling the µP to read BUS+ via pin
78 and to write BUS+ via pin 79 and transistors Q0123,Q0121. While the radio is sending serial data
at pin 79 via Q0123 and Q0121 it receives an “echo” of the same data at pin 78.
When the voltage on the HOOK RSS line is below 6 volts (RIB is not connected), the high collector
of Q0105 turns on Q0122. The lo w collector of Q0122 pre v ents the µP from writing data to BUS+ via
Q0123. In this mode line BUS+ is used for signal SCI RX of the Serial Communication Interface
(SCI). The µP reads the SCI via signal SCI RX (pin 78) and writes via signal SCI TX (pin 79). Both
signals are available on the accessory connector J0400 (SCI DATA OUT, SCI DATA IN).
Open Controller
2.11General Purpose Input/Output
The Controller provides one general purpose line (GP I/O) available on the accessory connector
J0400-12 to interface to external options. The software and the hardware configuration of the radio
model defines the function of the port. The port uses an output transistor (Q0432) controlled by µP
via ASFIC port GCB3 (pin B3).
An external alarm output, available on J0400 pin 4 is generated b y the µP via ASFIC port GCB1 (pin
K3) and transistor Q0411. Input EXTERNAL PTT on J0400 pin 3 is read by the µP via line REAR
PTT and µP pin 8.
2.12Normal Microprocessor Operation
For this radio, the µP is configured to operate in one of two modes, expanded and bootstrap. In
expanded mode the µP uses external memory devices to operate, whereas in bootstrap operation
the µP uses only its internal memory. In normal operation of the radio the µP is operating in
expanded mode as described below.
In expanded mode on this radio, the µP (U0101) has access to three external memory devices;
U0102 (FLASH EEPROM), U0103 (SRAM), U0104 or U0107 (optional EEPROM). Also, within the
µP there are 768 bytes of internal RAM and 640 bytes of internal EEPROM, as well as logic to select
external memory devices.
The (optional) external EEPROM (U0104 or U0107) as well as the µP’s own internal EEPROM
space contain the information in the radio which is customer specific, referred to as the codeplug.
This information consists of items such as: 1) what band the radio operates in, 2) what frequencies
are assigned to what channel, and 3) tuning information. In general tuning information and other
more frequently accessed items are stored in the internal EEPROM (space within the 68HC11K1),
while the remaining data is stored in the external EEPROM. (See the particular device subsection
for more details.)
www.myradio168.net
Theory of Operation4-5
Page 44
Open Controller
The external SRAM (U0103) as well as the µP’s own internal RAM space are used for temporary
calculations required by the software during execution. All of the data stored in both of these
locations is lost when the radio powers off (See the particular device subsection for more details).
The FLASH EEPROM contains the actual Radio Operating Software. This software is common to all
open architecture radios within a given model type. For example Securenet radios may have a
different version of software in the FLASH EEPROM than a non-secure radio (See the particular
device subsection for more details).
The K1 µ P provides an address bus of 16 address lines (A0-A15), and a data bus of 8 data lines (D0D7). There are also three control lines; CSPROG (U0101-29) to chip select U0102-30 (FLASH
EEPROM), CSGP2 (U0101-28) to chip select U0103-20 (SRAM) and PG7_R_W to select whether
to read or to write. All other chips (ASFIC/PENDULLUM/DAC/FRACN/LCD/LED/optional EEPROM/
OPTION BOARD) are selected by 3 lines of the µP using address decoder U0105. When the µP is
functioning normally, the address and data lines should be toggling at CMOS logic levels.
Specifically, the logic high levels should be between 4.8 and 5.0 V, and the logic low levels should be
between 0 and 0.2 V. No other intermediate levels should be observed, and the rise and fall times
should be <30 ns.
The low-order address lines (A0-A7) and the data lines (D0-D7) should be toggling at a high rate,
i.e., you should set your oscilloscope sweep to 1 us/div. or faster to observe individual pulses. High
speed CMOS transitions should also be observed on the µP control lines.
On the µP the lines XIRQ (U0101-30), MODA LIR (U0101-77), MODB VSTPY (U0101-76) and
RESET (U0101-75) should be high at all times during normal operation. Whenever a data or
address line becomes open or shorted to an adjacent line, a common symptom is that the RESET
line goes low periodically, with the period being in the order of 20 msecs. In the case of shorted lines
you may also detect the line periodically at an intermediate level, i.e. around 2.5 V when 2 shorted
lines attempt to drive to opposite rails.
The MODA LIR (U0101-77) and MODB VSTPY (U0101-76) inputs to the µP must be at a logic 1 for
it to start executing correctly. After the µP starts execution it will periodically pulse these lines to
determine the desired operating mode. While the Central Processing Unit (CPU) is running, MODA
LIR is an open-drain CMOS output which goes low whenever the µP begins a new instruction (an
instruction typically requires 2-4 external bus cycles, or memory fetches).
However, since it is an open-drain output, the waveform rise assumes an exponential shape similar
to an RC circuit.
There are eight analogue to digital converter ports (A/D) on U0101. They are labelled within the
device block as PE0-PE7. These lines sense the voltage level ranging from 0 to 5 V of the input line
and convert that level to a number ranging from 0 to 255 which can be read by the software to take
appropriate action.
www.myradio168.net
For example, U0101-46 is the battery voltage detect line. R0641 and R0642 form a resistor divider
on SWB+. With 30K and 10K and a voltage range of 11 V to 17 V, that A/D port would see 2.74 V to
4.24 V which would then be converted to ~140 to 217 respectively.
U0101-51 is the high reference voltage for the A/D ports on the µP. Resistor R0106 and capacitor
C0106 filter the +5 V reference. If this voltage is lower than +5 V the A/D readings will be incorrect.
Likewise U0101-50 is the low reference for the A/D ports. This line is normally tied to ground. If this
line is not connected to ground, the A/D readings will be incorrect.
4-6Theory of Operation
Page 45
Capacitors C0104, C0105, C0113, C0114 serve to filter out any AC noise which ma y ride on +5V at
U0101.
Input IRQ (U101-61) generates an interrupt, if either HOOK RSS (J0101-3) is higher than 6V (SBEP
communication) and turns Q0106 on via Q0105, Q0104, or a low at the option interrupt pin (J0103-
8) turns Q0124 off and Q0125 on. The µP determines the interrupt source by reading the collector of
Q0104 via U0101-6 and the collector Q0124 via U0101-7.
The 256 KByte FLASH EEPROM (U0102) contains the radio operating software. This software is
common to all open architecture radios within a given model type. This is, as opposed to the
codeplug information stored in EEPROM (U0104) which could be different from one user to another
in the same company.
In normal operating mode, this memory is only read, not written to. The memory access signals (CE,
OE and WE) are generated by the µP.
Open Controller
To upgrade/reprogram the FLASH software, the µP must be set in bootstrap operating mode, and
the FLASH device pin (U0102-9) V
account, the voltage at J400-12 to enable FLASH programming ma y r ange between 12.1 and 13.1V.
This voltage also switches Q0102 on and in turn Q0103 off. The low state at collector of Q0102 pulls
MODA LIR (U0101-77) and MODB VSTBY (U0101-76) via diode D0101 to low which enables the
bootstrap operating mode after power up. The high state at collector of Q0103 enables the µP to
control the FLASH EN OE (U0102-32) input via U0106-4. Chip select (U103-30) and read or write
operation (U103-7) are controlled by µP pins 29 and 33. In normal operating mode V
which switches Q0102 off and Q0103 on.
Resistor divider pair R0132 and R0133 set up 4.1 V on U0102-9 which reduces the chance of logic
transitions. The FLASH device may be reprogrammed 1,000 times without issue. It is not
recommended to reprogram the FLASH device at a temperature below 0°C.
Capacitor C0131 serves to filter out any AC noise which may ride on +5V at U0101, and C0132
filters out any AC noise on V
pp
must be between 11.4 and 12.6 V. Taking diode D0102 into
The optional EEPROM (U0104 or U0107) contains additional radio operating parameters such as
operating frequency and signalling features, commonly known as the codeplug. It is also used to
store radio operating state parameters such as current mode and volume. U0104 can have up to
8Kbyte and U0107 up to 16 Kbyte. This memory can be written to in excess of 100,000 times and
will retain the data when power is removed from the radio. The memory access signals (SI, SO and
SCK) are generated by the µP and chip select (CS) is generated by address decoder U0105-4.
www.myradio168.net
is below 5V
PP
Additional EEPROM is contained in the µP (U0101). This EEPROM is used to store radio tuning and
alignment data. Lik e the external EEPROM this memory can be programmed multiple times and will
retain the data when power is removed from the radio.
Note: The external EEPROM plus the 640 bytes of internal EEPROM in the 68HC11K1 comprise
the complete codeplug.
Theory of Operation4-7
Page 46
Open Controller
2.15Static Random Access Memory (SRAM)
The SRAM (U0103) contains temporary radio calculations or parameters that can change very
frequently, and which are generated and stored by the software during its normal operation. The
information is lost when the radio is turned off. The device allows an unlimited number of write
cycles. SRAM accesses are indicated by the CS signal U103-20 (which comes from U101-CSGP2)
going low. U0103 is commonly referred to as the external RAM as opposed to the internal RAM
which is the 768 bytes of RAM which is part of the 68HC11K1. Both RAM spaces serve the purpose.
However, the internal RAM is used for the calculated values which are accessed most often.
Capacitor C0133 serves to filter out any ac noise which may ride on +5V at U0103.
2.16Blank Control Head
The blank control head provides the connector to the hand held control mic or head.
2.16.1Power Supplies
The power supply to the Control Head is taken from the host radio’s FLT A+ voltage via connector
J0801(K2) / J0901(K3) pin 2 and the regulated +5V via connector J0801(K2) / J0901(K3) pin 10.
The voltage FLT A+ is at battery level and is used for the LEDs, the back light and to power up the
radio via the On / Off button. The stabilized +5 volt is used for the (display, the display driver,-K3
only) the shiftregister and the keypad buttons.
2.16.2Power On / Off
The On/Off button when pressed switches the radio’s voltage regulators on by pulling ON OFF
CONTROL to high via D0825(K2) / D0925(K3) and connects the base of D0825(K2) / D0925(K3) to
FLT A+. This transistor pulls the line ANALOG 3 to low to inform the µP that the On/Off button is
pressed. If the radio is switched off, the µP will switch it on and vice versa. If the On/Off button is
pressed and held while the radio is on, the software detects a low state on line ANALOG 3 and
switches the radio off.
2.16.3Electrostatic Transient Protection
Electrostatic transient protection is provided for the sensitive components in the Control Head by
diodes VR0801 - VR0809(K2) / VR0901 - VR0909(K3). The diodes limit any transient voltages to
tolerable levels. The associated capacitors provide Radio Frequency Interference (RFI) protection.
2.16.4Reversible Control Head
www.myradio168.net
The control head is connected to the RF transceiver by means of a short flexible ribbon cable. This
allows the control head to be mounted either way up in relation to the body of the transceiver. This
means that the transceiver can be mounted in the most cosmetically pleasing and most efficient
cooling orientation and still have the user interface the “right way” up.
4-8Theory of Operation
Page 47
CONTROLLER BOARD AUDIO AND SIGNALLING CIRCUITS
3.0General
3.1Audio Signalling Filter IC (ASFIC)
The ASFIC (U0201) used in the controller has 4 functions;
■
RX/TX audio shaping, i.e. filtering, amplification, attenuation
■
■
RX/TX signalling, PL/DPL/HST/MDC/MPT
■
■
■
Squelch detection
■
Microprocessor clock signal generation (see Microprocessor Clock Synthesizer Description
■
Block).
General
The ASFIC is programmable through the SPI BUS (U0201-E3/F1/F2), normally receiving 21 bytes.
This programming sets up various paths within the ASFIC to route audio and/or signalling signals
through the appropriate filtering, gain and attenuator blocks. The ASFIC also has 6 General Control
Bits GCB0-5 which are CMOS level outputs and used for AUDIO PA ENABLE (GCB0) to switch the
audio PA on and off, EXTERNAL ALARM (GCB1) and B+ CONTROL (GCB2) to switch the voltage
regulators (and the radio) on and off. GCB3 controls output GPI/O (accessory connector J0400-12),
HIGH LOW BAND (GCB4) can be used to switch betw een band splits and GCB5 is a vailable on the
option board connector J0102-3. The supply voltage for the ASFIC has additional filtering provided
by Q0200, D0200, R0200, L0200 and C0200. Diode D0200 increases the voltage at the base of
Q0200 about 0.6 volts above the 5 v olt supply v oltage to compensate the base - emitter voltage drop
of Q0200.
3.2Audio Ground
V A G is the dc bias used as an audio ground f or the op-amps that are e xternal to the Audio Signalling
Filter IC (ASFIC). U0251-1 f orm this bias by dividing 9.3V with resistors R0251, R0252 and b uff ering
the 4.65V result with a voltage follower. VAG emerges at pin 1 of U0251-1. C0253 is a bypass
capacitor for VAG. The ASFIC generates its own 2.5V bias for its internal circuitry. C0221 is the
bypass for the ASFIC’s audio ground dc bias. Note that while there are ASFIC VAG, and BOARD
VAG (U0201-1) each of these are separate. They do not connect together.
4.0Transmit Audio Circuits
www.myradio168.net
Refer to Figure 4.1 for reference for the following sections.
4.1Mic Input Path
The radio supports two distinct microphone paths known as internal (from Control Head) and
external mic (from accessory connector J0400-2) and an auxiliary path (FLAT TX AUDIO). The
microphones used for the radio require a DC biasing voltage provided by a resistive network.
These two microphone audio inputs are connected together through R0413; resistors R0414 and
R0415 are not placed. Following the internal mic path; the microphone is plugged into the radio
control head and is connected to the controller board via J101-16.
Theory of Operation4-9
Page 48
Transmit Audio Circuits
From here the signal is routed to R0206. R0204 and R0205 provide the 9.3VDC bias and R0206
provides input protection for the CMOS amplifier input. R0205 and C0209 provide a 1kohm AC path
to ground that sets the input impedance for the microphone and determines the gain based on the
emitter resistor in the microphone’s amplifier circuit.
Filter capacitor C0210 provides low-pass filtering to eliminate frequency components above 3 kHz,
and C0211 serves as a DC blocking capacitor. The audio signal at U0201-B8 should be
www.myradio168.net
approximately 80mV for 1.5kHz or 3kHz of deviation with 12.5kHz or 25 kHz channel spacing.
The FLAT TX AUDIO signal from accessory connector J0400-5 is buffered by op-amp U0202-1 and
fed to the ASFIC U0201-D7 through C0205.
4.2External Mic Path
The external microphone signal enters the radio on accessory connector J0400 pin 2 and connects
to the standard microphone input through R0413. Components R0414 - R0416, C0413, C0414,
C0417 are not used.
4-10Theory of Operation
Page 49
4.3PTT Sensing and TX Audio Processing
Mic PTT coming from the Control Head via connector J101-4 is sensed by the µP U0101 pin 22. An
external PTT can be generated by grounding pin 3 on the accessory connector. When microphone
PTT or external PTT is sensed, the µP will always configure the ASFIC for the internal mic audio
path.
Inside the ASFIC, the MIC audio is filtered to eliminate frequency components outside the 3003000Hz voice band, pre-emphasized if pre-emphasis is enabled. The capacitor between ASFIC preemphasis out U0201-C8 and ASFIC limiter in U0201-E8 AC couples the signal between ASFIC
blocks and prevents the DC bias at the ASFIC output U0201-H8 from shifting when the ASFIC
transmit circuits are powered up. The signal is then limited to prevent the transmitter from over
deviating. The limited MIC audio is then routed through a summer which, is used to add in signalling
data, and then to a splatter filter to eliminate high frequency spectral components that could be
generated by the limiter. The audio is then routed to two attenuators, which are tuned in the factory
or the field to set the proper amount of FM deviation. The TX audio emerges from the ASFIC at
U0201-H8 MOD IN, at which point it is routed to the RF section.
1.
2.
3.
Transmit Signalling Circuits
5.0Transmit Signalling Circuits
Refer to Figure 4.2 for reference for the following sections. From a hardware point of view, there are
three types of signalling:
Sub-audible data (PL/DPL/Connect Tone) that gets summed with transmit voice or signalling,
DTMF data for telephone communication in trunked and conventional systems, and
Audible signalling including Select 5, MPT-1327, MDC, High speed Trunking.
NOTE: All three types are supported by the hardware while the radio software determines which
signalling type is available.
HIGH SPEED
5
MICRO
CONTROLLER
www.myradio168.net
U0101
7
G1
G2
CLOCK IN
DTMF
CLOCK
SUMMER
5-3-2 STATE
ENCODER
DTMF
ENCODER
ASFIC U0201
HS
SPLATTER
FILTER
6
C3
LOW SPEED
CLOCK
PL
ENCODER
LS
SUMMER
ATTENUATOR
H8
MOD IN
TO RF
SECTION
(SYNTHESIZER)
GEPD 5433
Figure 4.2 Transmit Signalling Paths
Theory of Operation4-11
Page 50
Transmit Signalling Circuits
5.1Sub-audible Data (PL/DPL)
Sub-audible data implies signalling whose bandwidth is below 300Hz. PL and DPL waveforms are
used for conv entional operation and connect tones f or trunked v oice channel operation. The trunking
connect tone is simply a PL tone at a higher deviation level than PL in a conventional system.
Although it is referred to as ”sub-audible data,” the actual frequency spectrum of these waveforms
may be as high as 250 Hz, which is audible to the human ear. However, the radio receiv er filters out
any audio below 300Hz, so these tones are never heard in the actual system.
Only one type of sub-audible data can be generated by U0201 (ASFIC) at any one time. The
process is as follows, using the SPI BUS, the µ P programs the ASFIC to set up the proper lowspeed data deviation and select the PL or DPL filters. The µ P then generates a square wave which
strobes the ASFIC PL / DPL encode input PL CLK U0201-C3 at twelve times the desired data rate.
For example, for a PL frequency of 103Hz, the frequency of the square wave would be 1236Hz.
This drives a tone generator inside U0201 which generates a staircase approximation to a PL sine
wave or DPL data pattern. This internal waveform is then low-pass filtered and summed with voice
or data. The resulting summed waveform then appears on U0201-H8 (MOD IN), where it is sent to
the RF board as previously described for transmit audio. A trunking connect tone would be
generated in the same manner as a PL tone.
5.2High Speed Data
High speed data refers to the 3600 baud data waveforms, known as Inbound Signalling Words
(ISWs) used in a trunking system for high speed communication between the central controller and
the radio. To generate an ISW, the µP first programs the ASFIC (U0201) to the proper filter and gain
settings. It then begins strobing U0201-G1 (TRK CLK IN) with a pulse when the data is supposed to
change states. U0201’s 5-3-2 State Encoder (which is in a 2-state mode) is then fed to the postlimiter summer block and then the splatter filter.
From that point it is routed through the modulation attenuators and then out of the ASFIC to the RF
board. MPT 1327 and MDC are generated in much the same way as Trunking ISW. However, in
some cases these signals may also pass through a data pre-emphasis block in the ASFIC. Also
these signalling schemes are based on sending a combination of 1200 Hz and 1800 Hz tones only.
Microphone audio is muted during High Speed Data signalling.
5.3Dual Tone Multiple Frequency (DTMF) Data
DTMF data is a dual tone wavef orm used during phone interconnect operation. It is the same type of
tones which are heard when using a “Touch Tone” telephone.
There are seven frequencies , with f our in the low g roup (697, 770, 852, 941Hz) and three in the high
group (1209, 1336, 1477Hz).
The high-group tone is generated by the µP (U0101-5) strobing U0201-G1 at six times the tone
frequency for tones less than 1440Hz or twice the frequency for tones g reater than 1440Hz. The low
group tone is generated by the µP (U0101-7) strobing U0201-G2 (DTMF CLCK) at six times the tone
frequency. Inside U0201 the low-group and high-g roup tones are summed (with the amplitude of the
high group tone being approximately 2 dB greater than that of the low group tone) and then preemphasized before being routed to the summer and splatter filter. The DTMF waveform then follows
the same path as was described for high-speed data.
www.myradio168.net
4-12Theory of Operation
Page 51
6.0Receive Audio Circuits
Refer to Figure 4.3 for reference for the following sections.
J0103-4
J0103-5
IN 1
IN 2
J0103-2
OUT
(DISCRIMINATOR AUDIO)
OPTION
BOARD
FROM
RF
SECTION
(IF IC)
UNAT RX OUT
H5
J5
EXP AUDIO IN
H6
RX IN
AUX RX IN
J6
PL IN
J7
DET AUDIO
B2
UNIV IO
DEEMPHASIS
J4
VOLUME
ATTEN.
FILTER AND
LIMITER, RECTIFIER
FILTER, COMPARATOR
SQ IN
H7
1
AUDIO
PA
U0401
9
ATTEN.
RX AUD OUT
CH ACT
2543
4
SPKR +
SPKR -
6
INT
SPKR+
SPKR-
ASFIC
U0201
PL FILTER
LIMITER
SQUELCH
CIRCUIT
SQ DET
H2
MICRO
CONTROLLER
U0101
ACCESSORY
CONNECTOR
J0400
INT
CONTROL
HEAD
CONNECTOR
J0101
PL
LIM
H1
Receive Audio Circuits
11
16
1
2
1
14
A4
10
HANDSET
AUDIO
FLT RX AUDIO
EXTERNAL
SPEAKER
INTERNAL
SPEAKER
GEPD 5428-1
Figure 4.3 Receive Audio Paths.
6.1Squelch Detect
www.myradio168.net
The radio’s RF circuits are constantly producing an output at the discriminator U5201-28 (UHF) /
U5201-28 (VHF) / U8201-28 (300MHz-R1). This signal (DET AUDIO) is routed to the ASFIC’s
squelch detect circuitry input SQ IN (U0201-H7). All of the squelch detect circuitry is contained
within the ASFIC. Therefore from a user’s point of view, DET AUDIO enters the ASFIC, and the
ASFIC produces two CMOS logic outputs based on the result. They are CH ACT (U0201-H2) and
SQ DET (U0201-H1).
The squelch signal entering the ASFIC is amplified, filtered, attenuated, and rectified. It is then sent
to a comparator to produce an active high signal on CH ACT. A squelch tail circuit is used to produce
SQ DET (U0201-H1) from CH ACT. The state of CH ACT and SQ DET is high (logic 1) when carrier
is detected, otherwise low (logic 0).
Theory of Operation4-13
Page 52
Receive Audio Circuits
CH ACT is routed to the µP pin 25 while SQ DET adds up with LOCK DET, weighted by resistors
R0113, R0114, and is routed to one of the µP´s ADC inputs U0101-43. From the voltage weighted
by the resistors the µP determines whether SQ DET, LOCK DET or both are active.
SQ DET is used to determine all audio mute/unmute decisions except for Con v entional Scan. In this
case CH ACT is a pre-indicator as it occurs slightly faster than SQ DET.
6.2Audio Processing and Digital Volume Control
The receiver audio signal enters the controller section from the IF IC U5201-28 on DET AUDIO and
passes through RC filter, R0203 and C0208 which filters out IF noise. The signal is AC coupled by
C0207 and enters the ASFIC via the PL IN pin U0201-J7.
Inside the ASFIC, the signal goes through 2 paths in parallel, the audio path and the PL/DPL path.
The audio path has a programmable amplifier, whose setting is based on the channel bandwidth
being received, then a LPF filter to remove any frequency components above 3000Hz and then an
HPF to strip off any sub-audible data below 300Hz. Next, the recovered audio passes through a deemphasis filter if it is enabled (to compensate for Pre-emphasis which is used to reduce the effects
of FM noise). The IC then passes the audio through the 8-bit programmable attenuator whose level
is set depending on the value of the volume control. Finally the filtered audio signal passes through
an output buffer within the ASFIC. The audio signal exits the ASFIC at RX AUDIO (U0201-J4).
The µ P programs the attenuator, using the SPI BUS, based on the volume setting. The minimum /
maximum settings of the attenuator are set by codeplug parameters.
Since sub-audible signalling is summed with voice information on transmit, it must be separated
from the voice information before processing. Any sub-audible signalling enters the ASFIC from the
IF IC at PL IN U0201-J7. Once inside it goes through the PL/DPL path.
The signal first passes through one of 2 low pass filters, either PL low pass filter or DPL/LST low
pass filter. Either signal is then filtered and goes through a limiter and exits the ASFIC at PL LIM
(U0201-A4). At this point the signal will appear as a square wave version of the sub-audible signal
which the radio received. The microprocessor (U0101-10) will decode the signal directly to
determine if it is the tone/code which is currently active on that mode.
6.3Audio Amplification Speaker (+) Speaker (-)
The output of the ASFIC’s digital volume pot, U0201-J4 is routed through a voltage divider formed
by R0401 and R0402 to set the correct input level to the audio PA (U0401). This is necessary
because the gain of the audio PA is 46 dB, and the ASFIC output is capable of overdriving the PA
unless the maximum volume is limited.
The audio then passes through C0401 which provides AC coupling and low frequency roll-off.
C0402 provides high frequency roll-off as the audio signal is routed to pins 1 and 9 of the audio
power amplifier U0401.
www.myradio168.net
The audio power amplifier has one inverted and one non-inverted output that produces the
differential audio output SPK+ / SPK- (U0401-4/6). The inputs for each of these amplifiers are pins 1
and 9 respectively; these inputs are both tied to the received audio. The audio PA’s DC biases are
not activated until the audio PA is enabled at pin 8.
4-14Theory of Operation
Page 53
The audio PA is enabled via AUDIO PA ENABLE signal from the ASFIC (U0201-B5). When the base
of Q0401 is low , the transistor is off and U0401-8 is high, using pull up resistor R0406, and the A udio
PA is ON. The voltage at U0401-8 must be above 8.5VDC to properly enable the device. If the
voltage is between 3.3 and 6.4V, the device will be active but has its input (U0401-1/9) off. This is a
mute condition which is not employed in this r adio design. R0404 ensures that the base of Q0401 is
high on power up. Otherwise there may be an audio pop due to R0406 pulling U0401-8 high before
the software can switch on Q0401.
The SPK+ and SPK- outputs of the audio PA have a DC bias which varies proportionately with FLT
A+ (U0401-7). FLT A+ of 11V yields a DC offset of 5V, and FLT A+ of 17V yields a DC offset of 8.5V.
If either of these lines is shorted to ground, it is possible that the audio PA will be damaged. SPK+
and SPK- are routed to the accessory connector (J400-16 and 1) and to the control head (connector
J0101-1 and 2).
6.4Filtered Audio
The ASFIC has an audio whose output at U0201-B2 has been filtered and de-emphasized, but has
not gone through the digital volume attenuator. From ASFIC U0201-B2 the signal is AC coupled to
U0202-2 by capacitor C0230. R0224 and R0225 determine the gain of op-amp U0202-2. The output
of U0202-2 is the routed to J0400-11.Note that any volume adjustment of the signal on this path
must be done by the accessory.
Receive Signalling Circuits
7.0Receive Signalling Circuits
Refer to Figure 4.4 for reference for the following sections.
G1
HIGH SPEED
CLOCK
DATA FILTER
AND DEEMPHASIS
J7
DET AUDIO
DISCRIMINATOR AUDIO
FROM RF SECTION
(IF IC)
PL
IN
www.myradio168.net
LOW SPEED
LIM CAP
C5
FILTER
LOW SPEED
LIMITER
ASFIC
U0201
LIMITER
C3
CLOCK
RX LIM
CAP
65
RX
G4
LIM
OUT
A4
PL
LIM
J3
11
CONTROLLER
10
MICRO
U0101
GEPD 5431
Figure 4.4 Receive Signalling Path.
Theory of Operation4-15
Page 54
Receive Signalling Circuits
7.1Sub-audible Data (PL/DPL) and High Speed Data Decoder
The ASFIC (U0201) is used to filter and limit all received data. The data enters the ASFIC at U0201J7. Inside U0201 the data is filtered according to data type (HS or LS), then it is limited to a 0-5V
digital level. The MDC and trunking high speed data appear at U0201-G4, where it connects to the
µP U0101-11
The low speed limited data output (PL, DPL, and trunking LS) appears at U0201-A4, where it
connects to the µP U0101-10. While receiving low speed data, the µP may output a sampling
waveform, depending on the sampling technique, to U0201-C3 between 1 and 2 kHz.
The low speed data is read by the µP at twice the frequency of the sampling waveform; a latch
configuration in the ASFIC stores one bit every clock cycle. The external capacitors C0226, C0225,
and C0223 set the low frequency pole for a zero crossings detector in the limiters for PL and HS
data. The hysteresis of these limiters is programmed based on the type of received data. Note that
during HS data the µP may generate a sampling waveform seen at U0201-G1.
7.2Alert T one Circuits
When the software determines that it needs to give the operator an audible f eedback (for a good key
press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures), it
sends an alert tone to the speaker.
It does so by sending SPI BUS data to U0201 which sets up the audio path to the speaker for alert
tones. The alert tone itself can be generated in one of two ways: internally by the ASFIC, or
externally using the µ P and the ASFIC.
The allowable internal alert tones are 304, 608, 911, and 1823Hz. In this case a code contained
within the SPI BUS load to the ASFIC sets up the path and determines the tone frequency, and at
what volume level to generate the tone. (It does not have to be related to the voice volume setting).
For external alert tones, the µP can generate any tone within the 100-3000Hz audio band. This is
accomplished by the µP generating a square wave which enters the ASFIC at U0201-C3.
Inside the ASFIC, this signal is routed to the alert tone generator. The output of the generator is
summed into the audio chain just after the RX audio de-emphasis block. Inside U0201 the tone is
amplified and filtered, then passed through the 8-bit digital volume attenuator, which is typically
loaded with a special value for alert tone audio. The tone exits at U0201-J4 and is routed to the
audio PA like receive audio.
www.myradio168.net
4-16Theory of Operation
Page 55
300MHz SPECIFIC CIRCUIT DESCRIPTION
4
8.0Receiver Front-End
The receiver is able to cover the range from 336 to 390 MHz. It consists of four major blocks: frontend, mixer, first IF section and IF IC. Antenna signal pre-selection is performed by two varactor
tuned bandpass filters. A double balanced schottky diode mixer converts the signal to the first IF at
45.1 MHz.
Two crystal filters in the first IF section and two ceramic filters in the second IF section provide the
required selectivity. The second IF at 455 kHz is mixed, amplified and demodulated in the IF IC. The
processing of the demodulated audio signal is performed by an audio processing IC located in the
controller section.
8.1Front-End Band-Pass Filter & Pre-Amplifier
Receiver Front-End
A two pole pre-selector filter tuned by the varactor diodes D8301 and D8302 pre-selects the
incoming signal (PA RX) from the antenna switch to reduce spurious effects to f ollo wing stages . The
tuning voltage (FE CNTL VLTG) ranging from 2 v olts to 8 volts is controlled by a Digital to Analog (D/
A) converter (U0731-11) in the controller section. A dual hot carrier diode (D8303) limits any inband
signal to 0 dBm to prevent damage to the pre-amplifier.
The RF pre-amplifier is an SMD device (Q8301) with collector base feedback to stabilize gain,
impedance, and intermodulation. The collector current of approximately 11-16 mA is drawn from the
voltage 9V3 via L8302 and R8302.
A second two pole varactor tuned bandpass filter provides additional filtering to the amplified signal.
The varactor diodes D8304 and D8305 are controlled by the same signal which controls the preselector filter. A following 1 dB pad (R8310, R8314, R8316) stabilizes the output impedance and
intermodulation performance. If the radio is configured for a base station application, R8319 is not
placed, and TP8301 and TP8302 are shorted.
8.2Mixer and Intermediate Frequency (IF) Section
The signal coming from the front-end is converted to the first IF (45.1 MHz) using a double balanced
schottky diode mixer (D8401). Its ports are matched for incoming RF signal conversion to the 45.1
MHz IF using low side injection. The injection signal (VCO MIXER) coming from the mixer buffer
(Q8881) is filtered by the lowpass consisting of (L8403, L8404, C8401 - C8403) and has a level of
approximately 10 dBm.
www.myradio168.net
The mixer IF output signal (RX IF) from transformer T8401 pin 2 is fed to the first two pole crystal
filter Y5201. The filter output in turn is matched to the following IF amplifier.
The IF amplifier Q5201 is actively biased by a collector base feedback (R5201, R5202) to a current
drain of approximately 5 mA drawn from the voltage 5V STAB. Its output impedance is matched to
the second two pole crystal filter Y5202. A dual hot carrier diode (D5201) limits the filter output
voltage swing to reduce overdrive effects at RF input levels above -27 dBm.
Theory of Operation4-17
Page 56
Transmitter Power Amplifier (PA) 5-25W
8.3IF IC (U5201)
The first IF signal from the crystal filters feeds the IF IC (U5201) at pin 6. Within the IF IC the
45.1MHz first IF signal mixes with the second local oscillator (LO) at 44.645MHz to the second IF at
455 kHz. The second LO uses the external crystal Y5211. The second IF signal is amplified and then
filtered by two external ceramic filters (FL5201, FL5202). Back in the IF IC the signal is demodulated
in a phase-lock detector and fed from IF IC pin 28 to the audio processing circuit ASFIC U0201
located in the controller section (line DET AUDIO).
The squelch circuit of the IF IC is not used. Instead the squelch circuit inside the audio processing
IC ASFIC (U0201) determines the squelch performance and sets the squelch threshold. The
detector output signal from IF IC (U5201) pin 28 (DET AUDIO) is fed to the ASFIC pin H7.
At IF IC pin 11 an RSSI signal is available with a dynamic range of 70 dB. The RSSI signal is used
by the ASFIC (U0201 pin G8) and after buffering by op-amp U0202-3 available at accessory
connector J0400-15.
9.0Transmitter Power Amplifier (PA) 5-25W
The radio’s 5-25 W PA is a four stage amplifier used to amplify the output from the exciter to the
radio transmit lev el. It consists of four stages in the line-up. The first (Q8510) is a bipolar stage that is
controlled via the PA control line. It is followed by another bipolar stage (Q8520), a MOS FET stage
(Q8530, Q8531) and a final bipolar stage (Q8540).
Devices Q8510, Q8520,Q8530 and Q8531 are surface mounted. Bipolar Transistor Q8540 is directly
attached to the heat sink.
9.1Power Controlled Stage
The first stage (Q8510) amplifies the RF signal from the VCO (line EXCITER PA) and controls the
output power of the PA. The output power of the transistor Q8510 is proportional to its collector
current which is adjusted by a voltage controlled current source consisting of Q8612 and Q8621.
The whole stage operates off the K9V1 source which is 9.1V in transmit mode and nearly 0V in
receive mode.
The collector current of Q8510 causes a voltage drop across the resistors R8623 and R8624.
Transistor Q8612 adjusts the voltage drop across R8621 through PA control line (PWR CNTL). The
current source Q8621 adjusts the collector current of Q8510 by modifying its base voltage until the
voltage drop across R8623 and R8624 plus VBE (0.6V) equals the voltage drop across R8621 plus
VBE (0.6V) of Q8611. If the v oltage of PWR CNTL is r aised, the base v oltage of Q8612 will also rise
causing more current to flow to the collector of Q8612 and a higher voltage drop across R8621. This
in turn results in more current driven into the base of Q8510 by Q8621 so that the current of Q8510
is increased. The collector current settles when the voltage over the series configuration of R8623
and R8624 plus VBE of Q8621 equals the voltage over R8621 plus VBE (0.6V) of Q8611. By
controlling the output power of Q8510 and in turn the input power of the following stages the ALC
loop is able to regulate the output power of the transmitter. Q8611 is used for temperature
compensation of the PA output power.
www.myradio168.net
4-18Theory of Operation
Page 57
9.2PA Stages
The bipolar transistor Q8520 is driven by Q8510. To reduce the collector-emitter voltage and in turn
the power dissipation of Q8510 its collector current is drawn from the antenna switch circuit.
In transmit mode the base of Q8520 is slightly positive biased by a divided K9V1 signal. This bias
along with the rf signal from Q8510 allows a collector current to be drawn from the antenna switch
circuit and in turn switches the antenna switch to transmit, while in receive mode the low K9V1
signal with no rf signal present cuts off the collector current and in turn switches the antenna switch
to receive.
The following stage uses two enhancement mode N-Channel MOS FET devices (Q8530, Q8531)
and requires for each device a positive gate bias and a quiescent current flow for proper operation.
The voltages of the lines BIAS VLTG and BIAS VLTG 2 are set in transmit mode by two Digital to
Analog (D/A) converters (U0731-4, U0731-11) and fed to the gates of Q8531 and Q8530 via two
resistive dividers. The bias voltages are tuned in the factory. If one or both transistor are replaced,
the bias voltages must be tuned with the Dealer Programming Softw are (DPS). Care must be taken,
not to damage any device by exceeding the maximum allowed bias voltage. The collector currents
are drawn from the supply voltage A+ via L8531 and L8532.
Transmitter Power Amplifier (PA) 5-25W
The final stage uses the bipolar device Q8540 and operates off the A+ supply voltage. For class C
operation the base is DC grounded by two series inductors (L8533, L8534). A matching network
consisting of C8541-C8544 and two striplines transform the impedance to 50 Ohms and feed the
directional coupler.
9.3Directional Coupler
The directional coupler is a microstrip printed circuit which couples a small amount of the forward
power off the rf power from Q8541. The coupled signal is rectified to an output power proportional
negative DC voltage by the diode D8553 and sent to the power control circuit in the controller
section via the line PWR DETECT for output power control. The power control circuit holds this
voltage constant, thus ensuring the forward power out of the radio to be held to a constant value.
9.4Antenna Switch
The antenna switch is switched synchronously with the K9V1 voltage and feeds either the antenna
signal coming through the harmonic filter to the receiver or the transmitter signal coming from the PA
to the antenna via the harmonic filter.
In transmit mode, this K9V1 voltage is high and biases Q8520 and, along with the rf signal from
Q8510, allows a collector current to be drawn. The collector current of Q8520 drawn from A+ flows
via L8542, L8541, directional coupler, D8551, L8551, D8631, L8631, R8616, R8617 and L8611 and
switches the PIN diodes D8551 and D8631 to the low impedance state. D8551 leads the rf signal
from the directional coupler to the harmonic filter. The low impedance of D8631 is transformed to a
high impedance at the input of the harmonic filter by the resonant circuit formed by L8551, C8633
and the input capacitance of the harmonic filter.
www.myradio168.net
In receive mode the low K9V1 and no rf signal present from Q8510 turn off the collector current of
Q8520. With no current drawn by Q8520 and resistor R8615 pulling the voltage at PIN diode D8631
to A+ both PIN diodes are switched to the high impedance state. The antenna signal, coming
through the harmonic filter, is channelled to the receiver via L8551, C8634 and line PA RX.
Theory of Operation4-19
Page 58
Transmitter Power Amplifier (PA) 5-25W
A high impedance resonant circuit formed by D8551 in off state and L8554, C8559 prevents an
influence of the receive signal by the PA stages. The high impedance of D8631 in off state doesn´t
influence the receiver signal.
9.5Harmonic Filter
The transmitter signal from the antenna switch is channelled through the harmonic filter to the
antenna connector J8501.The harmonic filter is formed by inductors L8552, L8553, and capacitors
C8551 through C8554. This network forms a low-pass filter to attenuate harmonic energy of the
transmitter to specifications level. R8550 is used for electro-static protection.
9.6Power Control
The power control loop regulates transmitter power with an automatic level control (ALC) loop and
provides protection features against excessive control voltage and high operating temperatures.
MOS FET device bias, power and control voltage limit are adjusted under microprocessor control
using a Digital to Analog (D/A) converter (U0731). The microprocessor writes the data into the D/A
converter via serial interface (SRL) composed of the lines SPI CLCK SRC (clock), SPI DATA SRC
(data) and DA C CE (chip enable). The D/A adjustable control voltage limit increases transmitter rise
time and reduces adjacent channel splatter as it is adjusted closer to the actual operating control
voltage.
The microprocessor controls K9V1 ENABLE (U0101-3) to switch on the first and the second PA
stage via transistors Q0741, Q0742 and signal K9V1. The antenna switch is turned on by the
collector current of the second PA stage. In TX mode the front-end control D/A (U0731-11) is used
for BIAS VOLTAGE 2 (via R0736) and K9V1 ENABLE pulls signal FE CNTL VLTG to ground via
Q0743. PA DISABLE, also microprocessor controlled (U0101-26), sets BIAS VLTG (U0731-4) and
VLTG LIMIT SET (U0731-13) via D0731 and BIAS VLTG 2 via D0733 in receive mode to low to
switch off the biases of the MOS FET devices Q8530, Q8531 and to switch off the power control
voltage (PWR CNTL).
Through an Analog to Digital (A/D) input (VLTG LIMIT) the microprocessor can read the PA control
voltage (PWR CNTL) during the tuning process.The ALC loop regulates power by adjusting the PA
control line PWR CNTL to keep the forward power voltage PWR DETECT at a constant level.
Opamp U0701-2 and resistors R0701 to R0703 and R0731 subtract the negative PWR DETECT
voltage from the PA PWR SET D/A output U0731 pin 2. The result is connected to opamp inverting
input U0701-4 pin 9 which is compared with a 4.6 volt reference VAG present at noninverting input
U0701-4 pin 10 and controls the output power of the PA via pin 8 and control line PWR CNTL. The
4.6 volt reference VAG is set by a resistive divider circuit (R0251, R0252) which is connected to
ground and 9.3 volts, and buffered by opamp U0251-1.
www.myradio168.net
During normal transmitter operation the voltages at the opamp inputs U0701-4 pins 9 and 10 should
be equal to 4.6 volts and the PA control voltage output at pin 8 should be between 4 and 7 volts. If
power falls below the desired setting, PWR DETECT becomes less negative, causing the output at
U0701-2 pin 7 to decrease and the opamp output U0701-4 pin 8 to increase.
A comparator formed by U0701-4 increases the PA control voltage PA CNTL until PWR DETECT is
at the desired level. The power set D/A output voltage PA PWR SET (U0731-2) at U0701-2 pin 5
adjusts power in steps by adjusting the required value of PWR DETECT. As PA PWR SET (U0731-
2) decreases, transmitter power must increase to make PWR DETECT more negative and keep the
inverting input U0701-4 pin 9 at 4.6 volts.
4-20Theory of Operation
Page 59
Frequency Synthesis
Loop frequency response is controlled by opamp feedbac k components R0712 and C0711. Opamp
U0701-3 compares the power control voltage PWR CNTL divided b y resistors R0717 to R0719 with
the voltage limit setting VLTG LIMIT SET from the D/A converter (U0731-13) and keeps the control
voltage constant via Q0711 if the control voltage, reduced b y the resistiv e divider (R0717 to R0719),
approaches the voltage of VLTG LIMIT SET (U0731-13).
Rise and fall time of the output power during transmitter keying and dekeying is controlled by the
comparator formed by opamp U0701-3.
During normal transmitter operation the voltage at U701-3 pin 13 is higher than the voltage at pin 12
causing the output at pin 14 being low and switching off transistor Q0711. Diode D0732 reduces the
bias voltages BIAS VLTG, BIAS VLTG 2 for low control voltage levels.
The temperature of the PA area is monitored by opamp U0701-1 using thermistor R8641 (located in
the PA section). If the temperature increases , the resistance of the thermistor decreases, decreasing
the voltage PA TEMP. The in v erting amplifier formed by U0701-1 amplifies the PA TEMP v oltage and
if the voltage at opamp pin 1 approaches 4.6 V plus the voltage (ON) across D0721, U701-1
simulates an increased power which in turn decreases the power control voltage until the voltage at
U0701-4 pin 9 is 4.6V again. During normal transmitter operation the output voltage of opamp U7011 pin 1 is below 4.6V. Diode D8601 located in the PA section acts as protection against transients
and wrong polarity of the supply voltage.
10.0Frequency Synthesis
The complete synthesizer subsystem consists of the Reference Oscillator (U8702), the Fractional-N
synthesizer (U8701), the Voltage Controlled Oscillator (Q8802), the RX and TX buffer stages
(Q8831, Q8851, Q8852, Q8881) and the feedback amplifier (Q8841).
10.1Reference Oscillator
The Reference Oscillator (Y8702) contains a temperature compensated crystal oscillator with a
frequency of 16.8 MHz. An analog to digital (A/D) converter internal to U8701 (FRAC-N) and
controlled by the microprocessor via serial interface (SRL) sets the voltage at the warp output of
U8701 pin 16 to set the frequency of the oscillator. The output of the oscillator (pin 2 of Y8702) is
applied to pin 14 (XTAL1) of U8701 via a RC series combination.
10.2Fractional-N Synthesizer (U8701)
The FRAC-N synthesizer IC (U8701) consists of a pre-scaler, a programmable loop divider, control
divider logic, a phase detector, a charge pump, an A/D converter for low frequency digital
modulation, a balance attenuator to balance the high frequency analog modulation and low
frequency digital modulation, a 13V positive voltage multiplier, a serial interface for control, and
finally a super filter for the regulated 9.3 volts.
A voltage of 9.3V applied to the super filter input (U8701 pin 22) supplies an output voltage of 8.6
VDC at pin 18. It supplies the VCO (Q8802), VCO modulation bias circuit (via R8714) and the
synthesizer charge pump resistor network (R8723, R8724, R8726). The synthesizer supply voltage
is provided by the 5V regulator U8891.
www.myradio168.net
Theory of Operation4-21
Page 60
Frequency Synthesis
In order to generate a high voltage to supply the phase detector (charge pump) output stage at pin
VCP (U8701-32), a voltage of 13 VDC is being generated by the positive voltage multiplier circuitry
(D8701-1-3, C8716, C8717). This voltage multiplier is basically a diode capacitor network driven by
two (1.05MHz) 180 degrees out of phase signals (U8701-9 and -10).
Output LOCK (U8701-2) provides information about the lock status of the synthesizer loop. A high
level at this output indicates a stab le loop . IC U8701 divides the 16.8 MHz reference frequency down
to 2.1 MHz and provides it at pin 11. This signal is used as clock signal by the controller.
The serial interface (SRL) is connected to the microprocessor via the data line SPI DATA (U8701-5),
clock line SPI CLK (U8701-6), and chip enable line FRACN CE (U8701-7).
10.3Voltage Controlled Oscillator (VCO)
The Voltage Controlled Oscillator (VCO) is formed by the colpitts oscillator FET Q8802. Q8802
draws a drain current of 10 mA from the FRAC-N IC super filter output. The oscillator frequency is
half of the desired frequency and mainly determined by L8804, C8809, C8810, C8812 - C8815 and
varactor diodes D8802 / D8803. Diode D8804 controls the amplitude of the oscillator.
A balanced frequency doubler T8821, D8821 converts the oscillator fundamental to the desired
frequency. With a steering voltage from 2.5V to 10.5V at the varactor diodes the full RX and TX
frequency range from 254.9 MHz to 350 MHz is covered.
The doubler output is buff ered b y Common VCO Buffer Q8831 which draws a collector current of 15
mA from the stabilized 5V (U8891). A bandpass filter composed of L8831, C8832 - C8836, 15 nH
micro-stripline rejects unwanted harmonics at the first and third oscillator fundamental frequency
and matches the output to the following buffer stages. Buffer Q8831 drives the Pre-scaler Buffer
Q8841, the PA Buffers Q8851, Q8852 (Pout = 13dBm) and Mixer Buffer Q8881 (Pout = 10dBm).
Q8841 draws a collector current of 14 mA from the stabilized 5V, Q8851 dra ws 15mA, Q8852 dra ws
20 mA and Q8881 draws 18 mA form the FLT 9V3 source. The buff er stages Q8851, Q8881 and the
feedback amplifier Q8841 provide the necessary gain and isolation for the synthesizer loop.
Q8801 is controlled by output AUX3 of U8701 (pin 1) and enables the RX or TX buffer. In RX mode
AUX3 is nearly at ground level, in TX mode about 5V DC. In TX mode, with R8802 pulled to ground
level by Q8801, the modulation signal coming from the FRAC-N synthesizer IC (U8701 pin28)
modulates the VCO via v aractor diode D8801 while in RX mode the modulation circuit is disab led b y
pulling R8802 to a higher level through R8882.
10.4Synthesizer Operation
www.myradio168.net
The complete synthesizer subsystem works as follows. The output signal of the VCO (Q8802) is
frequency doubled by doubler D8821 and, buffered by Common VCO Buffer Q8831. To close the
synthesizer loop, the collector of Q8841 is connected to the PREIN port of synthesizer U8701 (pin
20). The buffer output (Q8831) also provides signals for the Mixer Buffer Q8881 and the PA Buffers
(Q8851, Q8852).
The pre-scaler in the synthesizer (U8701) is basically a dual modulus pre-scaler with selectable
divider ratios. This divider ratio of the pre-scaler is controlled by the loop divider, which in turn
receives its inputs via the SRL. The output of the pre-scaler is applied to the loop divider. The output
of the loop divider is connected to the phase detector, which compares the loop divider´s output
signal with the reference signal.The reference signal is gener ated by dividing down the signal of the
reference oscillator (Y8702).
4-22Theory of Operation
Page 61
Frequency Synthesis
The output signal of the phase detector is a pulsed DC signal which is routed to the charge pump.
The charge pump outputs a current at pin 29 (I OUT of U8701). The loop filter (which consists of
R8715-R8717, C8723-C8725, C8727) transforms this current into a voltage that is applied to the
varactor diodes D8802, D8803 and alters the output frequency of the VCO . The current can be set to
a value fixed in the FRAC-N IC or to a value determined by the currents flowing into CPBIAS 1
(U8701-27) or CPBIAS 2 (U8701-26). The currents are set by the value of R8724 or R8726
respectively. The selection of the three different bias sources is done by software programming.
To reduce synthesizer lock time when new frequency data has been loaded into the synthesizer the
magnitude of the loop current is increased by enabling the IADAPT line (U8701-31) for a certain
software programmable time (Adapt Mode). The adapt mode timer is started by a low to high
transient of the FRACN CE line. When the synthesizer is within the lock range the current is
determined only by the resistors connected to CPBIAS 1, CPBIAS 2, or the internal current source.
A settled synthesizer loop is indicated by a high level of signal LOCK DET (U8701-2). Open
architecture only: LOCK DET adds up with signal SQ DET, weighted by resistors R0113, R0114,
and is routed to one of the uP´s ADCs input U0101-43. From the voltage weighted by the resistors
the uP determines whether SQ DET, LOCK DET or both are active.
In order to modulate the PLL the two spot modulation method is utilized. Via pin 8 (MODIN) on
U8701 the audio signal is applied to both the A/D converter (low freq path) as well as the balance
attenuator (high freq path). The A/D converter converts the low frequency analog modulating signal
into a digital code that is applied to the loop divider, thereby causing the carrier to deviate. The
balance attenuator is used to adjust the VCO’s deviation sensitivity to high frequency modulating
signals. The output of the balance attenuator is present at the MODOUT port (U8701-28) and
connected to the VCO modulation diode D8801.
www.myradio168.net
Theory of Operation4-23
Page 62
Frequency Synthesis
www.myradio168.net
4-24Theory of Operation
Page 63
Table of Contents
Chapter 5
PCB/Schematic Diagrams and Parts Lists
Table of Contents
DescriptionPage
336-390MHz Diagrams and Parts Lists
336-390MHz Main Board Component Side...................................................................1
C84072113740F63330pF 5%
D83014862824C01DIODE V ARACT OR
D83024862824C01DIODE V ARACT OR
D83034880154K03DUAL SCHOTTKY SOT23
D83044862824C01DIODE V ARACT OR
D83054862824C01DIODE V ARACT OR
D83114813833C02DIODE DUAL SOT
D84014880174R01DIODE QUAD SOIC 8 PIN
L83022462587T23COIL CHIP 470nH
L84012462587T23COIL CHIP 470nH
L84022462587T17COIL CHIP 150nH
L84032462587N46IND Chip 27.0 N 5%
L84042462587N43IND Chip 15.0 N 5%
Q83014813827A07TSTR NPN SML SIG
The Hand Held Control Head contains the microphone, 3 top buttons and 1 side button (PTT b utton)
and 22 keypad buttons to operate the radio, several indicator Light Emitting Diodes (LED) and 7
icons of LCD Display to inform the user about the radio status and 10 character (5x7dot matrix)
Liquid Crystal Display (LCD) for radio information e.g. channel number, unit or group address.
2.2Power Supplies
The power supply to the HHCH is taken from the host radio’s FLT A+ voltage via connector J0901
pin 8. This voltage is at battery level and is used for the voltage regulator (U0971), the indicator
LEDs, the back light and to power up the radio via the On/Off button. The voltage regulator (U0971)
provides the stabilized 5 volt source for the LCD driver, the shift register, inverter and the keypad
buttons. The regulated output of U0971 is enabled by a lo w state and disabled by a high state at pin
3 (SHUTDOWN) to switch the HHCH circuits on and off. Input and output capacitors (C0972, C0975
and C0976) are used to reduce high frequency noise and provide proper operation during battery
transients.
www.myradio168.net
Introduction/Theory of OperationB.1-1
Page 94
Theory of Operation
2.3Power On / Off
The On/Off button when pressed switches the radio’s voltage regulators on by pulling ON OFF
CONTROL to high via D0971 and connects the base of Q0971 to FLT A+. This transistor pulls the
line ANALOG 3 to low to inform the µP that the On/Off button is pressed. If the radio is switched off,
the µP will switch it on and vice versa. If the On/Off button is pressed and held while the radio is on,
the software detects a low state on line ANALOG 3 and switches the radio off.
While the radio is switched on, the radio’s controller enables the regulated output pin 1 of U0971 by
setting line LED CE to high and in turn pulling input U0971-3 to ground by transistor Q0972. Line
LED CE is also used to write data into the shiftregister U0983. After the serial write process line LED
CE is set to low for a few microseconds to update the output of the shiftregister with the new data.
The low - pass filtering provided by C0973 and R0974 filters out these small low periods and
prevents disabling of the voltage regulator output.
2.4PTT Button
The PTT function is achieved by pressing button S0901 which places a low on the PTT line to the
radio, causing the radio to transmit.
2.5ON/OFF Hook Control
When the HHCH is off-hook the monitor input (line HOOK; J0901_7) to the radio is open circuit.
When the HHCH is placed on-hook the hang up clip shorts the TP0901 and TP0902 terminals which
takes the monitor input to ground, indicating to the radio that the microphone is on-hook. Diode
VR0922 and C0922, C0923 provide Electro Static Discharge (ESD) and Radio Frequency
Interference (RFI) protection.
www.myradio168.net
B.1-2Introduction/Theory of Operation
Page 95
2.6Keypad and Top Keys
The HHCH keypad has 22 keys, plus 3 additional top keys, the on/off key being one of them, which
are located on the top of the HHCH.
All keys of the keypad are configured as 2 analogue lines (ANALOG_1 & ANALOG_2) to the radio.
The microprocessor in the mobile radio will compare the voltage when any one of the k e ypad row or
keypad column keys is being pressed. The microprocessor will then sample the Analog to Digital
voltages at the keypad row and keypad column and map it with the table (shown as below) so that
the key being pressed can be identified. Once the key has been identified, the message that
corresponds to the key will show up at the display.
Theory of Operation
ANALOG_2 /V
ANALOG_1 /V
(R1)
0
(R2)
1.21
(R3)
2.31
(R4)
3.29
(R5)
4.18
Normally, the ANALOG_1 and ANALOG_2 is 5V (without pressing any key)
The three top keys are configured to ANALOG_3 to the radio. The voltage on the analogue lines
depends on which key is pressed. (0V for ON/OFF Button, 1.31V for EMG Button and 2.55V for CLR
Button).
The voltages of these lines (ANALOG _1, 2 & 3) are A/D conv erted inside the microprocessor on the
mobile radio and are used to specify the pressed button.
(C1)
0
S21
(<OPT)
S31
(1)
S41
(4)
S51
(7)
(C2)
1.21
S22
(S)
S32
(2)
S42
(5)
S52
(*)
(C3)
2.31
S13
(EDIT)
S23
(Phone)
S33
(3)
S43
(6)
S53
(0)
(C4)
3.29
S14
(Alarm)
S24
(Vol ^)
S34
(Vol ∨ )
S44
(8)
S54
(#)
(C5)
4.18
S15
(RD)
S25
(Mode ^)
S35
(Mode ∨ )
S45
(9)
2.7Status LED and Back Light Circuit
All the indicator LEDs (2) and the back light LEDs (18) are driven by current sources Q0982 –
Q0985 and controlled by the microprocessor in mobile radio via SERIAL PERIPHERAL INTERF A CE
(SPI). Shift Register U0983 stores the LED status. To update the LED status line LED CLCK BUF
shifts the data of line SPI DATA BUF into the Shift Register. When all the data has been written, line
LED CD is set to low for a few microseconds to update the output of the Shift Register with the new
data.
Introduction/Theory of OperationB.1-3
www.myradio168.net
Page 96
Theory of Operation
2.8Liquid Crystal Display (LCD)
The LCD display is a 10 character 5 X 7 dot matrix display which incorporates 7 icons. Data is
loaded serially into the display driver U0951 via the SPI interface . The display data of line SPI DATA
BUF is shifted by clock signal LCD CLCK BUF. When the last bit has been receiv ed, the LCD displa y
is updated.
2.9Microphone Amplifier
The microphone cartridge contains a capacitive transducer coupled to a FET amplifier. The
microphone’s audio signal is fed from the microphone inputs, MIC+ and MIC-, at J0903 to the
microphone amplifier. The microphone amplifier sets the frequency response and amplifies the
audio signal to the required radio input level (about 80mV at nominal sound pressure level). The first
stage (Q0902 connected to the microphone is an active high-pass filter which suppresses frequency
components below 300 Hz to prev ent PL falsing in a receiving radio. The collector current of Q0902,
drawn from the collector of the following stage Q0901, is approximately 0.27 mA. A low pass filter
composed of R0904 and C0907, C0908 filters out any audio frequency components riding on this
voltage. The output of the first stage is fed via R0906 to the second stage (Q0901) which amplifies
the audio signal to the radio’s input level. The supply voltage of the stage is provided by the radio’s
9V3 voltage regulator via the load resistor (1k ohm) located on the radio’s controller section, line
MIC and connector J0901 pin 12. Q0901 dr a ws a collector current of 2 mA. The collector AC current
of Q0901 causes a voltage drop across the load resistor representing the audio signal from the
microphone.
2.10Connections to the Radio
Interconnections between the HHCH and the host radio are via an expanding cable which is
permanently connected to the HHCH. The cable has an 18 pin Molex connector which connects to
connector P0951 in the blank head of the host radio. P0951 is mounted on an adapter PCB. After
additional filtering the signals are fed to the host radio’ s main PCB via connector J0950, also located
on the adapter PCB, a flexible ribbon cable and connector J0101. The connections between the
PCB in the HHCM and the main PCB in the radio are shown in the following table:
www.myradio168.net
B.1-4Introduction/Theory of Operation
Page 97
Theory of Operation
RadioAdapter PCBCableHHCHDescription
J0101J0950P0951ConnectorJ0901
118181-INT SPKR+ (NU)
217172-INT SPKR- (NU)
13616314ANALOG 3
41515413PTT
1099103ANALOG 1
1188115ANALOG 2
1724158FLT A+
1811182ON OFF CONTROL
81114511LCD CLCK BUF
61313610SPI DATA BUF
5143161LED CLCK BUF
71212715GND
16310912MIC
3166137HOOK
1277129LED CE
2.11Electrostatic T ransient Protection
Electrostatic transient protection is provided for the sensitive components in the HHCM by diodes
VR0901, VR0921, VR0922, VR0924 - VR0929. The diodes limit any transient voltages to tolerable
levels. The associated capacitors provide Radio Frequency Interference (RFI) protection.