Datasheet MC74VHCT541AMEL, MC74VHCT541AML1, MC74VHCT541AML2, MC74VHCT541ADTR2, MC74VHCT541ADW Datasheet (MOTOROLA)
...
SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
6/97
The MC74VHCT541A is an advanced high speed CMOS octal bus buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The MC74VHCT541A is a noninverting, 3–state, buffer/line driver/line
receiver. When either OE1
or OE2 is high, the terminal outputs are in the
high impedance state.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V , because it has full 5V CMOS
level output swings.
The VHCT541A input and output (when disabled) structures provide
protection when voltages between 0V and 5.5V are applied, regardless of
the supply voltage. These input and output structures help prevent device
destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
• High Speed: tPD = 5.4ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Designed for 4.5V to 5.5V Operating Range
• Low Noise: V
OLP
= 1.6V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 134 FETs or 33.5 Equivalent Gates
18
Y1
2
A1
17
Y2
3
A2
16
Y3
4
A3
15
Y4
5
A4
14
Y5
6
A5
13
Y6
7
A6
12
Y7
8
A7
11
Y8
9
A8
OE1
OE2
1
19
OUTPUT
ENABLES
DATA
INPUTS
NONINVERTING
OUTPUTS
LOGIC DIAGRAM
PIN ASSIGNMENT
A5
A3
A2
A1
OE1
GND
A8
A7
A6
A4 5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Y3
Y2
Y1
OE2
V
CC
Y8
Y7
Y6
Y5
Y4
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
ORDERING INFORMATION
MC74VHCTXXXADW
MC74VHCTXXXADT
MC74VHCTXXXAM
SOIC
TSSOP
SOIC EIAJ
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
L
L
H
X
L
L
X
H
L
H
X
X
FUNCTION TABLE
Inputs
Output Y
OE1 OE2 A
L
H
Z
Z
MC74VHCT541A
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage
– 0.5 to + 7.0
V
V
in
DC Input Voltage
– 0.5 to + 7.0
V
Î
Î
V
out
ОООООООООООО
Î
DC Output Voltage Outputs in 3–State
High or Low State
ÎÎÎÎ
Î
– 0.5 to + 7.0
– 0.5 to VCC + 0.5
Î
Î
V
I
IK
Input Diode Current
– 20
mA
I
OK
Output Diode Current (V
OUT
< GND; V
OUT
> VCC)
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 75
mA
Î
Î
P
D
ОООООООООООО
Î
Power Dissipation in Still Air, SOIC Packages†
TSSOP Package†
ÎÎÎÎ
Î
500
450
Î
Î
mW
Î
Î
T
stg
ОООООООООООО
Î
Storage Temperature
ÎÎÎÎ
Î
– 65 to + 150
Î
Î
_
C
* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability . Functional operation under absolute–maximum–rated conditions is not
implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage
4.5
5.5
V
V
in
DC Input Voltage
0
5.5
V
ÎÎ
Î
V
out
ОООООООООООО
Î
DC Output Voltage Outputs in 3–State
High or Low State
Î
Î
0
0
Î
Î
5.5
V
CC
Î
Î
V
T
A
Operating Temperature
– 40
+ 85
_
C
tr, t
f
Input Rise and Fall Time VCC =5.0V ±0.5V
0
20
ns/V
DC ELECTRICAL CHARACTERISTICS
V
ОООООООО
TA = 25°C
TA = – 40 to 85°C
Symbol
Parameter
Test Conditions
V
CC
V
ÎÎÎ
Min
Typ
ÎÎÎ
Max
Min
Max
Unit
V
IH
Minimum High–Level
Input Voltage
4.5 to
5.5
ÎÎÎ
2.0
ÎÎÎ
2.0
V
ÎÎ
Î
V
IL
ООООО
Î
Maximum Low–Level
Input Voltage
ОООООÎÎÎ
Î
4.5 to
5.5
ÎÎÎ
ÎÎÎÎÎ
Î
ÎÎÎ
ÎÎ
Î
0.8
ÎÎÎÎÎ
Î
0.8
Î
V
V
OH
Minimum High–Level
IOH = – 50µA
4.5
ÎÎÎ
4.4
4.5
ÎÎÎ
4.4
V
Output Voltage
Vin = VIH or V
IL
IOH = – 8mA
4.5
ÎÎÎ
3.94
ÎÎÎ
3.80
ÎÎ
Î
V
OL
ООООО
Î
Maximum Low–Level
ООООО
Î
IOL = 50µA
ÎÎ
Î
4.5
ÎÎÎ
ÎÎÎÎÎ
Î
0.0
ÎÎÎ
ÎÎ
Î
0.1
ÎÎÎÎÎ
Î
0.1
Î
V
ÎÎÎООООО
Î
Output Voltage
Vin = VIH or V
IL
ООООО
Î
IOL = 8mA
ÎÎ
Î
4.5
ÎÎÎ
ÎÎÎÎÎ
Î
ÎÎÎ
ÎÎ
Î
0.36
ÎÎÎÎÎ
Î
0.44
Î
I
in
Maximum Input
Leakage Current
Vin = 5.5 V or GND
0 to 5.5
ÎÎÎ
ÎÎÎ
± 0.1
± 1.0
µA
ÎÎ
Î
I
OZ
ООООО
Î
Maximum 3–State
Leakage Current
ООООО
Î
Vin = VIL or V
IH
V
out
= VCC or GND
ÎÎ
Î
5.5
ÎÎÎ
ÎÎÎÎÎ
Î
ÎÎÎ
ÎÎ
Î
± 0.25
ÎÎÎÎÎ
Î
± 2.5εA
ÎÎ
Î
I
CC
ООООО
Î
Maximum Quiescent
Supply Current
ООООО
Î
Vin = VCC or GND
ÎÎ
Î
5.5
ÎÎÎ
ÎÎÎÎÎ
Î
ÎÎÎ
ÎÎ
Î
4.0
ÎÎÎÎÎ
Î
40.0
Î
µA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
MC74VHCT541A
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
3 MOTOROLA
DC ELECTRICAL CHARACTERISTICS
Unit
TA = – 40 to 85°C
ОООООООО
TA = 25°C
V
CC
V
Test Conditions
Parameter
Symbol
Unit
Max
Min
ÎÎÎ
Max
Typ
ÎÎÎ
Min
V
CC
V
Test Conditions
Parameter
Symbol
ÎÎ
Î
I
CCT
ООООО
Î
Quiescent Supply
Current
ООООО
Î
Per Input: VIN = 3.4V
Other Input: VCC or GND
ÎÎ
Î
5.5
ÎÎÎ
ÎÎÎÎÎ
Î
ÎÎÎ
ÎÎ
Î
1.35
ÎÎÎÎÎ
Î
1.50ÎmA
ÎÎ
Î
I
OPD
ООООО
Î
Output Leakage
Current
ООООО
Î
V
OUT
= 5.5V
ÎÎ
Î
0
ÎÎÎ
ÎÎÎÎÎ
Î
ÎÎÎ
ÎÎ
Î
0.5
ÎÎÎÎÎ
Î
5.0
Î
µA
AC ELECTRICAL CHARACTERISTICS (Input t
r
= tf = 3.0ns)
TA = 25°C
TA = – 40 to 85°C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Min
Max
Unit
ÎÎ
Î
t
PLH
,
t
PHL
ОООООО
Î
Maximum Propagation Delay,
A to Y
ООООООО
Î
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
5.0
5.5
ÎÎ
Î
6.9
7.9
Î
Î
1.0
1.0
ÎÎ
Î
8.0
9.0
ns
ÎÎ
Î
t
PZL
,
t
PZH
ОООООО
Î
Output Enable TIme,
OE
to Y
ООООООО
Î
VCC = 5.0 ± 0.5V CL = 15pF
RL = 1kΩ CL = 50pF
ÎÎÎÎ
Î
8.3
8.8
ÎÎ
Î
11.3
12.3
Î
Î
1.0
1.0
ÎÎ
Î
13.0
14.0
ns
t
PLZ
,
t
PHZ
Output Disable Time,
OE
to Y
VCC = 5.0 ± 0.5V CL = 50pF
RL = 1kΩ
9.4
11.9
1.0
13.5
ns
ÎÎ
Î
t
OSLH
,
t
OSHL
ОООООО
Î
Output to Output Skew
ООООООО
Î
VCC = 5.0 ± 0.5V CL = 50pF
(Note NO TAG)
ÎÎÎÎÎÎÎ
Î
1.0
ÎÎÎÎ
Î
1.0
ns
C
in
Maximum Input Capacitance
4
10
10
pF
ÎÎ
Î
C
out
ОООООО
Î
Maximum Three–State Output
Capacitance (Output in High
Impedance State)
ОООООООÎÎÎÎÎ
Î
9
ÎÎÎÎÎÎÎ
Î
pF
Typical @ 25°C, VCC = 5.0V
C
PD
Power Dissipation Capacitance (Note NO T AG)
19
pF
1. Parameter guaranteed by design. t
OSLH
= |t
PLHm
– t
PLHn
|, t
OSHL
= |t
PHLm
– t
PHLn
|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= CPD VCC fin + ICC/8 (per bit). CPD is used to determine the no–load
dynamic power consumption; PD = CPD V
CC
2
fin + ICC VCC.
NOISE CHARACTERISTICS (Input t
r
= tf = 3.0ns, CL = 50pF, VCC = 5.0V)
TA = 25°C
Symbol Parameter
Typ Max
Unit
V
OLP
Quiet Output Maximum Dynamic V
OL
1.2 1.6 V
V
OLV
Quiet Output Minimum Dynamic V
OL
–1.2 –1.6 V
V
IHD
Minimum High Level Dynamic Input Voltage 2.0 V
V
ILD
Maximum Low Level Dynamic Input Voltage 0.8 V
MC74VHCT541A
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
4
Figure 1. Figure 2.
OE1 or OE2
Y
Y 1.5V
t
PZL
t
PLZ
t
PZHtPHZ
3V
HIGH
IMPEDANCE
VOL +0.3V
VOH –0.3V
HIGH
IMPEDANCE
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3. Test Circuit
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 4. Test Circuit
CONNECT TO VCC WHEN
TESTING t
PLZ
AND t
PZL
.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH
.
1 k
Ω
TEST CIRCUITS
SWITCHING WAVEFORMS
GND
t
PHL
Y
A
t
PLH
1.5V
1.5V
3V
V
OL
V
OH
1.5V
1.5V
GND
MC74VHCT541A
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
5 MOTOROLA
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
–A–
–B–
20
1
11
10
S
A
M
0.010 (0.25) B
S
T
D20X
M
B
M
0.010 (0.25)
P10X
J
F
G
18X
K
C
–T–
SEATING
PLANE
M
R
X 45
_
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC 0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
__
__
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
DIMAMIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B 4.30 4.50 0.169 0.177
C 1.20 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
110
1120
PIN 1
IDENT
A
B
–T–
0.100 (0.004)
C
D
G
H
SECTION N–N
K
K1
JJ1
N
N
M
F
–W–
SEATING
PLANE
–V–
–U–
S
U
M
0.10 (0.004) V
S
T
20X REFK
L
L/2
2X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
––– –––
S
U0.15 (0.006) T
MC74VHCT541A
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
6
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
DIM MIN MAX MIN MAX
INCHES
––– 2.05 ––– 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
12.35 12.80 0.486 0.504
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059
0
0.70 0.90 0.028 0.035
––– 0.81 ––– 0.032
A
1
H
E
Q
1
L
E
_
10
_
0
_
10
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MA TERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
H
E
A
1
L
E
Q
1
_
c
A
Z
D
E
20
110
11
b
M
0.13 (0.005)
e
0.10 (0.004)
VIEW P
DETAIL P
M
L
A
b
c
D
E
e
L
M
Z
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
MC74VHCT541A/D
◊
Mfax is a trademark of Motorola, Inc.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488
Mfax: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
INTERNET: http://motorola.com/sps
Loading...