Datasheet MC74VHC132DT, MC74VHC132D, MC74VHC132DTR2, MC74VHC132M, MC74VHC132MEL Datasheet (MOTOROLA)



SEMICONDUCTOR TECHNICAL DATA

1

REV 0

 Motorola, Inc. 1997

6/97

" "!  !!
 

The MC74VHC132 is an advanced high speed CMOS Schmitt NAND
trigger fabricated with silicon gate CMOS technology . It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.

Pin configuration and function are the same as the MC74VHC00, but the
inputs have hysteresis and, with its Schmitt trigger function, the VHC132 can
be used as a line receiver which will receive slow input signals.

The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.

• High Speed: tPD = 4.9ns (Typ) at VCC = 5V

• Low Power Dissipation: ICC = 2µA (Max) at TA = 25°C

• High Noise Immunity: V

NIH

= V

NIL

= 28% V

CC

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Designed for 2V to 5.5V Operating Range

• Low Noise: V

OLP

= 0.8V (Max)

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300mA

• ESD Performance: HBM > 2000V; Machine Model > 200V

• Chip Complexity: 72 FETs or 18 Equivalent Gates

Pinout: 14–Lead Packages (Top View)

1314 12 11 10 9 8

21 34567

VCCB4 A4 Y4

B3 A3 Y3

A1 B1 Y1 A2 B2 Y2 GND

LOGIC DIAGRAM

Y1

A1

1

3

B1

2

Y2

A2

4

6

B2

5

Y3

A3

9

8

B3

10

Y4

A4

12

11

B4

13



D SUFFIX

14–LEAD SOIC PACKAGE

CASE 751A–03

DT SUFFIX

14–LEAD TSSOP PACKAGE

CASE 948G–01

ORDERING INFORMATION

MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM

SOIC
TSSOP
SOIC EIAJ

M SUFFIX

14–LEAD SOIC EIAJ PACKAGE

CASE 965–01

FUNCTION TABLE

Inputs Output

ABY

LLH
LHH
HLH
HHL

MC74VHC132

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 0

2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

DC Supply Voltage

– 0.5 to + 7.0

V

V

in

DC Input Voltage

– 0.5 to + 7.0

V

V

out

DC Output Voltage

– 0.5 to VCC + 0.5

V

I

IK

Input Diode Current

– 20

mA

I

OK

Output Diode Current

± 20

mA

I

out

DC Output Current, per Pin

± 25

mA

I

CC

DC Supply Current, VCC and GND Pins

± 50

mA

Î

Î

P

D

ОООООООООООО

Î

Power Dissipation in Still Air, SOIC Packages†

TSSOP Package†

ÎÎÎÎ

Î

500
450

Î

Î

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

* Absolute maximum continuous ratings are those values beyond which damage to the device

may occur. Exposure to these conditions or conditions beyond those indicated may adversely

affect device reliability . Functional operation under absolute–maximum–rated conditions is not

implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C

TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

V

CC

DC Supply Voltage

2.0

5.5

V

V

in

DC Input Voltage

0

5.5

V

V

out

DC Output Voltage

0

V

CC

V

T

A

Operating Temperature, All Package Types

– 40

+ 85

_

C

DC ELECTRICAL CHARACTERISTICS

V

TA = 25°C

TA = – 40 to 85°C

Symbol

Parameter

Test Conditions

V

CC

V

Min

Typ

Max

Min

Max

Unit

ÎÎ

Î

ÎÎ

Î

V

T+

ÎÎÎÎ

Î

ÎÎÎÎ

Î

Positive Threshold
Voltage (Figure 3)

ОООООО

Î

ОООООО

Î

Î

Î

Î

Î

3.0

4.5

5.5

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

ÎÎ

2.20

3.15

3.85

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

2.20

3.15

3.85

V

ÎÎ

Î

ÎÎ

Î

V

T–

ÎÎÎÎ

Î

ÎÎÎÎ

Î

Negative Threshold
Voltage (Figure 3)

ОООООО

Î

ОООООО

Î

Î

Î

Î

Î

3.0

4.5

5.5

ÎÎ

Î

ÎÎ

Î

0.9

1.35

1.65

ÎÎ

Î

ÎÎ

Î

ÎÎ

ÎÎ

ÎÎ

Î

ÎÎ

Î

0.90

1.35

1.65

ÎÎ

Î

ÎÎ

Î

V

ÎÎ

Î

V

H

ÎÎÎÎ

Î

Hysteresis Voltage
(Figure 3)

ООООООÎÎ

Î

3.0

4.5

5.5

ÎÎ

Î

0.30

0.40

0.50

ÎÎÎÎÎ

1.20

1.40

1.60

ÎÎ

Î

0.30

0.40

0.50

ÎÎ

Î

1.20

1.40

1.60

V

ÎÎ

Î

ÎÎ

V

OH

ÎÎÎÎ

Î

ÎÎÎÎ

Minimum High–Level
Output Voltage

ОООООО

Î

ОООООО

Vin = VIH or V

IL

IOH = – 50µA

Î

Î

Î

2.0

3.0

4.5

ÎÎ

Î

ÎÎ

1.9

2.9

4.4

ÎÎ

Î

ÎÎ

2.0

3.0

4.5

ÎÎ

ÎÎ

ÎÎ

Î

ÎÎ

1.9

2.9

4.4

ÎÎ

Î

ÎÎ

V

ÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

Î

ÎÎÎÎ

Î

ОООООО

Î

ОООООО

Î

Vin = VIH or V

IL

IOH = – 4mA
IOH = – 8mA

Î

Î

Î

Î

3.0

4.5

ÎÎ

Î

ÎÎ

Î

2.58

3.94

ÎÎ

Î

ÎÎ

Î

ÎÎ

ÎÎ

ÎÎ

Î

ÎÎ

Î

2.48

3.80

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

V

OL

ÎÎÎÎ

Î

Maximum Low–Level
Output Voltage

ОООООО

Î

Vin = VIH or V

IL

IOL = 50µA

Î

Î

2.0

3.0

4.5

ÎÎÎÎÎ

Î

0.0

0.0

0.0

ÎÎ

0.1

0.1

0.1

ÎÎÎÎÎ

Î

0.1

0.1

0.1

V

ÎÎÎÎÎÎÎÎОООООО

Î

Vin = VIH or V

IL

IOL = 4mA
IOL = 8mA

Î

Î

3.0

4.5

ÎÎÎÎÎÎÎÎ

0.36

0.36

ÎÎÎÎÎ

Î

0.44

0.44

This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir­cuit. For proper operation, Vin and
V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.

MC74VHC132

VHC Data – Advanced CMOS Logic
DL203 — Rev 0

3 MOTOROLA

DC ELECTRICAL CHARACTERISTICS

Unit

TA = – 40 to 85°C

TA = 25°C

V

CC

V

Test Conditions

Parameter

Symbol

Unit

Max

Min

Max

Typ

Min

V

CC

V

Test Conditions

Parameter

Symbol

ÎÎ

Î

I

in

ÎÎÎÎ

Î

Maximum Input
Leakage Current

ОООООО

Î

Vin = 5.5V or GND

Î

Î

0 to 5.5

ÎÎÎÎÎÎÎÎ

± 0.1

ÎÎÎÎÎ

Î

± 1.0

µA

ÎÎ

Î

I

CC

ÎÎÎÎ

Î

Maximum Quiescent
Supply Current

ОООООО

Î

Vin = VCC or GND

Î

Î

5.5

ÎÎÎÎÎÎÎÎ

2.0

ÎÎÎÎÎ

Î

20.0

µA

AC ELECTRICAL CHARACTERISTICS (Input t

r

= tf = 3.0ns)

TA = 25°C

TA = – 40 to 85°C

Symbol

Parameter

Test Conditions

Min

Typ

Max

Min

Max

Unit

ÎÎ

Î

t

PLH

,

t

PHL

ОООООО

Î

Maximum Propagation Delay,
A or B to Y

ООООООО

Î

VCC = 3.3 ± 0.3 V CL = 15pF

CL = 50pF

ÎÎÎÎ

Î

7.6

10.1

ÎÎ

Î

11.9

15.4

Î

Î

1.0

1.0

ÎÎ

Î

14.0

17.5

ns

ÎÎÎООООООÎООООООО

Î

VCC = 5.0 ± 0.5 V CL = 15pF

CL = 50pF

ÎÎÎÎ

Î

4.9

6.4

ÎÎ

Î

7.7

9.7

Î

Î

1.0

1.0

ÎÎ

Î

9.0

11.0

C

in

Maximum Input Capacitance

4

10

10

pF

Typical @ 25°C, VCC = 5.0 V

C

PD

Power Dissipation Capacitance (Note NO T AG)

16

pF

1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I

CC(OPR

)

= CPD  VCC  fin + ICC/4 (per gate). CPD is used to determine the no–load

dynamic power consumption; PD = CPD  V

CC

2

 fin + ICC  VCC.

NOISE CHARACTERISTICS (Input t

r

= tf = 3.0ns, CL = 50pF, VCC = 5.0 V)

TA = 25°C

Symbol Characteristic

Typ Max

Unit

V

OLP

Quiet Output Maximum Dynamic V

OL

0.3 0.8 V

V

OLV

Quiet Output Minimum Dynamic V

OL

– 0.3 – 0.8 V

V

IHD

Minimum High Level Dynamic Input Voltage 3.5 V

V

ILD

Maximum Low Level Dynamic Input Voltage 1.5 V

MC74VHC132

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 0

4

Figure 1. Switching Waveforms

V

CC

GND

50%

50% V

CC

A

Y

t

PHL

t

PLH

*Includes all probe and jig capacitance

Figure 2. Test Circuit

CL*

TEST POINT

DEVICE
UNDER

TEST

OUTPUT

V

H

V

in

V

out

V

CC

V

T+

V

T–

GND

V

OH

V

OL

V

H

V

in

V

out

V

CC

V

T+

V

T–

GND

V

OH

V

OL

(a) A Schmitt–Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt–Trigger Offers Maximum Noise Immunity

VHtyp

Figure 3. Typical Input Threshold, VT+, VT– versus Power Supply Voltage

VCC, POWER SUPPLY VOLTAGE (VOLTS)

23456

1

2

3

4

V

T

, TYPICAL INPUT THRESHOLD VOLTAGE (VOL TS)

VHtyp = (VT+ typ) – (VT– typ)

(VT+)

(VT–)

Figure 4. Typical Schmitt–Trigger Applications

Figure 5. Input Equivalent Circuit

INPUT

MC74VHC132

VHC Data – Advanced CMOS Logic
DL203 — Rev 0

5 MOTOROLA

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

MIN MINMAX MAX

MILLIMETERS INCHES

DIM

A
B
C
D
F
G
J
K
M
P
R

8.55

3.80

1.35

0.35

0.40

0.19

0.10
0

°

5.80

0.25

8.75

4.00

1.75

0.49

1.25

0.25

0.25
7

°

6.20

0.50

0.337

0.150

0.054

0.014

0.016

0.008

0.004
0

°

0.228

0.010

0.344

0.157

0.068

0.019

0.049

0.009

0.009
7

°

0.244

0.019

1.27 BSC 0.050 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

–A–

–B–

P 7 PL

G

C

K

SEATING
PLANE

D 14 PL

M

J

R

X 45°

1

7

814

0.25 (0.010) T B A

M

S S

B0.25 (0.010)

M M

F

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948G–01

ISSUE O

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC
M 0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.

____

S

U0.15 (0.006) T

2X L/2

S

U

M

0.10 (0.004) V

S

T

L

–U–

SEATING
PLANE

0.10 (0.004)

–T–

SECTION N–N

DETAIL E

J

J1

K

K1

DETAIL E

F

M

–W–

0.25 (0.010)

8

14

7

1

PIN 1
IDENT.

H

G

A

D

C

B

S

U0.15 (0.006) T

–V–

14X REFK

N

N

MC74VHC132

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 0

6

OUTLINE DIMENSIONS

M SUFFIX

PLASTIC SOIC EIAJ PACKAGE

CASE 965–01

ISSUE O

H

E

A

1

DIM MIN MAX MIN MAX

INCHES

––– 2.05 ––– 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.18 0.27 0.007 0.011

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059
0

0.70 0.90 0.028 0.035

––– 1.42 ––– 0.056

A

1

H

E

Q

1

L

E

_

10

_

0

_

10

_

L

E

Q

1

_

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MA TERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).

0.13 (0.005)

M

0.10 (0.004)

D

Z

E

1

14 8

7

e

A

b

VIEW P

c

L
DETAIL P

M

A

b
c
D
E
e

0.50

M

Z

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.

MC74VHC132/D

◊

Mfax is a trademark of Motorola, Inc.

How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,

P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488
Mfax: [e-mail] – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,

– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

INTERNET: http://motorola.com/sps