The MC74LVX00 is an advanced high speed CMOS 2–input NAND
gate. The inputs tolerate voltages up to 7V, allowing the interface of 5V
systems to 3V systems.
• High Speed: t
• Low Power Dissipation: I
= 4.1ns (Typ) at VCC = 3.3V
PD
= 2µA (Max) at TA = 25°C
CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: V
= 0.5V (Max)
OLP
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
VCCA2B2O2
131412111098
2134567
A0B0O0A1B1O1GND
Figure 1. 14–Lead Pinout (Top View)
1
A0
2
B0
4
A1
5
B1
13
A2
12
B2
10
A3
9
B3
Figure 2. Logic Diagram
A3B3O3
3
6
11
8
O0
O1
O2
O3
LVX
LOW–VOLTAGE CMOS
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
14–LEAD TSSOP PACKAGE
14–LEAD SOIC EIAJ PACKAGE
PIN NAMES
Pins
An, Bn
On
FUNCTION TABLE
InputsOutputs
AnBn
L
L
H
H
DT SUFFIX
CASE 948G–01
M SUFFIX
CASE 965–01
Function
Data Inputs
Outputs
L
H
L
H
On
H
H
H
L
6/97
Motorola, Inc. 1997
1
REV 0
MC74LVX00
ОООООО
ОООООО
V
CC
Î
Î
ОООООО
Î
Î
Î
Î
Î
ОООООО
Î
Î
Î
Î
Î
Î
Î
ОООООО
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ОООООО
Î
Î
Î
Î
Î
ОООООО
ОООООО
MAXIMUM RATINGS*
Symbol
V
V
V
I
I
I
I
P
T
CC
in
out
IK
OK
out
CC
D
stg
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation
Storage Temperature
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
V
out
T
A
∆t/∆V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature, All Package Types
Input Rise and Fall Time
Parameter
Parameter
Value
– 0.5 to + 7.0
– 0.5 to + 7.0
– 0.5 to VCC + 0.5
– 20
± 20
± 25
± 50
180
– 65 to + 150
Min
2.0
0
0
– 40
0
Max
3.6
5.5
V
CC
+ 85
100
Unit
V
V
V
mA
mA
mA
mA
mW
_
C
Unit
V
V
V
_
C
ns/V
DC ELECTRICAL CHARACTERISTICS
Symbol
V
IH
ÎÎ
V
IL
ÎÎ
V
OH
ÎÎ
ÎÎ
V
OL
ÎÎ
I
in
I
CC
High–Level Output Voltage
Low–Level Output Voltage
Parameter
High–Level Input Voltage
ОООООО
Low–Level Input Voltage
ОООООО
ОООООО
(Vin = VIH or VIL)
ОООООО
(Vin = VIH or VIL)
ОООООО
Input Leakage Current
Quiescent Supply Current
ОООООÎÎ
ОООООÎÎ
IOH = –50µA
ООООО
IOH = –50µA
IOH = –4mA
ООООО
IOL = 50µA
IOL = 50µA
ООООО
IOL = 4mA
Vin = 5.5V or GND
Vin = VCC or GND
Test Conditions
V
V
2.0
3.0
3.6
2.0
3.0
3.6
2.0
Î
3.0
3.0
Î
2.0
3.0
Î
3.0
3.6
3.6
TA = 25°C
Min
Typ
Max
1.5
2.0
ÎÎ
2.4
ÎÎÎÎÎÎÎ
0.5
ÎÎÎÎÎÎÎ
1.9
ÎÎ
2.9
2.58
ÎÎ
2.0
Î
3.0
Î
0.0
0.0
ÎÎÎÎ
0.8
0.8
ÎÎ
ÎÎ
0.1
0.1
ÎÎ
0.36
± 0.1
2.0
TA = – 40 to 85°C
Min
Max
1.5
2.0
2.4
ÎÎÎÎ
0.5
ÎÎÎÎÎ
0.8
0.8
1.9
ÎÎ
2.9
2.48
ÎÎ
ÎÎ
ÎÎ
0.1
0.1
ÎÎÎÎÎ
0.44
± 1.0
20.0
Unit
V
V
Î
V
Î
Î
V
Î
µA
µA
MOTOROLALCX DATA
2
BR1339 — REV 3
MC74LVX00
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
AC ELECTRICAL CHARACTERISTICS (Input t
Symbol
t
PLH
t
ÎÎ
PHL
ÎÎÎООООООÎООООООО
t
OSHL
ÎÎ
t
OSLH
Propagation Delay , Input to
,
Output
Output–to–Output Skew
(Note 1.)
Parameter
ОООООО
ОООООО
= tf = 3.0ns)
r
Test Conditions
VCC = 2.7VCL = 15pF
ООООООО
CL = 50pF
VCC = 3.3 ± 0.3VCL = 15pF
CL = 50pF
VCC = 2.7VCL = 50pF
ООООООО
VCC = 3.3 ±0.3VCL = 50pF
TA = 25°C
Min
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
Typ
5.4
7.9
4.1
6.6
Max
10.1
13.6
ÎÎ
6.2
9.7
ÎÎ
1.5
1.5
TA = – 40 to 85°C
Min
1.0
1.0
Î
1.0
1.0
Î
ÎÎÎÎ
Max
12.5
16.0
ÎÎ
7.5
11.0
ÎÎ
1.5
1.5
Unit
ns
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t
guaranteed by design.
) or LOW–to–HIGH (t
OSHL
OSLH
); parameter
CAPACITIVE CHARACTERISTICS
TA = 25°C
Symbol
C
in
C
PD
Input Capacitance
Power Dissipation Capacitance (Note 2.)
Parameter
Min
Typ
4
19
Max
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
dynamic power consumption; PD = CPD V
2
fin + ICC VCC.
CC
CC(OPR
= CPD VCC fin + ICC/4 (per gate). CPD is used to determine the no–load
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
OL
OL
Minimum High Level Dynamic Input Voltage2.0V
Maximum Low Level Dynamic Input Voltage0.8V
ILD
V
A or B
50%
CC
GND
t
PLH
O
50% V
CC
t
PHL
Figure 3. Switching Waveforms
TA = 25°C
TypMax
0.30.5V
– 0.3–0.5V
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
CL*
*Includes all probe and jig capacitance
Figure 4. T est Circuit
Unit
LCX DATABR1339 — REV 3
3MOTOROLA
MC74LVX00
1
SEATING
PLANE
–A
–
G
D14 PL
0.25 (0.010)T BA
814
–B–P 7 PL
7
K
M
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
MM
B0.25 (0.010)
X 45°
C
SS
R
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
F
J
MILLIMETERSINCHES
MINMINMAXMAX
DIM
A
B
C
D
F
G
J
K
M
P
R
8.75
8.55
4.00
3.80
1.75
1.35
0.49
0.35
1.25
0.40
1.27 BSC0.050 BSC
0.25
0.19
0.25
0.10
7
0
°
°
5.80
6.20
0.25
0.50
0.337
0.150
0.054
0.014
0.016
0.008
0.004
0
0.228
0.010
0.344
0.157
0.068
0.019
0.049
0.009
0.009
7
°
°
0.244
0.019
148
1
Z
D
e
b
0.13 (0.005)
M
HEE
7
A
A
1
0.10 (0.004)
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 965–01
ISSUE O
L
E
_
M
L
DETAIL P
VIEW P
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
Q
1
c
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
MILLIMETERS
DIMMINMAXMINMAX
A
--- 2.05--- 0.081
A
0.050.20 0.002 0.008
1
b
0.350.50 0.014 0.020
c
0.180.27 0.007 0.011
D
9.90 10.50 0.390 0.413
E
5.105.45 0.201 0.215
e
1.27 BSC0.050 BSC
H
7.408.200.2910.323
E
L
0.500.850.0200.033
L
1.101.500.0430.059
E
M
0
_
Q
0.700.900.0280.035
1
Z
--- 1.42--- 0.056
10
_
INCHES
0
_
10
_
MOTOROLALCX DATA
4
BR1339 — REV 3
0.10 (0.004)
SEATING
–T–
PLANE
MC74LVX00
OUTLINE DIMENSIONS
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
14X REFK
S
U
T
S
N
0.25 (0.010)
U0.15 (0.006) T
S
2X L/2
0.10 (0.004)V
14
M
8
M
L
PIN 1
IDENT.
1
S
U0.15 (0.006) T
A
–V–
B
–U–
N
F
7
DETAIL E
K
K1
J
J1
SECTION N–N
C
D
G
H
DETAIL E
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7 DIMENSION A AND B ARE TO BE DETERMINED
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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