MOTOROLA MC74LVQ373 Technical data



SEMICONDUCTOR TECHNICAL DATA

1

REV 1

 Motorola, Inc. 1995

12/95

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The MC74LVQ373 is a high performance, non–inverting octal
transparent latch operating from a 2.7 to 3.6V supply. The MC74LVQ373
is suitable for TTL level bus oriented applications where a memory
element is required.

The MC74LVQ373 contains 8 D–type latches with 3–state outputs.
When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters
the latches. In this condition, the latches are transparent, i.e., a latch
output will change state each time its D input changes. When LE is LOW,
the latches store the information that was present on the D inputs a setup
time preceding the HIGH–to–LOW transition of LE. The 3–state standard
outputs are controlled by the Output Enable (OE

) input. When OE is

LOW, the standard outputs are enabled. When OE

is HIGH, the standard
outputs are in the high impedance state, but this does not interfere with
new data entering into the latches. Current drive capability is 12mA at the
outputs.

• Designed for 2.7 to 3.6V V

CC

Operation – Ideal for Low Power/Low

Noise Applications

• Guaranteed Simultaneous Switching Noise Level and Dynamic

Threshold Performance

• Guaranteed Skew Specifications

• Guaranteed Incident Wave Switching into 75Ω

• Low Static Supply Current (10µA) Substantially Reduces System Power

Requirements

• Latchup Performance Exceeds 500mA

• ESD Performance: Human Body Model >2000V

Pinout: 20–Lead (Top View)

1920 18 17 16 15 14

21 3 4 5 6 7

V

CC

13

8

12

9

11

10

O7 D7 D6 O6 O5 D5 D4 O4 LE

OE

O0 D0 D1 O1 O2 D2 D3 O3 GND

LVQ

DW SUFFIX

PLASTIC SOIC
CASE 751D–04

DT SUFFIX

PLASTIC TSSOP

CASE 948E–02

20

1

20

1

M SUFFIX

PLASTIC SOIC EIAJ

CASE 967–01

20

1

SD SUFFIX

PLASTIC SSOP

CASE 940C–03

20

1

PIN NAMES

Function

Output Enable Input
Latch Enable Input
Data Inputs
3–State Latch Outputs

Pins

OE
LE
D0–D7
O0–O7



LOW–VOLTAGE

CMOS OCTAL

TRANSPARENT LATCH

查询MC74LVQ373供应商

MC74LVQ373

MOTOROLA LCX DATA

BR1339 — REV 2

2

O0

D0

O1

D1

O2

D2

O3

D3

O4

D4

O5

D5

O6

D6

O7

D7

LOGIC DIAGRAM

nLE

Q

D

nLE

Q

D

nLE

Q

D

nLE

Q

D

nLE

Q

D

nLE

Q

D

nLE

Q

D

nLE

Q

D

LE

OE

3

4

7

8

13

14

17

18

2

5

6

9

12

15

16

19

11

1

INPUTS

INTERNAL

LATCHES

OUTPUTS

OE LE Dn Q On

OPERATING MODE

L
L

H
H

H

L

H

L

H
L

Transparent (Latch Disabled); Read Latch

L
L

↓
↓

h

l

H

L

H
L

Latched (Latch Enabled) Read Latch

L L X NC NC Hold; Read Latch
H L X NC Z Hold; Disabled Outputs
H

H

H
H

H

L

H

L

Z
Z

Transparent (Latch Disabled); Disabled Outputs

H
H

↓
↓

h

l

H

L

Z
Z

Latched (Latch Enabled); Disabled Outputs

H = High Voltage Level; h = High V oltage Level One Setup T ime Prior to the Latch Enable High–to–Low Transition; L = Low V oltage Level; l = Low
Voltage Level One Setup T ime Prior to the Latch Enable High–to–Low T ransition; NC = No Change; X = High or Low V oltage Level or T ransitions
are Acceptable; Z = High Impedance State; ↓ = High–to–Low Transition; For ICC Reasons DO NOT FLOAT Inputs

MC74LVQ373

LCX DATA
BR1339 — REV 2

3 MOTOROLA

ABSOLUTE MAXIMUM RATINGS*

Symbol Parameter Value Condition Unit

V

CC

DC Supply Voltage –0.5 to +7.0 V

V

I

DC Input Voltage –0.5 ≤ VI ≤ VCC + 0.5V V

V

O

DC Output Voltage –0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State V

I

IK

DC Input Diode Current –20 VI = –0.5V mA

+20 VI = VCC + 0.5V mA

I

OK

DC Output Diode Current –20 VO = –0.5V mA

+20 VI = VCC + 0.5V mA

I

O

DC Output Source/Sink Current ±50 mA

I

CC

DC Supply Current ±400 mA

I

GND

DC Ground Current ±400 mA

T

STG

Storage Temperature Range –65 to +150 °C

* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or

conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Typ Max Unit

V

CC

Supply Voltage 2.0 3.3 3.6 V

V

I

Input Voltage 0 V

CC

V

V

O

Output Voltage 0 V

CC

V

T

A

Operating Free–Air Temperature –40 +85 °C

∆V/∆t Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V 0 125 mV/ns

DC ELECTRICAL CHARACTERISTICS

TA = –40°C to +85°C

Symbol Characteristic Condition Min Max Unit

V

IH

HIGH Level Input Voltage (Note 1) 2.7V ≤ VCC ≤ 3.6V,

VO = 0.1V or VCC – 0.1V

2.0 V

V

IL

LOW Level Input Voltage (Note 1) 2.7V ≤ VCC ≤ 3.6V,

VO = 0.1V or VCC – 0.1V

0.8 V

V

OH

HIGH Level Output Voltage 2.7V ≤ VCC ≤ 3.6V; IOH = –50µA VCC– 0.1 V

VCC = 2.7V; IOH = –12mA 2.2
VCC = 3.0V; IOH = –12mA 2.48

V

OL

LOW Level Output Voltage 2.7V ≤ VCC ≤ 3.6V; IOL = 50µA 0.1 V

2.7V ≤ VCC ≤ 3.6V; IOL= 12mA 0.4

I

I

Input Leakage Current 2.7V ≤ VCC ≤3.6V; VI= VCC, GND ±1.0 µA

I

OZ

Maximum 3–State Leakage Current VI(OE) = VIL, VIH; VI, VO= VCC, GND ±2.5 µA

I

OLD

Minimum Dynamic Output Current (Note 2) VCC = 3.6V; V

OLD

= 0.8V Max 36 mA

I

OHD

VCC = 3.6V; V

OHD

= 2.0V Min –25 mA

I

CC

Quiescent Supply Current 2.7V ≤ VCC ≤3.6V; VI = VCC, GND 10 µA

1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH ≥ 2.4V, VIL ≤ 0.5V.

2. Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed. Maximum test
duration is 2ms, one output loaded at a time.

MC74LVQ373

MOTOROLA LCX DATA

BR1339 — REV 2

4

DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V)

TA = +25°C

Symbol Characteristic Condition Min Typ Max Unit

V

OLP

Dynamic LOW Peak Voltage (Note 1) CL = 50pF, VIH = 3.3V, VIL = 0V 0.6 1.0 V

V

OLV

Dynamic LOW Valley Voltage (Note 1) CL = 50pF, VIH = 3.3V, VIL = 0V –0.5 –1.0 V

V

IHD

High Level Dynamic Input Voltage
(Note 2)

Input–Under–Test Switching 0V to Threshold,

f=1MHz

1.5 2.0 V

V

ILD

Low Level Dynamic Input Voltage
(Note 2)

Input–Under–Test Switching 3.3V to Threshold,

f=1MHz

1.5 0.8 V

1. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW. The remaining output is measured in the
LOW state.

2. Number of data inputs is defined as “n” switching, “n–1” inputs switching 0V to 3.3V.

AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω)

Limits

TA = +25°C TA = –40°C to +85°C

VCC = 3.0V to 3.6V VCC = 2.7V VCC = 3.0V to 3.6V VCC = 2.7V

Symbol Parameter Min Typ Max Min Typ Max Min Max Max Unit

t

PLH

t

PHL

Propagation Delay
Dn to On

2.5

2.5

9.0

8.0

11.5

10.5

2.5

2.5

9.6

9.6

14.8

14.8

2.5

2.5

12.0

11.5

16.0

16.0

ns

t

PLH

t

PHL

Propagation Delay
LE to On

2.5

2.5

8.0

8.0

11.5

11.5

2.5

2.5

9.6

9.6

15.0

15.0

2.5

2.5

12.5

12.5

16.0

16.0

ns

t

PZH

t

PZL

Output Enable Time
to High and Low Level

2.5

2.5

7.0

7.0

9.5

9.5

2.5

2.5

8.0

8.0

12.0

12.0

2.5

2.5

10.0

10.0

14.0

14.0

ns

t

PHZ

t

PLZ

Output Disable Time
From High and Low Level

1.0

1.0

8.0

6.0

11.0

8.5

1.0

1.0

9.5

7.5

12.5

10.5

1.0

1.0

11.5

9.0

13.5

11.5

ns

t

OSHL

t

OSLH

Output–to–Output Skew
(Note 1)

1.0

1.0

1.5

1.5

1.0

1.0

1.5

1.5

1.5

1.5

ns

1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t

OSHL

) or LOW–to–HIGH (t

OSLH

); parameter

guaranteed by design.

AC OPERATING REQUIREMENTS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω)

Limits

TA = +25°C TA = –40°C to +85°C

VCC = 3.0V to 3.6V VCC = 2.7V VCC = 3.0V to 3.6V VCC = 2.7V

Symbol Parameter Min Min Min Min Unit

t

s

Setup TIme, HIGH or LOW Dn to LE 3.0 4.0 3.0 4.5 ns

t

h

Hold TIme, HIGH or LOW Dn to LE 1.5 1.5 1.5 1.5 ns

t

w

LE Pulse Width, HIGH 4.0 5.0 4.0 6.0 ns

CAPACITIVE CHARACTERISTICS

Symbol Parameter Condition Typical Unit

C

PD

Power Dissipation Capacitance 10MHz, VCC = 3.3V, VI = 0V or V

CC

39 pF

C

IN

Input Capacitance VCC = Open, VI = 0V or V

CC

4.5 pF

MC74LVQ373

LCX DATA
BR1339 — REV 2

5 MOTOROLA

WAVEFORM 1 – PROPAGATION DELAYS

tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns

V

CC

0V

V

OH

V

OL

Dn

On

t

PHL

t

PLH

WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES

tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns

V

CC

0V

≈

0V

OE

On

t

PZH

≈

3.0V

t

PHZ

t

PZL

t

PLZ

On

50% V

CC

50% V

CC

50% V

CC

50% V

CC

50% V

CC

50% V

CC

Figure 1. AC Waveforms

50% V

CC

V

CC

VOH – 0.3V

VOL + 0.3V
GND

50% V

CC

WAVEFORM 3 – LE to On PROPAGATION DELAYS, LE MINIMUM

PULSE WIDTH, Dn to LE SETUP AND HOLD TIMES

tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns except when noted

V

CC

0V

Dn

LE

50% V

CC

On

V

CC

0V

V

OH

V

OL

t

PLH

, t

PHL

t

w

50% V

CC

50% V

CC

50% V

CC

t

h

t

s

OPEN

PULSE

GENERATOR

R

T

DUT

V

CC

R

L

R

1

C

L

6V
GND

TEST SWITCH

t

PLH

, t

PHL

Open

t

PZL

, t

PLZ

6V

Open Collector/Drain t

PLH

and t

PHL

6V

t

PZH

, t

PHZ

GND

CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = Z

OUT

of pulse generator (typically 50Ω)

Figure 2. Test Circuit

MC74LVQ373

MOTOROLA LCX DATA

BR1339 — REV 2

6

OUTLINE DIMENSIONS

DW SUFFIX

PLASTIC SOIC PACKAGE

CASE 751D–04

ISSUE E

M SUFFIX

PLASTIC SOIC EIAJ PACKAGE

CASE 967–01

ISSUE O

MIN MINMAX MAX

MILLIMETERS INCHES

DIM

A
B
C
D
F
G
J
K
M
P
R

0.510

0.299

0.104

0.019

0.035

0.012

0.009
7

°

0.415

0.029

0.499

0.292

0.093

0.014

0.020

0.010

0.004
0°

0.395

0.010

12.95

7.60

2.65

0.49

0.90

0.32

0.25
7°

10.55

0.75

12.65

7.40

2.35

0.35

0.50

0.25

0.10
0°

10.05

0.25

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.

1.27 BSC 0.050 BSC

–A

–

–B

–

P 10 PL

1 10

1120

–T

–

D

20 PL

K

C

SEATING
PLANE

R X 45°

M

0.010 (0.25)

B

M M

0.010 (0.25) T A B

M

S S

G 18 PL

F

J

DIM MIN MAX MIN MAX

INCHES

--- 2.05 --- 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.18 0.27 0.007 0.011

12.35 12.80 0.486 0.504

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059
0

0.70 0.90 0.028 0.035

--- 0.81 --- 0.032

A

1

A

b
c
D
E
e

L

M

Z

H

E

Q

1

L

E

_

10

_

0

_

10

_

NOTES:

1 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH OR PROTRUSIONS AND ARE MEASURED

AT THE PARTING LINE. MOLD FLASH OR

PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)

PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

Z

D

HEE

1

20 11

10

b

A

1

e

L

L

E

Q

1

M

_

VIEW P

DETAIL P

0.13 (0.005)

M

0.10 (0.004)

c

A

MC74LVQ373

LCX DATA
BR1339 — REV 2

7 MOTOROLA

OUTLINE DIMENSIONS

SD SUFFIX

PLASTIC SSOP PACKAGE

CASE 940C–03

ISSUE B

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948E–02

ISSUE A

DIMAMIN MAX MIN MAX

INCHES

6.60 0.260

MILLIMETERS

B 4.30 4.50 0.169 0.177
C 1.20 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC
M 0 8 0 8

_ _ _ _

NOTES:

6 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.
7 CONTROLLING DIMENSION: MILLIMETER.
8 DIMENSION A DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.
9 DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25 (0.010)

PER SIDE.

10 DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN

EXCESS OF THE K DIMENSION AT MAXIMUM

MATERIAL CONDITION.

11 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

12 DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE –W–.

1 10

1120

PIN 1
IDENT

A

B

–T–

0.100 (0.004)

C

D

G

H

SECTION N–N

K

K1

J J1

N

N

M

F

–W–

SEATING
PLANE

–V–

–U–

S

U

M

0.10 (0.004) V

S

T

20X REFK

L

L/2

2X

S

U0.15 (0.006) T

DETAIL E

0.25 (0.010)

DETAIL E

6.40 0.252
––– –––

S

U0.15 (0.006) T

20 11

101

H

A

B

F

M

K20X REF

S

U

M

0.12 (0.005) V

S

T

L

L/2

PIN 1
IDENT

S

U

M

0.20 (0.008) T

–V–

–U–

D

C

0.076 (0.003)

G

–T–

SEATING
PLANE

DETAIL E

N

N

0.25 (0.010)

K

J

J1

K1

SECTION N–N

DIMAMIN MAX MIN MAX

INCHES

7.07 7.33 0.278 0.288

MILLIMETERS

B 5.20 5.38 0.205 0.212
C 1.73 1.99 0.068 0.078
D 0.05 0.21 0.002 0.008

F 0.63 0.95 0.024 0.037
G 0.65 BSC 0.026 BSC
H 0.59 0.75 0.023 0.030

J 0.09 0.20 0.003 0.008
J1 0.09 0.16 0.003 0.006
K 0.25 0.38 0.010 0.015

K1 0.25 0.33 0.010 0.013

_ _ _ _

NOTES:

13 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.
14 CONTROLLING DIMENSION: MILLIMETER.
15 DIMENSION A DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.
16 DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.15 (0.006)

PER SIDE.
17 DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION/INTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN

EXCESS OF K DIMENSION AT MAXIMUM

MATERIAL CONDITION. DAMBAR INTRUSION

SHALL NOT REDUCE DIMENSION K BY MORE

THAN 0.07 (0.002) AT LEAST MATERIAL

CONDITION.
18 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.
19 DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE –W–.

L 7.65 7.90 0.301 0.311

M 0 8 0 8

DETAIL E

–W–

MC74LVQ373

MOTOROLA LCX DATA

BR1339 — REV 2

8

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MC74LVQ373/D

*MC74LVQ373/D*

◊