Motorola MC74LCX16240DT Datasheet
SEMICONDUCTOR TECHNICAL DATA
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The MC74LCX16240 is a high performance, inverting 16–bit buffer
operating from a 2.7 to 3.6V supply . The device is nibble controlled. Each
nibble has separate Output Enable inputs which can be tied together for
full 16–bit operation. High impedance TTL compatible inputs significantly
reduce current loading to input drivers while TTL compatible outputs offer
improved switching noise performance. A VI specification of 5.5V allows
MC74LCX16240 inputs to be safely driven from 5V devices. The
LCX16240 is suitable for memory address driving and all TTL level bus
oriented transceiver applications.
Current drive capability is 24mA at the outputs. The Output Enable
(OEn
) inputs, when HIGH, disable the outputs by placing them in a HIGH
Z condition.
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LOW–VOL TAGE
CMOS 16–BIT BUFFER
• Designed for 2.7 to 3.6V V
Operation
CC
• 5V Tolerant — Interface Capability With 5V TTL Logic
• Supports Live Insertion and Withdrawal
• I
Specification Guarantees High Impedance When VCC = 0V
OFF
• LVTTL Compatible
• LVCMOS Compatible
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V; Machine Model >200V
The MC74LCX16240 contains sixteen inverting buffers with 3–state
5V–tolerant outputs. The device is nibble controlled with each nibble
functioning identically, but independently. The control pins may be tied
together to obtain full 16–bit operation. The 3–state outputs are controlled
by an Output Enable (OEn
outputs are on. When OEn
impedance state.
) input for each nibble. When OEn is LOW, the
is HIGH, the outputs are in the high
PLASTIC TSSOP PACKAGE
PIN NAMES
Pins
OEn
D0–D15
O0
–O15
DT SUFFIX
CASE 1201–01
Function
Output Enable Inputs
Inputs
Outputs
This document contains information on a product under development. Motorola reserves the right to
change or discontinue this product without notice.
9/95
Motorola, Inc. 1995
1
REV 0.2
MC74LCX16240
OE1
V
CC
O9
V
CC
OE4
OE2
481
D0O0
472
D1O1
463
GNDGND
454
D2O2
445
D3O3
436
V
427
CC
D4O4
418
D5O5
409
GNDGND
3910
D6O6
3811
D7O7
3712
D8O8
3613
D9
3514
GNDGND
3415
D10O10
3316
D11O11
3217
V
3118
CC
D12O12
3019
D13O13
2920
GNDGND
2821
D14O14
2722
D15O15
2623
OE3
2524
OE1
OE2
D0:3
D4:7
1
48
LOGIC DIAGRAM
OE3
OE4
O0:3
O4:7
D8:11
D12:15
25
24
O8:11
O12:15
One of Four
OE1 D0:3 O0:3 OE2 D4:7 O4:7 OE3 D8:11 O8:11 OE4 D12:15 O12:15
L L H L L H L L H L L H
L H L L H L L H L L H L
H X Z H X Z H X Z H X Z
H = High V oltage Level; L = Low V oltage Level; Z = High Impedance State; X = High or Low Voltage Level and T ransitions Are Acceptable, for I
reasons, DO NOT FLOAT Inputs
MOTOROLA LCX DATA
2
BR1339 — REV 2
CC
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