Motorola MC74HCU04ADT, MC74HCU04AD, MC74HCU04AN Datasheet

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SEMICONDUCTOR TECHNICAL DATA

1

REV 0

 Motorola, Inc. 1995

10/95

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High–Performance Silicon–Gate CMOS

The MC74HCU04A is identical in pinout to the LS04 and the MC14069UB. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of six single–stage inverters. These inverters are well suited for use as oscillators, pulse shapers, and in many other applications requiring a high–input impedance amplifier. For digital applications, the HC04A is recommended.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2 to 6 V; 2.5 to 6 V in Oscillator

Configurations

• Low Input Current: 1 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 12 FETs or 3 Equivalent Gates

LOGIC DIAGRAM

Y1A1

A2

A3

A4

A5

A6

Y2

Y3

Y4

Y5

Y6

1

3

5

9

11

13

2

4

6

8

10

12

Y = A

PIN 14 = V

CC

PIN 7 = GND

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

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FUNCTION TABLE

PIN ASSIGNMENT

Inputs

A

L

H

11

12

13

14

8

9

105

4

3

2

1

7

6

Y5

A5

Y6

A6

V

CC

Y4

A4

Y2

A2

Y1

A1

GND

Y3

A3

Outputs

Y

H L

D SUFFIX

SOIC PACKAGE

CASE 751A–03

N SUFFIX

PLASTIC PACKAGE

CASE 646–06

ORDERING INFORMATION

MC74HCUXXAN MC74HCUXXAD MC74HCUXXADT

Plastic SOIC TSSOP

1

14

1

14

1

14

DT SUFFIX

TSSOP PACKAGE

CASE 948G–01

MC74HCU04A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

in

DC Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

out

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

I

in

DC Input Current, per Pin

± 20

mA

I

out

DC Output Current, per Pin

± 25

mA

I

CC

DC Supply Current, VCC and GND Pins

± 50

mA

P

D

Power Dissipation in Still Air Plastic DIP†

SOIC Package†

TSSOP Package†

750 500 450

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

T

L

Lead Temperature, 1 mm from case for 10 Seconds

Plastic DIP, SOIC or TSSOP Package

260

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: –10mW/_C from 65_ to 125_C

SOIC Package: –7mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

V

CC

DC Supply Voltage (Referenced to GND)

2.0

6.0

V

Vin, V

out

DC Input Voltage, Output Voltage (Referenced to GND)

0

V

CC

V

T

A

Operating Temperature, All Package Types

– 55

+ 125

_

C

tr, t

f

Input Rise and Fall Time (Figure 1)

—

No

Limit

ns

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

Parameter

Test Conditions

V

CC

V

– 55 to

25_C

v

85_Cv 125_C

Unit

V

IH

Minimum High–Level Input Voltage

V

out

= 0.5 V*

|I

out

| v 20 µA

2.0

3.0

4.5

6.0

1.7

2.5

3.6

4.8

1.7

2.5

3.6

4.8

l.7

2.5

3.6

4.8

V

IL

Maximum Low–Level Input Voltage

V

out

= VCC – 0.5 V*

|I

out

| v 20 µA

2.0

3.0

4.5

6.0

0.3

0.5

0.8

1.1

0.3

0.5

0.8

1.1

0.3

0.5

0.8

1.1

V

Vin = GND |I

out

| v 20 µA

2.0

4.5

6.0

1.8

4.0

5.5

1.8

4.0

5.5

1.8

4.0

5.5

Vin = GND |I

out

| v 2.4 mA

|I

out

| v 4.0 mA

|I

out

| v 5.2 mA

3.0

4.5

6.0

2.36

3.86

5.36

2.26

3.76

5.26

2.20

3.70

5.20

Vin = V

CC

|I

out

| v 20 µA

2.0

4.5

6.0

0.2

0.5

0.2

0.5

0.2

0.5

Vin = V

CC

|I

out

| v 2.4 mA

|I

out

| v 4.0 mA

|I

out

| v 5.2 mA

3.0

4.5

6.0

0.32

0.37

0.32

0.40

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

V

OH

V

OL

Minimum High–Level Output Voltage

Maximum Low–Level Output Voltage

V

MC74HCU04A

High–Speed CMOS Logic Data DL129 — Rev 6

3 MOTOROLA

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Unit

v

125_C

v

85_C

– 55 to

25_C

V

CC

V

Test Conditions

Parameter

Symbol

I

in

Maximum Input Leakage Current

Vin = VCC or GND

6.0

± 0.1

± 1.0

µA

I

CC

Maximum Quiescent Supply Current (per Package)

Vin = VCC or GND I

out

= 0 µA

6.0

1

10

40

µA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). *For VCC = 2.0 V, V

out

= 0.2 V or VCC – 0.2 V.

AC ELECTRICAL CHARACTERISTICS (C

L

= 50 pF, Input tr = tf = 6 ns)

Guaranteed Limit

Symbol

Parameter

V

CC

V

– 55 to

25_C

v

85_Cv 125_C

Unit

t

PLH

,

t

PHL

Maximum Propagation Delay, Input A to Output Y

(Figures 1 and 2)

2.0

3.0

4.5

6.0

80 40 16 14

100

45 20 17

120

50 24 20

ns

t

TLH

,

t

THL

Maximum Output Transition Time, Any Output

(Figures 1 and 2)

2.0

3.0

4.5

6.0

75 27 15 13

95 32 19 16

110

36 22 19

ns

C

in

Maximum Input Capacitance

—

10

pF

NOTES:

1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Typical @ 25°C, VCC = 5.0 V

15

*Used to determine the no–load dynamic power consumption: PD = CPD V

CC

2

f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

C

PD

Power Dissipation Capacitance (Per Inverter)*

pF