Datasheet MC74HC4852AFL2, MC74HC4852AFR1, MC74HC4852AFR2, MC74HC4852AN, MC74HC4852AFEL Datasheet (MOTOROLA)

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 4

1 Publication Order Number:

MC74HC4851A/D

MC74HC4851A,
MC74HC4852A

Analog Multiplexers/
Demultiplexers with
Injection Current Effect
Control

Automotive Customized

These devices are pin compatible to standard HC405x and
MC1405xB analog mux/demux devices, but feature injection current
effect control. This makes them especially suited for usage in
automotive applications where voltages in excess of normal logic
voltage are common.

The injection current effect control allows signals at disabled analog
input channels to exceed the supply voltage range without affecting
the signal of the enabled analog channel. This eliminates the need for
external diode/ resistor networks typically used to keep the analog
channel signals within the supply voltage range.

The devices utilize low power silicon gate CMOS technology. The
Channel Select and Enable inputs are compatible with standard CMOS
outputs.

• Injection Current Cross–Coupling Less than 1mV/mA (See Figure 9)

• Pin Compatible to HC405X and MC1405XB Devices

• Power Supply Range (V

CC

– GND) = 2.0 to 6.0 V

• In Compliance With the Requirements of JEDEC Standard No. 7A

• Chip Complexity: 154 FETs or 36 Equivalent Gates

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MARKING

DIAGRAMS

1

16

PDIP–16
N SUFFIX
CASE 648

HC485xAN

AWLYYWW

SOIC–16
D SUFFIX

CASE 751B

TSSOP–16
DT SUFFIX

CASE 948F

1

16

HC485xAD

AWLYWW

HC48

5xA

ALYW

1

16

A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week

SOIC–16 WIDE

DW SUFFIX
CASE 751G

1

16

HC485xADW

AWLYWW

See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.

ORDERING INFORMATION

MC74HC4851A, MC74HC4852A

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2

Figure 1. MC74HC4851A Logic Diagram

Single–Pole, 8–Position Plus Common Off

X0

13

X1

14

X2

15

X3

12

X4

1

X5

5

X6

2

X7

4

A

11

B

10

C

9

ENABLE

6

MULTIPLEXER/

DEMULTIPLEXER

X

3

ANALOG

INPUTS/

CHANNEL

INPUTS

PIN 16 = V

CC

PIN 8 = GND

COMMON
OUTPUT/
INPUT

1516 14 13 12 11 10

21 34567

V

CC

9

8

X2 X1 X0 X3 A B C

X4 X6 X X7 X5 Enable NC GND

Figure 2. MC74HC4851A 16–Lead Pinout (Top View)

OUTPUTS

SELECT

L
L
L
L
H
H
H
H
X

L
L
H
H
L
L
H
H
X

L
H
L
H
L
H
L
H
X

FUNCTION TABLE – MC74HC4851A

Control Inputs

ON Channels

Enable

Select

CBA

X0
X1
X2
X3
X4
X5
X6
X7

NONE

L
L
L
L
L
L
L
L
H

Figure 3. MC74HC4852A Logic Diagram

Double–Pole, 4–Position Plus Common Off

X0

12

X1

14

X2

15

X3

11

Y0

1

Y1

5

Y2

2

Y3

4

A

10

B

9

ENABLE

6

X SWITCH

Y SWITCH

X

13

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

PIN 16 = V

CC

PIN 8 = GND

COMMON
OUTPUTS/INPUTS

L

L
H
H
X

L
H
L
H
X

FUNCTION TABLE – MC74HC4852A

Control Inputs

ON Channels

Enable

Select

BA

X0
X1
X2
X3

L
L
L
L
H

X = Don’t Care

Figure 4. MC74HC4852A 16–Lead Pinout (Top View)

1516 14 13 12 11 10

21 34567

V

CC

9

8

X2 X1 X X0 X3 A B

Y0 Y2 Y Y3 Y1 Enable NC GND

Y

3

Y0
Y1
Y2
Y3

NONE

MC74HC4851A, MC74HC4852A

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3

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

Positive DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

V

in

DC Input Voltage (Any Pin) (Referenced to GND)

– 0.5 to VCC + 0.5

V

I

DC Current, Into or Out of Any Pin

± 25

mA

ÎÎ

Î

P

D

ОООООООООООО

Î

Power Dissipation in Still Air, Plastic DIP†

SOIC Package†

TSSOP Package†

ÎÎÎ

Î

750
500
450

Î

Î

mW

T

stg

Storage Temperature Range

– 65 to + 150

_

C

ÎÎ

Î

T

L

ОООООООООООО

Î

Lead Temperature, 1 mm from Case for 10 Seconds

Plastic DIP, SOIC or TSSOP Package

ÎÎÎ

Î

260

Î

Î

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

ÎÎ

Max

Unit

V

CC

Positive DC Supply Voltage (Referenced to GND)

2.0

ÎÎ

6.0

V

V

in

DC Input Voltage (Any Pin) (Referenced to GND)

GND

ÎÎ

V

CC

V

VIO*

Static or Dynamic Voltage Across Switch

0.0

ÎÎ

1.2

V

T

A

Operating Temperature Range, All Package T ypes

– 55

ÎÎ

+ 125

_

C

ÎÎ

Î

tr, t

f

ООООООООООООО

Î

Input Rise/Fall Time VCC = 2.0 V

(Channel Select or Enable Inputs) VCC = 4.5 V

VCC = 6.0 V

Î

Î

0
0
0

ÎÎ

ÎÎ

1000

500
400

Î

Î

ns

*For voltage drops across switch greater than 1.2V (switch on), excessive VCC current may be

drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND) V

EE

= GND, Except Where Noted

V

Guaranteed Limit

Symbol Parameter Condition

V

CC

V

–55 to 25°C ≤85°C ≤125°C

Unit

V

IH

Minimum High–Level Input
Voltage, Channel–Select or Enable
Inputs

Ron = Per Spec 2.0

3.0

4.5

6.0

1.50

2.10

3.15

4.20

1.50

2.10

3.15

4.20

1.50

2.10

3.15

4.20

V

V

IL

Maximum Low–Level Input
Voltage, Channel–Select or Enable
Inputs

Ron = Per Spec 2.0

3.0

4.5

6.0

0.50

0.90

1.35

1.80

0.50

0.90

1.35

1.80

0.50

0.90

1.35

1.80

V

I

in

Maximum Input Leakage Current
on Digital Pins (Enable/A/B/C)

Vin = VCC or GND 6.0 ± 0.1 ± 1.0 ± 1.0 µA

I

CC

Maximum Quiescent Supply
Current (per Package)

V

in(digital)

= VCC or GND

V

in(analog)

= GND

6.0 2 20 40 µA

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).

This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir­cuit. For proper operation, Vin and
V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.

MC74HC4851A, MC74HC4852A

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4

DC CHARACTERISTICS — Analog Section

Guaranteed Limit

Symbol Parameter Condition V

CC

–55 to 25°C ≤85°C ≤125°C

Unit

R

on

Maximum “ON” Resistance Vin = VIL or VIH;VIS = VCC to

GND; IS ≤ 2.0 mA

2.0

3.0

4.5

6.0

1700
1100

550
400

1750
1200

650
500

1800
1300

750
600

Ω

∆R

on

Delta “ON” Resistance Vin = VIL or VIH; VIS = VCC/2

IS ≤ 2.0 mA

2.0

3.0

4.5

6.0

300
160

80
60

400
200
100

80

500
240
120
100

Ω

I

off

Maximum Off–Channel Leakage
Current,

Any One Channel

Common Channel

Vin = VCC or GND

6.0 ±0.1

±0.2

±0.5
±2.0

±1.0
±4.0

µA

I

on

Maximum On–Channel Leakage

Channel–to–Channel

Vin = VCC or GND

6.0 ±0.2 ±2.0 ±4.0

µA

AC CHARACTERISTICS (C

L

= 50 pF, Input tr = tf = 6 ns)

Symbol Parameter V

CC

–55 to 25°C ≤85°C ≤125°C Unit

t

PHL

,

t

PLH

Maximum Propagation Delay , Analog Input to Analog Output 2.0

3.0

4.5

6.0

160

80
40
30

180

90
45
35

200
100

50
40

ns

t

PHL

, t

PHZ,PZH

t

PLH

, t

PLZ,PZL

Maximum Propagation Delay , Enable or Channel–Select to
Analog Output

2.0

3.0

4.5

6.0

260
160

80
60

280
180

90
70

300
200
100

80

ns

C

in

Maximum Input Capacitance Digital Pins
(All Switches Off) Any Single Analog Pin
(All Switches Off) Common Analog Pin

10
35

130

10
35

130

10
35

130

pF

C

PD

Power Dissipation Capacitance Typical 5.0 20 pF

INJECTION CURRENT COUPLING SPECIFICATIONS (V

CC

= 5V, TA = –55°C to +125°C)

Symbol Parameter Typ Max Unit Condition

V∆

out

Maximum Shift of Output Voltage of Enabled Analog
Channel

0.1

1.0

0.5

5.0

1.0

5.0

2.0
20

mV Iin* ≤ 1mA, RS ≤ 3,9kΩ

Iin* ≤ 10mA, RS ≤ 3,9kΩ
Iin* ≤ 1mA, RS ≤ 20kΩ
Iin* ≤ 10mA, RS ≤ 20kΩ

* Iin = T otal current injected into all disabled channels.

MC74HC4851A, MC74HC4852A

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5

Figure 5. Typical On Resistance VCC = 2V Figure 6. Typical On Resistance VCC = 3V

Figure 7. Typical On Resistance VCC = 4.5V Figure 8. Typical On Resistance VCC = 6V

Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND

R

on

, ON RESISTANCE (OHMS)

–55°C
+25°C
+125°C

Vin, INPUT VOLTAGE (VOLTS), REFERENCED T O GND

R

on

, ON RESISTANCE (OHMS)

–55°C
+25°C

+125°C

Vin, INPUT VOLTAGE (VOLTS), REFERENCED T O GND

R

on

, ON RESISTANCE (OHMS)

–55°C
+25°C

+125°C

Vin, INPUT VOLTAGE (VOLTS), REFERENCED T O GND

R

on

, ON RESISTANCE (OHMS)

–55°C
+25°C

+125°C

1100
1000

900
800
700
600
500
400
300
200
100

0

1100

1000

900
800
700
600
500
400
300
200
100

0

660
600
540
480
420
360
300
240
180
120

60

0

440
400
360
320
280
240
200
160
120

80
40

0

0.0 0.9 1.8 2.7 3.6 4.5 0.0 1.2 2.4 3.6 4.8 6.0

0.0 0.4 0.8 1.2 1.6 2.0 0.0 0.6 1.2 1.8 2.4 3.0

MC74HC4851A, MC74HC4852A

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6

VCC =

5

V

I

in

Vin2 < VSS or VCC < Vin2

Any Disabled Channel

VSS < Vin1 < V

CC

Enabled Channel

R

S

V

out

= Vin1 ±V∆

out

Figure 9. Injection Current Coupling Specification

Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8

Common Out

V

CC

HC4051A Microcontroller

A/D – Input

V

CC

5V

6V5V

Sensor

(8x Identical Circuitry)

Figure 10. Actual Technology

Requires 32 passive components and one extra 6V regulator

to suppress injection current into a standard HC4051 multiplexer

Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8

Common Out

V

CC

HC4851A Microcontroller

A/D – Input

V

CC

5V

Sensor

(8x Identical Circuitry)

Figure 11. MC74HC4851A Solution

Solution by applying the HC4851A multiplexer

MC74HC4851A, MC74HC4852A

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7

Figure 12. On Resistance Test

Set–Up

PLOTTER

MINI COMPUTER

PROGRAMMABLE

POWER

SUPPLY

DC ANALYZER

V

CC

DEVICE

UNDER TEST

+–

ANALOG IN COMMON OUT

GND

Figure 13. Maximum Off Channel Leakage Current,

Any One Channel, Test Set–Up

OFF
OFF

6
8

16

COMMON O/I

V

CC

V

IH

NC

A

V

CC

V

EE

V

CC

Figure 14. Maximum Off Channel Leakage Current,

Common Channel, Test Set–Up

OFF
OFF

6
8

16

COMMON O/I

V

CC

V

IH

ANALOG I/O

V

CC

V

EE

V

CC

Figure 15. Maximum On Channel Leakage Current,

Channel to Channel, Test Set–Up

ON

OFF

6
8

16

COMMON O/I

V

CC

V

IL

V

CC

V

EE

V

CC

N/C

A

ANALOG I/O

Figure 16. Propagation Delays, Channel Select

to Analog Out

Figure 17. Propagation Delay, Test Set–Up Channel

Select to Analog Out

V

CC

GND

CHANNEL

SELECT

ANALOG

OUT

50%

t

PLH

t

PHL

50%

ON/OFF

6
8

16

V

CC

CL*

*Includes all probe and jig capacitance

CHANNEL SELECT

TEST
POINT

COMMON O/I

OFF/ON

ANALOG I/O

V

CC

MC74HC4851A, MC74HC4852A

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8

Figure 18. Propagation Delays, Analog In

to Analog Out

Figure 19. Propagation Delay, Test Set–Up

Analog In to Analog Out

Figure 20. Propagation Delays, Enable to

Analog Out

Figure 21. Propagation Delay, Test Set–Up

Enable to Analog Out

V

CC

GND

ANALOG

IN

ANALOG

OUT

50%

t

PLH

t

PHL

50%

ON

6
8

16

V

CC

CL*

*Includes all probe and jig capacitance

TEST
POINT

COMMON O/I

ANALOG I/O

ON/OFF

6
8

ENABLE

V

CC

ENABLE

90%
50%
10%

t

f

t

r

V

CC

GND

ANALOG

OUT

t

PZL

ANALOG

OUT

t

PZH

HIGH
IMPEDANCE

V

OL

V

OH

HIGH
IMPEDANCE

10%

90%

t

PLZ

t

PHZ

50%

50%

ANALOG I/O

CL*

TEST
POINT

16

V

CC

10kΩ

1
2

1
2

POSITION 1 WHEN TESTING t

PHZ

AND t

PZH

POSITION 2 WHEN TESTING t

PLZ

AND t

PZL

Figure 22. Power Dissipation Capacitance,

Test Set–Up

ON/OFF

6
8

16

V

CC

CHANNEL SELECT

NC

COMMON O/I

OFF/ON

ANALOG I/O

V

CC

A

11

V

CC

MC74HC4851A, MC74HC4852A

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9

13

X0

14

X1

15

X2

12

X3

1

X4

5

X5

2

X6

4

X7

3

X

11

A

10

B

9

C

6

ENABLE

Figure 23. Diagram of Bipolar Coupling Mechanism

Appears if Vin exceeds VCC, driving injection current into the substrate

Figure 24. Function Diagram, HC4851A

+

+

+

P+ P+

N – Substrate (on VCC potential)

Gate

= V

CC

(Disabled)

Common Analog Output
V

out

> V

CC

Disabled Analog Mux Input

Vin > VCC + 0.7V

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

INJECTION

CURRENT
CONTROL

MC74HC4851A, MC74HC4852A

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10

Figure 25. Function Diagram, HC4852A

10

A

9

B

6

ENABLE

13

X0

14

X1

15

X2

12

X3

1

Y0

5

Y1

2

Y2

4

Y3

13

X

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

INJECTION

CURRENT

CONTROL

3

Y

INJECTION

CURRENT

CONTROL

ORDERING & SHIPPING INFORMATION

Device Package Shipping

MC74HC4851AN PDIP–16 500 Units / Unit Pak
MC74HC4851AD SOIC–16 48 Units / Rail
MC74HC4851ADR2 SOIC–16 2500 Units / Tape & Reel
MC74HC4851ADW SOIC–16 WIDE 48 Units / Rail
MC74HC4851ADWR2 SOIC–16 WIDE 1000 Units / Tape & Reel
MC74HC4851ADT TSSOP–16 96 Units / Rail
MC74HC4851ADTR2 TSSOP–16 2500 Units / Tape & Reel
MC74HC4852AN PDIP–16 500 Units / Unit Pak
MC74HC4852AD SOIC–16 48 Units / Rail
MC74HC4852ADR2 SOIC–16 2500 Units / Tape & Reel
MC74HC4852ADW SOIC–16 WIDE 48 Units / Rail
MC74HC4852ADWR2 SOIC–16 WIDE 1000 Units / Tape & Reel
MC74HC4852ADT TSSOP–16 96 Units / Rail
MC74HC4852ADTR2 TSSOP–16 2500 Units / Tape & Reel

MC74HC4851A, MC74HC4852A

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11

P ACKAGE DIMENSIONS

PDIP–16

N SUFFIX

CASE 648–08

ISSUE R

MIN MINMAX MAX

INCHES MILLIMETERS

DIM

A
B
C
D
F
G
H
J
K
L
M
S

18.80

6.35

3.69

0.39

1.02

0.21

2.80

7.50
0°

0.51

19.55

6.85

4.44

0.53

1.77

0.38

3.30

7.74
10°

1.01

0.740

0.250

0.145

0.015

0.040

0.008

0.110

0.295
0°

0.020

0.770

0.270

0.175

0.021

0.070

0.015

0.130

0.305
10°

0.040

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

2.54 BSC

1.27 BSC

0.100 BSC

0.050 BSC

–A

–

B

18

916

F

H

G

D

16 PL

S

C

–T

–

SEATING
PLANE

K

J

M

L

TA0.25 (0.010)

M M

0.25 (0.010) T B A

M

S S

MIN MINMAX MAX

MILLIMETERS INCHES

DIM

A
B
C
D
F

G

J
K

M

P
R

9.80

3.80

1.35

0.35

0.40

0.19

0.10
0°

5.80

0.25

10.00

4.00

1.75

0.49

1.25

0.25

0.25
7°

6.20

0.50

0.386

0.150

0.054

0.014

0.016

0.008

0.004
0°

0.229

0.010

0.393

0.157

0.068

0.019

0.049

0.009

0.009
7°

0.244

0.019

1.27 BSC 0.050 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

1

8

916

–A

–

–B

–

D

16 PL

K

C

G

–T

–

SEATING

PLANE

R X 45°

M

J

F

P 8 PL

0.25 (0.010) B

M M

SOIC–16

D SUFFIX

CASE 751B–05

ISSUE J

SOIC–16 WIDE

DW SUFFIX

CASE 751G–02

ISSUE A

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 10.15 10.45 0.400 0.411
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC 0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029

M

B

M

0.010 (0.25)

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.

–A–

–B– P8X

G14X

D16X

SEATING
PLANE

–T–

S

A

M

0.010 (0.25) B

S

T

16 9

81

F

J

R X 45

_

____

M

C

K

MC74HC4851A, MC74HC4852A

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12

P ACKAGE DIMENSIONS

TSSOP–16

DT SUFFIX

CASE 948F–01

ISSUE O

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC
M 0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH OR
GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED AT
DATUM PLANE –W–.

____

SECTION N–N

SEATING
PLANE

IDENT.

PIN 1

1

8

16

9

DETAIL E

J

J1

B

C

D

A

K

K1

H

G

DETAIL E

F

M

L

2X L/2

–U–

S

U0.15 (0.006) T

S

U0.15 (0.006) T

S

U

M

0.10 (0.004) V

S

T

0.10 (0.004)

–T–

–V–

–W–

0.25 (0.010)

16X REFK

N

N

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